Lenovo ThinkPad A275 Schematic

5
Vinafix.com
WV4 AMD Schemat i c
4
3
2
1
P01_TITLE PAGE
P02_BLOCK DIAGRAM
D D
P03_BLANK
P05_APU PEG/PCIe P06_APU DDRA/1 P07_APU DDRB/2 P08_APU DISPLAY/CLK/MISC 2
P09_APU SATA/USB/LPC/SPI
P10_APU GPIO/AZ/I2C/UARTS/ACPI
P11_APU Power
P12_APU GND
C C
P13_Switch P14_DDR4 CH-A PRIMARY
P15_BLANK
P16_USB 2.0 HUB GL850G
P17_BLANK P18_BLANK
P19_LCD/LID/MIC/CAMERA/PWR SW
P20_PCIE_SATA SWITCH
P21_HDMI Bypass
B B
P22_HDMI CONNECTOR
P23_SATA REDRIVER
P24_SATA EXPRESS CONNECTOR
P25_USB3.0 REDRIVER P26_USB AOU POWER/CONNECTOR P27_PCIE RE-DRIVER P28_USB POWER/CONNECTOR
P29_GLAN-RTL8111EPV
P30_BLANK
P31_GBE MAGNETICS
A A
P32_RJ45 CONNECTOR P33_TYPE C PD Controller P34_TYPE-C_MUX P35_M.2 SOCKET 1 WLAN
5
P36_M.2 SOCKET 2 WWAN
P37_CARD READER RTS5232S-GR P38_Card Reader Connector
P39_AUDIO ALC3268 P40_AUDIO CONNECTOR P41_AUDIO JACK SENSE
P42_AUDIO EXT MIC I/F
P43_AUDIO SPEAKER P44_AUDIO BEEP P45_BLANK P46_KEYBOARD/TRACK POINT
P47_TOUCH PAD/FPR/Smart Card
P48_FAN CONNECTOR P49_G-SENSOR P50_TPM P51_DEVICE_DETECT# TABLE P52_EC_IT8186E/FX P53_PTH FOR SCREW HOLES P54_THERMAL SENSOR P55_3VS/5VS/VDDP/1.8VS P56_VDDCR_FCH_ALW/RTC/0.775VA P57_+1.5VS
P69_OTP
P70_DC-IN P71_TYP-C
P72_BATTERY INPUT
P73_BATTERY CHARGER(BQ25700) P74_CHARGER SELECTOR P75_DC/DC VCC5M/VCC3M(NB679/680 P76_DC/DC VCC1R2A(NB685A) P77_VDD/VDDNB (ISL62771) P78_VDD_GFX(ISL62771) P79_SDLE DECOUPLING P80_VDDCORE DECOUPLING
P81_+1.05VALW(NB693)
4
3
P82_+2.5V(RT8068A)
P83_+1.8VALW(RT8068A) P84_RTC BATTERY
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
2016/09/29
2016/09/29
2016/09/29
LC Future Center Secret Data
LC Future Center Secret Data
LC Future Center Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
2015/8/10
2015/8/10
2015/8/10
Title
Title
Title
TITLE PAGE
TITLE PAGE
TITLE PAGE
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
C
Date: Sheet of
Date: Sheet of
Date: Sheet of
WWWOOOLLLVVVEEERRRIIINNNEEE444 AAAMMMDDD
WWWOOOLLLVVVEEERRRIIINNNEEE444 AAAMMMDDD
WWWOOOLLLVVVEEERRRIIINNNEEE444 AAAMMMDDD
Tuesday, May 09, 2017
Tuesday, May 09, 2017
Tuesday, May 09, 2017
1
1 84
1 84
1 84
SIT
SIT
SIT
5
Vinafix.com
LCD CONN eDP 14" HD/FHD
eDPx2
23
APU
4
DDR4 / 1.2V
SM Bus
DDR4
SO-DIMMA
14
Channel A
DDR4
3
2
1
Windu Block Diagram
Project Code:
AMD
Bristol Ridge FP4
Platform
BGA968
5,6,7,8,9,10,11,12
49
Embedded
Controller IT8186VG
Keyboard
4647
4
SATA Port
TPM
SLB9670VQ2.0
52
Power Button
HDT (For AMD Debug)
RTC Battery
Re-Driver
PS8527C
24
SM Bus
PCI Express x8
HDA
SPI Flash 64Mbits
W25Q64FWSSIQ
50
SM Bus
LED for ThinkPad Logos
23
External Connector/Socket Internal Connector/Socket Internal Switch
9
8
54
Stereo Speaker
HDD CONN SSD
43
Microphone Headphone
40,41,42
40
Audio Combo Jack
24
ALC3268-CG HDA CODEC
3
Type-A M.2 Card
USB 2.0
HUB Port 2
Internal
Mic
SM Bus
Antenna
(M.2 WLAN Card)
Bluetooth
39
23
MAGNETICS
RJ45
Thermal Sensor
F75303M
GLAN RealTek
RTL8111EPV-CG
31,32
51
33
LAN SWITCH
PI3L720ZHE+CX
Por t 2 (X1)
Por t 0 (X1)
30
29
SM Bus
SM Bus
SPI Flash 8Mbits
W25X80AVSNIG
29
MUX & PD TPS65982DAZQZR
RTS5232S-GR Card Reader
Card Reader CONN
SPI Flash 8Mbits
W25Q80BLSNIG
Por t 1 (X1)
17
17
Power Control
USB Type-C
USB3.0
USB2.0
Switch MUX PS8743BQFN40GTR-B0
T y p e - C
CONN
USB DP
18
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FRO M THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FRO M THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FRO M THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED B Y LC F UTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED B Y LC F UTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED B Y LC F UTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
2015/11/02
2015/11/02
2015/11/02
LC Future Center Secret Data
LC Future Center Secret Data
LC Future Center Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
2015/8/10
2015/8/10
2015/8/10
TABLE: Chip Capacitor Thermal Characteristics
35
36
-55 to 150degC
-55 to 125degC
-55 to 125degC
-55 to 105degC
-55 to 85degC
18
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
+/-30ppm/degC +/-30ppm/degC
+/-15% +/-22% +/-15%
TABLE: Chip Part Dimension
Size [mm]
0.40 x 0.20
0.60 x 0.30
1.00 x 0.50
1.60 x 0.80
2.00 x 1.25
2.00 x 1.60
2.50 x 2.00
3.20 x 1.60
3.20 x 2.50
4.50 x 1.60
4.50 x 2.50
4.50 x 3.20
5.00 x 2.50
6.40 x 3.20
BLOCK DIAGRAM
BLOCK DIAGRAM
BLOCK DIAGRAM
C
Tuesday, May 09, 2017
Tuesday, May 09, 2017
Tuesday, May 09, 2017
Code
NPO
C0G
X7R X6S X5R
TABLE: Chip Capacitor Tolerance
T o l e r a n c e
+/-0.25pF +/-0.5pF
+/-5% +/-10% +/-20% +80/-20%
mm Size Code Inch Size Code
0402 0603 1005 1608 2125 2016 2520 3216 3225 4516 4525 4532 5025 6432
WWWOOOLLLVVVEEERRRIIINNNEEE444 AAAMMMDDD
WWWOOOLLLVVVEEERRRIIINNNEEE444 AAAMMMDDD
WWWOOOLLLVVVEEERRRIIINNNEEE444 AAAMMMDDD
1
Code
C D
J K M
Z
01005 0201 0402 0603 0805 0806 1008 1206 1210 1806 1810 1812 2010 2512
LOGIC
2 84
2 84
2 84
SIT
SIT
SIT
USB2.0 CH1
25
HDMI Conn
DP Type-C
USB2.0 Fingerprint
33
USB3.0 CH1
USB2.0 CH5
USB2.0
HUB Port 1
Fingerprint Reader
47
D D
USB2.0 Smart Cart
USB2.0 CH3
USB2.0 HUB
GL850G
USB3.0 CONN (USB1)
C C
USB3.0 AOU (USB2)
USB Type-C
USB2.0 2D Camera
USB2.0 Touch Panel
B B
47
USB2.0 CH2
16
28
26,27
17,18
23
23
USB2.0 M.2 WLAN Slot (BT)
USB2.0 CH3
USB3.0 CH3
USB2.0 CH7
USB Redriver
PS8713BTQFN24GTR2A
USB3.0 CH2 USB2.0 CH6
USB2.0 CH3
USB2.0 CH0
25
17,18
SM Bus
ClickPad
DDI x4
DDI x4
47
USB 2.0 x8 Port USB 3.0 x4 Port
G-Sensor
BMA255_LGA12
FAN
SM Bus
48
A A
Device Address
Thermal Sensor F75303M 1001_101xb
G Sensor BMA255 30h (W) & 31h (R)
DDR DIMM0 (JDIMM1)
CH-A
CH-B
DDR DIMM1 (JDIMM2)
32h (W) & 33h (R)
0H
2H
5
ADDR_SEL
H
L
5
Vinafix.com
D D
C C
4
3
2
1
BLANK
B B
A A
Title
Title
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
3
2016/09/29
2016/09/29
2016/09/29
LC Future Center Secret Data
LC Future Center Secret Data
LC Future Center Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
2015/08/10
2015/08/10
2015/08/10
Title
BLANK
BLANK
BLANK
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Tuesday, May 09, 2017
Tuesday, May 09, 2017
Date: Sheet of
Date: Sheet of
Date: Sheet of
Tuesday, May 09, 2017
WWWOOOLLLVVVEEERRRIIINNNEEE444 AAAMMMDDD
WWWOOOLLLVVVEEERRRIIINNNEEE444 AAAMMMDDD
WWWOOOLLLVVVEEERRRIIINNNEEE444 AAAMMMDDD
1
3 84
3 84
3 84
SITCustom
SITCustom
SITCustom
5
Vinafix.com
4
3
2
1
SMBus 0
D D
DDR4 SO-DIMM*2
MOSFET USB HUB GL852G-50
APU
SIC / SID
SMBus 1
C C
SMBus 3 SMBus 0
B B
SMBus 2
MOSFET
LAN - RTL8111EPV
SMBus Switch Click Pad
EC - IT8186
TYPE-C PD - TPS65982
G SENSOR - BMA255
Thermal IC - F75303M
EC - IT8186
EC IT8186
SMBus 1
SMBus 5
A A
5
SMBus 4
4
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
CHARGER BQ25700
MAIN Battery
Second Battery
2015/10/5
2015/10/5
2015/10/5
3
LC Future Center Secret Data
LC Future Center Secret Data
LC Future Center Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2014/12/05
2014/12/05
2014/12/05
Title
Title
Title
SMBus Block
SMBus Block
SMBus Block
Size
Size
Size
Document Num ber Rev
Document Num ber Rev
Document Num ber Rev
B
B
B
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
WWWOOOLLLVVVEEERRRIIINNNEEE444 AAAMMMDDD
WWWOOOLLLVVVEEERRRIIINNNEEE444 AAAMMMDDD
WWWOOOLLLVVVEEERRRIIINNNEEE444 AAAMMMDDD
Tuesday, May 09, 2017
Tuesday, May 09, 2017
Tuesday, May 09, 2017
1
4 84
4 84
4 84
SIT
SIT
SIT
5
Vinafix.com
4
3
2
1
PCIe Port Assignment
0
GbE PHY
1
Card Reader
2
D D
LAN
CardReader
C C
WLAN
WWAN WWAN
+1.05VS_VDDP
3
M.2 WLAN Slot M.2 WWAN Slot
UC1B
PC IE
PCIE0_CRX_DTX_P29 PCIE0_CRX_DTX_N29
PCIE1_CRX_DTX_P37 PCIE1_CRX_DTX_N37
PCIE2_CRX_DTX_P35 PCIE2_CRX_DTX_N35
PCIE3_CRX_DTX_N27 PCIE3_CTX_DRX_N_C 27
1 2
RC1 196_0201_1%
PCIE0_CRX_DTX_P PCIE0_CRX_DTX_N
PCIE1_CRX_DTX_P PCIE1_CRX_DTX_N
PCIE2_CRX_DTX_P PCIE2_CRX_DTX_N
PCIE3_CRX_DTX_P PCIE3_CRX_DTX_N PCIE3_CTX_DRX_N PCIE3_CTX_DRX_N_C
U10
U9
T6 T5
T9 T8
P7 P6
U7
P_GPP_RXP0 P_GPP_RXN0
P_GPP_RXP1 P_GPP_RXN1
P_GPP_RXP2 P_GPP_RXN2
P_GPP_RXP3 P_GPP_RXN3
P_ZVDDP
P_GPP_TXP0 P_GPP_TXN0
P_GPP_TXP1 P_GPP_TXN1
P_GPP_TXP2 P_GPP_TXN2
P_GPP_TXP3 P_GPP_TXN3
P_ZVSS/P_RX_ZVDDP
PCIE0_CTX_DRX_P
R1
PCIE0_CTX_DRX_N
R2
PCIE1_CTX_DRX_P
R4
PCIE1_CTX_DRX_N
R3
PCIE2_CTX_DRX_P
N1
PCIE2_CTX_DRX_N
N2 N4
N3
P_ZVSSP_ZVDDP
U6
1 2
CC212 0.1U_0201_16V6-K
1 2
CC213 0.1U_0201_16V6-K
1 2
CC3 0.1U_0201_16V6-K
1 2
CC4 0.1U_0201_16V6-K
1 2
CC5 0.1U_0201_16V6-K
1 2
CC6 0.1U_0201_16V6-K
1 2
CC218 0.1U_0201_16V6-K
1 2
CC219 0.1U_0201_16V6-K
1 2
RC2 196_0201_1%
PCIE0_CTX_DRX_P_C PCIE0_CTX_DRX_N_C
PCIE1_CTX_DRX_P_C PCIE1_CTX_DRX_N_C
PCIE2_CTX_DRX_P_C PCIE2_CTX_DRX_N_C
PCIE3_CTX_DRX_P_CPCIE3_CTX_DRX_P
PCIE0_CTX_DRX_P_C 29 PCIE0_CTX_DRX_N_C 29
PCIE1_CTX_DRX_P_C 37 PCIE1_CTX_DRX_N_C 37
PCIE2_CTX_DRX_P_C 35 PCIE2_CTX_DRX_N_C 35
PCIE3_CTX_DRX_P_C 27PCIE3_CRX_DTX_P27
LAN
CardReader
WLAN
2
PCIE_CTX_GRX_P0_C PCIE_CTX_GRX_N0_C
PCIE_CTX_GRX_P1_C PCIE_CTX_GRX_N1_C
Title
Title
Title
APU PEG/PCIe
APU PEG/PCIe
APU PEG/PCIe
Size
Size
Size
Document Num ber Rev
Document Num ber Rev
Document Num ber Rev
B
B
B
Date: Sheet of
Date: Sheet of
Date: Sheet of
PCIE_CTX_GRX_P0_C 20 PCIE_CTX_GRX_N0_C 20
PCIE_CTX_GRX_P1_C 23 PCIE_CTX_GRX_N1_C 23
WWWOOOLLLVVVEEERRRIIINNNEEE444 AAAMMMDDD
WWWOOOLLLVVVEEERRRIIINNNEEE444 AAAMMMDDD
WWWOOOLLLVVVEEERRRIIINNNEEE444 AAAMMMDDD
Tuesday, May 09, 2017
Tuesday, May 09, 2017
Tuesday, May 09, 2017
1
5 84
5 84
5 84
SIT
SIT
SIT
PCIE_CRX_GTX_P020
M.2 SSD M.2 SSD
B B
A A
5
PCIE_CRX_GTX_N020 PCIE_CRX_GTX_P123
PCIE_CRX_GTX_N123
PCIE_CRX_GTX_P0 PCIE_CRX_GTX_N0
PCIE_CRX_GTX_P1 PCIE_CRX_GTX_N1
4
P10
P_GFX_RXP0
P9
P_GFX_RXN0
N6
P_GFX_RXP1
N5
P_GFX_RXN1
N9
P_GFX_RXP2
N8
P_GFX_RXN2
L7
P_GFX_RXP3
L6
P_GFX_RXN3
L10
P_GFX_RXP4
L9
P_GFX_RXN4
K6
P_GFX_RXP5
K5
P_GFX_RXN5
K9
P_GFX_RXP6
K
8
P_GFX_RXN6
J7
P_GFX_RXP7
J6
P_GFX_RXN7
FP4 REV 0.93
AMD-BRISTOL_FP4-BGA968
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
P_GFX_TXP0 P_GFX_TXN0
P_GFX_TXP1 P_GFX_TXN1
P_GFX_TXP2 P_GFX_TXN2
P_GFX_TXP3 P_GFX_TXN3
P_GFX_TXP4 P_GFX_TXN4
P_GFX_TXP5 P_GFX_TXN5
P_GFX_TXP6 P_GFX_TXN6
P_GFX_TXP7 P_GFX_TXN7
2016/09/29
2016/09/29
2016/09/29
3
PCIE_CTX_GRX_P0
M2
PCIE_CTX_GRX_N0
M1
PCIE_CTX_GRX_P1
L1
PCIE_CTX_GRX_N1
L2 L4
L3 J1
J2 J4
J3 H2
H1 G1
G2 G4
G3
LC Future Center Secret Data
LC Future Center Secret Data
LC Future Center Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
CC214 0.22U_0201_6.3V6-K CC215 0.22U_0201_6.3V6-K
CC216 0.22U_0201_6.3V6-K CC217 0.22U_0201_6.3V6-K
1 2 1 2
1 2 1 2
2014/12/05
2014/12/05
2014/12/05
1
Vinafix.com
2
3
4
5
UC1A
DDR_A_MA0 DDR_A_MA1 DDR_A_MA2 DDR_A_MA3
A A
DDR_A_BG114
DDR_A_ACT_N14
DDR_A_BA014 DDR_A_BA114 DDR_A_BG014
B B
SA_CLK_DDR014
SA_CLK_DDR#014
SA_CLK_DDR114
SA_CLK_DDR#114
DDR4_A_DRAMRST#14
DDR_A_EVENT#14
DDR_A_CKE014 DDR_A_CKE114
C C
+1.2V
12
RC3
@
1K_0402_1%
12
RC5
@
1K_0402_1%
1
CC7
@
0.1U_0402_10V7-K
2
DDR_A_ODT014 DDR_A_ODT114
DDR_A_CS0#14 DDR_A_CS1#14
DDR_A_RAS#14 DDR_A_CAS#14
DDR_A_WE#14
1
2
DDR_A_MA4 DDR_A_MA5 DDR_A_MA6 DDR_A_MA7 DDR_A_MA8 DDR_A_MA9 DDR_A_MA10 DDR_A_MA11 DDR_A_MA12 DDR_A_MA13 DDR_A_BG1 DDR_A_ACT_N
DDR_A_BA0 DDR_A_BA1 DDR_A_BG0
DDRA_MA_DM0 DDRA_MA_DM1 DDRA_MA_DM2 DDRA_MA_DM3 DDRA_MA_DM4 DDRA_MA_DM5 DDRA_MA_DM6 DDRA_MA_DM7
DDR_A_DQS0 DDR_A_DQS#0 DDR_A_DQS1 DDR_A_DQS#1 DDR_A_DQS2 DDR_A_DQS#2 DDR_A_DQS3 DDR_A_DQS#3 DDR_A_DQS4 DDR_A_DQS#4 DDR_A_DQS5 DDR_A_DQS#5 DDR_A_DQS6 DDR_A_DQS#6 DDR_A_DQS7 DDR_A_DQS#7
SA_CLK_DDR0 SA_CLK_DDR#0 SA_CLK_DDR1 SA_CLK_DDR#1
DDR4_A_DRAMRST# DDR_A_EVENT#
DDR_A_CKE0 DDR_A_CKE1
DDR_A_ODT0 DDR_A_ODT1
DDR_A_CS0# DDR_A_CS1#
DDR_A_RAS# DDR_A_CAS# DDR_A_WE#
1
TPC1Test_Point_20MIL
CC8
@
1000P_0402_50V7-K
VREF_DQA
AE28
MA_ADD0
Y2 7
MA_ADD1
Y2 9
MA_ADD2
Y2 6
MA_ADD3
W28
MA_ADD4
W29
MA_ADD5
W26
MA_ADD6
U29
MA_ADD7
W25
MA_ADD8
U26
MA_ADD9
AG29
MA_ADD10
U27
MA_ADD11
T28
MA_ADD12
AK26
MA_ADD13
T26
MA_ADD14/MA_BG1
T25
MA_ADD15/MA_ACT_L
AG26
MA_BANK0
AG27
MA_BANK1
T29
MA_BANK2/MA_BG0
E19
MA_DM0
D21
MA_DM1
K21
MA_DM2
F29
MA_DM3
AP28
MA_DM4
AV26
MA_DM5
AR22
MA_DM6
BC22
MA_DM7
K29
MA_DM8
H19
MA_DQS_H0
G19
MA_DQS_L0
B22
MA_DQS_H1
A22
MA_DQS_L1
F23
MA_DQS_H2
E23
MA_DQS_L2
G27
MA_DQS_H3
F27
MA_DQS_L3
AP25
MA_DQS_H4
AP26
MA_DQS_L4
AW27
MA_DQS_H5
AV27
MA_DQS_L5
AV22
MA_DQS_H6
AU22
MA_DQS_L6
BA21
MA_DQS_H7
AY21
MA_DQS_L7
L27
MA_DQS_H8
L26
MA_DQS_L8
AE25
MA_CLK_H0
AE26
MA_CLK_L0
AD26
MA_CLK_H1
AD27
MA_CLK_L1
AB28
MA_CLK_H2
AB29
MA_CLK_L2
AB25
MA_CLK_H3
AB26
MA_CLK_L3
N29
MA_RESET_L
AE29
MA_EVENT_L
P27
MA_CKE0
P29
MA_CKE1
AK27
MA0_ODT0
AL26
MA0_ODT1
AH25
MA1_ODT0
AL25
MA1_ODT1
AH26
MA0_CS_L0
AL29
MA0_CS_L1
AH29
MA1_CS_L0
AL28
MA1_CS_L1
AG24
MA_RAS_L/MA_RAS_L_ADD16
AK29
MA_CAS_L/MA_CAS_L_ADD15
AH28
MA_WE_L/MA_WE_L_ADD14
B19
MA_VREFDQ
T32
M_VREF
MEMORY A
MA_DATA0 MA_DATA1 MA_DATA2 MA_DATA3 MA_DATA4 MA_DATA5 MA_DATA6 MA_DATA7
MA_DATA8
MA_DATA9 MA_DATA10 MA_DATA11 MA_DATA12 MA_DATA13 MA_DATA14 MA_DATA15
MA_DATA16 MA_DATA17 MA_DATA18 MA_DATA19 MA_DATA20 MA_DATA21 MA_DATA22 MA_DATA23
MA_DATA24 MA_DATA25 MA_DATA26 MA_DATA27 MA_DATA28 MA_DATA29 MA_DATA30 MA_DATA31
MA_DATA32 MA_DATA33 MA_DATA34 MA_DATA35 MA_DATA36 MA_DATA37 MA_DATA38 MA_DATA39
MA_DATA40 MA_DATA41 MA_DATA42 MA_DATA43 MA_DATA44 MA_DATA45 MA_DATA46 MA_DATA47
MA_DATA48 MA_DATA49 MA_DATA50 MA_DATA51 MA_DATA52 MA_DATA53 MA_DATA54 MA_DATA55
MA_DATA56 MA_DATA57 MA_DATA58 MA_DATA59 MA_DATA60 MA_DATA61 MA_DATA62 MA_DATA63
MA_CHECK0 MA_CHECK1 MA_CHECK2 MA_CHECK3 MA_CHECK4 MA_CHECK5 MA_CHECK6 MA_CHECK7
MA_ZVDDIO_MEM_S
FP4 REV 0.93
AMD-BRISTOL_FP4-BGA968
H17 J17 F20 H20 E17 F17 K18 E20
A21 C21 C23 D23 B20 B21 B23 A23
G22 H22 E25 G25 J20 E22 H23 J23
F26 E27 J26 J27 H25 E26 G28 G29
AN26 AP29 AR26 AP24 AN29 AN27 AR29 AR27
AU26 AV29 AU25 AW25 AU29 AU28 AW26 AT25
AV23 AW23 AV20 AW20 AR23 AT23 AR20 AT20
BB23 BB22 BB20 AY19 BA23 BC23 BC21 BB21
K26 K28 N26 N28 J29 K25 L29 N25
AD29
DDR_A_D0 DDR_A_D1 DDR_A_D2 DDR_A_D3 DDR_A_D4 DDR_A_D5 DDR_A_D6 DDR_A_D7
DDR_A_D8 DDR_A_D9 DDR_A_D10 DDR_A_D11 DDR_A_D12 DDR_A_D13 DDR_A_D14 DDR_A_D15
DDR_A_D16 DDR_A_D17 DDR_A_D18 DDR_A_D19 DDR_A_D20 DDR_A_D21 DDR_A_D22 DDR_A_D23
DDR_A_D24 DDR_A_D25 DDR_A_D26 DDR_A_D27 DDR_A_D28 DDR_A_D29 DDR_A_D30 DDR_A_D31
DDR_A_D32 DDR_A_D33 DDR_A_D34 DDR_A_D35 DDR_A_D36 DDR_A_D37 DDR_A_D38 DDR_A_D39
DDR_A_D40 DDR_A_D41 DDR_A_D42 DDR_A_D43 DDR_A_D44 DDR_A_D45 DDR_A_D46 DDR_A_D47
DDR_A_D48 DDR_A_D49 DDR_A_D50 DDR_A_D51 DDR_A_D52 DDR_A_D53 DDR_A_D54 DDR_A_D55
DDR_A_D56 DDR_A_D57 DDR_A_D58 DDR_A_D59 DDR_A_D60 DDR_A_D61 DDR_A_D62 DDR_A_D63
MA_ZVDDIO
RC4 39.2_0402_1%
12
DDRA_MA_DM[0..7] 14 DDR_A_DQS#[0..7] 14 DDR_A_DQS[0..7] 14 DDR_A_D[0..63] 14 DDR_A_MA[0..13] 14
+1.2V
D D
Title
Title
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
1
2
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
2016/09/29
2016/09/29
2016/09/29
LC Future Center Secret Data
LC Future Center Secret Data
LC Future Center Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
3
2014/07/01
2014/07/01
2014/07/01
4
Title
APU DDRA/1
APU DDRA/1
APU DDRA/1
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
WWWOOOLLLVVVEEERRRIIINNNEEE444 AAAMMMDDD
WWWOOOLLLVVVEEERRRIIINNNEEE444 AAAMMMDDD
WWWOOOLLLVVVEEERRRIIINNNEEE444 AAAMMMDDD
Tuesday, May 09, 2017
Tuesday, May 09, 2017
Tuesday, May 09, 2017
5
6 84
6 84
6 84
SIT
SIT
SIT
1
Vinafix.com
2
3
4
5
UC1I
A A
B B
C C
AG31
MB_ADD0
AC30
MB_ADD1
AC31
MB_ADD2
AB32
MB_ADD3
AA32
MB_ADD4
AA33
MB_ADD5
AA31
MB_ADD6
Y3 3
MB_ADD7
AA30
MB_ADD8
W32
MB_ADD9
AG32
MB_ADD10
Y3 2
MB_ADD11
W33
MB_ADD12
AL31
MB_ADD13
W30
MB_ADD14/MB_BG1
V32
MB_ADD15/MB_ACT_L
AH32
MB_BANK0
AG33
MB_BANK1
W31
MB_BANK2/MB_BG0
D25
MB_DM0
D29
MB_DM1
E33
MB_DM2
J33
MB_DM3
AR30
MB_DM4
AW30
MB_DM5
BC30
MB_DM6
BC26
MB_DM7
N33
MB_DM8
B26
MB_DQS_H0
A26
MB_DQS_L0
B30
MB_DQS_H1
A30
MB_DQS_L1
F32
MB_DQS_H2
E32
MB_DQS_L2
K32
MB_DQS_H3
J32
MB_DQS_L3
AR32
MB_DQS_H4
AR33
MB_DQS_L4
AW32
MB_DQS_H5
AW33
MB_DQS_L5
BA29
MB_DQS_H6
AY29
MB_DQS_L6
BA25
MB_DQS_H7
AY25
MB_DQS_L7
P32
MB_DQS_H8
N32
MB_DQS_L8
AE33
MB_CLK_H0
AE32
MB_CLK_L0
AE30
MB_CLK_H1
AE31
MB_CLK_L1
AD32
MB_CLK_H2
AD33
MB_CLK_L2
AC33
MB_CLK_H3
AC32
MB_CLK_L3
T33
MB_RESET_L
AG30
MB_EVENT_L
U32
MB_CKE0
U33
MB_CKE1
AL30
MB0_ODT0
AM32
MB0_ODT1
AJ32
MB1_ODT0
AM33
MB1_ODT1
AJ33
MB0_CS_L0
AL32
MB0_CS_L1
AJ30
MB1_CS_L0
AL33
MB1_CS_L1
AH33
MB_RAS_L/MB_RAS_L_ADD16
AK32
MB_CAS_L/MB_CAS_L_ADD15
AJ31
MB_WE_L/MB_WE_L_ADD14
A19
MB_VREFDQ
MEMORY B
MB_ZVDDIO_MEM_S
FP4 REV 0.93
AMD-BRISTOL_FP4-BGA968
MB_DATA0 MB_DATA1 MB_DATA2 MB_DATA3 MB_DATA4 MB_DATA5 MB_DATA6 MB_DATA7
MB_DATA8
MB_DATA9 MB_DATA10 MB_DATA11 MB_DATA12 MB_DATA13 MB_DATA14 MB_DATA15
MB_DATA16 MB_DATA17 MB_DATA18 MB_DATA19 MB_DATA20 MB_DATA21 MB_DATA22 MB_DATA23
MB_DATA24 MB_DATA25 MB_DATA26 MB_DATA27 MB_DATA28 MB_DATA29 MB_DATA30 MB_DATA31
MB_DATA32 MB_DATA33 MB_DATA34 MB_DATA35 MB_DATA36 MB_DATA37 MB_DATA38 MB_DATA39
MB_DATA40 MB_DATA41 MB_DATA42 MB_DATA43 MB_DATA44 MB_DATA45 MB_DATA46 MB_DATA47
MB_DATA48 MB_DATA49 MB_DATA50 MB_DATA51 MB_DATA52 MB_DATA53 MB_DATA54 MB_DATA55
MB_DATA56 MB_DATA57 MB_DATA58 MB_DATA59 MB_DATA60 MB_DATA61 MB_DATA62 MB_DATA63
MB_CHECK0 MB_CHECK1 MB_CHECK2 MB_CHECK3 MB_CHECK4 MB_CHECK5 MB_CHECK6 MB_CHECK7
A25 C25 C27 D27 B24 B25 B27 A27
A29 C29 B32 D32 B28 B29 A31 C31
E30 E31 G33 G32 C33 D33 G30 G31
J30 J31 L33 L32 H32 H33 L30 L31
AN31 AP32 AT32 AU32 AN33 AN32 AR31 AT33
AU30 AV32 BA33 AY32 AU33 AU31 AW31 AY33
BC31 BB30 BB28 AY27 BB32 BA31 BC29 BB29
BB27 BB26 BB24 AY23 BA27 BC27 BC25 BB25
N30 N31 R33 R32 M32 M33 R30 R31
AF32
D D
Title
Title
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
1
2
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
2016/09/29
2016/09/29
2016/09/29
LC Future Center Secret Data
LC Future Center Secret Data
LC Future Center Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
3
2014/07/01
2014/07/01
2014/07/01
4
Title
APU DDRB/2
APU DDRB/2
APU DDRB/2
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
WWWOOOLLLVVVEEERRRIIINNNEEE444 AAAMMMDDD
WWWOOOLLLVVVEEERRRIIINNNEEE444 AAAMMMDDD
WWWOOOLLLVVVEEERRRIIINNNEEE444 AAAMMMDDD
Tuesday, May 09, 2017
Tuesday, May 09, 2017
Tuesday, May 09, 2017
5
7 84
7 84
7 84
SIT
SIT
SIT
1
Vinafix.com
APU_MUX_TX0+21
APU_MUX_TX0-21
APU_MUX_TX1+21
A A
HDMI
DDI1 to TYPE C
eDP
APU_SVT77
APU_SVC77
B B
+1.8VS
1 2
RC31 300_0201_5%
1 2
RC32 300_0201_5%
APU_RESET#
1
CC9
@
0.1U_0201_16V6-K
+1.8VS
+1.8VS
2
H_PROCHOT#52
RPC1
1 8 2 7 3 6 4 5
1K_0804_8P4R_5%
RPC2
1 8 2 7 3 6 4 5
1K_0804_8P4R_5%
1
APU_TDI APU_TMS APU_TCK APU_TRST#
APU_SIC APU_SID APU_ALERT# APU_PROCHOT#
C C
D D
APU_SVD77
APU_GFX_SVT78 APU_GFX_SVC78 APU_GFX_SVD78
APU_RESET# APU_PWROK
APU_PWROK
1
CC10
@
0.1U_0201_16V6-K
2
1 2
RC48 0_0201_SM
APU_SVT APU_SVC APU_SVD
APU_GFX_SVT APU_GFX_SVC APU_GFX_SVD
Cap close to JHDT.9
APU_MUX_TX1-21
APU_MUX_TX2+21
APU_MUX_TX2-21
APU_MUX_TX3+21
APU_MUX_TX3-21
APU_DP1_TXP034 APU_DP1_TXN034
APU_DP1_TXP134 APU_DP1_TXN134
APU_DP1_TXP234 APU_DP1_TXN234
APU_DP1_TXP334 APU_DP1_TXN334
APU_EDP_TX0+19
APU_EDP_TX0-19
APU_EDP_TX1+19
APU_EDP_TX1-19
1 2
RC21 0_0201_SM
1 2
RC23 33_0201_5%
1 2
RC25 33_0201_5%
1 2
RC27 0_0201_SM
1 2
RC28 33_0201_5%
1 2
RC29 33_0201_5%
APU_TRST#
+3VS
12
APU_PWROK77
1
CC11
0.01U_0201_25V7-K
2
RC47 10K_0201_5%
2
APU_MUX_TX0+ APU_MUX_TX0-
APU_MUX_TX1+ APU_MUX_TX1-
APU_MUX_TX2+ APU_MUX_TX2-
APU_MUX_TX3+ APU_MUX_TX3-
APU_DP1_TXP0 APU_DP1_TXN0
APU_DP1_TXP1 APU_DP1_TXN1
APU_DP1_TXP2 APU_DP1_TXN2
APU_DP1_TXP3 APU_DP1_TXN3
APU_EDP_TX0+ APU_EDP_TX0-
APU_EDP_TX1+ APU_EDP_TX1-
APU_SVT_R APU_SVC_R APU_SVD_R
APU_GFX_SVT_R APU_GFX_SVC_R APU_GFX_SVD_R
APU_SIC APU_SID
APU_RESET# APU_PWROK
APU_PROCHOT# APU_ALERT#
APU_TDI APU_TDO APU_TCK APU_TMS APU_TRST# APU_DBRDY APU_DBREQ#
1 2
RC42 33_0201_5%HDT@
RP1
1 8 2 7 3 6 4 5
HDT@
10K_0804_8P4R_5%
+1.8VS
12
RC46 10K_0201_5%
B
2
E
APU_PROCHOT#H_PROCHOT# H_PROCHOT#_R
3 1
C
QC7 MLMBT3904WT1G NPN SOT323-3
2
C15 D17 D19
B15 B16 A18
B18 C17
D15 C19
A15 B17
H15 H14 D13 G15
J14 C13 A11
B6 A6
D7 C7
A7 B7
D9 C9
A2 A3
B4 A4
D5 C5
A5 B5
E2 E1
E3 E4
D1 D2
C1 B1
UC1C
DP2_TXP0 DP2_TXN0
DP2_TXP1 DP2_TXN1
DP2_TXP2 DP2_TXN2
DP2_TXP3 DP2_TXN3
DP1_TXP0 DP1_TXN0
DP1_TXP1 DP1_TXN1
DP1_TXP2 DP1_TXN2
DP1_TXP3 DP1_TXN3
DP0_TXP0 DP0_TXN0
DP0_TXP1 DP0_TXN1
DP0_TXP2 DP0_TXN2
DP0_TXP3 DP0_TXN3
SVT0 SVC0 SVD0
SVT1 SVC1 SVD1
SIC SID
RESET_L PWROK
PROCHOT_L ALERT_L
TDI TDO TCK TMS TRST_L DBRDY DBREQ_L
+1.8VS
DISPLAY/SVI2/JTAG/TEST
DP_STEREOSYNC/TEST36
VDDCR_GFX_SENSE
VDDCR_NB_SENSE
VDDCR_CPU_SENSE
FP4 REV 0.93
AMD-BRISTOL_FP4-BGA968
JHDT1
1
1
2
3
3
4
5
5
6
7
7
8
9
9
10
11
11
12
13
13
14
15
15
16
17
17
18
19
19
20
HDT@
SAMTE_ASP-136446-07-B
A9
DP_ZVSS
DP_AUX_ZVSS
TEMPINRETURN
VDDP_SENSE
2 4 6 8 10 12 14 16 18 20
B9 G5
DP_BLON
G6
DP_DIGON
F11
DP_VARY_BL
H9
DP2_AUXP
G9
DP2_AUXN
E9
DP2_HPD
F7
DP1_AUXP
E7
DP1_AUXN
F5
DP1_HPD
F8
DP0_AUXP
E8
DP0_AUXN
G8
DP0_HPD
K24
RSVD_1
E15
TEMPIN0
E14
TEMPIN1
E12
TEMPIN2
F14 AK24
TEST410
AL24
TEST411
P24
TEST4
N24
TEST5
AN24
TEST6
AB8
TEST9
Y9
TEST10
B10
TEST14
D11
TEST15
A10
TEST16
C11
TEST17
B11
TEST11
A14
TEST18
B14
TEST19
A13
TEST28_H
B13
TEST28_L
P26
TEST31
E11 A17
TEST37
H11 J12 G12 AY18
H12
VSS_SENSE
APU_TCK APU_TMS
1 2
RC41 0_0201_SM
APU_TDO APU_PWROK APU_RESET# APU_DBRDY
1 2
RC45 33_0201_5%HDT@
APU_TEST19 APU_TEST18
3
DP_ZVSS DP_AUX_ZVSS APU_ENBKL_R APU_ENVDD APU_EDP_PWM_R
APU_HDMI_CLK APU_HDMI_DAT APU_HDMI_HPD
APU_DP1_AUXP APU_DP1_AUXN DDIP1_HPD
APU_EDP_AUX APU_EDP_AUX# APU_EDP_HPD
APU_TEST410 APU_TEST411 APU_TEST4 APU_TEST5 APU_TEST6 APU_TEST9 APU_TEST10 APU_TEST14 APU_TEST15 APU_TEST16 APU_TEST17 APU_TEST11 APU_TEST18 APU_TEST19
APU_TEST28_H APU_TEST28_L APU_TEST31 DP_STEREOSYNC APU_TEST37
VDDCR_GFX_SENSE VDDNB_SENSE VDD_SENSE VDDP_SENSE
VSS_SENSE
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXC EPT AS AUTHORI ZED BY LC FUTURE CE NTER NEITHER THIS SHEET NOR THE I NFORMATION IT CONTAINS
DEPARTMENT EXC EPT AS AUTHORI ZED BY LC FUTURE CE NTER NEITHER THIS SHEET NOR THE I NFORMATION IT CONTAINS
DEPARTMENT EXC EPT AS AUTHORI ZED BY LC FUTURE CE NTER NEITHER THIS SHEET NOR THE I NFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
3
1 2
RC8 2K_0201_1%
1 2
RC9 150_0201_1%
APU_ENVDD 19
APU_HDMI_CLK 21 APU_HDMI_DAT 21 APU_HDMI_HPD 21
APU_DP1_AUXP 34 APU_DP1_AUXN 34 DDIP1_HPD 33,34
APU_EDP_AUX 19 APU_EDP_AUX# 19 APU_EDP_HPD 19
1 2
RC11 1K_0201_1%@
1 2
RC16 1K_0201_1%@
1 2
RC17 1K_0201_1%@
1 2
RC18 1K_0201_1%@
1 2
RC20 1K_0201_1%
1 2
RC22 1K_0201_1%
Test_Point_12MIL
TPC13
1
1 2
RC33 0_0201_SM
APU_TDI
APU_DBREQ#
1
2
Cap close to JHDT.16
CC12
HDT@
0.01U_0201_25V7-K
1
TPC2Test_Point_12MIL
1
TPC3Test_Point_12MIL
1
TPC4Test_Point_12MIL
1
TPC5Test_Point_12MIL
1
TPC6Test_Point_12MIL
1
TPC7Test_Point_12MIL
1
TPC8Test_Point_12MIL
1
TPC9Test_Point_12MIL
1
TPC10Test_Point_12MIL
1
TPC11Test_Point_12MIL
1
TPC12Test_Point_12MIL
Test_Point_12MIL
TPC14
TPC15
1
1
1
TPC16Test_Point_12MIL
+1.8VS
12
RC43 1K_0201_1%
A. Vth = 1.5V (MAX) B. Id = 200mA C. RDSon = 10 ohm(MAX) D. Vth in schematic = 0 - 1.8V
2016/09/29
2016/09/29
2016/09/29
Test_Point_12MIL
VDDCR_GFX_SENSE 78 VDDNB_SENSE 77 VDD_SENSE 77
VSS_SENSE 77 GFX_VSS_SENSE 78
APU_SIC
APU_SID
LC Future Center Secret Data
LC Future Center Secret Data
LC Future Center Secret Data
APU_ENBKL_R
APU_EDP_PWM_R
+1.8VS
G
S
QC5 LBSS138LT1G_SOT-23-3
Deciphered Date
Deciphered Date
Deciphered Date
4
12
12
12
RC44 1K_0201_1%
2
4
RC13
1 2
2.2K_0201_5%
RC14
@
100K_0201_5%
RC26
1 2
2.2K_0201_5%
RC30
@
4.7K_0201_5%
13
D
@
@
2014/07/01
2014/07/01
2014/07/01
12
RC10
@
100K_0201_5%
C
2
QC1
B
MLMBT3904WT1G NPN SOT323-3
E
3 1
SB000010U00
IB = 1.8V / 2.2K = 0.0008A IB * Hfe = 0.0008 * 120 = 0.096A IC = (Vc-Vce(sat)) / Rc = (3.3-0.25) / 100000 = 0.00000305 IB * Hfe > IC --- 飽 和 區 (OK)
12
RC6
@
47K_0201_5%
C
2
QC4
B
MLMBT3904WT1G NPN SOT323-3
E
SB000010U00
3 1
IB = 1.8V / 2.2K = 0.0008A IB * Hfe = 0.0008 * 120 = 0.096A IC = (Vc-Vce(sat)) / Rc = (3.3-0.25) / 47000 = 0.000065 IB * Hfe > IC --- 飽 和 區 (OK)
APU_ENBKL_R
APU_EDP_PWM_R
DP_STEREOSYNC APU_TEST37 APU_TEST31
EC_SMB_CK3
G
2
EC_SMB_DA3
13
D
S
QC6 LBSS138LT1G_SOT-23-3
A. Vth = 1.5V (MAX) B. Id = 200mA C. RDSon = 10 ohm(MAX) D. Vth in schematic = 0 - 1.8V
5
+3VS
12
RC7
@
2.2K_0201_5%
1 2
RC12 0_0201_5%@
13
A. Vth = 2.5V (MAX)
D
2
G
@
2
@
B. Id = 340 mA (MAX) C. RDSon = 2.5 ohm(MAX)
QCC1
D. Vth in schematic = 3.3V
@
S
2N7002WT1G_SC-70-3
+3VS
12
RC15
@
4.7K_0201_5%
13
D
QC3
@
2N7002WT1G_1N_SC-70-3
A. Vth = 2.5V (MAX)
G
B. Id = 340 mA (MAX)
S
C. RDSon = 2.5 ohm(MAX) D. Vth in schematic = 3.3V
+3VS
UC8
1
5
OE
VCC
2
A
4
ENBKL
GND3Y
SN74LV1T125DCKR_SC70-5
+3VS
UC9
1
5
OE
VCC
2
A
PANEL_BKLT_CTRL
4
GND3Y
SN74LV1T125DCKR_SC70-5
+1.8VS
12
12
EC_SMB_CK3 49,52,54
EC_SMB_DA3 49,52,54
Title
Title
Title
APU DISPLAY/CLK/MISC
APU DISPLAY/CLK/MISC
APU DISPLAY/CLK/MISC
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
12
RC34
@
1K_0201_1%
RC38
@
1K_0201_1%
RC35 1K_0201_1%
12
RC39
@
1K_0201_1%
WWWOOOLLLVVVEEERRRIIINNNEEE444 AAAMMMDDD
WWWOOOLLLVVVEEERRRIIINNNEEE444 AAAMMMDDD
WWWOOOLLLVVVEEERRRIIINNNEEE444 AAAMMMDDD
Tuesday, May 09, 2017
Tuesday, May 09, 2017
Tuesday, May 09, 2017
ENBKL 5 2
PANEL_BKLT_CTRL 19
12
RC36
@
39.2_0402_1%
12
RC40
@
39.2_0402_1%
8 84
8 84
5
8 84
SIT
SIT
SIT
+3VS
Vinafix.com
RC58 10K_0201_5%@ RC71 10K_0201_5% RC72 10K_0201_5%@ RC73 10K_0201_5%
D D
C C
RC75 2K_0201_1% CC13 10P_0201_50V8-DEMC_NS@
B B
+1.8V_SPI
RC77 10K_0201_5%
+1.8VS
A A
1
CC15 10P_0201_50V8-D
2
5
1 2 1 2 1 2 1 2
SATA_CTX_DRX_P020 SATA_CTX_DRX_N020
HDD
LAN
CR
WLAN
WWAN
1 2
1 2
RC78 1M_0201_5%
1
SATA_CRX_DTX_N020 SATA_CRX_DTX_P020
12
RPC3
1 8 2 7 3 6 4 5
10K_0804_8P4R_5%
1 2
YC 1
OSC1
NC2
NC12OSC2
48MHZ_10PF_7V48000017
5
HDD_DEVSLP0 LPC_FRAME# PM_CLKRUN# LPC_CLK1
CLK_PCIE_WLAN35
CLK_PCIE_WLAN#35
CLK_PCIE_WWAN36
CLK_PCIE_WWAN#36
CLK_PCIE_SSD24
CLK_PCIE_SSD#24
CLK_PCIE_LAN29
CLK_PCIE_LAN#29
CLK_PCIE_CR37
CLK_PCIE_CR#37
CLK_PCI_EC
SATA_CTX_DRX_P0 APU_SATA_CTX_DRX_P0 SATA_CTX_DRX_N0
SATA_CRX_DTX_N0 SATA_CRX_DTX_P0
+1.05VS_VDDP
HDD_DEVSLP024
CLK_PCI_EC52
CC220 0.01U_0201_25V6-K CC221 0.01U_0201_25V6-K
CC222 0.01U_0201_25V6-K CC223 0.01U_0201_25V6-K
CLK_PCIE_SSD
CLK_PCIE_LAN CLK_PCIE_LAN#
CLK_PCIE_CR CLK_PCIE_CR#
CLK_PCIE_WLAN CLK_PCIE_WLAN#
CLK_PCIE_WWAN CLK_PCIE_WWAN#
8MB(64Mb)
SPI_CS1# SPI_IO3 SPI_IO2
SPI_CS2#
X48M_X1 X48M_X2
12
RC433
4 3
0_0201_SM
1
CC16 10P_0201_50V8-D
2
4
1 2 1 2
1 2 1 2
1 2
1 2 1 2
1 2 1 2
1 2 1 2
1 2 1 2
1 2 1 2
1 2
LPC_AD052 LPC_AD152 LPC_AD252 LPC_AD352
SERIRQ52
SPI_CLK50
SPI_SO50
SPI_SI50
SPI_CLK
1
CC229
RF@
39P_0201_50V9-J
2
4
12
12
RC76 10K_0201_5%@
RC56 1K_0201_1% RC57 1K_0201_1%
RC60 10K_0201_5%
RC423 0_0201_SM RC424 0_0201_SM
RC63 0_0201_SM RC64 0_0201_SM
RC65 0_0201_SM RC66 0_0201_SM
RC67 0_0201_SM RC68 0_0201_SM
RC427 0_0201_SM RC428 0_0201_SM
RC74 22_0201_5%EMC@
LPC_FRAME#52
SPI_CS2#_TPM50
APU_SATA_CTX_DRX_N0 APU_SATA_CRX_DTX_N0
APU_SATA_CRX_DTX_P0
SATA_ZVSS SATA_ZVDDP HDD_DEVSLP0
CLK_PCIE_SSD_R CLK_PCIE_SSD#_RCLK_PCIE_SSD#
CLK_PCIE_LAN_R CLK_PCIE_LAN#_R
CLK_PCIE_CR_R CLK_PCIE_CR_R#
CLK_PCIE_WLAN_R CLK_PCIE_WLAN#_R
CLK_PCIE_WWAN_R CLK_PCIE_WWAN#_R
X48M_X1
X48M_X2
LPC_CLK0 LPC_CLK1
LPC_AD0 LPC_AD1 LPC_AD2 LPC_AD3 LPC_FRAME#
SERIRQ
PM_CLKRUN#
2
1
SPI_CLK SPI_CS1# SPI_CS2# SPI_SO SPI_SI SPI_IO2 SPI_IO3 SPI_CS2#_TPM
1
CC230
RF@
27P_0201_25V8-J
2
UC1E
AU3
SATA_TX0P
AU4
SATA_TX0N
AV1
SATA_RX0N
AV2
SATA_RX0P
AY2
SATA_TX1P
AY1
SATA_TX1N
AW4
SATA_RX1N
AW3
SATA_RX1P
AW1
SATA_ZVSS
AW2
SATA_ZVDDP
AT17
DEVSLP0/EGPIO67
AT12
DEVSLP1/EGPIO70
BB15
SATA_ACT_L/AGPIO130
AU2
SATA_X1
AU1
SATA_X2
U4
GFX_CLKP
U3
GFX_CLKN
U1
GPP_CLK0P
U2
GPP_CLK0N
W4
GPP_CLK1P
W3
GPP_CLK1N
W1
GPP_CLK2P
W2
GPP_CLK2N
Y2
GPP_CLK3P
Y1
GPP_CLK3N
BC10
X25M_48M_OSC
T2
X48M_X1
T1
X48M_X2
AW14
LPCCLK0/EGPIO74
AY13
LPCCLK1/EGPIO75
BB11
LAD0
BA11
LAD1
AY11
LAD2
BA13
LAD3
AV14
LFRAME_L
BA1
ESPI_ALERT_L/LDRQ0_L
BC14
SERIRQ/AGPIO87
BC11
LPC_CLKRUN_L/AGPIO88
AE9
LPC_PD_L/AGPIO21
BC6
SPI_CLK/ESPI_CLK/EGPIO117
BB8
SPI_CS1_L/EGPIO118
AW7
SPI_CS2_L/ESPI_CS_L/EGPIO119
BA9
SPI_DI/ESPI_DATA/EGPIO120
AY7
SPI_DO/EGPIO121
AW11
SPI_WP_L/EGPIO122
BA7
SPI_HOLD_L/EGPIO133
AW12
SPI_TPM_CS_L/AGPIO76
SPI_SO SPI_IO2
SPI_CS1# SPI_SI SPI_SO SPI_CLK
Security Classification
Security Classification
Security Classification
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF LC FUT URE CENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF LC FUT URE CENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF LC FUT URE CENTER.
3
USB Port Assignment
0 USB 3.0 System Port (AOU)
CLK/SATA/USB/SPI/LPC
UC8M1
1
/CS
2
DO(IO1)
3
/WP(IO2)
4
GND
S IC FL 128M W25Q128FWSIQ SOIC 8P 1.8V
1 2
RC412 0_0201_SM
1 2
RC413 0_0201_SM
1 2
RC414 0_0201_SM
1 2
RC415 0_0201_SM
Issued Date
Issued Date
Issued Date
3
USBCLK/25M_48M_OSC
FP4 REV 0.93
AMD-BRISTOL_FP4-BGA968
/HOLDor/RESET(IO3)
VCC
CLK
DI(IO0)
USB_SS_ZVSS
USB_SS_ZVDDP
USB_SS_0TXP USB_SS_0TXN
USB_SS_0RXP USB_SS_0RXN
USB_SS_1TXP USB_SS_1TXN
USB_SS_1RXP USB_SS_1RXN
USB_SS_2TXP USB_SS_2TXN
USB_SS_2RXP USB_SS_2RXN
USB_SS_3TXP USB_SS_3TXN
USB_SS_3RXP USB_SS_3RXN
2016/09/29
2016/09/29
2016/09/29
USB_ZVSS
USB_HSD0P USB_HSD0N
USB_HSD1P USB_HSD1N
USB_HSD2P USB_HSD2N
USB_HSD3P USB_HSD3N
USB_HSD4P USB_HSD4N
USB_HSD5P USB_HSD5N
USB_HSD6P USB_HSD6N
USB_HSD7P USB_HSD7N
8 7 6 5
EC_SPI_CS1# EC_SPI_SI EC_SPI_SO EC_SPI_CLK
AP8
USB_ZVSS
AP5
USB20_P0
AR2
USB20_N0
AR1
USB20_P1
AR3
USB20_N1
AR4
USB20_P2
AN2
USB20_N2
AN1
USB20_P3_HUB
AN3
USB20_N3_HUB
AN4
USB20_P4
AM1
USB20_N4
AM2
USB20_P5_AOU
AL2
USB20_N5_AOU
AL1
USB20_P6
AL3
USB20_N6
AL4 AK2
AJ2
USB_SS_ZVSS
AD2
USB_SS_ZVDDP
AD1
USB3P0_TXP
AA3
USB3P0_TXN
AA4
USB3P0_RXP
W9
USB3P0_RXN
W8
USB3P1_TXP
AA2
USB3P1_TXN
AA1
USB3P1_RXP
W5
USB3P1_RXN
W6
USB3P2_TXP
AC1
USB3P2_TXN
AC2
USB3P2_RXP
Y6
USB3P2_RXN
Y7 AC4
AC3 AB5
AB6
0.085 A
+1.8V_SPISPI_CS1# SPI_IO3 SPI_CLK SPI_SI
+1.8V_SPI
EC_SPI_CS1# 52 EC_SPI_SI 52 EC_SPI_SO 52 EC_SPI_CLK 52
LC Future Center Secret Data
LC Future Center Secret Data
LC Future Center Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
1 2
RC55 11.8K_0402_1%
USB20_P0 19 USB20_N0 19
USB20_P1 36 USB20_N1 36
USB20_P2 19 USB20_N2 19
USB20_P3_HUB 16 USB20_N3_HUB 16
USB20_P4 28 USB20_N4 28
USB20_P5_AOU 26 USB20_N5_AOU 26
USB20_P6 33 USB20_N6 33
1 2
RC69 1K_0201_1% RC70 1K_0201_1%
USB3P0_TXP 28 USB3P0_TXN 28
USB3P0_RXP 28 USB3P0_RXN 28
USB3P1_TXP 25 USB3P1_TXN 25
USB3P1_RXP 25 USB3P1_RXN 25
USB3P2_TXP 34 USB3P2_TXN 34
USB3P2_RXP 34 USB3P2_RXN 34
1
CC14
0.1U_0201_16V6-K
2
2014/07/01
2014/07/01
2014/07/01
2
T o u c h Pane l
M.2 WWAN SLOT
USB Camera
USB HUB ( 1 f o r 3: FP/ SM card/ BT )
USB 3 .0 S y s t e m Por t (3rd P o rt)
USB 3 .0 S y s t e m Por t (AOU)
TYPE-C
12
+1.05VALW_VDDP
USB 3 .0 S y s t e m Por t (3rd P o rt)
USB 3 .0 S y s t e m Por t (AOU)
TYPE-C
Title
Title
Title
APU SATA/USB/LPC/SPI
APU SATA/USB/LPC/SPI
APU SATA/USB/LPC/SPI
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
WWWOOOLLLVVVEEERRRIIINNNEEE444 AAAMMMDDD
WWWOOOLLLVVVEEERRRIIINNNEEE444 AAAMMMDDD
WWWOOOLLLVVVEEERRRIIINNNEEE444 AAAMMMDDD
Tuesday, May 09, 2017
Tuesday, May 09, 2017
Tuesday, May 09, 2017
1
SIT
SIT
9 84
9 84
1
9 84
SIT
5
Vinafix.com
4
3
2
1
X32K_X1
X32K_X2
PM_SLP_S3# PM_SLP_S5#
RSMRST# PBTN_OUT#
BB12
AY15 BC19
BB13
BC15 BB17 BC17 BB18 BB16
BB10
RTCCLK
12
RC434 0_0201_SM
1
CC21 18P_0201_25V9-J
2
UC1D
LPC_RST_L
AN7
PCIE_RST_L/EGPIO26
AE4
RSMRST_L
AE1
PWR_BTN_L/AGPIO0
BC9
PWR_GOOD
AF2
SYS_RESET_L/AGPIO1
AG2
WAKE_L/AGPIO2
AK7
SLP_S3_L
AH5
SLP_S5_L
AE8
S0A3_GPIO/AGPIO10
AH8
S5_MUX_CTRL/EGPIO42
AH6
TEST0
AK8
TEST1/TMS
AE3
TEST2 ESPI_RESET_L/KBRST_L/AGPIO129
GA20IN/AGPIO126
AD7
LPC_PME_L/AGPIO22 LPC_SMI_L/AGPIO86
AG3
AC_PRES/USB_OC4_L/IR_RX0/AGPIO23
AD5
IR_TX0/USB_OC5_L/AGPIO13
AL8
IR_TX1/USB_OC6_L/AGPIO14
AN8
IR_RX1/AGPIO15
AE2
IR_LED_L/LLB_L/AGPIO12 CLK_REQ0_L/SATA_IS0_L/SATA_ZP0_L/AGPIO92 CLK_REQ1_L/AGPIO115 CLK_REQ2_L/AGPIO116 CLK_REQ3_L/SATA_IS1_L/SATA_ZP1_L/EGPIO131 CLK_REQG_L/OSCIN/EGPIO132
AH9
USB_OC0_L/TRST_L/AGPIO16
AG1
USB_OC1_L/TDI/AGPIO17
AH2
USB_OC2_L/TCK/AGPIO18
AL9
USB_OC3_L/TDO/AGPIO24
AU6
AZ_BITCLK/I2S_BCLK_MIC
AR8
AZ_SDIN0/I2S_DATA_MIC0
AP6
AZ_SDIN1/I2S_LR_PLAYBACK
AR5
AZ_SDIN2/I2S_DATA_MIC1
AU9
AZ_RST_L/I2S_LR_MIC
AT9
AZ_SYNC/I2S_BCLK_PLAYBACK
AR7
AZ_SDOUT/I2S_DATA_PLAYBACK I2C0_SCL/EGPIO145
BB9
I2C0_SDA/EGPIO146
BB7
I2C1_SCL/EGPIO147
BC7
I2C1_SDA/EGPIO148
AG7
RTCCLK
AT1
X32K_X1
AT2
X32K_X2
ACPI/SD/AZ/GPIO/RTC/I 2C/UA RT/MIS C
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
SD0_WP/EGPIO101
SD0_PWR_CT RL/AGPIO102
SD0_CD/AGPIO25
SD0_CLK/EGPIO95
SD0_CMD/EGPIO96
SD0_DATA0/EGPIO97 SD0_DATA1/EGPIO98 SD0_DATA2/EGPIO99
SD0_DATA3/EGPIO100
SD0_LED/EGPIO93
SCL0/I2C2_SCL/EGPIO113
SDA0/I2C2_SDA/EGPIO114
SCL1/I2C3_SCL/AGPIO19 SDA1/I2C3_SDA/AGPIO20
AGPIO6/LDT_RST_L
AGPIO7/LDT_PWROK
VDDGFX_PD/AGPIO39
AGPIO66/SHUTDOWN_L
AGPIO68/SGPIO_CLK
AGPIO69/SGPIO_LOAD
AGPIO71/SGPIO_DATAOUT
AGPIO72/SGPIO_DATAIN
SPKR/AGPIO91
BLINK/USB_OC7_L/AGPIO11
GENINT1_L/AGPIO89 GENINT2_L/AGPIO90
FANIN0/AGPIO84
FANOUT0/AGPIO85
UART0_CTS_L/EGPIO135
UART0_RXD/EGPIO136
UART0_RTS_L/EGPIO137
UART0_TXD/EGPIO138
UART1_CTS_L/BT_I2S_BCLK/EGPIO140
UART1_INTR/BT_I2S_LRCLK/AGPIO144
FP4 REV 0.93
UART0_INTR/AGPIO139
UART1_RXD/BT_I2S_SDI/EGPIO141
UART1_RTS_L/EGPIO142
UART1_TXD/BT_I2S_SDO/EGPIO143
AMD-BRISTOL_FP4-BGA968
3
AGPIO3 AGPIO4 AGPIO5
AGPIO8 AGPIO9
AGPIO40 AGPIO64 AGPIO65
2016/09/29
2016/09/29
2016/09/29
APU_TOUCH_EN
BB2 BB5 BC2
APU_SSD_RST#
BB4
APU_HUB_RESET#
AY5
BC3 BA3 BC5 BA5 BB6
APU_SMB0CLK
BA15
APU_SMB0DATA
AY17 AG5
APU_SMB1_DATA_R
AG4
AL5
AGPIO3
AL6
AGPIO4
AJ1
AGPIO5 DEVSLP_GATE#
AJ3
LED_FNLOCK#
AH1 AJ4
AGPIO8
AK5
VDDGFX_PD_R
AD8 AG8
AGPIO40
AW15 AU15
IFDET SKU_ID1
AT15 AU12
WWAN_DISABLE#
AT14 AR14 BC13
APU_SPKR
BA17 AN5
PSP_EN
BB14 BA19
RF_OFF#
BC18
BT_ON
BB19
WWAN_RESET#_R
AY9
UART0_RXD
AW8 AV5
UART0_TXD
AV8 AW9
TOUCH_PWR_ON#
AV11 AU7
LED_MICMUTE#
AT11
LED_MUTE#
AR11 AP9
LC Future Center Secret Data
LC Future Center Secret Data
LC Future Center Secret Data
RC437 0_0201_5%TPSC@
Deciphered Date
Deciphered Date
Deciphered Date
1 2
1
TPC34Test_Point_12MIL
APU_SSD_RST# 24
APU_HUB_RESET# 16
1 2
RC111 0_0201_SM
1 2
RC112 0_0201_SM
1 2
RC420 0_0201_SM
1 2
RC421 0_0201_SM
1
TP2Test_Point_12MIL
DEVSLP_GATE# 24 LED_FNLOCK# 46
1 2
RC105 0_0201_5%@
APU_SPKR 44 APU_DCOVER_SW 13
RF_OFF# 35 BT_ON 35
1 2
RC426 0_0201_5%@
UART0_RXD 35,40 UART0_TXD 35,40
TOUCH_PWR_ON# 19 LED_MICMUTE# 46
LED_MUTE# 46
2014/07/01
2014/07/01
2014/07/01
2
TOUCH_EN 19
PSP_EN BT_ON RF_OFF# DEVSLP_GATE# WWAN_DISABLE#
APU_SMB_CK0 APU_SMB_DA0
APU_SMB1_CLKAPU_SMB1_CLK_R APU_SMB1_DATA
VDDGFX_PD 78
IFDET 24 SKU_ID1 29 WWAN_DISABLE# 36
AGPIO5 APU_DCOVER_SWAPU_DCOVER_SW
WWAN_DISABLE#
AGPIO3 VDDGFX_PD_R
WWAN_RESET# 36
APU_SMB1_CLK APU_SMB1_DATA APU_SMB0CLK APU_SMB0DATA
Title
Title
Title
APU GPIO/AZ/I2C/SD/UARTS/ACPI
APU GPIO/AZ/I2C/SD/UARTS/ACPI
APU GPIO/AZ/I2C/SD/UARTS/ACPI
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet o f
Date: Sheet o f
Date: Sheet o f
APU_SMB_CK0 14,16 APU_SMB_DA0 14,16
APU_SMB1_CLK 29,47,52 APU_SMB1_DATA 29,47,52
AGPIO3 AGPIO8
Tuesday, May 09, 2017
Tuesday, May 09, 2017
Tuesday, May 09, 2017
2 2 2
2
1 2 1 2 1 2
12 1 1 1 12
1 12
RC88 2.2K_0201_5% RC89 10K_0201_5%@ RC90 10K_0201_5%@ RC91 2.2K_0201_5%@ RC436 10K_0201_5%
RC96 10K_0201_5%@ RC422 10K_0201_5%
RC98 10K_0201_5%@ RC99 2K_0201_1%@ RC100 100K_0201_5%@
DIMM1, DIMM2
+3VALW
RPC10
1 8 2 7 3 6 4 5
2.2K_0804_8P4R_5%
RPC12
1 8 2 7 3 6 4 5
10K_0804_8P4R_5%
WWWOOOLLLVVVEEERRRIIINNNEEE444 AAAMMMDDD
WWWOOOLLLVVVEEERRRIIINNNEEE444 AAAMMMDDD
WWWOOOLLLVVVEEERRRIIINNNEEE444 AAAMMMDDD
+3VALW
1
+3VS
10 84
10 84
10 84
+3VS
+3VALW
SIT
SIT
SIT
1
+1.8VALW
12
RC80 10K_0201_5%
1 2
D D
+3VS
+3VS
+3VALW
C C
+3VS
+3VALW
B B
APU_AZ_BITCLK39
APU_AZ_SYNC39
APU_AZ_SDOUT39
+3VALW
A A
+3VALW
EC_RSMRST#52
RPC4
1 8 2 7 3 6 4 5
10K_0804_8P4R_5%
1 2
RC425 10K_0201_5%
1 2
RC418 10K_0201_5%
1 2
RC419 10K_0201_5%
1 2
RC92 10K_0201_5%@
1 2
RC93 10K_0201_5%@
1 2
RC94 10K_0201_5%
1 2
RC95 10K_0201_5%@ RC97 10K_0201_5%
1 2
RC101 10K_0201_5%@
1 2
RC102 10K_0201_5%@
RC115 15K_0201_5% RC116 15K_0201_5% RC117 15K_0201_5%
2
RC107 10K_0201_5%@
2
RC108 10K_0201_5%@
RPC5
10K_0804_8P4R_5%
RPC9
1 8 2 7 3 6 4 5
10K_0804_8P4R_5%
DCOVER_SW13,52
APU_AZ_RST#39
1 8 2 7 3 6 4 5
1 2
RC118 10K_0201_5%@
1 2
RC119 2K_0201_1%
RTC Coin battery implemented: Pull-up resistor RTC Coin battery not implemented: Pull-down resistor
D1 RB751V-40_SOD323-2
SCS00008K00
CLKREQ_PCIE0_LAN# CLKREQ_PCIE1_CR# CLKREQ_PCIE2_WLAN# CLKREQ_PCIE3_WWAN#
12
12 12 12
1 1
18 27 36 45
1 2
RC438 0_0201_5%@
1 2 1 2 1 2 1 2
1
CC19
EMC_NS@
10P_0402_50V8-J
2
RPC13
AGPIO40 APU_AZ_SDIN1
APU_AZ_SDIN2
10K_0804_8P4R_5%
5
LPC_RST#52
PLT_RST#16,24,29,35,37,50
CLKREQ_PCIE_SSD#
INT_MIC_DTCT# SC_DTCT# EC_WAKE# AC_PRESENT APU_S5_MUX_CTRL
BATLOW#
KBRST# GATEA20
TEST0 TEST1 TEST2
S0A3_GPIO APU_AZ_SDIN0
I2C1_CLK
I2C1_SDA
USB_OC1# USB_OC0# SYS_RESET#
APU_DCOVER_SW_R
R10396 33_0201_5% R10397 33_0201_5% R10398 33_0201_5% R10399 33_0201_5%
RTCCLK RTCCLK
RSMRST#
CC17 150P_0201_25V9-J CC18 150P_0201_25V9-J
RC85 33_0201_5% RC86 22_0201_5%
APU_S5_MUX_CTRL56
INT_MIC_DTCT#19
INT#_TYPEC_CPU33
CLKREQ_PCIE0_LAN#29
CLKREQ_PCIE1_CR#37
CLKREQ_PCIE2_WLAN#35
CLKREQ_PCIE3_WWAN#36
CLKREQ_PCIE_SSD#24
APU_AZ_SDIN039
RTCCLK_32K35
AZ_BITCLK AZ_RST# AZ_SYNC AZ_SDOUT
TPC17 Test_Point_12MIL TPC18 Test_Point_12MIL TPC19 Test_Point_12MIL TPC20 Test_Point_12MIL
1 2 1 2
1 2 1 2
PBTN_OUT#52
PWR_GOOD52
EC_WAKE#29,52
PM_SLP_S3#52 PM_SLP_S5#52
KBRST#52 GATEA2052 EC_SCI#52
AC_PRESENT52
SC_DTCT#47
USB_OC0#28 USB_OC1#26
I2C0_CLK33 I2C0_SDA33
RC113 0_0201_5%@
32.768KHZ 12.5PF 9H03200053
1
CC20 18P_0201_25V9-J
2
1 1 1
LPC_RST#_R PLT_RST#_R
RSMRST# PBTN_OUT#
PWR_GOOD SYS_RESET# EC_WAKE#
PM_SLP_S3# PM_SLP_S5#
S0A3_GPIO APU_S5_MUX_CTRL
TEST0 TEST1 TEST2
KBRST# GATEA20
EC_SCI#
AC_PRESENT INT_MIC_DTCT# SC_DTCT# INT#_TYPEC_CPU
BATLOW# CLKREQ_PCIE0_LAN#
CLKREQ_PCIE1_CR# CLKREQ_PCIE2_WLAN# CLKREQ_PCIE3_WWAN#
CLKREQ_PCIE_SSD# USB_OC0# USB_OC1# APU_DCOVER_SW_R
AZ_BITCLK APU_AZ_SDIN0 APU_AZ_SDIN1 APU_AZ_SDIN2 AZ_RST# AZ_SYNC AZ_SDOUT
I2C0_CLK I2C0_SDA I2C1_CLK I2C1_SDA
1 2
RC114
1 2
20M_0402_5%
YC 2
1 2
SJ10000MB00
Y_9H03200031_2P
4
5
Vinafix.com
D D
+VDD_CORE
CC23
1
2
1
2
22U_0603_6.3V6-M
0.22U_0201_10V6-K
CC108
0.22U_0201_10V6-K
0.22U_0201_10V6-M
1
2
COST@
+VDDNB_CORE 22U x 4
0.22U x 8 180P x 1
CC63
0.22U_0201_10V6-M
1
2
+1.35V_APU_VDDIO 22U x 8 + 3 (@)
0.22U x 6 180P x 1
CC81
22U_0603_6.3V6-M
1
2
CC101
0.22U_0201_10V6-K
1
2
COST@
CC109
0.22U_0201_10V6-K
1
2
CC24
CC25
0.22U_0201_10V6-M
0.22U_0201_10V6-M
1
2
COST@
CC64
CC65
0.22U_0201_10V6-M
0.22U_0201_10V6-M
1
2
CC83
CC82
22U_0603_6.3V6-M
1
2
CC102
CC103
0.22U_0201_10V6-K
1
2
COST@
Decoupling between Processor & DIMMs across VDDIO & VSS split.
CC110
0.22U_0201_10V6-K
1
1
2
2
CC27
CC26
0.22U_0201_10V6-M
1
2
CC66
0.22U_0201_10V6-M
1
2
CC84
22U_0603_6.3V6-M
1
1
2
2
CC104
0.22U_0201_10V6-K
1
1
2
2
CC111
0.22U_0201_10V6-K
1
2
CC28
0.22U_0201_10V6-M
0.22U_0201_10V6-M
1
1
2
2
COST@
CC67
CC68
0.22U_0201_10V6-M
0.22U_0201_10V6-M
1
1
2
2
CC85
CC86
22U_0603_6.3V6-M
22U_0603_6.3V6-M
1
1
2
2
CC106
CC105
0.22U_0201_10V6-K
0.22U_0201_10V6-K
1
2
COST@
CC112
+1.35V_APU_VDDIO
180P_0402_50V8-J
180P_0402_50V8-J
0.22U x 4
1
180P x 2
2
CC30
CC29
180P_0402_50V8-J
0.22U_0201_10V6-M
0.22U_0201_10V6-M
1
2
0.22U_0201_10V6-M
1
2
22U_0603_6.3V6-M
180P_0402_50V8-J
1
2
CC87
1
2
COST@
CC69
1
2
1
2
1
2
CC70
180P_0402_50V8-J
0.22U_0201_10V6-M
1
2
@
@
CC89
CC88
22U_0603_6.3V6-M
22U_0603_6.3V6-M
1
1
2
2
CC22
COST@
+VDDNB_CORE
C C
B B
CC62
+1.2V
CC80
1
2
+1.2V
CC100
1
2
+1.2V
CC107
1
2
4
+VDD_GFX 22U x 9
0.22U x 9 180P x 1
+VDD_GFX
CC32
CC31
0.22U_0201_10V6-M
1
2
COST@
CC71
CC72
10U_0603_6.3V6-M
1
2
+1.05VS_VDDP
@
CC90
22U_0603_6.3V6-M
CC91
0.22U_0201_10V6-K
22U_0603_6.3V6-M
1
1
2
2
CC92
CC34
CC33
0.22U_0201_10V6-M
0.22U_0201_10V6-M
1
1
2
2
COST@
CC73
0.22U_0402_10V6-K
1
1
2
2
CC93
180P_0402_50V8-J
1
1
2
2
CC36
CC35
0.22U_0201_10V6-M
0.22U_0201_10V6-M
1
1
2
2
CC74
10U_0603_6.3V6-M
0.22U_0402_10V6-K
1
2
CC94
CC95
10U_0603_6.3V6-M
10U_0603_6.3V6-M
10U_0603_6.3V6-M
1
1
2
2
CC38
CC37
COST@
1
2
1
2
0.22U_0201_10V6-M
0.22U_0201_10V6-M
1
1
2
2
COST@
CC76
0.22U_0402_10V6-K
10U_0603_6.3V6-M
1
2
CC225
CC224
10U_0603_6.3V6-M
0.22U_0201_10V6-K
1
2
0.22U_0201_10V6-M
1
2
CC75
CC96
1
2
CC39
1
2
COST@
0.22U_0201_10V6-K
3
CC40
180P_0402_50V8-J
0.22U_0201_10V6-M
1
2
+1.05VS_VDDP+3VS_APU+1.8VS+1.8VALW+3VALW_APU +1.05VALW_VDDP
CC78
CC77
10U_0603_6.3V6-M
1
1
2
2
CC226
CC227
0.22U_0201_10V6-K
0.22U_0201_10V6-K
1
1
2
2
+VDDCR_FCH_ALW
+RTC_LDO
+1.5VS
RC120 0_0603_SM
CC79
0.22U_0402_10V6-K
10U_0603_6.3V6-M
1
2
CC228
0.22U_0201_10V6-K
1
2
0.2A
1 2
CC116
CC115
0.22U_0402_10V6-K
10U_0603_6.3V6-M
1
1
2
2
1
CC97
0.22U_0201_10V6-K
2
1 2
RC156 1K_0402_1%
+VDDIO_AZ
1
CC98
10U_0603_6.3V6-M
2
12
JCLR1
@
SHORT PADS
CC41
1U_0201_6.3V6-K
1
2
0.8A
+VDDBT_RTC
1
CC113 1U_0201_6.3V6-K
2
CC42
1U_0201_6.3V6-K
1
2
0.2A
1.5A
0.2A
0.5A
0.2A
+1.05VALW_VDDP
+1.05VS_VDDP
1
CC99 10U_0603_6.3V6-M
2
+VDDNB_CORE
2
CC61
1U_0201_6.3V6-K
1
2
+VDDIO_AZ
+1.05VS_VDDP
+3VS_APU
1.5A
+1.8VALW
+3VALW_APU
7A
12A
3A 39A
+1.2V +VDD_CORE
P25
VDDIO_MEM_S3_1
P28
VDDIO_MEM_S3_2
T24
VDDIO_MEM_S3_3
T27
VDDIO_MEM_S3_4
U25
VDDIO_MEM_S3_5
U28
VDDIO_MEM_S3_6
V30
VDDIO_MEM_S3_7
V33
VDDIO_MEM_S3_8
W24
VDDIO_MEM_S3_9
W27
VDDIO_MEM_S3_10
Y25
VDDIO_MEM_S3_11
Y28
VDDIO_MEM_S3_12
Y30
VDDIO_MEM_S3_13
AB24
VDDIO_MEM_S3_14
AB27
VDDIO_MEM_S3_15
AB30
VDDIO_MEM_S3_16
AB33
VDDIO_MEM_S3_17
AD25
VDDIO_MEM_S3_18
AD28
VDDIO_MEM_S3_19
AD30
VDDIO_MEM_S3_20
AE24
VDDIO_MEM_S3_21
AE27
VDDIO_MEM_S3_22
AF30
VDDIO_MEM_S3_23
AF33
VDDIO_MEM_S3_24
AG25
VDDIO_MEM_S3_25
AG28
VDDIO_MEM_S3_26
AH24
VDDIO_MEM_S3_27
AH27
VDDIO_MEM_S3_28
AH30
VDDIO_MEM_S3_29
AK25
VDDIO_MEM_S3_30
AK28
VDDIO_MEM_S3_31
AK30
VDDIO_MEM_S3_32
AK33
VDDIO_MEM_S3_33
AL27
VDDIO_MEM_S3_34
AM30
VDDIO_MEM_S3_35
AR19
VDDIO_AUDIO
AE6
VDDP_GFX_2
AE5
VDDP_GFX_1
AP19
VDD_33_1
AP21
VDD_33_2
+1.8VS
1
CC114
0.22U_0201_10V6-K
2
AP16 AP18
AP10
AP15 AR15
AN12 AP12
AP13 AR12
AW19
AU17 AU19 AV17 AV19
AW17
AL12 AL13 AL15 AL18 AL21 AN13 AN16 AN19 AN22
AR17
AR9
VDD_18_1 VDD_18_2
VDD_18_S5_1 VDD_18_S5_2
VDD_33_S5_1 VDD_33_S5_2
VDDP_S5_1 VDDP_S5_2
VDDCR_FCH_S5_1 VDDCR_FCH_S5_2
VDDP_6 VDDP_1 VDDP_2 VDDP_3 VDDP_4 VDDP_5
VDDCR_NB_1 VDDCR_NB_2 VDDCR_NB_3 VDDCR_NB_4 VDDCR_NB_5 VDDCR_NB_6 VDDCR_NB_7 VDDCR_NB_8 VDDCR_NB_9
VDDBT_RTC_G
UC1F
POWER
VDDCR_CPU_1 VDDCR_CPU_2 VDDCR_CPU_3 VDDCR_CPU_4 VDDCR_CPU_5 VDDCR_CPU_6 VDDCR_CPU_7 VDDCR_CPU_8
VDDCR_CPU_9 VDDCR_CPU_10 VDDCR_CPU_11 VDDCR_CPU_12 VDDCR_CPU_13 VDDCR_CPU_14 VDDCR_CPU_15 VDDCR_CPU_16 VDDCR_CPU_17 VDDCR_CPU_18 VDDCR_CPU_19 VDDCR_CPU_20 VDDCR_CPU_21 VDDCR_CPU_22 VDDCR_CPU_23 VDDCR_CPU_24 VDDCR_CPU_25 VDDCR_CPU_26 VDDCR_CPU_42 VDDCR_CPU_31 VDDCR_CPU_43 VDDCR_CPU_32 VDDCR_CPU_44 VDDCR_CPU_33 VDDCR_CPU_45 VDDCR_CPU_34 VDDCR_CPU_46 VDDCR_CPU_35 VDDCR_CPU_47 VDDCR_CPU_36 VDDCR_CPU_28 VDDCR_CPU_29 VDDCR_CPU_40 VDDCR_CPU_30 VDDCR_CPU_37 VDDCR_CPU_49 VDDCR_CPU_38 VDDCR_CPU_39 VDDCR_CPU_48 VDDCR_CPU_41 VDDCR_CPU_27
VDDCR_GFX_14 VDDCR_GFX_15 VDDCR_GFX_16 VDDCR_GFX_17 VDDCR_GFX_18 VDDCR_GFX_19 VDDCR_GFX_20 VDDCR_GFX_21 VDDCR_GFX_22 VDDCR_GFX_23 VDDCR_GFX_24 VDDCR_GFX_25 VDDCR_GFX_26 VDDCR_GFX_27 VDDCR_GFX_28 VDDCR_GFX_29
VDDCR_GFX_1
VDDCR_GFX_2
VDDCR_GFX_3
VDDCR_GFX_4
VDDCR_GFX_5
VDDCR_GFX_6
VDDCR_GFX_7
VDDCR_GFX_8
VDDCR_GFX_9
VDDCR_GFX_10 VDDCR_GFX_11 VDDCR_GFX_12 VDDCR_GFX_30 VDDCR_GFX_31 VDDCR_GFX_32 VDDCR_GFX_33 VDDCR_GFX_34 VDDCR_GFX_35 VDDCR_GFX_36 VDDCR_GFX_37 VDDCR_GFX_13
FP4 REV 0.93
AMD-BRISTOL_FP4-BGA968
U8 W7 W12 W15 W18 W21 Y8 Y10 Y13 Y16 Y19 Y22 AB7 AB9 AB12 AB15 AB18 AB21 AD6 AD10 AD13 AD16 AD19 AD22 AE7 AE12 AK9 AG10 AK10 AG13 AK13 AG16 AK16 AG19 AK19 AG22 AK22 AH7 AE18 AE21 AH21 AG6 AH12 AN6 AH15 AH18 AL7 AK6 AE15
L8 L13 L16 L19 L22 N7 N12 N15 N18 N21 P8 P13 P16 P19 P22 T7 F12 F15 G11 G14 J8 J9 J11 K7 K12 K13 K15 K16 T12 T15 T18 T21 U13 U16 U19 U22 K19
1
30A
+VDD_GFX
COST@
COST@
A A
Title
Title
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPE TENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPE TENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPE TENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
3
2016/09/29
2016/09/29
2016/09/29
LC Future Center Secret Data
LC Future Center Secret Data
LC Future Center Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
2014/07/01
2014/07/01
2014/07/01
Title
APU Power
APU Power
APU Power
Size
Size
Size
Document Number Rev
Document Number Rev
Document Number Rev
C
C
C
Date: Sheet o f
Date: Sheet o f
Date: Sheet o f
WWWOOOLLLVVVEEERRRIIINNNEEE444 AAAMMMDDD
WWWOOOLLLVVVEEERRRIIINNNEEE444 AAAMMMDDD
WWWOOOLLLVVVEEERRRIIINNNEEE444 AAAMMMDDD
Tuesday, May 09, 2017
Tuesday, May 09, 2017
Tuesday, May 09, 2017
11 84
11 84
1
11 84
SIT
SIT
SIT
5
Vinafix.com
4
3
2
1
D D
C C
B B
A A
UC1G
GND
VSS_1 VSS_2 VSS_3 VSS_4 VSS_5 VSS_6 VSS_7 VSS_8 VSS_9 VSS_10 VSS_11 VSS_12 VSS_13 VSS_14 VSS_15 VSS_16 VSS_17 VSS_18 VSS_19 VSS_20 VSS_21 VSS_22 VSS_23 VSS_24 VSS_25 VSS_26 VSS_27 VSS_28 VSS_29 VSS_30 VSS_31 VSS_32 VSS_33 VSS_34 VSS_35 VSS_36 VSS_37 VSS_38 VSS_39 VSS_40 VSS_41 VSS_42 VSS_43 VSS_44 VSS_45 VSS_46 VSS_47 VSS_48 VSS_49 VSS_50 VSS_51 VSS_52 VSS_53 VSS_54 VSS_55 VSS_56 VSS_57 VSS_58 VSS_59 VSS_60 VSS_61 VSS_62
AMD-BRISTOL_FP4-BGA968
FP4 REV 0.93
VSS_63 VSS_64 VSS_65 VSS_66 VSS_67 VSS_68 VSS_69 VSS_70 VSS_71 VSS_72 VSS_73 VSS_74 VSS_75 VSS_76 VSS_77 VSS_78 VSS_79 VSS_80 VSS_81 VSS_82 VSS_83 VSS_84 VSS_85 VSS_86 VSS_87 VSS_88 VSS_89 VSS_90 VSS_91 VSS_92 VSS_93 VSS_94 VSS_95 VSS_96 VSS_97 VSS_98
VSS_99 VSS_100 VSS_101 VSS_102 VSS_103 VSS_104 VSS_105 VSS_106 VSS_107 VSS_108 VSS_109 VSS_110 VSS_111 VSS_112 VSS_113 VSS_114 VSS_115 VSS_116 VSS_117 VSS_118 VSS_119 VSS_120 VSS_121 VSS_122 VSS_123 VSS_124
L28 M4 M3 0 N10 N13 N16 N19 N22 N27 P1 P2 P4 P5 P12 P15 P18 P21 P30 P33 T4 T10 T13 T16 T19 T22 T30 U5 U12 U15 U18 U21 U24 V1 V2 V4 W10 W13 W16 W19 W22 Y4 Y5 Y1 2 Y1 5 Y1 8 Y2 1 Y2 4 AB1 AB2 AB4 AB10 AB13 AB16 AB19 AB22 AD4 AD9 AD12 AD15 AD18 AD21 AD24
A12 A16 A20 A24 A28 A32
B12 B33
D10 D12 D14 D16 D18 D20 D22 D24 D26 D28 D30
F19 F22 F25 F30 F33
G17 G20 G23 G26
H30
K10 K22 K27 K30 K33
J15 J19 J22 J25 J28
L12 L15 L18 L21 L25
A8
B2 B8
C3 D4 D6 D8
F1 F2 F4 F9
G7
H4
J5
K1
2
K K4
L5
UC1H
AE10
VSS_125
AE13
VSS_126
AE16
VSS_127
AE19
VSS_128
AE22
VSS_129
AF1
VSS_130
AF4
VSS_131
AG9
VSS_132
AG12
VSS_133
AG15
VSS_134
AG18
VSS_135
AG21
VSS_136
AH4
VSS_137
AH10
VSS_138
AH13
VSS_139
AH16
VSS_140
AH19
VSS_141
AH22
VSS_142
AK1
VSS_143
AK4
VSS_144
AK12
VSS_145
AK15
VSS_146
AK18
VSS_147
AL16
VSS_148
AL19
VSS_149
AL22
VSS_150
AM4
VSS_151
AN9
VSS_152
AN10
VSS_153
AN15
VSS_154
AN18
VSS_155
AN21
VSS_156
AN25
VSS_157
AN28
VSS_158
AP1
VSS_159
AP2
VSS_160
AP4
VSS_161
AP7
VSS_162
AP22
VSS_163
AP27
VSS_164
AP30
VSS_165
AP33
VSS_166
AR6
VSS_167
AR25
VSS_168
AR28
VSS_169
AT4
VSS_170
AT19
VSS_171
AT22
VSS_172
AT30
VSS_173
AU5
VSS_174
AU8
VSS_175
AU11
VSS_176
AU14
VSS_177
AU20
VSS_178
AU23
VSS_179
AU27
VSS_180
AV4
VSS_181
AV7
VSS_182
AV9
VSS_183
AV12
VSS_184
AV15
VSS_185
AV25
VSS_186
FP4 REV 0.93
AMD-BRISTOL_FP4-BGA968
GND
VSS_187 VSS_188 VSS_189 VSS_190 VSS_191 VSS_192 VSS_193 VSS_194 VSS_195 VSS_196 VSS_197 VSS_198 VSS_199 VSS_200 VSS_201 VSS_202 VSS_203 VSS_204 VSS_205 VSS_206 VSS_207 VSS_208 VSS_209 VSS_210 VSS_211 VSS_212
VSS_213 VSS_215 VSS_214
AV30 AV33 AW22 AY4 AY6 AY8 AY10 AY12 AY14 AY16 AY20 AY22 AY24 AY26 AY28 AY30 BB1 BB33 BC4 BC8 BC12 BC16 BC20 BC24 BC28 BC32
L24 AL10 AK21
UC1J
U30
RSVD_2
U31
RSVD_3
AN30
RSVD_4
FP4 REV 0.93
AMD-BRISTOL_FP4-BGA968
Title
Title
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
5
4
2016/09/29
2016/09/29
2016/09/29
3
LC Future Center Secret Data
LC Future Center Secret Data
LC Future Center Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2014/07/01
2014/07/01
2014/07/01
2
Title
APU GND
APU GND
APU GND
Size
Size
Size
Document Num ber Rev
Document Num ber Rev
Document Num ber Rev
B
B
B
Date: Sheet of
Date: Sheet of
Date: Sheet of
WWWOOOLLLVVVEEERRRIIINNNEEE444 AAAMMMDDD
WWWOOOLLLVVVEEERRRIIINNNEEE444 AAAMMMDDD
WWWOOOLLLVVVEEERRRIIINNNEEE444 AAAMMMDDD
Tuesday, May 09, 2017
Tuesday, May 09, 2017
Tuesday, May 09, 2017
1
12 84
12 84
12 84
SIT
SIT
SIT
5
Vinafix.com
D D
C C
4
Rear Battery Switch
REAR_EJECT_LEVER#
43
12
S5 SPVT210101_4P
3
+3VALW
12
R10424 10K_0201_5%
REAR_EJECT_LEVER# 52
2
1
EC Reset Switch
1 2
D757 RB521CM-30T2R_VMN2M-2
1 2
D758 1SS400CMT2R_VMN2M2
12
34
S1 SKRPABE010_4P
WRST#
OTP_RESET# 69 WRST# 52
D5:SCS00007M00(RB520CM)
B B
Sw itc h for D Cover Open
DCOVER_SW10,52 APU_DCOVER_SW 10
A A
5
4
DCOVER_SW
1
CE21 1U_0402_6.3V6-K
2
1 2
RE72 0_0402_SM
12
RE73
@
1K_0402_1%
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
3
+RTC_33
12
RE75 1M_0402_5%
SPVR310100_4P
2015/10/5
2015/10/5
2015/10/5
2
1
3
S3
RE74 0_0402_SM
4
LC Future Center Secret Data
LC Future Center Secret Data
LC Future Center Secret Data
1 2
Deciphered Date
Deciphered Date
Deciphered Date
2014/12/05
2014/12/05
2014/12/05
2
Title
Title
Title
Switch
Switch
Switch
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet o f
Date: Sheet o f
Date: Sheet o f
WWWOOOLLLVVVEEERRRIIINNNEEE444 AAAMMMDDD
WWWOOOLLLVVVEEERRRIIINNNEEE444 AAAMMMDDD
WWWOOOLLLVVVEEERRRIIINNNEEE444 AAAMMMDDD
Tuesday, May 09, 2017
Tuesday, May 09, 2017
Tuesday, May 09, 2017
13 84
13 84
13 84
1
SIT
SIT
SIT
5
Vinafix.com
4
3
2
1
+1.2V
12
RD1 1K_0402_1%
D D
C C
B B
DDR_A_CKE06
DDR_A_BG16 DDR_A_BG06
A A
12
RD3 1K_0402_1%
M_VREF_CA_DIMMA
1
CD25
0.1U_0402_10V7-K
2
DDR_A_D5 DDR_A_D1 DDR_A_DQS#0
DDR_A_DQS0 DDR_A_D7 DDR_A_D3 DDR_A_D13 DDR_A_D9 DDRA_MA_DM1 DDR_A_D15 DDR_A_D10 DDR_A_D21 DDR_A_D17 DDR_A_DQS#2
DDR_A_DQS2 DDR_A_D23 DDR_A_D19 DDR_A_D29 DDR_A_D25 DDRA_MA_DM3 DDR_A_D30 DDR_A_D26
DDR_A_BG1 DDR_A_BG0
DDR_A_MA12 DDR_A_MA9
DDR_A_MA8 DDR_A_MA6
+1.2V +1.2V
11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59 61 63 65 67 69 71 73 75 77 79 81 83 85 87 89 91 93 95 97
99 101 103 105 107 109 111 113 115 117 119 121 123 125 127 129
+1.2V +2.5VALW
CD7 10U_0402_6.3V6-M
CD21 1U_0402_6.3V6-K
1
CD40
@
10U_0402_6.3V6-M
2
DDR_A_PARITY
SA_CLK_DDR06
SA_CLK_DDR#06
DDR_A_BA16
DDR_A_CS0#6
DDR_A_WE#6
DDR_A_ODT06 DDR_A_CS1#6
DDR_A_ODT16
APU_SMB_CK010,16
1
CD8 10U_0402_6.3V6-M
2
1
CD29
0.1U_0402_10V7-K
2
1
CD26
+
330U_D2_2VM_R9M
2
1
CD41
@
10U_0402_6.3V6-M
2
DDR_A_MA3 DDR_A_MA1
SA_CLK_DDR0 SA_CLK_DDR#0
DDR_A_PARITY
DDR_A_BA1 DDR_A_CS0#
DDR_A_ODT0 DDR_A_CS1#
DDR_A_ODT1
DDR_A_D37 DDR_A_D33 DDR_A_DQS#4
DDR_A_DQS4 DDR_A_D38 DDR_A_D34 DDR_A_D44 DDR_A_D40 DDRA_MA_DM5 DDR_A_D46 DDR_A_D42 DDR_A_D52 DDR_A_D49 DDR_A_DQS#6
DDR_A_DQS6 DDR_A_D55 DDR_A_D51 DDR_A_D61 DDR_A_D56 DDRA_MA_DM7 DDR_A_D62 DDR_A_D58 APU_SMB_CK0
1
2
1
CD32
RF@
10U_0402_6.3V6-M
2
1
CD42
@
10U_0402_6.3V6-M
2
CD30
2.2U_0402_6.3V6-M
+1.2V+2.5VAL W
131 133 135 137 139 141 143
145 147 149 151 153 155 157 159 161 163 165 167 169 171 173 175 177 179 181 183 185 187 189 191 193 195 197 199 201 203 205 207 209 211 213 215 217 219 221 223 225 227 229 231 233 235 237 239 241 243 245 247 249 251 253 255 257 259
261
JDIMM1A
1
VSS_1
3
DQ5
5
VSS_3
7
DQ1
9
VSS_5 DQS0_C DQS0_t VSS_8 DQ7 VSS_10 DQ3 VSS_12 DQ13 VSS_14 DQ9 VSS_16 DM1_n/DBl1_n VSS_17 DQ15 VSS_19 DQ10 VSS_21 DQ21 VSS_23 DQ17 VSS_25 DQS2_c DQS2_t VSS_28 DQ23 VSS_30 DQ19 VSS_32 DQ29 VSS_34 DQ25 VSS_36 DM3_n/DBl3_n VSS_37 DQ30 VSS_39 DQ26 VSS_41 CB5/NC VSS_43 CB1/NC VSS_45 DQS8_c DQS8_t VSS_48 CB2/NC VSS_50 CB3/NC VSS_52 CKE0 VDD_1 BG1 BG0 VDD_3 A12 A9 VDD_5 A8 A6 VDD_7
ME@
FOX_AS0A82Y-H4RB-7H
1
2
+1.2V
+1.2V
1
2
VSS_2 VSS_4 VSS_6
DM0_n/DBl0_n
VSS_7
VSS_9 VSS_11 VSS_13 VSS_15
DQS1_c DQS1_t VSS_18
VSS_20 VSS_22 VSS_24 VSS_26
DM2_n/DBl2_n
VSS_27 VSS_29 VSS_31 VSS_33 VSS_35
DQS3_c DQS3_t VSS_38
VSS_40 VSS_42
CB4/NC VSS_44 CB0/NC VSS_46
DM8_n/DBl_n/ NC
VSS_47 CB6/NC VSS_49 CB7/NC VSS_51
RESET_n
VDD_2
ACT_n
ALERT_n
VDD_4
VDD_6
VDD_8
CD1 10U_0402_6.3V6-M
CD14 1U_0402_6.3V6-K
CD33
@
10U_0402_6.3V6-M
2 4
DQ4
6 8
DQ0
10 12 14 16
DQ6
18 20
DQ2
22 24
DQ12
26 28
DQ8
30 32 34 36 38
DQ14
40 42
DQ11
44 46
DQ20
48 50
DQ16
52 54 56 58
DQ22
60 62
DQ18
64 66
DQ28
68 70
DQ24
72 74 76 78 80
DQ31
82 84
DQ27
86 88 90 92 94 96 98 100 102 104 106 108 110
CKE1
112 114 116 118 120
A11
122
A7
124 126
A5
128
A4
130
1
CD2 10U_0402_6.3V6-M
2
CD15 1U_0402_6.3V6-K
1
CD34
@
10U_0402_6.3V6-M
2
DDR_A_D4 DDR_A_D0 DDRA_MA_DM0 DDR_A_D6 DDR_A_D2 DDR_A_D12 DDR_A_D8 DDR_A_DQS#1
DDR_A_DQS1 DDR_A_D14 DDR_A_D11 DDR_A_D20 DDR_A_D16 DDRA_MA_DM2 DDR_A_D22 DDR_A_D18 DDR_A_D28 DDR_A_D24 DDR_A_DQS#3
DDR_A_DQS3 DDR_A_D31 DDR_A_D27
DDR_A_CKE1DDR_A_CKE0 DDR_A_ACT_N
DDR_A_ALERT_N DDR_A_MA11
DDR_A_MA7 DDR_A_MA5
DDR_A_MA4
1
2
CD16 1U_0402_6.3V6-K
1
CD35
@
10U_0402_6.3V6-M
2
CD3 10U_0402_6.3V6-M
+1.2V
12
1
CD31
EMC@
0.1U_0402_10V7-K
2
1
CD4 10U_0402_6.3V6-M
2
CD17
CD18
1U_0402_6.3V6-K
1U_0402_6.3V6-K
FOR RF RESERVED
1
1
2
RD31 1K_0402_1%
CD37
CD36
@
@
10U_0402_6.3V6-M
10U_0402_6.3V6-M
2
DDRA_MA_DM[0..7] 6 DDR_A_D[0..63] 6 DDR_A_MA[0..13] 6 DDR_A_DQS#[0..7] 6 DDR_A_DQS[0..7] 6
+3VS +3VS +3VS
12
RD6
@
10K_0402_5%
SA0_CHA_P SA1_CHA_P SA2_CHA_P
12
RD9 0_0402_SM
SPD Address = 0H
DDR4_A_DRAMRST# 6 DDR_A_CKE1 6
DDR_A_ACT_N 6
1
CD5 10U_0402_6.3V6-M
2
+3VS
1
CD6 10U_0402_6.3V6-M
2
CD19 1U_0402_6.3V6-K
1
CD38
@
10U_0402_6.3V6-M
2
12
RD7
@
10K_0402_5%
12
RD10 0_0402_SM
RD12 0_0402_5%
1 2
CD20 1U_0402_6.3V6-K
1
CD39
@
10U_0402_6.3V6-M
2
12
RD8
@
10K_0402_5%
12
RD11 0_0402_SM
12
1
2
RD29 0_0402_SM
1
CD43
@
10U_0402_6.3V6-M
2
JDIMM1B
A3 A1
EVENT_n/NF VDD_9 CK0_t CK0_c VDD_11 Parity
BA1 VDD_13 CS0_n A14/WE_n VDD_15 ODT0 CS1_n VDD_17 ODT1
C0/CS2_n/NC VDD_19 C1/CS3_n/NC VSS_53 DQ37 VSS_55 DQ33 VSS_57 DQS4_c
DM4_n/DBl4_n DQS4_t VSS_60 DQ38 VSS_62 DQ34 VSS_64 DQ44 VSS_66 DQ40 VSS_68 DM5_n/DBl5_n VSS_69 DQ46 VSS_71 DQ42 VSS_73 DQ52 VSS_75 DQ49 VSS_77 DQS6_c
DM6_n/DBl6_n DQS6_t VSS_80 DQS5 VSS_82 DQ51 VSS_84 DQ61 VSS_86 DQ56 VSS_88 DM7_n/DBl7_n VSS_89 DQ62 VSS_91 DQ58 VSS_93 SCL VDDSPD VPP_1 VPP_2
GND_1
ME@
FOX_AS0A82Y-H4RB-7H
SP011511090
VDD_10
CK1_t/NF
CK1_c/NF
VDD_12
A10/AP
VDD_14
A16/RAS_n
VDD_16
A15/CAS_n
VDD_18
VREFCA
VSS_54 VSS_56 VSS_58 VSS_59 VSS_61 VSS_63 VSS_65 VSS_67
DQS5_c DQS5_t VSS_70
VSS_72 VSS_74 VSS_76 VSS_78 VSS_79 VSS_81 VSS_83 VSS_85 VSS_87
DQS7_c DQS7_t VSS_90
VSS_92 VSS_94
GND_2
1
CD9 10U_0402_6.3V6-M
2
+0.6VS
1
CD22 10U_0402_6.3V6-M
2
+1.2V +0.6VS
132
A2
134 136 138 140 142 144
A0
146 148 150
BA0
152 154 156 158
A13
160 162 164 166
SA2
168 170
DQ36
172 174
DQ32
176 178 180 182
DQ39
184 186
DQ35
188 190
DQ45
192 194
DQ41
196 198 200 202 204
DQ47
206 208
DQ43
210 212
DQ53
214 216
DQ48
218 220 222 224
DQ54
226 228
DQ50
230 232
DQ60
234 236
DQ57
238 240 242 244 246
DQ63
248 250
DQ59
252 254
SDA
256
SA0
258
VTT
260
SA1
262
1
CD10 10U_0402_6.3V6-M
2
1
CD23 10U_0402_6.3V6-M
2
DDR_A_MA2
SA_CLK_DDR1 SA_CLK_DDR#1
DDR_A_MA0
DDR_A_MA10 DDR_A_BA0
DDR_A_RAS#DDR_A_WE# DDR_A_CAS#
DDR_A_MA13
M_VREF_CA_DIMMA SA2_CHA_P
DDR_A_D36 DDR_A_D32 DDRA_MA_DM4 DDR_A_D39 DDR_A_D35 DDR_A_D45 DDR_A_D41 DDR_A_DQS#5
DDR_A_DQS5 DDR_A_D47 DDR_A_D43 DDR_A_D53 DDR_A_D48 DDRA_MA_DM6 DDR_A_D54 DDR_A_D50 DDR_A_D60 DDR_A_D57 DDR_A_DQS#7
DDR_A_DQS7 DDR_A_D63 DDR_A_D59 APU_SMB_DA0
SA0_CHA_P SA1_CHA_P
CD11 1U_0402_6.3V6-K
CD24 1U_0402_6.3V6-K
+1.2V
12
RD5 1K_0402_1%
SA_CLK_DDR1 6 SA_CLK_DDR#1 6
DDR_A_BA0 6 DDR_A_RAS# 6
DDR_A_CAS# 6
1
CD27 1000P_0402_50V7-K
2
APU_SMB_DA0 10,16
CD12 1U_0402_6.3V6-K
DDR_A_EVENT# 6
1
CD28
0.1U_0402_10V7-K
2
Title
Title
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF E NGINEERI NG DR AWING IS THE P ROPRIE TARY PR OPERTY OF L C F UTURE CENTER. AND CONTAINS CONFIDENT IAL
THIS SHEET OF E NGINEERI NG DR AWING IS THE P ROPRIE TARY PR OPERTY OF L C F UTURE CENTER. AND CONTAINS CONFIDENT IAL
THIS SHEET OF E NGINEERI NG DR AWING IS THE P ROPRIE TARY PR OPERTY OF L C F UTURE CENTER. AND CONTAINS CONFIDENT IAL AND T RADE SECRET INFO RMATION. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF THE COMPET ENT DI VISION OF R&D
AND T RADE SECRET INFO RMATION. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF THE COMPET ENT DI VISION OF R&D
AND T RADE SECRET INFO RMATION. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF THE COMPET ENT DI VISION OF R&D DEPARTMENT EXC EPT AS AUTHO RIZED BY LC FUT URE CENTER NEITHER THI S SHEET NOR THE INFORMATIO N IT C ONTAINS
DEPARTMENT EXC EPT AS AUTHO RIZED BY LC FUT URE CENTER NEITHER THI S SHEET NOR THE INFORMATIO N IT C ONTAINS
DEPARTMENT EXC EPT AS AUTHO RIZED BY LC FUT URE CENTER NEITHER THI S SHEET NOR THE INFORMATIO N IT C ONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
3
2016/09/29
2016/09/29
2016/09/29
LC Future Center Secret Data
LC Future Center Secret Data
LC Future Center Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
2016/12/31
2016/12/31
2016/12/31
Title
DDR4 CH-A PRIMARY
DDR4 CH-A PRIMARY
DDR4 CH-A PRIMARY
Size
Document Number Rev
Size
Document Number Rev
Size
Document Number Rev
Tuesday, May 09, 2017
Tuesday, May 09, 2017
Tuesday, May 09, 2017
Date: Sheet of
Date: Sheet of
Date: Sheet of
WWWOOOLLLVVVEEERRRIIINNNEEE444 AAAMMMDDD
WWWOOOLLLVVVEEERRRIIINNNEEE444 AAAMMMDDD
WWWOOOLLLVVVEEERRRIIINNNEEE444 AAAMMMDDD
1
14 84
14 84
14 84
SITCustom
SITCustom
SITCustom
5
Vinafix.com
D D
C C
4
3
2
1
B B
A A
5
4
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMA TION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMA TION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMA TION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
2016/09/29
2016/09/29
2016/09/29
3
LC Future Center Secret Data
LC Future Center Secret Data
LC Future Center Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2014/12/05
2014/12/05
2014/12/05
2
Title
Title
Title
BLANK
BLANK
BLANK
Size
Size
Size
Document Num ber Rev
Document Num ber Rev
Document Num ber Rev
B
B
B
Date: Sheet of
Date: Sheet of
Date: Sheet of
WWWOOOLLLVVVEEERRRIIINNNEEE444 AAAMMMDDD
WWWOOOLLLVVVEEERRRIIINNNEEE444 AAAMMMDDD
WWWOOOLLLVVVEEERRRIIINNNEEE444 AAAMMMDDD
Tuesday, May 09, 2017
Tuesday, May 09, 2017
Tuesday, May 09, 2017
1
15 84
15 84
15 84
SIT
SIT
SIT
5
Vinafix.com
4
3
2
+3VS_HUB
1
D D
1 2
RU2 0_0603_SM
+3VS_HUB
C C
B B
+3VS_HUB+3VS
1
CU3
0.1U_0402_10V7-K
2
+3VS_HUB
1
CU4
0.1U_0402_10V7-K
2
1 2
USB20_N3_HUB USB20_P3_HUB USB20_N_FP USB20_P_FP
USB20_N_WLAN USB20_P_WLAN HUB_RREF
GL850G_X1 GL850G_X2 USB20_N_SMART_CARD USB20_P_SMART_CARD +3VS_HUB
USB20_N3_HUB9
USB20_P3_HUB9
USB20_N_FP47
FP BT
Smart Card
12
GL850G_X1 GL850G_X2
1
CU5 18P_0402_50V8-J
2
USB20_P_FP47
USB20_N_WLAN35
USB20_P_WLAN35
USB20_N_SMART_CARD47 USB20_P_SMART_CARD47
HUB_RREF
RU9 680_0402_1%
1423
YU 1 12MHZ_10PF_8Z12000006
RU17 0_0201_SM
UHUB1
1
DM0
2
DP0
3
DM1
4
GL852G
DP1
5
AV DD
6 7 8
9 10 11 12 13 14
29
1
2
QFN28
DM2 DP2 RREF AVDD1 X1 X2 DM3 DP3 AVDD2
PAD
GL852G-OHY50_QFN28_5X5
CU6 18P_0402_50V8-J
V33
PWREN1#/SDA OVCUR1#/SMC OVCUR2#/SMD
PGANG
PSELF
DVDD OVCUR3# OVCUR4# TEST/SCL
RESET#
DP4
DM4
28 27
V5
26 25 24 23 22 21 20 19 18 17 16 15
HUB_RESET#
HUB_OVCUR1# HUB_OVCUR2# HUB_PGANG HUB_PSELF
HUB_OVCUR3# HUB_OVCUR4#
HUB_RESET#
12
RU8 10K_0402_5%
1
C9584 1U_0201_6.3V6-K
2
RU15 10K_0402_5% RU16 10K_0402_5% RU13 0_0201_SM RU7 0_0402_5%@ RU14 0_0201_SM
+3VS_HUB+3VS_HUB
12
13
D
2
G
S
A A
HUB_PSELF HUB_PGANG
1 1
12 1 2 1 2 1 2
12
APU_SMB_CK010,14
RU11 10K_0402_5%
QU1 2N7002WT1G_SC-70-3
A. Vth = 2.5V (MAX) B. Id = 340 mA (MAX) C. RDSon = 2.5 ohm(MAX) D. Vth in schematic = 3.3V
APU_SMB_DA010,14
RU1 10K_0402_5% RU6 10K_0402_5%
+3VS_HUB
1
CU1 TP C29Test_Point_12MIL TP C30Test_Point_12MIL
10U_0603_6.3V6-M
2
+3VS_HUB
PLT_RST# 10,24,29,35,37,50 APU_HUB_RESET# 10
APU_SMB_CK0
APU_SMB_DA0
1 2 1 2
1
4
+3VS_HUB
12
RU10
4.7K_0402_5%
6
D1
S1
A. Vth = 2.5V (MAX) B. Id = 295 mA (MAX) C. RDSon = 2.5 ohm(MAX)
G1
D. Vth in schematic = 3.3V
2
QU273A NTJD5121NT1G_SC88-6
1 2
CU7 0.1U_0402_10V7-K
+3VS_HUB
12
5
G2 D2
S2
QU273B NTJD5121NT1G_SC88-6
RU12
4.7K_0402_5%
3
A. Vth = 2.5V (MAX) B. Id = 295 mA (MAX) C. RDSon = 2.5 ohm(MAX) D. Vth in schematic = 3.3V
+3VS_HUB
1
CU2 10U_0603_6.3V6-M
2
HUB_OVCUR1#
HUB_OVCUR2#
Title
Title
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
3
2016/09/29
2016/09/29
2016/09/29
LC Future Center Secret Data
LC Future Center Secret Data
LC Future Center Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2015/08/10
2015/08/10
2015/08/10
2
Title
USB 2.0 HUB GL852G
USB 2.0 HUB GL852G
USB 2.0 HUB GL852G
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Tuesday, May 09, 2017
Tuesday, May 09, 2017
Date: Sheet o f
Date: Sheet o f
Date: Sheet o f
Tuesday, May 09, 2017
WWWOOOLLLVVVEEERRRIIINNNEEE444 UUUMMMAAA
WWWOOOLLLVVVEEERRRIIINNNEEE444 UUUMMMAAA
WWWOOOLLLVVVEEERRRIIINNNEEE444 UUUMMMAAA
1
16 84
16 84
16 84
SIT
SIT
SIT
5
Vinafix.com
D D
C C
4
3
2
1
BLANK
B B
A A
Title
Title
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
3
2016/09/29
2016/09/29
2016/09/29
LC Future Center Secret Data
LC Future Center Secret Data
LC Future Center Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2015/08/10
2015/08/10
2015/08/10
2
Title
BLANK
BLANK
BLANK
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Tuesday, May 09, 2017
Tuesday, May 09, 2017
Date: Sheet o f
Date: Sheet o f
Date: Sheet o f
Tuesday, May 09, 2017
WWWOOOLLLVVVEEERRRIIINNNEEE444 AAAMMMDDD
WWWOOOLLLVVVEEERRRIIINNNEEE444 AAAMMMDDD
WWWOOOLLLVVVEEERRRIIINNNEEE444 AAAMMMDDD
17 84
17 84
17 84
1
SITCustom
SITCustom
SITCustom
A
Vinafix.com
1 1
2 2
B
C
D
E
3 3
4 4
Title
Title
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
A
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
C
2016/09/29
2016/09/29
2016/09/29
LC Future Center Secret Data
LC Future Center Secret Data
LC Future Center Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2016/12/31
2016/12/31
2016/12/31
D
Title
BLANK
BLANK
BLANK
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Tuesday, May 09, 2017
Tuesday, May 09, 2017
Date: Sheet o f
Date: Sheet o f
Date: Sheet o f
Tuesday, May 09, 2017
WWWOOOLLLVVVEEERRRIIINNNEEE444 AAAMMMDDD
WWWOOOLLLVVVEEERRRIIINNNEEE444 AAAMMMDDD
WWWOOOLLLVVVEEERRRIIINNNEEE444 AAAMMMDDD
18 84
18 84
18 84
E
SIT
SIT
SIT
5
Vinafix.com
+3VS
4
3
2
1
+3VS
U307
1
5
OE
APU_ENVDD
D D
APU_ENVDD8
+LCDVDD_CON
C C
LCD CONNECTOR
PANEL_BKLT_CTRL8
B B
APU_EDP_AUX#8
APU_EDP_AUX8
APU_EDP_ TX0+8
APU_EDP_ TX0-8
APU_EDP_ TX1+8
APU_EDP_ TX1-8
FOR RF RESERVED FOR RF RESERVED FOR RF RESERVED
+1.8VS +5VS +3VL
1
C9609
@
10U_0402_6.3V6-M
2
A A
FOR RF RESERVED FOR RF RESERVED FOR RF RESERVED
+3VS +3VALW +5VALW
1
C9621
@
10U_0402_6.3V6-M
2
VCC
2
A
APU_ENVDD_R
4
GND3Y
SN74LV1T125DCKR_SC70-5
APU_ENVDD
F2
2 1
3A_32V_ERBRD3R00X
BKOFF#52
APU_EDP_ HPD8
APU_EDP_AUX# APU_EDP_AUX
APU_EDP_ TX0+ EDP_TXP0_CONN APU_EDP_ TX0-
APU_EDP_ TX1+ APU_EDP_ TX1-
1
C9610
@
10U_0402_6.3V6-M
2
1
C9622
@
10U_0402_6.3V6-M
2
5
RC178
1 2
@
12
2.2K_0402_5% RC179
@
4.7K_0402_5%
0.9A
2
C3 1U_0402_10V6K
1
+LEDVDD
2
C6
0.01U_0402_25V7K
1
PANEL_BKLT_CTRL BKOFF#
APU_EDP_ HPD
1 2
C9 0.1u_0201_10V6K
1 2
C10 0.1u_0201_10V6K
1 2
C11 0.1u_0201_10V6K
1 2
C12 0.1u_0201_10V6K
1 2
C13 0.1u_0201_10V6K
1 2
C14 0.1u_0201_10V6K
1
C9611
@
10U_0402_6.3V6-M
2
1
C9623
@
10U_0402_6.3V6-M
2
1
2
12
C
2
B
E
3 1
+LCDVDD_CON_F
2
1
+LCDVDD_CON
12
R4
@
47K_0402_5%
1
C9612
@
10U_0402_6.3V6-M
2
C9624
@
10U_0402_6.3V6-M
1
2
12
RC177
@
2
G
@
4.7K_0402_5%
13
D
QC18
@
2N7002WT1G_1N_SC-70-3
A. Vth = 2.5V (MAX) B. Id = 340 mA (MAX)
S
C. RDSon = 2.5 ohm(MAX) D. Vth in schematic = 3.3V
飽和區
(OK)
2
C5
0.01U_0201_10V7K
1
APU_ENVDD _R
1
C265
RF@
100P_0201_25V8J
2
RC176
@
47K_0402_5%
QC17 MLMBT3904WT1G NPN SOT323-3
SB000010U00
IB = 1.8V / 2.2K = 0.0008A IB * Hfe = 0.0008 * 120 = 0.096A IC = (Vc-Vce(sat)) / Rc = (3.3-0.25) / 47000 = 0.000065 IB * Hfe > IC ---
C4
0.1u_0201_10V6K
1.2A
1
1
C9614
@
10U_0402_6.3V6-M
2
C268
RF@
100P_0201_25V8J
2
+LEDVDD
+LCDVDD_CON_F
1
C9619
@
10U_0402_6.3V6-M
2
1
C9625
@
10U_0402_6.3V6-M
2
4
C7
0.1U_0402_25
1 2
1
C9613
@
10U_0402_6.3V6-M
2
C9629
@
10U_0402_6.3V6-M
C8 1UF_25V_0603
1 2
EDP_AUXN_CONN EDP_AUXP_ CONN
EDP_TXN0_CONN TOUCH_EN_R EDP_TXP1_CONN
EDP_TXN1_CONN
1
C9630
@
10U_0402_6.3V6-M
2
2
C2266
RF@
47P_0201_25V8J
1
2
C267
RF@
47P_0201_25V8J
1
30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
9 8 7 6 5 4 3 2 1
1
C9620
@
10U_0402_6.3V6-M
2
1
C9626
@
10U_0402_6.3V6-M
2
J10
30
32
29
G2
31
28
G1 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1
ME@
I-PEX_20374-030E-31
1
2
1
C9487 1U_0402_6.3VA-K
2
C9615
@
10U_0402_6.3V6-M
1
C9616
@
10U_0402_6.3V6-M
2
1
C9627
@
10U_0402_6.3V6-M
2
APU_ENVDD_R
1
C9628
@
10U_0402_6.3V6-M
2
12
R10127 100K_0402_5%
U205
5
IN
4
EN
G524B1T11U_SOT23-5
TPSC@
TP@
3
+LCDVDD_CON
1
OUT
2
GND
3
OC
TOUCH_PWR_ ON#10
Touch Panel Sequence Control
Touch Panel Sequence Don't Control
LEDPWR#52
PWRSWITCH#52
TOUCH_EN10
USB20_N09
USB20_P09
LOGO_LED#52
USB20_N29
USB20_P29
INT_MIC_D TCT#10
DMIC_DATA39
DMIC_CLK39
LID_SW#52
+LCDVDD_CON+3VS
F1 3A_32V_ERBRD3R00X
1
C982
0.01U_0402_25V7K
2
21
Touch Power Control
+1.8VS
+3VALW
2
1
Deciphered Date
Deciphered Date
Deciphered Date
2
12
R10499
TPSC@
10K_0402_5%
1
C9593
TPSC@
0.1U_0402_10V7-K
2
C20
@
1000P_0201_25V7K
12
R10513
G
2
TPSC@
10K_0402_5%
LEDPWR# PWRS WITC H#
TOUCH_EN LID_SW# USB20_N0
USB20_P0
LOGO_LED#
USB20_N2 USB20_P2
INT_MIC_DTCT# DMIC_DATA DMIC_CLK
LID_SW#
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAIN S CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAIN S CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAIN S CONFIDENTIAL AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHE ET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHE ET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHE ET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CO NSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CO NSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CO NSENT OF LC FUTURE CENTER.
D
S
13
Q283
TPSC@
LSK3541G1ET2L_VMT3
A. Vth = 1.5V (MAX) B. Id = ? mA (MAX) C. RDSon = 13 ohm(MAX) D. Vth in schematic = 1.8V
12
R10504
TPSC@
1 2
1 2 1 2
1 2 1 2
1 2
1 2
1 2 1 2
1
C500
EMC@
33P_0201_25V8J
2
2016/09/29
2016/09/29
2016/09/29
10K_0402_5%
12
R10503
@
100K_0201_5%
LC Future Center Secret Data
LC Future Center Secret Data
LC Future Center Secret Data
TOUCH_EN
R7 220_0201_5%
R10505 0_0201_5%@ D16 RB521CS-30GT2RA_VMN2-2TPSC@
D2 RB521CM-30T2R_VMN2M R8 0_0201_SM
R9 0_0201_SM
R10 3.9K_0201_5%
R11 0_0201_SM R12 0_0201_SM
+LEDVDDB+
Touch consumption 214mW
+3VALW +3VS_TP
1
C9591
TPSC@
1U_0402_6.3V7-K
2
Touch Panel
21
R5
F3
100K_0201_5%
0.5A_32V_ERBRD0R50X
1 2
1 2
TOUCH_EN_R
USB20_N0_CONN USB20_P0_CONN
USB20_N2_CONN USB20_P2_CONN
2
C21
@
1000P_0201_25V7K
1
2012/06/21
2012/06/21
2012/06/21
D
S
13
Q279
G
TPSC@
2
AO3413_SOT23-3
A. Vth = -1V (MAX) B. Id = ?mA (MAX) C. RDSon = 130m ohm(MAX) D. Vth in schematic = -?V
12
R6
R10501
TP@
TPSC@
100K_0201_5%
100K_0201_5%
2
C269
RF@
4700P_0402_25V
1
IVO N1254 R2
100mA
Touch Panel
+3VS+3VS+3VL +3VS +3VALW
+3VS_TP+3VS_TP+3VS
21
21
F5
F4
TP@
2A_32V_ERBRD2R00X
0.5A_32V_ERBRD0R50X
+3VL
USB20_N0_CONN USB20_P0_CONN
12
D755
EMC@
DF2S6.8UFS_1-1L1A2
Title
Title
Title
LCD/LID/MIC/CAMERA/PWR SW
LCD/LID/MIC/CAMERA/PWR SW
LCD/LID/MIC/CAMERA/PWR SW
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Tuesday, May 09, 2017
Tuesday, May 09, 2017
Tuesday, May 09, 2017
Date: Sheet of
Date: Sheet of
Date: Sheet of
1
C9592
TPSC@
0.1U_0402_10V7-K
2
F44
TPSC@
0.5A_32V_ERBRD0R50X
2 1
J11
30
30
29
29
G2
28
28
G1
27
27
26
26
25
25
24
24
23
23
22
22
21
21
20
20
19
19
18
18
17
17
16
16
15
15
14
14
13
13
12
12
11
11
10
10
9
9
8
8
7
7
6
6
5
5
4
4
3
3
2
2
1
1
ME@
I-PEX_20374-030E-31
12
D756
EMC@
DF2S6.8UFS_1-1L1A2
WWWOOOLLLVVVEEERRRIIINNNEEE444 AAAMMMDDD
WWWOOOLLLVVVEEERRRIIINNNEEE444 AAAMMMDDD
WWWOOOLLLVVVEEERRRIIINNNEEE444 AAAMMMDDD
1
32 31
19 84
19 84
19 84
SITCustom
SITCustom
SITCustom
5
Vinafix.com
4
3
2
1
D D
C C
B B
SATA_CRX_DTX_P09 SATA_CRX_DTX_N09 SATA_CTX_DRX_N09
SATA_CTX_DRX_P09
PCIE_CRX_GTX_P05
PCIE_CRX_GTX_N05
PCIE_CTX_GRX_N0_C5
PCIE_CTX_GRX_P0_C5
SATA_CRX_DTX_P0 SATA_CRX_DTX_N0 SATA_CTX_DRX_N0 SATA_CTX_DRX_P0 PCIE_CRX_GTX_P0 PCIE_CRX_GTX_N0 PCIE_CTX_GRX_N0_C PCIE_CTX_GRX_P0_C
1 2
C9578 0.22U_0201_6.3V6-K
1 2
C9579 0.22U_0201_6.3V6-K
PCIE_CRX_GTX_P0_R PCIE_CRX_GTX_N0_R
U304
19
B0_P
18
B0_N
17
B1_P
16
B1_N
15
C0_P
14
C0_N
13
C1_P
12
C1_N
5
GND1
11
GND2
20
GND3
21
THERMAL_PAD
CBTL02043ABQ_DHVQFN20_2P5X4P5
XSD SEL
A0_P
A0_N
A1_P
A1_N VDD1
VDD2 VDD3
2 9
3 4 7 8
1 6 10
PCIE_SATA_SEL
PCIEG0_SATA0_CRX_GTX_P PCIEG0_SATA0_CRX_GTX_N PCIEG0_SATA0_CTX_GRX_N PCIEG0_SATA0_CTX_GRX_P
1
C9563
0.1U_0201_6.3V6-K
2
1
C9564
0.1U_0201_6.3V6-K
2
PCIE_SATA_SEL 24
PCIEG0_SATA0_CRX_GTX_P 23 PCIEG0_SATA0_CRX_GTX_N 23 PCIEG0_SATA0_CTX_GRX_N 23 PCIEG0_SATA0_CTX_GRX_P 23
+3VS
1
C9565
0.1U_0201_6.3V6-K
2
A A
5
4
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMA TION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMA TION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMA TION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
2015/10/5
2015/10/5
2015/10/5
3
LC Future Center Secret Data
LC Future Center Secret Data
LC Future Center Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2014/12/05
2014/12/05
2014/12/05
2
Title
Title
Title
PCIE_SATA SWITCH
PCIE_SATA SWITCH
PCIE_SATA SWITCH
Size
Size
Size
Document Num ber Rev
Document Num ber Rev
Document Num ber Rev
B
B
B
Date: Sheet of
Date: Sheet of
Date: Sheet of
WWWOOOLLLVVVEEERRRIIINNNEEE444 AAAMMMDDD
WWWOOOLLLVVVEEERRRIIINNNEEE444 AAAMMMDDD
WWWOOOLLLVVVEEERRRIIINNNEEE444 AAAMMMDDD
Tuesday, May 09, 2017
Tuesday, May 09, 2017
Tuesday, May 09, 2017
1
20 84
20 84
20 84
SIT
SIT
SIT
5
Vinafix.com
D D
4
3
2
1
+3VS
APU_MUX_TX0+ APU_MUX_TX0­APU_MUX_TX1+ APU_MUX_TX1­APU_MUX_TX2+ APU_MUX_TX2­APU_MUX_TX3+
APU_MUX_TX3-
APU_HDMI_DAT APU_HDMI_CLK
APU_HDMI_HPD HDMI_HPD_CONN
+5VS +5VS_HDMI
C9568 1U_0402_6.3V6-K
APU_MUX_TX0+8
APU_MUX_TX0-8
APU_MUX_TX1+8 HDMI_DATA1P 22
APU_MUX_TX1-8
APU_MUX_TX2+8
APU_MUX_TX2-8
+5VS_HDMI
1 2
R10460 2.2K_0402_5%@
1 2
R10461 2.2K_0402_5%@
1 2
R10462 100K_0402_5%@
C C
B B
HDMI_CLK_CON HDMI_DAT_CON
HDMI_HPD_CONN
APU_MUX_TX3+8
APU_MUX_TX3-8
APU_HDMI_DAT8 APU_HDMI_CLK8 APU_HDMI_HPD8
1 2
CX1 0.1U_0402_10V7-K
1 2
CX5 0.1U_0402_10V7-K
1 2
CX2 0.1U_0402_10V7-K
1 2
CX3 0.1U_0402_10V7-K
1 2
CX4 0.1U_0402_10V7-K
1 2
CX6 0.1U_0402_10V7-K
1 2
CX7 0.1U_0402_10V7-K
1 2
CX8 0.1U_0402_10V7-K
U305
GND
1
A1
2
A2
3
HPDO
HPDI
4
VCCA IN5OUT
G5260ARE1U_TDFN10_3X3
C9569 1U_0402_6.3V6-K
11 10
B1
9
B2
8 7
NC
6
HDMI_DATA2P HDMI_DATA2N HDMI_DATA1P HDMI_DATA1N HDMI_DATA0P HDMI_DATA0N HDMI_CLKP HDMI_CLKN
HDMI_DAT_CON HDMI_CLK_CON
1
C9570
22U_0603_6.3V6-M
2
HDMI_DATA2P 22 HDMI_DATA2N 22
HDMI_DATA1N 22 HDMI_DATA0P 22 HDMI_DATA0N 22 HDMI_CLKP 22 HDMI_CLKN 22
HDMI_DAT_CON 22 HDMI_CLK_CON 22 HDMI_HPD_CONN 22
A A
Title
Title
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
3
2016/09/29
2016/09/29
2016/09/29
LC Future Center Secret Data
LC Future Center Secret Data
LC Future Center Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2016/10/31
2016/10/31
2016/10/31
2
Title
HDMI Bypass
HDMI Bypass
HDMI Bypass
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Tuesday, May 09, 2017
Tuesday, May 09, 2017
Date: Sheet o f
Date: Sheet o f
Date: Sheet o f
Tuesday, May 09, 2017
WWWOOOLLLVVVEEERRRIIINNNEEE444 AAAMMMDDD
WWWOOOLLLVVVEEERRRIIINNNEEE444 AAAMMMDDD
WWWOOOLLLVVVEEERRRIIINNNEEE444 AAAMMMDDD
21 84
21 84
21 84
1
SIT
SIT
SIT
5
Vinafix.com
4
3
2
1
U23
1
IN
4
D D
12
C229
0.1U_0402_10V6-K
HDMI_CLKN21
HDMI_CLKP21
C C
B B
HDMI_DATA1P21
HDMI_DATA1N21
HDMI_DATA0P21
HDMI_DATA0N21
HDMI_DATA2N21
HDMI_DATA2P21
FAULT
3
EN
TPS2553DBVR_SOT23-6
HDMI_CLKN
HDMI_CLKP HDMI_CLKP_CONN
HDMI_DATA1P
HDMI_DATA1N HDMI_DATA1N_CONN
HDMI_DATA0P
HDMI_DATA0N
HDMI_DATA2N
HDMI_DATA2P
HDMI_CLKN HDMI_CLKP HDMI_CLKP_CONN HDMI_DATA1P HDMI_DATA1N HDMI_DATA1N_CONN HDMI_DATA0P HDMI_DATA0N HDMI_DATA2N HDMI_DATA2P
6
OUT
5
ILIM
2
GND
L7
4
4
1
1
EMC@
EXC24CH900U_4P L8
1
1
4
4
EMC@
EXC24CH900U_4P L9
1
1
4
4
EMC@
EXC24CH900U_4P L10
4
4
1
1
EMC@
EXC24CH900U_4P
1 2
R10351 0_0201_5%@
1 2
R10352 0_0201_5%@
1 2
R311 0_0201_5%
1 2
R313 0_0201_5%@
1 2
R316 0_0201_5%@
1 2
R318 0_0201_5%@
1 2
R320 0_0201_5%
1 2
R323 0_0201_5%@
12
3
2
2
3
2
3
3
2
@
@
R314 20K_0201_5%
3
2
2
3
2
3
3
2
+5VS_HDMI+5VS
1
C238
4.7U_0402_6.3V6M
2
HDMI_CLKN_CONN
HDMI_DATA1P_CONN
HDMI_DATA0P_CONN
HDMI_DATA0N_CONN
HDMI_DATA2N_CONN
HDMI_DATA2P_CONN
HDMI_CLKN_CONN
HDMI_DATA1P_CONN
HDMI_DATA0P_CONN HDMI_DATA0N_CONN HDMI_DATA2N_CONN HDMI_DATA2P_CONN
HDMI_HPD_CONN21
HDMI_DAT_CON21 HDMI_CLK_CON21
HDMI_HPD_CONN
HDMI_DAT_CON HDMI_CLK_CON
HDMI_CLKN_CONN HDMI_CLKP_CONN
HDMI_DATA0N_CONN HDMI_DATA0P_CONN
HDMI_DATA1N_CONN HDMI_DATA1P_CONN
HDMI_DATA2N_CONN HDMI_DATA2P_CONN
HDMI_CLKN_CONN HDMI_CLKP_CONN HDMI_DATA1P_CONN HDMI_DATA1N_CONN HDMI_DATA0P_CONN HDMI_DATA0N_CONN HDMI_DATA2N_CONN HDMI_DATA2P_CONN
R10550 0_0402_5%RF@
HDMI_CLK_CON HDMI_HPD_CONN_RHDMI_DAT_CON
1 2
R10463 499_0201_1%
1 2
R10464 499_0201_1%
1 2
R10465 499_0201_1%
1 2
R10466 499_0201_1%
1 2
R10467 499_0201_1%
1 2
R10468 499_0201_1%
1 2
R10469 499_0201_1%
1 2
R10470 499_0201_1%
12
+5VS_HDMI +5VS_HDMI
12
R340
2.2K_0201_5%
1
D55
EMC@
1000P_0402_50V7-K
2
+3VS
HDMI_HPD_CONN_R
+5VS_HDMI
HDMI_GND
2
G
12
1
2
13
D
Q275 2N7002WT1G_1N_SC-70-3
A. Vth = 2.5V (MAX)
S
B. Id = 340 mA (MAX) C. RDSon = 2.5 ohm(MAX) D. Vth in schematic = 3.3V
J43
19
HP_DET
18
+5V
17
DDC/CEC_GND
16
SDA
15
SCL
14
Reserved
13
CEC
12
CK-
11
CK_shield
10
CK+
9
D0-
8
D0_shield
7
D0+
6
D1-
5
D1_shield
4
D1+
3
D2-
2
D2_shield
1
D2+
ME @
FOX_QJ111A1-R000H1-7H
FOX_QJ111A1-R000H1-7H_19P-TXX
R341
2.2K_0201_5%
D56
EMC@
1000P_0402_50V7-K
20
GND1
21
GND2
22
GND3
23
GND4
1
D57
EMC@
1000P_0402_50V7-K
2
For EMC
D751
+5VS_HDMI +5VS_HDMI
A A
For PARADE Debug use.
HDMI_CLKN_CONN HDMI_DATA1N_CONN HDMI_DATA0N_CONN HDMI_DATA2N_CONN
5
1 2
R9121 180_0402_1%@
1 2
R9123 180_0402_1%@
1 2
R9125 180_0402_1%@
1 2
R9127 180_0402_1%@
HDMI_HPD_CONN HDMI_CLK_CON HDMI_DAT_CON
HDMI_CLKP_CONN HDMI_DATA1P_CONN HDMI_DATA0P_CONN HDMI_DATA2P_CONN
9 8
6
4
1
HDMI_HPD_CONN
2
HDMI_CLK_CON
47
HDMI_DAT_CON
5
EMC@
3
RCLAMP0524PATCT_SLP2510P8-10-9
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
HDMI_DATA1N_CONN HDMI_DATA1P_CONN HDMI_DATA1P_CONN HDMI_DATA2N_CONN HDMI_DATA2P_CONN HDMI_DATA2P_CONN
2016/09/29
2016/09/29
2016/09/29
3
D52
1
1
2
2
4
4
5
5
3
3
8
EMC@
AZ1043-04F.R7G_DFN2510P10E10-9
LC Future Center Secret Data
LC Future Center Secret Data
LC Future Center Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
HDMI_DATA1N_CONN HDMI_CLKN_CONN
9
10
8
9
HDMI_DATA2N_CONN
7
7
6
6
2013/08/05
2013/08/05
2013/08/05
2
HDMI_CLKP_CONN HDMI_DATA0N_CONN HDMI_DATA0N_CONN HDMI_DATA0P_CONN HDMI_DATA0P_CONN
Title
Title
Title
HDMI CONNECTOR
HDMI CONNECTOR
HDMI CONNECTOR
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet o f
Date: Sheet o f
Date: Sheet o f
D51
1
1
2
2
4
4
5
5
3
3
8
EMC@
AZ1043-04F.R7G_DFN2510P10E10-9
Tuesday, May 09, 2017
Tuesday, May 09, 2017
Tuesday, May 09, 2017
9
10
8
9
7
7
6
6
WWWOOOLLLVVVEEERRRIIINNNEEE444 AAAMMMDDD
WWWOOOLLLVVVEEERRRIIINNNEEE444 AAAMMMDDD
WWWOOOLLLVVVEEERRRIIINNNEEE444 AAAMMMDDD
HDMI_CLKN_CONN HDMI_CLKP_CONN
22 84
22 84
22 84
1
SIT
SIT
SIT
5
Vinafix.com
+3VS_REDRIVER+3VS
400mA
1 2
R10525 0_0603_SM
D D
HOST
TX RX
PCIEG0_SATA0_CTX_GRX_P20 PCIEG0_SATA0_CTX_GRX_N20
PCIEG0_SATA0_CRX_GTX_N20 PCIEG0_SATA0_CRX_GTX_P20
PCIEG0_SATA0_CTX_GRX_P PCIEG0_SATA0_CTX_GRX_P_R PCIEG0_SATA0_CTX_GRX_N
PCIEG0_SATA0_CRX_GTX_N PCIEG0_SATA0_CRX_GTX_P
PCIEG0_SATA0_CTX_GRX_P PCIEG0_SATA0_CTX_GRX_N PCIEG0_SATA0_CRX_GTX_N PCIEG0_SATA0_CRX_GTX_P
4
1. Keep 0 ohm.
2. Change to R-sh ort in SVT.
1 2
C9599 0.22U_0201_6.3V6-K
1 2
C9600 0.22U_0201_6.3V6-K
12
C9601 0.22U_0201_6.3V6-K
12
C9602 0.22U_0201_6.3V6-K R2693 10K_0201_5%
12
1 2
R10531 200K_0201_1%
1 2
R10532 200K_0201_1%
1 2
R10533 200K_0201_1%
1 2
R10534 200K_0201_1%
3
+3VS_REDRIVER
1
10
16
25
U206
PCIEG0_SATA0_CTX_GRX_N_R
R10530 4.7K_0201_5%@
12
PCIEG0_SATA0_CRX_GTX_N_C PCIEG0_SATA0_CRX_GTX_P_C
EN# B_SWB
B_FGB B_EQB1 B_EQB0 A_EQA0
2
AIP
3
AIN
5
TEST#
8
BON
9
BOP
11
EN#
12
SWB
14
FGB
15
EQB1
20
EQB0
GND_1
GND_26GND_3
4
7
MODE
SWA
VDD_1
VDD_2
VDD_3
VDD_4
FGA
EQA1
AOP AON
BIN BIP
EQA0
GND_4
GND_5
GND_6
GND_7
HGND
PI3EQX12902AZLE_TQFN30_2P5X4P5
13
19
22
28
31
30 29 27 26 24 23 18 17 21
+3VS_REDRIVER
1
C9605
0.1U_0201_6.3V6-K
2
REDR_MODE A_SWA A_FGA A_EQA1 PCIEG0_SATA0_CTX_GRX_P_CONN_C PCIEG0_SATA0_CTX_GRX_N_CONN_C PCIEG0_SATA0_CRX_GTX_N_CONN_C PCIEG0_SATA0_CRX_GTX_P_CONN_C
1
C9603
0.1U_0201_6.3V6-K
2
REDR_MODE 24
R10454 0_0201_5% R10455 0_0201_5% R10448 0_0201_5% R10447 0_0201_5%
1. Keep 0 ohm.
2. Change to R-sh ort in SVT.
2
1
C2726
0.1U_0201_6.3V6-K
2
MODE 0 1
12 12 12 12
1
C2727
0.1U_0201_6.3V6-K
2
SATA PCIE
PCIEG0_SATA0_CTX_GRX_P_CONN PCIEG0_SATA0_CTX_GRX_N_CONN PCIEG0_SATA0_CRX_GTX_N_CONN PCIEG0_SATA0_CRX_GTX_P_CONN
1
C2728 10U_0402_6.3V6-M
2
PCIEG0_SATA0_CTX_GRX_P_CONN 24 PCIEG0_SATA0_CTX_GRX_N_CONN 24 PCIEG0_SATA0_CRX_GTX_N_CONN 24 PCIEG0_SATA0_CRX_GTX_P_CONN 24
1
RX
Device
TX
+3VS_REDRIVER +3VS_REDRIVER +3VS_REDRIVER+3VS_REDRIVER +3V S_REDRIVER + 3VS_REDRIVER
C C
12
R9411
@
4.7K_0201_5%
12
R9443
@
4.7K_0201_5%
HOST
12
A_EQA1 B_EQB1 B_FGBA_FGA
12
PCIE_CTX_GRX_P1_C5 PCIE_CTX_GRX_N1_C5
TX RX
R9413
@
4.7K_0201_5%
R9445
@
4.7K_0201_5%
PCIE_CRX_GTX_N15 PCIE_CRX_GTX_P15
REDR_EN#24
12
R9447
@
4.7K_0201_5%
12
R9448
@
4.7K_0201_5%
12
R9449
@
4.7K_0201_5%
12
R9450
@
4.7K_0201_5%
PCIE_CTX_GRX_P1_C PCIE_CTX_GRX_N1_C
PCIE_CRX_GTX_N1 PCIE_CRX_GTX_P1 REDR_EN#
12
R10518
@
4.7K_0201_5%
12
R10520
@
4.7K_0201_5%
12
C2724 0.22U_0201_6.3V6-K
12
C2725 0.22U_0201_6.3V6-K
EN#
12
R10524
@
4.7K_0201_5%
12
R10521
@
4.7K_0201_5%
0
B B
+3VS_REDRIVER +3VS_REDRIVER +3VS_REDRIVER +3VS_REDRIVER +3V S_REDRIVER + 3VS_REDRIVER
12
12
R2706
@
4.7K_0201_5%
R2714
@
4.7K_0201_5%
12
R2712
@
4.7K_0201_5%
12
R2709
@
4.7K_0201_5%
12
R2707
@
4.7K_0201_5%
PCIE_B_FGBPCIE_A_EQA1PCIE_B_EQB1
12
R2710
@
4.7K_0201_5%
12
R2711
@
4.7K_0201_5%
PCIE_A_FGA
12
R2713
@
4.7K_0201_5%
12
R10517
@
4.7K_0201_5%
B_SWBA_SWA
12
R10519
@
4.7K_0201_5%
12
R10523
@
4.7K_0201_5%
PCIE_A_SWAPCIE_B_SWB
12
R10522
@
4.7K_0201_5%
R10539 4.7K_0201_5%@
Normal Disable1
+3VS_REDRIVER +3VS_REDRIVER
12
R10535
@
4.7K_0201_5%
B_EQB0 A_EQA0
12
R10537
@
4.7K_0201_5%
12
PCIE_CRX_GTX_N1_C PCIE_CRX_GTX_P1_C
PCIE_B_SWB PCIE_B_FGB PCIE_B_EQB1 PCIE_B_EQB0 PCIE_A_EQA0
+3VS_REDRIVER+3VS_REDRIVER
12
R10540
@
4.7K_0201_5%
PCIE_B_EQB0 PCIE_A_EQA0
12
R10542
@
4.7K_0201_5%
2017/03/22 Change PCIE Redriver solution from Limited to linear
12
R10536
@
4.7K_0201_5%
12
R10538
@
4.7K_0201_5%
+3VS_REDRIVER
1
+3VS_REDRIVER
1
10
16
25
U308
2
AIP
3
AIN
MODE
TEST#
SWA
VDD_1
VDD_2
VDD_3
VDD_4 BON BOP EN# SWB FGB EQB1 EQB0
FGA
EQA1
AOP AON
BIN BIP
EQA0
GND_1
GND_26GND_3
GND_4
GND_5
GND_6
GND_7
HGND
7
13
19
22
28
31
PI3EQX12902AZLE_TQFN30_2P5X4P5
4
2017/03/22 Change PCIE Redriver solution from Limited to linear
12
R10541
@
4.7K_0201_5%
12
R10543
@
4.7K_0201_5%
5 8
9 11 12 14 15 20
C9606
0.1U_0201_6.3V6-K
2
30
R2708 10K_0201_5%
PCIE_A_SWA
29
PCIE_A_FGA
27
PCIE_A_EQA1
26
PCIE_CTX_GRX_P1_CONN_C
24
PCIE_CTX_GRX_N1_CONN_C
23
PCIE_CRX_GTX_N1_CONN_C PCIE_CRX_GTX_N1_CONN
18
PCIE_CRX_GTX_P1_CONN_C
17 21
12
+3VS_REDRIVER
12 12 12 12
1
C2719
0.1U_0201_6.3V6-K
2
1
C9604
0.1U_0201_6.3V6-K
2
R10284 0_0201_5% R10283 0_0201_5% R10282 0_0201_5% R10281 0_0201_5%
1. Keep 0 ohm.
2. Change to R-sh ort in SVT.
1
C2720
0.1U_0201_6.3V6-K
2
PCIE_CTX_GRX_P1_C_CONN PCIE_CTX_GRX_N1_C_CONN
PCIE_CRX_GTX_P1_CONN
1
C2721 10U_0402_6.3V6-M
2
PCIE_CTX_GRX_P1_C_CONN 24 PCIE_CTX_GRX_N1_C_CONN 24 PCIE_CRX_GTX_N1_CONN 24 PCIE_CRX_GTX_P1_CONN 24
RX
TX
Device
TABLE: PI3EQX12902BZLE Input Equalization Setting (EQ_A & EQ_B)
@3GHz
A A
GND
Open
VDD
6.3 dB
4.7 dB (Default)
8.2 dB
@4GHz
8.7 dB
6.7 dB (Default)
10.8 dB
TABLE: PI3EQX862 Output De-emphasis Setting (DE_A & DE_B)
-2.5 dB
0 dB (Default)
-4 dB
LOGIC
GND
Open
VDD
LOGIC
TABLE: Mode Configuration Table
EN#
Low
Low
High
MODE
Low
High
X
Mode
SATA Application
PCIe Application
Disable
Title
Title
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM T HE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM T HE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM T HE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUT HORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUT HORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUT HORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY T HIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISCLOSED TO ANY T HIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
5
4
MAY BE USED BY OR DISCLOSED TO ANY T HIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
3
2015/11/02
2015/11/02
2015/11/02
LC Future Center Secret Data
LC Future Center Secret Data
LC Future Center Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
2015/08/10
2015/08/10
2015/08/10
Title
STORAGE I/F REDRIVER
STORAGE I/F REDRIVER
STORAGE I/F REDRIVER
Size
Size
Size
Document Number Rev
Document Number Rev
Document Number Rev
Custom
Custom
Custom Date: Sheet of
Date: Sheet of
Date: Sheet of
WWWOOOLLLVVVEEERRRIIINNNEEE444 AAAMMMDDD
WWWOOOLLLVVVEEERRRIIINNNEEE444 AAAMMMDDD
WWWOOOLLLVVVEEERRRIIINNNEEE444 AAAMMMDDD
Tuesday, May 09, 2017
Tuesday, May 09, 2017
Tuesday, May 09, 2017
1
23 84
23 84
23 84
SIT
SIT
SIT
5
Vinafix.com
1 2
R744 0_0402_5%@
Q26
D
D D
C C
B B
HDD_DEVSLP09
HDD_DEVSLP0 HDD_DEVSLP0_CONN
DEVSLP_GATE#10
+5VS_HDD
2
C75
EMC@
0.1U_0402_25V6-K
1
PLT_RST#10,16,29,35,37,50
APU_SSD_RST#10
PLT_RST# APU_SSD_RST#
S
C76 10U_0603_6.3V6M
1 2
13
2N7002WT1G_1N_SC-70-3
G
A. Vth = 2.5V (MAX)
2
B. Id = 340 mA (MAX) C. RDSon = 2.5 ohm(MAX) D. Vth in schematic = 3.3V
1
C32 1000P_0402_50V7-K
2
1
2
D753
3 2
BAT54AWT1G_SOT323-3
C271
RF@
68P_0201_25V8-J
1
IF DE T10
PCIE_SATA_SEL20
4
1
C301
RF@
0.1U_0201_6.3V6-K
2
SSD_RST#
+3VS
12
R10495 10K_0201_5%
SSD_RST# 36
R10497 0_0201_SM
12
IFDET
1
C9587
EMC@
0.1U_0402_25V6-K
2
REDR_EN# 0 1
3
CLK_PCIE_SSD#9
PCIEG0_SATA0_CTX_GRX_P_CONN23
PCIEG0_SATA0_CTX_GRX_N_CONN23 PCIEG0_SATA0_CRX_GTX_N_CONN23
PCIEG0_SATA0_CRX_GTX_P_CONN23
CLK_PCIE_SSD9
PCIE_CTX_GRX_P1_C_CONN23
PCIE_CTX_GRX_N1_C_CONN23
PCIE_CRX_GTX_N1_CONN23
PCIE_CRX_GTX_P1_CONN23
CLKREQ_PCIE_SSD#10
HDD_DETECT#51
F7
+3VS
2 1
3A_32V_ERBRD3R00X F41
2 1
3A_32V_ERBRD3R00X
+5VS
IFDET
SATA
0 1
PCIE
+3VS
12
R10549
@
10K_0201_5%
13
D
IF DE T
12
1 0
2
G
R2037 20K_0402_5%
REDR_PE_EN#
1 0
Q178 LSK3541G1ET2L_VMT3
A. Vth = 1.5V (MAX) B. Id = ? mA (MAX)
S
C. RDSon = 13 ohm(MAX) D. Vth in schematic = 0 - 3.3V
REDR_MODE
0 1
+3VS_REDRIVER
12
R10496 10K_0201_5%
2
CLK_PCIE_SSD# CLK_PCIE_SSD
PCIEG0_SATA0_CTX_GRX_P_CONN PCIEG0_SATA0_CTX_GRX_N_CONN
PCIEG0_SATA0_CRX_GTX_N_CONN PCIEG0_SATA0_CRX_GT X_P_CONN
PCIE_CTX_GRX_P1_C_CONN PCIE_CTX_GRX_N1_C_CONN
PCIE_CRX_GTX_N1_CONN PCIE_CRX_GTX_P1_CONN
SSD_RST# CLKREQ_PCIE_SSD# HDD_DEVSLP0_CONN
IF DE T HDD_DETECT#
+5VS_HDD
+3VS_HDD
REDR_EN#
+3VS_REDRIVER
12
R2720 10K_0402_5%
13
D
2
G
Q224 LSK3541G1ET2L_VMT3
A. Vth = 1.5V (MAX) B. Id = ? mA (MAX)
S
C. RDSon = 13 ohm(MAX) D. Vth in schematic = 2.8V
J1
40
40
39
39
38
38
37
37
36
36
35
35
34
34
33
33
32
32
31
31
30
30
29
29
28
28
27
27
26
26
25
25
24
24
23
23
22
22
21
21
20
20
19
19
18
18
17
17
16
16
15
15
14
14
13
13
12
12
11
11
10
10
9
9
8
8
7
7
6
6
5
5
4
4
3
3
2
2
1
1
I-PEX_20525-040E-02
ME @
REDR_EN# 23
REDR_MODE 23
GND12 GND11 GND10
GND9 GND8 GND7 GND6 GND5 GND4 GND3 GND2 GND1
52 51 50 49 48 47 46 45 44 43 42 41
EN#
0 Normal 1 Disa bl e
MODE 0 1
1
SATA PCIE
A A
5
4
2017/03/22 Change PCIE Redriver solution from Limited to linear
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
3
2016/09/29
2016/09/29
2016/09/29
LC Future Center Secret Data
LC Future Center Secret Data
LC Future Center Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2015/08/10
2015/08/10
2015/08/10
2
Title
Title
Title
SATA HDD CONNNECTOR
SATA HDD CONNNECTOR
SATA HDD CONNNECTOR
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Tuesday, May 09, 2017
Tuesday, May 09, 2017
Date: Sheet o f
Date: Sheet o f
Date: Sheet o f
Tuesday, May 09, 2017
WWWOOOLLLVVVEEERRRIIINNNEEE444 AAAMMMDDD
WWWOOOLLLVVVEEERRRIIINNNEEE444 AAAMMMDDD
WWWOOOLLLVVVEEERRRIIINNNEEE444 AAAMMMDDD
24 84
24 84
24 84
1
SITCustom
SITCustom
SITCustom
5
Vinafix.com
4
3
2
1
D D
+3VS
1
C9530
U202@
0.1U_0201_10V6-K
2
1
C9531
U202@
0.01U_0201_25V6-K
2
1
C9532
U202@
22P_0201_25V8-J
2
1
C9533
U202@
2200P_0201_25V7-K
2
USB3.0 Repeator Port 1Close U202
+3VS
U202
1
VDD1
13
RE_AA_EQ1 RE_AA_DE0 RE_AA_EQ0 RE_AA_DE1
1 2
USB3P1_TXP9
C C
+3VS
R10379 4.7K_0201_5%@
USB3P1_TXN9
USB3P1_RE_RXP26 USB3P1_RE_RXN26
1
2
Normal LFPS mode Internal PD
+3VS
B B
2
R10384 4.7K_0201_5%@
2
R10387 4.7K_0201_5%@
2
R10390 4.7K_0201_5%@
2
R10391 4.7K_0201_5%@
1 1 1 1
C9534 0.1U_0201_10V6-KU202@ C9535 0.1U_0201_10V6-KU202@
R10376 0_0201_5%U202@ R10377 0_0201_5%U202@
RE_TEST_2
RE_AA_EQ0 RE_AA_EQ1 RE_BB_EQ0 RE_BB_EQ1
1 2
1 2 1 2
1 2
R10378 4.99K_0402_1%U202@
USB3P1_TXP USB3P1_TXP_R
USB3P1_RXP
USB3P1_RXN USB3P1_RE_RXN
C9555 0.1U_0201_10V6-KU202_NS@
C9556 0.1U_0201_10V6-KU202_NS@
R10385 0_0201_5%U202_NS@
R10388 0_0201_5%U202_NS@
USB3P1_TXP_C USB3P1_TXN_C
USB3P1_RE_RXP_R USB3P1_RE_RXN_R
1
TP153 Test_Point_12MIL
RE_TEST_2
1 2
1 2
1 2
1 2
VDD2
15
A_EQ1_SDA_CTL
16
A_DE0_SCL_CTL
17
A_EQ0_NC
18
A_DE1_NC
19
A_INp
20
A_INn
9
B_INp
8
B_INn
5
PD#
7
REXT
14
TEST
24
I2C_EN
U202@
S IC PS8713BTQFN24GTR2-A2 USB3 REPEATER
B_EQ1_I2C_ADDR1 B_DE0_I2C_ADDR0
USB3P1_TXN_RUSB3P1_TXN
USB3P1_RXP_R
USB3P1_RXN_R
B_EQ0_NC
B_DE1_NC
A_OUTp A_OUTn
B_OUTp B_OUTn
GND1 GND2
GPAD
RE_BB_EQ1
4
RE_BB_DE0
3
RE_BB_EQ0
2
RE_BB_DE1
6
USB3P1_RE_TXP_R
12
USB3P1_RE_TXN_R
11
USB3P1_RXP_C
22
USB3P1_RXN_C
23
10 21 25
1 2
R10381 0_0201_5%U202_NS@
1 2
R10383 0_0201_5%U202_NS@
C9557 0.1U_0201_10V6-KU202_NS@
C9558 0.1U_0201_10V6-KU202_NS@
12
12
1 2
R10374 0_0201_5%U202@
1 2
R10375 0_0201_5%U202@
12
C9536 0.1U_0201_10V6-KU202@
12
C9537 0.1U_0201_10V6-KU202@
USB3P1_RE_TXP
USB3P1_RE_TXN
USB3P1_RE_RXP
USB3P1_RE_TXP 26 USB3P1_RE_TXN 26
USB3P1_RXP 9 USB3P1_RXN 9
EQ Default 9.5dB Internal PD
+3VS
2
R10392 4.7K_0201_5%@ R10393 4.7K_0201_5%@ R10394 4.7K_0201_5%@ R10395 4.7K_0201_5%@
1
2
1
2
1 1
2
RE_AA_DE0 RE_AA_DE1 RE_BB_DE0 RE_BB_DE1
de-emohasis Default 3.5dB Internal PD
A A
Title
Title
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
3
2016/09/29
2016/09/29
2016/09/29
LC Future Center Secret Data
LC Future Center Secret Data
LC Future Center Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
2015/08/10
2015/08/10
2015/08/10
Title
USB3.0 Repeator
USB3.0 Repeator
USB3.0 Repeator
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet o f
Date: Sheet o f
Date: Sheet o f
WWWOOOLLLVVVEEERRRIIINNNEEE444 AAAMMMDDD
WWWOOOLLLVVVEEERRRIIINNNEEE444 AAAMMMDDD
WWWOOOLLLVVVEEERRRIIINNNEEE444 AAAMMMDDD
Tuesday, May 09, 2017
Tuesday, May 09, 2017
Tuesday, May 09, 2017
25 84
25 84
1
25 84
SIT
SIT
SIT
5
Vinafix.com
+5VALW
4
3
2
1
1
C274
RF@
100P_0201_25V8J
D D
C C
2
USB3P1_RE_RXN25
USB3P1_RE_RXP25
USB3P1_RE_TXN25
USB3P1_RE_TXP25
2
C107
@
4.7U_0402_6.3V6M
1
USB20_N5_AOU9
USB3P1_RE_RXN
USB3P1_RE_RXP
USB3P1_RE_TXN
USB3P1_RE_TXP
2
C108
0.1u_0201_10V6K
1
USB20_P5_AOU9
USB_OC1#10
AO U_E N52 AOU_CTL152 AOU_CTL352
USB20_P5_AOU USB20_N5_AOU
USB_OC1# AO U_E N
AOU_CTL1 +5VALW
AOU_CTL3
Current Limit Target:
2.3A(2.1A - 2.45A)
U12
1
IN
3
DP_OUT
2
DM_OUT
13
FAULT#
5
EN
6
CLT1
7
CLT2
8
CLT3
TPS2546RTER_QFN16_4X4
USB20_N5_AOU_OUT
USB20_P5_AOU_OUT
OUT
DP_IN
DM_IN
GND
STATUS# ILIM_SEL
ILIM_LO
ILIM_HI
GND_Pad
E_L1
1
1
4
4
EMC@
EXC24CH900U_4P E_L2
1
1
4
4
EMC@
EXC24CH900U_4P E_L3
1
1
4
4
EMC@
EXC24CH900U_4P
+5VALW_CHGUSB
12
USB20_P5_AOU_OUT
10
USB20_N5_AOU_OUT
11 14
AOU_DET#
9 4
+5VALW
1 2
15
N31995447
R89 20K_0402_1%@
16
R90 20K_0402_1%
17
2
2
3
3
2
2
3
3
2
2
3
3
12
USB20_N5_AOU_CONN USB20_P5_AOU_CONN
USB3P1_RE_RXN_CONN USB3P1_RE_RXP_CONN
USB3P1_RE_TXN_CONN USB3P1_RE_TXP_CONN
AO U_D ET# 52
J34
1
VBUS
2
D-
3
D+
4
GND_1
5
StdA_SSRX-
6
StdA_SSRX+
7
GND_DRAIN
8
StdA_SSTX-
9
StdA_SSTX+
ME @
SINGA_2UB3908-000101F
GND_2 GND_3 GND_4 GND_5
WIDE PATTERN(MIN 500mA) PLACE NEAR USB CONN
1
+
C101 150U_B2_6.3VM_R35M
2
10 11 12 13
2
C100
0.1u_0201_10V6K
1
+5VALW_CHGUSB
12
C99
EMC@
0.1U_0402_10V6-K
B B
USB20_N5_AOU_OUT USB20_P5_AOU_OUT US B20_P5_AOU_CONN
USB3P1_RE_RXP USB3P1_RE_TXN USB3P1_RE_TXP
1 2
R10427 0_0402_5%@
1 2
R10428 0_0402_5%@
2
R10429 0_0402_5%@
2
R10430 0_0402_5%@
2
R10431 0_0402_5%@
2
R10432 0_0402_5%@
1 1 1 1
USB20_N5_AOU_CONN
USB3P1_RE_RXN_CONNUSB3P1_RE_RXN USB3P1_RE_RXP_CONN USB3P1_RE_TXN_CONN USB3P1_RE_TXP_CONN
USB20_P5_AOU_CONN
D13
1
2
3
EMC@
IP4223CZ6 SO-6 ESD
6
5
USB20_N5_AOU_CONN
4
USB3P1_RE_TXP_CONN USB3P1_RE_TXN_CONN USB3P1_RE_RXP_CONN USB3P1_RE_RXN_CONN
D15
1 2 4 7 5
EMC@
3
RCLAMP0524PATCT_SLP2510P8-10-9
USB3P1_RE_TXP_CONN
9
USB3P1_RE_TXN_CONN
8
USB3P1_RE_RXP_CONN USB3P1_RE_RXN_CONN
6
A A
Title
Title
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
3
2016/09/29
2016/09/29
2016/09/29
LC Future Center Secret Data
LC Future Center Secret Data
LC Future Center Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2015/08/10
2015/08/10
2015/08/10
2
Title
USB POWER/CONNECTOR
USB POWER/CONNECTOR
USB POWER/CONNECTOR
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Tuesday, May 09, 2017
Tuesday, May 09, 2017
Date: Sheet o f
Date: Sheet o f
Date: Sheet o f
Tuesday, May 09, 2017
WWWOOOLLLVVVEEERRRIIINNNEEE444 AAAMMMDDD
WWWOOOLLLVVVEEERRRIIINNNEEE444 AAAMMMDDD
WWWOOOLLLVVVEEERRRIIINNNEEE444 AAAMMMDDD
26
26
26
1
84
84
84
SIT
SIT
SIT
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