NGEF(KEY E)
WIFI/BT MODULE
PCle X4
USB2.0
GSPI
12C
gerprint connector
Fin
FPC to touch panel
Changer
Power LED
Hall sensor
<XR_PAGE_TITLE>
TABLE OF CONTENTS
6
3
2 87 54 1
01 -- COVER PAGE
D
02 -- TABLE OF CONTENTS
03--SKL-U(1/12)DDI,MISC,XDP,EDP
04--SKL-U(2/12)DDR4
05--SKL-U(3/12)SPI,ESPI,SMB,LPC
06--SKL-U(4/12)HDA,EMMC,SD
07--SKL-U(5/12)CLK,GPIO
08--SKL-U(6/12)GPIO
09--SKL-U(7/12)PCIE,USB,SATA
C
10--SKL-U(8/12)Power
11--SKL-U(9/12)Power
12--SKL-U(10/12)Power,SVID
13--SKL-U(11/12)GND
14--SKL-U(12/12)RSVD
15--SOC (DECOUPLING)
16--NA
17--NA
18--NA
B
19--DDR4_CHA
20--DDR4_CHB
21--DDR4 Decoupling
22--NA
23--RF / EMC Solution
24 -- SYSTEM FLASH
25 -- NC_EMMC
26 -- PCIE SSD MODULE
27 -- NC_MICRO-SD CARD
A A
28 -- NC_SD CARD POWER
29 -- CPU THERMAL SENSOR
30 -- FAN conn
31 -- Finger print
32 -- NA
33 -- NA
34 -- NC_HDMI LEVEL SHIFTERS
35 -- NC_HDMI CONNECTOR
36 -- DISPLAY
37 -- TOUCH PANEL AND DOCK
38 -- SENSORS & LID
39 -- FRONT AND REAR CAMERA CON
40 -- CAMERA DISCRETE CONTROLL
41 -- TPM
42 -- USB3.0 CONN
43 -- WLAN WIFI BT MODULE
44 -- WWAN MODULE
45 -- MICRO SIM
46 -- AUDIO CODEC
47 -- AUDIO-MIC AND SPKRS
48 -- IO board CONN
49 -- DC JACK
50 -- EMBEDDED CONTROLLER
51 -- BUTTON & LED
52 -- TYPE-C MULTIPLEXER
53 -- TYPE-C PD CONTROLLER
54 -- NC_TYPE-C BOOST VR
55 -- TYPE-C CONNECTOR
56 -- UART CONN & HOLE & CLIP
57 -- HW Change list
58--PWR_DCIN/BATT CONN
59--PWR_CHARGER(OZ8690)
60--PWR-+V5P0A / +V3P3A
61--PWR-DDR
62--PWR-+V2P5U_VPP
63--PWR-+1.0V_PRIM
64--PWR-NA
65--PWR-+1.8V_PRIM
66--PWR-CPU VR IC
67--PWR-VCC_CORE/GT/SA
68--PWR-Block Diagram
69--PWR_Change list
D
C
B
87
INTERNAL ONLY
BPAGE DRAWING
sky_y_mrd._
Wed Jun 03 11:22:42 2015
Project:
Project:
Project:
Engineer:
Engineer:
Size
Size
Size
Title:
Title:
Title:
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
3 4
2
Engineer:
TABLE OF CONTENTS
TABLE OF CONTENTS
TABLE OF CONTENTS
Miix510
Miix510
Miix510
Jacky
Jacky
Jacky
Rev
Rev
Rev
V01
V01
2 69 Tuesday, June 27, 2017
2 69 Tuesday, June 27, 2017
2 69 Tuesday, June 27, 2017
V01
1 5 6
A
1 1
B
DDI2_TX0_DN 52
DDI2_TX0_DP 52
DDI2_TX1_DN 52
DDI2_TX1_DP 52
R1092
2.2K
5%
R0402_N
I
DDI2_TX2_DN 52
DDI2_TX2_DP 52
DDI2_TX3_DN 52
DDI2_TX3_DP 52
No need HDMI
TOUCH_PANEL_RESET_N 37
24.9R
I R0402 1%
<Type-c>
+V3P3A
+1.0VS_VCCIO
R1009
C
<No need HDMI>
DDI1_DDC_SDA
TP_DDI2_DDC_SCL
DDI2_DDC_SDA
EDP_COMP
UC1A
E55
DDI1_TXN[0]
F55
DDI1_TXP[0]
E58
DDI1_TXN[1]
F58
DDI1_TXP[1]
F53
DDI1_TXN[2]
G53
DDI1_TXP[2]
F56
DDI1_TXN[3]
G56
DDI1_TXP[3]
C50
DDI2_TXN[0]
D50
DDI2_TXP[0]
C52
DDI2_TXN[1]
D52
DDI2_TXP[1]
A50
DDI2_TXN[2]
B50
DDI2_TXP[2]
D51
DDI2_TXN[3]
C51
DDI2_TXP[3]
L13
GPP_E18/DDPB_CTRLCLK
L12
GPP_E19/DDPB_CTRLDATA
N7
GPP_E20/DDPC_CTRLCLK
N8
GPP_E21/DDPC_CTRLDATA
N11
GPP_E22/DDPD_CTRLCLK
N12
GPP_E23/DDPD_CTRLDATA
E52
EDP_RCOMP
SKL-U_BGA1356
@
SKL-U
DDI
DISPLAY SIDEBANDS
1 OF 20
D
Rev_0.53
C47
EDP_TXN[0]
C46
EDP_TXP[0]
D46
EDP_TXN[1]
C45
EDP_TXP[1]
A45
EDP_TXN[2]
B45
EDP_TXP[2]
A47
EDP_TXN[3]
B47
EDP_TXP[3]
E45
EDP
EDP_AUXN
EDP_AUXP
EDP_DISP_UTIL
DDI1_AUXN
DDI1_AUXP
DDI2_AUXN
DDI2_AUXP
DDI3_AUXN
DDI3_AUXP
GPP_E13/DDPB_HPD0
GPP_E14/DDPC_HPD1
GPP_E15/DDPD_HPD2
GPP_E16/DDPE_HPD3
GPP_E17/EDP_HPD
EDP_BKLTEN
EDP_BKLTCTL
EDP_VDDEN
F45
B52
G50
F50
E48
F48
G46
F46
DDI1_HPD
L9
DDI2_HPD
L7
TP_SMC_EXTSMI_N
L6
SMC_RUNTIME_SCI_N
N9
EDP_HPD
L10
R12
R11
U13
EDP_TX0_SOC_DN 36
EDP_TX0_SOC_DP 36
EDP_TX1_SOC_DN 36
EDP_TX1_SOC_DP 36
EDP_TX2_SOC_DN 36
EDP_TX2_SOC_DP 36
EDP_TX3_SOC_DN 36
EDP_TX3_SOC_DP 36
EDP_AUX_SOC_DN 36
EDP_AUX_SOC_DP 36
DDI2_AUX_DN 52
DDI2_AUX_DP 52
TP9991 TP1064
DDI2_HPD 50,53
TP1049 TP1063
SMC_RUNTIME_SCI_N 50
EDP_HPD 36
EDP_BKLT_EN 36
EDP_BKLT_PWM 36
EDP_VDD_EN 36
E
<eDP>
No need HDMI
From eDP
+1.0VS_VCCSTG
R1024
1K
R0402
+1.0V_VCCST
2 2
R1021 1K
THERMTRIP_SOC_N
I R0402_N 1%
PROCHOT_N 50,66
5%
I
PECI_EC 50
CRB install 499R,ARMOUR install 0R
R1022 43R
R1023 499R
TOUCH_PANEL_INT_N 37
HW_ID3 7,31
R1025 49.9R
R1026 49.9R
RC7 49.9R
RC8 49.9R
5/17 update
WOV_KILL_N 47
BT_RF_KILL_N 43
TP1019
I R0402_N1%
I R0402 1%
I R0402 1%
I R0402 1%
I R0402 1%
I R0402 1%
CATERR_SOC_N
PECI_SOC
H_PROCHOT#_R
THERMTRIP_SOC_N
CPU_POPIRCOMP
PCH_OPIRCOMP
EDRAM_OPIO_RCOMP
EOPIO_RCOMP
D63
A54
C65
C63
A65
C55
D55
B54
C56
A6
A7
BA5
AY5
AT16
AU16
H66
H65
UC1D
CATERR#
PECI
PROCHOT#
THERMTRIP#
SKTOCC#
BPM#[0]
BPM#[1]
BPM#[2]
BPM#[3]
GPP_E3/CPU_GP0
GPP_E7/CPU_GP1
GPP_B3/CPU_GP2
GPP_B4/CPU_GP3
PROC_POPIRCOMP
PCH_OPIRCOMP
OPCE_RCOMP
OPC_RCOMP
SKL-U_BGA1356
@
CPU MISC
SKL-U
4 OF 20
JTAG
Rev_0.53
PROC_TCK
PROC_TDI
PROC_TDO
PROC_TMS
PROC_TRST#
PCH_JTAG_TCK
PCH_JTAG_TDI
PCH_JTAG_TDO
PCH_JTAG_TMS
PCH_TRST#
JTAGX
B61
D60
A61
C60
B59
B56
D59
A56
C59
C61
A59
XDP_TCK0
XDP_TDI
XDP_TDO
XDP_TMS
XDP_TRST_N
XDP_TCK1_PCH
XDP_TDI
XDP_TDO
XDP_TMS
XDP_TRST_N
XDP_TCK0
+V3P3A
+1.0VS_VCCIO
+1.0VS_VCCSTG
+1.0V_VCCST
3 3
4 4
A
+V3P3A 4,5,6,7,9,10,11,23,24,29,31,37,38,42,47,49,50,51,52,53,56,60,62,65,66,67
+1.0VS_VCCIO 10,14
+1.0VS_VCCSTG 10,12
+1.0V_VCCST 7,10,12,14,66
+1.0VS_VCCSTG
I R0402 5%
R1028 51R
R1029 51R
R1027 51R
R1031 51R
R1034 51R
R1032 51R
R1033 51R
NIR0402 5%
NIR0402 5%
NIR0402 5%
NIR0402 5%
I R0402 5%
NIR0402 5%
B
XDP_TDO
XDP_TMS
XDP_TDI
XDP_TCK0
XDP_TCK1_PCH
XDP_TCK0
XDP_TRST_N
Project:
Project:
Project:
Miix510
Miix510
Miix510
Jacky
Jacky
Engineer:
Engineer:
Size
Size
Size
Title:
Title:
Title:
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
C
D
Date: Sheet of
Engineer:
SKL-U(1/12)DDI,MISC,XDP,EDP
SKL-U(1/12)DDI,MISC,XDP,EDP
SKL-U(1/12)DDI,MISC,XDP,EDP
Jacky
E
Rev
Rev
Rev
V01
V01
V01
3 69 Tuesday, June 27, 2017
3 69 Tuesday, June 27, 2017
3 69 Tuesday, June 27, 2017
5
4
3
2
1
Non‐Interleaved
UC1B
D D
C C
B B
M_A_DQ<0> 19
M_A_DQ<1> 19
M_A_DQ<2> 19
M_A_DQ<3> 19
M_A_DQ<4> 19
M_A_DQ<5> 19
M_A_DQ<6> 19
M_A_DQ<7> 19
M_A_DQ<8> 19
M_A_DQ<9> 19
M_A_DQ<10> 19
M_A_DQ<11> 19
M_A_DQ<12> 19
M_A_DQ<13> 19
M_A_DQ<14> 19
M_A_DQ<15> 19
M_A_DQ<32> 19
M_A_DQ<33> 19
M_A_DQ<34> 19
M_A_DQ<35> 19
M_A_DQ<36> 19
M_A_DQ<37> 19
M_A_DQ<38> 19
M_A_DQ<39> 19
M_A_DQ<40> 19
M_A_DQ<41> 19
M_A_DQ<42> 19
M_A_DQ<43> 19
M_A_DQ<44> 19
M_A_DQ<45> 19
M_A_DQ<46> 19
M_A_DQ<47> 19
M_B_DQ<0> 20
M_B_DQ<1> 20
M_B_DQ<2> 20
M_B_DQ<3> 20
M_B_DQ<4> 20
M_B_DQ<5> 20
M_B_DQ<6> 20
M_B_DQ<7> 20
M_B_DQ<8> 20
M_B_DQ<9> 20
M_B_DQ<10> 20
M_B_DQ<11> 20
M_B_DQ<12> 20
M_B_DQ<13> 20
M_B_DQ<14> 20
M_B_DQ<15> 20
M_B_DQ<32> 20
M_B_DQ<33> 20
M_B_DQ<34> 20
M_B_DQ<35> 20
M_B_DQ<36> 20
M_B_DQ<37> 20
M_B_DQ<38> 20
M_B_DQ<39> 20
M_B_DQ<40> 20
M_B_DQ<41> 20
M_B_DQ<42> 20
M_B_DQ<43> 20
M_B_DQ<44> 20
M_B_DQ<45> 20
M_B_DQ<46> 20
M_B_DQ<47> 20
AL71
DDR0_DQ[0]
AL68
DDR0_DQ[1]
AN68
DDR0_DQ[2]
AN69
DDR0_DQ[3]
AL70
DDR0_DQ[4]
AL69
DDR0_DQ[5]
AN70
DDR0_DQ[6]
AN71
DDR0_DQ[7]
AR70
DDR0_DQ[8]
AR68
DDR0_DQ[9]
AU71
DDR0_DQ[10]
AU68
DDR0_DQ[11]
AR71
DDR0_DQ[12]
AR69
DDR0_DQ[13]
AU70
DDR0_DQ[14]
AU69
DDR0_DQ[15]
BB65
DDR0_DQ[16]/DDR0_DQ[32]
AW65
DDR0_DQ[17]/DDR0_DQ[33]
AW63
DDR0_DQ[18]/DDR0_DQ[34]
AY63
DDR0_DQ[19]/DDR0_DQ[35]
BA65
DDR0_DQ[20]/DDR0_DQ[36]
AY65
DDR0_DQ[21]/DDR0_DQ[37]
BA63
DDR0_DQ[22]/DDR0_DQ[38]
BB63
DDR0_DQ[23]/DDR0_DQ[39]
BA61
DDR0_DQ[24]/DDR0_DQ[40]
AW61
DDR0_DQ[25]/DDR0_DQ[41]
BB59
DDR0_DQ[26]/DDR0_DQ[42]
AW59
DDR0_DQ[27]/DDR0_DQ[43]
BB61
DDR0_DQ[28]/DDR0_DQ[44]
AY61
DDR0_DQ[29]/DDR0_DQ[45]
BA59
DDR0_DQ[30]/DDR0_DQ[46]
AY59
DDR0_DQ[31]/DDR0_DQ[47]
AY39
DDR0_DQ[32]/DDR1_DQ[0]
AW39
DDR0_DQ[33]/DDR1_DQ[1]
AY37
DDR0_DQ[34]/DDR1_DQ[2]
AW37
DDR0_DQ[35]/DDR1_DQ[3]
BB39
DDR0_DQ[36]/DDR1_DQ[4]
BA39
DDR0_DQ[37]/DDR1_DQ[5]
BA37
DDR0_DQ[38]/DDR1_DQ[6]
BB37
DDR0_DQ[39]/DDR1_DQ[7]
AY35
DDR0_DQ[40]/DDR1_DQ[8]
AW35
DDR0_DQ[41]/DDR1_DQ[9]
AY33
DDR0_DQ[42]/DDR1_DQ[10]
AW33
DDR0_DQ[43]/DDR1_DQ[11]
BB35
DDR0_DQ[44]/DDR1_DQ[12]
BA35
DDR0_DQ[45]/DDR1_DQ[13]
BA33
DDR0_DQ[46]/DDR1_DQ[14]
BB33
DDR0_DQ[47]/DDR1_DQ[15]
AY31
DDR0_DQ[48]/DDR1_DQ[32]
AW31
DDR0_DQ[49]/DDR1_DQ[33]
AY29
DDR0_DQ[50]/DDR1_DQ[34]
AW29
DDR0_DQ[51]/DDR1_DQ[35]
BB31
DDR0_DQ[52]/DDR1_DQ[36]
BA31
DDR0_DQ[53]/DDR1_DQ[37]
BA29
DDR0_DQ[54]/DDR1_DQ[38]
BB29
DDR0_DQ[55]/DDR1_DQ[39]
AY27
DDR0_DQ[56]/DDR1_DQ[40]
AW27
DDR0_DQ[57]/DDR1_DQ[41]
AY25
DDR0_DQ[58]/DDR1_DQ[42]
AW25
DDR0_DQ[59]/DDR1_DQ[43]
BB27
DDR0_DQ[60]/DDR1_DQ[44]
BA27
DDR0_DQ[61]/DDR1_DQ[45]
BA25
DDR0_DQ[62]/DDR1_DQ[46]
BB25
DDR0_DQ[63]/DDR1_DQ[47]
SKL-U_BGA1356
@
SKL-U
DDR0_MA[12]/DDR0_CAA[6]/DDR0_MA[12]
DDR0_MA[11]/DDR0_CAA[7]/DDR0_MA[11]
DDR0_MA[15]/DDR0_CAA[8]/DDR0_ACT#
DDR0_MA[14]/DDR0_CAA[9]/DDR0_BG[1]
DDR0_MA[13]/DDR0_CAB[0]/DDR0_MA[13]
DDR0_CAS#/DDR0_CAB[1]/DDR0_MA[15]
DDR0_RAS#/DDR0_CAB[3]/DDR0_MA[16]
DDR0_MA[10]/DDR0_CAB[7]/DDR0_MA[10]
DDR CH - A
2 OF 20
DDR0_CKN[0]
DDR0_CKP[0]
DDR0_CKN[1]
DDR0_CKP[1]
DDR0_CKE[0]
DDR0_CKE[1]
DDR0_CKE[2]
DDR0_CKE[3]
DDR0_CS#[0]
DDR0_CS#[1]
DDR0_ODT[0]
DDR0_MA[5]/DDR0_CAA[0]/DDR0_MA[5]
DDR0_MA[9]/DDR0_CAA[1]/DDR0_MA[9]
DDR0_MA[6]/DDR0_CAA[2]/DDR0_MA[6]
DDR0_MA[8]/DDR0_CAA[3]/DDR0_MA[8]
DDR0_MA[7]/DDR0_CAA[4]/DDR0_MA[7]
DDR0_BA[2]/DDR0_CAA[5]/DDR0_BG[0]
DDR0_WE#/DDR0_CAB[2]/DDR0_MA[14]
DDR0_BA[0]/DDR0_CAB[4]/DDR0_BA[0]
DDR0_MA[2]/DDR0_CAB[5]/DDR0_MA[2]
DDR0_BA[1]/DDR0_CAB[6]/DDR0_BA[1]
DDR0_MA[1]/DDR0_CAB[8]/DDR0_MA[1]
DDR0_MA[0]/DDR0_CAB[9]/DDR0_MA[0]
DDR0_ODT[1]
DDR0_MA[3]
DDR0_MA[4]
DDR0_DQSN[0]
DDR0_DQSP[0]
DDR0_DQSN[1]
DDR0_DQSP[1]
DDR0_DQSN[2]/DDR0_DQSN[4]
DDR0_DQSP[2]/DDR0_DQSP[4]
DDR0_DQSN[3]/DDR0_DQSN[5]
DDR0_DQSP[3]/DDR0_DQSP[5]
DDR0_DQSN[4]/DDR1_DQSN[0]
DDR0_DQSP[4]/DDR1_DQSP[0]
DDR0_DQSN[5]/DDR1_DQSN[1]
DDR0_DQSP[5]/DDR1_DQSP[1]
DDR0_DQSN[6]/DDR1_DQSN[4]
DDR0_DQSP[6]/DDR1_DQSP[4]
DDR0_DQSN[7]/DDR1_DQSN[5]
DDR0_DQSP[7]/DDR1_DQSP[5]
DDR0_ALERT#
DDR0_PAR
DDR_VREF_CA
DDR0_VREF_DQ
DDR1_VREF_DQ
DDR_VTT_CNTL
AU53
AT53
AU55
AT55
BA56
BB56
AW56
AY56
AU45
AU43
AT45
AT43
BA51
BB54
BA52
AY52
AW52
AY55
AW54
BA54
BA55
AY54
AU46
AU48
AT46
AU50
AU52
AY51
AT48
AT50
BB50
AY50
BA50
BB52
AM70
AM69
AT69
AT70
BA64
AY64
AY60
BA60
BA38
AY38
AY34
BA34
BA30
AY30
AY26
BA26
AW50
AT52
AY67
AY68
BA67
AW67
M_A_BG1_SOC
R0402_N 0R
RM97
DDR_VTT_CTRL
M_A_DIM0_CK_DDR0_DN 19
M_A_DIM0_CK_DDR0_DP 19
M_A_DIM0_CKE0 19
M_A_DIM0_CS0_N 19
M_A_DIM0_ODT0 19
M_A_A5 19
M_A_A9 19
M_A_A6 19
M_A_A8 19
M_A_A7 19
M_A_BG0 19
M_A_A12 19
M_A_A11 19
M_A_ACT_N 19
5%
M_A_A13 19
M_A_A15_CAS_N 19
M_A_A14_WE_N 19
M_A_A16_RAS_N 19
M_A_BA0 19
M_A_A2 19
M_A_BA1 19
M_A_A10_AP 19
M_A_A1 19
M_A_A0 19
M_A_A3 19
M_A_A4 19
M_A_DQS_DN<0> 19
M_A_DQS_DP<0> 19
M_A_DQS_DN<1> 19
M_A_DQS_DP<1> 19
M_A_DQS_DN<4> 19
M_A_DQS_DP<4> 19
M_A_DQS_DN<5> 19
M_A_DQS_DP<5> 19
M_B_DQS_DN<0> 20
M_B_DQS_DP<0> 20
M_B_DQS_DN<1> 20
M_B_DQS_DP<1> 20
M_B_DQS_DN<4> 20
M_B_DQS_DP<4> 20
M_B_DQS_DN<5> 20
M_B_DQS_DP<5> 20
DDR0_A_ALERT_N 19
DDR0_A_PARITY 19
M_A_BG1 19
NI
2/2 add 0R
+V_DDR_CA_VREF 19
+V_DDR_VREFDQ02_CHB 20
M_A_DQ<16> 19
M_A_DQ<17> 19
M_A_DQ<18> 19
M_A_DQ<19> 19
M_A_DQ<20> 19
M_A_DQ<21> 19
M_A_DQ<22> 19
M_A_DQ<23> 19
M_A_DQ<24> 19
M_A_DQ<25> 19
M_A_DQ<26> 19
M_A_DQ<27> 19
M_A_DQ<28> 19
M_A_DQ<29> 19
M_A_DQ<30> 19
M_A_DQ<31> 19
M_A_DQ<48> 19
M_A_DQ<49> 19
M_A_DQ<50> 19
M_A_DQ<51> 19
M_A_DQ<52> 19
M_A_DQ<53> 19
M_A_DQ<54> 19
M_A_DQ<55> 19
M_A_DQ<56> 19
M_A_DQ<57> 19
M_A_DQ<58> 19
M_A_DQ<59> 19
M_A_DQ<60> 19
M_A_DQ<61> 19
M_A_DQ<62> 19
M_A_DQ<63> 19
M_B_DQ<16> 20
M_B_DQ<17> 20
M_B_DQ<18> 20
M_B_DQ<19> 20
M_B_DQ<20> 20
M_B_DQ<21> 20
M_B_DQ<22> 20
M_B_DQ<23> 20
M_B_DQ<24> 20
M_B_DQ<25> 20
M_B_DQ<26> 20
M_B_DQ<27> 20
M_B_DQ<28> 20
M_B_DQ<29> 20
M_B_DQ<30> 20
M_B_DQ<31> 20
M_B_DQ<48> 20
M_B_DQ<49> 20
M_B_DQ<50> 20
M_B_DQ<51> 20
M_B_DQ<52> 20
M_B_DQ<53> 20
M_B_DQ<54> 20
M_B_DQ<55> 20
M_B_DQ<56> 20
M_B_DQ<57> 20
M_B_DQ<58> 20
M_B_DQ<59> 20
M_B_DQ<60> 20
M_B_DQ<61> 20
M_B_DQ<62> 20
M_B_DQ<63> 20
Non‐Interleaved
UC1C
AF65
DDR1_DQ[0]/DDR0_DQ[16]
AF64
DDR1_DQ[1]/DDR0_DQ[17]
AK65
DDR1_DQ[2]/DDR0_DQ[18]
AK64
DDR1_DQ[3]/DDR0_DQ[19]
AF66
DDR1_DQ[4]/DDR0_DQ[20]
AF67
DDR1_DQ[5]/DDR0_DQ[21]
AK67
DDR1_DQ[6]/DDR0_DQ[22]
AK66
DDR1_DQ[7]/DDR0_DQ[23]
AF70
DDR1_DQ[8]/DDR0_DQ[24]
AF68
DDR1_DQ[9]/DDR0_DQ[25]
AH71
DDR1_DQ[10]/DDR0_DQ[26]
AH68
DDR1_DQ[11]/DDR0_DQ[27]
AF71
DDR1_DQ[12]/DDR0_DQ[28]
AF69
DDR1_DQ[13]/DDR0_DQ[29]
AH70
DDR1_DQ[14]/DDR0_DQ[30]
AH69
DDR1_DQ[15]/DDR0_DQ[31]
AT66
DDR1_DQ[16]/DDR0_DQ[48]
AU66
DDR1_DQ[17]/DDR0_DQ[49]
AP65
DDR1_DQ[18]/DDR0_DQ[50]
AN65
DDR1_DQ[19]/DDR0_DQ[51]
AN66
DDR1_DQ[20]/DDR0_DQ[52]
AP66
DDR1_DQ[21]/DDR0_DQ[53]
AT65
DDR1_DQ[22]/DDR0_DQ[54]
AU65
DDR1_DQ[23]/DDR0_DQ[55]
AT61
DDR1_DQ[24]/DDR0_DQ[56]
AU61
DDR1_DQ[25]/DDR0_DQ[57]
AP60
DDR1_DQ[26]/DDR0_DQ[58]
AN60
DDR1_DQ[27]/DDR0_DQ[59]
AN61
DDR1_DQ[28]/DDR0_DQ[60]
AP61
DDR1_DQ[29]/DDR0_DQ[61]
AT60
DDR1_DQ[30]/DDR0_DQ[62]
AU60
DDR1_DQ[31]/DDR0_DQ[63]
AU40
DDR1_DQ[32]/DDR1_DQ[16]
AT40
DDR1_DQ[33]/DDR1_DQ[17]
AT37
DDR1_DQ[34]/DDR1_DQ[18]
AU37
DDR1_DQ[35]/DDR1_DQ[19]
AR40
DDR1_DQ[36]/DDR1_DQ[20]
AP40
DDR1_DQ[37]/DDR1_DQ[21]
AP37
DDR1_DQ[38]/DDR1_DQ[22]
AR37
DDR1_DQ[39]/DDR1_DQ[23]
AT33
DDR1_DQ[40]/DDR1_DQ[24]
AU33
DDR1_DQ[41]/DDR1_DQ[25]
AU30
DDR1_DQ[42]/DDR1_DQ[26]
AT30
DDR1_DQ[43]/DDR1_DQ[27]
AR33
DDR1_DQ[44]/DDR1_DQ[28]
AP33
DDR1_DQ[45]/DDR1_DQ[29]
AR30
DDR1_DQ[46]/DDR1_DQ[30]
AP30
DDR1_DQ[47]/DDR1_DQ[31]
AU27
DDR1_DQ[48]
AT27
DDR1_DQ[49]
AT25
DDR1_DQ[50]
AU25
DDR1_DQ[51]
AP27
DDR1_DQ[52]
AN27
DDR1_DQ[53]
AN25
DDR1_DQ[54]
AP25
DDR1_DQ[55]
AT22
DDR1_DQ[56]
AU22
DDR1_DQ[57]
AU21
DDR1_DQ[58]
AT21
DDR1_DQ[59]
AN22
DDR1_DQ[60]
AP22
DDR1_DQ[61]
AP21
DDR1_DQ[62]
AN21
DDR1_DQ[63]
SKL-U_BGA1356
@
SKL-U
DDR CH - B
3 OF 20
Rev_0.53 Rev_0.53
DDR1_CKN[0]
DDR1_CKN[1]
DDR1_CKP[0]
DDR1_CKP[1]
DDR1_CKE[0]
DDR1_CKE[1]
DDR1_CKE[2]
DDR1_CKE[3]
DDR1_CS#[0]
DDR1_CS#[1]
DDR1_ODT[0]
DDR1_MA[5]/DDR1_CAA[0]/DDR1_MA[5]
DDR1_MA[9]/DDR1_CAA[1]/DDR1_MA[9]
DDR1_MA[6]/DDR1_CAA[2]/DDR1_MA[6]
DDR1_MA[8]/DDR1_CAA[3]/DDR1_MA[8]
DDR1_MA[7]/DDR1_CAA[4]/DDR1_MA[7]
DDR1_BA[2]/DDR1_CAA[5]/DDR1_BG[0]
DDR1_MA[12]/DDR1_CAA[6]/DDR1_MA[12]
DDR1_MA[11]/DDR1_CAA[7]/DDR1_MA[11]
DDR1_MA[15]/DDR1_CAA[8]/DDR1_ACT#
DDR1_MA[14]/DDR1_CAA[9]/DDR1_BG[1]
DDR1_MA[13]/DDR1_CAB[0]/DDR1_MA[13]
DDR1_CAS#/DDR1_CAB[1]/DDR1_MA[15]
DDR1_WE#/DDR1_CAB[2]/DDR1_MA[14]
DDR1_RAS#/DDR1_CAB[3]/DDR1_MA[16]
DDR1_BA[0]/DDR1_CAB[4]/DDR1_BA[0]
DDR1_MA[2]/DDR1_CAB[5]/DDR1_MA[2]
DDR1_BA[1]/DDR1_CAB[6]/DDR1_BA[1]
DDR1_MA[10]/DDR1_CAB[7]/DDR1_MA[10]
DDR1_MA[1]/DDR1_CAB[8]/DDR1_MA[1]
DDR1_MA[0]/DDR1_CAB[9]/DDR1_MA[0]
DDR1_ODT[1]
DDR1_MA[3]
DDR1_MA[4]
DDR1_DQSN[0]/DDR0_DQSN[2]
DDR1_DQSP[0]/DDR0_DQSP[2]
DDR1_DQSN[1]/DDR0_DQSN[3]
DDR1_DQSP[1]/DDR0_DQSP[3]
DDR1_DQSN[2]/DDR0_DQSN[6]
DDR1_DQSP[2]/DDR0_DQSP[6]
DDR1_DQSN[3]/DDR0_DQSN[7]
DDR1_DQSP[3]/DDR0_DQSP[7]
DDR1_DQSN[4]/DDR1_DQSN[2]
DDR1_DQSP[4]/DDR1_DQSP[2]
DDR1_DQSN[5]/DDR1_DQSN[3]
DDR1_DQSP[5]/DDR1_DQSP[3]
DDR1_DQSN[6]
DDR1_DQSP[6]
DDR1_DQSN[7]
DDR1_DQSP[7]
DDR1_ALERT#
DDR1_PAR
DRAM_RESET#
DDR_RCOMP[0]
DDR_RCOMP[1]
DDR_RCOMP[2]
AN45
AN46
AP45
AP46
AN56
AP55
AN55
AP53
BB42
AY42
BA42
AW42
AY48
AP50
BA48
BB48
AP48
AP52
AN50
AN48
AN53
AN52
BA43
AY43
AY44
AW44
BB44
AY47
BA44
AW46
AY46
BA46
BB46
BA47
AH66
AH65
AG69
AG70
AR66
AR65
AR61
AR60
AT38
AR38
AT32
AR32
AR25
AR27
AR22
AR21
AN43
AP43
AT13
AR18
AT18
AU18
M_B_BG1_SOC
R0402_N 0R
RM98
5%
DDR4_DRAMRST_N
SM_RCOMP0
SM_RCOMP1
SM_RCOMP2
RM1
100R
R0402_N
M_B_DIM0_CK_DDR0_DN 20
M_B_DIM0_CK_DDR0_DP 20
M_B_DIM0_CKE0 20
M_B_DIM0_CS0_N 20
M_B_DIM0_ODT0 20
M_B_A5 20
M_B_A9 20
M_B_A6 20
M_B_A8 20
M_B_A7 20
M_B_BG0 20
M_B_A12 20
M_B_A11 20
M_B_ACT_N 20
M_B_BG1 20
NI
M_B_A13 20
M_B_A15_CAS_N 20
M_B_A14_WE_N 20
M_B_A16_RAS_N 20
M_B_BA0 20
M_B_A2 20
M_B_BA1 20
M_B_A10_AP 20
M_B_A1 20
M_B_A0 20
M_B_A3 20
M_B_A4 20
M_A_DQS_DN<2> 19
M_A_DQS_DP<2> 19
M_A_DQS_DN<3> 19
M_A_DQS_DP<3> 19
M_A_DQS_DN<6> 19
M_A_DQS_DP<6> 19
M_A_DQS_DN<7> 19
M_A_DQS_DP<7> 19
M_B_DQS_DN<2> 20
M_B_DQS_DP<2> 20
M_B_DQS_DN<3> 20
M_B_DQS_DP<3> 20
M_B_DQS_DN<6> 20
M_B_DQS_DP<6> 20
M_B_DQS_DN<7> 20
M_B_DQS_DP<7> 20
DDR1_B_ALERT_N 20
DDR1_B_PARITY 20
DDR4_DRAMRST_N 19
RM2
RM3
1%
80.6R
1%
R0402_N
I
I
R0402_N
200R
2/2 add 0R
1%
I
4Gb or 8GbMemory size
RM95,RM96,RM97,RM98
need uninstall
DRAM M9 pin
RM99,RM100
need install
DRAM E9 pin RM79,RM81,RM83,RM85,
RM87,RM89,RM91,RM93
need install 0 ohm
RM3 200R
DDR_RCOMP0
A A
2/2 Add (4Gb 8Gb) & (16Gb) BOM option table
need install
Default
5
DDP SDP
8G or 16Gb
RM95,RM96,RM97,RM98
need install
RM99,RM100
need uninstall
RM79,RM81,RM83,RM85,
RM87,RM89,RM91,RM93
need install 240 ohm
RM3 121R
need install page04
+V3P3A
+V1P2U_VDDQ
page4,19,20
page19,20
+V3P3A 3,5,6,7,9,10,11,23,24,29,31,37,38,42,47,49,50,51,52,53,56,60,62,65,66,67
+V1P2U_VDDQ 10,19,20,21,61
4
DDR_VTT_CTRL
NC1VCC
2
A
3
GND
74AUP1G07GW
sot_353
UM10
5
4
Y
I
CM1
0.1uF 10V 10%
C0402
X5R
I
3
+V3P3A +V1P2U_VDDQ
RM4
100K
5%
R0402
I
SM_PG_CTRL 61
Project:
Project:
Project:
Miix510
Miix510
Miix510
Jacky
Jacky
Engineer:
Engineer:
Size
Size
Size
Title:
Title:
Title:
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
Engineer:
SKL-U(2/12)DDR4
SKL-U(2/12)DDR4
SKL-U(2/12)DDR4
1
Jacky
Rev
Rev
Rev
V01
V01
V01
4 69 Tuesday, July 25, 2017
4 69 Tuesday, July 25, 2017
4 69 Tuesday, July 25, 2017
5
4
3
2
1
UC1E
SPI0_CLK
SPI0_MISO
SPI0_MOSI
SPI0_IO2
SPI0_IO3
SPI0_CS0#
SPI0_CS1#
SPI0_CS2#
GPP_D1/SPI1_CLK
GPP_D2/SPI1_MISO
J4
GPP_D3/SPI1_MOSI
GPP_D21/SPI1_IO2
GPP_D22/SPI1_IO3
GPP_D0/SPI1_CS#
CL_CLK
CL_DATA
CL_RST#
GPP_A0/RCIN#
GPP_A6/SERIRQ
SKL-U_BGA1356
@
SPI - FLASH
SPI - TOUCH
C LINK
FLASH_SPI_CLK 24,50
FLASH_SPI_MISO 24,50
SPI Flash
D D
FLASH_SPI_MOSI 24,50
FLASH_SPI_IO2 24
FLASH_SPI_IO3 24
FLASH_SPI_CS0_N 24,50
AV2
AW3
AV3
AW2
AU4
AU3
AU2
AU1
M2
M3
V1
V2
M1
+V3P3SX
AW13
AY11
G3
G2
G1
5/9 EC_KBRST# Add PU R1066 10Kohm +V3P3SX
EC_KBRST# 50
To EC
LPC_SERIRQ 50
R1066
10K
5%
R0402_N
I
LPC Mode
+V3P3A
I R0402 5%
C C
R1059 10K
LPC_SERIRQ
5/9 Page50 EC pin24 BAT_CHGOK_LED_N change to EC_KBRST#,connect to SOC pin AW13(RCIN)
+V3P3A
+V3P3A 3,4,6,7,9,10,11,23,24,29,31,37,38,42,47,49,50,51,52,53,56,60,62,65,66,67
SKL-U
LPC
5 OF 20
SMBUS, SMLINK
GPP_B23/SML1ALERT#/PCHHOT#
GPP_A1/LAD0/ESPI_IO0
GPP_A2/LAD1/ESPI_IO1
GPP_A3/LAD2/ESPI_IO2
GPP_A4/LAD3/ESPI_IO3
GPP_A5/LFRAME#/ESPI_CS#
GPP_A14/SUS_STAT#/ESPI_RESET#
GPP_A9/CLKOUT_LPC0/ESPI_CLK
GPP_A10/CLKOUT_LPC1
Rev_0.53
GPP_C0/SMBCLK
GPP_C1/SMBDATA
GPP_C2/SMBALERT#
GPP_C3/SML0CLK
GPP_C4/SML0DATA
GPP_C5/SML0ALERT#
GPP_C6/SML1CLK
GPP_C7/SML1DATA
GPP_A8/CLKRUN#
TP_SMB_CLK
R7
TP_SMB_DATA
R8
STRAP_GPP_C2
R10
SML0_CLK
R9
SML0_DATA
W2
STRAP_GPP_C5
W1
SML1_CLK_R
W3
SML1_DATA_R
V3
THERMAL_ALERT#_R
AM7
AY13
BA13
BB13
AY12
BA12
TP_PM_SUS_STAT_N
BA11
LPC_CLK_EC_R
AW9
LPC_CLK_PRT80_R
AY9
AW11
R1064
R1065
PM_CLKRUN_N 50
PM_CLKRUN_N
+V3P3A +V3P3A
R1055
1K
TP1053
TP1054
TP9998
TP9999
R9861 0R
R9862 0R
R9863 0R
R0402
5%
NI
3/2 R9863 change to NI,THERMAL HW shutdown
LPC_AD0 41,43,50
LPC_AD1 41,43,50
LPC_AD2 41,43,50
LPC_AD3 41,43,50
I
R0402 5%
22R
I
R0402 5%
22R
LPC_FRAME_N 41,43,50
TP1052
+V3P3A
R1061
8.2K
R0402
5%
I
R1073
1K
R0402
5%
NI
+V3P3A +V3P3A
R1053
100K
R0402
5%
NI
I R0402_N 5%
I R0402_N 5%
NIR0402_N 5%
R9872
10K
5%
R0402_N
I
TPM/WLAN/EC
LPC_CLK_EC 50
LPC_CLK_PRT80 41,43
R9873
10K
5%
R0402_N
I
Difference with armour
connect to thermal sensor
SML1_CLK 29
SML1_DATA 29
THERMAL_ALERT# 29
B B
A A
Project:
Project:
Project:
Engineer:
Engineer:
Size
Size
Size
Title:
Title:
Title:
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
Engineer:
SKL-U(3/12)SPI,ESPI,SMB,LPC
SKL-U(3/12)SPI,ESPI,SMB,LPC
SKL-U(3/12)SPI,ESPI,SMB,LPC
Miix510
Miix510
Miix510
1
Jacky
Jacky
Jacky
Rev
Rev
Rev
V01
V01
5 69 Tuesday, June 27, 2017
5 69 Tuesday, June 27, 2017
5 69 Tuesday, June 27, 2017
V01
5
4
3
2
1
To Enable ME Override
ME_Flash_EN 37,50
R9848 0R
STRAP_HDA_SDO_SOC
I R0402_N 5%
D D
I R0402 5%
HDA_SYNC 46
HDA_BCLK_R 46
STRAP_HDA_SDO 46
HDA_RST_N 46
RC393 33R
R1086 33R
RC395 33R
RC394 33R
HDA for AUDIO
C C
FCAM_RST_N 39
TP10034
+V3P3SX
HDA_SYNC_SOC
I R0402 5%
HDA_BCLK
I R0402 5%
STRAP_HDA_SDO_SOC
NI R0402 5%
HDA_RST_N_SOC
HDA_SYNC_SOC
HDA_BCLK
STRAP_HDA_SDO_SOC
HDA_SDI0 46
HDA_SDI0
HDA_RST_N_SOC
R10086 0R
FCAM_RST_N_CPU
FCAM_CLK_EN 40
RCAM_CLK_EN 40
WWAN_DISABLE_N 44
WIFI_DISABLE_N 43
PCH_AUDIO_PWREN 46 FCAM_PD_N 39
HW_ID4 7
R1052 100K
NIR0402 5%
6/27 update
HDA_SPKR 46
1/4 Connect codec
+V3P3A
+V3P3SX
+V3P3A 3,4,5,7,9,10,11,23,24,29,31,37,38,42,47,49,50,51,52,53,56,60,62,65,66,67
+V3P3SX 5,7,9,10,23,26,30,31,36,37,38,39,40,41,43,44,45,46,47
Difference with armour
Add EC to enable ME override
+V3P3A
NIR0402_N 5%
RCAM_RST_N
R1054
1K
R0402
5%
NI
BA22
AY22
BB22
BA21
AY21
AW22
AY20
AW20
AK10
AW5
UC1G
HDA_SYNC/I2S0_SFRM
HDA_BLK/I2S0_SCLK
HDA_SDO/I2S0_TXD
HDA_SDI0/I2S0_RXD
HDA_SDI1/I2S1_RXD
HDA_RST#/I2S1_SCLK
J5
GPP_D23/I2S_MCLK
I2S1_SFRM
I2S1_TXD
AK7
GPP_F1/I2S2_SFRM
AK6
GPP_F0/I2S2_SCLK
AK9
GPP_F2/I2S2_TXD
GPP_F3/I2S2_RXD
H5
GPP_D19/DMIC_CLK0
D7
GPP_D20/DMIC_DATA0
D8
GPP_D17/DMIC_CLK1
C8
GPP_D18/DMIC_DATA1
GPP_B14/SPKR
SKL-U_BGA1356
@
AUDIO
5/23 R9848 install,BIOS request
SKL-U
7 OF 20
SDIO/SDXC
GPP_G0/SD_CMD
GPP_G1/SD_DATA0
GPP_G2/SD_DATA1
GPP_G3/SD_DATA2
GPP_G4/SD_DATA3
GPP_G5/SD_CD#
GPP_G6/SD_CLK
GPP_G7/SD_WP
GPP_A17/SD_PWR_EN#/ISH_GP7
GPP_A16/SD_1P8_SEL
Rev_0.53
SD_RCOMP
GPP_F23
AB11
AB13
AB12
W12
W11
W10
W8
W7
BA9
BB9
AB7
AF13
TP_SD_WP
SDMMC_RCOMP
R9864 0R
R1015 200R
Non-Micro SD
NIR0402_N 5%
I R0402 1%
Difference with armour
Add 0ohm NI
B B
CSI2_RCAM_DATA0_DN 39
Rear Camera1
8M
Front Camera
5M
A A
5
CSI2_RCAM_DATA0_DP 39
CSI2_RCAM_DATA1_DN 39
CSI2_RCAM_DATA1_DP 39
CSI2_RCAM_DATA2_DN 39
CSI2_RCAM_DATA2_DP 39
CSI2_RCAM_DATA3_DN 39
CSI2_RCAM_DATA3_DP 39
CSI2_FCAM_DATA0_DN 39
CSI2_FCAM_DATA0_DP 39
CSI2_FCAM_DATA1_DN 39
CSI2_FCAM_DATA1_DP 39
4
A36
B36
C38
D38
C36
D36
A38
B38
C31
D31
C33
D33
A31
B31
A33
B33
A29
B29
C28
D28
A27
B27
C27
D27
@
UC1I
CSI-2
CSI2_DN0
CSI2_DP0
CSI2_DN1
CSI2_DP1
CSI2_DN2
CSI2_DP2
CSI2_DN3
CSI2_DP3
CSI2_DN4
CSI2_DP4
CSI2_DN5
CSI2_DP5
CSI2_DN6
CSI2_DP6
CSI2_DN7
CSI2_DP7
CSI2_DN8
CSI2_DP8
CSI2_DN9
CSI2_DP9
CSI2_DN10
CSI2_DP10
CSI2_DN11
CSI2_DP11
SKL-U_BGA1356
SKL_ULT
9 OF 20
GPP_D4/FLASHTRIG
EMMC
GPP_F13/EMMC_DATA0
GPP_F14/EMMC_DATA1
GPP_F15/EMMC_DATA2
GPP_F16/EMMC_DATA3
GPP_F17/EMMC_DATA4
GPP_F18/EMMC_DATA5
GPP_F19/EMMC_DATA6
GPP_F20/EMMC_DATA7
GPP_F21/EMMC_RCLK
GPP_F22/EMMC_CLK
GPP_F12/EMMC_CMD
EMMC_RCOMP
3
Rev_0.53
CSI2_CLKN0
CSI2_CLKP0
CSI2_CLKN1
CSI2_CLKP1
CSI2_CLKN2
CSI2_CLKP2
CSI2_CLKN3
CSI2_CLKP3
CSI2_COMP
C37
D37
C32
D32
C29
D29
B26
A26
CSI2_COMP
E13
CSI2_FLASH_STROBE
B7
AP2
AP1
AP3
AN3
AN1
AN2
AM4
AM1
AM2
AM3
AP4
EMMC_RCOMP
AT1
R1013 100R
3/18 Add TP1061
R1014 200R
CSI2_RCAM_CLK_DN 39
CSI2_RCAM_CLK_DP 39
CSI2_FCAM_CLK_DN 39
CSI2_FCAM_CLK_DP 39
TP1061
1/4 check PDG
I R0402 1%
Non-EMMC
I R0402 1%
2
RCAM_PD_N 39
FCAM_ALLPWR_EN 39
RCAM_ALLPWR_EN 40
4/24 update
Project:
Project:
Project:
Engineer:
Engineer:
Size
Size
Size
Title:
Title:
Title:
SKL-U(4/12)HDA,EMMC,SD
SKL-U(4/12)HDA,EMMC,SD
SKL-U(4/12)HDA,EMMC,SD
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
Engineer:
Miix510
Miix510
Miix510
1
Jacky
Jacky
Jacky
6 69 Wednesday, July 05, 2017
6 69 Wednesday, July 05, 2017
6 69 Wednesday, July 05, 2017
Rev
Rev
Rev
V01
V01
V01
5
SDV SIV SIT SVT
HW_ID0
HW_ID1
+3V_PRIM
R9865
D D
10K
5%
R0402_N
I
R1088
10K
5%
R0402_N
NI
HW_ID2
HW_ID3
C C
HW_ID4
B B
A A
PLT_RST_N
0
00
R9866
R9867
10K
10K
5%
5%
R0402_N
R0402_N
I
NI
R1090
R1089
10K
10K
5%
5%
R0402_N
R0402_N
I
NI
Difference with armour
Modify HW_ID
TPM
U9505
01
+V1P0A_VCCPRIM
+V3P3A
+V3P3SX
+1.8V_PRIM
+V3.3AL
+RTCVCC
+3V_PRIM
+1.0V_VCCST
+V3P3SX +V3P3A
R1093
2.2K
5%
R0402_N
I
R1079
100K
5%
R0402_N
I
Difference with armour
Del U1201 Low-power buffer(74AUP1G07GW)
and add Dual MOS to change level
+V3.3AL
G1
10
R9868
10K
5%
R0402_N
NI
R1091
10K
5%
R0402_N
NI
non-TPM
U9505
R1071
2.2K
5%
R0402_N
NI
PM_SYSRST_N
RSMRST_N
R9849
100K
5%
R0402_N
I
PLT_RST_N_Q
QX1A
D1
S1
2N7002KDW 115mA 60V
SOT363V
I
5
11
1
PCIE_REFCLK_SSD_DN 26
PCIE_REFCLK_SSD_DP 26
have
FP sensor
SSD_CLK_REQ_N 26
PCIE_REFCLK_SD_DN_R 45
PCIE_REFCLK_SD_DP_R 45
PCIE_REFCLK_WLAN_DN_R 43
PCIE_REFCLK_WLAN_DP_R 43
R10126
10K
5%
R0402_N
DSP
HW_ID0
HW_ID1
HW_ID2
HW_ID3
HW_ID4
R10127
6/27 update
10K
5%
R0402_N
NONDSP
non FP sensor
HW_ID3 3
HW_ID4 6
0 1
+V1P0A_VCCPRIM 14
+V3P3A 3,4,5,6,9,10,11,23,24,29,31,37,38,42,47,49,50,51,52,53,56,60,62,65,66,67
+V3P3SX 5,6,9,10,23,26,30,31,36,37,38,39,40,41,43,44,45,46,47
+1.8V_PRIM 10,11,31,39,40,44,47,56,65
+V3.3AL 11,50,51,58,60,66
+RTCVCC 11
+3V_PRIM 8,11
+1.0V_VCCST 3,10,12,14,66
PLT_RST_N 26,41,43,45,50
RSMRST_N 50
TP1021
SYS_PWROK 50
IMVP_PCH_PWRGD 50
TP1081
TP1048
PCIE_WAKE_PCH_N 26,43
+V3P3A
R1041 10K
+1.8V_PRIM
R9850
2.2K
5%
R0402_N
I
QX1B
D2
S2
G2
2N7002KDW 115mA 60V
SOT363V
I
BUF_PLT_RST_N_V1P8S 44
to WWAN reset pin
4
R9887 0R
R9888 0R
Close to SOC
SSD
2016/10/07
SD
SD_CLK_REQ_N 45
WLAN_CLK_REQ_N 43
WLAN
non DSP Have DSP
01
PM_SYSRST_N
TP_CPUPWRGD
H_VCCST_PWRGD
RSMRST_N
TP_SUS_PWR_DN_ACK
TP_SUSACK_N
I R0402_N 5%
4
UC1K
AN10
GPP_B13/PLTRST#
B5
SYS_RESET#
AY17
RSMRST#
A68
PROCPWRGD
B65
VCCST_PWRGD
B6
SYS_PWROK
BA20
PCH_PWROK
BB20
DSW_PWROK
AR13
GPP_A13/SUSWARN#/SUSPWRDNACK
AP11
GPP_A15/SUSACK#
BB15
WAKE#
AM15
GPD2/LAN_WAKE#
AW17
GPD11/LANPHYPC
AT15
GPD7/RSVD
SKL-U_BGA1356
@
VR_PWRGD 29,66
UC1J
I R0402_N5%
PCIE_REFCLK_SSD_DN_R
I R0402_N5%
PCIE_REFCLK_SSD_DP_R
HW_ID0
HW_ID1
HW_ID2
PCIE_REFCLK_WLAN_DN_R
PCIE_REFCLK_WLAN_DP_R
SYSTEM POWER MANAGEMENT
D42
C42
AR10
B42
A42
AT7
D41
C41
AT8
D40
C40
AT10
B40
A40
AU8
E40
E38
AU7
SKL-U
11 OF 20
R1042 0R
CLKOUT_PCIE_N0
CLKOUT_PCIE_P0
GPP_B5/SRCCLKREQ0#
CLKOUT_PCIE_N1
CLKOUT_PCIE_P1
GPP_B6/SRCCLKREQ1#
CLKOUT_PCIE_N2
CLKOUT_PCIE_P2
GPP_B7/SRCCLKREQ2#
CLKOUT_PCIE_N3
CLKOUT_PCIE_P3
GPP_B8/SRCCLKREQ3#
CLKOUT_PCIE_N4
CLKOUT_PCIE_P4
GPP_B9/SRCCLKREQ4#
CLKOUT_PCIE_N5
CLKOUT_PCIE_P5
GPP_B10/SRCCLKREQ5#
SKL-U_BGA1356
@
I R0402_N 5%
2/24 Add R1042,VR_PWRGD connect to SOC and EC
3
GPP_B12/SLP_S0#
GPD4/SLP_S3#
GPD5/SLP_S4#
GPD10/SLP_S5#
GPD9/SLP_WLAN#
GPD3/PWRBTN#
GPD1/ACPRESENT
GPD0/BATLOW#
GPP_A11/PME#
GPP_B11/EXT_PWR_GATE#
GPP_B2/VRALERT#
IMVP_PCH_PWRGD
3
Rev_0.53
SLP_SUS#
SLP_LAN#
GPD6/SLP_A#
INTRUDER#
SKL_ULT
CLOCK SIGNALS
10 OF 20
SRTCRST_EC 50
AT11
AP15
BA16
AY16
AN15
AW15
BB17
AN16
BA15
AY15
AU13
AU11
AP16
AM10
AM11
1/13 Add RTC reset circuit.
SLP_S0_N
SLP_S5_N
SLP_SUS_N
SLP_A_N
AC_PRESENT_R
PME_N
SM_INTRUDER_N
EXT_PWR_GATEB
R200_PWR_EN
Rev_0.53
CLKOUT_ITPXDP_N
CLKOUT_ITPXDP_P
GPD8/SUSCLK
XTAL24_IN
XTAL24_OUT
XCLK_BIASREF
RTCX1
RTCX2
SRTCRST#
RTCRST#
R9883
10K
5%
R0402_N
I
TP9996
TP9988
TP9997
TP1025
TP1022
F43
E43
BA17
XTAL_24M_SOC_IN
E37
XTAL_24M_SOC_OUT
E35
XCLK_BIASREF
E42
XTAL_32K_SOC_IN
AM18
XTAL_32K_SOC_OUT
AM20
SRTC_RST_N
AN18
RTC_RST_N
AM16
R9885 0R
R9884 0R
D
Q8209
2N7002 250mA 60V
sot_323_dgs
S
G
I
SLP_S3_N 10,50,60
SLP_S4_N 10,42,47,50,60
SLP_SUS_N 11
PM_PWRBTN_R_N 50
PM_BATLOW_N 50
2
R1019 2.7K
SRTC_RST_N
NIR0402_N 5%
RTC_RST_N
I R0402_N 5%
+V3P3A
PM_BATLOW_N
Difference with armour
SLP_SUS_N open +3V_PRIM
+3V_PRIM
R1020
10K
5%
R0402_N
I
AC_PRESENT 50
ACPRES 50,59
CHG_ACOK change to ACPRES
from Charger IC
2
SUS_CLK 43
R1072
10K
5%
R0402_N
I
+V1P0A_VCCPRIM
I R0402 1%
RTC_RST_N
H_VCCST_PWRGD
IMVP_PCH_PWRGD
1
XTAL_24M_SOC_IN
XTAL_24M_SOC_OUT
8.2pF 50V 0.1pF
C1250
C0402_N
R1057 1M
Y1001
GND
Y12Y2
3
Y34Y4
24MHZ 10PPM
X4S32X25
NPO
U22,U22F
U22,U22F
3/10 Change C1249,C1250 from 22pF to 8.2pF
XTAL_32K_SOC_OUT
XTAL_32K_SOC_IN
C1251
15pF 50V 5%
NPO
C0402_N
I
R1056 10M
Y1000
1 2
32.768KHz +/-20ppm
CRY2_3215
I
3/10 Change Y1000 from seiko to HOSONIC
3/10 Change C1251,C1252 from 18pF to 12pF
3/21 Change C1251,C1252 from 12pF to 15pF,
hosonic & seiko share
+RTCVCC
R1058
20K
5%
R0402_N
I
SRTC_RST_N SM_INTRUDER_N
C1254
1uF 6.3V 10%
X5R
C0402_N
I
R1060
20K
5%
R0402_N
I
C1253
1uF 6.3V 10%
X5R
C0402_N
I
+1.0V_VCCST
R1044 1K
I R0402_N 5%
R9886
100K
5%
R0402_N
NI
A C
CR1003
RB521C30 100mA 30v
SOD-923
I
+V3P3A
R1048
100K
5%
R0402_N
R1046 0R
A C
CR9052
RB521C30 100mA 30v
SOD-923
I
Size
Size
Size
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
I
NI R0402_N 5%
AC_PRESENT_R
Project:
Project:
Project:
Engineer:
Engineer:
Title:
Title:
Title:
Engineer:
SKL-U(5/12)CLK,GPIO
SKL-U(5/12)CLK,GPIO
SKL-U(5/12)CLK,GPIO
1
Miix510
Miix510
Miix510
GND
U22,U22F R0402 5%
1
I R0402 5%
Jacky
Jacky
Jacky
7 69 Monday, September 04, 2017
7 69 Monday, September 04, 2017
7 69 Monday, September 04, 2017
R1062
1M
5%
R0402_N
I
C1249
8.2pF 50V 0.1pF
NPO
C0402_N
U22,U22F
C1252
15pF 50V 5%
NPO
C0402_N
I
Rev
Rev
Rev
V01
V01
V01
5
4
3
2
1
+3V_PRIM
Add the GPIO for control CAM 5M/8M
UC1F
AN8
AP7
D D
FP_SPI_CS0_N 31
FP_SPI_CLK 31
FP_SPI_MISO 31
Add the GPIO for Hall sensor
UART for debug
G-sensor
Touch panel
Camera 8M
Camera 5M
4/20 update
C C
+V3P3A
+1.8V_PRIM
LID_INT_N 38,47,50
DOCK_DET 37,50
WLAN_RST 43
LID_INT_N1 49,50
UART2_RXD 56
UART2_TXD 56
TP_I2C0_SDA_EDP2DSI 38
TP_I2C0_SCL_EDP2DSI 38
TOUCH_I2C_SDA 37
TOUCH_I2C_CLK 37
I2C_2_RCAM_SDA 39
I2C_2_RCAM_SCL 39
I2C_3_FCAM_SDA 39
I2C_3_FCAM_SCL 39
WWAN_HOST_WAKE_N 44
GPS_DISABLE_N 44
+V3P3A 3,4,5,6,7,9,10,11,23,24,29,31,37,38,42,47,49,50,51,52,53,56,60,62,65,66,67
+1.8V_PRIM 7,10,11,31,39,40,44,47,56,65
FP_SPI_MOSI 31
TP1009
TP_STRAP_GPP_B18
AP8
AR7
AM5
AN7
AP5
AN5
AB1
AB2
W4
AB3
AD1
AD2
AD3
AD4
U7
U6
U8
U9
AH9
AH10
AH11
AH12
AF11
AF12
LPSS ISH
GPP_B15/GSPI0_CS#
GPP_B16/GSPI0_CLK
GPP_B17/GSPI0_MISO
GPP_B18/GSPI0_MOSI
GPP_B19/GSPI1_CS#
GPP_B20/GSPI1_CLK
GPP_B21/GSPI1_MISO
GPP_B22/GSPI1_MOSI
GPP_C8/UART0_RXD
GPP_C9/UART0_TXD
GPP_C10/UART0_RTS#
GPP_C11/UART0_CTS#
GPP_C20/UART2_RXD
GPP_C21/UART2_TXD
GPP_C22/UART2_RTS#
GPP_C23/UART2_CTS#
GPP_C16/I2C0_SDA
GPP_C17/I2C0_SCL
GPP_C18/I2C1_SDA
GPP_C19/I2C1_SCL
GPP_F4/I2C2_SDA
GPP_F5/I2C2_SCL
GPP_F6/I2C3_SDA
GPP_F7/I2C3_SCL
GPP_F8/I2C4_SDA
GPP_F9/I2C4_SCL
SKL-U_BGA1356
@
SKL-U
GPP_D5/ISH_I2C0_SDA
GPP_D6/ISH_I2C0_SCL
GPP_D7/ISH_I2C1_SDA
GPP_D8/ISH_I2C1_SCL
GPP_F10/I2C5_SDA/ISH_I2C2_SDA
GPP_F11/I2C5_SCL/ISH_I2C2_SCL
GPP_D13/ISH_UART0_RXD/SML0BDATA/I2C4B_SDA
GPP_D14/ISH_UART0_TXD/SML0BCLK/I2C4B_SCL
6 OF 20
GPP_D15/ISH_UART0_RTS#
GPP_D16/ISH_UART0_CTS#/SML0BALERT#
GPP_C12/UART1_RXD/ISH_UART1_RXD
GPP_C13/UART1_TXD/ISH_UART1_TXD
GPP_C14/UART1_RTS#/ISH_UART1_RTS#
GPP_C15/UART1_CTS#/ISH_UART1_CTS#
GPP_A12/BM_BUSY#/ISH_GP6
Memory Dectection
3/2 Change memory ID PU from +1.8V_PRIM to +3V_PRIM
Rev_0.53
GPP_D9
GPP_D10
GPP_D11
GPP_D12
GPP_A18/ISH_GP0
GPP_A19/ISH_GP1
GPP_A20/ISH_GP2
GPP_A21/ISH_GP3
GPP_A22/ISH_GP4
GPP_A23/ISH_GP5
P2
P3
P4
P1
M4
N3
IMU_I2C_SDA
N1
IMU_I2C_SCL
N2
CRD_PWR_OFF_N_SOC
AD11
AD12
U1
U2
U3
U4
MEM_DEC0
AC1
MEM_DEC1
AC2
MEM_DEC2
AC3
MEM_DEC3
AB4
AY8
BA8
BB7
BA7
AY7
AW7
AP13
+3V_PRIM +3V_PRIM +3V_PRIM
R9803
10K
1%
R0402_N
NI
R9804
10K
1%
R0402_N
I
R10089
10K
1%
03/22 Modify
R0402_N
I
SH9515 0R
SH9516 0R
TP10014
TP10015
DOCK_DET_SOC 37
CAM_8M 39
VOLUME_UP 49,50
VOLUME_DOWN 49,50
WWAN_GNSS_3P3_SDA 44
WWAN_GNSS_3P3_SCL 44
WWAN_GNSS_INT 44
2/17 Modify
I R0402_N 5%
I R0402_N 5%
Add the GPIO for control docking power
IMU_I2C_SDA_HUB 38
IMU_I2C_SCL_HUB 38
3/1 Modify
CRD_PWR_OFF_N_SOC 44
WWAN
Memory detection
3/1 Modify
IMU_INT1 38
ACCEL_INT 38
IMU_INT2 38
IMU_INT3 38
FP_SLEEP_N 31
FP_DRDY 31
IMU_INT4 38
6/24 SAR_PROX_RST,reserved R1096 connect to GPP_A12,add R1095 connect to GPP_A22,BIOS request
R9806
10K
1%
R0402_N
NI
R9807
10K
1%
R0402_N
I
MEM_DEC0
R9801
10K
1%
R0402_N
NI
MEM_DEC1 MEM_DEC2
R9802
10K
1%
R0402_N
I
GPP_D10
8M CAM 0
5M CAM
Difference with armour
WWAN_SAR_DET AD11 move to BA7
follow Intel MRD
1
IMU Sensor
Mem_DEC3 Voltage
One Channel
Two Channel
+3V_PRIM
R10090
10K
1%
0V
3.3V
R0402_N
NI
MEM_DEC3
R10091
10K
1%
R0402_N
I
3/29 add memory ID
MEM_DEC0
MEM_DEC1
MEM_DEC2
MEM_DEC3 0 0 0 0 0 0 1 1 1 1 1
B B
A A
5
4
0
0
1
0
00
Default
0
1
0
3
1
1
0
Samsung_4GB SDP Samsung_8GB SDP Micron_4GB SDP Micron_8GB DDP Hynix_4GB SDP Hynix_16GB DDP Samsung_16GB DDP Micron_16GB DDP
0
0
1
Samsung_8GB DDP
1
0
1
Micron_8GB SDP Hynix_8GB SDP Hynix_8GB DDP
0
0
0
1
0
0
0
1
0
1
0
0 1
0
1
1
0
1
1
Project:
Project:
Project:
Miix510
Miix510
Miix510
Jacky
Jacky
Engineer:
Engineer:
Size
Size
Size
Title:
Title:
Title:
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
Engineer:
SKL-U(6/12)GPIO
SKL-U(6/12)GPIO
SKL-U(6/12)GPIO
1
Jacky
Rev
Rev
Rev
V01
V01
V01
8 69 Monday, September 04, 2017
8 69 Monday, September 04, 2017
8 69 Monday, September 04, 2017
5
D D
PCIE_WLAN_LN0_RX_SOC_DN 43
NGFF WIFI Module
PCIE_WLAN_LN0_RX_SOC_DP 43
PCIE_WLAN_LN0_TX_SOC_DN 43
PCIE_WLAN_LN0_TX_SOC_DP 43
5/4 WIFI PCIE port 8 change to port 4,because PCH HSIO 8 can use PCIe interface (for Base-U)
PCIE_SD_LN0_RX_SOC_DN 45
PCIE_SD_LN0_RX_SOC_DP 45
PCIE_SD_LN0_TX_SOC_DN 45
PCIE_SD_LN0_TX_SOC_DP 45
C9586 0.22uF 10V 10%
C9587 0.22uF 10V 10%
2016/10/07
C C
PCIE9_SSD_RX_DN 26
PCIE9_SSD_RX_DP 26
PCIE9_SSD_TX_DN_C 26
PCIE9_SSD_TX_DP_C 26
PCIE10_SSD_RX_DN 26
PCIE10_SSD_RX_DP 26
PCIE10_SSD_TX_DN_C 26
PCIE10_SSD_TX_DP_C 26
NGFF SSD
PCIE11_SSD_RX_DN 26
PCIE11_SSD_RX_DP 26
PCIE11_SSD_TX_DN_C 26
PCIE11_SSD_TX_DP_C 26
PCIE12_SSD_RX_DN 26
PCIE12_SSD_RX_DP 26
B B
Difference with armour
SSD interface SATA change to PCIE
SATA1A change to PCIE port 9,10,11,12
A A
PCIE12_SSD_TX_DN_C 26
PCIE12_SSD_TX_DP_C 26
C0600 0.22uF 10V 10%
C0601 0.22uF 10V 10%
C0602 0.22uF 10V 10%
C0603 0.22uF 10V 10%
R1063 100R
C0604 0.22uF 10V 10%
C0605 0.22uF 10V 10%
C0606 0.22uF 10V 10%
C0607 0.22uF 10V 10%
Checklist:
Gen1 and Gen2=100nF
Gen3=220nF
TP1051
TP1062
TP1050
I R0402 1%
4
I X5R C0402_N
CPU_SD_TX_DN
I X5R C0402_N
CPU_SD_TX_DP
I X5R C0402_N
PCIE9_SSD_TX_DN
I X5R C0402_N
PCIE9_SSD_TX_DP
I X5R C0402_N
PCIE10_SSD_TX_DN
I X5R C0402_N
PCIE10_SSD_TX_DP
PCIE_RCOMP_N
PCIE_RCOMP_P
XDP_PRDY_N
XDP_PREQ_N
TP_EC_CS_WAKE
I X5R C0402_N
PCIE11_SSD_TX_DN
I X5R C0402_N
PCIE11_SSD_TX_DP
I X5R C0402_N
PCIE12_SSD_TX_DN
I X5R C0402_N
PCIE12_SSD_TX_DP
UC1H
PCIE/USB3/SATA
H13
PCIE1_RXN/USB3_5_RXN
G13
PCIE1_RXP/USB3_5_RXP
B17
PCIE1_TXN/USB3_5_TXN
A17
PCIE1_TXP/USB3_5_TXP
G11
PCIE2_RXN/USB3_6_RXN
F11
PCIE2_RXP/USB3_6_RXP
D16
PCIE2_TXN/USB3_6_TXN
C16
PCIE2_TXP/USB3_6_TXP
H16
PCIE3_RXN
G16
PCIE3_RXP
D17
PCIE3_TXN
C17
PCIE3_TXP
G15
PCIE4_RXN
F15
PCIE4_RXP
B19
PCIE4_TXN
A19
PCIE4_TXP
F16
PCIE5_RXN
E16
PCIE5_RXP
C19
PCIE5_TXN
D19
PCIE5_TXP
G18
PCIE6_RXN
F18
PCIE6_RXP
D20
PCIE6_TXN
C20
PCIE6_TXP
F20
PCIE7_RXN/SATA0_RXN
E20
PCIE7_RXP/SATA0_RXP
B21
PCIE7_TXN/SATA0_TXN
A21
PCIE7_TXP/SATA0_TXP
G21
PCIE8_RXN/SATA1A_RXN
F21
PCIE8_RXP/SATA1A_RXP
D21
PCIE8_TXN/SATA1A_TXN
C21
PCIE8_TXP/SATA1A_TXP
E22
PCIE9_RXN
E23
PCIE9_RXP
B23
PCIE9_TXN
A23
PCIE9_TXP
F25
PCIE10_RXN
E25
PCIE10_RXP
D23
PCIE10_TXN
C23
PCIE10_TXP
F5
PCIE_RCOMPN
E5
PCIE_RCOMPP
D56
PROC_PRDY#
D61
PROC_PREQ#
BB11
GPP_A7/PIRQA#
E28
PCIE11_RXN/SATA1B_RXN
E27
PCIE11_RXP/SATA1B_RXP
D24
PCIE11_TXN/SATA1B_TXN
C24
PCIE11_TXP/SATA1B_TXP
E30
PCIE12_RXN/SATA2_RXN
F30
PCIE12_RXP/SATA2_RXP
A25
PCIE12_TXN/SATA2_TXN
B25
PCIE12_TXP/SATA2_TXP
SKL-U_BGA1356
@
GPIO
USB_OC0#
USB_OC1#
USB_OC2#
USB_OC3#
DEVSLP0
DEVSLP1
DEVSLP2
SATA_GP0
SATA_GP1
SATA_GP2
3
SKL-U
8 OF 20
DEVICE CONTROL
Type C
USB2 Port 2
NA
WWAN_PWR_ON
NA
NA
NGFF SSD KEY M
NA
NA
SSD_SATA_PCIE_DET_N
SSIC / USB3
USB2
Rev_0.53
USB3_1_RXN
USB3_1_RXP
USB3_1_TXN
USB3_1_TXP
USB3_2_RXN/SSIC_1_RXN
USB3_2_RXP/SSIC_1_RXP
USB3_2_TXN/SSIC_1_TXN
USB3_2_TXP/SSIC_1_TXP
USB3_3_RXN/SSIC_2_RXN
USB3_3_RXP/SSIC_2_RXP
USB3_3_TXN/SSIC_2_TXN
USB3_3_TXP/SSIC_2_TXP
USB3_4_RXN
USB3_4_RXP
USB3_4_TXN
USB3_4_TXP
USB2N_1
USB2P_1
USB2N_2
USB2P_2
USB2N_3
USB2P_3
USB2N_4
USB2P_4
USB2N_5
USB2P_5
USB2N_6
USB2P_6
USB2N_7
USB2P_7
USB2N_8
USB2P_8
USB2N_9
USB2P_9
USB2N_10
USB2P_10
USB2_COMP
USB2_ID
USB2_VBUSSENSE
GPP_E9/USB2_OC0#
GPP_E10/USB2_OC1#
GPP_E11/USB2_OC2#
GPP_E12/USB2_OC3#
GPP_E4/DEVSLP0
GPP_E5/DEVSLP1
GPP_E6/DEVSLP2
GPP_E0/SATAXPCIE0/SATAGP0
GPP_E1/SATAXPCIE1/SATAGP1
GPP_E2/SATAXPCIE2/SATAGP2
GPP_E8/SATALED#
H8
G8
C13
D13
J6
H6
B13
A13
J10
H10
B15
A15
E10
F10
C15
D15
AB9
AB10
AD6
AD7
AH3
AJ3
AD9
AD10
AJ1
AJ2
AF6
AF7
AH1
AH2
AF8
AF9
AG1
AG2
AH7
AH8
USB2_COMP
AB6
USB2_P1_WP1_OTG_ID
AG3
USB2_VBUSSENSE
AG4
A9
C9
D9
USB2_P2_WP3_OC_N
B9
TP_SATA0_DEVSLP
J1
SATA1_DEVSLP
J2
J3
TP_SSD_SATA0_PCIE_DET_N
H2
H3
SSD_SATA_PCIE_DET_N
G4
TP_EDP2DSI_CORE_PWR_EN
H1
USB2_P2_WP3_OC_N
1/7 Add PU +V3P3A
2
USB3_P1_RX_DN 42
USB3_P1_RX_DP 42
USB3_P1_TX_DN 42
USB3_P1_TX_DP 42
USB3_P2_WP2_RX_DN 52
USB3_P2_WP2_RX_DP 52
USB3_P2_WP2_TX_DN 52
USB3_P2_WP2_TX_DP 52
USB3_P3_WWAN_SSIC_RX_DN 44
USB3_P3_WWAN_SSIC_RX_DP 44
USB3_P3_WWAN_SSIC_TX_DN 44
USB3_P3_WWAN_SSIC_TX_DP 44
USB2_P1_WP1_DN 42
USB2_P1_WP1_DP 42
USB2_P2_WP2_DN 55
USB2_P2_WP2_DP 55
USB2_P3_WWAN_DN 44
USB2_P3_WWAN_DP 44
USB2_P4_BT_DN 43
USB2_P4_BT_DP 43
USB2_P5_DOCK_DN 37
USB2_P5_DOCK_DP 37
R1012 113R
R1084 1K
R1085 1K
USB2_P1_WP1_OC_N 42
USB2_P2_WP2_OC_N 53
WWAN_PWR_ON 44
TP1079
TP8201
SATA2_DEVSLP 26
TP1080
TP1082
I R0402 1%
I R0402_N 5%
I R0402_N 5%
TP8213
+V3P3A
R9882
10K
5%
R0402_N
I
Difference with armour
R1050 install,R1087 uninstall
1
USB3.0 CONN
Type-c
WWAN
USB3.0 connector
Type-c
NGFF WWAN Module
BT
USB 2.0 docking
Difference with armour
B9 modify to WWAN_PWR_ON
Difference with armour
modify SATA2_DEVSLP
Difference with armour
SSD_SATA_PCIE_DET_N connect to G4 pin
+V3P3SX
R1087
100K
5%
R0402_N
NI
SSD_SATA_PCIE_DET_N
NOTE:
USE FITC TO ALLOW SELECTION OF
PCIE VS SATA BASED ON STRAPPING:
GPP_E_2 FOR SATA2/PCIE:
1 - SATA2, 0 - PCIE P9,P10,P11,P12
R1050
10K
5%
R0402_N
I
Project:
Project:
+V3P3A
+V3P3SX
5
4
+V3P3A 3,4,5,6,7,10,11,23,24,29,31,37,38,42,47,49,50,51,52,53,56,60,62,65,66,67
+V3P3SX 5,6,7,10,23,26,30,31,36,37,38,39,40,41,43,44,45,46,47
3
Size
Size
Size
Title:
Title:
Title:
SKL-U(7/12)PCIE,USB,SATA
SKL-U(7/12)PCIE,USB,SATA
SKL-U(7/12)PCIE,USB,SATA
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
Project:
Engineer:
Engineer:
Engineer:
Miix510
Miix510
Miix510
1
Jacky
Jacky
Jacky
Rev
Rev
Rev
V01
V01
9 69 Tuesday, June 27, 2017
9 69 Tuesday, June 27, 2017
9 69 Tuesday, June 27, 2017
V01
5
+V5P0A
+V5P0A +V5P0S
CC98
1uF 6.3V 10%
X5R
C0402
I
D D
SLP_S3_N 7,10,50,60
RC420 0R
I R0402 5%
1/4 modify OK
+V5P0A to +V5P0S
CC97
1uF 6.3V 10%
X5R
C0402
I
+V3P3A
1/13 新 增 +V5P0S
UC5
1
2
3
4
5
6
7
CC164
1uF 6.3V 10%
X5R
C0402
I
EM5209VF
dfn14p_ph0p4_3x2_h0p8
I
+V3P3A to +V3P3SX
12/22 新 增+V3P3SX
VIN1
VIN1-1
ON1
VBIAS
ON2
VIN2
VIN2-1
VOUT1
VOUT1-1
VOUT2-1
VOUT2
GPAD
CT1
GND
CT2
4
CC96
0.1uF 10V 10%
X5R
C0402
I
11/17_Follow 543977_SKL_PDDG_Rev0_91
14
CC95 10PF ->22us(Spec:<= 65us)
13
12
CC95 10pF 50V 0.5pF
11
10
CC94 1000pF 50V 10%
9
8
15
I NPO C0402
I X7R C0402
+V3P3SX
CC165
0.1uF 10V 10%
X5R
C0402
I
+1.2V_VDDQC
+1.0V_VCCST
+1.0VS_VCCSTG
+1.2V_VCCSFR_OC
+1.0V_VCCSFR
+V1P2U_VDDQ
3
AU23
AU28
AU35
AU42
BB23
BB32
BB41
BB47
BB51
AM40
A18
A22
AL23
K20
K21
UC1N
CPU POWER 3 OF 4
VDDQ_AU23
VDDQ_AU28
VDDQ_AU35
VDDQ_AU42
VDDQ_BB23
VDDQ_BB32
VDDQ_BB41
VDDQ_BB47
VDDQ_BB51
VDDQC
VCCST
VCCSTG_A22
VCCPLL_OC
VCCPLL_K20
VCCPLL_K21
SKL-U_BGA1356
@
14 OF 20
SKL-U
VCCIO_SENSE
VSSIO_SENSE
VSSSA_SENSE
VCCSA_SENSE
Rev_0.53
VCCIO1
VCCIO2
VCCIO3
VCCIO4
VCCIO5
VCCIO6
VCCIO7
VCCSA1
VCCSA2
VCCSA3
VCCSA4
VCCSA5
VCCSA6
VCCSA7
VCCSA8
VCCSA9
VCCSA10
VCCSA11
VCCSA12
VCCSA13
VCCSA14
+1.0VS_VCCIO
AK28
AK30
AL30
AL42
AM28
AM30
AM42
AK23
AK25
G23
G25
G27
G28
J22
J23
J27
K23
K25
K27
K28
K30
AM23
AM22
H21
H20
VCCIO_SENSE
VSSIO_SENSE
VSSSA_SENSE
VCCSA_SENSE
+VCC_SA
2
VCCSA_SENSE
VSSSA_SENSE
12/2 Close to CPU
T124
T125
VSSSA_SENSE 66
VCCSA_SENSE 66
+VCC_SA
RC421
100R
R0402
I
RC422
100R
R0402
I
1
1%
1%
+V5P0A
C C
SLP_S3_N
CC88
0.1uF 10V 10%
X5R
C0402
I
RC187 0R
+1.0V_PRIM
2/24 pin9 connect GND,need change to +1.0V_PRIM
CC117
1uF 6.3V 10%
X5R
C0402
I
UC6
1
VIN1
2
VIN2
9
VIN thermal
3
VBIAS
I R0402 5%
4
ON
TPS22961DNYR
tps22961_8P_h0p8
I
VOUT3
VOUT2
VOUT1
GND
+1.0VS_VCCSTG_IO
8
7
6
5
RC188 0R
RC189 0R
Imax : 2.73 A
+1.0VS_VCCSTG
CC89 0.1uF 10V 10%
I R0402 5%
+1.0VS_VCCIO
CC90 0.1uF 10V 10%
I R0805_N 5%
CC99 10uF 6.3V 20%
CC100 10uF 6.3V 20%
1/27 Intel Add 10uF x2
I X5R C0402
I X5R C0402
I X5R C0402_N
I X5R C0402_N
+1.0V_PRIM to +1.0VS_VCCSTG / +1.0VS_VCCIO
+V5P0A
+1.0V_PRIM
CC380
0.1uF 10V 10%
X5R
C0402
I
SLP_S4_N 7,42,47,50,60
B B
SLP_S3_N 7,10,50,60
RC142 0R
RC431 0R
EN_1.0V_VCCSTU
I R0402 5%
+1.8V_PRIM
+1.0V_PRIM to +1.0V_VCCSTU
CC376
1uF 6.3V 10%
X5R
C0402
I
I R0402 5%
EN_1.8VS
CC398
1uF 6.3V 10%
X5R
C0402
I
UC8
1
VIN1
2
VIN1-1
3
ON1
4
VBIAS
5
ON2
6
VIN2
7
VIN2-1
EM5209VF
dfn14p_ph0p4_3x2_h0p8
I
VOUT1
VOUT1-1
VOUT2-1
VOUT2
GPAD
14
13
12
CT1
11
GND
10
CT2
9
8
15
+1.0V_VCCSTU_IO
CC392 10pF 50V 0.5pF
CC394 1000pF 50V 10%
I NPO C0402
I X7R C0402
RC432 0R
RC430 0R
+V1P8S
I R0402 5%
+1.0V_VCCSTU
I R0402 5%
CC397
0.1uF 10V 10%
X5R
C0402
I
CC379
0.1uF 10V 10%
X5R
C0402
I
+1.0V_VCCSTU +1.0V_VCCST
RC140 0R
I R0402 5%
+1.0V_VCCSFR
RC143 0R
I R0402 5%
PSC Side
CC48
1uF 6.3V 10%
X5R
C0402
I
RC208 Follow 544669_SKL_U__DDR3L_RVP7_Schematic_Rev1.0
CC55
1uF 6.3V 10%
X5R
C0402
I
+V1P2U_VDDQ
RC141 0R
+1.2V_VCCSFR_OC
BSC Side
I R0402 5%
CC49
1uF 6.3V 10%
X5R
C0402
I
+1.0VS_VCCSTG
BSC Side PSC Side
CC142
1uF 6.3V 10%
X5R
C0402
I
+1.8V_PRIM to +V1P8S
RC208 Follow 544669_SKL_U__DDR3L_RVP7_Schematic_Rev0_53
+1.0VS_VCCIO
10uF 6.3V 20%
10uF 6.3V 20%
1uF 6.3V 10%
CC28
X5R
C0603
I
CC29
X5R
C0402
I
5
CC27
X5R
C0603
I
A A
+V5P0S
+V5P0A
+1.0V_PRIM
+V3P3SX
+V1P2U_VDDQ
+1.0VS_VCCSTG
+1.0VS_VCCIO
+V1P8S
+1.8V_PRIM
1uF 6.3V 10%
CC31
X5R
C0402
I
CC32
X5R
C0402
I
1uF 6.3V 10%
1uF 6.3V 10%
CC30
X5R
C0402
I
+V5P0S 30,46
+V5P0A 11,23,37,39,40,42,53,60,61,62,63,65
+1.0V_PRIM 11,14,63
+V3P3SX 5,6,7,9,23,26,30,31,36,37,38,39,40,41,43,44,45,46,47
+V1P2U_VDDQ 4,19,20,21,61
+1.0VS_VCCSTG 3,12
+1.0VS_VCCIO 3,14
+V1P8S 31,38,46
+1.8V_PRIM 7,11,31,39,40,44,47,56,65
CC33
X5R
C0402
I
PSC Side BSC Side
CC34
X5R
C0402
I
1uF 6.3V 10%
CC35
X5R
C0402
I
1uF 6.3V 10%
CC36
X5R
C0402
I
4
1uF 6.3V 10%
1uF 6.3V 10%
+V1P2U_VDDQ
RC208 0R
CC47 Follow 543016_SKL_U_Y_PDG_0_9
+1.2V_VDDQC
I R0603 5%
BSC Side
10uF 6.3V 20%
CC47
X5R
C0603
I
+V1P2U_VDDQ
10uF 6.3V 20%
10uF 6.3V 20%
10uF 6.3V 20%
CC38
CC37
X5R
X5R
C0603
C0603
I
I
+V1P2U_VDDQ: 10UF/6.3V/0603 *4
22UF/6.3V/0402 *3
3
CC39
X5R
C0603
I
CC40
X5R
C0603
I
10uF 6.3V 20%
CC41
22uF6.3V20%
X5R
C0603_N
I
2
CC42
22uF6.3V20%
X5R
C0603_N
I
CC43
22uF6.3V20%
X5R
C0603_N
I
Project:
Project:
Project:
Miix510
Miix510
Miix510
Jacky
Jacky
Engineer:
Engineer:
Size
Size
Size
Title:
Title:
Title:
C
C
C
Date: Sheet of
Date: Sheet of
Date: Sheet of
Engineer:
SKL-U(8/12)Power
SKL-U(8/12)Power
SKL-U(8/12)Power
Jacky
10 69 Tuesday, June 27, 2017
10 69 Tuesday, June 27, 2017
1
10 69 Tuesday, June 27, 2017
Rev
Rev
Rev
V01
V01
V01
5
+1.0V_PRIM
RC148 0R
22uF 6.3V 20%
D D
Follow 543016_SKL_U_Y_PDG_1_0
RC152 0R
22uF 6.3V 20%
I R0603 5%
CC123
C0603_N
I R0603 5%
CC135
C0603_N
X5R
X5R
+1.0V_APLL
NI
+1.0V_CLK5_F24NS
NI
CC134
22uF 6.3V 20%
X5R
C0603_N
NI
CC130
22uF 6.3V 20%
X5R
C0603_N
NI
CC67
1uF 6.3V 10%
X7R
C0402
NI
+3V_PRIM
+3V_PRIM
RC150 0R
CC72
1uF 6.3V 10%
X7R
C0402
I
RC197 0R
RC154 0R
+1.0V_CLK4_F100OC
RC190 0R
C C
CC136
22uF 6.3V 20%
C0603_N
I R0603 5%
CC137
22uF 6.3V 20%
X5R
X5R
C0603_N
NI
NI
RC161 0R
+1.0V_PRIM
RC163 0R
Imax : 2.57A
near pin AF18,
AF19, V20, V21
CC76
1uF 6.3V 10%
X7R
C0402
I
+1.0V_MPHYAON
RC172 0R
RC175 0R
B B
RC169 0R
RC162 0R
CC86
1uF 6.3V 10%
X7R
C0402
I R0402 5%
NI
I R0402 5%
I R0603 5%
CC75
1uF 6.3V 10%
X7R
C0402
NI
CC87
1uF 6.3V 10%
X7R
C0402
I
+1.0V_CLK6_24TBT
CC138
22uF 6.3V 20%
X5R
C0603_N
NI
+1.0V_DTS
CC139
22uF 6.3V 20%
X5R
C0603_N
NI
RC167 0R
RC171 0R
Follow 543016_SKL_U_Y_PDG_0_9
+1.0V_PRIM +3V_PRIM +1.8V_PRIM
A A
CC111
22uF 6.3V 20%
X5R
C0603_N
NI
CC112
22uF 6.3V 20%
X5R
C0603_N
NI
5
CC113
22uF 6.3V 20%
X5R
C0603_N
NI
CC114
22uF 6.3V 20%
X5R
C0603_N
NI
CC115
22uF 6.3V 20%
X5R
C0603_N
NI
CC116
22uF 6.3V 20%
X5R
C0603_N
NI
I R0402 5%
I R0402 5%
I R0402 5%
I R0402 5%
I R0402 5%
IR0402 5%
I R0402 5%
I R0402 5%
4
+3V_HDA
+3V_PGPPA
+3V_SPI
+3V_PGPPB
CC102
1uF 6.3V 10%
X7R
C0402
I
+3V_PGPPC
CC73
1uF 6.3V 10%
X7R
C0402
I
+3V_1.8V_PGPPD
CC103
1uF 6.3V 10%
X7R
C0402
NI
+3V_PGPPE
CC74
1uF 6.3V 10%
X7R
C0402
I
+3V_PRIM_RTC
CC140
1uF 6.3V 10%
X7R
C0402
I
4
CC163
1uF 6.3V 10%
X7R
C0402
I
+1.8V_PRIM
RC206 0R
CC141
1uF 6.3V 10%
X7R
C0402
I
NIR0402 5%
+V3P3A
RC173 0R
Follow 543016_SKL_U_Y_PDG_0_9
near pin K15, L15
near pin AF20,
AF21, T19, T20
near pin N15, N16
N17, P15, P16
Intel review: need close to pin AA1
+3VALW_DSW
I R0603 5%
3
near pin N18
CC81
CC80
22uF 6.3V 20%
1uF 6.3V 10%
X5R
X7R
C0603_N
C0402
I
I
3
+1.0V_PRIM
+1.0V_PRIM
+1.0V_PRIM
+1.0V_PRIM
+1.8V_PRIM
CC61
1uF 6.3V 10%
X7R
C0402
I
CC68
1uF 6.3V 10%
X7R
C0402
I
CC122
1uF 6.3V 10%
X7R
C0402
I
CC82
22uF 6.3V 20%
X5R
C0603_N
NI
CC389
1uF 6.3V 10%
X7R
C0402
I
+V5A_+V3.3A_PWRGD 50,60
CC85
1uF 6.3V 10%
X7R
C0402
I
+1.0V_PRIM
+1.0V_MPHYAON
+1.0V_PRIM
+1.0VO_DSW
+1.0V_PRIM
+1.0V_APLL
+1.0V_PRIM
+3VALW_DSW
+1.0V_PRIM
+1.0V_PRIM
+1.0V_PRIM
Per 543016_SKL_U_Y_PDG_0_9
VCCRTC does not exceed 3.2 V From PDG
Power Rail Voltage
+CHGRTC
BAT54C(VF)
+3VL_RTC
Result : Pass
RC428 0R
SLP_SUS_N 7
RC191 0R
1/4 Modify OK
+3V_HDA
+3V_SPI
+3V_PRIM
3.383V(MAX)
240 mV
3.143V
+1.0V_PRIM
CC91
1uF 6.3V 10%
X7R
C0402
I
For DS3
I R0402 5%
NI R0402 5%
2
UC1O
AB19
VCCPRIM_1P0_1
AB20
VCCPRIM_1P0_2
P18
VCCPRIM_1P0_3
AF18
VCCPRIM_CORE_1
AF19
VCCPRIM_CORE_2
V20
VCCPRIM_CORE_3
V21
VCCPRIM_CORE_4
AL1
DCPDSW_1P0
K17
VCCMPHYAON_1P0_1
L1
VCCMPHYAON_1P0_2
N15
VCCMPHYGT_1P0_N15
N16
VCCMPHYGT_1P0_N16
N17
VCCMPHYGT_1P0_N17
P15
VCCMPHYGT_1P0_P15
P16
VCCMPHYGT_1P0_P16
K15
VCCAMPHYPLL_1P0_1
L15
VCCAMPHYPLL_1P0_2
V15
VCCAPLL_1P0
AB17
VCCPRIM_1P0_AB17
Y18
VCCPRIM_1P0_Y18
AD17
VCCDSW_3P3_AD17
AD18
VCCDSW_3P3_AD18
AJ17
VCCDSW_3P3_AJ17
AJ19
VCCHDA
AJ16
VCCSPI
AF20
VCCSRAM_1P0_1
AF21
VCCSRAM_1P0_2
T19
VCCSRAM_1P0_3
T20
VCCSRAM_1P0_4
AJ21
VCCPRIM_3P3_AJ21
AK20
VCCPRIM_1P0_AK20
N18
VCCAPLLEBB
SKL-U_BGA1356
@
RTC Battery
CC7 Close UC1.AK19.
+RTCVCC
CC7
1uF 6.3V 10%
X7R
C0402
I
+V3P3A +V5P0A
CC52
CC50
1uF 6.3V 10%
1uF 6.3V 10%
X7R
X7R
C0402
C0402
I
I
EN_3V_PRIM
2
SKL-U
CPU POWER 4 OF 4
VCCPRIM_3P3_V19
VCCPRIM_1P0_T1
VCCRTCPRIM_3P3
GPP_B0/CORE_VID0
GPP_B1/CORE_VID1
15 OF 20
1/11 reserve to BATT conn
3/9 Del RC429,don't connect to BATT_RTC
+RTCBATT_R
DC1
3
BAT54C 200mA 30V
SOT_23
I
2
1
15mils
+V3P3A to +3V_PRIM
UC4
1
2
3
4
AOZ1336DI
WDFN8p_PH0p5_2X2_H0p8
I
VIN1
VIN2
ON
VBIAS
For DS3
7
VOUT1
8
VOUT2
6
CT
5
GND
9
EPAD
Date: Sheet of
Date: Sheet of
Date: Sheet of
1
Rev_0.53
AK15
VCCPGPPA
AG15
VCCPGPPB
Y16
VCCPGPPC
Y15
VCCPGPPD
T16
VCCPGPPE
AF16
VCCPGPPF
AD15
VCCPGPPG
12/9_change to +3V_PRIM, follow #543016
V19
T1
AA1
VCCATS_1P8
AK17
AK19
VCCRTC_AK19
BB14
VCCRTC_BB14
BB10
DCPRTC
A14
VCCCLK1
K19
VCCCLK2
L21
VCCCLK3
N20
VCCCLK4
L19
VCCCLK5
A10
VCCCLK6
AN11
AN13
RC19
1K
R0402
5%
I
15mils 15mils
CC71 0.1uF 10V 10%
PRIMCORE_VID0
PRIMCORE_VID1
+RTCBATT
+3V_PGPPA
+3V_PGPPB
+3V_PGPPC
+3V_1.8V_PGPPD
+3V_PGPPE
+1.8V_PRIM
+3V_PRIM
+3V_PRIM
+1.0V_DTS
+1.8V_PRIM
+3V_PRIM_RTC
+RTCVCC
+1.0V_CLK6_24TBT
+1.0V_APLL
+1.0V_CLK4_F100OC
+1.0V_CLK5_F24NS
+1.0V_CLK6_24TBT
+V3.3AL
@RTC
SHUNWO
LITHIUM BATT
CR2032
Battery_3V_75mAh
CR1216
NI
CIS ok
+V3P3A
R153 0R
For NON-DS3
+3V_PRIMJP
R159 0R
For DS3
CC53 1000pF 50V 10%
Size
Size
Size
Title:
Title:
Title:
Custom
Custom
Custom
I X7R C0402
Project:
Project:
Project:
Engineer:
Engineer:
Engineer:
SKL-U(9/12)Power
SKL-U(9/12)Power
SKL-U(9/12)Power
1
I X5R C0402
T130
T131
JRTC1
1
1
2
2
G1
PAD1
G2
PAD2
11255W90-2P-S-5A-HF-R
wtb_2p_1p25_90_BAT
I
CIS ok
+3V_PRIM
NIR0805_N 5%
I R0805_N 5%
Miix510
Miix510
Miix510
Jacky
Jacky
Jacky
For SD CARD
CC51
0.1uF 10V 10%
X5R
C0402
I
11 69 Tuesday, June 27, 2017
11 69 Tuesday, June 27, 2017
11 69 Tuesday, June 27, 2017
Rev
Rev
Rev
V01
V01
V01
5
4
3
2
1
+VCC_CORE +VCC_CORE
UC1L
A30
VCC_A30
A34
VCC_A34
D D
For CPU2+3e SKU
C C
+1.0V_VCCST
SVID ALERT
B B
SOC_SVID_ALERT#
RC180 220R
I R0402 1%
A39
VCC_A39
A44
VCC_A44
AK33
VCC_AK33
AK35
VCC_AK35
AK37
VCC_AK37
AK38
VCC_AK38
AK40
VCC_AK40
AL33
VCC_AL33
AL37
VCC_AL37
AL40
VCC_AL40
AM32
VCC_AM32
AM33
VCC_AM33
AM35
VCC_AM35
AM37
VCC_AM37
AM38
VCC_AM38
G30
VCC_G30
K32
RSVD_K32
AK32
RSVD_AK32
AB62
VCCOPC_AB62
P62
VCCOPC_P62
V62
VCCOPC_V62
H63
VCC_OPC_1P8_H63
G61
VCC_OPC_1P8_G61
AC63
VCCOPC_SENSE
AE63
VSSOPC_SENSE
AE62
VCCEOPIO_1
AG62
VCCEOPIO_2
AL63
VCCEOPIO_SENSE
AJ62
VSSEOPIO_SENSE
SKL-U_BGA1356
@
Place the PU
resistors close to CPU
RC179
56R
1%
R0402
I
SKL-U
CPU POWER 1 OF 4
12 OF 20
SOC_SVID_ALERT#_R 66
(To VR)
Rev_0.53
VCC_G32
VCC_G33
VCC_G35
VCC_G37
VCC_G38
VCC_G40
VCC_G42
VCC_J30
VCC_J33
VCC_J37
VCC_J40
VCC_K33
VCC_K35
VCC_K37
VCC_K38
VCC_K40
VCC_K42
VCC_K43
VCC_SENSE
VSS_SENSE
VIDALERT#
VIDSCK
VIDSOUT
VCCSTG_G20
G32
G33
G35
G37
G38
G40
G42
J30
J33
J37
J40
K33
K35
K37
K38
K40
K42
K43
E32
E33
B63
A63
D64
G20
SOC_SVID_ALERT#
SOC_SVID_CLK
SOC_SVID_DAT
+VCC_GT
+VCC_CORE
RC448 0R
R0805_N
RC449 0R
R0805_N
5%
U22,U22F
5%
U42
Trace Length < 25 mils
VCCSENSE 66
VSSSENSE 66
SOC_SVID_CLK 66
+1.0VS_VCCSTG
+VCC_GT
+VCC_GTX
+VCC_CORE
RC452 0R
R0805_N
RC446 0R
R0805_N
RC447 0R
R0805_N
5%
U22F
5%
U22,U22F
5%
U42
VCC_VCCGT
+VCC_GTX
VCC_VCCGTX
VCCGT_SENSE 66
VSSGT_SENSE 66
Trace Length < 25 mils
+VCC_GT
U22,U22F
RC451 0R
R0402 5%
VCCGT_SENSE
VSSGT_SENSE
VCC_VCCGT
AA63
AA64
AA66
AA67
AA69
AA70
AA71
AC64
AC65
AC66
AC67
AC68
AC69
AC70
AC71
A48
A53
A58
A62
A66
J43
J45
J46
J48
J50
J52
J53
J55
J56
J58
J60
K48
K50
K52
K53
K55
K56
K58
K60
L62
L63
L64
L65
L66
L67
L68
L69
L70
L71
M62
N63
N64
N66
N67
N69
J70
J69
UC1M
VCCGT1
VCCGT2
VCCGT3
VCCGT4
VCCGT5
VCCGT6
VCCGT7
VCCGT8
VCCGT9
VCCGT10
VCCGT11
VCCGT12
VCCGT13
VCCGT14
VCCGT15
VCCGT16
VCCGT17
VCCGT18
VCCGT19
VCCGT20
VCCGT21
VCCGT22
VCCGT23
VCCGT24
VCCGT25
VCCGT26
VCCGT27
VCCGT28
VCCGT29
VCCGT30
VCCGT31
VCCGT32
VCCGT33
VCCGT34
VCCGT35
VCCGT36
VCCGT37
VCCGT38
VCCGT39
VCCGT40
VCCGT41
VCCGT42
VCCGT43
VCCGT44
VCCGT45
VCCGT46
VCCGT47
VCCGT48
VCCGT49
VCCGT50
VCCGT51
VCCGT52
VCCGT53
VCCGT54
VCCGT55
VCCGT_SENSE1
VSSGT_SENSE
SKL-U_BGA1356
@
CPU POWER 2 OF 4
SKL-U
13 OF 20
Rev_0.53
VCCGT56
VCCGT57
VCCGT58
VCCGT59
VCCGT60
VCCGT61
VCCGT62
VCCGT63
VCCGT64
VCCGT65
VCCGT66
VCCGT67
VCCGT68
VCCGT69
VCCGT70
VCCGT71
VCCGT72
VCCGT73
VCCGT74
VCCGT75
VCCGT76
VCCGT77
VCCGT78
VCCGT79
VCCGT80
VCCGTX_AK42
VCCGTX_AK43
VCCGTX_AK45
VCCGTX_AK46
VCCGTX_AK48
VCCGTX_AK50
VCCGTX_AK52
VCCGTX_AK53
VCCGTX_AK55
VCCGTX_AK56
VCCGTX_AK58
VCCGTX_AK60
VCCGTX_AK70
VCCGTX_AL43
VCCGTX_AL46
VCCGTX_AL50
VCCGTX_AL53
VCCGTX_AL56
VCCGTX_AL60
VCCGTX_AM48
VCCGTX_AM50
VCCGTX_AM52
VCCGTX_AM53
VCCGTX_AM56
VCCGTX_AM58
VCCGTX_AU58
VCCGTX_AU63
VCCGTX_BB57
VCCGTX_BB66
VCCGTX_SENSE2
VSSGTX_SENSE
N70
N71
R63
R64
R65
R66
R67
R68
R69
R70
R71
T62
U65
U68
U71
W63
W64
W65
W66
W67
W68
W69
W70
W71
Y62
AK42
AK43
AK45
AK46
AK48
AK50
AK52
AK53
AK55
AK56
AK58
AK60
AK70
AL43
AL46
AL50
AL53
AL56
AL60
AM48
AM50
AM52
AM53
AM56
AM58
AU58
AU63
BB57
BB66
AK62
AL61
+VCC_GT
VCC_VCCGTX
+VCC_GTX
U22F
RC450 0R
R0402 5%
6.0A
For CPU2+3e SKU
+1.0V_VCCST
SVID DATA
SOC_SVID_DAT
+VCC_CORE
+1.0VS_VCCSTG
+VCC_GT
+1.0V_VCCST
A A
Place the PU
resistors close to CPU
RC181
1%
100R
R0402
I
SOC_SVID_DAT 66
+VCC_CORE 15,67
+1.0VS_VCCSTG 3,10
+VCC_GT 15,67
+1.0V_VCCST 3,7,10,14,66
(To VR)
VCCSENSE
VSSSENSE
+VCC_CORE
RC423
100R
R0402
I
RC424
100R
R0402
I
1%
VCCGT_SENSE
VSSGT_SENSE
1%
+VCC_GT
RC425
100R
R0402
I
RC426
100R
R0402
I
1%
1%
12/2 Close to CPU
Project:
Project:
Project:
Engineer:
Engineer:
Size
Size
Size
Title:
Title:
Title:
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
Engineer:
SKL-U(10/12)Power,SVID
SKL-U(10/12)Power,SVID
SKL-U(10/12)Power,SVID
Miix510
Miix510
Miix510
1
Jacky
Jacky
Jacky
Rev
Rev
Rev
V01
V01
12 69 Tuesday, June 27, 2017
12 69 Tuesday, June 27, 2017
12 69 Tuesday, June 27, 2017
V01
5
4
3
2
1
D D
A5
A67
A70
AA2
AA4
AA65
AA68
AB15
AB16
AB18
AB21
AB8
AD13
AD16
AD19
AD20
AD21
AD62
AD8
AE64
AE65
AE66
AE67
C C
B B
AE68
AE69
AF10
AF15
AF17
AF63
AG16
AG17
AG18
AG19
AG20
AG21
AG71
AH13
AH63
AH64
AH67
AJ15
AJ18
AJ20
AK11
AK16
AK18
AK21
AK22
AK27
AK63
AK68
AK69
AL28
AL32
AL35
AL38
AL45
AL48
AL52
AL55
AL58
AL64
AF1
AF2
AF4
AH6
AJ4
AK8
AL2
AL4
@
UC1P
GND 1 OF 3
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65
VSS66
VSS67
VSS68
VSS69
VSS70
SKL-U_BGA1356
SKL-U
Rev_0.53 Rev_0.53
AL65
VSS71
AL66
VSS72
AM13
VSS73
AM21
VSS74
AM25
VSS75
AM27
VSS76
AM43
VSS77
AM45
VSS78
AM46
VSS79
AM55
VSS80
AM60
VSS81
AM61
VSS82
AM68
VSS83
AM71
VSS84
AM8
VSS85
AN20
VSS86
AN23
VSS87
AN28
VSS88
AN30
VSS89
AN32
VSS90
AN33
VSS91
AN35
VSS92
AN37
VSS93
AN38
VSS94
AN40
VSS95
AN42
VSS96
AN58
VSS97
AN63
VSS98
AP10
VSS99
AP18
VSS100
AP20
VSS101
AP23
VSS102
AP28
VSS103
AP32
VSS104
AP35
VSS105
AP38
VSS106
AP42
VSS107
AP58
VSS108
AP63
VSS109
AP68
VSS110
AP70
VSS111
AR11
VSS112
AR15
VSS113
AR16
VSS114
AR20
VSS115
AR23
VSS116
AR28
VSS117
AR35
VSS118
AR42
VSS119
AR43
VSS120
AR45
VSS121
AR46
VSS122
AR48
VSS123
AR5
VSS124
AR50
VSS125
AR52
VSS126
AR53
VSS127
AR55
VSS128
AR58
VSS129
AR63
VSS130
AR8
VSS131
AT2
VSS132
AT20
VSS133
AT23
VSS134
AT28
VSS135
AT35
VSS136
AT4
VSS137
AT42
VSS138
AT56
VSS139
AT58
VSS140
16 OF 20
AT63
AT68
AT71
AU10
AU15
AU20
AU32
AU38
AV68
AV69
AV70
AV71
AW10
AW12
AW14
AW16
AW18
AW21
AW23
AW26
AW28
AW30
AW32
AW34
AW36
AW38
AW41
AW43
AW45
AW47
AW49
AW51
AW53
AW55
AW57
AW6
AW60
AW62
AW64
AW66
AW8
AY66
BA10
BA14
BA18
BA23
BA28
BA32
BA36
BA45
AV1
B10
B14
B18
B22
B30
B34
B39
B44
B48
B53
B58
B62
B66
B71
BA1
BA2
F68
UC1Q
GND 2 OF 3
VSS141
VSS142
VSS143
VSS144
VSS145
VSS146
VSS147
VSS148
VSS149
VSS150
VSS151
VSS152
VSS153
VSS154
VSS155
VSS156
VSS157
VSS158
VSS159
VSS160
VSS161
VSS162
VSS163
VSS164
VSS165
VSS166
VSS167
VSS168
VSS169
VSS170
VSS171
VSS172
VSS173
VSS174
VSS175
VSS176
VSS177
VSS178
VSS179
VSS180
VSS181
VSS182
VSS183
VSS184
VSS185
VSS186
VSS187
VSS188
VSS189
VSS190
VSS191
VSS192
VSS193
VSS194
VSS195
VSS196
VSS197
VSS198
VSS199
VSS200
VSS201
VSS202
VSS203
VSS204
VSS205
VSS206
VSS207
VSS208
SKL-U_BGA1356
@
SKL-U
17 OF 20
VSS209
VSS210
VSS211
VSS212
VSS213
VSS214
VSS215
VSS216
VSS217
VSS218
VSS219
VSS220
VSS221
VSS222
VSS223
VSS224
VSS225
VSS226
VSS227
VSS228
VSS229
VSS230
VSS231
VSS232
VSS233
VSS234
VSS235
VSS236
VSS237
VSS238
VSS239
VSS240
VSS241
VSS242
VSS243
VSS244
VSS245
VSS246
VSS247
VSS248
VSS249
VSS250
VSS251
VSS252
VSS253
VSS254
VSS255
VSS256
VSS257
VSS258
VSS259
VSS260
VSS261
VSS262
VSS263
VSS264
VSS265
VSS266
VSS267
VSS268
VSS269
VSS270
VSS271
VSS272
VSS273
VSS274
VSS275
VSS276
VSS277
BA49
BA53
BA57
BA6
BA62
BA66
BA71
BB18
BB26
BB30
BB34
BB38
BB43
BB55
BB6
BB60
BB64
BB67
BB70
C1
C25
C5
D10
D11
D14
D18
D22
D25
D26
D30
D34
D39
D44
D45
D47
D48
D53
D58
D6
D62
D66
D69
E11
E15
E18
E21
E46
E50
E53
E56
E6
E65
E71
F1
F13
F2
F22
F23
F27
F28
F32
F33
F35
F37
F38
F4
F40
F42
BA41
UC1R
F8
G10
G22
G43
G45
G48
G5
G52
G55
G58
G6
G60
G63
G66
H15
H18
H71
J11
J13
J25
J28
J32
J35
J38
J42
J8
K16
K18
K22
K61
K63
K64
K65
K66
K67
K68
K70
K71
L11
L16
L17
@
GND 3 OF 3
VSS278
VSS279
VSS280
VSS281
VSS282
VSS283
VSS284
VSS285
VSS286
VSS287
VSS288
VSS289
VSS290
VSS291
VSS292
VSS293
VSS294
VSS295
VSS296
VSS297
VSS298
VSS299
VSS300
VSS301
VSS302
VSS303
VSS304
VSS305
VSS306
VSS307
VSS308
VSS309
VSS310
VSS311
VSS312
VSS313
VSS314
VSS315
VSS316
VSS317
VSS318
SKL-U_BGA1356
SKL-U
18 OF 20
Rev_0.53
VSS319
VSS320
VSS321
VSS322
VSS323
VSS324
VSS325
VSS326
VSS327
VSS328
VSS329
VSS330
VSS331
VSS332
VSS333
VSS334
VSS335
VSS336
VSS337
VSS338
VSS339
VSS340
VSS341
VSS342
VSS343
VSS344
VSS345
VSS346
VSS347
VSS348
VSS349
VSS350
VSS351
VSS352
VSS353
VSS354
VSS355
VSS356
VSS357
VSS358
VSS359
L18
L2
L20
L4
L8
N10
N13
N19
N21
N6
N65
N68
P17
P19
P20
P21
R13
R6
T15
T17
T18
T2
T21
T4
U10
U63
U64
U66
U67
U69
U70
V16
V17
V18
W13
W6
W9
Y17
Y19
Y20
Y21
A A
Project:
Project:
Project:
Engineer:
Engineer:
Size
Size
Size
Title:
Title:
Title:
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
Engineer:
SKL-U(11/12)GND
SKL-U(11/12)GND
SKL-U(11/12)GND
Miix510
Miix510
Miix510
1
Jacky
Jacky
Jacky
Rev
Rev
Rev
V01
V01
13 69 Tuesday, June 27, 2017
13 69 Tuesday, June 27, 2017
13 69 Tuesday, June 27, 2017
V01
5
4
3
2
1
D D
C C
RC427 0R
B B
+1.0VS_VCCIO
+V1P0A_VCCPRIM
+1.0V_PRIM
+1.0V_VCCST
+1.0VS_VCCIO
+V1P0A_VCCPRIM
+V1P0A_VCCPRIM +1.0V_PRIM
I R0402 5%
R9760
1K
5%
R0402_N
I
R1049 1K
R1068 49.9R
R1067 1K
+1.0VS_VCCIO 3,10
+V1P0A_VCCPRIM 7
+1.0V_PRIM 10,11,63
+1.0V_VCCST 3,7,10,12,66
I R0402_N 5%
I R0402 1%
I R0402_N 5%
CFG_0
CFG_4
NOA_RCOMP
ITP_PMODE
AL25
AL27
BA70
BA68
E68
B67
D65
D67
E70
C68
D68
C67
F71
G69
F70
G68
H70
G71
H69
G70
E63
F63
E66
F66
E60
E8
AY2
AY1
D1
D3
K46
K45
C71
B70
F60
A52
J71
J68
F65
G65
F61
E61
UC1S
CFG[0]
CFG[1]
CFG[2]
CFG[3]
CFG[4]
CFG[5]
CFG[6]
CFG[7]
CFG[8]
CFG[9]
CFG[10]
CFG[11]
CFG[12]
CFG[13]
CFG[14]
CFG[15]
CFG[16]
CFG[17]
CFG[18]
CFG[19]
CFG_RCOMP
ITP_PMODE
RSVD_AY2
RSVD_AY1
RSVD_D1
RSVD_D3
RSVD_K46
RSVD_K45
RSVD_AL25
RSVD_AL27
RSVD_C71
RSVD_B70
RSVD_F60
RSVD_A52
RSVD_TP_BA70
RSVD_TP_BA68
RSVD_J71
RSVD_J68
VSS_F65
VSS_G65
RSVD_F61
RSVD_E61
SKL-U_BGA1356
@
RESERVED SIGNALS-1
SKL-U
RSVD_TP_BB68
RSVD_TP_BB69
RSVD_TP_AK13
RSVD_TP_AK12
RSVD_AW1
RSVD_TP_AW71
RSVD_TP_AW70
19 OF 20
For 2+3e Solution
PM_ZVM#
PM_MSM#
PROC_SELECT#
Rev_0.53
RSVD_BB2
RSVD_BA3
RSVD_D5
RSVD_D4
RSVD_B2
RSVD_C2
RSVD_B3
RSVD_A3
RSVD_E1
RSVD_E2
RSVD_BA4
RSVD_BB4
RSVD_A4
RSVD_C4
RSVD_A69
RSVD_B69
RSVD_AY3
RSVD_D71
RSVD_C70
RSVD_C54
RSVD_D54
VSS_AY71
ZVM#
MSM#
BB68
BB69
AK13
AK12
BB2
BA3
AU5
TP5
AT5
TP6
D5
D4
B2
C2
B3
A3
AW1
E1
E2
BA4
BB4
A4
C4
BB5
TP4
A69
B69
AY3
D71
C70
C54
D54
AY4
TP1
BB3
TP2
AY71
AR56
AW71
AW70
AP56
SKL_CNL#
C64
RC182 0R
RC183 0R
RC184 100K
I R0402 5%
I R0402 5%
I R0402 5%
XTAL_24M_SOC_OUT_U42
+1.0V_VCCST
Difference with armour
AW69
AW68
AU56
AW48
C7
U12
U11
H11
UC1T
RSVD_AW69
RSVD_AW68
RSVD_AU56
RSVD_AW48
RSVD_C7
RSVD_U12
RSVD_U11
RSVD_H11
SKL-U_BGA1356
@
SKL-U
SPARE
20 OF 20
XTAL_24M_SOC_IN_U42
XTAL_24M_SOC_OUT_U42
C9977
8.2pF 50V 0.1pF
NPO
C0402_N
U42
Rev_0.53
RSVD_F6
RSVD_E3
RSVD_C11
RSVD_B11
RSVD_A11
RSVD_D12
RSVD_C12
RSVD_F52
R10067 1M
R0402 5%
Y1002
2
Y2
3
Y3
24MHZ 10PPM
X4S32X25
U42
F6
XTAL_24M_SOC_IN_U42
E3
C11
B11
A11
D12
C12
F52
U42
GND
1
Y1
4
Y4
GND
C9976
8.2pF 50V 0.1pF
NPO
C0402_N
U42
Follow 544669_SKL_U_DDR3L_RVP7_schematic_rev1.0
A A
Display Port Presence Strap
CFG4
1 : Disabled; No Physical Display Port
attached to Embedded Display Port
0 : Enabled; An external Display Port device is
connected to the Embedded Display Port
5
Project:
Project:
Project:
Engineer:
Engineer:
Size
Size
Size
Title:
Title:
Title:
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
4
3
2
Date: Sheet of
Engineer:
SKL-U(12/12)RSVD
SKL-U(12/12)RSVD
SKL-U(12/12)RSVD
Miix510
Miix510
Miix510
1
Jacky
Jacky
Jacky
Rev
Rev
Rev
V01
V01
14 69 Tuesday, June 27, 2017
14 69 Tuesday, June 27, 2017
14 69 Tuesday, June 27, 2017
V01
5
4
3
2
1
+VCC_CORE
12/30 check PDG
CC174
47uF 4V 20%
C0805_N
X5R
NI
CC175
47uF 4V 20%
C0805_N
X5R
NI
CC176
47uF 4V 20%
C0805_N
X5R
NI
CC173
47uF 4V 20%
C0805_N
X5R
NI
20170627 by Justice for acoustic noise
CC183
22uF 6.3V 20%
X5R
C0603_N
I
CC184
22uF 6.3V 20%
X5R
C0603_N
I
CC185
22uF 6.3V 20%
X5R
C0603_N
I
CC182
D D
22uF 6.3V 20%
X5R
C0603_N
I
CC186
22uF 6.3V 20%
X5R
C0603_N
I
CC187
22uF 6.3V 20%
X5R
C0603_N
I
CC188
22uF 6.3V 20%
X5R
C0603_N
I
CC189
22uF 6.3V 20%
X5R
C0603_N
I
CC190
22uF 6.3V 20%
X5R
C0603_N
I
CC362
22uF 6.3V 20%
X5R
C0603_N
I
CC363
22uF 6.3V 20%
X5R
C0603_N
I
CC364
22uF 6.3V 20%
X5R
C0603_N
I
CC365
22uF 6.3V 20%
X5R
C0603_N
I
CC366
22uF 6.3V 20%
X5R
C0603_N
I
CC367
22uF 6.3V 20%
X5R
C0603_N
I
CC368
22uF 6.3V 20%
X5R
C0603_N
I
CC369
22uF 6.3V 20%
X5R
C0603_N
I
& 220uF pull power side
+VCC_CORE
47uF x8
22uF x9
10uF x15
change 47uF x4
cgange 22uF x17
1uF x35
CC193
10uF 6.3V 20%
C0402_N
X5R
I
CC194
10uF 6.3V 20%
C0402_N
X5R
I
CC195
10uF 6.3V 20%
C0402_N
X5R
I
CC196
10uF 6.3V 20%
C0402_N
X5R
I
CC197
10uF 6.3V 20%
C0402_N
X5R
I
CC198
10uF 6.3V 20%
C0402_N
X5R
I
CC199
10uF 6.3V 20%
C0402_N
X5R
I
CC200
10uF 6.3V 20%
C0402_N
X5R
I
CC201
10uF 6.3V 20%
C0402_N
X5R
I
CC202
10uF 6.3V 20%
C0402_N
X5R
I
CC203
10uF 6.3V 20%
C0402_N
X5R
I
CC204
10uF 6.3V 20%
C0402_N
X5R
I
CC205
10uF 6.3V 20%
C0402_N
X5R
I
CC206
10uF 6.3V 20%
C0402_N
X5R
I
CC207
10uF 6.3V 20%
C0402_N
X5R
I
CC311
CC306
CC307
1uF 6.3V 10%
X5R
C0201
I
CC334
1uF 6.3V 10%
X5R
C0201
I
CC308
1uF 6.3V 10%
X5R
C0201
I
CC335
1uF 6.3V 10%
X5R
C0201
I
1uF 6.3V 10%
X5R
C0201
I
CC333
1uF 6.3V 10%
X5R
C0201
I
C C
CC309
1uF 6.3V 10%
X5R
C0201
I
CC336
1uF 6.3V 10%
X5R
C0201
I
CC310
1uF 6.3V 10%
X5R
C0201
I
CC337
1uF 6.3V 10%
X5R
C0201
I
1uF 6.3V 10%
X5R
C0201
I
CC338
1uF 6.3V 10%
X5R
C0201
I
CC312
1uF 6.3V 10%
X5R
C0201
I
CC339
1uF 6.3V 10%
X5R
C0201
I
CC313
1uF 6.3V 10%
X5R
C0201
I
CC340
1uF 6.3V 10%
X5R
C0201
I
CC314
1uF 6.3V 10%
X5R
C0201
I
CC324
1uF 6.3V 10%
X5R
C0201
I
+VCC_GT
CC243
CC244
22uF 6.3V 20%
22uF 6.3V 20%
X5R
X5R
C0603_N
C0603_N
I
I
CC257
CC258
10uF 6.3V 20%
10uF 6.3V 20%
C0402_N
C0402_N
X5R
X5R
I
CC341
1uF 6.3V 10%
X5R
C0201
I
I
CC342
1uF 6.3V 10%
X5R
C0201
I
B B
CC245
22uF 6.3V 20%
X5R
C0603_N
I
CC259
10uF 6.3V 20%
C0402_N
X5R
I
CC343
1uF 6.3V 10%
X5R
C0201
I
CC246
22uF 6.3V 20%
X5R
C0603_N
I
CC260
10uF 6.3V 20%
C0402_N
X5R
I
CC344
1uF 6.3V 10%
X5R
C0201
I
CC247
22uF 6.3V 20%
X5R
C0603_N
I
CC261
10uF 6.3V 20%
C0402_N
X5R
I
CC345
1uF 6.3V 10%
X5R
C0201
I
CC248
22uF 6.3V 20%
X5R
C0603_N
I
CC262
10uF 6.3V 20%
C0402_N
X5R
I
CC346
1uF 6.3V 10%
X5R
C0201
I
CC249
22uF 6.3V 20%
X5R
C0603_N
I
CC263
10uF 6.3V 20%
C0402_N
X5R
I
CC347
1uF 6.3V 10%
X5R
C0201
I
CC370
22uF 6.3V 20%
X5R
C0603_N
I
CC264
10uF 6.3V 20%
C0402_N
X5R
I
CC348
1uF 6.3V 10%
X5R
C0201
I
CC371
22uF 6.3V 20%
X5R
C0603_N
I
CC265
10uF 6.3V 20%
C0402_N
X5R
I
CC349
1uF 6.3V 10%
X5R
C0201
I
CC315
1uF 6.3V 10%
X5R
C0201
I
CC325
1uF 6.3V 10%
X5R
C0201
I
CC372
22uF 6.3V 20%
X5R
C0603_N
I
CC266
10uF 6.3V 20%
C0402_N
X5R
I
CC350
1uF 6.3V 10%
X5R
C0201
I
CC316
1uF 6.3V 10%
X5R
C0201
I
CC326
1uF 6.3V 10%
X5R
C0201
I
CC373
22uF 6.3V
X5R
C0603
NI
CC304
10uF 6.3V 20%
C0402_N
X5R
I
CC351
1uF 6.3V 10%
X5R
C0201
I
CC317
1uF 6.3V 10%
X5R
C0201
I
CC327
1uF 6.3V 10%
X5R
C0201
I
CC374
22uF 6.3V
X5R
C0603
NI
CC305
10uF 6.3V 20%
C0402_N
X5R
I
CC352
1uF 6.3V 10%
X5R
C0201
I
CC318
1uF 6.3V 10%
X5R
C0201
I
CC328
1uF 6.3V 10%
X5R
C0201
I
CC319
1uF 6.3V 10%
X5R
C0201
I
CC329
1uF 6.3V 10%
X5R
C0201
I
CC320
1uF 6.3V 10%
X5R
C0201
I
CC330
1uF 6.3V 10%
X5R
C0201
I
20170627 by Justice for acoustic noise
+VCC_GT
CC375
22uF 6.3V
X5R
C0603
NI
CC381
22uF 6.3V
X5R
C0603
NI
1/27 Intel Add
CC353
CC354
1uF 6.3V 10%
1uF 6.3V 10%
X5R
X5R
C0201
C0201
I
I
+VCC_GT
CC321
1uF 6.3V 10%
X5R
C0201
I
CC331
1uF 6.3V 10%
X5R
C0201
I
CC382
22uF 6.3V
X5R
C0603
NI
CC390
22uF 6.3V 20%
X5R
C0603_N
NI
CC322
1uF 6.3V 10%
X5R
C0201
I
CC332
1uF 6.3V 10%
X5R
C0201
I
CC383
22uF 6.3V 20%
X5R
C0603_N
I
CC391
22uF 6.3V 20%
X5R
C0603_N
NI
CC323
1uF 6.3V 10%
X5R
C0201
I
CC384
22uF 6.3V 20%
X5R
C0603_N
I
12/30 check PDG
& 220uF pull power side
+VCC_GT
47uF x3
22uF x7
10uF x12
1uF x14
change 47uF x0
cgange 22uF x13
3/14 Power:add CC390,CC391 reserved
+VCC_SA
CC296
CC295
47uF 4V 20%
47uF 4V 20%
C0805_N
C0805_N
X5R
X5R
I
I
CC282
10uF 6.3V 20%
C0402_N
X5R
A A
I
CC355
1uF 6.3V 10%
X5R
C0201
I
CC283
10uF 6.3V 20%
C0402_N
X5R
I
CC356
1uF 6.3V 10%
X5R
C0201
I
5
CC284
10uF 6.3V 20%
C0402_N
X5R
I
CC357
1uF 6.3V 10%
X5R
C0201
I
CC285
10uF 6.3V 20%
C0402_N
X5R
I
CC358
1uF 6.3V 10%
X5R
C0201
I
CC286
10uF 6.3V 20%
C0402_N
X5R
I
CC359
1uF 6.3V 10%
X5R
C0201
I
10uF 6.3V 20%
C0402_N
X5R
I
CC360
1uF 6.3V 10%
X5R
C0201
I
CC288
10uF 6.3V 20%
C0402_N
X5R
I
CC361
1uF 6.3V 10%
X5R
C0201
I
CC289
10uF 6.3V 20%
C0402_N
X5R
I
4
CC290
10uF 6.3V 20%
C0402_N
X5R
I
CC287
CC291
10uF 6.3V 20%
C0402_N
X5R
I
CC292
10uF 6.3V 20%
C0402_N
X5R
I
CC293
10uF 6.3V 20%
C0402_N
X5R
I
CC294
10uF 6.3V 20%
C0402_N
X5R
I
3
+VCC_SA
+VCC_CORE
+VCC_GT
+VCC_SA
CC385
22uF 6.3V 20%
X5R
C0603_N
1/27 Intel Add
CC386
22uF 6.3V 20%
X5R
C0603_N
CC387
22uF 6.3V 20%
X5R
C0603_N
+VCC_CORE 12,67
+VCC_GT 12,67
+VCC_SA 10,23,67
CC388
22uF 6.3V 20%
X5R
C0603_N
+VCC_SA
47uF x2
10uF x13
1uF x7
2
12/30 check PDG
Project:
Project:
Project:
Miix510
Miix510
Miix510
Jacky
Jacky
Engineer:
Engineer:
Size
Size
Size
Title:
Title:
Title:
C
C
C
Date: Sheet of
Date: Sheet of
Date: Sheet of
Engineer:
SOC (DECOUPLING)
SOC (DECOUPLING)
SOC (DECOUPLING)
Jacky
15 69 Tuesday, June 27, 2017
15 69 Tuesday, June 27, 2017
1
15 69 Tuesday, June 27, 2017
Rev
Rev
Rev
V01
V01
V01
5
D D
C C
4
3
2
1
B B
A A
Project:
Project:
Project:
Engineer:
Engineer:
Size
Size
Size
Title:
Title:
Title:
B
B
B
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
NA
NA
NA
Engineer:
Miix510
Miix510
Miix510
Jacky
Jacky
Jacky
1
Rev
Rev
Rev
V01
V01
16 69 Tuesday, June 27, 2017
16 69 Tuesday, June 27, 2017
16 69 Tuesday, June 27, 2017
V01
5
D D
C C
4
3
2
1
B B
A A
Project:
Project:
Project:
Engineer:
Engineer:
Size
Size
Size
Title:
Title:
Title:
B
B
B
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
NA
NA
NA
Engineer:
Miix510
Miix510
Miix510
Jacky
Jacky
Jacky
1
Rev
Rev
Rev
V01
V01
17 69 Tuesday, June 27, 2017
17 69 Tuesday, June 27, 2017
17 69 Tuesday, June 27, 2017
V01
5
D D
C C
4
3
2
1
B B
A A
Project:
Project:
Project:
Engineer:
Engineer:
Size
Size
Size
Title:
Title:
Title:
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
NA
NA
NA
Engineer:
Miix510
Miix510
Miix510
1
Jacky
Jacky
Jacky
Rev
Rev
Rev
V01
V01
18 69 Tuesday, June 27, 2017
18 69 Tuesday, June 27, 2017
18 69 Tuesday, June 27, 2017
V01
5
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VREFCA
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VREFCA
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
+V1P2U_VDDQ
B3
VDD
B9
VDD
D1
VDD
J1
VDD
J9
VDD
L1
VDD
L9
VDD
R1
VDD
T9
VDD
G7
VDD
A1
A9
C1
D9
F2
F8
G1
G9
J2
J8
B1
VPP
R9
VPP
A2
A8
C9
D2
D8
E3
E8
H1
H9
F1
B2
VSS
E1
VSS
E9
VSS
G8
VSS
K1
VSS
K9
VSS
M9
VSS
N1
VSS
T1
VSS
NC
T7
M1
M_A_DQ<9> 4
M_A_DQ<11> 4
M_A_DQ<12> 4
M_A_DQ<10> 4
M_A_DQ<8> 4
M_A_DQ<15> 4
M_A_DQ<14> 4
M_A_DQ<13> 4
+V1P2U_VDDQ
M_A_DQS_DP<1> 4
M_A_DQS_DN<1> 4
+V2P5U_VPP
M_A_DQ<5> 4
M_A_DQ<3> 4
M_A_DQ<1> 4
M_A_DQ<6> 4
M_A_DQ<4> 4
M_A_DQ<7> 4
M_A_DQ<0> 4
M_A_DQ<2> 4
+V1P2U_VDDQ
M_A_DQS_DP<0> 4
M_A_DQS_DN<0> 4
RM79
M_A_BG1
1/19 Inte:check samsung DDP package,reserved.
VREFCA_CHA
CM2
47nF 16V 10%
X7R
C0402_N
I
+V1P2U_VDDQ
B3
VDD
B9
VDD
D1
VDD
J1
VDD
J9
VDD
L1
VDD
L9
VDD
R1
VDD
T9
VDD
G7
VDD
A1
A9
C1
D9
F2
F8
G1
G9
J2
J8
B1
VPP
R9
VPP
A2
A8
C9
D2
D8
E3
E8
H1
H9
F1
B2
VSS
E1
VSS
E9
VSS
G8
VSS
K1
VSS
K9
VSS
M9
VSS
N1
VSS
T1
VSS
NC
T7
M1
M_A_DQ<32> 4
M_A_DQ<39> 4
M_A_DQ<37> 4
M_A_DQ<38> 4
M_A_DQ<33> 4
M_A_DQ<35> 4
M_A_DQ<36> 4
M_A_DQ<34> 4
+V1P2U_VDDQ
M_A_DQS_DP<4> 4
M_A_DQS_DN<4> 4
+V2P5U_VPP
M_A_DQ<53> 4
M_A_DQ<51> 4
M_A_DQ<49> 4
M_A_DQ<54> 4
M_A_DQ<48> 4
M_A_DQ<50> 4
M_A_DQ<52> 4
M_A_DQ<55> 4
+V1P2U_VDDQ
M_A_DQS_DP<6> 4
M_A_DQS_DN<6> 4
RM83
M_A_BG1 M_A_BG1
VREFCA_CHA VREFCA_CHA
CM4
47nF 16V 10%
X7R
C0402_N
I
UM1A
P3
I R0402_N 1%
A0
P7
A1
R3
A2
N7
A3
N3
A4
P8
A5
P2
A6
R8
A7
R2
A8
R7
A9
M3
A10/AP
T2
A11
M7
A12/BC
T8
A13
L2
A14/WE
M8
A15/CAS
L8
A16/RAS
N2
BA0
N8
BA1
K2
CKE/CKE0
K7
CLK
K8
CLK#
ODT
K3
ZQ
F9
M2
BG0
N9
TEN
L3
ACT#
P1
RESET#
T3
PAR
L7
CS#
P9
ALERT#
MT40A512M16HA-083E:A
bga96_p8mm_9p1x14p1
I
M_A_A0 4
M_A_A1 4
M_A_A2 4
M_A_A3 4
M_A_A4 4
M_A_A5 4
M_A_A6 4
M_A_A7 4
D D
M_A_A8 4
M_A_A9 4
M_A_A10_AP 4
M_A_A11 4
M_A_A12 4
M_A_A13 4
M_A_A14_WE_N 4
M_A_A15_CAS_N 4
M_A_A16_RAS_N 4
M_A_BA0 4
M_A_BA1 4
M_A_DIM0_CKE0 4
M_A_DIM0_CK_DDR0_DP 4
M_A_DIM0_CK_DDR0_DN 4
M_A_DIM0_ODT0 4
RM5 240R
M_A_BG0 4
M_A_ACT_N 4
DDR4_DRAMRST_R
C C
DDR0_A_PARITY 4
M_A_DIM0_CS0_N 4
DDR0_A_ALERT_N 4
UM3A
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
B B
M_A_A10_AP
M_A_A11
M_A_A12
M_A_A13
M_A_A14_WE_N
M_A_A15_CAS_N
M_A_A16_RAS_N
M_A_BA0
M_A_BA1
M_A_DIM0_CKE0
M_A_DIM0_CK_DDR0_DP
M_A_DIM0_CK_DDR0_DN
M_A_DIM0_ODT0
RM7 240R
M_A_BG0
M_A_ACT_N
DDR4_DRAMRST_R
A A
DDR0_A_PARITY
M_A_DIM0_CS0_N
DDR0_A_ALERT_N
I R0402_N 1%
5
P3
A0
P7
A1
R3
A2
N7
A3
N3
A4
P8
A5
P2
A6
R8
A7
R2
A8
R7
A9
M3
A10/AP
T2
A11
M7
A12/BC
T8
A13
L2
A14/WE
M8
A15/CAS
L8
A16/RAS
N2
BA0
N8
BA1
K2
CKE/CKE0
K7
CLK
K8
CLK#
ODT
K3
ZQ
F9
M2
BG0
N9
TEN
L3
ACT#
P1
RESET#
T3
PAR
L7
CS#
P9
ALERT#
MT40A512M16HA-083E:A
bga96_p8mm_9p1x14p1
I
4
UM1B
G2
DQ0
F7
DQ1
H3
DQ2
H7
DQ3
H2
DQ4
H8
DQ5
J3
DQ6
L
J7
DQ7
E7
DQM
G3
DQS
F3
DQS#
MT40A512M16HA-083E:A
bga96_p8mm_9p1x14p1
I
UM1C
A3
DQ0
B8
DQ1
C3
DQ2
C7
DQ3
C2
DQ4
C8
DQ5
D3
DQ6
U
D7
DQ7
E2
DQM
B7
DQS
A7
DQS#
MT40A512M16HA-083E:A
bga96_p8mm_9p1x14p1
I
I R0402_N0R5%
UM3B
G2
DQ0
F7
DQ1
H3
DQ2
H7
DQ3
H2
DQ4
H8
DQ5
J3
DQ6
L
J7
DQ7
E7
DQM
G3
DQS
F3
DQS#
MT40A512M16HA-083E:A
bga96_p8mm_9p1x14p1
I
UM3C
A3
DQ0
B8
DQ1
C3
DQ2
C7
DQ3
C2
DQ4
C8
DQ5
D3
DQ6
U
D7
DQ7
E2
DQM
B7
DQS
A7
DQS#
MT40A512M16HA-083E:A
bga96_p8mm_9p1x14p1
I
I R0402_N0R5%
4
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10_AP
M_A_A11
M_A_A12
M_A_A13
M_A_A14_WE_N
M_A_A15_CAS_N
M_A_A16_RAS_N
M_A_BA0
M_A_BA1
M_A_DIM0_CKE0
M_A_DIM0_CK_DDR0_DP
M_A_DIM0_CK_DDR0_DN
M_A_DIM0_ODT0
RM6 240R
M_A_BG0
M_A_ACT_N
DDR4_DRAMRST_R
DDR0_A_PARITY
M_A_DIM0_CS0_N
DDR0_A_ALERT_N
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10_AP
M_A_A11
M_A_A12
M_A_A13
M_A_A14_WE_N
M_A_A15_CAS_N
M_A_A16_RAS_N
M_A_BA0
M_A_BA1
M_A_DIM0_CKE0
M_A_DIM0_CK_DDR0_DP
M_A_DIM0_CK_DDR0_DN
M_A_DIM0_ODT0
RM8 240R
M_A_BG0
M_A_ACT_N
DDR4_DRAMRST_R
DDR0_A_PARITY
M_A_DIM0_CS0_N
DDR0_A_ALERT_N
P3
P7
R3
N7
N3
P8
P2
R8
R2
R7
M3
T2
M7
T8
L2
M8
L8
N2
N8
K2
K7
K8
K3
F9
I R0402_N 1%
M2
N9
L3
P1
T3
L7
P9
P3
P7
R3
N7
N3
P8
P2
R8
R2
R7
M3
T2
M7
T8
L2
M8
L8
N2
N8
K2
K7
K8
K3
F9
I R0402_N 1%
M2
N9
L3
P1
T3
L7
P9
3
UM2A
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC
A13
A14/WE
A15/CAS
A16/RAS
BA0
BA1
CKE/CKE0
CLK
CLK#
ODT
ZQ
BG0
TEN
ACT#
RESET#
PAR
CS#
ALERT#
MT40A512M16HA-083E:A
bga96_p8mm_9p1x14p1
I
UM4A
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC
A13
A14/WE
A15/CAS
A16/RAS
BA0
BA1
CKE/CKE0
CLK
CLK#
ODT
ZQ
BG0
TEN
ACT#
RESET#
PAR
CS#
ALERT#
MT40A512M16HA-083E:A
bga96_p8mm_9p1x14p1
I
3
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VREFCA
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VREFCA
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
+V1P2U_VDDQ
B3
VDD
B9
VDD
D1
VDD
J1
VDD
J9
VDD
L1
VDD
L9
VDD
R1
VDD
T9
VDD
G7
VDD
A1
A9
C1
D9
F2
F8
G1
G9
J2
J8
B1
VPP
R9
VPP
A2
A8
C9
D2
D8
E3
E8
H1
H9
F1
B2
VSS
E1
VSS
E9
VSS
G8
VSS
K1
VSS
K9
VSS
M9
VSS
N1
VSS
T1
VSS
NC
T7
M1
M_A_DQ<27> 4
M_A_DQ<31> 4
M_A_DQ<30> 4
M_A_DQ<25> 4
M_A_DQ<26> 4
M_A_DQ<24> 4
M_A_DQ<29> 4
M_A_DQ<28> 4
+V1P2U_VDDQ
M_A_DQS_DP<3> 4
M_A_DQS_DN<3> 4
+V2P5U_VPP
M_A_DQ<23> 4
M_A_DQ<17> 4
M_A_DQ<18> 4
M_A_DQ<20> 4
M_A_DQ<19> 4
M_A_DQ<16> 4
M_A_DQ<22> 4
M_A_DQ<21> 4
+V1P2U_VDDQ
M_A_DQS_DP<2> 4
M_A_DQS_DN<2> 4
RM81
M_A_BG1
VREFCA_CHA
CM3
47nF 16V 10%
X7R
C0402_N
I
I R0402_N0R5%
+V1P2U_VDDQ
B3
VDD
B9
VDD
D1
VDD
J1
VDD
J9
VDD
L1
VDD
L9
VDD
R1
VDD
T9
VDD
G7
VDD
A1
A9
C1
D9
F2
F8
G1
G9
J2
J8
B1
VPP
R9
VPP
A2
A8
C9
D2
D8
E3
E8
H1
H9
F1
B2
VSS
E1
VSS
E9
VSS
G8
VSS
K1
VSS
K9
VSS
M9
VSS
N1
VSS
T1
VSS
NC
T7
M1
M_A_DQ<43> 4
M_A_DQ<46> 4
M_A_DQ<47> 4
M_A_DQ<44> 4
M_A_DQ<42> 4
M_A_DQ<40> 4
M_A_DQ<45> 4
M_A_DQ<41> 4
+V1P2U_VDDQ
M_A_DQS_DP<5> 4
M_A_DQS_DN<5> 4
+V2P5U_VPP
M_A_DQ<58> 4
M_A_DQ<61> 4
M_A_DQ<62> 4
M_A_DQ<57> 4
M_A_DQ<59> 4
M_A_DQ<60> 4
M_A_DQ<63> 4
M_A_DQ<56> 4
+V1P2U_VDDQ
M_A_DQS_DP<7> 4
M_A_DQS_DN<7> 4
RM85
CM5
47nF 16V 10%
X7R
C0402_N
I
I R0402_N0R5%
2
UM2B
G2
DQ0
F7
DQ1
H3
DQ2
H7
DQ3
H2
DQ4
H8
DQ5
J3
DQ6
L
J7
DQ7
E7
DQM
G3
DQS
F3
DQS#
MT40A512M16HA-083E:A
bga96_p8mm_9p1x14p1
I
UM2C
A3
DQ0
B8
DQ1
C3
DQ2
C7
DQ3
C2
DQ4
C8
DQ5
D3
DQ6
U
D7
DQ7
E2
DQM
B7
DQS
A7
DQS#
MT40A512M16HA-083E:A
bga96_p8mm_9p1x14p1
I
UM4B
G2
DQ0
F7
DQ1
H3
DQ2
H7
DQ3
H2
DQ4
H8
DQ5
J3
DQ6
L
J7
DQ7
E7
DQM
G3
DQS
F3
DQS#
MT40A512M16HA-083E:A
bga96_p8mm_9p1x14p1
I
UM4C
A3
DQ0
B8
DQ1
C3
DQ2
C7
DQ3
C2
DQ4
C8
DQ5
D3
DQ6
U
D7
DQ7
E2
DQM
B7
DQS
A7
DQS#
MT40A512M16HA-083E:A
bga96_p8mm_9p1x14p1
I
+V1P2U_VDDQ
+V2P5U_VPP
+V0.6S_VTT
2
+V_DDR_CA_VREF 4
0.022uF 16V 10%
M_A_DIM0_CK_DDR0_DP
M_A_DIM0_CK_DDR0_DN
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10_AP
M_A_A11
M_A_A12
M_A_A13
M_A_A14_WE_N
M_A_A15_CAS_N
M_A_A16_RAS_N
M_A_BA0
M_A_BA1
M_A_DIM0_CKE0
M_A_DIM0_ODT0
M_A_BG0
M_A_ACT_N
DDR0_A_PARITY
M_A_DIM0_CS0_N
M_A_BG1 4
M_A_BG1
DDR0_A_ALERT_N
CM6
X7R
C0402_N
RM12
24.9R
R0402
1%
C10036
3300PF 16V 10%
X7R
C0201_N
NI
RM9 2R7
I R0402_N
I
I
RM13 36R
RM14 36R
RM15 34.8R
RM16 34.8R
RM17 34.8R
RM18 34.8R
RM19 34.8R
RM20 34.8R
RM21 34.8R
RM22 34.8R
RM23 34.8R
RM24 34.8R
RM25 34.8R
RM26 34.8R
RM27 34.8R
RM28 34.8R
RM29 34.8R
RM30 34.8R
RM31 34.8R
RM32 34.8R
RM33 34.8R
RM34 34.8R
RM35 34.8R
RM36 34.8R
RM37 34.8R
RM38 34.8R
RM39 34.8R
RM95 34.8R
RM99
RM40 49.9R
+V1P2U_VDDQ
RM41
470R
5%
R0402_N
I
RM42
DDR4_DRAMRST_N 4
+V1P2U_VDDQ 4,10,20,21,61
+V2P5U_VPP 20,21,62
+V0.6S_VTT 20,21,61
DDR4_DRAMRST_R
0R
CM7
I
0.1uF 10V 10%
C0402
R0402
X5R
5%
NI
Size
Size
Size
Title:
Title:
Title:
C
C
C
Date: Sheet of
Date: Sheet of
Date: Sheet of
+V1P2U_VDDQ
RM10
1.8K
1%
R0402_N
I
1%
RM11
1.8K
1%
R0402_N
I
DDR4_CHA
DDR4_CHA
DDR4_CHA
1
VREFCA_CHA
+V0.6S_VTT
I R0402_N 1%
I R0402_N 1%
I R0402_N 1%
I R0402_N 1%
I R0402_N 1%
I R0402_N 1%
I R0402_N 1%
I R0402_N 1%
I R0402_N 1%
I R0402_N 1%
I R0402_N 1%
I R0402_N 1%
I R0402_N 1%
I R0402_N 1%
I R0402_N 1%
I R0402_N 1%
I R0402_N 1%
I R0402_N 1%
I R0402_N 1%
I R0402_N 1%
I R0402_N 1%
I R0402_N 1%
I R0402_N 1%
I R0402_N 1%
I R0402_N 1%
I R0402_N 1%
I R0402_N 1%
NI R0402_N 1%
I R0402_N 0R 5%
+V1P2U_VDDQ
I R0402_N 1%
Project:
Project:
Project:
Engineer:
Engineer:
Engineer:
1
DDR4_DRAMRST_R 20
Miix510
Miix510
Miix510
Jacky
Jacky
Jacky
19 69 Wednesday, July 12, 2017
19 69 Wednesday, July 12, 2017
19 69 Wednesday, July 12, 2017
Rev
Rev
Rev
V01
V01
V01
5
UM5A
P3
I R0402_N 1%
A0
P7
A1
R3
A2
N7
A3
N3
A4
P8
A5
P2
A6
R8
A7
R2
A8
R7
A9
M3
A10/AP
T2
A11
M7
A12/BC
T8
A13
L2
A14/WE
M8
A15/CAS
L8
A16/RAS
N2
BA0
N8
BA1
K2
CKE/CKE0
K7
CLK
K8
CLK#
ODT
K3
ZQ
F9
M2
BG0
N9
TEN
L3
ACT#
P1
RESET#
T3
PAR
L7
CS#
P9
ALERT#
MT40A512M16HA-083E:A
bga96_p8mm_9p1x14p1
NI
M_B_A0 4
M_B_A1 4
M_B_A2 4
M_B_A3 4
M_B_A4 4
M_B_A5 4
M_B_A6 4
M_B_A7 4
M_B_A8 4
M_B_A9 4
M_B_A10_AP 4
D D
M_B_A11 4
M_B_A12 4
M_B_A13 4
M_B_A14_WE_N 4
M_B_A15_CAS_N 4
M_B_A16_RAS_N 4
M_B_BA0 4
M_B_BA1 4
M_B_DIM0_CKE0 4
M_B_DIM0_CK_DDR0_DP 4
M_B_DIM0_CK_DDR0_DN 4
M_B_DIM0_ODT0 4
RM43 240R
M_B_BG0 4
M_B_ACT_N 4
DDR4_DRAMRST_R 19
DDR1_B_PARITY 4
C C
M_B_DIM0_CS0_N 4
DDR1_B_ALERT_N 4
UM7A
M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
B B
M_B_A10_AP
M_B_A11
M_B_A12
M_B_A13
M_B_A14_WE_N
M_B_A15_CAS_N
M_B_A16_RAS_N
M_B_BA0
M_B_BA1
M_B_DIM0_CKE0
M_B_DIM0_CK_DDR0_DP
M_B_DIM0_CK_DDR0_DN
M_B_DIM0_ODT0
RM45 240R
M_B_BG0
M_B_ACT_N
DDR4_DRAMRST_R
A A
DDR1_B_PARITY
M_B_DIM0_CS0_N
DDR1_B_ALERT_N
I R0402_N 1%
P3
P7
R3
N7
N3
P8
P2
R8
R2
R7
M3
T2
M7
T8
L2
M8
L8
N2
N8
K2
K7
K8
K3
F9
M2
N9
L3
P1
T3
L7
P9
5
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC
A13
A14/WE
A15/CAS
A16/RAS
BA0
BA1
CKE/CKE0
CLK
CLK#
ODT
ZQ
BG0
TEN
ACT#
RESET#
PAR
CS#
ALERT#
MT40A512M16HA-083E:A
bga96_p8mm_9p1x14p1
NI
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VREFCA
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VREFCA
+V1P2U_VDDQ
B3
VDD
B9
VDD
D1
VDD
J1
VDD
J9
VDD
L1
VDD
L9
VDD
R1
VDD
T9
VDD
G7
VDD
A1
A9
C1
D9
F2
F8
G1
G9
J2
J8
B1
VPP
R9
VPP
A2
A8
C9
D2
D8
E3
E8
H1
H9
F1
B2
VSS
E1
VSS
E9
VSS
G8
VSS
K1
VSS
K9
VSS
M9
VSS
N1
VSS
T1
VSS
NC
T7
M1
M_B_DQ<1> 4
M_B_DQ<7> 4
M_B_DQ<5> 4
M_B_DQ<6> 4
M_B_DQ<4> 4
M_B_DQ<3> 4
M_B_DQ<0> 4
M_B_DQ<2> 4
+V1P2U_VDDQ
M_B_DQS_DP<0> 4
M_B_DQS_DN<0> 4
+V2P5U_VPP
M_B_DQ<16> 4
M_B_DQ<22> 4
M_B_DQ<17> 4
M_B_DQ<18> 4
M_B_DQ<20> 4
M_B_DQ<23> 4
M_B_DQ<21> 4
M_B_DQ<19> 4
+V1P2U_VDDQ
M_B_DQS_DP<2> 4
M_B_DQS_DN<2> 4
RM87
M_B_BG1
1/19 Inte:check samsung DDP package,reserved.
VREFCA_CHB
CM8
47nF 16V 10%
X7R
C0402_N
I
+V1P2U_VDDQ
B3
VDD
B9
VDD
D1
VDD
J1
VDD
J9
VDD
L1
VDD
L9
VDD
R1
VDD
T9
VDD
G7
VDD
A1
A9
C1
D9
F2
F8
G1
G9
J2
J8
B1
VPP
R9
VPP
A2
A8
C9
D2
D8
E3
E8
H1
H9
F1
B2
VSS
E1
VSS
E9
VSS
G8
VSS
K1
VSS
K9
VSS
M9
VSS
N1
VSS
T1
VSS
NC
T7
M1
M_B_DQ<38> 4
M_B_DQ<33> 4
M_B_DQ<39> 4
M_B_DQ<36> 4
M_B_DQ<35> 4
M_B_DQ<37> 4
M_B_DQ<34> 4
M_B_DQ<32> 4
+V1P2U_VDDQ
M_B_DQS_DP<4> 4
M_B_DQS_DN<4> 4
+V2P5U_VPP
M_B_DQ<55> 4
M_B_DQ<52> 4
M_B_DQ<50> 4
M_B_DQ<48> 4
M_B_DQ<54> 4
M_B_DQ<53> 4
M_B_DQ<51> 4
M_B_DQ<49> 4
+V1P2U_VDDQ
M_B_DQS_DP<6> 4
M_B_DQS_DN<6> 4
RM91
M_B_BG1
VREFCA_CHB
CM10
47nF 16V 10%
X7R
C0402_N
I
4
UM6A
UM5B
G2
DQ0
F7
DQ1
H3
DQ2
H7
DQ3
H2
DQ4
H8
DQ5
J3
DQ6
L
J7
DQ7
E7
DQM
G3
DQS
F3
DQS#
MT40A512M16HA-083E:A
bga96_p8mm_9p1x14p1
NI
UM5C
A3
DQ0
B8
DQ1
C3
DQ2
C7
DQ3
C2
DQ4
C8
DQ5
U
D3
DQ6
D7
DQ7
E2
DQM
B7
DQS
A7
DQS#
MT40A512M16HA-083E:A
bga96_p8mm_9p1x14p1
NI
I R0402_N0R5%
UM7B
G2
DQ0
F7
DQ1
H3
DQ2
H7
DQ3
H2
DQ4
H8
DQ5
J3
DQ6
L
J7
DQ7
E7
DQM
G3
DQS
F3
DQS#
MT40A512M16HA-083E:A
bga96_p8mm_9p1x14p1
NI
UM7C
A3
DQ0
B8
DQ1
C3
DQ2
C7
DQ3
C2
DQ4
C8
DQ5
D3
DQ6
U
D7
DQ7
E2
DQM
B7
DQS
A7
DQS#
MT40A512M16HA-083E:A
bga96_p8mm_9p1x14p1
NI
I R0402_N0R5%
4
M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10_AP
M_B_A11
M_B_A12
M_B_A13
M_B_A14_WE_N
M_B_A15_CAS_N
M_B_A16_RAS_N
M_B_BA0
M_B_BA1
M_B_DIM0_CKE0
M_B_DIM0_CK_DDR0_DP
M_B_DIM0_CK_DDR0_DN
M_B_DIM0_ODT0
RM44 240R
M_B_BG0
I R0402_N 1%
M_B_ACT_N
DDR4_DRAMRST_R
DDR1_B_PARITY
M_B_DIM0_CS0_N
DDR1_B_ALERT_N
M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10_AP
M_B_A11
M_B_A12
M_B_A13
M_B_A14_WE_N
M_B_A15_CAS_N
M_B_A16_RAS_N
M_B_BA0
M_B_BA1
M_B_DIM0_CKE0
M_B_DIM0_CK_DDR0_DP
M_B_DIM0_CK_DDR0_DN
M_B_DIM0_ODT0
RM46 240R
M_B_BG0
I R0402_N 1%
M_B_ACT_N
DDR4_DRAMRST_R
DDR1_B_PARITY
M_B_DIM0_CS0_N
DDR1_B_ALERT_N
P3
A0
P7
A1
R3
A2
N7
A3
N3
A4
P8
A5
P2
A6
R8
A7
R2
A8
R7
A9
M3
A10/AP
T2
A11
M7
A12/BC
T8
A13
L2
A14/WE
M8
A15/CAS
L8
A16/RAS
N2
BA0
N8
BA1
K2
CKE/CKE0
K7
CLK
K8
CLK#
ODT
K3
ZQ
F9
M2
BG0
N9
TEN
L3
P1
RESET#
T3
L7
P9
MT40A512M16HA-083E:A
bga96_p8mm_9p1x14p1
NI
UM8A
P3
A0
P7
A1
R3
A2
N7
A3
N3
A4
P8
A5
P2
A6
R8
A7
R2
A8
R7
A9
M3
A10/AP
T2
A11
M7
A12/BC
T8
A13
L2
A14/WE
M8
A15/CAS
L8
A16/RAS
N2
BA0
N8
BA1
K2
CKE/CKE0
K7
CLK
K8
CLK#
ODT
K3
ZQ
F9
M2
BG0
N9
TEN
L3
P1
RESET#
T3
L7
P9
MT40A512M16HA-083E:A
bga96_p8mm_9p1x14p1
NI
ACT#
PAR
CS#
ALERT#
ACT#
PAR
CS#
ALERT#
3
+V1P2U_VDDQ
B3
VDD
B9
VDD
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VREFCA
D1
VDD
J1
VDD
J9
VDD
L1
VDD
L9
VDD
R1
VDD
T9
VDD
G7
VDD
A1
A9
C1
D9
F2
F8
G1
G9
J2
J8
B1
VPP
R9
VPP
A2
A8
C9
D2
D8
E3
E8
H1
H9
F1
B2
VSS
E1
VSS
E9
VSS
G8
VSS
K1
VSS
K9
VSS
M9
VSS
N1
VSS
T1
VSS
NC
T7
M1
M_B_DQ<11> 4
M_B_DQ<13> 4
M_B_DQ<14> 4
M_B_DQ<12> 4
M_B_DQ<15> 4
M_B_DQ<9> 4
M_B_DQ<10> 4
M_B_DQ<8> 4
+V1P2U_VDDQ
M_B_DQS_DP<1> 4
M_B_DQS_DN<1> 4
+V2P5U_VPP
M_B_DQ<26> 4
M_B_DQ<28> 4
M_B_DQ<30> 4
M_B_DQ<24> 4
M_B_DQ<27> 4
M_B_DQ<29> 4
M_B_DQ<31> 4
M_B_DQ<25> 4
+V1P2U_VDDQ
M_B_DQS_DP<3> 4
M_B_DQS_DN<3> 4
RM89
M_B_BG1
VREFCA_CHB
CM9
47nF 16V 10%
X7R
C0402_N
I
I R0402_N0R5%
UM6B
G2
F7
H3
H7
H2
H8
J3
J7
E7
G3
F3
MT40A512M16HA-083E:A
bga96_p8mm_9p1x14p1
NI
UM6C
A3
B8
C3
C7
C2
C8
D3
D7
E2
B7
A7
MT40A512M16HA-083E:A
bga96_p8mm_9p1x14p1
NI
+V1P2U_VDDQ
B3
VDD
B9
VDD
D1
VDD
J1
VDD
J9
VDD
L1
VDD
L9
VDD
R1
VDD
T9
VDD
G7
VDD
A1
VDDQ
A9
VDDQ
C1
VDDQ
D9
VDDQ
F2
VDDQ
F8
VDDQ
G1
VDDQ
G9
VDDQ
J2
VDDQ
J8
VDDQ
B1
VPP
R9
VPP
A2
VSSQ
A8
VSSQ
C9
VSSQ
D2
VSSQ
D8
VSSQ
E3
VSSQ
E8
VSSQ
H1
VSSQ
H9
VSSQ
F1
VSSQ
B2
VSS
E1
VSS
E9
VSS
G8
VSS
K1
VSS
K9
VSS
M9
VSS
N1
VSS
T1
VSS
NC
T7
M1
VREFCA
3
M_B_DQ<44> 4
M_B_DQ<42> 4
M_B_DQ<45> 4
M_B_DQ<46> 4
M_B_DQ<40> 4
M_B_DQ<47> 4
M_B_DQ<41> 4
M_B_DQ<43> 4
+V1P2U_VDDQ
M_B_DQS_DP<5> 4
M_B_DQS_DN<5> 4
+V2P5U_VPP
M_B_DQ<61> 4
M_B_DQ<63> 4
M_B_DQ<56> 4
M_B_DQ<59> 4
M_B_DQ<60> 4
M_B_DQ<62> 4
M_B_DQ<57> 4
M_B_DQ<58> 4
+V1P2U_VDDQ
M_B_DQS_DP<7> 4
M_B_DQS_DN<7> 4
RM93
M_B_BG1
VREFCA_CHB
CM11
47nF 16V 10%
X7R
C0402_N
I
I R0402_N0R5%
UM8B
G2
F7
H3
H7
H2
H8
J3
J7
E7
G3
F3
MT40A512M16HA-083E:A
bga96_p8mm_9p1x14p1
NI
UM8C
A3
B8
C3
C7
C2
C8
D3
D7
E2
B7
A7
MT40A512M16HA-083E:A
bga96_p8mm_9p1x14p1
NI
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
L
DQ7
DQM
DQS
DQS#
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQM
DQS
DQS#
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
L
DQ7
DQM
DQS
DQS#
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
U
DQ7
DQM
DQS
DQS#
+V1P2U_VDDQ
+V2P5U_VPP
+V0.6S_VTT
2
1
+V1P2U_VDDQ
RM48
1.8K
1%
R0402_N
I
1%
C0402_N
CM12
R0402
RM50
24.9R
X7R
I
1%
I
RM47 2R7
I R0402_N
+V_DDR_VREFDQ02_CHB 4
0.022uF 16V 10%
U
RM49
1.8K
1%
R0402_N
I
VREFCA_CHB
+V0.6S_VTT
M_B_DIM0_CK_DDR0_DP
M_B_DIM0_CK_DDR0_DN
M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10_AP
M_B_A11
M_B_A12
M_B_A13
M_B_A14_WE_N
M_B_A15_CAS_N
M_B_A16_RAS_N
M_B_BA0
M_B_BA1
M_B_DIM0_CKE0
M_B_DIM0_ODT0
M_B_BG0
M_B_ACT_N
DDR1_B_PARITY
M_B_DIM0_CS0_N
M_B_BG1 4
M_B_BG1
C10037
3300PF 16V 10%
X7R
C0201_N
NI
RM51 36R
RM52 36R
RM53 34.8R
RM54 34.8R
RM55 34.8R
RM56 34.8R
RM57 34.8R
RM58 34.8R
RM59 34.8R
RM60 34.8R
RM61 34.8R
RM62 34.8R
RM63 34.8R
RM64 34.8R
RM65 34.8R
RM66 34.8R
RM67 34.8R
RM68 34.8R
RM69 34.8R
RM70 34.8R
RM71 34.8R
RM72 34.8R
RM73 34.8R
RM74 34.8R
RM75 34.8R
RM76 34.8R
RM77 34.8R
RM96 34.8R
RM100
I R0402_N 1%
I R0402_N 1%
I R0402_N 1%
I R0402_N 1%
I R0402_N 1%
I R0402_N 1%
I R0402_N 1%
I R0402_N 1%
I R0402_N 1%
I R0402_N 1%
I R0402_N 1%
I R0402_N 1%
I R0402_N 1%
I R0402_N 1%
I R0402_N 1%
I R0402_N 1%
I R0402_N 1%
I R0402_N 1%
I R0402_N 1%
I R0402_N 1%
I R0402_N 1%
I R0402_N 1%
I R0402_N 1%
I R0402_N 1%
I R0402_N 1%
I R0402_N 1%
I R0402_N 1%
NI R0402_N 1%
I R0402_N 0R 5%
+V1P2U_VDDQ
Project:
Project:
Project:
Engineer:
Engineer:
Engineer:
DDR4_CHB
DDR4_CHB
DDR4_CHB
1
I R0402_N 1%
Miix510
Miix510
Miix510
Jacky
Jacky
Jacky
Rev
Rev
Rev
V01
V01
V01
20 69 Monday, September 04, 2017
20 69 Monday, September 04, 2017
20 69 Monday, September 04, 2017
DDR1_B_ALERT_N
+V1P2U_VDDQ 4,10,19,21,61
+V2P5U_VPP 19,21,62
+V0.6S_VTT 19,21,61
2
RM78 49.9R
Size
Size
Size
Title:
Title:
Title:
C
C
C
Date: Sheet of
Date: Sheet of
Date: Sheet of
5
4
3
2
1
+V1P2U_VDDQ
CM13
CM14
1uF 6.3V 10%
1uF 6.3V 10%
X7R
X7R
C0402
C0402
I
I
D D
CM15
1uF 6.3V 10%
X7R
C0402
I
CM16
1uF 6.3V 10%
X7R
C0402
I
CM17
1uF 6.3V 10%
X7R
C0402
I
CM18
1uF 6.3V 10%
X7R
C0402
I
CM19
1uF 6.3V 10%
X7R
C0402
I
CM20
1uF 6.3V 10%
X7R
C0402
I
CM21
1uF 6.3V 10%
X7R
C0402
I
CM22
1uF 6.3V 10%
X7R
C0402
I
+V1P2U_VDDQ +V1P2U_VDDQ
CM63
1uF 6.3V 10%
X7R
C0402
I
CM64
1uF 6.3V 10%
X7R
C0402
I
CM65
1uF 6.3V 10%
X7R
C0402
I
CM66
1uF 6.3V 10%
X7R
C0402
I
CM67
1uF 6.3V 10%
X7R
C0402
I
CM68
1uF 6.3V 10%
X7R
C0402
I
CM69
1uF 6.3V 10%
X7R
C0402
I
CM70
1uF 6.3V 10%
X7R
C0402
I
CM71
1uF 6.3V 10%
X7R
C0402
I
CM72
1uF 6.3V 10%
X7R
C0402
I
CM73
1uF 6.3V 10%
X7R
C0402
I
CM74
1uF 6.3V 10%
X7R
C0402
I
+V1P2U_VDDQ
CM36
1uF 6.3V 10%
X7R
C0402
I
CM37
1uF 6.3V 10%
X7R
C0402
I
CM38
1uF 6.3V 10%
X7R
C0402
I
CM39
1uF 6.3V 10%
X7R
C0402
I
CM40
1uF 6.3V 10%
X7R
C0402
I
CM41
1uF 6.3V 10%
X7R
C0402
I
CM42
1uF 6.3V 10%
X7R
C0402
I
CM43
1uF 6.3V 10%
X7R
C0402
I
CM44
1uF 6.3V 10%
X7R
C0402
I
CM25
1uF 6.3V 10%
X7R
C0402
I
1uF:4 as near each x16
DRAM device as
possible
+V1P2U_VDDQ
CM45
CM46
10uF 6.3V 20%
10uF 6.3V 20%
X5R
X5R
C0603
C0603
I
I
C C
CM47
10uF 6.3V 20%
X5R
C0603
I
CM48
10uF 6.3V 20%
X5R
C0603
I
CM49
10uF 6.3V 20%
X5R
C0603
I
CM50
10uF 6.3V 20%
X5R
C0603
I
CM51
10uF 6.3V 20%
X5R
C0603
I
CM52
10uF 6.3V 20%
X5R
C0603
I
CM53
10uF 6.3V 20%
X5R
C0603
I
CM54
10uF 6.3V 20%
X5R
C0603
I
10uF:Distributed around
the DRAM devices
+V0.6S_VTT
CM104
1uF 6.3V 10%
X7R
C0402
I
CM105
1uF 6.3V 10%
X7R
C0402
I
+V0.6S_VTT
CM106
1uF 6.3V 10%
X7R
C0402
I
CM107
1uF 6.3V 10%
X7R
C0402
I
CM92
1uF 6.3V 10%
X7R
C0402
I
1uF:2 as near each x20
DRAM device as
possible
CM94
1uF 6.3V 10%
X7R
C0402
I
CM95
1uF 6.3V 10%
X7R
C0402
I
CM96
1uF 6.3V 10%
X7R
C0402
I
CM93
1uF 6.3V 10%
X7R
C0402
I
CM97
1uF 6.3V 10%
X7R
C0402
I
+V0.6S_VTT
+V2P5U_VPP
CM27
CM26
1uF 6.3V 10%
1uF 6.3V 10%
X7R
X7R
C0402
C0402
I
I
B B
+V2P5U_VPP
CM91
CM90
1uF 6.3V 10%
1uF 6.3V 10%
X7R
X7R
C0402
C0402
I
I
+V2P5U_VPP
CM28
CM29
1uF 6.3V 10%
1uF 6.3V 10%
X7R
X7R
C0402
C0402
I
I
CM59
CM60
1uF 6.3V 10%
1uF 6.3V 10%
X7R
X7R
C0402
C0402
I
I
CM84
1uF 6.3V 10%
X7R
C0402
I
CM61
1uF 6.3V 10%
X7R
C0402
I
CM85
1uF 6.3V 10%
X7R
C0402
I
CM62
1uF 6.3V 10%
X7R
C0402
I
CM87
CM86
1uF 6.3V 10%
X7R
C0402
I
1uF 6.3V 10%
X7R
C0402
I
CM88
1uF 6.3V 10%
X7R
C0402
I
CM89
1uF 6.3V 10%
X7R
C0402
I
1uF:2 as near each x16
DRAM device as
possible
CM102
1uF 6.3V 10%
X7R
C0402
I
+V0.6S_VTT
CM112
1uF 6.3V 10%
X7R
C0402
NI
+V0.6S_VTT
CM103
1uF 6.3V 10%
X7R
C0402
I
CM113
1uF 6.3V 10%
X7R
C0402
NI
CM98
1uF 6.3V 10%
X7R
C0402
I
CM114
1uF 6.3V 10%
X7R
C0402
NI
CM99
1uF 6.3V 10%
X7R
C0402
I
CM115
1uF 6.3V 10%
X7R
C0402
NI
CM100
1uF 6.3V 10%
X7R
C0402
I
CM116
1uF 6.3V 10%
X7R
C0402
NI
CM101
1uF 6.3V 10%
X7R
C0402
I
CM117
1uF 6.3V 10%
X7R
C0402
NI
CM108
1uF 6.3V 10%
X7R
C0402
I
CM118
1uF 6.3V 10%
X7R
C0402
NI
CM109
1uF 6.3V 10%
X7R
C0402
I
CM119
1uF 6.3V 10%
X7R
C0402
NI
CM110
1uF 6.3V 10%
X7R
C0402
I
CM120
1uF 6.3V 10%
X7R
C0402
NI
CM111
1uF 6.3V 10%
X7R
C0402
I
CM121
1uF 6.3V 10%
X7R
C0402
NI
CM56
CM57
CM55
10uF 6.3V 20%
10uF 6.3V 20%
X5R
+V2P5U_VPP
CM32
CM31
CM30
10uF 6.3V 20%
10uF 6.3V 20%
X5R
X5R
C0603
C0603
I
I
A A
5
10uF 6.3V 20%
X5R
C0603
I
+V1P2U_VDDQ
+V2P5U_VPP
+V0.6S_VTT
CM33
10uF 6.3V 20%
X5R
C0603
I
CM34
10uF 6.3V 20%
X5R
C0603
I
10uF:Distributed around
the DRAM devices
+V1P2U_VDDQ 4,10,19,20,61
+V2P5U_VPP 19,20,62
+V0.6S_VTT 19,20,61
4
3
X5R
C0603
I
C0603
I
10uF 6.3V 20%
X5R
C0603
I
CM58
10uF 6.3V 20%
X5R
C0603
I
10uF:Distributed around
the DRAM devices
Project:
Project:
Project:
Miix510
Miix510
Miix510
Jacky
Jacky
Engineer:
Engineer:
Size
Size
Size
Title:
Title:
Title:
C
C
C
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
Engineer:
DDR4 Decoupling
DDR4 Decoupling
DDR4 Decoupling
Jacky
1
Rev
Rev
Rev
V01
V01
V01
21 69 Tuesday, June 27, 2017
21 69 Tuesday, June 27, 2017
21 69 Tuesday, June 27, 2017
5
D D
C C
4
3
2
1
B B
A A
Project:
Project:
Project:
Engineer:
Engineer:
Size
Size
Size
Title:
Title:
Title:
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
NA
NA
NA
Engineer:
Miix510
Miix510
Miix510
1
Jacky
Jacky
Jacky
Rev
Rev
Rev
V01
V01
22 69 Tuesday, June 27, 2017
22 69 Tuesday, June 27, 2017
22 69 Tuesday, June 27, 2017
V01
5
4
3
2
1
RF Solution
D D
C C
EMC Solution
1/26 EMC reserved
+V5P0A +VCC_SA +V5P0A +V3P3A +V3P3A +VCC_SA +V5P0A +V3P3A +V3P3SX +V3P3SX +V3P3SX
C2301
C2302
C2303
C2304
C2305
C2306
C2307
C2308
0.01uF 16V 10%
NI
X7R
C0402
5/16 EMC reserved
+V3P3A +V5P0A +V3P3A +V5P0A
B B
A A
C2309
0.01uF 16V 10%
NI
X7R
C0402
C2310
0.01uF 16V 10%
NI
X7R
C0402
C2311
0.01uF 16V 10%
NI
X7R
C0402
C2312
0.01uF 16V 10%
NI
X7R
C0402
5
0.01uF 16V 10%
NI
X7R
C0402
C2313
0.01uF 16V 10%
NI
X7R
C0402
C2314
0.01uF 16V 10%
NI
X7R
C0402
0.01uF 16V 10%
NI
X7R
C0402
0.01uF 16V 10%
NI
X7R
C0402
C2315
0.01uF 16V 10%
NI
X7R
C0402
C2316
0.01uF 16V 10%
NI
X7R
C0402
C2317
0.01uF 16V 10%
NI
X7R
C0402
0.01uF 16V 10%
NI
X7R
C0402
4
0.01uF 16V 10%
NI
X7R
C0402
3
0.01uF 16V 10%
NI
X7R
C0402
0.01uF 16V 10%
NI
X7R
C0402
Project:
Project:
Project:
Engineer:
Engineer:
Size
Size
Size
Title:
Title:
Title:
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
Engineer:
RF / EMC Solution
RF / EMC Solution
RF / EMC Solution
Miix510
Miix510
Miix510
1
Jacky
Jacky
Jacky
Rev
Rev
Rev
V01
V01
23 69 Tuesday, June 27, 2017
23 69 Tuesday, June 27, 2017
23 69 Tuesday, June 27, 2017
V01
<XR_PAGE_TITLE>
6
+V3P3A +V3P3A_SPI_FLASH
3
2 87 54 1
I R0402_N1%
I R0402_N1%
I R0402_N1%
I R0402_N1%
I R0402_N1%
A C
CR3000
SH9512
I R0402_N 5%
RB521C30 100mA 30v
SOD-923
I
NI
R0402_N
0R
5%
R9761
10K
5%
R0402_N
I
R3001
10K
5%
R0402_N
I
R3002
10K
5%
R0402_N
I
40mA
FLASH_SPI_CS0_N_R
FLASH_SPI_MISO_R
FLASH_SPI_IO2_R
SPI ROM
U3002
1
/CS
2
DO(IO1)
3
/WP(IO2)
4
GND
W25Q64FVSSIQ
I
/HOLD(IO3)
DI(IO0)
D
+V3P3A_SPI_FLASH
C3058
0.1uF 10V 10%
X5R
C0402_N
I
8
VCC
7
6
CLK
5
FLASH_SPI_IO3_R
FLASH_SPI_CLK_R
FLASH_SPI_MOSI_R
C
D
FLASH_SPI_CS0_N 5,50
FLASH_SPI_MISO 5,50
C
FLASH_SPI_IO2 5
FLASH_SPI_MOSI 5,50
FLASH_SPI_CLK 5,50
FLASH_SPI_IO3 5
R9871 0R
R9742 33R
R3021 33R
R9869 33R
R9870 33R
R3022 33R
Difference with ARMOUR
Series-resistor 0R change to 33R
CIS ok
2/24 SIV:Delet ROM Socket @U3002
B
Difference with ARMOUR
U3002 package DFN8 change to SOP8
B
+V3P3A
+V3P3A_SPI_FLASH
A A
87
+V3P3A 3,4,5,6,7,9,10,11,23,29,31,37,38,42,47,49,50,51,52,53,56,60,62,65,66,67
+V3P3A_SPI_FLASH 50
INTERNAL ONLY
BPAGE DRAWING
sky_y_mrd.GND
Wed Jun 03 11:22:52 2015
Project:
Project:
Project:
Engineer:
Engineer:
Size
Size
Size
Title:
Title:
Title:
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
3 4
2
Engineer:
SYSTEM FLASH
SYSTEM FLASH
SYSTEM FLASH
Miix510
Miix510
Miix510
Jacky
Jacky
Jacky
Rev
Rev
Rev
V01
V01
24 69 Tuesday, June 27, 2017
24 69 Tuesday, June 27, 2017
24 69 Tuesday, June 27, 2017
V01
1 5 6
<XR_PAGE_TITLE>
6
3
2 87 54 1
D
C
B
D
C
B
A A
Project:
Project:
87
INTERNAL ONLY
BPAGE DRAWING
sky_y_mrd.GND
Wed Jun 03 11:22:52 2015
Project:
Engineer:
Engineer:
Size
Size
Size
Title:
Title:
Title:
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
3 4
2
Engineer:
EMMC
EMMC
EMMC
Miix510
Miix510
Miix510
Jacky
Jacky
Jacky
Rev
Rev
Rev
V01
V01
25 69 Tuesday, June 27, 2017
25 69 Tuesday, June 27, 2017
25 69 Tuesday, June 27, 2017
V01
1 5 6
<XR_PAGE_TITLE>
6
3
2 87 54 1
M.2 SSD Module
SH4200
D
I
0R
R0805_N
5%
1.4A @ADATA 128GB SSD
2.6A @ADATA 256GB SSD
+V3P3A_SSD +V3P3SX
+V3P3SX
+V3P3SX 5,6,7,9,10,23,30,31,36,37,38,39,40,41,43,44,45,46,47
Change SH4200 0805 shunt to resistor
+V3P3A_SSD
C4209
22uF 6.3V 20%
X5R
C0603_N
I
C
B
PCIE12 RX follow intel CRB
Difference with armour
SSD interface SATA change to PCIE
If install SATA CARD,R4200,R4201 need install 0.01uF
C0606,C0607 need install 0.01uF
C4204
22uF 6.3V 20%
X5R
C0603_N
I
NGFF
SSD module
interface
Reference
Detect pin
A A
3/16 Add SSD(PCIE or SATA) BOM option table
C4205
0.1uF 10V 10%
X5R
C0402_N
I
PCIE
R4200,R4201 install 0ohm
C0606,C0607 install 0.22uF
R1050 install 10Kohm
R1087 uninstall 100Kohm
Default
C4206
0.1uF 10V 10%
X5R
C0402_N
I
PCIE9_SSD_RX_DN 9
PCIE9_SSD_RX_DP 9
PCIE9_SSD_TX_DN_C 9
PCIE9_SSD_TX_DP_C 9
PCIE10_SSD_RX_DN 9
PCIE10_SSD_RX_DP 9
PCIE10_SSD_TX_DN_C 9
PCIE10_SSD_TX_DP_C 9
PCIE11_SSD_RX_DN 9
PCIE11_SSD_RX_DP 9
PCIE11_SSD_TX_DN_C 9
PCIE11_SSD_TX_DP_C 9
PCIE12_SSD_RX_DP 9
PCIE12_SSD_RX_DN 9
PCIE12_SSD_TX_DN_C 9
PCIE12_SSD_TX_DP_C 9
PCIE_REFCLK_SSD_DN 7
PCIE_REFCLK_SSD_DP 7
C4207
0.1uF 10V 10%
X5R
C0402_N
I
SATA
R4200,R4201 install 0.01uF
C0606,C0607 install 0.01uF
R1050 uninstall 10Kohm
R1087 install 100Kohm
C4208
0.1uF 10V 10%
X5R
C0402_N
I
R4200 0R
R4201 0R
I R0402_N5%
PCIE12_SSD_RX_DP_R
I R0402_N5%
PCIE12_SSD_RX_DN_R
Pin69
PICE module spec is N/C
SATA module spec is GND
JSSD1
1
GND_1
3
GND_3
5
PERn3
7
PERp3
9
GND_9
11
PETn3
13
PETp3
15
GND_15
17
PERn2
19
PERp2
21
GND_21
23
PETn2
25
PETp2
27
GND_27
29
PERn1
31
PERp1
33
GND_33
35
PETn1
37
PETp1
39
GND_39
41
PERn0/SATA-B+
43
PERp0/SATA-B-
45
GND_45
47
PETn0/SATA-A-
49
PETp0/SATA-A+
51
GND_51
53
REFCLKN
55
REFCLKP
57
GND_57
67
NC32
69
PEDET (OC-PCIe)
71
GND_71
73
GND_73
75
GND_75
Key M
GND1276GND13
77
CIS ok
CLKREQ# (IO)(0/3.3V)
PEWake# (IO)(0/3.3V)
SUSCLK(32kHz) (I)(0/3.3V)
NC178NC2
79
3.3V_2
3.3V_4
Reserved_6
Reserved_8
DAS/DSS# (O)(OD)
3.3V_12
3.3V_14
3.3V_16
3.3V_18
Reserved_20
Reserved_22
Reserved_24
Reserved_26
Reserved_28
Reserved_30
Reserved_32
Reserved_34
Reserved_36
DEVSLP (I)(0/3.3V)
Reserved_40
Reserved_42
Reserved_44
Reserved_46
Reserved_48
PERST# (I)(0/3.3V)
Reserved_56
Reserved_58
3.3V_70
3.3V_72
3.3V_74
51747-07502-112
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
68
70
72
74
+V3P3A_SSD
SSD_CLK_REQ_N_R
M.2_SSD_PE_WAKE_N
PM_SUSCLK_SSD
SATA2_DEVSLP 9
R4206 0R
R4205 0R
Pin54
PICE module spec is N/C
SATA module spec is N/C
Pin68
PICE module spec is N/C
SATA module spec is N/C
1
+V3P3A_SSD
NIR0402_N 5%
TP9980
R4207
10K
5%
R0402_N
I
I R0402_N5%
1/4 Add R4206 PU
PLT_RST_N 7,41,43,45,50
SSD_CLK_REQ_N 7
PCIE_WAKE_PCH_N 7
D
C
B
Co-lay PCIE12 RX,reserved R4202,R4203
please close to R4200,R4201
3/9 Del R4202,R4203,don't Co-lay PCIE12 RX
87
INTERNAL ONLY
BPAGE DRAWING
sky_y_mrd.+V3P3.26
Wed Jun 03 11:22:52 2015
Project:
Project:
Project:
Engineer:
Engineer:
Size
Size
Size
Title:
Title:
Title:
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
3 4
2
Engineer:
PCIE SSD MODULE
PCIE SSD MODULE
PCIE SSD MODULE
Miix510
Miix510
Miix510
Jacky
Jacky
Jacky
Rev
Rev
Rev
V01
V01
26 69 Tuesday, June 27, 2017
26 69 Tuesday, June 27, 2017
26 69 Tuesday, June 27, 2017
V01
1 5 6
<XR_PAGE_TITLE>
6
3
2 87 54 1
D
C
B
D
C
B
A A
Project:
Project:
87
INTERNAL ONLY
BPAGE DRAWING
sky_y_mrd.GND
Wed Jun 03 11:22:53 2015
Project:
Engineer:
Engineer:
Size
Size
Size
Title:
Title:
Title:
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
3 4
2
Engineer:
MICRO-SD CARD
MICRO-SD CARD
MICRO-SD CARD
Miix510
Miix510
Miix510
Jacky
Jacky
Jacky
Rev
Rev
Rev
V01
V01
27 69 Tuesday, June 27, 2017
27 69 Tuesday, June 27, 2017
27 69 Tuesday, June 27, 2017
V01
1 5 6
<XR_PAGE_TITLE>
6
3
2 87 54 1
D
C
B
D
C
B
A A
Project:
Project:
87
INTERNAL ONLY
BPAGE DRAWING
sky_y_mrd.GND
Wed Jun 03 11:22:53 2015
Project:
Engineer:
Engineer:
Size
Size
Size
Title:
Title:
Title:
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
3 4
2
Engineer:
SD CARD POWER
SD CARD POWER
SD CARD POWER
Miix510
Miix510
Miix510
Jacky
Jacky
Jacky
Rev
Rev
Rev
V01
V01
28 69 Tuesday, June 27, 2017
28 69 Tuesday, June 27, 2017
28 69 Tuesday, June 27, 2017
V01
1 5 6
1
2
3
4
5
+V3P3A
QX12A
2N7002KDW 115mA 60V
G1
A A
SML1_CLK 5
S1
SOT363V
I
D1
SM_BAT_CLK 43,50,58,59,66
SOC EC
SML1_DATA 5
G2
D2
S2
QX12B
2N7002KDW 115mA 60V
SOT363V
I
SM_BAT_DATA 43,50,58,59,66
1/4 Add connect to SOC & EC
B B
+V3P3A
1/5 Power modify +V3P3A
C2829
0.1uF 16V 10%
X7R
C0402
I
+V3P3A
C C
C2830
R2807
10.5K
R0402
I
I
2200pF 50V 10%
C0402
X7R
1%
CPU THERMAL SENSOR
U2800
1
H_THERMDA
H_THERMDC THERMAL_ALERT#
CPU_THERM#
VCC
2
DXP
3
DXN
THERM#4GND
G788P81U
MSOP8_PH0P65_3X3_H1P1
I
SCLK
SDATA
ALERT#
SML1_CLK
8
SML1_DATA
7
6
5
R2808 7.5K
I R0402_N 1%
2N7002KDW 115mA 60V
QT1B
SOT363V
+V3P3A
D2
S2
I
RI70 0R
G2
D1
S1
G1
NIR0402_N 5%
RT1 330K
QT1A
2N7002KDW 115mA 60V
SOT363V
I
THERMAL_ALERT# 5
H_THERMDA
Q2800
MMBT3904 200mA 40V
sot_23
I
1
2 3
H_THERMDC
SHUTDOWN# 60
EC_WRST# 50
I R0402_N 5%
3/2 If HW shutdown,
QT1,RT1,R6011 need install,R9863 change to NI
VR_PWRGD 7,66
D D
+V3P3A
1
+V3P3A 3,4,5,6,7,9,10,11,23,24,31,37,38,42,47,49,50,51,52,53,56,60,62,65,66,67
2
Project:
Project:
Project:
Engineer:
Engineer:
Size
Size
Size
Title:
Title:
Title:
B
B
B
Date: Sheet of
Date: Sheet of
3
4
Date: Sheet of
Engineer:
CPU THERMAL SENSOR
CPU THERMAL SENSOR
CPU THERMAL SENSOR
Miix510
Miix510
Miix510
Jacky
Jacky
Jacky
29 69 Tuesday, June 27, 2017
29 69 Tuesday, June 27, 2017
29 69 Tuesday, June 27, 2017
5
Rev
Rev
Rev
V01
V01
V01
1
+V5P0S
40mil
A A
C3000
10uF 10V 20%
C0603
X5R
C3001
0.1uF 16V 10%
X7R
C0402
I
I
FAN_SPEED1 50
R3000
R0402
C3002
0.01uF 16V 10%
C0402
+V3P3SX
10K
5%
I
X7R
I
EC_FAN_PWM1 50
2
3/7 R9847 connect to +V5P0S,change to +V3P3SX
+V5P0S
+V3P3SX
R9847
10K
R0402
5%
NI
40mil
EC_FAN_PWM1
FAN conn
3
1/11 Update FAN pin define
G1
G1
1
1
2
2
3
3
4
4
JFAN1
50376-00401-001
con_fpc4p_ph0p6_h1p55
I
G2
G2
6/21 JFAN1 footprint CON_FPC4P_PH0P6_H1P55
change to con_wtb_4p_ph0p6_h1p55_50376
4
5
B B
+V5P0S
+V3P3SX
C C
D D
+V5P0S 10,46
+V3P3SX 5,6,7,9,10,23,26,31,36,37,38,39,40,41,43,44,45,46,47
CIS ok
Project:
Project:
Project:
Engineer:
Engineer:
Size
Size
Size
Title:
Title:
Title:
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
1
2
3
4
Date: Sheet of
FAN conn
FAN conn
FAN conn
Engineer:
Miix510
Miix510
Miix510
Jacky
Jacky
Jacky
5
Rev
Rev
Rev
V01
V01
V01
30 69 Tuesday, June 27, 2017
30 69 Tuesday, June 27, 2017
30 69 Tuesday, June 27, 2017
<XR_PAGE_TITLE>
6
3
2 87 54 1
Fingerprint
+V1P8S
D
+1.8V_PRIM
SH9520
0R
FPS
R0201_N
5%
SH9534
0R
NI
R0201_N
5%
+1.8V_FINGER
+V3P3SX
+V3P3A
SH9519
0R
I
R0201_N
5%
SH9535
0R
NI
R0201_N
5%
+V3P3S_FINGER
4/11 Support micro stanby function
C
+V3P3S_FINGER
R10037 0R
R10038 0R
FPS R0201_N 5%
FPS R0201_N 5%
FP_SPI_MOSI
FP_SPI_CS0_N
B
FP_SPI_CLK FP_SPI_CLK_C
FP_SPI_MISO
+V3P3S_FINGER
R10105 0R
R10106 0R
+V3P3S_FINGER
A A
FP_SPI_MOSI 8
R10043
150K
1%
R0201_N
FPS
FP_SPI_CLK 8
SH9536
0R
NI
R0201_N
5%
87
+V3P3S_FINGER +1.8V_FINGER
U9509
1
DIR216DIR1
A1
2
A2
SN74AVC4T774RSVR
3
A3
4
A4
DIR35DIR46OE7GND
SN74AVC4T774RSVR
FPS R0201_N 5%
FPS R0201_N 5%
R10044
49.9K
1%
R0201_N
FPS
FP_SPI_CS0_N 8
FP_SPI_MISO 8
15
13
12
B1
VCCA14VCCB
11
B2
10
B3
9
B4
FPS
8
QFN16_PH0P4_1P8X2P6_H0P55
+V3P3S_FINGER
R10030
2.2K
5%
R0201_N
NI
R10029
0R
5%
R0201_N
FPS
+V3P3S_FINGER
+V3P3SX
+1.8V_PRIM
FP_SPI_MOSI_C
FP_SPI_CS0_N_C
FP_SPI_MISO_C
R10035
49.9K
1%
R0201_N
FPS
+V1P8S
R10036
49.9K
1%
R0201_N
NI
4/25 Update
+V3P3SX 5,6,7,9,10,23,26,30,36,37,38,39,40,41,43,44,45,46,47
+1.8V_PRIM 7,10,11,39,40,44,47,56,65
+V1P8S 10,38,46
+V3P3S_FINGER
C9890
2.2uF 6.3V 10%
FPS X5R
C0402_N
4/11 Update
+V3P3S_FINGER
+1.8V_FINGER
R10034
R10033
2.2K
2.2K
5%
5%
R0201_N
R0201_N
NI
NI
FP_SPI_CS0_N_C
FP_SPI_MISO_C
+1.8V_FINGER
R10041
R10042
2.2K
2.2K
5%
5%
R0201_N
R0201_N
NI
NI
FP_SPI_CLK_C
FP_SPI_MOSI_C
H/W ID3 use finger print module
FP_Active
R10120 0R
JCONN3
G2
G2
FP_SPI_MOSI_C FP_SPI_CS0_N_C
6 7
5
4
3
2
1
G1
G1
FP_SPI_CLK_C
8
FP_SLEEP_N_C
9
FP_DRDY_C FP_SPI_MISO_C
10
FP_Active
11
12
40506W90-12PA-SHLOATCR
con_fpc12p_ph0p5_h1_40506w90
FPS
+1.8V_FINGER +V3P3S_FINGER
SH9533
47K
5%
R0402_N
I
5/4 Update
FP_Active
1 2
CR9054
AZ5725-01F.R7GR 1uA 5V
DFN1006p2x
FPS
4/6 Update
+1.8V_FINGER
+1.8V_FINGER
R10050
R10049
2.2K
2.2K
5%
5%
R0201_N
R0201_N
NI
NI
+1.8V_PRIM +V3P3S_FINGER
C10049
1uF 6.3V 10%
X5R
C0201
FPS
C10050
1uF 6.3V 10%
X5R
C0201
FPS
FP_DRDY_C
FP_SLEEP_N_C
R10045
2.2K
5%
R0201_N
FPS
U9511
G2129AE1U
12
OE
2
A1
3
A2
4
A3
5
A4
6
GND
FPS
3 4
6/12 Update
SH9523
2.2K
5%
R0402_N
NI
+1.8V_PRIM
VCCA
VCCB
B1
B2
B3
B4
I R0402_N 5%
+1.8V_FINGER
1 2
CR9053
AZ5725-01F.R7GR 1uA 5V
DFN1006p2x
FPS
+V3P3S_FINGER
1
11
10
9
8
7
4/21 Update
HW_ID3 3
C9889
2.2uF 6.3V 10%
FPS X5R
C0402_N
4/11 Update
R10046
0R
5%
R0201_N
FPS
Date: Sheet of
Date: Sheet of
Date: Sheet of
Size
Size
Size
Custom
Custom
Custom
Title:
Title:
Title:
2
R10051
2.2K
5%
R0402_N
NI
R10052
2.2K
5%
R0402_N
NI
Project:
Project:
Project:
Engineer:
Engineer:
Engineer:
FIngerprint
FIngerprint
FIngerprint
FP_DRDY 8
FP_SLEEP_N 8
Jacky
Jacky
Jacky
Miix510
Miix510
Miix510
31 69 Tuesday, August 22, 2017
31 69 Tuesday, August 22, 2017
31 69 Tuesday, August 22, 2017
1 5 6
Rev
Rev
Rev
V01
V01
V01
D
C
B
<XR_PAGE_TITLE>
6
3
2 87 54 1
D
C
B
D
C
B
A A
Project:
Project:
87
INTERNAL ONLY
BPAGE DRAWING
sky_y_mrd.+V3P3.32
Wed Jun 03 11:22:55 2015
Project:
Engineer:
Engineer:
Size
Size
Size
Title:
Title:
Title:
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
3 4
2
Engineer:
NA
NA
NA
Miix510
Miix510
Miix510
Jacky
Jacky
Jacky
Rev
Rev
Rev
V01
V01
32 69 Tuesday, June 27, 2017
32 69 Tuesday, June 27, 2017
32 69 Tuesday, June 27, 2017
V01
1 5 6
<XR_PAGE_TITLE>
6
3
2 87 54 1
D
C
B
D
C
B
A A
Project:
Project:
87
INTERNAL ONLY
BPAGE DRAWING
sky_y_mrd.+V1P0.33
Wed Jun 03 11:22:55 2015
Project:
Engineer:
Engineer:
Size
Size
Size
Title:
Title:
Title:
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
3 4
2
Engineer:
NA
NA
NA
Miix510
Miix510
Miix510
Jacky
Jacky
Jacky
Rev
Rev
Rev
V01
V01
33 69 Tuesday, June 27, 2017
33 69 Tuesday, June 27, 2017
33 69 Tuesday, June 27, 2017
V01
1 5 6
<XR_PAGE_TITLE>
6
3
2 87 54 1
D
C
B
D
C
B
A A
Project:
Project:
87
Wed Jun 03 11:22:56 2015
Project:
Engineer:
Engineer:
Size
Size
Size
Title:
Title:
Title:
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
3 4
2
Engineer:
HDMI LEVEL SHIFTERS
HDMI LEVEL SHIFTERS
HDMI LEVEL SHIFTERS
Miix510
Miix510
Miix510
Jacky
Jacky
Jacky
Rev
Rev
Rev
V01
V01
34 69 Tuesday, June 27, 2017
34 69 Tuesday, June 27, 2017
34 69 Tuesday, June 27, 2017
V01
1 5 6
A
1 1
2 2
B
C
D
E
3 3
4 4
Project:
Project:
Project:
Engineer:
Engineer:
Size
Size
Size
Title:
Title:
Title:
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
A
B
C
D
Date: Sheet of
Engineer:
Sensor & HUB
Sensor & HUB
Sensor & HUB
LENOVO_NB116BT
LENOVO_NB116BT
LENOVO_NB116BT
Jason
Jason
Jason
E
Rev
Rev
Rev
V01
V01
V01
35 69 Tuesday, June 27, 2017
35 69 Tuesday, June 27, 2017
35 69 Tuesday, June 27, 2017
EDP DISPLAY 1920X1200 (12.2INCH)
JP8200
+VSYS
1 2
3/22 FB8200 0603 Bead change to JP8200 JUMP_43X79
Change the SH8200 SH8201 0402
shunt to resistor
EDP_TX1_SOC_DP 3
EDP_TX1_SOC_DN 3
EDP_TX0_SOC_DP 3
EDP_TX0_SOC_DN 3
EDP_AUX_SOC_DP 3
EDP_AUX_SOC_DN 3
EDP_TX3_SOC_DP 3
EDP_TX3_SOC_DN 3
EDP_TX2_SOC_DP 3
EDP_TX2_SOC_DN 3
EDP2 DSI BRIDGE CONTROL SIGNAL BREAKEOUT
JUMP
JUMP_43X79
NOBOM
+VBATA_BKLT_CONN
EDP_TX1_SOC_DP
EDP_TX1_SOC_DN
EDP_TX0_SOC_DP
EDP_TX0_SOC_DN
EDP_AUX_SOC_DP
EDP_AUX_SOC_DN
EDP_TX3_SOC_DP
EDP_TX3_SOC_DN
EDP_TX2_SOC_DP
EDP_TX2_SOC_DN
EDP_VDD_EN 3
C8213 0.1uF 10V 10%
C0402_N
C8214 0.1uF 10V 10%
C8215 0.1uF 10V 10%
C8216 0.1uF 10V 10%
C8217 0.1uF 10V 10%
C8218 0.1uF 10V 10%
TP9501
TP9502
TP9503
TP9504
C8207
22uF 6.3V 20%
X5R
C0603_N
I
I
X5R
I X5R C0402_N
I X5R C0402_N
I X5R C0402_N
I X5R C0402_N
I X5R C0402_N
+V3P3SX
U8201
5
VIN
3
EN
2
GND
APL3512ABI-TRG
SOT23_5
I
Difference with armour
U8201 WS4601E-5/TR
change to APL3512ABI-TRG
4/21 Del R9771,R9772,R9773,R9774,R9775,R9776 0ohm;
L9505,L9506,L9507 common choke,RF request
VOUT
SS
+V3P3_DISPLAY
1
4
SH8201
I
R0603_N
5%
R9584
75R
1%
R0402_N
NI
C9583
0.01uF 16V 10%
C0402_N
X7R
I
EDP_TX1_CONN_DP
EDP_TX1_CONN_DN
EDP_TX0_CONN_DP
EDP_TX0_CONN_DN
EDP_AUX_CONN_DP
EDP_AUX_CONN_DN
0R
C8201
10uF 6.3V 20%
X5R
C0603_N
I
+V3P3_DISPLAY_CONN
C8200
1uF 6.3V 10%
X5R
C0402_N
I
C9541
0.1uF 10V 10%
X5R
C0402_N
I
+VBATA_BKLT_CONN
C8202
10uF 16V 10%
X5R
C0805_N
I
Difference with armour
Add R8221 change to install
C9540
10uF 16V 10%
X5R
C0805_N
I
EDP_BKLT_EN
R8221
100K
5%
R0402_N
I
R8211
100K
R0402_N
+V3P3_DISPLAY_CONN
JEDP1
G1 G2
EDP_HPD
5%
I
TP_HSYNC 37
EDP_HPD 3
R9892 0R
+VBATA_BKLT_CONN
EDP_BKLT_PWM 3
EDP_BKLT_EN 3
EDP_HPD
EDP_AUX_CONN_DP
EDP_AUX_CONN_DN
EDP_TX0_CONN_DN
EDP_TX0_CONN_DP
EDP_TX1_CONN_DN
EDP_TX1_CONN_DP
TP_HSYNC_R
NI R0402_N 5%
EDP_BKLT_PWM
EDP_BKLT_EN
40553W90-30PN-SHLOATCR
CON_FPC30P_PH0P5_H1P2_40553W90
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
I
CIS ok
3/23 Add
C8219
1uF 25V 10%
X5R
C0603_N
I
C8220
0.1uF 25V 10%
X5R
C0402_N
I
R8202 0R
6.5V x [80.6/(220+80.6)] = 1.743V
1.743V - 6.5V = -4.757V
C8221
1uF 25V 10%
X5R
C0603_N
I
I R0402_N 5%
R8200
220K
5%
R0402_N
I
EDP_VDD_EN_R EDP_VDD_EN
R8203
100K
5%
R0402_N
I
Q8200
DMP3160L-7 -2.7A -30V
sot23_gsd
I
S D
S
G
D
G
G
R8201
80.6K
R0402
1%
I
Q8201
D
2N7002 250mA 60V
sot_323_dgs
S
I
VGS= -4.5V
+VBATA_BKLT_CONN +VSYS
C8222
33pF 50V 5%
NPO
C0402_N
I
C8223
0.1uF 25V 10%
X5R
C0402_N
I
+VSYS
+V3P3SX
+VSYS 59,60,61,63,67
+V3P3SX 5,6,7,9,10,23,26,30,31,37,38,39,40,41,43,44,45,46,47
Project:
Project:
Project:
Engineer:
Engineer:
Size
Size
Size
Title:
Title:
Title:
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
Engineer:
DISPLAY
DISPLAY
DISPLAY
Miix510
Miix510
Miix510
Jacky
Jacky
Jacky
36 69 Tuesday, June 27, 2017
36 69 Tuesday, June 27, 2017
36 69 Tuesday, June 27, 2017
Rev
Rev
Rev
V01
V01
V01
<XR_PAGE_TITLE>
6
3
2 87 54 1
Touch & Docking
+V3P3SX_TOUCH +V3P3SX_TOUCH
3/18 Add R8212 PU +V3P3SX_TOUCH
Touch Connector
D
0R
I
R0603_N
5%
SH8202
+V3P3SX_TOUCH
+V3P3SX 5,6,7,9,10,23,26,30,31,36,38,39,40,41,43,44,45,46,47
+V3P3A 3,4,5,6,7,9,10,11,23,24,29,31,38,42,47,49,50,51,52,53,56,60,62,65,66,67
+V5P0A 10,11,23,39,40,42,53,60,61,62,63,65
+V3P3SX
+V3P3SX
+V3P3A
+V5P0A
C
+V3P3SX_TOUCH
C8205
0.1uF 10V 10%
X5R
C0402_N
I
C8206
4.7uF 6.3V 20%
X5R
C0402_N
I
TP_HSYNC 36
TOUCH_PANEL_INT_N 3
TOUCH_I2C_SDA 8
TOUCH_I2C_CLK 8
TOUCH_PANEL_RESET_N 3
TP_HSYNC
TOUCH_PANEL_INT_N
TOUCH_I2C_SDA
TOUCH_I2C_CLK
TOUCH_PANEL_RESET_N
R8212
2.2K
5%
R0402_N
I
R8209
2.2K
5%
R0402_N
R8210
2.2K
5%
R0402_N
I
+V5P0_DOCK
CIS ok
JTP1
G1
G1
1
2
3
4
5
6
7
8
G2
G2
9
10
40536W90-10PN-SHLOATCR
CON_FPC10P_PH0P5_H1P2_40536W90
I
TP9933
TP9934
TP9935
TP9936
TP9937
TP9987
TP9939
1
TOUCH_I2C_CLK
1
TOUCH_I2C_SDA
1
TOUCH_PANEL_RESET_N
1
TOUCH_PANEL_INT_N
1
TP_HSYNC
1
1
+V3P3SX_TOUCH
CIS ok
R8204
470k
1%
R0402_N
I
DOCK_DET
R8205 0R
I R0402_N 5%
CO-CH_L4_PH0P8_H1_AB
B1 B2
A1 A2
L8202
67ohm 320mA +-25%
NI
R8206 0R
I R0402_N 5%
C8203
1uF 16V 10%
X5R
C0402_N
I
R9830 0R
D8200
1
2
BAT54A 200mA 30V
SOT_23
I
3
+V5P0A
NI R0402_N 5%
+V3P3A
R9879
470k
1%
R0402_N
I
U8200
IN
5
EN
4
WS4601E-5/TR
sot_23_5
I
OUT
FLG*
GND
USB2_P5_DOCK_CONN_DN
USB2_P5_DOCK_CONN_DP
+V5P0A_USB_DOCK
1
3
C8204
1uF 16V 10%
X5R
2
C0402_N
I
INTERNAL ONLY
JDOCK1
G1
1
2
3
4
5
6
GND_DET
6/21 JDOCK1 footprint CON_FPC8P_PH0P5_H1P2_50696
change to con_fpc8p_ph0p5_h1_40506w90
7
8
40506W90-8PA-SHLOATCR
CON_FPC8P_PH0P5_H1P2_50696
G1
G2
G2
I
+V5P0_DOCK
SH8203
C9569
0.1uF 10V 10%
X5R
C0402_N
I
0R
I
R0603_N
5%
BPAGE DRAWING
sky_y_mrd.+V3P3.37
Wed Jun 03 11:22:57 2015
+V5P0_DOCK
TP9941
TP9943
TP9944
TP9945
TP9946
1
USB2_P5_DOCK_CONN_DN
1
USB2_P5_DOCK_CONN_DP
1
GND_DET
1
1
USB2_P5_DOCK_CONN_DP
USB2_P5_DOCK_CONN_DN
+V5P0_DOCK
GND_DET
1 2
CR9043
DFN1006p2x
I
AZ5725-01F.R7GR 1uA 5V
3 4
1 2
CR9042
DFN1006p2x
I
AZ5725-01F.R7GR 1uA 5V
Size
Size
Size
Title:
Title:
Title:
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
2
1 2
CR9046
3/14 EMC:add CR9046,CR9047 reserved
5/12 EMC:CR9046,CR9047 install
TOUCH PANEL AND DOCK
TOUCH PANEL AND DOCK
TOUCH PANEL AND DOCK
DFN1006p2x
I
AZ5725-01F.R7GR 1uA 5V
Project:
Project:
Project:
Engineer:
Engineer:
Engineer:
1 2
CR9047
DFN1006p2x
I
AZ5725-01F.R7GR 1uA 5V
Jacky
Jacky
Jacky
Miix510
Miix510
Miix510
37 69 Tuesday, June 27, 2017
37 69 Tuesday, June 27, 2017
37 69 Tuesday, June 27, 2017
1 5 6
Rev
Rev
Rev
V01
V01
V01
Docking Connector
USB2_P5_DOCK_DN 9
USB2_P5_DOCK_DP 9
B
DOCK_DET 8,50
DOCK_DET
+V3P3A
R8223
470k
1%
R0402_N
I
2N7002 250mA 60V
sot_323_dgs
Q8202
1/4 Modify schematic
A A
DOCK_DET_SOC 8
ME_Flash_EN 6,50
3/2 ME_Flash_EN connect to R9881
87
USB2_P5_DOCK_DN
USB2_P5_DOCK_DP
D
S
I
G
R9880 0R
R9881 0R
DOCK_DET_SOC_R
I R0402_N 5%
ME_Flash_EN_R
NI R0402_N 5%
5/23 R9881 uninstall,BIOS request
GND_DET
D
C
B
<XR_PAGE_TITLE>
6
3
2 87 54 1
Sensors
+V3P3A_SENSOR +V3P3SX
SH8000
3
11
7
8
9
BMA222E
bma250e
NI
+V3P3A_SENSOR
Accel
R8015
100K
5%
R0402_N
NI
R8016
100K
5%
R0402_N
229
C8004
0.1uF 10V 10%
X5R
C0402_N
NI
+V3P3A_SENSOR
C7155
1uF 6.3V 10%
X7R
C0402_N
WWAN
C8009
0.1uF 10V 10%
X5R
C0402_N
NI
IMU_INT2 8
IMU_INT1 8
C7153
100pF 50V 5%
NPO
C0402_N
WWAN
R9023
1K
R0402_N
5%
WWAN
C7125
8pF 50V 0.5pF
NPO
C0402_N
NI
D
0R
I
R0603_N
5%
ACCELEROMETER sensor
U8003
TP_I2C0_SDA_EDP2DSI 8
TP_I2C0_SCL_EDP2DSI 8
TP_I2C0_SDA_EDP2DSI
TP_I2C0_SCL_EDP2DSI
+V3P3A_SENSOR
R8004
2.2K
C
5%
R0402_N
NI
TP_I2C0_SDA_EDP2DSI
TP_I2C0_SCL_EDP2DSI
R8005
2.2K
5%
R0402_N
NI
ACCEL_INT 8
TP8001
SH9521 0R
SH9522 0R
1
+V3P3A_SENSOR
ACCEL_INT
R8006
10K
5%
R0402_N
NI
R8007
0R
R0402_N
5%
NI
LID Sensor
+V3P3A
A C
CR9041
RB521C30 100mA 30v
SOD-923
B
A A
I
+V3P3A_LID
C8003
0.1uF 10V 10%
X5R
C0402_N
I
+V3P3SX
U8001
1
NC0
2
GND
3
NC1
BU52012HFV
HVSOF5
I
4
VDD
5
OUT
LID_INT_N
TP_3V3
R8000
47K
5%
R0402_N
I
C8011
100pF 50V 5%
NPO
C0402_N
I
SH8001
0R
WWAN
R0603_N
5%
87
NI R0402_N 5%
2
I2C_SDA
NI R0402_N 5%
12
I2C_CLK
5
INT1_N
6
INT2_N
10
CSB
4
NC
1
I2C_address
ACCEL I2C ADDR: 0X18
Difference with armour
Add R8006 reserve 10K PU
Add R8007 0ohm PD
1/18 RF CS2 change to CS0
LID_INT_N 8,47,50
R8011
100K
5%
R0402_N
NI
R8012
100K
5%
R0402_N
229
Vddio
Vddio_i2c
GND1
GND2
Vdd
R8013
100K
5%
R0402_N
231A
R8014
100K
5%
R0402_N
NI
IMU sensor
BMI055(A+G)
+V3P3A_SENSOR
C9979
0.1uF 10V 10%
X5R
C0402_N
I
+V3P3A_SENSOR
R8021
10K
5%
R0402_N
I
U3
4
VDDHI
3
CX
7
NC3
1
NC1
8
IO2/SDA
6
NC2
dfn10_ph0p5_3x3_h1_g1
R9024
0R
+V3P3A_SENSOR
R8022
10K
5%
R0402_N
I
VREG
NC4
IO1/SCL
VSS
EPAD
IQS231A
WWAN
RFE_50_ANT_MAIN4
WWAN R0402_N 5%
8
U8005
7
6
5
4
3
2
1
BMI055
I
PS
GNDIO
CSB2
GNDA
VDD
NC
INT2
SCx
INT1
16
+VREG
C7156
1uF 6.3V 10%
X7R
C0402_N
5
10
9
2
11
WWAN
JSAR1
1
1
+V3P3SX
+V3P3A_SENSOR
9
SDx
10
SDO2
11
VDDIO
12
INT3
13
INT4
14
CSB1
15
SDO1
C7154
100pF 50V 5%
NPO
C0402_N
WWAN
MODEM_SAR_3P3
GND_1
GND_2
GND_3
con_ant4p_2x2_h0p6_20449c6
Ground
WWAN
+V1P8S
R8019
10K
5%
R0402_N
I
TP_3V3 TP_3V3 TP_3V3
R9037
1M
5%
R0402_N
229
2
3
4
R0G2-1A7Y1-12004
3 4
R8018
10K
5%
R0402_N
I
+V3P3A_SENSOR
+V3P3A_SENSOR
R8017
100K
5%
R0402_N
229
+V1P8S 10,31,46
+V3P3SX 5,6,7,9,10,23,26,30,31,36,37,39,40,41,43,44,45,46,47
IMU_I2C_SCL_HUB 8
IMU_I2C_SDA_HUB 8
C9978
0.1uF 10V 10%
X5R
C0402_N
I
R8023
R8024
10K
10K
5%
5%
R0402_N
R0402_N
I
I
from Intel ISH Bus
IMU_INT3 8
IMU_INT4 8
Gyro
+V1P8S
TP_3V3
R8009
4.7K
R0402_N
5%
231A
G
D
Q3800
BSS138 300mA 50V
sot23_gsd
WWAN
R8010
100K
5%
R0402_N
WWAN
S
G2129TL1U change MOS
Project:
Project:
Project:
Engineer:
Engineer:
Size
Size
Size
Title:
Title:
Title:
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
2
Engineer:
SENSORS & LID
SENSORS & LID
SENSORS & LID
MODEM_SAR_1P8 44
Miix510
Miix510
Miix510
Jacky
Jacky
Jacky
38 69 Monday, September 04, 2017
38 69 Monday, September 04, 2017
38 69 Monday, September 04, 2017
1 5 6
Rev
Rev
Rev
V01
V01
V01
D
C
B
REAR CAMERA CONNECTOR
8M OV8858
1/18 JREAR1,JFRONT1 change to 24pin
CSI2_RCAM_DATA0_DN 6
CSI2_RCAM_DATA0_DP 6
CSI2_RCAM_DATA1_DN 6
CSI2_RCAM_DATA1_DP 6
CSI2_RCAM_DATA2_DN 6
CSI2_RCAM_DATA2_DP 6
CSI2_RCAM_CLK_DN 6
CSI2_RCAM_CLK_DP 6
CSI2_RCAM_DATA3_DN 6
CSI2_RCAM_DATA3_DP 6
+V3P3SX
C10040
1uF 6.3V 10%
X5R
C0201
I
4/24 update
FCAM_ALLPWR_EN
JREAR2
32
GND4
30
30
29
29
28
28
27
27
26
26
25
25
24
24
23
23
22
22
21
21
20
20
19
19
18
18
17
17
16
16
34
GND3
FRONT CAMERA
AVDD_2.8V
U9514
1
5
VIN
VOUT
3
EN
2
4
GND
FB
ETA5050S2F
sot_23_5
I
GND1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
GND2
51168-03001-001
NA
I
+V2P8_RCAM_AVDD
31
1
2
3
4
5
6
7
8
OTHER_CAM
9
10
I2C_2_RCAM_SDA
11
I2C_2_RCAM_SCL
12
13
14
15
33
C9870
2.2uF 6.3V 10%
X5R
C0402_N
I
RCAM_MCLK 40
RCAM_PD_N 6
C9869
2.2uF 6.3V 10%
X5R
C0402_N
NI
+V1P8_RCAM_VDDIO
C9871
2.2uF 6.3V 10%
X5R
C0402_N
I
I2C_2_RCAM_SDA 8
I2C_2_RCAM_SCL 8
+V2P8_FAVDD +V2P8_FCAM_AVDD
R10095
30K
1%
R0201_N
I
R10094
12k
1%
R0201_N
I
C10042
10pF 50V +/-5%
NPO
C0201_N
I
C10041
10uF 6.3V 20%
C0402_N
X5R
I
4/20 update
4/20 update
SH9532
0R
I
R0201_N
5%
+V2P8_RAF_VDD
C9873
2.2uF 6.3V 10%
X5R
C0402_N
I
+V1P2_RCAM_DVDD
C9872
2.2uF 6.3V 10%
X5R
C0402_N
I
+1.8V_PRIM
OTHER_CAM
R10101 0R
I
R10081
R0402_N
0R 5%
R0201_N
5%
I
8M Pin 9 internal is GND
CSI2_FCAM_DATA0_DN 6
CSI2_FCAM_DATA0_DP 6
CSI2_FCAM_CLK_DN 6
CSI2_FCAM_CLK_DP 6
CSI2_FCAM_DATA1_DN 6
CSI2_FCAM_DATA1_DP 6
FCAM_PD_N 6
+1.8V_PRIM
R8518
R8517
2.2K
2.2K
5%
5%
R0402_N
R0402_N
I
I
I2C_3_FCAM_SDA
I2C_3_FCAM_SCL
CAM_8M 8
FRONT CAMERA CONNECTOR
5M OV5670
3/18 Update pindefine
26
24
23
22
21
20
19
18
17
16
15
14
28
R10102 0R
4/20 update
JREAR1
GND1
GND4
24
23
22
21
20
19
18
17
16
15
14
131312
GND2
GND3
51168-02401-001
con_xdp24p_ph04_mm
I
CIS ok
R0201_N
I
5%
R10103
R10104
2.2K
2.2K
5%
5%
R0402_N
R0402_N
I
I
I2C_2_RCAM_SDA
I2C_2_RCAM_SCL
+V2P8_FCAM_AVDD
+V1P2_FCAM_DVDD
+V1P8_FCAM_VDDIO
I2C_3_FCAM_SDA 8
I2C_3_FCAM_SCL 8
C9984
2.2uF 6.3V 10%
X5R
C0402_N
NI
C9986
2.2uF 6.3V 10%
X5R
C0402_N
I
C8512
2.2uF 6.3V 10%
X5R
C0402_N
I
C9985
2.2uF 6.3V 10%
X5R
C0402_N
25
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
I2C_3_FCAM_SDA
10
10
I2C_3_FCAM_SCL
11
11
12
27
I
FCAM_MCLK 40
FCAM_RST_N 6
4/20 update
4/20 update
+V3P3SX
C10044
1uF 6.3V 10%
X5R
C0201
I
+V1P2_RCAM_DVDD
+V1P8_CAM
+V2P8_RCAM_AVDD
+V1P8_RCAM_VDDIO
+V2P8_RAF_VDD
+V1P8_FCAM_VDDIO
+V2P8_FCAM_AVDD
FCAM_ALLPWR_EN
4/24 update
DVDD_1.2V
FRONT CAMERA
EU8502
SGM2036-1.2YN5G/TR
IN
1
EN
3
BP/FB
4
+V1P2_RCAM_DVDD 40
+V1P8_CAM 40
+V2P8_RCAM_AVDD 40
+V1P8_RCAM_VDDIO 40
+V2P8_RAF_VDD 40
+V1P8_FCAM_VDDIO
+V2P8_FCAM_AVDD
+V12_DVDD_FCAM +V1P2_FCAM_DVDD
OUT
5
GND
2
I
sot_23_5
R10099
49.9K
1%
R0201_N
NI
R10098
100K
5%
R0201_N
NI
SH9530 0R
I R0201_N 5%
C10043
10uF 6.3V 20%
C0402_N
X5R
I
4/20 update
FCAM_ALLPWR_EN 6
4/24 update
R10092
R0402_N
+1.8V_PRIM
FRONT CAMERA
DOVDD1.8V
C10039
1uF 6.3V 10%
X5R
C0201
I
1M
+V5P0A
5%
I
U9513
1
VIN1
2
VIN2
3
ON
VBIAS4GND
WS4665D-8/TR
DFN8_PH0P5_2x2_H0p6
I
VOUT1
VOUT2
+V1P8_FCAM
7
8
CT_FCAM_VDDIO
6
CT
5
C10038
220pF 50V 5%
NPO
C0402_N
I
SH9528 0R
I R0201_N 5%
C10045
10uF 6.3V 20%
C0402_N
X5R
I
4/20 update
+V1P8_FCAM_VDDIO
Project:
Project:
Project:
Engineer:
Engineer:
Size
Size
Size
Title:
Title:
Title:
C
C
C
Date: Sheet of
Date: Sheet of
Date: Sheet of
Engineer:
FRONT AND REAR CAMERA CONN
FRONT AND REAR CAMERA CONN
FRONT AND REAR CAMERA CONN
Miix510
Miix510
Miix510
Jacky
Jacky
Jacky
39 69 Tuesday, June 27, 2017
39 69 Tuesday, June 27, 2017
39 69 Tuesday, June 27, 2017
Rev
Rev
Rev
V01
V01
V01
D
C8500
1uF 6.3V 10%
C0402_N
X5R
+V3P3SX
I
6
AVDD_2.8V
REAR CAMERA
+V2P8_AVDD
U8500
1
VIN
RCAM_ALLPWR_EN
3
EN
2
GND
4/24 update 4/20 update
VOUT
FB
ETA5050S2F
sot_23_5
I
5
4
DVDD_1.2V
R9762
30K
1%
R0402_N
I
R9763
12K
1%
R0402_N
I
C9535
NPO
C0402_N
10pF 50V 0.5pF
C9534
10uF 6.3V 20%
C0402_N
X5R
I
I
2/18 Add DVDD_1.2V,
Rear camera change to OV8858
+V2P8_RCAM_AVDD
SH8501
I
R0402_N
0R
5%
3
2 87 54 1
1/19 Delete DVDD_1.5V
3/18 Add DVDD_1.5V,
Rear camera change to OV5648
REAR CAMERA
C
B
C9884
1uF 6.3V 10%
C0402_N
+V3P3SX
X5R
I
4/20 update
4/20 update
RCAM_ALLPWR_EN
4/24 update
AF_VCC_2.8V
EU8501
SGM2036-1.2YN5G/TR
IN
EN
BP/FB
OUT
GND
1
3
4
5
2
I
sot_23_5
R10008
49.9K
1%
R0402_N
NI
R10009
100K
1%
R0402_N
NI
+V3P3SX
500mA
U9506
1
VIN
3
EN
2
GND
VOUT
+V1P2_RCAM_DVDD 39
X5R
I
RCAM_ALLPWR_EN
4/24 update
C9536
1uF 6.3V 10%
C0402_N
A A
+V1P2_RCAM_DVDD
+V3P3SX
+V1P8_CAM
+V2P8_RCAM_AVDD
+V2P8_FCAM_AVDD
+V2P8_AF_VDD
+1.8V_PRIM
+V5P0A
+V1P8_RCAM_VDDIO
+V1P8_FCAM_VDDIO
87
+V_2P85_XLDO_VCM
5
FB=0.8V
4
FB
ETA5050S2F
sot_23_5
I
+V3P3SX 5,6,7,9,10,23,26,30,31,36,37,38,39,41,43,44,45,46,47
+V1P8_CAM
+V2P8_RCAM_AVDD 39
+V2P8_FCAM_AVDD 39
R9764
30K
1%
R0402_N
I
R9765
12K
1%
R0402_N
I
C9538
NPO
C0402_N
10pF 50V 0.5pF
I
+V2P8_AF_VDD
+1.8V_PRIM 7,10,11,31,39,44,47,56,65
+V5P0A 10,11,23,37,39,42,53,60,61,62,63,65
+V1P8_RCAM_VDDIO 39
+V1P8_FCAM_VDDIO 39
C9537
10uF 6.3V 20%
C0402_N
X5R
I
4/20 update
+1.8V_PRIM
R8511
100K
5%
R0402_N
I
6/20 Y8500 24MHZ +/- 10PPM change to 19.2MHZ +/- 25PPM,Intel request
+V12_DVDD_CAM +V1P2_RCAM_DVDD
C9883
10uF 6.3V 20%
C0402_N
X5R
I
4/20 update
+V2P8_RAF_VDD
SH8502
I
R0402_N
0R
5%
+1.8V_PRIM
C8521
0.1uF 10V 10%
X5R
C0402_N
I
V1P8S_CAM_XTAL_26M
SH9517
I
R0402_N
0R
5%
Y8500
OUT
VDD
1 2
E/D
GND
19.2MHZ +/- 25PPM
CRY4_3225
I
+1.8V_PRIM
REAR CAMERA
DOVDD1.8V
RCAM_ALLPWR_EN 6
4/24 update
1uF 6.3V 10%
R9824
1M
5%
R0402_N
C8520
X5R
C0402_N
I
+V5P0A
I
U8505
1
VIN1
2
VIN2
3
ON
VBIAS4GND
WS4665D-8/TR
DFN8_PH0P5_2x2_H0p6
I
VOUT1
VOUT2
CT
+1.8V_PRIM
7
8
CT_RCAM_VDDIO
6
5
+V1P8_CAM
C8522
220pF 50V 5%
NPO
C0402_N
I
SH8503
I
R0402_N
0R
5%
C10046
10uF 6.3V 20%
C0402_N
X5R
I
4/20 update
+V1P8_RCAM_VDDIO
Camera Mclk
C8508
Difference with armour
U8502 NC7WZ126K8X change to
SN74AUP2G126DCUR
U9508
A1
RCAM_CLK_EN 6
3 4
CAM_CLK
FCAM_CLK_EN 6
RCAM_CLK_EN RCAM_MCLK_R
FCAM_CLK_EN
R9826
R9825
R0402_N
1M
1M
5%
5%
R0402_N
I
2
1
5
7
I
3 4
VCC
OE1
A2
OE2
SN74AUP2G126DCUR
I
Y1
Y2
GND
8
6
3
4
0.1uF 10V 10%
X5R
C0402_N
I
R8525 22R
I R0402_N 5%
R8526 22R
I R0402_N 5%
Size
Size
Size
Title:
Title:
Title:
CAMERA DISCRETE CONTROL LOGIC
CAMERA DISCRETE CONTROL LOGIC
CAMERA DISCRETE CONTROL LOGIC
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
2
4/20 update for EMI
C10047 22pF 50V 5%
RCAM_MCLK
FCAM_MCLK FCAM_MCLK_R
C10048 22pF 50V 5%
Project:
Project:
Project:
Engineer:
Engineer:
Engineer:
NI NPO C0402_N
RCAM_MCLK 39
FCAM_MCLK 39
NI NPO C0402_N
Miix510
Miix510
Miix510
Jacky
Jacky
Jacky
40 69 Tuesday, June 27, 2017
40 69 Tuesday, June 27, 2017
40 69 Tuesday, June 27, 2017
1 5 6
Rev
Rev
Rev
V01
V01
V01
D
C
B
<XR_PAGE_TITLE>
6
3
2 87 54 1
D
+V3P3SX +V3P3A_TPM
SH9505
TPM
R0402_N
0R
5%
30PP31
+V3P3A_TPM
C
SH9524 0R
SLB9665 R0402_N 5%
SLB 9665 Stuff
B
+V3P3A_TPM
C9530
0.1uF 10V 10%
X5R
C0402_N
TPM
32
GND4
1
NC1
2
NC2
3
NC3
4
NC4
5
NC5
6
NC6
7
NC7
8
NC8
VDD19NC910GND111NC1012NC1113NC1214NC1315GND2
SH9525 0R
SLB9665 R0402_N 5%
SH9526 0R
SLB 9665 NonStuff
LPC_AD0
LPC_AD0 5,43,50
+V3P3A_TPM
C9531
0.1uF 10V 10%
U9505
25
26
27
LAD0
NC1528NC1629NC17
VDD3
GND3
LFRAME#
16
LAD1
LCLK
LAD2
VDD2
LAD3
LREST#
NC14
33
24
23
22
21
20
19
18
17
EPAD
SLB 9665
qfn32p_ph0p5_5x5_h1
TPM
Z32H32 R0402_N 5%
LPC_AD1
LPC_FRAME_N
LPC_CLK_PRT80
LPC_AD2
LPC_AD3
PLT_RST_N
X5R
C0402_N
TPM
C9532
10uF 10V 20%
X5R
C0603_N
TPM
LPC_AD1 5,43,50
LPC_FRAME_N 5,43,50
LPC_CLK_PRT80 5,43
LPC_AD2 5,43,50
LPC_AD3 5,43,50
PLT_RST_N 7,26,43,45,50
+V3P3A_TPM
C9529
0.1uF 10V 10%
X5R
C0402_N
TPM
D
C
B
TPM 2.0
SLB 9665 Stuff
+V3P3SX
A A
87
+V3P3SX 5,6,7,9,10,23,26,30,31,36,37,38,39,40,43,44,45,46,47
INTERNAL ONLY
BPAGE DRAWING
sky_y_mrd.+V3P3.41
Wed Jun 03 11:22:59 2015
Project:
Project:
Project:
Engineer:
Engineer:
Size
Size
Size
Title:
Title:
Title:
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
3 4
2
Engineer:
TPM
TPM
TPM
Miix510
Miix510
Miix510
Jacky
Jacky
Jacky
Rev
Rev
Rev
V01
V01
41 69 Monday, September 04, 2017
41 69 Monday, September 04, 2017
41 69 Monday, September 04, 2017
V01
1 5 6
<XR_PAGE_TITLE>
6
3
2 87 54 1
USB3.0
D
+V5P0A
C9004
1uF 6.3V 10%
X5R
C0402_N
NI
C : 1.5A/Active High
U9001
VIN
4
EN
3
RT9711AGB
sot_23_5
I
VOUT
FLG*
GND
+V3P3A
R9005
100K
5%
R0402_N
5
1
2
I
+V5P0A
+V3P3A
+V5P0A_USB_WP2
USB2_P1_WP1_OC_N 9
SLP_S4_N 7,10,47,50,60
3/14 Change U9001.3 from +V5P0A to SLP_S4_N
C
USB2_P1_WP1_DN 9
USB2_P1_WP1_DP 9
USB3_P1_RX_DN 9
USB3_P1_RX_DP 9
+V5P0A 10,11,23,37,39,40,53,60,61,62,63,65
+V3P3A 3,4,5,6,7,9,10,11,23,24,29,31,37,38,47,49,50,51,52,53,56,60,62,65,66,67
C9006
470pF 50V 5%
COG
C0402_N
R9007 3.3R
CO-CH_L4_PH0P8_H1_AB
67ohm 320mA +-25%
B1 B2
A1 A2
L9003
I R0402_N 1%
NI
I
R9006 3.3R
I R0402_N 1%
R9853 3.3R
I R0402_N 1%
CO-CH_L4_PH0P8_H1_AB
67ohm 320mA +-25%
A1 A2
B1 B2
L9508
NI
R9852 3.3R
I R0402_N 1%
C9007
4.7uF 10V 10%
X5R
C0603_N
I
+V5P0A_USB_WP2
1 2
CR9005
AZ5725-01F.R7GR 1uA 5V
DFN1006p2x
I
USB2_P1_WP1_DN_CONN
USB2_P1_WP1_DP_CONN
USB3_P1_RX_DN_CONN
USB3_P1_RX_DP_CONN
USB3_P1_TX_DN_CONN
USB3_P1_TX_DP_CONN
JUSB3-1
P1
P2
P3
P4
P5
P6
P7
P8
P9
CIS ok
VBUS
D-
D+
GND
SSRX-
SSRX+
GND_DRAIN
SSTX-
SSTX+
G1
GND
G2
GND
G3
GND
G4
GND
W-26-0236-0900B
con_usb3_9p_smd_h4p2
I
D
C
R9012 3.3R
I R0402_N 1%
CO-CH_L4_PH0P8_H1_AB
B
USB3_P1_TX_DP 9
USB3_P1_TX_DN 9
C1271 0.1uF 10V 10%
C0402_N
C1270 0.1uF 10V 10%
C0402_N
USB3_P1_TX_DN_C
I
X5R
USB3_P1_TX_DP_C
I
X5R
67ohm 320mA +-25%
A1 A2
B1 B2
L9002
NI
B
R9011 3.3R
I R0402_N 1%
USB3_P1_TX_DN_CONN
USB3_P1_TX_DP_CONN
USB3_P1_RX_DP_CONN
USB3_P1_RX_DN_CONN
D+/D- ESD
USB2_P1_WP1_DP_CONN
USB2_P1_WP1_DN_CONN
CR9006
A A
1
I/O1
2
I/O2
87
9NC10
NC
GND
8
6NC7
NC
4
I/O3
5
I/O4
GND
3
AZ1045-04F.R7G
lcc10_ns_2p5x1p0_p65h
I
AZ5725-01F.R7GR 1uA 5V
CR9012
DFN1006p2x
3 4
1 2
I
1 2
CR9013
AZ5725-01F.R7GR 1uA 5V
DFN1006p2x
I
Project:
Project:
Project:
Engineer:
Engineer:
Size
Size
Size
Title:
Title:
Title:
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
2
Engineer:
USB3.0 CONN
USB3.0 CONN
USB3.0 CONN
Miix510
Miix510
Miix510
Jacky
Jacky
Jacky
Rev
Rev
Rev
V01
V01
42 69 Tuesday, June 27, 2017
42 69 Tuesday, June 27, 2017
42 69 Tuesday, June 27, 2017
V01
1 5 6
<XR_PAGE_TITLE>
WIFI & BT Module
6
3
2 87 54 1
D
C
B
+V3P3SX_CWS
C4320
4.7uF 6.3V 10%
X5R
C0603_N
I
0R
I
R0603_N
5%
SH4302
+V3P3SX_CWS +V3P3SX
C4321
4.7uF 6.3V 10%
X5R
C0603_N
I
C6001 & C6003 FOR PIN 72 &73
C6002 & C6000 FOR PIN 4 & 5
C4322
0.1uF 10V 10%
X5R
C0402_N
I
C4323
0.1uF 10V 10%
X5R
C0402_N
I
PCIE_WLAN_LN0_TX_SOC_DP 9
PCIE_WLAN_LN0_TX_SOC_DN 9
PCIE_WLAN_LN0_RX_SOC_DP 9
PCIE_WLAN_LN0_RX_SOC_DN 9
PCIE_REFCLK_WLAN_DP_R 7
PCIE_REFCLK_WLAN_DN_R 7
LPC_CLK_PRT80 5,41
PCIE_WLAN_LN0_TX_SOC_DP
PCIE_WLAN_LN0_TX_SOC_DN
WLAN_CLK_REQ_N 7
PCIE_WAKE_PCH_N 7
R4319 0R
I R0402_N 5%
USB2_P4_BT_DN 9
Need Change to 0201 0.1uF
USB2_P4_BT_DP 9
C4318 0.1uF 25V 10%
C4319 0.1uF 25V 10%
LPC_FRAME_N 5,41,50
LPC_AD3 5,41,50
LPC_AD2 5,41,50
LPC_AD1 5,41,50
LPC_AD0 5,41,50
C0201_N
I X5R
C0201_N
I X5R
PCIE_WLAN_LN0_TX_DP
PCIE_WLAN_LN0_TX_DN
PCIE_REFCLK_WLAN_DP
PCIE_REFCLK_WLAN_DN
WLAN_CLK_REQ_N
PCIE_WAKE_PCH_N
LPC_FRAME_N
LPC_AD3
LPC_AD2
LPC_AD1
LPC_AD0
THIS DESIGN SUPPORTS STONE PEAK ONLY
JWLAN1
1
GND_1
3
USB_D+
5
USB_D-
7
GND_7
9
SDIO_CLK
11
SDIO_CMD
13
SDIO_DATA0
15
SDIO_DATA1
17
SDIO_DATA2
19
SDIO_DATA3
21
SDIO_WAKE_N
23
SDIO_RESET_N
33
GND_33
35
PETP0
37
PETN0
39
GND_39
41
PERP0
43
PERN0
45
GND_45
47
REFCLKP0
49
REFCLKN0
51
GND_51
53
CLKREQ0_N
55
PEWAKE0_N
57
GND_57
59
RESERVED_2ND_PETP1
61
RESERVED_2ND_PETN1
63
GND_63
65
RESERVED_2ND_PERP1
67
RESERVED_2ND_PERN1
69
GND_69
71
RESERVED/REFCLKN1
73
RESERVED/REFCLKP1
75
GND_75
CIS ok
SLOT A KEY E
KEY E
PLATFORM PIN OUT
GND7676GND77
77
3.3V_2
3.3V_4
LED1_N
PCM_CLK/I2S_SCK
PCM_SYNC/I2S_WS
PCM_IN/I2S_SD_IN
PCM_OUT/I2S_SD_OUT
LED2_N
GND_18
UART_WAKE_N
UART_RX
UART_TX
UART_CTS
UART_RTS
RESERVED_38
RESERVED_40
RESERVED_42
COEX3
COEX2
COEX1
SSCLK
PERST0_N
RESERVED_W_DISABLE2_N
W_DISABLE1_N
I2C_DATA
I2C_CLK
ALERT
RESERVED_64
UIM_SWP/PERST1_N
UIM_PWR_SNK/CLREQ1_N
UIM_PWR_SRC/GPIO1/PEWAKE1_N
GND7878GND79
3.3V_72
3.3V_74
79
+V3P3SX_CWS
2
4
6
8
10
12
14
16
18
20
22
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
51749-0750P-205
con_75p_ph05_dip_51749_rvs_e
I
WIFI/BT_SLOT_TX
WIFI/BT_SLOT_RX
WLAN_RST_R
BT_RF_KILL_N
WIFI_DISABLE_N
SM_BAT_DATA_DEBUG
SM_BAT_CLK_DEBUG
1
TP9992
1
TP9993
1
TP9976
1
TP9977
R4320
0R
R0402_N
5%
I
R4325 0R
R4326 0R
4/21 Add SM_BAT_DATA connect to JWLAN1.58,
Add SM_BAT_CLK connect to JWLAN1.60,
Debug card need.
NIR0402_N5%
NIR0402_N5%
4/21 Add R4325,R4326 0ohm for Debug card
6/27 R4325,R4326 change to NI,
because WLAN card "Intel 2x2AC 8260" I2C is 1.8V,
mother board I2C is 3.3V
SUS_CLK 7
BT_RF_KILL_N 3
WIFI_DISABLE_N 6
SM_BAT_DATA 29,50,58,59,66
SM_BAT_CLK 29,50,58,59,66
D
C
B
+V3P3SX_CWS
WLAN PCIE AC CAPS
WLAN_CLK_REQ_N
A A
WLAN_RST_R
Size
Size
Size
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
TP6021
TP6020
TP6007
TP6000
WIFI_DISABLE_N
1
PCIE_WAKE_PCH_N
1
BT_RF_KILL_N
1
SUS_CLK
87
INTERNAL ONLY
+V3P3SX
BPAGE DRAWING
sky_y_mrd.+V3P3.43
Wed Jun 03 11:23:00 2015
+V3P3SX 5,6,7,9,10,23,26,30,31,36,37,38,39,40,41,44,45,46,47
3 4
R4321
10K
5%
R0402_N
I
Difference with armour
Reserve PLT_RST_N to reset pin and install
R4323 0R
IR0402_N 5%
R4324 0R
NIR0402_N 5%
Project:
Project:
Project:
Engineer:
Engineer:
Title:
Title:
Title:
2
Engineer:
WLAN WIFI BT MODULE
WLAN WIFI BT MODULE
WLAN WIFI BT MODULE
PLT_RST_N 7,26,41,45,50
WLAN_RST 8
Miix510
Miix510
Miix510
Jacky
Jacky
Jacky
43 69 Tuesday, June 27, 2017
43 69 Tuesday, June 27, 2017
43 69 Tuesday, June 27, 2017
Rev
Rev
Rev
V01
V01
V01
1 5 6
<XR_PAGE_TITLE>
+V3P3SX_WWAN +V3P3SX
SH4401
0R
WWAN
R0603_N
D
5%
R4405 0R
WWAN R0402_N 5%
CO-CH_L4_PH0P8_H1_AB
67ohm 320mA +-25%
USB2_P3_WWAN_DP 9
USB2_P3_WWAN_DN 9
B1 B2
A1 A2
L4400
R4406 0R
WWAN R0402_N 5%
NI
USB2_P3_WWAN_DP_C
USB2_P3_WWAN_DN_C
3/7 R4430 install
C
WWAN_HOST_WAKE_N 8
2/17 Modify
MODEM_SAR_1P8 38
USB3_P3_WWAN_SSIC_RX_DN 9
USB3_P3_WWAN_SSIC_RX_DP 9
USB3_P3_WWAN_SSIC_TX_DN 9
USB3_P3_WWAN_SSIC_TX_DP 9
B
A A
+V3P3SX
+1.8V_PRIM
+VCC_SIM
87
R4430 0R
R4420 0R
R4421 0R
R4403 0R
R4404 0R
BUF_PLT_RST_N_V1P8S 7
+V3P3SX 5,6,7,9,10,23,26,30,31,36,37,38,39,40,41,43,45,46,47
+1.8V_PRIM 7,10,11,31,39,40,47,56,65
+VCC_SIM 45
WWAN_HOST_WAKE_N_R
WWANR0402_N 5%
R4431 0R
WWANR0402_N 5%
USB3_P3_WWAN_SSIC_RX_DN_R
NIR0402_N 5%
USB3_P3_WWAN_SSIC_RX_DP_R
NIR0402_N 5%
USB3_P3_WWAN_SSIC_TX_DN_R
NIR0402_N 5%
USB3_P3_WWAN_SSIC_TX_DP_R
NIR0402_N 5%
6
CONFIG_3
1
GND_3
3
GND_5
5
USB_D+
7
USB_D-
9
GND_11
11
KEY B
CONFIG_0
21
GPIO_11
23
DPR
25
GND_27
27
PERN1/USB3.0-RX-
29
PERP1/USB3.0-RX+
31
GND_33
33
PETN1/USB3.0-TX-
35
PETP1/USB3.0-TX+
37
GND_39
39
PERN0/SATA-B+
41
PERP0/SATA-B-
43
GND_45
45
PETN0/SATA-A-
47
PETP0/SATA-A+
49
GND_51
51
REFCLKN
53
REFCLKP
55
GND_57
57
ANTCTL0
59
ANTCTL1
61
ANTCTL2
63
ANTCTL3
65
RESET*
67
PEDET_OC-PCIE/GND-SATA
69
GND_71
71
GND_73
73
USB3.0IND/GND-OTHER
75
MTG1
76
MTG2
77
CIS ok
SLOT B KEY B
PLATFORM PIN OUT
JWWAN1
CON75_NGFF_KEYB
KEY B
?
WWAN_PWR_ON 9
3.3V_2
3.3V_4
FULL_CARD_POWER_OFF*
W_DISABLE*
GPIO_9/DAS/DSS*
PS CS
GPIO_5
GPIO_6
GPIO_7
GPIO_10
GPIO_8
UIM-RESET
UIM-CLK
UIM-DATA
UIM-PWR
DEVSLP
GPIO_0
GPIO_1
GPIO_2
GPIO_3
GPIO_4
PERST*
CLKREQ*
PEWAKE*
NC_56
NC_58
COEX3
COEX2
COEX1
SIM DETECT
SSCLK
3.3V_70
3.3V_72
3.3V_74
NC1
NC2
INTERNAL ONLY
+V3P3SX_WWAN
2
4
CRD_PWR_OFF_N
6
8
10
KEY B
20
22
24
GPS_DISABLE_N_R
26
28
SIM_RST
30
SIM_CLK
32
SIM_DATA
34
36
38
WWAN_GNSS_SCL
40
WWAN_GNSS_SDA
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
78
79
R4419 0R
+VCC_SIM
+V3P3SX_WWAN
BPAGE DRAWING
sky_y_mrd.+V3P3.44
Wed Jun 03 11:23:00 2015
R4428
150K
1%
R0402
NI
R4432 0R
WWANR0402_N 5%
WWAN_DISABLE_N 6
R4429
182K
1%
1/4 modify ok
R0402_N
NI
NIR0402_N 5%
SIM_RST 45
SIM_CLK 45
SIM_DATA 45
WWAN_GNSS_INT 8
WWAN_GNSS_SCL
SIM_CD 45
WWAN_GNSS_SDA
3
CRD_PWR_OFF_N_SOC 8
GPS_DISABLE_N 8
+1.8V_PRIM
R4422
4.7K
5%
R0402_N
NI
3 4
2 87 54 1
+V3P3SX_WWAN
C4422
150uF 6.3V 20%
CAP_3528_H1P9
WWAN
+V3P3SX_WWAN
C4404
1uF 6.3V 10%
X5R
C0402_N
WWAN
C4423
150uF 6.3V 20%
CAP_3528_H1P9
NI
6/14 Del C4418,C4419,C4420,C4421 100uF
Add C4422,C4423(NI) 150uF,close power nosic solution
C4405
0.1uF 10V 10%
X5R
C0402_N
WWAN
C4414
18pF 50V 1%
NPO
C0402
WWAN
+V3P3SX_WWAN
C4415
8.2pF 50V 0.1pF
NPO
C0402_N
WWAN
C4416
7.0pF 50V 0.25pF
C0G
C0402_N
WWAN
C4406
33pF 50V 5%
NPO
C0402_N
WWAN
+VCC_SIM
SIM_DATA
SIM_CLK
SIM_RST
R4409 4.7K
R4410 100K
R4411 100K
NIR0402_N 5%
NIR0402_N 5%
NIR0402_N 5%
+V3P3SX
+1.8V_PRIM
R4423
4.7K
G1
5%
R0402_N
NI
D1 S1
Q4400A
LBSS138DW1T1G 200mA 50V
SOT363M
NI
+1.8V_PRIM
G2
D2 S2
Q4400B
LBSS138DW1T1G 200mA 50V
SOT363M
NI
Size
Size
Size
Title:
Title:
Title:
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
2
R4425
R4424
4.7K
4.7K
5%
5%
R0402_N
R0402_N
NI
NI
Project:
Project:
Project:
Engineer:
Engineer:
Engineer:
WWAN MODULE
WWAN MODULE
WWAN MODULE
WWAN_GNSS_3P3_SCL 8
WWAN_GNSS_3P3_SDA 8
C4407
33pF 50V 5%
NPO
C0402_N
WWAN
Miix510
Miix510
Miix510
Jacky
Jacky
Jacky
1 5 6
Rev
Rev
Rev
V01
V01
44 69 Tuesday, July 25, 2017
44 69 Tuesday, July 25, 2017
44 69 Tuesday, July 25, 2017
V01
D
C
B
<XR_PAGE_TITLE>
6
3
2 87 54 1
+VCC_SIM
D
SIM_CLK 44
SIM_DATA 44
SIM_RST 44
SIM_CD 44
C
B
PCIE_SD_LN0_TX_SOC_DN 9
PCIE_SD_LN0_TX_SOC_DP 9
PCIE_REFCLK_SD_DN_R 7
PCIE_REFCLK_SD_DP_R 7
2016/10/07
C4408
10pF 50V 0.5pF
NPO
C0402_N
SIM
PCIE_SD_LN0_RX_SOC_DN 9
PCIE_SD_LN0_RX_SOC_DP 9
PLT_RST_N 7,26,41,43,50
SD_CLK_REQ_N 7
C4409
10pF 50V 0.5pF
NPO
C0402_N
SIM
C4410
10pF 50V 0.5pF
NPO
C0402_N
SIM
R9906 0R
C4411
10pF 50V 0.5pF
NPO
C0402_N
SIM
R9907 0R
R9898 0R
R9901 0R
R9902 0R
R9903 0R
R9904 0R
R9905 0R
R4413 0R
R4414 0R
R4415 0R
R4416 200R
BUF_PLT_RST#
SD R0402_N 5%
PCIE_RXN1
SD R0402_N 5%
PCIE_RXP1
SD R0402_N 5%
PCIE_TXN1_C
SD R0402_N 5%
PCIE_TXP1_C
SD R0402_N 5%
CLK_PCH_PCIE_CARD#
SD R0402_N 5%
CLK_PCH_PCIE_CARD
SD R0402_N 5%
SD R0402_N 5%
SIM R0402_N 5%
SIM R0402_N 5%
SIM R0402_N 5%
SIM R0402_N 1%
CARD_CLK_REQ#_LS
CLK_PCH_PCIE_CARD#
PCIE_RXN1
BUF_PLT_RST#
PCIE_RXP1
+VCC_SIM
R9899 0R
BUF_PLT_RST#
PCIE_RXN1
PCIE_RXP1
CLK_PCH_PCIE_CARD#
CLK_PCH_PCIE_CARD
PCIE_TXN1_C
PCIE_TXP1_C
R9900 0R
SIM R0402_N 5%
BUF_PLT_RST#
PCIE_RXN1
PCIE_RXP1
CLK_PCH_PCIE_CARD#
CLK_PCH_PCIE_CARD
PCIE_TXN1_C
PCIE_TXP1_C
CARD_CLK_REQ#_LS
+VCC_SIM 44
+V3P3SX
SD R0402_N 5%
SIM_SD_PWR
40506W90-12PA-SHLOATCR
con_fpc12p_ph0p5_h1_40506w90
SD and SIM IO connector
JCONN2
G1
G1
1
2
3
4
5
6
7
8
9
10
11
12
G2
G2
I
D
C
B
A A
Project:
Project:
87
INTERNAL ONLY
BPAGE DRAWING
sky_y_mrd.GND
Wed Jun 03 11:23:01 2015
Project:
Engineer:
Engineer:
Size
Size
Size
Title:
Title:
Title:
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
3 4
2
Engineer:
MICRO SIM
MICRO SIM
MICRO SIM
Miix510
Miix510
Miix510
Jacky
Jacky
Jacky
Rev
Rev
Rev
V01
V01
45 69 Tuesday, July 25, 2017
45 69 Tuesday, July 25, 2017
45 69 Tuesday, July 25, 2017
V01
1 5 6
+V5P0S +V5P0S_AUDIO
R4600
R0402_N
I
0R 5%
+V3P3SX +V3P3SX_AUDIO
R4601
R0402_N
I
0R 5%
R4602
R0402_N
0R 5%
+V1P8S_AUDIO
I
+V1P8S
10uF 6.3V 20%
+V5P0S_AUDIO
C4607
C0603_N
C4608
0.1uF 10V 10%
X5R
X5R
C0402_N
I
I
10uF 6.3V 20%
AUDIO_DSP_RST 47
+V3P3SX_AUDIO
R10112 2.2K
R10113 2.2K
R10114 2.2K
R10115 2.2K
R0402_N
DSP
5%
R0402_N
DSP
5%
R0402_N
DSP
5%
R0402_N
DSP
5%
DMIC_CLK_OUT1_R 47
DMIC_DATA_IN1_R 47
DMIC_CLK_OUT1_R2 47
DMIC_DATA_IN2_R 47
JACK DETECTION NETWORK
+V3P3SX_AUDIO
R4609
100K
R0402_N
1%
I
MIC_GPI
If you don't support Dock audio JD
function,please keep pull high
HPOUT_JD 49
+V5P0S
+V3P3SX
+V1P8S
C4601
C4600
C0402_N
0.1uF 10V 10%
X5R
X5R
C0402_N
I
I
AGND
2.2uF 6.3V 10%
+V5P0S_AUDIO
C4603
C4602
C0402_N
X5R
I
0.1uF 10V 10%
X5R
C0402_N
I
AGND
C4606
0.1uF 10V 10%
X5R
C0402_N
I
CR9058
SOD-923 DSP
R10111
DSP
R0402_N 0R 5%
RB521C30 100mA 30v
5/17 update
AGND
DMIC_CLK 47
A C
RB521C30 100mA 30v
POST I2S_BCLK 47
CR9057
A C
SOD-923
DSP
DMIC-DATA34 47
C4604
4.7uF 6.3V 20%
POST I2S_LRCK 47
POST I2S_OUT 47
4.7uF 6.3V 20%
+V5P0S_AUDIO
C4605
X5R
C0603_N
I
DMIC-DATA12 47
POST I2S_MCLK 47
ALC3290_IRQ 47,50
U4600_54
U4600_2
POST I2S_IN 47
U4600_4
U4600_5
R10121
NONDSP
NONDSP
NONDSP
NONDSP
DMIC_CLK
U4600_54
U4600_2
U4600_4
R0402_N 0R 5%
R10122
R0402_N 0R 5%
R10123
R0402_N 0R 5%
R10124
R0402_N 0R 5%
+V3P3SX_AUDIO
R4607
100K
R0402_N
1%
I
HP_LINE1_JD
R4608
200K
1%
R0402_N
I
+V5P0S 10,30
+V3P3SX 5,6,7,9,10,23,26,30,31,36,37,38,39,40,41,43,44,45,47
+V1P8S 10,31,38
IX5R C0402_N
SPK_LP
SPK_LN
SPK_RN
SPK_RP
AUD_PD_N
U4600_54
CR9056
RB521C30 100mA 30v
RB521C30 100mA 30v
SPK_RP
6/29 update
SWAP NET
SOD-923
CR9055
SPK_LP
SPK_LN
SPK_RN
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
SOD-923
AGND
C4609
4.7uF 6.3V 20%
X5R
C0402_N
I
AGND
36
37
38
39
40
41
42
AVSS1
MIC1-CAP
VREF
LDO1-CAP
AVDD1
PVDD1
SPK-OUT-LP
SPK-OUT-LN
SPK-OUT-RN
SPK-OUT-RP
PVDD2
EAPD+PD#/GPIO_11
DMIC-CLK1
DMIC-DATA1
GPIO_8/SPDIF-IN
GPIO_7
Thermal PAD
Line1-VREFO
GPIO_91GPIO_1/DMIC_CLK22GPIO_63GPIO_2/DMIC DATA24GPIO_55HD-SOC SEL6DVDD7GPI-JD18GPI-JD29VD33STB10I2C -SDA11I2C-SCL12MHDA BCLK13MHDA SYNC
Mic1-R/Sleeve
Mic1-Vref_O-L
Mic1-VREFO-R/AGPO-1
ALC3268‐CG
Mic1-L/Ring2
U4600_2
U4600_4
U4600_5
A C
R4604
R9915 0R
I R0402_N 5%
I R0402_N 5%
I R0402_N 5%
R0402_N
C4621
2.2uF 6.3V 10%
C0402_N
I R0402_N 5%
100K
5%
I
X5R
I
SPK_LP_R
C9593
47pF 50V 2%
NPO
C0402_N
NI
C9592
47pF 50V 2%
NPO
C0402_N
NI
C9590
2200pF 25V 10%
X7R
C0402_N
NI
C9591
2200pF 25V 10%
X7R
C0402_N
NI
R9911 0R
R9913 0R
R9910 0R
DSP
A C
DSP
R9916 0R
R9914 0R
R9909 0R
MIC1_VREF-R
C9881 1uF 6.3V 10%
C9882 1uF 6.3V 10%
32
33
34
35
Line1-L
Line1-R
HP_Out-R
AGND
DGND
+V3P3SX_AUDIO
R9912 0R
I R0402_N 5%
I R0402_N 5%
I R0402_N 5%
I R0402_N 5%
AGND
29
30
31
CPVEE
CPVREF
HP_Out-L
CPVDD/AVDD2
LDO2-CAP
LDO3-CAP
MHDA SDATA OUT
MHDA SDATA In
MHDA RESET
14
1 2
CR9049
AZ5725-01F.R7GR 1uA 5V
DFN1006p2x
NI
1 2
CR9051
AZ5725-01F.R7GR 1uA 5V
DFN1006p2x
NI
1 2
CR9048
AZ5725-01F.R7GR 1uA 5V
DFN1006p2x
NI
1 2
CR9050
AZ5725-01F.R7GR 1uA 5V
DFN1006p2x
NI
MIC1_VREF-L
MIC1-R
MIC1-L
IX5R C0402_N
LINE1-L 47
IX5R C0402_N
LINE1-R 47
HPOUT_R_R 49
HPOUT_L_R 49
C4610 2.2uF 6.3V 10%
C4611 2.2uF 6.3V 10%
U4600
CPVPP
28
CBN1
27
CBP1
26
CBP2
25
CBN2
24
23
PCBEEP
22
21
VBG_OUT
20
AVSS2
19
DVDD-IO
18
17
HDA_SDI0_R
16
HDA_RST_N
15
ALC3268-CG
I
R4650 33R
C4622 22pF 50V 5%
HP_LINE1_JD
MIC_GPI
SPK_LP_CONN
SPK_LN_CONN SPK_LN_R
SPK_RP_CONN SPK_RP_R
SPK_RN_CONN SPK_RN_R
TP10035
I X5R C0402_N
I X5R C0402_N
C4612 2.2uF 6.3V 10%
C9594 2.2uF 6.3V 10%
HDA_SPKR_R_C
R4603 33R
待申請
I R0402 5%
I NPO C0402_N
CODEC_I2C_SCL 47
CODEC_I2C_SDA 47
+V3P3SX_AUDIO
TP10012
TP10011
TP10010
TP10009
AGND
AGND
1
1
1
1
AGND
SPK_RP_CONN
SPK_RN_CONN
SPK_LP_CONN
SPK_LN_CONN
I X5R C0402_N
I X5R C0402_N
+V1P8S_AUDIO
I R0402 5%
Pin52~56,Pin1~12; Powered by DVDD
Pin13~19; Powered by DVDD-IO
Pin20~31; Powered by CPVDD
Pin32~45; Powered by AVDD1
Pin46~51; Powered by PVDD
C9595 4.7uF 6.3V 20%
C4615 0.1uF 10V 10%
C4616 4.7uF 6.3V 20%
C4617 4.7uF 6.3V 20%
C4618 0.1uF 10V 10%
C4620 4.7uF 6.3V 20%
STRAP_HDA_SDO 6
HDA_SDI0 6
I X5R C0402_N
IX5R C0402_N
I X5R C0402_N
I X5R C0402_N
IX5R C0402_N
I X5R C0402_N
HDA_RST_N 6
HDA_SYNC 6
HDA_BCLK_R 6
Speaker
CIS ok
G2
1
SH2
1
2
2
3
3
4
4
SH1
G1
6/21 JSPK1 footprint CON_FPC4P_PH0P8_H1P7
change to con_wtb_4p_ph0p8_h1p7_50208
AGND
AGND
+V3P3SX_AUDIO
C4619
0.1uF 10V 10%
X5R
C0402_N
I
HDA for AUDIO
JSPK2
50208-00401-001
con_fpc4p_ph0p8_h1p7
I
AGND
R4605
R0402_N
I
0R 5%
R4606
R0402_N
I
0R 5%
MIC1-R
C9900 4.7uF 6.3V 20%
MIC1-L
C9901 4.7uF 6.3V 20%
C4623
0.1uF 10V 10%
C0402_N
X5R
HDA_SPKR_R_C
I
CLASS-D POWER DOWN
CONTROL CIRCUIT
PCH_AUDIO_PWREN 6
HDA_RST_N
Place at Codec bottom side.
Place near audio connector. Don't short this pad to USB
digital ground, and should be far away from any power traces.
AGND
MIC1_VREF-L
R10062
I X5R C0402_N
I X5R C0402_N
1K
I
R0402_N
5%
AGND
MIC_GPI
PC BEEP
HDA_SPKR_R
R10064
2.2K
5%
R0402_N
R10065
I
R0402_N
0R 5%
R10063
22K
5%
R0402_N
I
C9902
10uF 6.3V 20%
C0603_N
Date: Sheet of
Date: Sheet of
Date: Sheet of
R4610 0R
D4600
2
1
BAT54A 200mA 30V
SOT_23
I
I
R10066
22K
R0402_N
I
X5R
I
Size
Size
Size
Title:
Title:
Title:
C
C
C
R4614 47K
+V3P3SX_AUDIO
R4611
10K
NI R0402_N 5%
5%
R0402_N
I
3
R4612
10K
5%
R0402_N
NI
MIC1
MIC1 49
5%
Project:
Project:
Project:
Engineer:
Engineer:
Engineer:
AUDIO CODEC / SPK
AUDIO CODEC / SPK
AUDIO CODEC / SPK
I R0402_N 5%
AUD_PD_N
HDA_SPKR 6
Miix520
Miix520
Miix520
Jacky
Jacky
Jacky
46 57 Thursday, June 29, 2017
46 57 Thursday, June 29, 2017
46 57 Thursday, June 29, 2017
Rev
Rev
Rev
V01
V01
V01
AUDIO DSP
C9983
2.2uF 6.3V 10%
C0402_N
LDO8_O
AEC SPK reference signals
LINE1-L 46
LINE1-R 46
need EXT. OSC
OSC_CLK
POST I2S_MCLK 46
TP10027
DMIC-DATA12 46
DMIC_CLK 46
DMIC-DATA34 46
ALC3290_IRQ 46,50
+V3P3SX_AUDIO
5/17 update
R10071
R10073
5/24 update
R10107
10K
5%
R0402_N
DSP
LID_INT_N 8,38,50
SLP_S4_N 7,10,42,50,60
used to download or flush Flash code
R10108
AUDIO_DSP_RST 46
+1.8V_PRIM
+V3P3A
+V3.3AL
+1.8V_PRIM
DBVDD
C9982
0.1uF 10V 10%
X5R
X7R
C0402_N
DSP
DSP
R10069
DCVDD1
R0402_N
NI
0R 5%
R0402_N
R10017
DSP
0R 5%
R0402_N
R10016
NI
0R 5%
S0_SysclkSource
R0402_N
TP10036
DSP
0R5%
TP10037
R10015
TP10038
TP10039
TP10040
TP10041
DSP R0402_N 0R 5%
R10014
DSP R0402_N 0R 5%
DSP R0402_N 0R 5%
NI R0402_N 0R 5%
R10072
TP10030
MASTER_SCL1
MASTER_SDA1
R10117
DSP R0402_N 0R 5%
DSP R0402_N 0R 5%
R10070
5/17 update
This SPI is Slave Mode
4/28 update
NI R0402_N 0R5%
R10110
100K
5%
R0402_N
NI
+V1P8S_DSP DBVDD
R10055
R0402_N
DSP
0R 5%
DBVDD
R10059
R0402_N
DSP
0R 5%
10
11
17
21
23
25
16
66
MCLK1
55
MCLK2
40
LRCK1
39
BCLK1
44
ADCDAT1
43
DACDAT1
DSP_57
57
54
62
GPIO20
60
GPIO19
U16_48
48
U16_51
51
U16_49
49
U16_47
47
53
45
PDM_DAT1
35
36
PDM_SCL1
34
PDM_DAT2
37
DSP_IRQ
46
50
GPIO2
DMIC2_SCL
38
DMIC1_SCL
41
DMIC1_DAT
42
DMIC2_DAT
52
DSP_WOV
65
68
GPIO26
GPIO25
GPIO27
GPIO28
Q8210_D
Q8210
1
Gate
2
Source
LSK3541FS8T2L 100mA 30V
SOT-723
DSP
R10056
R0402_N
0R 5%
6/27 update
1 2
120ohm 200mA +-25%
+V3.3AL 7,11,50,51,58,60,66
+1.8V_PRIM 7,10,11,31,39,40,44,56,65
+V1P8S_DSP
C9892
4.7uF 6.3V 20%
X5R C0402_N
DSP
U16
1
9
8
7
4
Drain
C9891
0.1uF 10V 10%
X5R
C0402_N
DSP
64
LDO18_IN
MICBIAS1
MICBIAS2
MIC_IN_DET
IN3P/IN_VAD/DMIC4_SDA
IN3N/DMIC3_SDA
IN4P/DMIC2_SDA/IN_VAD
IN4N/DMIC1_SDA
MCLK1
MCLK2/DMIC2_SCL/SPI_CS_FLASH
LRCK1
BCLK1
ADCDAT1
DACDAT1
LRCK2/GPIO18
BCLK2/GPIO17
ADCDAT2/GPIO20/SPDIFIN
DACDAT2/GPIO19
LRCK3/SPI_CS_M1/RX_UART/GPIO9
BCLK3/SPI_SCL_M1/TX_UART/GPIO8
ADCDAT3/SPI_MISO_M1/CTS#_UART/GPIO11/SEL_BONDING1
DACDAT3/SPI_MOSI_M1/RTS#_UART/GPIO10/SEL_BONDING0
LRCK4/MASTER_SDA2/GPIO13
BCLK4/MASTER_SCL2/GPIO12
ADCDAT4/MASTER_SDA3/GPIO15/PDM_DAT1/GPIO7
DACDAT4/MASTER_SCL3/GPIO14
BCLK5/PDM_SCL1/DMIC4_SDA/GPIO6
ADCDAT5/PDM_DAT2/DMIC3_SCL/GPIO5
GPIO1/IRQ
GPIO2/JTRST/DMIC1_SCL/SPI_SCL_FLASH
GPIO3/DMIC2_SCL
GPIO21/DMIC1_SCL/SPI_SCL_M2
GPIO22/DMIC1_SDA/SPI_CS_M2
GPIO23/DMIC2_SDA/SPI_MOSI_M2
GPIO24/DMIC3_SDA/SPI_MISO_M2
MASTER_SCL1/SPI_MOSI_FLASH
MASTER_SDA1/SPI_MISO_FLASH
SPI_CS_S/JTMS/GPIO26
SPI_SCL_S/JTCK/GPIO25
SPI_MOSI_S/JTDI/GPIO27
SPI_MISO_S/JTDO/GPIO28
R10109
DSP R0402_N 0R 5%
RESET
3
WOV_KILL_N 3
NI
+V3P3SX
R10125
L0402
NONDSP
C9898
1uF 10V 10%
X5R
C0402_N
DCVDD3
LDO8_O
61
LDO8_O2LDO9_O
LDO9_O
DCVDD1
67
DCVDD15DCVDD3
DSP
DBVDD
6
33
13
DBVDD
JD/AVDD25
AVDD18_DAC_L
NC unused analog power balls
Only PLL related power = AVDD18_1/VAD18 will be used
ALC3290-CGT
NC unused analog ground balls
AGND_DAC_L
AGND30ADDA_VRN
MICGND
32
24
14
AGND
For S3 power saving
Y8501
OUT
VDD
1 2
E/D
GND
24.576MHz +/- 10PPM
CRY4_3225
DSP
NA
DBVDD
CR9059
A C
RB521C30 100mA 30v
SOD-923
DSP
C9980
0.1uF 10V 10%
X5R C0402_N
DSP
+V1P8S_DSP
C9897
0.1uF 10V 10%
X7R
C0402_N
DSP
DCVDD3
20
22
15
AVDDHV3
AVDD33_3
AVDD18_1/VAD18
LDO8_O LDO9_O
C9893
4.7uF 6.3V 20%
X5R C0402_N
DSP
C9894
4.7uF 6.3V 20%
X5R C0402_N
DSP
DCVDD1
C9895
4.7uF 6.3V 20%
X5R C0402_N
DSP
C9896
4.7uF 6.3V 20%
X5R C0402_N
DSP
3290_ADDAREF
C9878
0.1uF 10V 10%
X5R C0402_N
DBVDD
R10005
2.2K
5%
R0402_N
DSP
SPI_CS_FLASH
SPI_MISO_FLASH
SPI_WP#_FLASH
DSP
4/26 update
CODEC_I2C_SCL 46
CODEC_I2C_SDA 46
NC unused analog I/O balls
26
LOUT1P
27
LOUT1N
29
LOUT2P
28
For AEC SPK reference path , ADC's reference voltage need caps.
EPAD/DGND
69
LOUT2N
VREF1
VREF2
VREF3
ADDAREF
SEL1_MODE
LDO1_EN
RESET
3290_VREF1
18
3290_VREF2
19
12
3290_ADDAREF
31
3
SCL
SCL
63
SDA
SDA
SEL1_MODE
58
LDO1_EN
56
59
RESET
MCLK2
MASTER_SDA1
DBVDD
R10075 10K
R0402_N
0R 5%
R10074
R10076 10K
DSP
R10004
2.2K
5%
R0402_N
DSP
DSP R0402_N5%
DSP R0402_N5%
DSP_WOV
R10119
100K
5%
R0402_N
DSP
DBVDD
OSC_CLK
3 4
R10057
0R
R0402_N
5%
DSP
SEL1_MODE
R10058
0R
SEL2_MODE SEL1_MODE
Low Low
Low High
I2C Control
Flash Boot
R0402_N
5%
NI
DMIC_CLK_OUT1_R 46
DMIC_DATA_IN1_R 46
4/26 update
DMIC1_SCL
R4706
R4707
3290_VREF2
3290_VREF1
C9877
4.7uF 6.3V 20%
X5R C0402_N
AGND AGND AGND
C9879
4.7uF 6.3V 20%
X5R C0402_N
DSP
DSP
8/12 update
Need install
C4711
1uF 10V 10%
X5R
C0402_N
I
DBVDD
R10054
R10053
10K
10K
5%
5%
R0402_N
R0402_N
DSP
DSP
SPI ROM
U9512
1
CS#
2
SO
3
WP#
4
VSS
VCC
HOLD#
SCLK
SI
GND
9
8
7
6
5
WSON8_PH1P27_5X6_H0P8_G1
GD25Q32CWIGR
DSP
10pF 50V 0.5pF
C9880
4.7uF 6.3V 20%
X5R C0402_N
DBVDD
SPI_VCC_FLASH
SPI_HOLD#_FLASH
SPI_SCL_FLASH
SPI_MOSI_FLASH
6/27 update
DSP R0402_N 0R 5%
DMIC_CLK_OUT1_R
DSP R0402_N 0R 5%
DMIC_DATA_IN1_R DMIC1_DAT
C4705
C0402
NPO
NI
DSP
R4715
0R
R0402_N
5%
I
C4712
0.1uF 10V 10%
X7R
C0402_N
I
R0402_N
0R 5%
R10080
DMIC1_SCL
R0402_N
0R 5%
R10077
R10078 10K
R0402_N
0R 5%
R10079
MASTER_SCL1
DSP
DBVDD
DSP
DSP R0402_N5%
DSP
4/26 update
GPIO2
DMIC1
3
CLOCK
4
DATA
7
GND
8
GND
SD07OT263-017
I
DMIC1
DMIC2
3
CLOCK
4
DATA
7
GND
8
GND
SD07OT263-017
I
DMIC_CLK_OUT1_R2 46
DMIC_DATA_IN2_R 46
R4712
R4713
5/17 update
C10051
47pF 50V 2%
NPO
C0402_N
NI
VDD
SELECT
GND
GND
1
VDD
2
SELECT
5
GND
6
GND
6/27 update
C4710
10pF 50V 0.5pF
C0402
POST I2S_LRCK 46
POST I2S_BCLK 46
POST I2S_IN 46
POST I2S_OUT 46
1
2
R4708
5
10K
6
R0402_N
5%
I
R4710
10K
R0402_N
5%
I
DSP R0402_N 0R 5%
DMIC_CLK_OUT1_R2
DSP R0402_N 0R 5%
DMIC_DATA_IN2_R DMIC2_DAT
NPO
NI
DMIC2
I2S Interface
R10010
R0402_N
0R 5%
C9885 22pF 50V 5%
R10011
R0402_N
0R 5%
C9886 22pF 50V 5%
R10012
R0402_N
0R 5%
C9887 22pF 50V 5%
R10013
R0402_N
0R 5%
C9888 22pF 50V 5%
C4706
1uF 10V 10%
X5R
C0402_N
I
C4708
1uF 10V 10%
X5R
C0402_N
I
DSP
DSP
DSP
DSP
DBVDD
R4709
0R
R0402_N
5%
I
C4707
0.1uF 10V 10%
X7R
C0402_N
I
DBVDD
R4711
0R
R0402_N
5%
I
C4709
0.1uF 10V 10%
X7R
C0402_N
I
J1
8
7
6
5
4
3
2
1
40506W90-8PA-SHLOATCR
CON_FPC8P_PH0P5_H1P2_50696
I
LRCK1
DSP NPO C0402_N
BCLK1
DSP NPO C0402_N
ADCDAT1
DSP NPO C0402_N
DACDAT1
DSP NPO C0402_N
G2
G2
G1
G1
Project:
Project:
Project:
Engineer:
Engineer:
Size
Size
Size
Title:
Title:
Title:
C
C
C
Date: Sheet of
Date: Sheet of
Date: Sheet of
Engineer:
AUDIO DSP / DMIC
AUDIO DSP / DMIC
AUDIO DSP / DMIC
Miix520
Miix520
Miix520
Jacky
Jacky
Jacky
47 57 Monday, September 04, 2017
47 57 Monday, September 04, 2017
47 57 Monday, September 04, 2017
Rev
Rev
Rev
V01
V01
V01
<XR_PAGE_TITLE>
6
3
2 87 54 1
D
C
Audio combo jack
D
C
Move to IO board
B
B
A A
Project:
Project:
87
Project:
Engineer:
Engineer:
Size
Size
Size
Title:
Title:
Title:
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
3 4
2
Engineer:
AUDIO-COMBO JACK
AUDIO-COMBO JACK
AUDIO-COMBO JACK
Miix510
Miix510
Miix510
Jacky
Jacky
Jacky
Rev
Rev
Rev
V01
V01
48 69 Tuesday, June 27, 2017
48 69 Tuesday, June 27, 2017
48 69 Tuesday, June 27, 2017
V01
1 5 6
<XR_PAGE_TITLE>
6
3
2 87 54 1
D
CIS ok
JCONN1
G1
GND1
1
AGND
C
PWRBTN_IN_N 51
VOLUME_DOWN 8,50
VOLUME_UP 8,50
LID_INT_N1 8,50
+V3P3A
B
PWRBTN_IN_N
VOLUME_DOWN
VOLUME_UP
LID_INT_N1
2
4
6
8
10
12
14
16
18
20
40302W90-21PN-SHLOATCR
con_fpc21p_2_ph0p6_h1p1
I
1
2
4
6
8
10
12
14
16
18
20
GND2
3
3
5
5
7
7
9
9
11
11
13
13
15
15
17
17
19
19
21
21
G2
HPOUT_JD
HPOUT_L_R
HPOUT_R_R
MIC1
AGND
BAT_CHGOK_LED_N 50
HPOUT_JD 46
HPOUT_L_R 46
HPOUT_R_R 46
MIC1 46
D
C
B
IO Board CONN
A A
Project:
Project:
87
INTERNAL ONLY
BPAGE DRAWING
sky_y_mrd.+VCHG.49
Wed Jun 03 11:23:03 2015
Project:
Engineer:
Engineer:
Size
Size
Size
Title:
Title:
Title:
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
3 4
2
Engineer:
IO board CONN
IO board CONN
IO board CONN
Miix510
Miix510
Miix510
Jacky
Jacky
Jacky
Rev
Rev
Rev
V01
V01
49 69 Tuesday, June 27, 2017
49 69 Tuesday, June 27, 2017
49 69 Tuesday, June 27, 2017
V01
1 5 6
EC controller
+V3P3A +V3P3A_EC
SH5501 0R
NOTE:RESET TIMING CHANGED TO 10MS
+V3P3A_EC
R5510
100K
R0402_N
EC_WRST# 29
Work Voltage
U22
U42
U22,U42 For power load code
2017/03/22
SMC_RUNTIME_SCI_N 3
+V3P3A_SPI_FLASH
WorkNAVoltage
Lid1
V
Lid2
V
Lid1/Lid2 X
SRTCRST_EC 7
RSMRST_N 7
PM_PWRBTN_R_N 7
C9577
0.1uF 10V 10%
X7R
C0402_N
I
0V
3.3V
0.762V
0.55V
3.3V
0.354V
C5510
1uF 6.3V 10%
X5R
C0402_N
I
AC_PRESENT
from MB LID
1/5 Reserve +V3.3AL
I R0603_N 5%
5%
I
CR5500
RB521C30 100mA 30v
A C
SOD-923
I
CHG_ACOK change to ACPRES
from Charger IC
R9809
R5530
RSMRST_N
PM_PWRBTN_R_N
+V3P3A_EC
R10087
10K
5%
R0402_N
U42
R10088
10K
5%
R0402_N
U22
+V3P3A
R9891
10K
5%
R0402_N
CR9045
I
A C
RB521C30 100mA 30v
SOD-923
I
3/2 Add LID1& LID2 function
LID_INT_N 8,38,47 LID_INT_N1 8,49
SH5502 0R
I
0R 5%
R0402_N
0R
R0402_N
5%
I
AC_PRESENT 7
FLASH_SPI_CLK 5,24
FLASH_SPI_CS0_N 5,24
FLASH_SPI_MOSI 5,24
FLASH_SPI_MISO 5,24
ALLSYSPWRGD 66
+V3P3A_EC
R9832
10K
5%
R0402_N
I
SPI_MIRROR_MODE
R9831
10K
5%
R0402_N
NI
QT2A
2N7002KDW 115mA 60V
SOT363V
I
G1
LPC_AD0 5,41,43
LPC_AD1 5,41,43
LPC_AD2 5,41,43
LPC_AD3 5,41,43
LPC_CLK_EC 5
LPC_FRAME_N 5,41,43
LPC_SERIRQ 5
PLT_RST_N 7,26,41,43,45
EC_PWR_LATCH 51
ACPRES 7,59
+V3P3A
+V3.3AL
NI R0603_N 5%
DOCK_DET 8,37
SLP_S4_N 7,10,42,47,60
SLP_S3_N 7,10,60
D1
S1
+V3P3A_SPI_FLASH
R9896
10K
1%
R0402_N
I
D2
S2
G2
QT2B
2N7002KDW 115mA 60V
SOT363V
I
+V3P3A
R9893
30K
1%
R0402_N
I
LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3
LPC_CLK_EC
LPC_FRAME_N
LPC_SERIRQ
PLT_RST_N
EC_PWR_LATCH
EC_WRST_N
R9877 0R
SLP_S4_N
SPI_MIRROR_MODE
AC_PRESENT
SRTCRST_EC_R
SLP_S3_N
EC_RSMRST_N
FLASH_SPI_CLK
FLASH_SPI_CS0_N
FLASH_SPI_MOSI
FLASH_SPI_MISO
EC_PROCHOT
ALLSYSPWRGD
R9895
100K
1%
R0402_N
I
D2
S2
15
14
13
12
18
11
10
23
19
C5500
C0402_N
47
48
49
43
42
58
57
55
54
50
51
52
32
33
27
30
44
53
40
17
EC_VCORE
X7R
I
DOCK_DET_R
I R0402_N5%
0.1uF 10V 10%
+V3P3A
LID_INT_ADC
G2
R9894
20K
1%
R0402_N
I
QT3B
2N7002KDW 115mA 60V
SOT363V
I
D1
S1
LAD0/GPM0
LAD1/GPM1
LAD2/GPM2
LAD3/GPM3
LPCCLK/GPM4
LFRAME*/GPM5
SERIRQ/GPM6
LPCRST*/GPD2
GA20/GPB5
6
WRST*
CRX1/SMCLK3/GPH1
CTX1/SMDAT3/GPH2
GPG1
5
GPG2
GPG6
3
PS2DAT1/GPF3
PS2CLK1/GPF2
TXD/SOUT0/GPB1
RXD/SIN0/GPB0
VFSPI
FSCK/GPG7
FSCE#/GPG3
FMOSI/GPG4
FMISO/GPG5
KSO11
KSO12
VSS
8
VSS
VSS
VSS
VSS
AVSS
VCORE
IC
I
EC_PROCHOT
R9897
10K
1%
R0402_N
I
G1
QT3A
2N7002KDW 115mA 60V
SOT363V
I
0.1uF 10V 10%
U5500
IT8110E
SMCLK2/PECI/GPF6
SMDAT2/PECIRQT*/GPF7
DAC3/TACH1B/GPJ3
G
R5511
10K
5%
R0402_N
I
MIRROR MODE
PULLUP TO ENABLE
from IO board LID
+V3P3A_EC
C5501
X7R
C0402_N
VSTBY
VSTBY
VSTBY
VSTBY
VSTBY
VSTBY
AVCC
SMCLK0/GPB3
SMDAT0/GPB4
SMCLK1/GPC1
SMDAT1/GPC2
PWM0/GPA0
PWM1/GPA1
TACH0A/GPD6
ADC0/GPI0
ADC1/GPI1
ADC2/GPI2
ADC3/GPI3
KBRST*/GPB6
GPD0
CLKRUN*/GPH0
GINT/GPD5
PWRSW*/GPE4
GPC0
PROCHOT_N
Q5500
D
2N7002 250mA 60V
sot_323_dgs
S
I
I
VCC
16
4
7
26
31
45
62
39
59
60
63
64
1
2
24
25
GPE0
21
GPE7
22
29
41
35
ADP_I_R
36
37
38
KSI0
34
9
PM_BATLOW_N_R
20
46
28
56
61
PROCHOT_N 3,66
0.1uF 10V 10%
+3P3A_AVCC
SM_BAT_CLK_R
SM_BAT_DATA_R
SM_BAT_CLKPD
SM_BAT_DATAPD
PECI_EC
EC_PCH_PWROK
USBPD_INT_N
SYS_PWROK
R9876 0R
R0402_N
R9839
5%
0R
WOV_BATT_FUNTION
VOLUME_DOWN
R9828
VOLUME_UP
EC_PWRBTN_IN_N
R9855 0R
I R0402_N 5%
+V3P3A_EC
QT4A
2N7002KDW 115mA 60V
SOT363V
I
+V3P3A_EC
C5504
X7R
C0402_N
0.1uF 10V 10%
I
C5505
C0402_N
0.1uF 10V 10%
X7R
I
+V3P3A_EC
TP5503
TP5502
TP5500
TP5501
PECI_EC 3
TP5513
LID_INT_ADC
I
BAT_CHGOK_LED_N 49
EC_FAN_PWM1 30
USBPD_INT_N 53
SYS_PWROK 7
TP5509
+V5A_+V3.3A_PWRGD 11,60
I R0402_N5%
VOLUME_DOWN 8,49
ME_Flash_EN 6,37
I R0402_N 0R 5%
PM_BATLOW_N 7
PM_CLKRUN_N 5
TP5508
VOLUME_UP 8,49
EC_PWRBTN_IN_N 51
EC_KBRST# 5
5/9 EC_CHARGER_EN change to EC_KBRST#,
connect to SOC pin AW13(RCIN)
+V3P3A_EC
R10083
10K
1%
R0402_N
I
D1
S1
G1
R10085
30K
1%
R0402_N
I
2N7002KDW 115mA 60V
C5506
0.1uF 10V 10%
X7R
C0402_N
I
R5512
R5513
4.7K
4.7K
5%
5%
R0402_N
R0402_N
I
I
R5534 0R
FAN_SPEED1 30
3/2 Add LID_INT_ADC connect to EC pin35(AD pin)
R9860 0R
R5529 0R
R0402_N
2/24 Change BATT_ID# from pin34 to pin38(Power request)
R10084
100K
1%
R0402_N
I
D2
S2
G2
R10082
20K
1%
R0402_N
I
QT4B
SOT363V
C5507
0.1uF 10V 10%
X7R
C0402_N
I
R5528
R5527
2.2K
2.2K
5%
5%
R0402_N
R0402_N
I
I
IMVP_PCH_PWRGD
I R0402_N 5%
I R0402_N5%
I
5%
WOV_BATT_FUNTION
I
+3P3A_AVCC
C5511
1000pF 50V 10%
X7R
C0402_N
I
C5508
C0402_N
X7R
+V3P3A
0.1uF 10V 10%
I
FB5501
1 2
120ohm 200mA +-25%
L0402
I
C9570
X7R
C0402_N
I
FOR PLL
Charger,Battery,Thermal
R9810 0R
R0402_N
I
R9811 0R
R0402_N
I
R9812 0R
R0402_N
I
R9813 0R
R0402_N
I
5%
5%
5%
5%
IMVP_PCH_PWRGD 7
SM_BAT_CLK 29,43,58,59,66
SM_BAT_DATA 29,43,58,59,66
SM_BAT_CLK_PD 53
SM_BAT_DATA_PD 53
Type-c PD Controller
12/29 power request pull high with EE
BATT
H
L
H
L
+V3P3A +V3P3A
R2015
100K
5%
R0402_N
I
Voltage
0.55V
0.825V
0.354V
3.3V
Miix510
Miix510
Miix510
Jacky
Jacky
Jacky
50 69 Tuesday, July 25, 2017
50 69 Tuesday, July 25, 2017
50 69 Tuesday, July 25, 2017
ADP_I 59
DDI2_HPD 3,53
DDR_PWRGD 61
R5532
10K
5%
R0402_N
I
+V3P3A_EC
R5531
10K
5%
R0402_N
I
V1.0_POK 63
DSP
L
H
H
L
BATT_ID# 58 ALC3290_IRQ 46,47
Project:
Project:
Project:
Engineer:
Engineer:
Size
Size
Size
Title:
Title:
Title:
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
Engineer:
EMBEDDED CONTROLLER
EMBEDDED CONTROLLER
EMBEDDED CONTROLLER
C5502
0.1uF 10V 10%
X7R
C0402_N
I
R9878
100K
5%
R0402_N
I
Rev
Rev
Rev
V01
V01
V01
5
D D
Power switch
Move to IO board
C C
+V3P3A
+V3.3AL
DCIN
4
PWRBTN_IN_N 49
+V3P3A 3,4,5,6,7,9,10,11,23,24,29,31,37,38,42,47,49,50,52,53,56,60,62,65,66,67
+V3.3AL 7,11,50,58,60,66
DCIN 58,59
3
+V3P3A
R4316
100K
5%
R0402_N
I
R9815
EC_PWRBTN_IN_N
PWRBTN_IN_N
TP5000
I
R0402_N
1%
2.2M
RB521C30 100mA 30v
EC_PWR_LATCH_N
3/8 Add test point
A C
CR9044
SOD-923
I
CR4310
RB521C30 100mA 30v
SOD-923
RB521C30 100mA 30v
EC_PWRBTN_IN_N 50
DCIN
EC_PWR_LATCH 50
A C
CR4312
RB521C30 100mA 30v
SOD-923
I
RB521C30 100mA 30v
A C
I
A C
CR9060
SOD-923
I
2
R4322
1M
5%
R0402_N
I
A C
CR4313
SOD-923
I
Q4300
D
2N7002 250mA 60V
sot_323_dgs
S
I
G
R9816
470K
1%
R0402_N
I
V1.8A_REFEN 65
For AC mode S5 power consumption 06/06
+V3.3AL
G
1
3/3 Change R4318 from 150K 1% to 10K 1%
power request
R4318
10K
1%
R0402_N
I
Q4302
D
2N7002 250mA 60V
sot_323_dgs
S
I
C4317
0.22uF 10V 10%
X5R
C0402_N
I
EC_ALW_EN 60
Power LED
B B
A A
Project:
Project:
Project:
Engineer:
Engineer:
Size
Size
Size
Title:
Title:
Title:
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
Engineer:
BUTTON & LED
BUTTON & LED
BUTTON & LED
Miix510
Miix510
Miix510
1
Jacky
Jacky
Jacky
Rev
Rev
Rev
V01
V01
51 69 Tuesday, June 27, 2017
51 69 Tuesday, June 27, 2017
51 69 Tuesday, June 27, 2017
V01
<XR_PAGE_TITLE>
6
3
2 87 54 1
TYPE-C Multiplexer
4
7
10
13
23
26
29
32
28
27
31
30
25
24
34
33
22
21
+V3P3A_MUX
MUX_TYPEC_TXP1_C
MUX_TYPEC_TXN1_C
MUX_TYPEC_TXP2_C
MUX_TYPEC_TXN2_C
MUX_TYPEC_RXP1_C
MUX_TYPEC_RXN1_C
MUX_TYPEC_RXP2_C
MUX_TYPEC_RXN2_C
MUX_TYPEC_SBU1
MUX_TYPEC_SBU2
C4524
0.1uF 10V 10%
X5R
C0402_N
I
1/12 Add 0.22uF 0201 x8pcs
C4528 0.22uF 10V 20%
C4529 0.22uF 10V 20%
C4530 0.22uF 10V 20%
C4531 0.22uF 10V 20%
C4532 0.22uF 10V 20%
C4533 0.22uF 10V 20%
C4534 0.22uF 10V 20%
C4535 0.22uF 10V 20%
C4525
0.1uF 10V 10%
X5R
C0402_N
I
C4526
0.1uF 10V 10%
X5R
C0402_N
I
I X5R C0201_N
I X5R C0201_N
I X5R C0201_N
I X5R C0201_N
I X5R C0201_N
I X5R C0201_N
I X5R C0201_N
I X5R C0201_N
C4527
0.1uF 10V 10%
X5R
C0402_N
I
MUX_TYPEC_TXP1 55
MUX_TYPEC_TXN1 55
MUX_TYPEC_TXP2 55
MUX_TYPEC_TXN2 55
MUX_TYPEC_RXP1 55
MUX_TYPEC_RXN1 55
MUX_TYPEC_RXP2 55
MUX_TYPEC_RXN2 55
MUX_TYPEC_SBU1 55
MUX_TYPEC_SBU2 55
DDI2_AUX_C_DN
DDI2_AUX_C_DP
+V3P3A_MUX
R4528
100K
5%
R0402_N
I
R4529
100K
5%
R0402_N
I
+V3P3A +V3P3A_MUX
D
C
B
A A
SH4568
I
R0402_N
0R
5%
DDI2_TX0_DN 3
DDI2_TX0_DP 3
DDI2_TX1_DN 3
DDI2_TX1_DP 3
DDI2_TX2_DN 3
DDI2_TX2_DP 3
DDI2_TX3_DN 3
DDI2_TX3_DP 3
DDI2_TX0_DN
DDI2_TX0_DP
DDI2_TX1_DN
DDI2_TX1_DP
DDI2_TX2_DN
DDI2_TX2_DP
DDI2_TX3_DN
DDI2_TX3_DP
USB3_P2_WP2_TX_DN 9
USB3_P2_WP2_TX_DP 9
DDI2_AUX_DN 3
DDI2_AUX_DP 3
DDI2_AUX_DN
DDI2_AUX_DP
C4510 0.1uF 10V 10%
I X5R C0402_N
C4511 0.1uF 10V 10%
I X5R C0402_N
C4512 0.1uF 10V 10%
I X5R C0402_N
C4513 0.1uF 10V 10%
I X5R C0402_N
C4514 0.1uF 10V 10%
I X5R C0402_N
C4515 0.1uF 10V 10%
I X5R C0402_N
C4516 0.1uF 10V 10%
I X5R C0402_N
C4517 0.1uF 10V 10%
I X5R C0402_N
C4518 0.1uF 10V 10%
I X5R C0402_N
C4519 0.1uF 10V 10%
I X5R C0402_N
C4508 0.1uF 10V 10%
I X5R C0402_N
C4509 0.1uF 10V 10%
I X5R C0402_N
DDI2_TX0_C_DN
DDI2_TX0_C_DP
DDI2_TX1_C_DN
DDI2_TX1_C_DP
DDI2_TX2_C_DN
DDI2_TX2_C_DP
DDI2_TX3_C_DN
DDI2_TX3_C_DP
USB3_P2_WP2_TX_C_DN
USB3_P2_WP2_TX_C_DP
DDI2_AUX_C_DN
DDI2_AUX_C_DP
MUX_CNTRL_0 53
MUX_CNTRL_1 53
CC_SEL 53
TP4505
USB3_P2_WP2_RX_DP 9
USB3_P2_WP2_RX_DN 9
1
MUX_CNTRL_0
MUX_CNTRL_1
CC_SEL
TP_MUX_A0
DDI2_TX2_C_DP
DDI2_TX2_C_DN
USB3_P2_WP2_TX_C_DP
USB3_P2_WP2_TX_C_DN
DDI2_TX1_C_DP
DDI2_TX1_C_DN
DDI2_TX3_C_DP
DDI2_TX3_C_DN
DDI2_TX0_C_DP
DDI2_TX0_C_DN
DDI2_AUX_C_DP
DDI2_AUX_C_DN
EU4523
MODE
1
CONF2/SDA
38
CONF1/SCL
36
CONF0/A1
35
A0
14
DP2+
5
DP2-
6
TX+
11
TX-
12
DP1+
2
DP1-
3
DP3+
8
DP3-
9
RX+
16
RX-
17
DP0+
39
DP0-
40
AUX+
19
AUX-
20
GND_1
15
18
GND_2
GND_3
37
EXP_GND
41
PI3USB30532ZLE
I
3/2 Change EU4523 footprint from
TQFN40_PH0P4_3X6_H0P75 to qfn40_0p4_3x6_0p8h
VDD_1
VDD_2
VDD_3
VDD_4
VDD_5
VDD_6
VDD_7
VDD_8
TX1+
TX1-
TX2+
TX2-
RX1+
RX1-
RX2+
RX2-
SBU1
SBU2
D
C
B
+V3P3A
87
+V3P3A 3,4,5,6,7,9,10,11,23,24,29,31,37,38,42,47,49,50,51,53,56,60,62,65,66,67
INTERNAL ONLY
BPAGE DRAWING
sky_y_mrd.+V3P3.52
Wed Jun 03 11:23:04 2015
Project:
Project:
Project:
Engineer:
Engineer:
Size
Size
Size
Title:
Title:
Title:
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
VARIANT:
<VARIANT>
3 4
TYPE-C MULTIPLEXER
INTEL
CONFIDENTIAL
2
Engineer:
TYPE-C MULTIPLEXER
TYPE-C MULTIPLEXER
TYPE-C MULTIPLEXER
DOCUMENT_NUMBER
Miix510
Miix510
Miix510
Jacky
Jacky
Jacky
52 69 Tuesday, June 27, 2017
52 69 Tuesday, June 27, 2017
52 69 Tuesday, June 27, 2017
Rev
Rev
Rev
V01
V01
V01
PAGE REV
1P0 H78885 52/57
1 5 6
<XR_PAGE_TITLE>
Type-c PD Controller
+V5P0A +V5P0A_TYPEC_VIN
D
SH4570
0R
I
R0603_N
5%
PD schematic NEED CONFIRM
SM_BAT_DATA_PD 50
SM_BAT_CLK_PD 50
+V_TYPEC_CC2 +V_TYPEC_CC1
SM_BAT_DATA_PD
SM_BAT_CLK_PD
+V3P3_USBPD
R4630
10K
5%
R0402_N
NI
C
+V5P0A_TYPEC_VIN
C4577
4.7uF 6.3V 20%
X5R
C0402_N
I R0402_N 5%
I
ROLE_RESULT_R
C4614
0.1uF 10V 10%
X5R
C0402_N
I
B
USBPD_ID_2
G
ROLE_RESULT
Q4500
D
2N7002 250mA 60V
sot_323_dgs
S
I
R4638 10K
U4542
4
3
VIN
EN
RT9711AGB
CAD NOTE:
sot_23_5
I
FLG*
GND
5
1
2
VOUT
TO BE PLACE CLOSE TO TYPEC CONNECTOR
+V3P3_USBPD
A A
TP4506
TP4507
TP4508
Add the EEPROM
Difference with armour
U9507 package SOT23 change to SOIC8
U9507
1
1
1
1
A0
2
A1
3
A2
4
GND
AT24C32D-SSHM-T
I
87
8
VCC
7
WP
6
SCL
5
SDA
C9571
0.1uF 10V 10%
X5R
C0402_N
I
R9822 0R
R9821 0R
6
R4619 0R
I R0402_N 5%
R4620 0R
I R0402_N 5%
CC_SEL 52
VBUS_TYPEC_IMON 55
VBUS_TYPEC_VSENSE 55
TP4504
DDI2_HPD 3,50
+VBUS_TYPEC +V3P3A
C4570
22uF6.3V20%
X5R
C0603_N
I
C4571
22uF6.3V20%
X5R
C0603_N
I
1/27 Add 22uFx2
I R0402_N 5%
SM_BAT_CLK_PD_R
I R0402_N 5%
SM_BAT_DATA_PD_R
+V5P0A
+V3P3A
+VBUS_TYPEC
SM_BAT_DATA_PD_R
SM_BAT_CLK_PD_R
CC_SEL
VBUS_TYPEC_IMON
VBUS_TYPEC_VSENSE
ROLE_RESULT
SYS_SUSPEND
USBPD_ROLE
TP_HI_CUR
MED_CUR
DDI2_HPD
R4636
100K
5%
R0402_N
I
R4598
100K
5%
R0402_N
I
USB2_P2_WP2_OC_N 9
EU4541
SI0_SDA
2
SI1_SCL
3
CC1
26
CC2
27
CC_SEL
9
DP_IN
12
DM_IN
13
VBUS_IMON
18
VBUS_DC
21
ROLE_RESULT
34
SYS_SUSPEND
35
PD_ROLE
36
SNK_HI_CUR
32
SNK_MD_CUR
33
HPD
6
RSV2
39
TX_RX
19
GND
17
GND
14
EPAD
41
EJ898A
I
PD CONTROLLER I2C ADDR: 0XC0
VDD33
VDD33
VDDC33
VDD33
VDD18
VDD18
VCONN
DP_OUT
DM_OUT
INT_N
GPIO3
RSV1
RSV0
CU_VA_ID_0
CU_VA_ID_1
CU_VA_ID_2
ALT_GPIO0
ALT_GPIO1
ALT_GPIO2
ALT_GPIO3
ALT_GPIO4
23
38
24
11
10
22
25
15
16
7
8
28
20
37
40
1
29
30
31
4
5
+VCONN_USBPD
USBPD_INT_N
USBPD_GPIO3
USBPD_ID_0
USBPD_ID_1
USBPD_ID_2
MUX_CNTRL_0
MUX_CNTRL_1
The mos need to confirm
SYS_SUSPEND
USBPD_ROLE
+V5P0A 10,11,23,37,39,40,42,60,61,62,63,65
+V3P3A 3,4,5,6,7,9,10,11,23,24,29,31,37,38,42,47,49,50,51,52,56,60,62,65,66,67
+VBUS_TYPEC 55
3
+V3P3_USBPD
+V1P8_USBPD
C4587
1uF 6.3V 10%
X5R
C0402_N
I
C4613
10uF 6.3V 20%
X5R
C0603_N
I
C4588
1uF 6.3V 10%
X5R
C0402_N
I
C4583
10uF 6.3V 20%
X5R
C0603_N
I
USBPD_INT_N 50
R4579
R4580
10K
10K
5%
5%
R0402_N
R0402_N
I
1
TP4501
1
TP4502
MUX_CNTRL_0 52
MUX_CNTRL_1 52
I
+V5P0A_TYPEC_VIN
C4572
1uF 16V 10%
X5R
C0402_N
I
Add the below circuit to support Apple Type C 3in1 Hub
R9817
100K
5%
R0402_N
I
+V_TYPEC_CC2
R9818
10K
5%
R0402_N
I
+V_TYPEC_CC1
G
G
3 4
PJA3411 -3.1A -20V
D
S
PJA3411 -3.1A -20V
Q8207
D
2N7002 250mA 60V
sot_323_dgs
S
I
Q8205
D
G
1
sot_23
Q8208
2N7002 250mA 60V
sot_323_dgs
I
S
2 87 54 1
+V3P3A
R4586 5.1R
I R0402_N 5%
+VCONN_USBPD_PLT +VCONN_USBPD
U4540
OUT
IN
5
EN
4
WS4601E-5/TR
Q8204
D
G
1
sot_23
2 3
I
Size
Size
Size
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
1
FLG*
3
GND
2
sot_23_5
I
S
2 3
R9819
100K
5%
R0402_N
I
I
R9820
100K
5%
R0402_N
I
Project:
Project:
Project:
Engineer:
Engineer:
Title:
Title:
Title:
2
Engineer:
TYPE-C PD CONTROLLER
TYPE-C PD CONTROLLER
TYPE-C PD CONTROLLER
R9814 0R
+VCONN_USBPD
I R0402_N 5%
Miix510
Miix510
Miix510
Jacky
Jacky
Jacky
53 69 Tuesday, June 27, 2017
53 69 Tuesday, June 27, 2017
53 69 Tuesday, June 27, 2017
1 5 6
C4578
10uF 10V 20%
X5R
C0603_N
I
Rev
Rev
Rev
V01
V01
V01
D
C
B
<XR_PAGE_TITLE>
6
3
2 87 54 1
D
C
B
D
C
B
A A
Project:
Project:
87
Project:
Engineer:
Engineer:
Size
Size
Size
Title:
Title:
Title:
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
3 4
2
Engineer:
TYPE-C BOOST VR
TYPE-C BOOST VR
TYPE-C BOOST VR
Miix510
Miix510
Miix510
Jacky
Jacky
Jacky
Rev
Rev
Rev
V01
V01
54 69 Tuesday, June 27, 2017
54 69 Tuesday, June 27, 2017
54 69 Tuesday, June 27, 2017
V01
1 5 6
<XR_PAGE_TITLE>
6
3
2 87 54 1
TYPE-C Connector
+VBUS_TYPEC
D
R4533
39K
1%
R0402_N
I
R4534
3.01K
1%
R0402_N
I
VBUS_TYPEC_SENSE_N
R4530
39K
1%
R0402_N
I
VBUS_TYPEC_IMON
VBUS_TYPEC_VSENSE
R4531
3.01K
1%
R0402_N
I
C9576
10nF 50V 10%
X7R
C0402_N
I
VBUS_TYPEC_SENSE_P
C
USB2_P2_WP2_DP 9
USB2_P2_WP2_DN 9
B
MUX_TYPEC_TXP1 52
MUX_TYPEC_TXN1 52
MUX_TYPEC_RXP1 52
MUX_TYPEC_RXN1 52
MUX_TYPEC_TXP2 52
A A
MUX_TYPEC_TXN2 52
MUX_TYPEC_RXP2 52
MUX_TYPEC_RXN2 52
+VBUS_TYPEC
+VBUS_TYPEC 53
87
C9575
10nF 50V 10%
X7R
C0402_N
I
MUX_TYPEC_TXP1
MUX_TYPEC_TXN1
MUX_TYPEC_RXP1
MUX_TYPEC_RXN1
MUX_TYPEC_TXP2
MUX_TYPEC_TXN2
MUX_TYPEC_RXP2
MUX_TYPEC_RXN2
0.010
I
CH
1%
R4618
2
1
1
0805
VBUS_TYPEC_IMON 53
VBUS_TYPEC_VSENSE 53
1
3
334
2
2
4
4
C4502
1uF 16V 10%
X5R
C0402_N
I
1 2
CR4561
AZ5725-01F.R7GR 1uA 5V
R4599 3.3R
I R0402_N 1%
L4500
B1 B2
A1 A2
67ohm 320mA +-25%
CO-CH_L4_PH0P8_H1_AB
R4617 3.3R
I R0402_N 1%
R9788 3.3R
I R0402_N 1%
L4559 67ohm 320mA +-25%
A1 A2
B1 B2
R9789 3.3R
I R0402_N 1%
R9790 3.3R
I R0402_N 1%
L4557
A1 A2
B1 B2
R9791 3.3R
I R0402_N 1%
R9792 3.3R
I R0402_N 1%
L4560 67ohm 320mA +-25%
A1 A2
B1 B2
R9793 3.3R
I R0402_N 1%
R9794 3.3R
I R0402_N 1%
L4558 67ohm 320mA +-25%
A1 A2
B1 B2
R9795 3.3R
I R0402_N 1%
DFN1006p2x
I
NI
NI
NI
67ohm 320mA +-25%
NI
NI
+V_TYPEC_CC1
1 2
CR4564
AZ5825-01F 1uA 5V
ESD0402
I
USB2_P2_WP2_DP_CONN
USB2_P2_WP2_DN_CONN
MUX_TYPEC_TXP1_CONN
MUX_TYPEC_TXN1_CONN
MUX_TYPEC_RXP1_CONN
MUX_TYPEC_RXN1_CONN
MUX_TYPEC_TXP2_CONN
MUX_TYPEC_TXN2_CONN
MUX_TYPEC_RXP2_CONN
MUX_TYPEC_RXN2_CONN
MUX_TYPEC_SBU1 52
1 2
R4507
1M
5%
R0402_N
I
CR4567
AZ5725-01F.R7GR 1uA 5V
DFN1006p2x
I
+VBUS_TYPEC_CONN
MUX_TYPEC_TXP1_CONN
MUX_TYPEC_TXN1_CONN
USB2_P2_WP2_DP_CONN
USB2_P2_WP2_DN_CONN
MUX_TYPEC_SBU1
MUX_TYPEC_RXN2_CONN
MUX_TYPEC_RXP2_CONN
MUX_TYPEC_TXN2_CONN
MUX_TYPEC_TXP2_CONN
MUX_TYPEC_RXP2_CONN
MUX_TYPEC_RXN2_CONN
MUX_TYPEC_RXN1_CONN
MUX_TYPEC_RXP1_CONN
MUX_TYPEC_TXP1_CONN
MUX_TYPEC_TXN1_CONN
USB2_P2_WP2_DP_CONN
USB2_P2_WP2_DN_CONN
AZ5725-01F.R7GR 1uA 5V
CR4556
DFN1006p2x
CIS ok
JTYPEC1
55912-0240Y-101
GND_1
A1
A2
SSTXp1
SSTXn1
A3
VBUS_1
A4
CC1
A5
A6
Dp1
Dn1
A7
RFU1
A8
VBUS_2
A9
SSRXn2
A10
SSRXp2
A11
GND_2
A12
GND_5
G1
GND_6
G2
GND_7
G3
GND_8
G4
GND_9
G5
GND_10
G6
I
1
I/O1
2
I/O2
1
I/O1
2
I/O2
1 2
1 2
CR4568
AZ5725-01F.R7GR 1uA 5V
DFN1006p2x
I
I
3 4
B12
GND_4
SSRXp1
SSRXn1
VBUS_4
RFU2
CC2
VBUS_3
SSTXn2
SSTXp2
GND_3
9NC10
9NC10
B11
B10
B9
B8
B7
Dn2
B6
Dp2
B5
B4
B3
B2
B1
NC
GND
8
NC
GND
8
MUX_TYPEC_RXP1_CONN
MUX_TYPEC_RXN1_CONN
MUX_TYPEC_SBU2
USB2_P2_WP2_DN_CONN
USB2_P2_WP2_DP_CONN
MUX_TYPEC_TXN2_CONN
MUX_TYPEC_TXP2_CONN
CR9014
6NC7
NC
4
I/O3
5
I/O4
GND
3
6NC7
NC
GND
3
Size
Size
Size
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
CR9015
AZ1045-04F.R7G
lcc10_ns_2p5x1p0_p65h
I
4
I/O3
5
I/O4
AZ1045-04F.R7G
lcc10_ns_2p5x1p0_p65h
I
Title:
Title:
Title:
TYPE-C CONNECTOR
TYPE-C CONNECTOR
TYPE-C CONNECTOR
2
+V_TYPEC_CC2
1 2
Project:
Project:
Project:
Engineer:
Engineer:
Engineer:
CR4563
AZ5825-01F 1uA 5V
ESD0402
I
MUX_TYPEC_SBU2 52
R4505
1M
I
5%
1 2
R0402_N
Miix510
Miix510
Miix510
Jacky
Jacky
Jacky
55 69 Tuesday, July 11, 2017
55 69 Tuesday, July 11, 2017
55 69 Tuesday, July 11, 2017
1 5 6
CR4566
DFN1006p2x
I
AZ5725-01F.R7GR 1uA 5V
Rev
Rev
Rev
V01
V01
V01
D
C
B
<XR_PAGE_TITLE>
6
3
2 87 54 1
+V3P3A
D
R9720
R9721
49.9K
49.9K
1%
1%
R0402_N
R0402_N
I
UART2_TXD 8
UART2_RXD 8
+V3P3A
+1.8V_PRIM
C
+V3P3A 3,4,5,6,7,9,10,11,23,24,29,31,37,38,42,47,49,50,51,52,53,60,62,65,66,67
+1.8V_PRIM 7,10,11,31,39,40,44,47,65
R9856 0R
R9857 0R
I R0402 5%
I R0402 5%
I
+1.8V_PRIM
UART2_TXD_R
UART2_RXD_R
Shielding
I
I
I
I
CLIP2
Z00L-4G7U1-11000
pbzjz_4x1_3p
11223
3
CLIP10
Z00L-4G7U1-11000
pbzjz_4x1_3p
11223
3
CLIP18
Z00L-4G7U1-11000
pbzjz_4x1_3p
11223
3
CLIP26
Z00L-4G7U1-11000
pbzjz_4x1_3p
11223
3
CLIP1
Z00L-4G7U1-11000
pbzjz_4x1_3p
11223
3
CLIP9
Z00L-4G7U1-11000
B
A A
pbzjz_4x1_3p
11223
3
CLIP17
Z00L-4G7U1-11000
pbzjz_4x1_3p
11223
3
CLIP25
Z00L-4G7U1-11000
pbzjz_4x1_3p
11223
3
I
I
I
I
CLIP3
Z00L-4G7U1-11000
pbzjz_4x1_3p
11223
3
CLIP11
Z00L-4G7U1-11000
pbzjz_4x1_3p
11223
3
CLIP19
Z00L-4G7U1-11000
pbzjz_4x1_3p
11223
3
CLIP27
Z00L-4G7U1-11000
pbzjz_4x1_3p
11223
3
I
I
I
I
CLIP4
Z00L-4G7U1-11000
pbzjz_4x1_3p
11223
3
CLIP12
Z00L-4G7U1-11000
pbzjz_4x1_3p
11223
3
CLIP20
Z00L-4G7U1-11000
pbzjz_4x1_3p
11223
3
CLIP28
Z00L-4G7U1-11000
pbzjz_4x1_3p
11223
3
1/13 copy 11.6" NB Shielding
3/9 Del Z000-4G7U1-11000(CLIP1~CLIP24),
add Z00L-4G7U1-11000(CLIP1~CLIP32)
I
I
I
I
CLIP5
Z00L-4G7U1-11000
I
pbzjz_4x1_3p
11223
3
CLIP13
Z00L-4G7U1-11000
I
pbzjz_4x1_3p
11223
3
CLIP21
Z00L-4G7U1-11000
I
pbzjz_4x1_3p
11223
3
CLIP29
Z00L-4G7U1-11000
I
pbzjz_4x1_3p
11223
3
CLIP6
Z00L-4G7U1-11000
I
pbzjz_4x1_3p
11223
3
CLIP14
Z00L-4G7U1-11000
I
pbzjz_4x1_3p
11223
3
CLIP22
Z00L-4G7U1-11000
I
pbzjz_4x1_3p
11223
3
CLIP30
Z00L-4G7U1-11000
I
pbzjz_4x1_3p
11223
3
CLIP7
Z00L-4G7U1-11000
pbzjz_4x1_3p
11223
CLIP15
Z00L-4G7U1-11000
pbzjz_4x1_3p
11223
CLIP23
Z00L-4G7U1-11000
pbzjz_4x1_3p
11223
CLIP31
Z00L-4G7U1-11000
pbzjz_4x1_3p
11223
+V3P3A
R9858
0R
R0402
5%
I
R9859
0R
R0402
5%
I
+V3P3A_UART
+V1P8A_UART
6
6
5
5
4
4
3
3
2
2
1
1
CIS ok
G1
JUART1
40506W90-6PA-SHLOATCR
SH1
CON_FPC6p_PH0P5_H1P2_50696
NI
2/24 SIV:JUART1 uninstall
SH2
DEBUGCONN
G2
Holes
HOLE1
CLIP8
Z00L-4G7U1-11000
I
3
I
3
I
3
I
3
I
pbzjz_4x1_3p
11223
3
CLIP16
Z00L-4G7U1-11000
I
pbzjz_4x1_3p
11223
3
CLIP24
Z00L-4G7U1-11000
I
pbzjz_4x1_3p
11223
3
CLIP32
Z00L-4G7U1-11000
I
pbzjz_4x1_3p
11223
3
thc217d138
NI
PTH
1
HOLE8
thc217d138
NI
PTH
1
HOLE13
THC188D118
I
PTH
1
HOLE2
thc217d138
NI
PTH
1
HOLE14
THC188D118
I
PTH
1
HOLE3
thc217d138
NI
PTH
1
HOLE11
TH71N-PTH
NI
PTH
1
HOLE15
THC188D118
I
PTH
1
HOLE4
thc217d138
NI
PTH
1
3/2 HOLE13,HOLE14,HOLE15 Change Standoff footprint from
TH4P8D2P5 to thc200d124
3/4 HOLE13,HOLE14,HOLE15 Change Standoff footprint from
thc200d124 to THC188D124,layout request
3/14 HOLE13,HOLE14,HOLE15 Change Standoff footprint from
THC188D124 to THC188D118,layout request
HOLE5
thc217d138
NI
PTH
1
HOLE9
TH71X110N-PTH
NI
PTH
1
HOLE6
thc217d138
NI
PTH
1
HOLE12
TH71X110N-PTH
NI
PTH
1
HOLE7
thc217d138
NI
PTH
1
5/5 footprint pbzjz_4x1_3p change to SHEILDING_CASE_3P_0P8X4,SMT request
D
C
B
87
INTERNAL ONLY
BPAGE DRAWING
sky_y_mrd.GND
Wed Jun 03 11:23:06 2015
Project:
Project:
Project:
Engineer:
Engineer:
Size
Size
Size
Title:
Title:
Title:
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
3 4
2
Engineer:
UART CONN & HOLE & CLIP
UART CONN & HOLE & CLIP
UART CONN & HOLE & CLIP
Miix510
Miix510
Miix510
Jacky
Jacky
Jacky
Rev
Rev
Rev
V01
V01
56 69 Tuesday, June 27, 2017
56 69 Tuesday, June 27, 2017
56 69 Tuesday, June 27, 2017
V01
1 5 6
SDV=>SIV
2/2 Page04 Add Rsv RM97,RM98 for 16Gb memory(BG1)
2/2 Page04 Add (4Gb 8Gb) & (16Gb) BOM option table
2
/2 Page19,20 Memory pin M9 connect to CPU BG1
2/24 Page10 UC6,UC7 pin9 connect GND,need change to +1.0V_PRIM (HW issue)
2/24 Page07 Add R1042,VR_PWRGD connect to IMVP_PCH_PWRGD,SOC and EC (HW issue)
2/24 Page56 Delete JUART1,Debug conn
2/24 Page24 Delete @U3002,SPI ROM conn
2/24 Page50 Change BATT_ID# from
2/24 Page50 Change LID_INT_N from pin38 to pin34
3/2 Page05 R9863 change to NI,THERMAL HW shutdown
3/2 Page08 Change memory ID PU from +1.8V_PRIM to +3V_PRIM
3/2 Page37 ME_Flash_EN connect to R9881
3/2 Page50 Add LID1 & LID2 function,add QT2,QT3,R9893,R9894,R9895,R9896,R9897
3/2 Page56 HOLE13,HOLE14,HOLE15 Change Standoff footprint from TH4P8D2P5 to thc200d124
3/2 Page52 Change EU4523 footprint from TQFN40_PH0P4_3X6_H0P75 to qfn40_0p4_3x6_0p8h
3/3 Page51 Change R4318 from 150K 1% to 10K 1%,power request
3/3 Page50 Change EC_CHARGER_EN to pin61(pin61 can outpin)
3/4 Page56 hange Standoff footprint from thc200d124 to THC188D124(layout request)
3/7 Page19,20 Add RM99,RM100 0ohm to GND,for 4/8 Gb memory
3/7 Page38 +1.8V_PRIM change to +V3P3SX,and add R8020,close +V3P3SX leakage
3/7 Page30 R9847 connect to +V5P0S,change to +V3P3SX
3/7 Page07 Del R1088,Add R9865 , HW_ID SIV
3/7 Page44 R4430 install
3/8 Page06 Del RCAM_PD_N offpage,add TP1061
3/8 Page39 JREAR1 pin8 change to NC,pin11 change to RCAM_RST_N,delete RCAM_PD_N
3/8 Page08 Change WWAN_SAR_DET from BA7 to AD11(Group F is 1.8V)
3/8 Page08 Change R1094 from 100K to 0ohm,Del R1095 120K,can use HUAWEI module
3/8 Page51 Add TP5000,close to PWRBTN_IN_N
3/9 Page26 Del R4202,R4203,don't Co-lay PCIE12 RX
3/9 Page11 Del RC429,don't connect to BATT_RTC
3/9 Page56 Del Z000-4G7U1-11000(CLIP1~CLIP24),add Z00L-4G7U1-11000(CLIP1~CLIP32)
3/10 Page07 Change Y1000 from seiko to HOSONIC
3/10 Page07 C1251,C1252 from 18pF to 12pF,HOSONIC request
3/10 Page07 C1249,C1250 from 22pF to 8.2pF,HOSONIC request
3/11 All ESD part,ESDL0402-05 Born change to AZ5725-01F.R7GR Amazing;
ESD5344D Willse change to AZ1045-04F.R7G Amazing
3/14 Page56 HOLE13,HOLE14,HOLE15 Change Standoff footprint from
THC188D124 to THC188D118,layout request
3/14 Page42 Change U9001.3 from +V5P0A to SLP_S4_N
3/14 Page15 Add CC390,CC391 reserved,Power request
3/15 Page37 Add CR9046,CR9047 reserved,EMC request
3/15 Page07 R9889,R9890 move to page43,RF reque
3/16 Page26 Add SSD(PCIE or SATA) BOM option table
3/18 Page06 Add TP1061
3/18 Page39 Update REAR CAMERA pindefine(Use ov5648 Rear camera module)
3/18 Page40 Add DVDD_1.5V solution(ov5648 Rear camera module need)
3/18 Page37 Add R8212 PU +V3P3SX_TOUCH,for TOUCH_PANEL_INT_N
3/21 Page07 Change C1251,C1252 from 12pF to 15pF,hosonic & seiko share
3/22 Page36 FB8200 0603 Bead change to JP8200 JUMP_43X79,for EDP VBAT
3/23 Page36 Add Q8200,Q8201,R8200,R8201,R8202,R8203,C8219,C8220,C8221,C8222,C8223, for Panel power
3/24 Page50 Add R9898 0ohm reserved,connect to EDP_VDD_EN_R
pin34 to pin38[ADC pin] (Power request)
st
SIT=>SIT2
Page38 R8014 install,SAR_PROX_INT need PU
Page38 Del JSAR1,JSAR2 416990534200,del R8008 0ohm,del TP8002; add JSAR1 conn 416990528900,RF request
Page44 Del C4418,C4419,C4420,C4421 100u,add C4422,C4423(NI)
SIT2=>SVT
5/30 Page07 HW_ID3 add SAR sensor to decide on,driver request
5/30 Page07 Del R1088,add R9865,for SVT phase
6/6 Page51 Del LED1 for SVT phase
6/20 Page40 Y8500 24MHZ +/- 10PPM change to 19.2MHZ +/- 25PPM,Intel request
6/21 Page38 Reserve R8021,R8022 0ohm, ISH I2C to SAR sensor
6/24 Page38 SAR_PROX_RST add R8023 PU,RF request
6/24 Page08 SAR_PROX_RST,reserved R1096 connect to GPP_A12,add R1095 connect to GPP_A22,BIOS request
6/27 Page43 R4325,R4326 change to NI,because WLAN card "Intel 2x2AC 8260" I2C is 1.8V,mother board I2C is 3.3V
150uF,close power nosic solution
SIV=>SIT
4/21 Page36 Del R9771,R9772,R9773,R9774,R9775,R9776 0ohm;L9505,L9506,L9507 common choke,RF request
4/21 Page43 Add SM_BAT_DATA connect to JWLAN1.58,Add SM_BAT_CLK connect to JWLAN1.60,Debug card need.
4/21 Page43 Add R4325,R4326 0ohm for Debug card
4/21 Page07 Del R9865,R1089,add R1088,R9866,for HW_ID SIT
4/28 Page38 U8002 G2129BAE1U change to G3401A91G,4bit=>2bit
5/4 Page09 WIFI PCIE port 8 change to port 4,because PCH HSIO 8 can use PCIe interface (for Base-U)
5/9 Page50 EC_CHARGER_EN change to EC_KBRST#,connect to SOC pin AW13(RCIN)
5/9 Page05 EC_KBRST# Add PU R1066 10Kohm +V3P3SX
5/10 Page50 Del R9898,Del net EDP_VDD_EN_R offpage
5/10 Page06 Del TP1055,TP1056,TP1057,TP1058,TP1059,TP1060,TP1016,TP1017,MIPI defferential don't test point
5/12 Page37 EMC:CR9046,CR9047 install
5/16 Page23 EMC reserved C2309,C2310,C2311,C2312,C2313,C2314,C2315,C2316,C2317
5/23 Page37 R9881 uninstall,BIOS request
5/23 Page06 R9848 install,BIOS request
Project:
Project:
Project:
Engineer:
Engineer:
Size
Size
Size
Title:
Title:
Title:
C
C
C
Date: Sheet of
Date: Sheet of
Date: Sheet of
Engineer:
HW Change list
HW Change list
HW Change list
Miix510
Miix510
Miix510
Jacky
Jacky
Jacky
57 69 Tuesday, June 27, 2017
57 69 Tuesday, June 27, 2017
57 69 Tuesday, June 27, 2017
Rev
Rev
Rev
V01
V01
V01
5
1 1
4
3
2
1
58: DC-IN & BATTERY CONNECTOR
BATT+
D5801
1N4148WS200mA100V
SOD_323
I
2 2
+V3.3AL
R5804
47K
1%
R0402_N
BATT_ID# 50
I
SM_BAT_CLK 29,43,50,59,66
SM_BAT_DATA 29,43,50,59,66
0504 Update
R5803
100R
R0402_N
I
R5802
100R
R0402_N
I
R5801
100R
R0402_N
I
5%
5%
5%
BATT_CLK
BATT_DAT
BATT_TS
5A
12
1
1
SH311SH4
2
2
3
3
4
4
5
5
6
6
7
7
8
8
CN5801
SH19SH2
WS33081‐S0201‐HF
wtb_8p_1d25_h2d0_dip
10
I
BATT+
+V3.3AL
DCIN
BATT+ 59
+V3.3AL 7,11,50,51,60,66
DCIN 51,59
3 3
W-JA03303-0A00
dc_jack_5p_8099h5p8mm_n
4 4
5
4
3
4
CN5802
1
4
Pin+
3
SHUNT
2
TIP-
5
5
I
3A
DCIN
C5801
0.1uF 25V 10%
X7R
C0603
I
2
Project:
Project:
Project:
Engineer:
Engineer:
Size
Size
Size
Title:
Title:
Title:
C
C
C
Date: Sheet of
Date: Sheet of
Date: Sheet of
Engineer:
DCIN/BATT CONN
DCIN/BATT CONN
DCIN/BATT CONN
Miix510
Miix510
Miix510
Frank
Frank
Frank
58 69 Saturday, August 12, 2017
58 69 Saturday, August 12, 2017
1
58 69 Saturday, August 12, 2017
Rev
Rev
Rev
V01
V01
V01
5
4
3
2
1
59: BATTERY CHARGER
D D
Q5901
DMG7430LFG10.5A30V
DCIN
DCIN_L CHG_VAD
3A
R5903
0.01R
1%
R1206
1%
5%
R5916
0R
5%
R0402
I
R5917
0R
5%
R0402
I
5/8 change
C5915
1uF6.3V10%
X5R
C0402_N
I
R5904
560K
1%
R0402_N
I
C5905
1000pF 50V 10%
X7R
C0402
I
R5913
10K
R0402_N
I
C5902
0.1uF 25V 10%
X7R
C0603
I
C C
B B
BATT+
SM_BAT_DATA 29,43,50,58,66
SM_BAT_CLK 29,43,50,58,66
ACPRES 7,50
ADP_I 50
EC_CHARGER_EN
R5901
22K
5%
R0402_N
I
1
3
CHG_VAC+_10
2
D5901
BAT54C200mA30V
SOT_23
I
R5907
86.6K
R0402_N
I
R5910
20R
R0603_N
I
JS5901
SHORT PAD
0.65X0.65
1 2
NOBOM
C5912
0.47uF25V10%
X7R
C0603_N
I
1%
I
powerpak5_1212_1p12
I
D
C5918
1000pF 50V 10%
X7R
C0402
NI
JS5902
SHORT PAD
0.65X0.65
1 2
NOBOM
CHG_TRVL_DCINDIV_10
C5914
1000pF 50V 10%
X7R
C0402
I
R5914
10R
5%
R0402_N
I
SGND_CHG
S
G
CHG_PA+_10
R5908
0R
R0603_N
I
CHG_PA_10
CHG_IACM_10
CHG_IACP_10
CHG_VAAC_10
CHG_SDA
CHG_SCL
CHG_IAC_10
C5916
47pF50V5%
NPO
C0402_N
I
C5906
0.1uF 25V 10%
X7R
C0603
NI
5%
10
PA
2
IACM
3
IACP
37
ADDIV
40
VAC
8
SDA
7
SCL
36
ACAV
1
IOUT
R5915
100K
R0402_N
I
5%
15
COMP
CEN
9
4
CHG_COMP_10
SGND_CHG
R5912
0R
R0402_N
I
CHG_COMP_RC_10
C5917
47nF16V10%
X7R
C0402_N
I
SGND_CHG
R5905
15K
5%
R0402_N
I
6
12
25
VAD111VAD313VAD414VAD5
VAD2
VSYS1
U5901
OZ8690LN
QFN40_5X5X1_0P4_G2
I
GNDA1
5
GNDA2
GNDA_PAD
35
42
2
112
JP5905
SHORT PAD
1.5X0.75
NOBOM
GNDP128GNDP229GNDP3
5%
C5919
10uF 25V 20%
X5R
LX_PAD
NC
VBATT5
VBATT4
VBATT3
VBATT2
VBATT1
C0603_N
20
19
18
17
16
27
LX1
33
LX2
34
LX3
41
CHG_BST
26
BST
32
VDDP
CHG_VDDP_20
C5913
4.7uF 10V 10%
X5R
C0603
I
SGND_CHG
43
VSYS221VSYS322VSYS423VSYS524VSYS6
VSYS_PAD
ICHP38ICHM
30
39
DCIN
+VSYS
BATT+
31
CHG_ICHP_10
CHG_ICHM_10
C5904
1uF 25V 10%
X5R
C0603_N
NI
I
C0603_N
+VSYS
C5908
X7R
R5930
4.7R
5%
R0603
I
2
DCIN 51,58
+VSYS 36,60,61,63,67
BATT+ 58
C5903
10uF 25V 20%
X5R
C0603_N
I
20170515 by Justice
C5920
1uF 25V 10%
X5R
C0603_N
NI
CHG_LX_30
0.47uF25V10%
C5907
2.2nF50V5%
X7R
C0603_N
I
CHG_BST_R
CHG_SNB_20
I
R5911
2.2R
R0805_N
I
3
D5902
BAT54C200mA30V
1
SOT_23
I
L5901
4.7uH 5.5A +/-20%
LCHK_6P6x6P6x3_5P35
I
C5909
10uF 25V 20%
X5R
C0603_N
5%
I
20170515 by Justice
CHG_VOUT_S
C5910
10uF 25V 20%
X5R
C0603_N
I
R5909
0.01R
R1206
I
JS5903
SHORT PAD
0.65X0.65
1 2
NOBOM
1%
1 2
5A
C5921
0.1uF 25V 10%
X7R
C0603
I
JS5904
SHORT PAD
0.65X0.65
NOBOM
BATT+
A A
Project:
Project:
Project:
Miix510
Miix510
Miix510
Frank
Frank
Engineer:
Engineer:
Size
Size
Size
Title:
Title:
Title:
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
Engineer:
Charger
Charger
Charger
Frank
1
Rev
Rev
Rev
V01
V01
V01
59 69 Wednesday, August 16, 2017
59 69 Wednesday, August 16, 2017
59 69 Wednesday, August 16, 2017
5
4
3
2
1
60: +V5P0A / +V3P3A POWER SUPPLY
+VSYS
D D
R6001
2R2
5%
R0402_N
I
JP6001
JUMP
JUMP_43X118
NOBOM
+VSYS
C C
B B
A A
1 2
+
C6005
33uF 25V 20%
cap_7p3X4p3_h1p9
NI
+VSYS
5
JP6003
JUMP
JUMP_43X118
NOBOM
1 2
+
C6040
33uF 25V 20%
cap_7p3X4p3_h1p9
NI
C6001
1uF 25V 10%
X5R
C0603_N
NI
C6033
1uF 25V 10%
X5R
C0603_N
NI
V3.3A_VSYS
C6002
10uF 25V 20%
X5R
C0603_N
NI
20170515 by Justice
C6034
1uF 25V 10%
X5R
C0603_N
NI
20170515 by Justice
C6037
1uF 25V 10%
X5R
C0603_N
NI
C0603_N
C6019
1uF 25V 10%
X5R
C0603_N
NI
C6003
10uF 25V 20%
X5R
I
C6035
10uF 25V 20%
X5R
C0603_N
I
C0603_N
C0603_N
C6020
10uF 25V 20%
X5R
I
C6038
10uF 25V 20%
X5R
I
C0603_N
C0603_N
+V5A_+V3.3A_PWRGD 11,50,60
4
C6004
10uF 25V 20%
X5R
I
C6036
10uF 25V 20%
X5R
I
+V3.3AL
V3.3A_V5A_EN
C6007
0.1uF 25V 10%
X5R
C0402_N
I
V3.3A_V5A_EN
C6023
4.7uF 10V 10%
X5R
C0603
I
11
V5A_LDO
+V5A_+V3.3A_PWRGD
11
+V3.3AL
1
4
6
1
4
6
R6010
100K
R0402
I
VIN
NC
EN
LDO
VIN
CLK
EN
LDO
5%
V5A_BST
8
12
BST
VCC
9
V5A_VCC
V3.3A_BST
8
BST
VCC
9
V3.3A_VCC
SW
VOUT
PGND
AGND
C6008
1uF 10V 10%
X5R
C0402
I
R6006
2R2
R0402_N
I
SW
VOUT
PGND
AGND
C6024
1uF 10V 10%
X5R
C0402
I
ENLDO
U6001
NB679GD
QFN12_PH0P5_2X3_H1
I
PG
3
12
ENCLK
U6002
NB680GD
QFN12_PH0P5_2X3_H1
I
PG
3
7
5
2
10
5%
7
5
2
10
V5A_BST_R
C6006
0.22uF 25V 20%
X5R
C0402_N
I
V5A_OUT
C6009
0.1uF 10V 10%
X5R
C0402
I
1
JP6005
1
SHORT PAD
2
NOBOM
2
60X30Mil
V3.3A_BST_R
C6022
0.22uF 25V 20%
X5R
C0402_N
I
V3.3A_OUT
C6025
0.1uF 10V 10%
X5R
C0402
I
1
JP6006
1
SHORT PAD
2
NOBOM
2
60X30Mil
3
V5A_SW
5V_AGND
V3.3A_SW
3.3V_AGND
L6001
1.5uH 9.5A 20%
SML6673_H3
I
1 2
R6003
2.2R
5%
R0805
NI
C6031
2.2nF 50V 5%
X7R
C0603
NI
L6002
1.5uH 9.5A 20%
SML6673_H3
I
1 2
R6007
2.2R
5%
R0805
NI
C6032
2.2nF 50V 5%
X7R
C0603
NI
C6010
22uF6.3V20%
X5R
C0603_N
I
C6015
22uF6.3V20%
X5R
C0603_N
I
SHUTDOWN# 29
EC_ALW_EN 51
SLP_S4#_3R_PWR 61,62
SLP_S3#_3R_PWR 61
SLP_S3_N 7,10,50
+V5A_+V3.3A_PWRGD_R 65
+V5A_+V3.3A_PWRGD 11,50,60
+1.8V_PWRGD_R 63
+1.8V_PWRGD 65
C6026
22uF6.3V20%
X5R
C0603_N
I
SLP_S4_N 7,10,42,47,50
C6011
22uF6.3V20%
X5R
C0603_N
I
C6016
22uF6.3V20%
X5R
C0603_N
I
+V3.3AL
+V5P0A
+V3P3A
C6027
22uF6.3V20%
X5R
C0603_N
I
R6011
0R
5%
R0402
I
R6008
100R
1%
R0402_N
I
R6016
1K
5%
R0402
I
R6018
1K
5%
R0402
I
R6020
1K
5%
R0402
I
R6022
1K
5%
R0402
I
2
C6012
22uF6.3V20%
X5R
C0603_N
I
C6017
22uF6.3V20%
X5R
C0603_N
I
C6028
22uF6.3V20%
X5R
C0603_N
I
KBC_PWR_ON_PWR
V3.3A_OUT
R6009
10K
R0402_N
I
R6015
0R
R0402
NI
R6017
0R
R0402
NI
R6019
0R
R0402
NI
R6021
0R
R0402
NI
+VSYS 36,59,61,63,67
+V3.3AL 7,11,50,51,58,66
+V5P0A 10,11,23,37,39,40,42,53,61,62,63,65
+V3P3A 3,4,5,6,7,9,10,11,23,24,29,31,37,38,42,47,49,50,51,52,53,56,62,65,66,67
JP6002
JUMP
JUMP_43X118
NOBOM
V5A_OUT
C6013
22uF6.3V20%
X5R
C0603_N
I
C6018
22uF6.3V20%
X5R
C0603_N
I
JP6004
JUMP
JUMP_43X118
NOBOM
1 2
1 2
Imax=6A
+V3P3A
+V5P0A
Imax=6A
V3.3A_V5A_EN
R6012
0R
5%
R0402
I
R6014
1%
0R
5%
R0402
NI
5%
5%
5%
5%
Date: Sheet of
Date: Sheet of
Date: Sheet of
C6030
100pF 50V 5%
NPO
C0402
NI
+V3.3AL
Project:
Project:
Project:
Engineer:
Engineer:
Size
Size
Size
Title:
Title:
Title:
C
C
C
Engineer:
System Power
System Power
System Power
1
Miix510
Miix510
Miix510
Frank
Frank
Frank
Rev
Rev
Rev
V01
V01
V01
60 69 Saturday, August 12, 2017
60 69 Saturday, August 12, 2017
60 69 Saturday, August 12, 2017
5
D D
4
3
2
1
61: DDR POWER SUPPLY
JP6102
JUMP
43X39
NOBOM
BST
PGND3
28
VLDOIN
PGND2
13
C6102
10uF 6.3V 20%
X5R
C0603
I
C6103
10uF 6.3V 20%
X5R C0603
I
DDR_VTT_20
29
31
VTT
PGND1
12
11
+VSYS
1
1
JP6100
C C
JS6100
SHORT PAD
10X8Mil
NOBOM
JP6101
JUMP
JUMP_43X118
NOBOM
+V1P2U_VDDQ
Imax=6A
B B
1 2
JP6104
JUMP
JUMP_43X118
NOBOM
1 2
1
1
2
2
DDR_OUT
JUMP
43X39
2
NOBOM
2
C6105
1uF 25V 10%
X5R
C0603_N
NI
20170515 by Justice
C6109
22uF6.3V20%
X5R
C0603_N
I
C6114
22uF6.3V20%
X5R
C0603_N
I
1uF 25V 10%
X5R
C0603_N
NI
+VSYS_DDR
C6110
22uF6.3V20%
X5R
C0603_N
I
C6115
22uF6.3V20%
X5R
C0603_N
I
C6100
22uF6.3V20%
X5R
C0603_N
I
C6117
C6107
10uF 25V 20%
X5R
C0603_N
I
C6106
10uF 25V 20%
X5R
C0603_N
I
L6100
1.0uH 12A +/-20%
LCHK_6P6x6P6x3_5P35
I
C6101
0.1uF 25V 10%
X7R
C0603
I
DDR_LX_P
C6111
470pF 50V 10%
X7R
C0603
I
DDR_SNB
R6101
2.2R
5%
R0805
I
DDR_BST_R_P
R6100
0R
5%
R0402
I
DDR_LX_20
DDR_BST_P
25NC26
27
LX4
34
V+4
24
V+3
23
V+2
22
V+1
21
V+
20
LX3
19
LX2
18
LX1
17
LX
33
LX5
U6100
G5388K11U
tqfn_P04_32P_4X4_H1MM
I
PGND5
PGND4
16
14
15
112
VTTSNS
PGND
2
4
30
VTTGND2
CS
9
10
Imax=0.5A
+V0.6S_VTT
JP6103
SHORT PAD
60X30Mil
NOBOM
2
112
SGND_DDR
35
VTTGND
VTTGND1
32
GND
1
VTTREF
2
VDDQSNS
3
VDDQSET
5
S3
6
S5
7
TON
8
PGOOD
VCC
DDR_VCC
DDR_CS
R6108
5.11K
R0402
I
C6104
0.1uF 10V 10%
X5R
C0402
I
DDR_VTTREF_10
SGND_DDR
DDR_S3
DDR_S5
DDR_TON
C6116
1%
1uF 10V 10%
X5R
C0402
I
SGND_DDR
DDR_VDDQSNS
R6106
511K
R0402
I
+VSYS_DDR
1%
R6107
10R
R0603
I
SGND_DDR
5%
+V5P0A
+V0.6S_VTT
+V1P2U_VDDQ
+VSYS
R6102
6.04K
R0402
I
R6103
10K
1%
R0402
I
C6108
0.1uF 10V 10%
X5R
C0402
NI
C6112
0.1uF 10V 10%
X5R
C0402
NI
+V5P0A
1%
DDR_OUT
R6105
0R
5%
R0402
I
+V5P0A 10,11,23,37,39,40,42,53,60,62,63,65
+V0.6S_VTT 19,20,21
+V1P2U_VDDQ 4,10,19,20,21
+VSYS 36,59,60,63,67
R6109
0R
R0402
I
R6104
0R
R0402
NI
SM_PG_CTRL 4
5%
SLP_S3#_3R_PWR 60
5%
SLP_S4#_3R_PWR 60,62
DDR_PWRGD 50
A A
Project:
Project:
Project:
Engineer:
Engineer:
Size
Size
Size
Title:
Title:
Title:
C
C
C
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
Engineer:
DDR Power
DDR Power
DDR Power
Miix510
Miix510
Miix510
Frank
Frank
Frank
1
Rev
Rev
Rev
V01
V01
V01
61 69 Saturday, August 12, 2017
61 69 Saturday, August 12, 2017
61 69 Saturday, August 12, 2017
5
4
3
2
1
D D
C C
SLP_S4#_3R_PWR 60,61
62: +V2P5U_VPP POWER SUPPLY
+V3P3A
+V5P0A
C6204
1uF 10V 10%
X5R
C0402
I
2
+V2P5U_VPP
Imax=0.5A
+V2P5U_VPP
+V5P0A
0R
R0402
I
+V3P3A
2
5%
10K
5%
R0402
I
6 1
Q6201A
2N7002DW 115mA 60V
SOT-363
I
5
C6201
10uF 6.3V 20%
X5R
C0603R6201
I
Q6201B
3
2N7002DW 115mA 60V
SOT-363
I
4
C6202
1uF 10V 10%
X5R
C0402
I
R6202
10K
1%
R0402
I
R6203
31.6K
R0402_N
I
U6201
EM5045GE
PSOP8_PH1P27_4P7X3P7_H1P6_G1
I
2.5V_VIN
1
VIN
2
GND
2.5V_REFEN
3
REFEN
4
VOUT
PGND
9
1%
C6203
10uF 6.3V 20%
X5R
C0603R6205
I
NC3
NC2
CNTL
NC1
2.5V_OUT
8
7
2.5V_CNTL
6
5
112
JP6202
JUMP
43X39
NOBOM
+V3P3A 3,4,5,6,7,9,10,11,23,24,29,31,37,38,42,47,49,50,51,52,53,56,60,65,66,67
+V5P0A 10,11,23,37,39,40,42,53,60,61,63,65
+V2P5U_VPP 19,20,21
B B
A A
Project:
Project:
Project:
Engineer:
Engineer:
Size
Size
Size
Title:
Title:
Title:
C
C
C
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
Engineer:
+V2P5U_VPP
+V2P5U_VPP
+V2P5U_VPP
Miix510
Miix510
Miix510
Frank
Frank
Frank
1
Rev
Rev
Rev
V01
V01
V01
62 69 Saturday, August 12, 2017
62 69 Saturday, August 12, 2017
62 69 Saturday, August 12, 2017
5
D D
4
3
2
1
63: +1.0V_PRIM POWER SUPPLY
R6301
10R
5%
R0603
2
112
JP6302
SHORT PAD
60X30Mil
NOBOM
2
C0603_N
20170515 by Justice
I
V1.0_POK 50
R6309
0R
5%
R0402
NI
V1.0_AGND
V1.0_AGND
V1.0_VIN
C6309
10uF 25V 20%
X5R
I
V1.0_AGND
R6303
100K
R0402
I
C6300
1uF 10V 10%
X5R
C0402
I
C6301
0.01uF 25V 10%
X7R
C0402
I
V1.0_PFM
5%
V1.0_AGND
C6310
1uF 25V 10%
X5R
C0603_N
NI
V1.0_EN
V1.0_FB
V1.0_TON
1
2
3
4
5
6
C6311
10uF 25V 20%
X5R
C0603_N
I
V1.0_SS
V1.0_VIN
22SS23
VIN2
PGOOD
EN
U6300
PFM#
G5335QT1U
TQFN23_PH0P5_4X4_H0P8
I
AGND
FB
TON
VIN0
NC7VIN1
8
R6304
80.6K
1%
R0402
I
1uF 25V 10%
X5R
C0603_N
NI
+V5P0A
C C
+1.8V_PWRGD_R 60
R6302
0R
R0402
I
5%
C6303
1uF 6.3V 10%
X7R
C0402
NI
+V5P0A
B B
+VSYS
112
JP6303
JUMP
43X39
NOBOM
V1.0_VCC
21
VCC
9
C6317
R6308
0R
5%
R0603
I
C6302
0.1uF 25V 10%
X7R
C0603
I
V1.0_BOOT
20
19
BST
PGND4
LX0
VIN3
10
24
V1.0_LX
18
25
LX4
LX5
17
LX3
16
LX2
15
PGND3
14
PGND2
13
PGND1
12
PGND0
LX1
11
L6300
1.0uH 12A +/-20%
LCHK_6P6x6P6x3_5P35
I
V1.0_LX
R6307
2.2R
5%
R0805
I
C6312
470pF 50V 10%
X7R
C0603
I
V1.0_AGND
R6305
2.55K
R0402
I
R6306
10.2K
R0402
I
1%
1%
V1.0A_OUT
C6304
22uF6.3V20%
X5R
C0603_N
I
C6313
22uF6.3V20%
X5R
C0603_N
I
JP6300
JUMP
JUMP_43X118
NOBOM
1 2
1 2
JP6301
JUMP
JUMP_43X118
NOBOM
C6305
22uF6.3V20%
X5R
C0603_N
I
C6314
22uF6.3V20%
X5R
C0603_N
I
C6306
22uF6.3V20%
X5R
C0603_N
I
C6315
22uF6.3V20%
X5R
C0603_N
I
+VSYS
+V5P0A
+1.0V_PRIM
+1.0V_PRIM
Imax=8A
C6307
22uF6.3V20%
X5R
C0603_N
I
C6316
22uF6.3V20%
X5R
C0603_N
I
+VSYS 36,59,60,61,67
+V5P0A 10,11,23,37,39,40,42,53,60,61,62,65
+1.0V_PRIM 10,11,14
A A
Project:
Project:
Project:
Engineer:
Engineer:
Size
Size
Size
Title:
Title:
Title:
C
C
C
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
Engineer:
+1.0V_PRIM
+1.0V_PRIM
+1.0V_PRIM
Miix510
Miix510
Miix510
Frank
Frank
Frank
1
Rev
Rev
Rev
V01
V01
V01
63 69 Saturday, August 12, 2017
63 69 Saturday, August 12, 2017
63 69 Saturday, August 12, 2017
5
D D
C C
4
3
2
1
B B
A A
Project:
Project:
Project:
Engineer:
Engineer:
Size
Size
Size
Title:
Title:
Title:
C
C
C
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
NA
NA
NA
Engineer:
Miix510
Miix510
Miix510
Frank
Frank
Frank
1
Rev
Rev
Rev
V01
V01
V01
64 69 Saturday, August 12, 2017
64 69 Saturday, August 12, 2017
64 69 Saturday, August 12, 2017
5
4
3
2
1
D D
C C
+V5A_+V3.3A_PWRGD_R 60
B B
65: +1.8V_PRIM POWER SUPPLY
U6501
EM5045GE
PSOP8_PH1P27_4P7X3P7_H1P6_G1
I
V1.8A_VIN
1
VIN
2
GND
V1.8A_REFEN
3
REFEN
4
VOUT
PGND
9
V1.8A_OUT
C6504
10uF 6.3V 20%
X5R
C0603
I
G2
R6508
10K
5%
R0402
NI
8
NC3
7
NC2
V1.8A_CNTL
6
CNTL
5
NC1
112
JP6502
JUMP
43X39
NOBOM
R6506
10K
5%
R0402
I
+1.8V_PWRGD#
D2
Q6502B
PJT138K 360mA 50V
S2
SOT363M
I
2
Imax=0.4A
+V3P3A
G1
C6503
1uF 10V 10%
X5R
C0402
I
+1.8V_PRIM
R6507
10K
R0402
I
D1
Q6502A
S1
PJT138K 360mA 50V
SOT363M
I
R6501
0R
R0402
I
+V3P3A
2
5%
R6505
10K
5%
R0402
I
6 1
Q6501A
2N7002DW 115mA 60V
SOT-363
I
5
V1.8A_REFEN 51
C6501
10uF 6.3V 20%
X5R
C0603
I
Q6501B
3
2N7002DW 115mA 60V
SOT-363
I
4
For AC mode S5 power consumption 06/06
C6502
1uF 10V 10%
X5R
C0402
I
R6502
10K
1%
R0402
I
R6503
12K
1%
R0402_N
I
+1.8V_PRIM
+V5P0A
5%
+V3P3A
+V5P0A
+1.8V_PRIM
C6505
0.22uF 10V 10%
X5R
C0402_N
I
+1.8V_PWRGD 60
+V3P3A 3,4,5,6,7,9,10,11,23,24,29,31,37,38,42,47,49,50,51,52,53,56,60,62,66,67
+V5P0A 10,11,23,37,39,40,42,53,60,61,62,63
+1.8V_PRIM 7,10,11,31,39,40,44,47,56
A A
Project:
Project:
Project:
Engineer:
Engineer:
Size
Size
Size
Title:
Title:
Title:
C
C
C
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
Engineer:
+1.8V_PRIM
+1.8V_PRIM
+1.8V_PRIM
Miix510
Miix510
Miix510
Frank
Frank
Frank
1
Rev
Rev
Rev
V01
V01
V01
65 69 Saturday, August 12, 2017
65 69 Saturday, August 12, 2017
65 69 Saturday, August 12, 2017
5
4
3
2
1
66: CPU POWER SUPPLY
+V3.3AL
D D
20170517byJustice
SM_BAT_CLK 29,43,50,58,59
SM_BAT_DATA 29,43,50,58,59
C C
VR_PWRGD 7,29
B B
+V3P3A
R6615
10K
R0402
I
SOC_SVID_ALERT#_R 12
Psys setting base on charger spec:
1. uA/W information
2. Pmax
IMON setting:
U22 (1+1+1) (Vcore/VGT/VSA)
R6631=118k, C6610=220pF
R6634=121k, C6611=220pF
U42 (2+1+1) (Vcore/VGT/VSA)
R6631=59k, C6610=390pF
R6634=121k, C6611=220pF
R6601
100K
5%
R0402_N
I
CPU_PE
C6601
R6605
0.1uF 10V
0R
CPU_SCL_P
CPU_SDA_P
5%
R0402
NI
VR_SVID_ALERT#
X5R
C0402
NI
R6642
0R
5%
R0402
I
R6643
0R
5%
R0402
I
5%
PROCHOT_N 3,50
SOC_SVID_DAT 12
SOC_SVID_CLK 12
ALLSYSPWRGD 50
+1.0V_VCCST
C6606
1uF 10V
X5R
C0402
I
CPU_VDD18
R6612
100R
R0402
I
C6608
330pF 50V
X7R
C0402
NI
R6629
0R
5%
R0402
I
R6639 619K
1%
R6631
118K
R0402
I
C6610
220pF 50V
NPO
C0402
I
R6634
121K
R0402
I
C6611
220pF 50V
NPO
C0402
I
C6613
39pF 50V
NPO
C0402
I
R6602
0R
R0402
NI
CPU_ADDRP
R6606
0R
R0402
I
R6613
45.3R
R0402
I
1%
1%
I R0402_N1%
C6632
1000pF 50V
R6632 0R I R0402 5%
R6633 0R I R0402 5%
+VSYS_CPU
+V3P3A
+1.0V_VCCST
R6614 1.5K I R0402 1%
R6616 1.5K NI R0402 1%
R6617 1.5K I R0402 1%
R6623
0R
5%
R0402
R6618 1.5K I R0402 1%
NI
R6630
0R
5%
R0402
NI
LocalsenseinEEside
C6607
1000pF 50VNIX7R
C0402
R6625 0R I R0402 5%
R6627 0R I R0402 5%
C6609
1000pF 50VNIX7R
C0402
VCCSA_SENSE 10
VSSSA_SENSE 10
CPU_STB
U22: R6616=NI
+V3P3A
44
26
VDD33
VDD18
U6601
MP2949AGQKT-0140-C669-Z
TQFN48_PH0P4_6X6_H0P8_G1
I
VFBC
VDIFFC
15
14
CPU_VFBC_SA
CPU_VDIFFC_SA
R6603
4.7R
R0402
I
C6604
4.7uF 6.3V
X5R
C0402
I
5%
PWM143PWM242PWM341PWM440PWM539PWM6
VORTNC
17
R6641
8.2K
R0402
I
PWM1_IA
PWM2_IA
PWM_GT
PWM_SA
38
STB
CS1
CS2
CS3
CS4
CS5
CS6
VDIFFA
VFBA
VOSENA
VORTNA
VDIFFB
VFBB
VOSENB
VORTNB
VOSENC
16
NI
X7R
C0402
1%
34
5
4
3
2
1
48
6
7
8
9
10
11
12
13
C6630
1000pF 50V
CPU_VORTNC
PWM1_IA 67
PWM2_IA 67
PWM_GT 67
PWM_SA 67
VRACPU_VDIFF
VRACPU_VFB
CPU_VOSENA
CPU_VORTNA
VRAGT_VDIFF
VRAGT_VFB
CPU_VOSENB
CPU_VORTNB
CPU_VOSENC
R6640
0R
5%
R0402
NI
C0402
X7R
C0402
NI
R6635 0R I R0402 5%
R6637 0R I R0402 5%
C6614
1000pF 50VNIX7R
C0402
R6620
1.91K
NI
X7R
R6628 2.43K
R0402_N 1%
I
C6631
1000pF 50V
C6602
0.01uF 25V
X7R
C0402
I
CPU_VDD18
C6603
1uF 10V
X5R
C0402
I
5%
5%
R6604
2.2M
R0402
I
R6607
147K
R0402_N 1%
+VSYS_CPU
1%
I
+V3.3AL
R6608
0R
5%
C6605
R0402
0.1uF 10V
I
X5R
C0402
NI
1%
CPU_SCL_P
CPU_SDA_P
I R0402_N 1%
R6619 10R I R0402 1%
R6621 49.9R I R0402 1%
R6626
61.9K
R0402
I
VRA_TEMP 67
R6609
10K
5%
R0402
I
R6624 0R I R0402 5%
1%
R6610
10K
5%
R0402
I
CPU_EN
CPU_SLP_S0#
CPU_SDIO
CPU_SCLK
CPU_ADDRP
CPU_PE_R CPU_PE
CPU_IREF
CPU_CSSUMA_IA
CPU_CSSUMB_GT
CPU_CSSUMC_SA
CPU_IMONA_IA
CPU_IMONB_GT
CPU_IMONC_SA
R6611
10K
R0402
I
R6636
0R
R0402
I
5%
5%
37
EN
35
SLP_S0#
33
SCL_P
32
SDA_P
31
VRHOT#
30
VRRDY
29
ALT#
28
SDIO
27
SCLK
25
ADDR_P
46
PSYS
36
PE
24
IREF
18
CSSUMA
19
CSSUMB
20
CSSUMC
21
IMONA
22
IMONB
23
IMONC
CPU_TEMP_R
C6612
1uF 10V
X5R
C0402
I
CPU_VINSEN
47
49
AGND
VIN_SEN
TEMP
45
R6638
49.9K
1%
R0402
I
+VSYS_CPU 67
+V3P3A 3,4,5,6,7,9,10,11,23,24,29,31,37,38,42,47,49,50,51,52,53,56,60,62,65,67
+1.0V_VCCST 3,7,10,12,14
CPU_STB 67
CS1_IA 67
CS2_IA 67
CS_GT 67
CS_SA 67
CPU_CSSUMA_IA
CPU_CSSUMB_GT
CPU_CSSUMC_SA
LocalsenseinEEside
VCCSENSE 12
VSSSENSE 12
LocalsenseinEEside
VCCGT_SENSE 12
VSSGT_SENSE 12
A A
Project:
Project:
Project:
Engineer:
Engineer:
Size
Size
Size
Title:
Title:
Title:
C
C
C
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
Engineer:
CPU CONTROLLER
CPU CONTROLLER
CPU CONTROLLER
Miix510
Miix510
Miix510
Frank
Frank
Frank
1
Rev
Rev
Rev
V01
V01
V01
66 69 Saturday, August 12, 2017
66 69 Saturday, August 12, 2017
66 69 Saturday, August 12, 2017
5
4
3
2
1
D D
+VSYS
+
C6701
33uF 25V
cap_7p3X4p3_h1p9
I
C C
B B
1 2
1 2
+
C6702
33uF 25V
cap_7p3X4p3_h1p9
NI
JP6701
JUMP
JUMP_43X118
NOBOM
JP6702
JUMP
JUMP_43X118
NOBOM
+VSYS_CPU
+VSYS
+VSYS_CPU
C6703
1uF 25V 10%
X5R
C0603_N
NI
+V3P3A +V3P3A
PWM1_IA 66
CPU_STB 66
C6704
10uF 25V 20%
X5R
C0603_N
I
20170515 by Justice
C6705
10uF 25V 20%
X5R
C0603_N
I
R67010R I R0402 5%
R67050R I R0402 5%
R67090R I R0402 5%
C6706
1uF 25V 10%
X5R
C0603_N
NI
VCCCORE_VCC1
C6713
1uF 6.3V
X5R
C0402
I
VCCCORE_PWM1
VCCCORE_SYNC1
14
20
19
15
16
1
C6734
1uF 25V
X5R
C0402
I
VIN1
VIN2
VCC
AGND
PWM
SYNC
PGND15PGND26PGND37PGND48PGND59PGND6
VTEMP/FLT
PGND8
PGND711PGND9
12
10
13
VCCCORE_BST1
21
BST
2
SW1
3
SW2
VCCCORE_SW1
4
SW3
VCCCORE_VTEMP/FLT1
17
18
CS
U6701
MP86901-CGLT
TQFN21_PH0P4_3X4_H0P8
I
C6711
1uF 25V
X5R
C0402
I
R6706
0R
R0402
I
+V3P3A
+VCC_CORE
+VCC_GT
+VCC_SA
EMC request 20170712
5%
C6717
2.2nF 50V
VRA_TEMP66
X7R
C0603
I
R6703
2.2R
R0805
I
5%
CS1_IA 66 CS_GT 66
+VSYS 36,59,60,61,63
+VSYS_CPU 66
+V3P3A 3,4,5,6,7,9,10,11,23,24,29,31,37,38,42,47,49,50,51,52,53,56,60,62,65,66
+VCC_CORE 12,15
+VCC_GT 12,15
+VCC_SA 10,15,23
L6701
0.12uH 41A 20%
EM-12BM05V01
SML7668_H3
I
1 2
+
C6731
220uF 2.5V
cap_7p3X4p3_h1p9
NI
+VCC_CORE
+VSYS_CPU
C6719
1uF 25V 10%
X5R
C0603_N
NI
20170515 by Justice
PWM2_IA 66
C6720
10uF 25V 20%
X5R
C0603_N
U42
C6721
10uF 25V 20%
X5R
C0603_N
U42
R67110R U42 R0402 5%
R67150R U42 R0402 5%
R67190R U42 R0402 5%
C6722
1uF 25V 10%
X5R
C0603_N
NI
C6735
1uF 25V
X5R
C0402
U42
VCCCORE_BST2
VTEMP/FLT
PGND8
PGND711PGND9
12
10
13
21
BST
2
SW1
3
SW2
VCCCORE_SW2
4
SW3
VCCCORE_VTEMP/FLT2
17
18
CS
U6702
MP86901-CGLT
TQFN21_PH0P4_3X4_H0P8
U42
C6732
2.2nF 50V
X7R
C0603
U42
R6713
2.2R
R0805
U42
5%
L6702
0.12uH 41A 20%
EM-12BM05V01
SML7668_H3
U42
1 2
+
C6715
220uF 2.5V
cap_7p3X4p3_h1p9
U42
C6727
1uF 25V
X5R
C0402
U42
R6716
0R
5%
R0402
U42
VRA_TEMP VRA_TEMP
CS2_IA66
1
VIN1
14
VIN2
VCCCORE_VCC2
20
VCC
C6729
1uF 6.3V
X5R
C0402
19
U42
AGND
VCCCORE_PWM2
15
PWM
VCCCORE_SYNC2 CPU_STB CPU_STB
16
SYNC
PGND15PGND26PGND37PGND48PGND59PGND6
+VSYS_CPU
C6707
1uF 25V 10%
X5R
C0603_N
NI
+VSYS_CPU
C6723
10uF 25V 20%
X5R
C0603_N
I
PWM_GT 66
PWM_SA 66
C6708
10uF 25V 20%
X5R
C0603_N
I
CPU_STB
20170515 by Justice
C6724
1uF 25V 10%
X5R
C0603_N
NI
+V3P3A +V3P3A
20170515 by Justice
1uF 25V 10%
X5R
C0603_N
NI
R67020R I R0402 5%
R67080R I R0402 5%
R67100R I R0402 5%
C6725
10uF 25V 20%
X5R
C0603_N
R67120R I R0402 5%
R67180R I R0402 5%
R67200R I R0402 5%
C6709
C6710
10uF 25V 20%
X5R
C0603_N
I
C6726
1uF 25V 10%
X5R
C0603_N
I
NI
VCCGT_VCC
C6714
1uF 6.3V
X5R
C0402
I
VCCGT_PWM
VCCGT_SYNC
VCCSA_VCC
C6730
1uF 6.3V
X5R
C0402
I
VCCSA_PWM
VCCSA_SYNC
1
14
20
19
15
16
1
6
12
11
7
8
C6736
1uF 25V
X5R
C0402
I
VIN1
VIN2
VCC
AGND
PWM
SYNC
C6737
1uF 25V
X5R
C0402
I
U6704
VIN
VIN
VCC
AGND
PWM
SYNC
PGND15PGND26PGND37PGND48PGND59PGND6
10
PGND5PGND
4
21
BST
2
SW1
3
SW2
4
SW3
17
VTEMP/FLT
18
CS
U6703
MP86901-CGLT
PGND8
PGND711PGND9
TQFN21_PH0P4_3X4_H0P8
I
12
13
BST
13
SW
2
SW
3
VTEMP/FLT
9
CS
10
MP86901-AGQT
TQFN-13 (3mmx3mm)
VCCGT_BST
VCCGT_SW
VCCGT_VTEMP/FLT
VCCSA_BST
VCCSA_SW
VCCSA_VTEMP/FLT
I
C6712
1uF 25V
X5R
C0402
I
C6728
1uF 25V
X5R
C0402
I
R6707
0R
R0402
I
R6717
0R
R0402
I
5%
5%
VRA_TEMP
C6738
22uF 6.3V
X5R
C0603
NI
C6744
22uF 6.3V
X5R
C0603
NI
CS_SA 66
EMC request 20170712
C6718
2.2nF 50V
X7R
C0603
I
R6704
2.2R
R0805
I
C6739
22uF 6.3V
X5R
C0603
NI
C6745
22uF 6.3V
X5R
C0603
NI
EMC request 20170712 EMC request 20170712
C6733
2.2nF 50V
X7R
C0603
I
R6714
2.2R
R0805
I
L6703
0.12uH 41A 20%
EM-12BM05V01
SML7668_H3
I
1 2
5%
C6740
22uF 6.3V
X5R
C0603
NI
C6746
22uF 6.3V
X5R
C0603
NI
L6704
0.33uH 20A +/-20%
LCHK_6P6x6P6x3_5P35
I
5%
C6716
+
330uF 2V -35 to 10%
CTD_H83_N
I
20170627 by Justice for acoustic noise
C6742
C6741
22uF 6.3V
22uF 6.3V
X5R
X5R
C0603
C0603
NI
NI
C6748
C6747
22uF 6.3V
22uF 6.3V
X5R
X5R
C0603
C0603
NI
NI
+VCC_GT
C6743
22uF 6.3V
X5R
C0603
NI
+VCC_SA
+VCC_GT
67: VCC_CORE/GT/SA POWER SUPPLY
A A
Project:
Project:
Project:
Miix510
Miix510
Miix510
Frank
Frank
Frank
Engineer:
Engineer:
Title:
Title:
Title:
VCC_CORE/GT/SA
VCC_CORE/GT/SA
VCC_CORE/GT/SA
1
Engineer:
Rev
Rev
Rev
V01
V01
V01
67 69 Saturday, August 12, 2017
67 69 Saturday, August 12, 2017
67 69 Saturday, August 12, 2017
Size
Size
Size
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
5
D D
C C
4
3
2
1
B B
A A
Project:
Project:
Project:
Engineer:
Engineer:
Size
Size
Size
Title:
Title:
Title:
C
C
C
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
NA
NA
NA
Engineer:
Miix510
Miix510
Miix510
Frank
Frank
Frank
1
Rev
Rev
Rev
V01
V01
V01
68 69 Saturday, August 12, 2017
68 69 Saturday, August 12, 2017
68 69 Saturday, August 12, 2017
A
B
C
D
E
POWERCHANGELIST
SDVtoSIV
3/3 Page60. Change R6008 from 1k to 100R and R6009 from 150k to 10k to fine tune enable level.
1 1
3/17 Page66. Fine tune CPU transient,LL.
Change R6603 to 1.87Kohm.
Change R6619 to 604ohm.
Change C6615 to 3300pF.
Change R6628 to 150Kohm.
Change C6622 to 68nF.
Change R6651 to 39.2Kohm.
Change R6655 to 100Kohm.
Change R6644 to 1.1Kohm.
Change R6646 to 1.5Kohm.
Change R6635 to 30Kohm.
Change R6618 to 69.8Kohm.
Change C6609 to 3300pF
2 2
3 3
4 4
Project:
Project:
Project:
Engineer:
Engineer:
Size
Size
Size
Title:
Title:
Title:
C
C
C
Date: Sheet of
Date: Sheet of
A
B
C
D
Date: Sheet of
Engineer:
PWR Change List
PWR Change List
PWR Change List
Miix510
Miix510
Miix510
Frank
Frank
Frank
E
Rev
Rev
Rev
V01
V01
V01
69 69 Saturday, August 12, 2017
69 69 Saturday, August 12, 2017
69 69 Saturday, August 12, 2017
ART FILM - top1
R EF*
R8010
CLIP1
HOLE2
C9576
C9575
R4531
R4534
R4530
R4533
CR4561
C4502
DMIC1
C4705
R4706
R4707
R9791
CR9015
L4557
C4570
R9790
R4618
C4571
R9789
L4559
R9788
R9793
L4560
CR9014
R9792
R9795
L4558
R9794
JTYPEC1
CR4568
R4599
L4500
R4617
CR4556
J1
R4708
R4709
C4706
C4707
SH4570
U4542
U4540
C4578
U8001
HOLE4
JUSB3-1
CR9012
CR9013
CR9006
CR9005
C9006
CN5802
C5801
R4711
C4709
C4708
R4710
DMIC2
C4422
C4518
C4519
TP4505
C4533
C4532
C4516
EU4523
C4529
C4517
R4423
C4528
C4514
C4515
C4531
C4530
Q4400
C4512
C4513
C4535
C4534
R4586
R4630
C4613
TP4502
Q4500
C8003
C8011
R8000
CR9041
R9007
L9003
R9006
R9852
L9508
R9853
R9011
L9002
R9012
C9007
U9001
R9005
C9004
DC1
HOLE5
JWWAN1
R4422
C4583
R4404
R4403
R4421
R4420
EU4541
R4431
R4430
R4429
R4428
C4588
R4620
R4636
R4579
R4580
R4619
R4406
L4400
R4405
Q8207
C4423
Q8208
TP4506
TP4507
TP4508
SH4401
R9820
R9821
R9822
Q8205
RC454
RC19
U9507
Q8204
R9819
C9571
C1270
C1271
RC453
CR9061
JRTC1
R6505
Q6501
C2311
C6030
R6507
R6501
R6011
R6508C6505
R6012
Q6502
R6506
R6009
R6008
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R6015
R6016
R6018
R6017
R6022
R6021
R6020
R6019
L6001
R9898
R9907
R9901
R4414
R4415
R4416
R6001C6006
R6003
C4408
C4409
C4410
C4411
C6031
R4413
R9904
R9906
R9905
R9899
R9900
R9903
R9902
JCONN2
C2310
C6501
R6502
R6503
C6502
JP6502
JP6002
C6011
C6013
C6012
C6007
C6009
U6001
C6008
JP6005
JSPK2
R6007
C6022
U6501
C6032
C6503
L6002
C6504
C6004
U8200
R6006
+
JP6006
C6024
C6023
C6025
U6002
JP6003
C6020
C6040
C6019
C6609
R6633
C6614
C6631
C6002
C6003
JP6001
+
CR9049
CR9051
CR9048
CR9050
CR9046
TP9941
R6640
R6641
C6001
C2314
C6630
R6635
R6637
C2313
R6631
C6610
R6634
C6611
C6613
R6639
R6626
R6643
R6642
C6005
R9881
TP9946
R9880
TP9945
TP9937
R8212
CR9043
CR9047
L8202
CR9042
R8206
R8205
TP9933
D8200
TP9935
C8205
TP9987
C8206
R8223
R9879
R9830
SH8202
JDOCK1
C6203
C6204
U6201
C2312
C6201
C2309
JP6004
C6028
C6026
C6027
+
C6701
R6630
R6623
C6607
R6625
R6627
R6620
R6617
R6614
R6616
R6628
R6632
C6632
R6618
R6607
R6604
C6602
C6604
U6601
R6603
R6608
C6605
R6619
R6609
R6615
R6610
R6624
R6621
C6601
R6611
R6602
C6603
R6605
R6601
R6612
R6613
R6606
C6606
+
C6702
R8204
JP8200
C9583
Q8202
R9584
TP9934
U8201
R8210
R8209
TP9936
TP9939
C8207
SH8201
C8201
C9541
JTP1
HOLE3
HOLE6
Q3800
R8014
R8012
R8013
R8011
R8017
CLIP16
U3
R8015
R8016
R9024
C7125
R9023
JSAR1
JP6104
L6100
CLIP15
C6105
C6106
C6101
R6100
U6100
R6108
C6116
*
C6104
C6112
C6108
R6103
R6106
R6105
R6102
R6205
JP6202
R6202
R6203
C6202
JP6701
JP6702
Q8200
C8223
C8222
Q8201
R8211
C8200
R6109
R6104
Q6201
R6703
R6201
C6717
C6703
C6704
U6701
C6734
R6705
R6709
C6713
C6711
R6706
R6713
C6732
C6719
C6720
U6702
C6735
R6715
R6719
C6729
C6727
R6716
R6704
C6718
C6707
C6708
U6703
C6736
R6708
R6710
C6714
C6712
R6707
R6714
C6724
C6723
U6704
R8201
C8218
C8217
C6737C6733
R6718
R6720
C6730
C6728
R6717
C8202
C8214
C8215
C8216
C8213
R9892
C9540
R8221
JEDP1
CLIP2
RM40
RM21
RM20
CM106
CM99
CM101
CM94
CM53
CM51
CM32
CM27
CM73
RM6
RM81
CM72
Q2800
R6107
RI70
QT1
RT1
R2808
L6701
CC174
CC173
L6702
L6703
L6704
RM28
RM26
RM38
RM22
CM50
RM24
RM23
RM17
RM16
RM99
RM33
CM61
RM18
RM15
RM32
RM97
RM36
RM95
RM19
CM107
RM27
RM25
CM117
RM29
RM30
CM25
RM37
RM31
RM34
RM39
CM2
UM2
CLIP14
CLIP13
R2807
C2830 C2829
U2800
*
C6715
+
CC175
C6716
C6741
C6744
C6746
C6740
CC295
CC296
D5901
C5917
JS5901
R5903
JS5902
R5901
C5902
RM35
CM104
RM13
RM8
RM14
CM74
RM85
CM66
CM41
CM59
RM4
CM1
UM10
RC183
CC176
CC383
CC384
C6742
C6743
C6747
C6738
RC425
RC426
71
R1042
R9760
R1024
R1023
CR1003
R1044
RC184
R1028
R1021
R1033
RC181
RC180
RC179
C5914
R5913
D5902
R5910
C5905
R5907
R5904
C5913
C5907
31
40
C5912
R5911
30
R5914
C5916
C5915
R5915
R5912
C5918
R5908
Q5901
C5908
R5930
U5901
C5903
10
21
C5904
C5906
11
20
C5909
C5910
R5905
CLIP4
CLIP3
RM48
RM10
RM41
CM7
RM50
RM11
RM12
RM42
CM12
RM9
CM6
CM5
CM9
CM42
CM44
CM37
UM4
RM44 RM89
CM40
CM64
CM91
CLIP12
50
TP9502
TP9503
R1029
R1031
R1027
R1034
R1022
TP9504
TP9501
8
JS5903
R5909
JS5904
CN5801
L5901
D5801
1
+
CM118
CM121
CM112
RM47RM49
CM114
CM36
UM6
CM65
CM88
CLIP11
UC1
25
CLIP5
CM115
CM97
RM78
RM58
RM59
RM64
RM66
RM60
RM61
RM62
RM76
RM55
RM53
RM54
RM71
RM70
RM96
CM87
RM100
RM98
RM57
RM74
CM119
RM56
RM65
RM68
CM120
RM77
RM63
RM67
RM69
RM75
RM73
CM38
CM96
RM72
RC394
R1086
C9587
C9586
*
UM7
RM51
RM45 RM91
RM52
CM49
CLIP10
RC395
RC393
Y1000
C1252
C1251
R1056
BB
AJ
U
E
A
5 1
R10067
R9882
R1067 RC427
R1013
R1057
*
C9977
C9976
C1249
C1250
R1071
R1093
Y1002
Y1001
C10038
R10092
R9896
CLIP6
CM52
CM54
CM10
CM18
CM17
CM86
CLIP9
CR9052
R1046
R1059
R1072
R1073
R1061
R1064
R1065
R1014
R1085 RC206
R1084
R9864
R1053
R9862
R1055
R9861
R9872
R9873
CC97
R1050
R1087
C2302
R9895
C10044
C9570
R9876
SH9528
C10045
U9513
C10039
C9884
*
R10099
QT2
R10098
R9893
*
R9897
QT3
EU8501
R9894
R10008
R10009
C9870
CLIP7
CLIP8
R1048
R9871
R1090
R9867
RC172
R9806
R9807
R6308
C6302
R6301
C6301
HOLE8
C10047
C9869
C9873
R9763
SH8501
C9534
C9535
R9762
U8500
C8500
R1079
R1054
R4612
R9848
R1041
R9849
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R1052
R1089
R1088
*
C6312
R6307
U6300
C6300
R6309
R6302
C6303
R6303
R4201
R4200
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R10081
C9893
R10058
C9892
SH8502
R9765
C9537
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R10123
R10055
C9898
R10122
C9878
C9877
C9536
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CR9057
CR9055
R10115
R4601
R4610
R4611
R4604
D4600
U4600
R4608
R4607
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C4622
C4617
C4618
C4620
R9850
Q4300
Q4302
C10051
R4318
C4317
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R10043
SH9519
R10044
R10035
R10036
JP6301
JP6300
SH9536
R10038
R10042
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U9509
C9889
R10034
R10106
R10105
R10029R10030
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CR9053
C6310
C6309
C9890
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R6304
R6305
R6306
R9888
R9887
C0607
C0606
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C4209
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C10043
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R9877
R9831
R9832
TP5503
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R5513
R5530
R9810
R9855
U5500
R9811
C5508
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TP5500
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TP5501
C9891
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R9812
C5506
C5507
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R9813
Q5500
R5527
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R10117
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C9983
R10056
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C4616
C9595
C4615
H=0
SH9520
SH9523
C9984
C9879
C9880
SH4302
C4320
C4321
C4600
C4604
R10064
C4601
C4609
R10062
C9900
C9901
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C9882
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C4611
C9594
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SH9535
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R9860
R5531
JREAR1
HOLE1
SH9525
SH9526
U9505
C10040
U9514
R10094
C9529
C10042
R10095
R9828
C5510
C5500
R10086
JFAN1
Q8209
TP6021
TP6000
C4319
C4318
JWLAN1
R EF*
R EF*
EXE-TECHASPECT
DATE
PROJECT
LAYER NAME
1702B_05_01 SOVP2
Designer
TOTAL 10 LAYER
02/02/2018
Wilson
ART FILM - top1
ART FILM - bot1
C4508
R10082
C8522
QT4
R10087
R10088
FB5501
C5511
C5502
C5505
C9531
C5504
C9532
R5532
R9883
CR5500
R5510
SH9505
TP5509
TP5513
R8018
R9884
R9885
SH9515
C9978
C10041
SH9532
R9847
C3002
R3000
C3000
C3001
R4324
R4321
R4323
R4319
C4323
C4322
R8023
R8022
R8024
U8005
SH9516
R8021
C5501
R4326
R4325
R8019
C9979
C8512
C9985
C9986
TP6007
R4320
TP6020
TP9976
TP9977
TP9993
*
R10084
U8505
R10085
R10083
SH5502
R9839
TP5508
R9891
CR9045
R10125
R10059
C9980
Y8501
R5534
C9894
R10004
C9896
R10107
R10108
R10109
R1066
Q8210
C9902
R10110
R10066
TP9992
R10065
R10063
R9824
SH5501
C8520
SH8503
R10104
R2015
R9878
R9826
R10119
C10048
R10005
CR9059
R10016
R10017
C9895
U16
R4605
C4606
C4605
C4602
C4603
R4606
C4623 R4602
R4614
CR4313
CR4312
R10077
R10076
R10075
C10049
SH9534
R10033
CR9054
R10049
R10050
R10045
R10041
*
R10120
U9511
SH9533
C10050
R10046
R10052
R10051
R10103
C10046
C9883
C8508
SH9517
C9872
R9825
U9508
R10102
R8525
CLIP23
R8517
R8526
R8518
R10015
R10054
R10053
R10057
C9871
R10101
Y8500
C8521
R8511
R10073
C9887
R10012
C9888
R10013
R10010
C9885
R10011
C9886
R10072
CLIP24
R10071
R10112
R10114
CR9058
R10124
CR9056
R10111
R4600
C4608
C4607
R4609
C4621
C4619
R4603
R9866
R9863
R9865
C2308
R10089
R9816
R9815
CR9044
CR4310
CR9060
R10078
U9512
R9869
R9870
R4322
R4316
R10079
R10080
R3001
R3021
R3022
R3002
R9742
R9803
CR3000
R9761
R9804
SH9512
C3058
R1091
R9868
CC67
R10074
C2307
C6314
C6313
C6316
C6304
C6315
C4208
C4205
CC103
JP6302
C6305
C6307
C6306
C6317
C6311
CC98
TP9980
RC420
CC164
R4205
R4206
R4207
RC142
RC431
C2306
CC398
CC397
RC432
CC394
CC392
C4206
C4207
CLIP21
CLIP22
CM33
CM48
CM84
CM19
RM46 RM93
CM16
CLIP25
CC117
CC88
UC6
RC187
RM3
RM2
RM1
RC182
R10127
R9802
R10126
R9801
RC167
CC74
CC112
CC111
CC116
CC115
CC82
CC81
C2315
CC96
CC95
UC5
CC94
CC165
CC380
CC376
SH8000
R8007
SH9521
R8004
UC8
U8003
RC430
TP8001
CC379
CM108
CM113
CM34
CM11 CM39 CM67 CM85
UM8
CC100
CC89
RC188
RC189
R1025
R1026
R1020
RC197
CC85
RC154
CC73
RC163
R1012
R1015
CC389
RC162
CC87
R1092
R1063
CC130
CC135
RC152
C8009
R8006
R8005
SH9522
C8004
C10037
CLIP26
CC90
CC99
R10091
CC114
CC113
R10090
R1060
R1058
C1254
C1253
R1062
RC150
CC163
CC71
RC173
CC141
CC140
CC7
RC171
CC102
CC76
RC161
CC91
CC80
CC122
CC68
CC61
RC175
RC421
RC143
RC422
RC140
CC75
CC142
CC86
CC48
CC134
CC139
RC190
CC136
CC123
CC138
RC148
RC169
R9859
R9858
R9856
JUART1
R9721
C2316
R9720
R9857
CLIP20
CLIP19
CM116
CM103
CM102
CM95
CM92
CM56
CM55
CM30
CM31
CM21 RM87
RM43
CM22
CC27
CC72
RC141
CC30
CC49
CC355
CC358
CC291
CC292
CC284
CC288
CC283
CC290
CC289
CC55
CC359
CC361
CC356
CC287
CC285
CC282
CC137
CC388
CM47
CM89
CM28
CM13
CM15CM8
UM5
RM7
RM83
CM20
CM43
CM29
CLIP27
CC28
CC36
CC35
CC34
RC208
CC43
CC41
CC47
CC38
CC39
CC37
CC40
CC320
CC308
CC327
CC337
CC322
CC29
CC33
CC195
CC31
CC312
CC313
CC330
CC306
CC32
CC324
CC323
CC311
CC334
CC310
CC321
CC331
CC309
CC307
RC447
CC338
CC328
CC360
CC357
CC286
CC206
CC262
CC188
CC368
CC369
CC258
CC265
CC187
CC363
CC362
CC257
CC366
CC186
CC365
CC246
CC194
CC367
CC364
CC371
CC205
CC329
CC318
CC203
CC199
CC339
RC448
CC314
CC317
CC336
CC319
CC315
CC335
CC340
CC316
RC449
RC451
CC333
CC332
CC325
CC326
CC198
RC423
RC424
CC200
CC201
CC189
CC185
CC190
R1019
C2304
R5801
R5804
R5802
C5921
R5803
CM109
CM110
CM46
CM4
C10036
CM14
UM3
CM63
CM60
CLIP28
CC42
CC184
CC182
CC183
CC202
CC196
CC193
CC207
CC197
CC204
RC446
RC452
RC450
CC248
CC244
CC266
CC341
CC264
CC259
CC249
CC245
CC347
CC263
CC352
CC243
CC247
CC346
CC354
CC348
CC370
CC372
CC344
CC345
CC351
CC349
CC353
CC261
CC260
CC343
CC342
CC304
CC305
CC350
CC387
R1049
RC8
RC7
R1009
R1068
R1032
CC386
C5919
C5920
CLIP17
CLIP18
CM105
CM100
CM98
CM58
CM111
CM93
CM57
R9037
R8009
CM45
CLIP32
C7155
C7154
C7153
C7156
CM62
CM70
UM1
RM5
RM79
CM69
CLIP30
CLIP29
CC53
UC4
R159
CC51
+
C6731
CC381
CC382
CC391
C6745
CC374
CC375
CC390
CC373
C6739
C6748
CC293
CC294
R9886
C2303
CC385
JP5905
C2305
R5917
R5916
SH8001
CM3CM26 CM71
JP6101
C6115
C6109
C6110
C6114
JS6100
CM68
CLIP31
CM90
CC52
RC428
RC191
R153
C6107
C6111
C6117
R6101
C6100
C6103
C6102
CC50
JP6103
JP6102
JP6100
C6706
C6705
R6701
C6722
C6721
R6711
C6709
C6710
R6702
C6726
C6725
R6712
C2301
C8221
R8200 C8220
C8219
R8203
R8202
R6010
C6038
C6037
R6629
C6608 C6612
R6636
R6638
C2317
C6010
C6015
C6016
C6017
C6018
C6035
C6034
C6033
C6036
TP10010
C9593
R9915
TP10009
C9592
R9912
R9916
TP10012
R9911
R9914
R9913
TP10011
C9590
R9910
R9909
C9591
C8203
TP9943
TP9944
SH8203
C9569
C8204
C4509
R4529
R4528
C4416
C4407
C4405
C4414
C4526
C4527
C4524
C4525
SH4568
R4425
R4424
C4510
C4511
R4409
C4587
R4410
R4411
R4419
R4432
C4415
C4406
C4404
CR4564
TP4504
C4712
C4711
TP4501
R4715
R4713
C4710
R4712
CR4567
R4507
R4505
CR4566
CR4563
R9817
R9818
R4598
R4638
C4614
C4572
R9814
C4577
02/02/2018
Wilson
DATE
Designer
TOTAL 10 LAYER
ART FILM - bot1
EXE-TECHASPECT
1702B_05_01 SOVP2
PROJECT
LAYER NAME