Lenovo Ideapad 320-15IKB, IdeaPad 320 series Schematics

5

DDRA_DQ[0..63]17

D D

C C

B B

4

?

SKL_U LT

DDR0_MA[5]/DDR0_CAA[0]/DDR0_MA[5]
DDR0_MA[9]/DDR0_CAA[1]/DDR0_MA[9]
DDR0_MA[6]/DDR0_CAA[2]/DDR0_MA[6]
DDR0_MA[8]/DDR0_CAA[3]/DDR0_MA[8]
DDR0_MA[7]/DDR0_CAA[4]/DDR0_MA[7]

DDR0_BA[2]/DDR0_CAA[5]/DDR0_BG[0]
DDR0_MA[12]/DDR0_CAA[6]/DDR0_MA[12]
DDR0_MA[11]/DDR0_CAA[7]/DDR0_MA[11]

DDR0_MA[15]/DDR0_CAA[8]/DDR0_ACT #
DDR0_MA[14]/DDR0_CAA[9]/DDR0_BG[1]

DDR0_MA[13]/DDR0_CAB[0]/DDR0 _MA[13]

DDR0_CAS#/DDR0_CAB[1]/DDR 0_MA[15]

DDR0_WE#/DD R0_CAB[2]/DDR0_MA[14]

DDR0_RAS#/DDR0_CAB[3]/DDR 0_MA[16]

DDR0_BA[0]/DDR0_CAB[4]/DDR0_ BA[0]

DDR0_MA[2]/DDR0_CAB[5]/DDR0_ MA[2]

DDR0_BA[1]/DDR0_CAB[6]/DDR0_ BA[1]
DDR0_MA[10]/DDR0_CAB[7]/DDR0 _MA[10]

DDR0_MA[1]/DDR0_CAB[8]/DDR0_ MA[1]
DDR0_MA[0]/DDR0_CAB[9]/DDR0_ MA[0]

DDR CH - A

+3VALW

12

RC30
100K_0402_5%

DDRA_DQ0
DDRA_DQ1
DDRA_DQ2
DDRA_DQ3
DDRA_DQ4
DDRA_DQ5
DDRA_DQ6
DDRA_DQ7
DDRA_DQ8
DDRA_DQ9
DDRA_DQ10
DDRA_DQ11
DDRA_DQ12
DDRA_DQ13
DDRA_DQ14
DDRA_DQ15
DDRA_DQ16
DDRA_DQ17
DDRA_DQ18
DDRA_DQ19
DDRA_DQ20
DDRA_DQ21
DDRA_DQ22
DDRA_DQ23
DDRA_DQ24
DDRA_DQ25
DDRA_DQ26
DDRA_DQ27
DDRA_DQ28
DDRA_DQ29
DDRA_DQ30
DDRA_DQ31
DDRA_DQ32
DDRA_DQ33
DDRA_DQ34
DDRA_DQ35
DDRA_DQ36
DDRA_DQ37
DDRA_DQ38
DDRA_DQ39
DDRA_DQ40
DDRA_DQ41
DDRA_DQ42
DDRA_DQ43
DDRA_DQ44
DDRA_DQ45
DDRA_DQ46
DDRA_DQ47
DDRA_DQ48
DDRA_DQ49
DDRA_DQ50
DDRA_DQ51
DDRA_DQ52
DDRA_DQ53
DDRA_DQ54
DDRA_DQ55
DDRA_DQ56
DDRA_DQ57
DDRA_DQ58
DDRA_DQ59
DDRA_DQ60
DDRA_DQ61
DDRA_DQ62
DDRA_DQ63

UC1B

AL71

DDR0_DQ[0]

AL68

DDR0_DQ[1]

AN68

DDR0_DQ[2]

AN69

DDR0_DQ[3]

AL70

DDR0_DQ[4]

AL69

DDR0_DQ[5]

AN70

DDR0_DQ[6]

AN71

DDR0_DQ[7]

AR70

DDR0_DQ[8]

AR68

DDR0_DQ[9]

AU71

DDR0_DQ[10]

AU68

DDR0_DQ[11]

AR71

DDR0_DQ[12]

AR69

DDR0_DQ[13]

AU70

DDR0_DQ[14]

AU69

DDR0_DQ[15]

BB65

DDR0_DQ[16]/DDR0_D Q[32]

AW65

DDR0_DQ[17]/DDR0_D Q[33]

AW63

DDR0_DQ[18]/DDR0_D Q[34]

AY63

DDR0_DQ[19]/DDR0_D Q[35]

BA65

DDR0_DQ[20]/DDR0_D Q[36]

AY65

DDR0_DQ[21]/DDR0_D Q[37]

BA63

DDR0_DQ[22]/DDR0_D Q[38]

BB63

DDR0_DQ[23]/DDR0_D Q[39]

BA61

DDR0_DQ[24]/DDR0_D Q[40]

AW61

DDR0_DQ[25]/DDR0_D Q[41]

BB59

DDR0_DQ[26]/DDR0_D Q[42]

AW59

DDR0_DQ[27]/DDR0_D Q[43]

BB61

DDR0_DQ[28]/DDR0_D Q[44]

AY61

DDR0_DQ[29]/DDR0_D Q[45]

BA59

DDR0_DQ[30]/DDR0_D Q[46]

AY59

DDR0_DQ[31]/DDR0_D Q[47]

AY39

DDR0_DQ[32]/DDR1_D Q[0]

AW39

DDR0_DQ[33]/DDR1_D Q[1]

AY37

DDR0_DQ[34]/DDR1_D Q[2]

AW37

DDR0_DQ[35]/DDR1_D Q[3]

BB39

DDR0_DQ[36]/DDR1_D Q[4]

BA39

DDR0_DQ[37]/DDR1_D Q[5]

BA37

DDR0_DQ[38]/DDR1_D Q[6]

BB37

DDR0_DQ[39]/DDR1_D Q[7]

AY35

DDR0_DQ[40]/DDR1_D Q[8]

AW35

DDR0_DQ[41]/DDR1_D Q[9]

AY33

DDR0_DQ[42]/DDR1_D Q[10]

AW33

DDR0_DQ[43]/DDR1_D Q[11]

BB35

DDR0_DQ[44]/DDR1_D Q[12]

BA35

DDR0_DQ[45]/DDR1_D Q[13]

BA33

DDR0_DQ[46]/DDR1_D Q[14]

BB33

DDR0_DQ[47]/DDR1_D Q[15]

AY31

DDR0_DQ[48]/DDR1_D Q[32]

AW31

DDR0_DQ[49]/DDR1_D Q[33]

AY29

DDR0_DQ[50]/DDR1_D Q[34]

AW29

DDR0_DQ[51]/DDR1_D Q[35]

BB31

DDR0_DQ[52]/DDR1_D Q[36]

BA31

DDR0_DQ[53]/DDR1_D Q[37]

BA29

DDR0_DQ[54]/DDR1_D Q[38]

BB29

DDR0_DQ[55]/DDR1_D Q[39]

AY27

DDR0_DQ[56]/DDR1_D Q[40]

AW27

DDR0_DQ[57]/DDR1_D Q[41]

AY25

DDR0_DQ[58]/DDR1_D Q[42]

AW25

DDR0_DQ[59]/DDR1_D Q[43]

BB27

DDR0_DQ[60]/DDR1_D Q[44]

BA27

DDR0_DQ[61]/DDR1_D Q[45]

BA25

DDR0_DQ[62]/DDR1_D Q[46]

BB25

DDR0_DQ[63]/DDR1_D Q[47]

SKYLAKE-U_BGA1356

REV = 1

@

3

DDR0_DQSN[2]/DDR0_D QSN[4]
DDR0_DQSP[2]/DDR0_D QSP[4]
DDR0_DQSN[3]/DDR0_D QSN[5]
DDR0_DQSP[3]/DDR0_D QSP[5]
DDR0_DQSN[4]/DDR1_D QSN[0]
DDR0_DQSP[4]/DDR1_D QSP[0]
DDR0_DQSN[5]/DDR1_D QSN[1]
DDR0_DQSP[5]/DDR1_D QSP[1]
DDR0_DQSN[6]/DDR1_D QSN[4]
DDR0_DQSP[6]/DDR1_D QSP[4]
DDR0_DQSN[7]/DDR1_D QSN[5]
DDR0_DQSP[7]/DDR1_D QSP[5]

DDR0_VREF_DQ
DDR1_VREF_DQ

1 OF 20

DDR_VTT_CNTL

DDR0_CKN[0]
DDR0_CKP[0]
DDR0_CKN[1]
DDR0_CKP[1]

DDR0_CKE[0]
DDR0_CKE[1]
DDR0_CKE[2]
DDR0_CKE[3]

DDR0_CS#[0]
DDR0_CS#[1]
DDR0_ODT[0]
DDR0_ODT[1]

DDR0_MA[3]
DDR0_MA[4]

DDR0_DQSN[0]
DDR0_DQSP[0]
DDR0_DQSN[1]
DDR0_DQSP[1]

DDR0_ALERT#

DDR0_PAR

DDR_VREF_CA

2

AU53
AT53
AU55
AT55

BA56
BB56
AW56
AY56

AU45
AU43
AT45
AT43

BA51
BB54
BA52
AY52
AW52
AY55
AW54
BA54
BA55
AY54

AU46
AU48
AT46
AU50
AU52
AY51
AT48
AT50
BB50
AY50
BA50
BB52

DDRA_DQS#0

AM70

DDRA_DQS0

AM69

DDRA_DQS#1

AT69

DDRA_DQS1

AT70

DDRA_DQS#2

BA64

DDRA_DQS2

AY64

DDRA_DQS#3

AY60

DDRA_DQS3

BA60

DDRA_DQS#4

BA38

DDRA_DQS4

AY38

DDRA_DQS#5

AY34

DDRA_DQS5

BA34

DDRA_DQS#6

BA30

DDRA_DQS6

AY30

DDRA_DQS#7

AY26

DDRA_DQS7

BA26

AW50
AT52

AY67
AY68
BA67

DDR_VTT_CNTL

AW67

?

DDRA_CLK0# 17
DDRA_CLK0 17

DDRA_CKE0 17

DDRA_CS0# 17

DDRA_ODT0 17

DDRA_MA5 17
DDRA_MA9 17
DDRA_MA6 17
DDRA_MA8 17
DDRA_MA7 17
DDRA_BG0 17
DDRA_MA12 17
DDRA_MA11 17
DDRA_ACT# 17

DDRA_MA13 17
DDRA_MA15_CAS# 17
DDRA_MA14_WE# 17
DDRA_MA16_RAS# 17
DDRA_BS0# 17
DDRA_MA2 17
DDRA_BS1# 17
DDRA_MA10 17
DDRA_MA1 17
DDRA_MA0 17
DDRA_MA3 17
DDRA_MA4 17

DDRA_ALERT# 17
DDRA_PAR 17

DDR_SA_VREFCA 17

DDR_SB_VREFCA 18

DDRA_DQS#[0..7]

DDRA_DQS[0..7]

DDRA_DQS#[0..7] 17

DDRA_DQS[0..7] 17

SMVREF

WIDTH:20MIL
SPACING: 20MIL

1

+1.2V

1 2

RC3

1K_0402_5%

DDR_VTT_CNTL

A A

5

4

2

B

RC29

10K_0402_5%

C

QC18

E

3 1

MMBT3904WH_SOT323-3

@

1 2

CPU_DRAMPG_CNTL 55

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE C ENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE C ENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE C ENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

3

2015/08/20

2015/08/20

2015/08/20

LC Future Center Secret Data

LC Future Center Secret Data

LC Future Center Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

2016/08/20

2016/08/20

2016/08/20

Title

Title

Title

MCP (DDR4)

MCP (DDR4)

MCP (DDR4)

Size Document Number Re v

Size Document Number Re v

Size Document Number Re v

Custom

Custom

Custom

Date : Sheet of

Date : Sheet of

Date : Sheet of

DG421

DG421

DG421

Sunday, January 22, 2017

Sunday, January 22, 2017

Sunday, January 22, 2017

5 60

5 60

1

5 60

1.0

1.0

1.0

5

DDRB_DQ[0..63]18

D D

C C

B B

4

DDRB_DQ0
DDRB_DQ1
DDRB_DQ2
DDRB_DQ3
DDRB_DQ4
DDRB_DQ5
DDRB_DQ6
DDRB_DQ7
DDRB_DQ8
DDRB_DQ9
DDRB_DQ10
DDRB_DQ11
DDRB_DQ12
DDRB_DQ13
DDRB_DQ14
DDRB_DQ15
DDRB_DQ16
DDRB_DQ17
DDRB_DQ18
DDRB_DQ19
DDRB_DQ20
DDRB_DQ21
DDRB_DQ22
DDRB_DQ23
DDRB_DQ24
DDRB_DQ25
DDRB_DQ26
DDRB_DQ27
DDRB_DQ28
DDRB_DQ29
DDRB_DQ30
DDRB_DQ31
DDRB_DQ32
DDRB_DQ33
DDRB_DQ34
DDRB_DQ35
DDRB_DQ36
DDRB_DQ37
DDRB_DQ38
DDRB_DQ39
DDRB_DQ40
DDRB_DQ41
DDRB_DQ42
DDRB_DQ43
DDRB_DQ44
DDRB_DQ45
DDRB_DQ46
DDRB_DQ47
DDRB_DQ48
DDRB_DQ49
DDRB_DQ50
DDRB_DQ51
DDRB_DQ52
DDRB_DQ53
DDRB_DQ54
DDRB_DQ55
DDRB_DQ56
DDRB_DQ57
DDRB_DQ58
DDRB_DQ59
DDRB_DQ60
DDRB_DQ61
DDRB_DQ62
DDRB_DQ63

UC1C

AF65

DDR1_DQ[0]/DDR0_DQ[16]

AF64

DDR1_DQ[1]/DDR0_DQ[17]

AK65

DDR1_DQ[2]/DDR0_DQ[18]

AK64

DDR1_DQ[3]/DDR0_DQ[19]

AF66

DDR1_DQ[4]/DDR0_DQ[20]

AF67

DDR1_DQ[5]/DDR0_DQ[21]

AK67

DDR1_DQ[6]/DDR0_DQ[22]

AK66

DDR1_DQ[7]/DDR0_DQ[23]

AF70

DDR1_DQ[8]/DDR0_DQ[24]

AF68

DDR1_DQ[9]/DDR0_DQ[25]

AH71

DDR1_DQ[10]/DDR0_DQ[26]

AH68

DDR1_DQ[11]/DDR0_DQ[27]

AF71

DDR1_DQ[12]/DDR0_DQ[28]

AF69

DDR1_DQ[13]/DDR0_DQ[29]

AH70

DDR1_DQ[14]/DDR0_DQ[30]

AH69

DDR1_DQ[15]/DDR0_DQ[31]

AT66

DDR1_DQ[16]/DDR0_DQ[48]

AU66

DDR1_DQ[17]/DDR0_DQ[49]

AP65

DDR1_DQ[18]/DDR0_DQ[50]

AN65

DDR1_DQ[19]/DDR0_DQ[51]

AN66

DDR1_DQ[20]/DDR0_DQ[52]

AP66

DDR1_DQ[21]/DDR0_DQ[53]

AT65

DDR1_DQ[22]/DDR0_DQ[54]

AU65

DDR1_DQ[23]/DDR0_DQ[55]

AT61

DDR1_DQ[24]/DDR0_DQ[56]

AU61

DDR1_DQ[25]/DDR0_DQ[57]

AP60

DDR1_DQ[26]/DDR0_DQ[58]

AN60

DDR1_DQ[27]/DDR0_DQ[59]

AN61

DDR1_DQ[28]/DDR0_DQ[60]

AP61

DDR1_DQ[29]/DDR0_DQ[61]

AT60

DDR1_DQ[30]/DDR0_DQ[62]

AU60

DDR1_DQ[31]/DDR0_DQ[63]

AU40

DDR1_DQ[32]/DDR1_DQ[16]

AT40

DDR1_DQ[33]/DDR1_DQ[17]

AT37

DDR1_DQ[34]/DDR1_DQ[18]

AU37

DDR1_DQ[35]/DDR1_DQ[19]

AR40

DDR1_DQ[36]/DDR1_DQ[20]

AP40

DDR1_DQ[37]/DDR1_DQ[21]

AP37

DDR1_DQ[38]/DDR1_DQ[22]

AR37

DDR1_DQ[39]/DDR1_DQ[23]

AT33

DDR1_DQ[40]/DDR1_DQ[24]

AU33

DDR1_DQ[41]/DDR1_DQ[25]

AU30

DDR1_DQ[42]/DDR1_DQ[26]

AT30

DDR1_DQ[43]/DDR1_DQ[27]

AR33

DDR1_DQ[44]/DDR1_DQ[28]

AP33

DDR1_DQ[45]/DDR1_DQ[29]

AR30

DDR1_DQ[46]/DDR1_DQ[30]

AP30

DDR1_DQ[47]/DDR1_DQ[31]

AU27

DDR1_DQ[48]

AT27

DDR1_DQ[49]

AT25

DDR1_DQ[50]

AU25

DDR1_DQ[51]

AP27

DDR1_DQ[52]

AN27

DDR1_DQ[53]

AN25

DDR1_DQ[54]

AP25

DDR1_DQ[55]

AT22

DDR1_DQ[56]

AU22

DDR1_DQ[57]

AU21

DDR1_DQ[58]

AT21

DDR1_DQ[59]

AN22

DDR1_DQ[60]

AP22

DDR1_DQ[61]

AP21

DDR1_DQ[62]

AN21

DDR1_DQ[63]

SKYLAKE-U_BGA1356

REV = 1

@

3

?

SKL_U LT

DDR1_CKN[0]
DDR1_CKN[1]
DDR1_CKP[0]
DDR1_CKP[1]

DDR1_CKE[0]
DDR1_CKE[1]
DDR1_CKE[2]
DDR1_CKE[3]

DDR1_CS#[0]
DDR1_CS#[1]
DDR1_ODT[0]

DDR1_MA[5]/DDR1_CAA[0]/DDR1_MA[5]
DDR1_MA[9]/DDR1_CAA[1]/DDR1_MA[9]
DDR1_MA[6]/DDR1_CAA[2]/DDR1_MA[6]
DDR1_MA[8]/DDR1_CAA[3]/DDR1_MA[8]
DDR1_MA[7]/DDR1_CAA[4]/DDR1_MA[7]

DDR1_BA[2]/DDR1_CAA[5]/DDR1_BG[0]
DDR1_MA[12]/DDR1_CAA[6]/DDR1_M A[12]
DDR1_MA[11]/DDR1_CAA[7]/DDR1_M A[11]

DDR1_MA[15]/DDR1_CAA[8]/DDR1_ACT#
DDR1_MA[14]/DDR1_CAA[9]/DDR1_BG[1 ]

DDR1_MA[13]/DDR1_CAB[0]/DDR1_M A[13]

DDR1_CAS#/DDR1_CAB[1]/DDR1_MA[15]

DDR1_WE#/DDR1_CAB[2]/DDR 1_MA[14]

DDR1_RAS#/DDR1_CAB[3]/DDR1_MA[16]

DDR1_BA[0]/DDR1_CAB[4]/DDR1_BA[0]

DDR1_MA[2]/DDR1_CAB[5]/DDR1_MA[2]

DDR1_BA[1]/DDR1_CAB[6]/DDR1_BA[1]
DDR1_MA[10]/DDR1_CAB[7]/DDR1_M A[10]

DDR1_MA[1]/DDR1_CAB[8]/DDR1_MA[1]
DDR1_MA[0]/DDR1_CAB[9]/DDR1_MA[0]

DDR1_DQSN[0]/DDR0_DQSN[2]

DDR1_DQSP[0]/DDR0_DQSP[2]

DDR1_DQSN[1]/DDR0_DQSN[3]

DDR1_DQSP[1]/DDR0_DQSP[3]

DDR1_DQSN[2]/DDR0_DQSN[6]

DDR1_DQSP[2]/DDR0_DQSP[6]

DDR1_DQSN[3]/DDR0_DQSN[7]

DDR1_DQSP[3]/DDR0_DQSP[7]

DDR1_DQSN[4]/DDR1_DQSN[2]

DDR1_DQSP[4]/DDR1_DQSP[2]

DDR1_DQSN[5]/DDR1_DQSN[3]

DDR1_DQSP[5]/DDR1_DQSP[3]

DDR1_ODT[1]

DDR1_MA[3]
DDR1_MA[4]

DDR1_DQSN[6]
DDR1_DQSP[6]
DDR1_DQSN[7]
DDR1_DQSP[7]

DDR1_ALERT#

DRAM_RESET#
DDR_RCOMP[0]
DDR_RCOMP[1]

DDR CH - B

1 OF 20

DDR_RCOMP[2]

DDR1_PAR

AN45
AN46
AP45
AP46

AN56
AP55
AN55
AP53

BB42
AY42
BA42
AW42

AY48
AP50
BA48
BB48
AP48
AP52
AN50
AN48
AN53
AN52

BA43
AY43
AY44
AW44
BB44
AY47
BA44
AW46
AY46
BA46
BB46
BA47

AH66
AH65
AG69
AG70
AR66
AR65
AR61
AR60
AT38
AR38
AT32
AR32
AR25
AR27
AR22
AR21

AN43
AP43
AT13
AR18
AT18
AU18

?

DDRB_DQS#0
DDRB_DQS0
DDRB_DQS#1
DDRB_DQS1
DDRB_DQS#2
DDRB_DQS2
DDRB_DQS#3
DDRB_DQS3
DDRB_DQS#4
DDRB_DQS4
DDRB_DQS#5
DDRB_DQS5
DDRB_DQS#6
DDRB_DQS6
DDRB_DQS#7
DDRB_DQS7

CPU_DRAMRST#_R
SM_RCOMP_0
SM_RCOMP_1
SM_RCOMP_2

2

DDRB_CLK0# 18
DDRB_CLK1# 18
DDRB_CLK0 18
DDRB_CLK1 18

DDRB_CKE0 18
DDRB_CKE1 18

DDRB_CS0# 18
DDRB_CS1# 18
DDRB_ODT0 18
DDRB_ODT1 18

DDRB_MA5 18
DDRB_MA9 18
DDRB_MA6 18
DDRB_MA8 18
DDRB_MA7 18
DDRB_BG0 18
DDRB_MA12 18
DDRB_MA11 18
DDRB_ACT# 18
DDRB_BG1 18

DDRB_MA13 18
DDRB_MA15_CAS# 18
DDRB_MA14_WE# 18
DDRB_MA16_RAS# 18
DDRB_BS0# 18
DDRB_MA2 18
DDRB_BS1# 18
DDRB_MA10 18
DDRB_MA1 18
DDRB_MA0 18
DDRB_MA3 18
DDRB_MA4 18

DDRB_DQS#[0..7]

DDRB_DQS[0..7]

DDRB_ALERT# 18

DDRB_PAR 18

1 2

RC24 121_0402_1%
RC25 80.6_0402_1%1 2

1 2

RC26 100_0402_1%

1

DDRB_DQS#[0..7] 18

DDRB_DQS[0..7] 18

+1.2V

12

RC22
470_0402_5%

2015/08/20

2015/08/20

2015/08/20

CPU_DRAMRST#_R

LC Future Center Secret Data

LC Future Center Secret Data

LC Future Center Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

2016/08/20

2016/08/20

2016/08/20

Titl e

Titl e

Titl e

MCP (DDR4)

MCP (DDR4)

MCP (DDR4)

Size Document Number Re v

Size Document Number Re v

Size Document Number Re v

Custom

Custom

Custom

Date : Sheet o f

Date : Sheet o f

Date : Sheet o f

DG421

DG421

DG421

Sunday, January 22, 2017

Sunday, January 22, 2017

Sunday, January 22, 2017

6 60

6 60

6 60

1

1.0

1.0

1.0

1 2

CPU_DRAMRST#17,18

A A

5

4

RC23 0_0402_5%@

1

CC1
1000P_0201_50V7-K

EMC@

2

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D
DEPARTMENT EXCEPT A S AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT A S AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT A S AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

3

5

4

3

2

1

?

UC1E

AW13

AY11

AV2

AW3

AV3

AW2

AU4
AU3
AU2
AU1

M2
M3

J4
V1
V2
M1

G3
G2
G1

SPI - FLASH

SPI0_CLK
SPI0_MISO
SPI0_MOSI
SPI0_IO2
SPI0_IO3
SPI0_CS0#
SPI0_CS1#
SPI0_CS2#

SPI - TOUCH

GPP_D1/SPI1_CLK
GPP_D2/SPI1_MISO
GPP_D3/SPI1_MOSI
GPP_D21/SPI1_IO 2
GPP_D22/SPI1_IO 3
GPP_D0/SPI1_CS#

C LINK

CL_CLK
CL_DATA
CL_RST#

GPP_A0/RCIN#

GPP_A6/SERIRQ

SKYLAKE-U_BGA1356

REV = 1

@

2.2K_0404_4P2R_5%

PCH_SML1_CLK

PCH_SML1_DAT

D D

SPI_CLK4 4

SPI_SO44

SPI_SI44

SPI_CS0#44

C C

Check with BIOS, SPI is Dual mode or quad mode

B B

SPI_CLK SPI_CLK_R

SPI_SO

SPI_SI

SPI_CS0# SPI_CS0#_R

+3VS

+3V_SPI

1. If support DS3, connect to +3VS and don't support EC mirror code;

2. If don't support DS3, connect to +3VALW_PCH and support EC mirror code.

*

SPI_WP#_R

SPI_HOLD#_R

SPI_CS0#

SPI_SO

SPI_WP#

1 2

RC1539 15_0402_5%

1 2

RC53 15_0402_5%

1 2

RC52 15_0402_5%

1 2

RC51 0_0402_5%@

+3VALW_PCH

RC171 0_0402_5%@

RC172 0_0402_5%@

1 2

RC54 15_0402_5%@

1 2

RC55 15_0402_5%@

UC3

1

/CS

2

DO (IO1)

3

IO2

GND4DI (IO0)

W25Q64JVSSIQ_SO8

1 2

1 2

VCC

CLK

1K_0402_5%

IO3

SPI_SO_R

SPI_SI_R

+3V_SPI

+3V_SPI

12

12

RC61

RC60

1K_0402_5%

8

SPI_HOLD#

7

SPI_CLK

6

SPI_SI

5

SPI_WP#

SPI_HOLD#

+3V_SPI

BOARD_ID48

KBRST#44

SERIRQ32,44

1

CC8

0.1u_0201_10V6K

2

SPI_CLK_R
SPI_SO_R
SPI_SI_R
SPI_WP#_R
SPI_HOLD#_R
SPI_CS0#_R

BOARD_ID4

KBRST#

SERIRQ

SKL_ ULT

SMBUS, SMLINK

GPP_B23/SML1A LERT#/PCHHOT#

LPC

GPP_A5/LFRAME#/E SPI_CS#

GPP_A14/SUS_STAT#/ESP I_RESET#

GPP_A9/CLKOUT_LPC0 /ESPI_CLK

1 OF 20

check CLKRUN# / SUS_STAT# signal if need to connect

PM_CLKRUN#

SERIRQ

KBRST#

KBRST#

+3VALW_PCH +3VS

RPC25

1 4

1 2

RC11 8.2K_0402_5%

1 2

RC12 10K_0402_5%

1 2

RC10 10K_0402_5%

1 2

CC1255 1000P_0201_50V7-K

EMC_NS@

2

2 3

6 1

QC10A

D

2N7002KDWH_SOT363-6

G

S

QC10B

2N7002KDWH_SOT363-6

GPP_C0/SMBCLK

GPP_C1/SMBDATA

GPP_C2/SMBALERT#

GPP_C3/SML0CLK

GPP_C4/SML0DATA

GPP_C5/SML0ALERT#

GPP_C6/SML1CLK

GPP_C7/SML1DATA

GPP_A1/LAD0/ES PI_IO0
GPP_A2/LAD1/ES PI_IO1
GPP_A3/LAD2/ES PI_IO2
GPP_A4/LAD3/ES PI_IO3

GPP_A10/CLKOUT_LP C1

GPP_A8/CLKRUN#

@

5

G

3 4

@

S

D

PCH_SMB_CLK

R7

PCH_SMB_DATA

R8

SMB_ALERT#

R10

SML0_CLK

R9

SML0_DATA

W2

SML0_ALERT#

W1

PCH_SML1_CLK

W3

PCH_SML1_DAT

V3

SML1_ALERT#

AM7

AY13
BA13
BB13
AY12
BA12

SUS_STAT#

BA11

CLK_PCI_EC_R

AW9

CLK_PCI_TPM_R

AY9

PM_CLKRUN#

AW11

?

+3VS

DIMM, NGFF

GPU, EC, Thermal Sensor

RC173 22_0402_5%
RC1541 22_0402_5%TPM@

EC_SMB_CK2 20,39,44

EC_SMB_DA2 20,39,44

LPC_AD0 32,44
LPC_AD1 32,44
LPC_AD2 32,44
LPC_AD3 32,44
LPC_FRAME# 32,44

12
12

1

To enable Direct Connect Interface (DCI), a 150K pull up resistor will need to be
added to PCHH OT# pin. This pin must be low during the rising edge of RSMRST#.
(Refer to WW 52_MOW)

+3VALW_PCH +3VS +3VS

RPC20

2.2K_0404_4P2R_5%

PCH_SMB_CLK

PCH_SMB_DATA

TC81@

CLK_PCI_EC 44
CLK_PCI_TPM 32
PM_CLKRUN# 32

SMB_ALERT#

SML0_CLK
SML0_DATA

SML0_ALERT#

This signal has a weak internal pull-down.
0 = LPC Is selected for EC. (Default)
1 = eSPI Is selected for EC.
Notes:

1. The internal pull-down is disabled after RSMRST#
de-asser ts.

2. This signal is in the primary wel
Rising edge of RSMRST#

SML1_ALERT#

1 4

2 3

2.2K_0404_4P2R_5%

RC1564 2.2K_0402_5%@

1 2

RC1569 150K_0402_5%@

1 2

RC1655 150K_0402_5%

QC2A

2N7002KDWH_SOT363-6

12

2.2K_0402_5%

RPC23

14
23

12

2

6 1

D

QC2B

RC1562

G

S

5

G

3 4

D

2N7002KDWH_SOT363-6

+3VALW_PCH

+3VALW_PCH

+3VALW_PCH

+3VALW_PCH

S

RPC24

2.2K_0404_4P2R_5%

1 4

2 3

+3VS

SMB_CLK_S3 18,40

SMB_DATA_S3 18,40

A A

Titl e

Titl e

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROP RIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROP RIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROP RIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT O F LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT O F LC FUTURE CENTER.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT O F LC FUTURE CENTER.

3

2015/08/20

2015/08/20

2015/08/20

LC Future Cente r Secret Data

LC Future Cente r Secret Data

LC Future Cente r Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

2016/08/20

2016/08/20

2016/08/20

Titl e

MCP (MISC,JTAG,SPI,LPC,SMB)

MCP (MISC,JTAG,SPI,LPC,SMB)

MCP (MISC,JTAG,SPI,LPC,SMB)

Size Document Number Re v

Size Document Number Re v

Size Document Number Re v

C

C

C

Date: Sheet of

Date: Sheet of

Date: Sheet of

DG421

DG421

DG421

Sunday, J anuary 22, 2017

Sunday, J anuary 22, 2017

Sunday, J anuary 22, 2017

7 60

7 60

1

7 60

1.0

1.0

1.0

5

@DIS For NV and AMD GPU SKU @OPT&GC6 Only for NV GPU SKU @UMA SKU

+3VS

1 2

1 2

1 2

DIS@

RPC28

1 4
2 3

12

+3VS

RC1600 1K_0402_5%@

RC47 1K_0402_5%@

For EMI

CC7
10P_0201_50V8F

EMC_NS@

HDA_SDOUT_AUDIO30
ME_FLASH44

1 2

RC14 2.2K_0402_5%@

12

DGPU_PWROK

12
12
12

1 2

1 2

RC1559 10K_0402_5%DIS@

RC1641 10K_0402_5%@

RC1557 10K_0402_5%DIS@

D D

C C

B B

CC1259 0.01U_0201_10V6K

+3VS

2.2K_0404_4P2R_5%

RC1658 10K_0402_5%

10 / 2 5 SIT For I2C T/ P Funct ion wei

+3VS

RC1595 10K_0402_5%@
RC1596 10K_0402_5%
RC1597 10K_0402_5%

double check if need the pull up resisor

+3VALW_PCH

*

HDA_SDO This signal has a weak internal pull-down.
0 = Enable security measures defined in the Flash Descriptor.
1 = Disable Flash Descriptor S ecurity(override). This strap
should only be asserted high during external pull-up in
manufacturing/debug environments ONLY.

1

2

+3VS

Pin Name Strap Descri ption Configura tion

SPKR /

Top Swap

GPP_B14

Override

GSPI0_MOS I

No Reboot

A A

/GPP_B18

GSPI1_MOS I
/GPP_B22

Boot BIOS
Strap Bit
BBS

PXS_PWREN_R

PXS_RST#_R

Reserve for GPU sequence

PXS_RST#_R

PXS_RST#

DGPU_PWROK 24,55,57,58

PCH_I2C_SDA0
PCH_I2C_SCL0

PCH_TP_INT#

PCH_CMOS_ON#
PCH_WLAN_OFF#
PCH_BT_OFF#

HDA_SDOUT

HDA_SDIN0

1 2

RC45 33_0402_5%

1 2

RC46 0_0402_5%@

PCH_BEEP

Internal PD

0 = Disable “ Top Swap”
mode. (Default)
1 = Enable “ Top Swap”
mode .

Internal PD

0 = Disable “ No Reboot”
mode. (Default)
1 = Enable “ No Reboot”
mode

Internal PD
0 = SPI (Default)
1 = LPC

RC8 0_0402_5%@

TP_I2C_SDA045
TP_I2C_SCL045

PCH_CMOS_ON#33

UART_RX_DEBUG40
UART_TX_DEBUG40

PCH_WLAN_OFF#40
PCH_BT_OFF#40

HDA_SYNC_AUDIO30
HDA_BITCLK_AUDIO30

HDA_SDIN030

HDA_RST_AUDIO#30

HDA_SDOUT

*

*

1 2

+3VS

PCH_BEEP30

Default
Value

12

RC71K_0402_5% D IS@

1 2

RC1561 2.2K_0402_5%@

1 2

RC1563 2.2K_0402_5%@

1 2

RC1656 0_0402_5%@

1 2

RC1657 0_0402_5%@

When
Sampled

0*Rising ed ge

of P CH_PWROK

Rising ed ge

0

of P CH_PWROK

Rising ed ge

0

of P CH_PWROK

4

PXS_PWREN 22,58

PXS_RST# 20

GPP_B18

GPP_B22

PXS_PWREN_R

1

TC206 @
TC207 @
TC208 @
TC204 @

1 2

RC43 33_0402_5%

1 2

RC42 33_0402_5%

1 2

RC44 33_0402_5%

1
1
1

PCH_I2C_SDA0
PCH_I2C_SCL0

PCH_WLAN_OFF#
PCH_BT_OFF#

PXS_RST#_R
DGPU_PWROK
FB_GC6_EN_R

+3VS

RC1629 10K_0402_5%@

RC1630 10K_0402_5%GC6@

RC1637 10K_0402_5%OPT@

RC1638 10K_0402_5%@

HDA_SYNC
HDA_BCLK
HDA_SDOUT
HDA_SDIN0

HDA_RST#

BOARD_ID10
BOARD_ID9

PCH_BEEP

1 2

1 2

1 2

1 2

UC1F

AN8

GPP_B15/GSPI0_ CS#

AP7

GPP_B16/GSPI0_ CLK

AP8

GPP_B17/GSPI0_ MISO

AR7

GPP_B18/GSPI0_ MOSI

AM5

GPP_B19/GSPI1_ CS#

AN7

GPP_B20/GSPI1_ CLK

AP5

GPP_B21/GSPI1_ MISO

AN5

GPP_B22/GSPI1_ MOSI

AB1

GPP_C8/UART0_RXD

AB2

GPP_C9/UART0_TXD

W4

GPP_C10/UART0_RTS#

AB3

GPP_C11/UART0_CTS#

AD1

GPP_C20/UART2_RXD

AD2

GPP_C21/UART2_TXD

AD3

GPP_C22/UART2_RTS#

AD4

GPP_C23/UART2_CTS#

U7

GPP_C16/I2C0_S DA

U6

GPP_C17/I2C0_SCL

U8

GPP_C18/I2C1_SDA

U9

GPP_C19/I2C1_SCL

AH9

GPP_F4/I2C2_SDA

AH10

GPP_F5/I2C2_SCL

AH11

GPP_F6/I2C3_SDA

AH12

GPP_F7/I2C3_SCL

AF11

GPP_F8/I2C4_SDA

AF12

GPP_F9/I2C4_SCL

SKYLAKE-U_BGA1356

REV = 1
@

AW22

AW20

3

FB_GC6_EN_R

GPU_EVENT#

FB_GC6_EN_R

GPU_EVENT#

LPSS ISH

UC1G

AUDIO

BA22

HDA_SYNC/I2S0_SFRM

AY22

HDA_BLK/I2S0_SCL K

BB22

HDA_SDO/I2S0_TXD

BA21

HDA_SDI0/I2S0_RXD

AY21

HDA_SDI1/I2S1_RXD
HDA_RST#/I2S1_SCLK

J5

GPP_D23/I2S_MCLK

AY20

I2S1_SFRM
I2S1_TXD

AK7

GPP_F1/I2S2_S FRM

AK6

GPP_F0/I2S2_S CLK

AK9

GPP_F2/I2S2_TXD

AK10

GPP_F3/I2S2_RX D

H5

GPP_D19/DMIC_CLK0

D7

GPP_D20/DMIC_DATA0

D8

GPP_D17/DMIC_CLK1

C8

GPP_D18/DMIC_DATA1

AW5

GPP_B14/SPKR

SKYLAKE-U_BGA1356

REV = 1
@

GPU_EVENT# 20

FB_GC6_EN_R 20

?

SKL_ ULT

GPP_D13/ISH_UART0_RXD/S ML0BDATA/I2C4B_SDA

GPP_D14/ISH_UART0_TXD/SML0 BCLK/I2C4B_SCL

1 OF 20

SKL_ ULT

?

1 OF 20

1 2

RC1558 10K_0402_5%UMA@

GPP_D9
GPP_D10
GPP_D11
GPP_D12

GPP_D5/ISH_I2C0_S DA
GPP_D6/ISH_I2C0_S CL

GPP_D7/ISH_I2C1_S DA
GPP_D8/ISH_I2C1_S CL

GPP_F10/I2C5_S DA/ISH_I2C2_SDA

GPP_F11/I2C5_S CL/ISH_I2C2_SCL

GPP_D15/ISH_UART0_RTS#

GPP_D16/ISH_UART0_CTS#/SML 0BALERT#

GPP_C12/UART1_RXD/ISH_UA RT1_RXD

GPP_C13/UART1_TXD/ISH_UART1_TXD
GPP_C14/UART1_RTS#/ISH_UART1_RTS#
GPP_C15/UART1_CTS#/ISH_UART1_CTS#

GPP_A17/SD_PW R_EN#/ISH_GP7

GPP_A18/ISH_GP0
GPP_A19/ISH_GP1
GPP_A20/ISH_GP2
GPP_A21/ISH_GP3
GPP_A22/ISH_GP4
GPP_A23/ISH_GP5

GPP_A12/BM_BUSY#/ ISH_GP6

SDIO/SDXC

GPP_G0/SD_CMD
GPP_G1/SD_DATA0
GPP_G2/SD_DATA1
GPP_G3/SD_DATA2
GPP_G4/SD_DATA3

GPP_G5/SD_CD#
GPP_G6/SD_CLK

GPP_G7/SD_WP

GPP_A16/SD_1P8 _SEL

SD_RCOMP

?

GPP_F23

2

DGPU_PWROK

15@

14@

Descriptio nBoard ID

00

01

10

@

RC1613

1 2

10K_0402_5%

@

RC1614

1 2

10K_0402_5%

00

01

10

11

0

1

0

1

0

1

0

1

12

RC1632

10K_0402_5%

@

12

RC1635

10K_0402_5%

Samsung 8 Gb

2400 MT/s

Hynix 8Gb

2400 MT/s

Micron 8G b

2400 MT/s

RC1611

1 2

RC1612

1 2

14"

15"

17"

Reserved

Reserved

Reserved

UMA

DIS

NV GPU

AMD GPU

Reserved

Reserved

520Z@

320G@

@

RC1615

1 2

BOARD_ID0
BOARD_ID1

BOARD_ID29

BOARD_ID47

BOARD_ID0

P2

BOARD_ID1

P3
P4

BOARD_ID3

P1

BOARD_ID6

M4

BOARD_ID5PCH_CMOS_ON#

N3

BOARD_ID7

N1

BOARD_ID8

N2

AD11
AD12

U1
U2
U3
U4

AC1
AC2

GPU_EVENT#

AC3
AB4

AY8
BA8
BB7
BA7
AY7
AW7
AP13

?

AB11
AB13
AB12
W12
W11
W10
W8
W7

BA9
BB9

SD_RCOMP

AB7

AF13

12

RC49
200_0402_1%

1

TC205@

PCH_TP_INT# 45

BOARD_ID2
BOARD_ID3
BOARD_ID4
BOARD_ID5

BOARD_ID6
BOARD_ID7
BOARD_ID8
BOARD_ID9
BOARD_ID10

10K_0402_5%

RC1616

1 2

10K_0402_5%

Board ID Description

Board_ID[0: 1]

Board_ID2

Board_ID3

Board_ID4

Board_ID5

DIMM_ONLY@

DIMM_ONLY@

12

RC1631

10K_0402_5%

@

12

RC1634

10K_0402_5%

Board_ID
[6,7]

11 SO-DIMM Only

Board_ID8

Board_ID9

Board_ID1 0

01320G RC16 36

520Z

01Reserved

Reserved

Reserved

0

Reserved

1

DIS@

10K_0402_5%

UMA@

10K_0402_5%

12

RC1633

10K_0402_5%

12

RC1636

10K_0402_5%

Stuff R

RC1634 RC163 5

RC1631

RC1631

RC1633

RC1640

RC1639

RC1652

RC1651

1

PX@

RC1609

RC1608

1 2

1 2

10K_0402_5%

OPT@

RC1610

RC1607

1 2

1 2

10K_0402_5%

Stuff R

RC1616

RC1614

RC1616 RC161 3

RC1615

RC1614

RC1615 RC161 3

RC1612

RC1611

RC1610

RC1609

RC1607

RC1608

RC123

RC1606

@

12

RC1639

10K_0402_5%

@

12

RC1640

10K_0402_5%

RC1632RC163 4

RC1635

RC1632

+3VS

@

RC1606

1 2

10K_0402_5%

10K_0402_5%

@

RC123

10K_0402_5%

1 2

10K_0402_5%

+3VS

@

12

RC1651

10K_0402_5%

@

12

RC1652

10K_0402_5%

Titl e

Titl e

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROP RIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROP RIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROP RIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT O F LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT O F LC FUTURE CENTER.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT O F LC FUTURE CENTER.

3

2015/08/20

2015/08/20

2015/08/20

LC Future Cente r Secret Data

LC Future Cente r Secret Data

LC Future Cente r Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

2016/08/20

2016/08/20

2016/08/20

Titl e

MCP (LPSS,ISH,AUDIO,SDIO)

MCP (LPSS,ISH,AUDIO,SDIO)

MCP (LPSS,ISH,AUDIO,SDIO)

Size Document Number Re v

Size Document Number Re v

Size Document Number Re v

C

C

C

Date: Sheet of

Date: Sheet of

Date: Sheet of

DG421

DG421

DG421

Sunday, J anuary 22, 2017

Sunday, J anuary 22, 2017

Sunday, J anuary 22, 2017

8 60

8 60

1

8 60

1.0

1.0

1.0

5

4

3

2

1

@DIS For NV and AMD GPU SKU

D D

DGPU

C C

LAN

WLAN

SATA HDD

SATA ODD

Optane Memory

B B

A A

PCIE_CRX_GTX_N[0..3]20

PCIE_CRX_GTX_P[0..3]20

PCIE_CTX_C_GRX_N[0..3]20

PCIE_CTX_C_GRX_P[0..3]20

PCIE_CRX_GTX_N0

PCIE_CTX_C_GRX_N0 PCIE_CTX_GRX_N0
PCIE_CTX_C_GRX_P0

PCIE_CTX_C_GRX_N1 PCIE_CTX_GRX_N1
PCIE_CTX_C_GRX_P1

PCIE_CTX_C_GRX_N2
PCIE_CTX_C_GRX_P2 PCIE_CTX_GRX_P2

PCIE_CTX_C_GRX_N3 PCIE_CTX_GRX_N3
PCIE_CTX_C_GRX_P3 PCIE_CTX_GRX_P3

PCIE_PRX_DTX_N537
PCIE_PRX_DTX_P537
PCIE_PTX_C_DRX_N537
PCIE_PTX_C_DRX_P537

PCIE_PRX_DTX_N640
PCIE_PRX_DTX_P640
PCIE_PTX_C_DRX_N640
PCIE_PTX_C_DRX_P640

SATA_PRX_DTX_N042
SATA_PRX_DTX_P042
SATA_PTX_DRX_N042
SATA_PTX_DRX_P042

SATA_PRX_DTX_N142
SATA_PRX_DTX_P142
SATA_PTX_DRX_N142
SATA_PTX_DRX_P142

PCIE_RCOMPN and PCIE_RCOMPP
Trace Width: 12-15mil
Differential between RCOMPP/RCOMPN

+3VS

CC1262 0.1u_0201_10V6K1 2
CC1261 0.1u_0201_10V6K

CC1264 0.1u_0201_10V6K1 2
CC1263 0.1u_0201_10V6K

1 2

RC119 100_0402_1%

1 8
2 7
3 6
4 5

10K_0804_8P4R_5%

RPC2

1 2

1 2

1 2

1 2

1 2

1 2

TC20PAD @
TC19PAD @ 1

CC160.22U_0201_6.3V6-K DIS@ 1 2
CC140.22U_0201_6.3V6-K DIS@

CC150.22U_0201_6.3V6-K DIS@ 1 2
CC170.22U_0201_6.3V6-K DIS@

CC180.22U_0201_6.3V6-K DIS@ 1 2
CC190.22U_0201_6.3V6-K DIS@

CC200.22U_0201_6.3V6-K DIS@ 1 2
CC210.22U_0201_6.3V6-K DIS@

ODD_DETECT#
SATA0GP

SATA2GP
PIRQA#

PCIE_CRX_GTX_P0

PCIE_CTX_GRX_P0

PCIE_CRX_GTX_N1
PCIE_CRX_GTX_P1

PCIE_CTX_GRX_P1

PCIE_CRX_GTX_N2
PCIE_CRX_GTX_P2
PCIE_CTX_GRX_N2

PCIE_CRX_GTX_N3
PCIE_CRX_GTX_P3

PCIE_PRX_DTX_N5
PCIE_PRX_DTX_P5
PCIE_PTX_DRX_N5
PCIE_PTX_DRX_P5

PCIE_PRX_DTX_N6
PCIE_PRX_DTX_P6
PCIE_PTX_DRX_N6
PCIE_PTX_DRX_P6

SATA_PRX_DTX_N0
SATA_PRX_DTX_P0
SATA_PTX_DRX_N0
SATA_PTX_DRX_P0

SATA_PRX_DTX_N1
SATA_PRX_DTX_P1
SATA_PTX_DRX_N1
SATA_PTX_DRX_P1

PCIE_RCOMPN
PCIE_RCOMPP

XDP_PRDY#

1

XDP_PREQ#
PIRQA#

UC1H

PCIE/U SB3/S ATA

H13

PCIE1_RXN/USB3_5_RXN

G13

PCIE1_RXP/USB3_5_RXP

B17

PCIE1_TXN/USB3_5_TXN

A17

PCIE1_TXP/USB3_5_TXP

G11

PCIE2_RXN/USB3_6_RXN

F11

PCIE2_RXP/USB3_6_RXP

D16

PCIE2_TXN/USB3_6_TXN

C16

PCIE2_TXP/USB3_6_TXP

H16

PCIE3_RXN

G16

PCIE3_RXP

D17

PCIE3_TXN

C17

PCIE3_TXP

G15

PCIE4_RXN

F15

PCIE4_RXP

B19

PCIE4_TXN

A19

PCIE4_TXP

F16

PCIE5_RXN

E16

PCIE5_RXP

C19

PCIE5_TXN

D19

PCIE5_TXP

G18

PCIE6_RXN

F18

PCIE6_RXP

D20

PCIE6_TXN

C20

PCIE6_TXP

F20

PCIE7_RXN/SATA0_RXN

E20

PCIE7_RXP/SATA0_RXP

B21

PCIE7_TXN/SATA0_TXN

A21

PCIE7_TXP/SATA0_TXP

G21

PCIE8_RXN/SATA1A_RXN

F21

PCIE8_RXP/SATA1A_RXP

D21

PCIE8_TXN/SATA1A_TXN

C21

PCIE8_TXP/SATA1A_TXP

E22

PCIE9_RXN

E23

PCIE9_RXP

B23

PCIE9_TXN

A23

PCIE9_TXP

F25

PCIE10_RXN

E25

PCIE10_RXP

D23

PCIE10_TXN

C23

PCIE10_TXP

F5

PCIE_RCOMPN

E5

PCIE_RCOMPP

D56

PROC_PRDY#

D61

PROC_PREQ#

BB11

GPP_A7/PIRQA#

E28

PCIE11_RXN/SATA1B_RXN

E27

PCIE11_RXP/SATA1B_RXP

D24

PCIE11_TXN/SATA1B_TXN

C24

PCIE11_TXP/SATA1B_TXP

E30

PCIE12_RXN/SATA2_RXN

F30

PCIE12_RXP/SATA2_RXP

A25

PCIE12_TXN/SATA2_TXN

B25

PCIE12_TXP/SATA2_TXP

SKYLAKE-U_BGA1356

REV = 1
@

USB_OC0#
USB_OC1#
USB_OC3#
USB_OC2#

SKL_U LT

?

USB2

1 OF 20

RPC17

10K_0804_8P4R_5%

SSIC / USB3

GPP_E0/SATAXPCIE0/SATAGP0
GPP_E1/SATAXPCIE1/SATAGP1
GPP_E2/SATAXPCIE2/SATAGP2

18
27
36
45

USB3_1_RXN
USB3_1_RXP
USB3_1_TXN

USB3_1_TXP

USB3_2_RXN/SSIC_1_RXN
USB3_2_RXP/SSIC_1_RXP

USB3_2_TXN/SSIC_1_TXN
USB3_2_TXP/SSIC_1_TXP

USB3_3_RXN/SSIC_2_RXN
USB3_3_RXP/SSIC_2_RXP

USB3_3_TXN/SSIC_2_TXN
USB3_3_TXP/SSIC_2_TXP

USB3_4_RXN
USB3_4_RXP
USB3_4_TXN

USB3_4_TXP

USB2N_1
USB2P_1

USB2N_2
USB2P_2

USB2N_3
USB2P_3

USB2N_4
USB2P_4

USB2N_5
USB2P_5

USB2N_6
USB2P_6

USB2N_7
USB2P_7

USB2N_8
USB2P_8

USB2N_9
USB2P_9

USB2N_10
USB2P_10

USB2_COMP

USB2_ID

USB2_VBUSSENSE

GPP_E9/USB2_OC0#
GPP_E10/USB2_OC1#
GPP_E11/USB2_OC2#
GPP_E12/USB2_OC3#

GPP_E4/DEVSLP0
GPP_E5/DEVSLP1
GPP_E6/DEVSLP2

GPP_E8/SATALED#

?

+3VALW_PCH

USB30_RX_N1

H8
G8
C13
D13

J6
H6
B13
A13

J10
H10
B15
A15

E10
F10
C15
D15

AB9
AB10

AD6
AD7

AH3
AJ3

AD9
AD10

AJ1
AJ2

AF6
AF7

AH1
AH2

AF8
AF9

AG1
AG2

AH7
AH8

AB6
AG3
AG4

A9
C9
D9
B9

J1
J2
J3

H2
H3
G4

H1

USB30_RX_P1
USB30_TX_N1
USB30_TX_P1

USB30_RX_N2
USB30_RX_P2
USB30_TX_N2
USB30_TX_P2

USB30_RX_N3
USB30_RX_P3
USB30_TX_N3
USB30_TX_P3

USB20_N1
USB20_P1

USB20_N2
USB20_P2

USB20_N3
USB20_P3

USB20_N4
USB20_P4

USB20_N5
USB20_P5

USB20_N6
USB20_P6

USB20_N7
USB20_P7

USB20_N8
USB20_P8

USB2_COMP
USB2_ID
USB2_VBUSSENSE

USB_OC0#
USB_OC1#
USB_OC2#
USB_OC3#

GPP_E4
GPP_E5

SATA0GP
ODD_DETECT#

SATA2GP

BOARD_ID2

GPP_E4

USB_OC2#

USB30_RX_N1 41
USB30_RX_P1 41
USB30_TX_N1 41

USB30_TX_P1 41

USB30_RX_N2 43
USB30_RX_P2 43
USB30_TX_N2 43
USB30_TX_P2 43

USB30_RX_N3 41
USB30_RX_P3 41
USB30_TX_N3 41
USB30_TX_P3 41

USB20_N1 41
USB20_P1 41

USB20_N2 43
USB20_P2 43

USB20_N3 41
USB20_P3 41

USB20_N4 45
USB20_P4 45

USB20_N5 30
USB20_P5 30

USB20_N6 33
USB20_P6 33

USB20_N7 40
USB20_P7 40

USB20_N8 33
USB20_P8 33

RC118 113_0402_1%
RC1626 0_0402_5%@1 2
RC1627 1K_0402_5%

USB_OC1# 41

1

BOARD_ID2 8

RC1617 10K_0402_5%@ 12

RC1654 0_0402_5%@1 2

12

1 2

TC202PAD@

2016/05/0 3: Impl ement as P ower Button
function for Windows RedSt one s upport

LEFT USB3.0

Type-C

LEFT USB3.0

LEFT USB3.0

Type-C

LEFT USB3.0

Finger Print

Card reader

Touch panel

BT

Camera

RC1628 0_0402_5%@1 2

8/ 24 Reser ve TYPE_C_OCP# to CPU USB_OC2 # wei

+3VS

TYPE_C_OCP# 43

USBRBI AS

Width 20Mil
Space 15Mil
Length 50 0Mil

EC_SMI# 44

Titl e

Titl e

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D
DEPARTMENT EXCEPT A S AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT A S AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT A S AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

3

2015/08/20

2015/08/20

2015/08/20

LC Future Center Secret Data

LC Future Center Secret Data

LC Future Center Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

2016/08/20

2016/08/20

2016/08/20

Titl e

MCP (PCIE,SATA,USB3,USB2)

MCP (PCIE,SATA,USB3,USB2)

MCP (PCIE,SATA,USB3,USB2)

Size Document Number Re v

Size Document Number Re v

Size Document Number Re v

Custom

Custom

Custom

Date : Sheet o f

Date : Sheet o f

Date : Sheet o f

DG421

DG421

DG421

Sunday, January 22, 2017

Sunday, January 22, 2017

Sunday, January 22, 2017

9 60

9 60

9 60

1

1.0

1.0

1.0

5

D D

C C

check the Pul l up resistor

+3VS

RPC4

1 8
2 7
3 6
4 5

10K_0804_8P4R_5%

LAN_CLKREQ#
WLAN_CLKREQ#

GPU_CLKREQ#

@DIS For NV and AMD GPU SKU

PCIE C LK0 DGP U

CLK_PCIE_GPU#20
CLK_PCIE_GPU20
GPU_CLKREQ#20

Optane memory

PCIE C LK5 WLA N

PCIE C LK4

B B

LAN

CLK_PCIE_WLAN#40
CLK_PCIE_WLAN40
WLAN_CLKREQ#40

CLK_PCIE_LAN#37
CLK_PCIE_LAN37
LAN_CLKREQ#37

4

CLK_PCIE_GPU#
CLK_PCIE_GPU
GPU_CLKREQ#

CLK_PCIE_WLAN#
CLK_PCIE_WLAN
WLAN_CLKREQ#

CLK_PCIE_LAN#
CLK_PCIE_LAN
LAN_CLKREQ#

A36
B36
C38
D38
C36
D36
A38
B38

C31
D31
C33
D33
A31
B31
A33
B33

A29
B29
C28
D28
A27
B27
C27
D27

SKYLAKE-U_BGA1356

REV = 1
@

UC1J

D42

CLKOUT_PCIE_N0

C42

CLKOUT_PCIE_P0

AR10

GPP_B5/SRCCLKREQ0#

B42

CLKOUT_PCIE_N1

A42

CLKOUT_PCIE_P1

AT7

GPP_B6/SRCCLKREQ1#

D41

CLKOUT_PCIE_N2

C41

CLKOUT_PCIE_P2

AT8

GPP_B7/SRCCLKREQ2#

D40

CLKOUT_PCIE_N3

C40

CLKOUT_PCIE_P3

AT10

GPP_B8/SRCCLKREQ3#

B40

CLKOUT_PCIE_N4

A40

CLKOUT_PCIE_P4

AU8

GPP_B9/SRCCLKREQ4#

E40

CLKOUT_PCIE_N5

E38

CLKOUT_PCIE_P5

AU7

GPP_B10/SRCCLKREQ5#

SKYLAKE-U_BGA1356

REV = 1
@

UC1I

CSI-2

CSI2_DN0
CSI2_DP0
CSI2_DN1
CSI2_DP1
CSI2_DN2
CSI2_DP2
CSI2_DN3
CSI2_DP3

CSI2_DN4
CSI2_DP4
CSI2_DN5
CSI2_DP5
CSI2_DN6
CSI2_DP6
CSI2_DN7
CSI2_DP7

CSI2_DN8
CSI2_DP8
CSI2_DN9
CSI2_DP9
CSI2_DN10
CSI2_DP10
CSI2_DN11
CSI2_DP11

SKL_U LT

SKL_U LT

CLOCK SIGNALS

?

GPP_F13/EMMC_DATA0
GPP_F14/EMMC_DATA1
GPP_F15/EMMC_DATA2
GPP_F16/EMMC_DATA3
GPP_F17/EMMC_DATA4
GPP_F18/EMMC_DATA5
GPP_F19/EMMC_DATA6
GPP_F20/EMMC_DATA7

GPP_F21/EMMC_RCLK

1 OF 20

?

1 OF 20

3

CSI2_CLKN0

CSI2_CLKP0

CSI2_CLKN1

CSI2_CLKP1

CSI2_CLKN2

CSI2_CLKP2

CSI2_CLKN3

CSI2_CLKP3

CSI2_COMP

GPP_D4/FLASHTRIG

EMMC

GPP_F22/EMMC_CLK

GPP_F12/EMMC_CMD

EMMC_RCOMP

?

CLKOUT_ITPXDP_N
CLKOUT_ITPXDP_P

GPD8/SUSCLK

XCLK_BIASREF

C37
D37
C32
D32
C29
D29
B26
A26

E13
B7

AP2
AP1
AP3
AN3
AN1
AN2
AM4
AM1

AM2
AM3
AP4

AT1

XTAL24_IN

XTAL24_OUT

RTCX1
RTCX2

SRTCRST#

RTCRST#

?

CSI2_COMP

EMMC_RCOMP

F43
E43

BA17

E37
E35

E42

AM18
AM20

AN18
AM16

1 2

RC73 100_0402_1%

RC50 200_0402_1%1 2

CLK_PCIE_XDP#
CLK_PCIE_XDP

SUSCLK

XTAL24_IN
XTAL24_OUT

DIFFCLK_BIASREF

RTC_X1
RTC_X2

SRTC_RST#
RTC_RST#

1

RC72 2.7K_0402_1%1 2

VCCRTC

RC33 20K_0402_1%1 2
RC34 20K_0402_1%

TC85 @
TC87 @1

SUSCLK 40

1 2

2

1U_0402_6.3V6K

1U_0402_6.3V6K

SUSCLK

DIFFCLK_BIASREF

+VCCCLK5

1

CC3

2

1

CC6

2

1 2

RC95 1K_0402_5%@

1 2

RC1555 60.4_0402_1%

Cannonlake@

SRTC_RST#
RTC_RST#

12

JCMOS1
SHORT PADS

@

RC1624

1 2

@

0_0402_5%

1

EC_RTC_RST# 44

RTC_X1

RTC_X2

2

CC5
7P_0402_50V8J

1

when single end external clock generator used,
this pin should be grounded

XTAL24_IN

1 2

RC241 0_0201_5%

CC12

3.3P_0402_50V8-C

RC71 1M_0402_5%12

1

2

YC2

GND12OSC2

1

OSC1

GND2

24MHZ_6PF_7V24000032

3

RC240 0_0201_5%

4

1

CC11

2.7P_0402_50V9-B

2

1 2

XTAL24_OUT

RC32 10M_0402_5%12

YC1

1 2

32.768KHZ_9PF_X1A0001410002

2

CC4
7P_0402_50V8J

1

need t o use 38.4MHz (30ohm ) for Cann onlake-u

A A

Titl e

Titl e

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D
DEPARTMENT EXCEPT A S AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT A S AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT A S AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

3

2015/08/20

2015/08/20

2015/08/20

LC Future Center Secret Data

LC Future Center Secret Data

LC Future Center Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

2016/08/20

2016/08/20

2016/08/20

Titl e

MCP (CSI2,EMMC,CLOCK)

MCP (CSI2,EMMC,CLOCK)

MCP (CSI2,EMMC,CLOCK)

Size Document Number Re v

Size Document Number Re v

Size Document Number Re v

Custom

Custom

Custom

Date : Sheet o f

Date : Sheet o f

Date : Sheet o f

DG421

DG421

DG421

Sunday, January 22, 2017

Sunday, January 22, 2017

Sunday, January 22, 2017

10 60

10 60

10 60

1

1.0

1.0

1.0

5

D D

+3VALW

C C

+3VALW_PCH

+3VS

B B

PLT_RST#20,32,37,40,44

EC_RSMRST#44

SYS_PWROK44
PCH_PWROK44

SUSWARN#44
SUSACK#44

PCIE_WAKE #37,40,44

1 2

RC74 10K_0402_5%

1 2

RC75 8.2K_0402_5%

RC76 1K_0402_5%

RC90 10K_0402_5%1 2

RC78 10K_0402_5%@

RC80 10K_0402_5%1 2

1 2

1 2

1 2

1 2

1 2

12

CC12541000P_0201_50V7-K

EMC_NS@

CC1040.01U_0201_10V6K

CC1031000P_0201_50V7-K

EMC_NS@

CC10147P_0201_25V8-J 1 2

CC12600.01U_0201_10V6K

VCCST_PWRGD_R

TC21PAD@

Reserve for DS3

AC_PRESENT_R

BATLOW#

WAKE#

PCH_LAN_WAKE#

SUSWARN#_R

SYS_RESET#

PCH_RSMRST#_R

Stuff to fix Re set&PWRGD test fail issue

PCH_PWROK

PCH_DPWROK_R

SYS_PWROK

EC_RSMRST#

Follow CRB change to 1kohm

Add to fix Rese t&PWRGD test fail issue

RPC21

1 8
2 7
3 6
4 5

10K_0804_8P4R_5%

12

12

RC92100K_0402_5%

RC94100K_0402_1% @

PCH_RSMRST#_R
PCH_PWROK
SYS_PWROK

PLT_RST#_R

PCH_DPWROK_R

4

1 2

RC84 0_0402_5%@

RC85 0_0402_5%@1 2

1

1 2

RC93 60.4_0402_1%

RC139 0_0402_5%@1 2

1 2

RC126 0_0402_5%@

1 2

RC86 0_0402_5%@
RC79 0_0402_5%@1 2

RC91 0_0402_5%@1 2

EC_VCCST_PWRGD44

PLT_RST#_R
SYS_RESET#
PCH_RSMRST#_R

CPU_PROCPWRGD
VCCST_PWRGD

SYS_PWROK_R
PCH_PWROK_R
PCH_DPWROK_R

SUSWARN#_R
SUSACK#_R

WAKE#
PCH_LAN_WAKE#

UC1K

SYSTEM POWER MANAGEME NT

AN10

GPP_B13/PLTRST#

B5

SYS_RESET#

AY17

RSMRST#

A68

PROCPWRGD

B65

VCCST_PWRGD

B6

SYS_PWROK

BA20

PCH_PWROK

BB20

DSW_PWROK

AR13

GPP_A13/SUSWARN#/SUSPWRDNACK

AP11

GPP_A15/SUSACK#

BB15

WAKE#

AM15

GPD2/LAN_WAKE#

AW17

GPD11/LANPHYPC

AT15

GPD7/RSVD

SKYLAKE-U_BGA1356

REV = 1
@

1 2

RC138 0_0402_5%@

PM_SLP_S3#

3

SKL_U LT

1

CC46

0.01U_0201_25V6-K

EMC_NS@

2

?

SLP_SUS#
SLP_LAN#

INTRUDER#

AT11

PM_SLP_S3#_R

AP15

PM_SLP_S4#_R

BA16
AY16

PM_SLP_SUS#_R

AN15
AW15
BB17
AN16

PBTN_OUT#_R

BA15

AC_PRESENT_R

AY15
AU13

BATLOW#

AU11

PME#

AP16

INTVRMEN

AM10
AM11

?

RC137
1K_0402_5%

1 2

34

D

G

QC6B
2N7002KDWH_SOT363-6

@

S

5

GPP_B12/SLP_S0#

GPD4/SLP_S3#
GPD5/SLP_S4#

GPD10/SLP_S5#

GPD9/SLP_WLAN#

GPD6/SLP_A#

GPD3/PWRBTN#

GPD1/ACPRESENT

GPD0/BATLOW#

GPP_A11/PME#

GPP_B11/EXT_PWR_GATE#

1 OF 20

2

G

1 2

RC1599 0_0402_5%@

DC4

RB751V-40_SOD323-2

GPP_B2/VRALERT#

+3VALW +VCCST_CPU +VCCSTG

RC136
10K_0402_5%

@

1 2

61

D

QC6A
2N7002KDWH_SOT363-6

@

S

@1 2

2

1

AC_PRESENT44

VCCST_PWRGD_R

PCH_DPWROK_R

TC89@

RC96 0_0402_5%@1 2

1 2

RC97 0_0402_5%@

1 2

RC89 0_0402_5%@

Reserve for DS3

1 2

RC87 0_0402_5%@

RC41 330K_0402_5%12

1 2

RC88 0_0402_5%@

ACIN#44

RC1554
1K_0402_5%

@

1 2

2

CC140
1000P_0201_50V7-K

EMC_NS@

1

1 2

RC182 0_0402_5%@

1 2

RC81 0_0402_5%@

2

G

Reserve for DS3

PM_SLP_S3# 13,44
PM_SLP_S4# 44

PM_SLP_SUS# 44

PBTN_OUT# 44

VCCRTC

AC_PRESENT_R

13

D

QC8
2N7002KW_SOT323-3

@

S

EC_RSMRST#

1

DPWROK_EC 44

A A

1 2

@

10 / 25 SIT Add t o fix PLT_RST# glitch is su e wei

5

PLT_RST#

CC1294100P_0201_25V8J

Titl e

Titl e

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D
DEPARTMENT EXCEPT A S AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT A S AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT A S AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

3

2015/08/20

2015/08/20

2015/08/20

LC Future Center Secret Data

LC Future Center Secret Data

LC Future Center Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

2016/08/20

2016/08/20

2016/08/20

Titl e

MCP (SYSTEM PWR MANAGEMENT)

MCP (SYSTEM PWR MANAGEMENT)

MCP (SYSTEM PWR MANAGEMENT)

Size Document Number Re v

Size Document Number Re v

Size Document Number Re v

Custom

Custom

Custom

Date : Sheet o f

Date : Sheet o f

Date : Sheet o f

DG421

DG421

DG421

Sunday, January 22, 2017

Sunday, January 22, 2017

Sunday, January 22, 2017

11 60

11 60

11 60

1

1.0

1.0

1.0

5

+CPU_CORE +CPU_CORE

3200 0mA

D D

1

TC90@

+VCCOPC_1.0V

1

TC92@

+V1.8S_EDRAM

1

TC94@

VCCOPC_SENSE

1

TC95@

VSSOPC_SENSE

1

TC97@

1

+VCCEOPIO

TC99@

VCCEOPIO_SENSE

1

TC100@

VSSEOPIO_SENSE

1

TC101@

For UMA 2+3e

C C

+CPU_CORE

13x10uF 0402, SIT update to 0603 package

1

1

CC1085

CC1086

2

2

10U_0402_6.3V6M

10U_0402_6.3V6M

CD@

@

A30
A34
A39

A44
AK33
AK35
AK37
AK38
AK40
AL33
AL37
AL40

AM32
AM33
AM35
AM37
AM38

G30

K32

AK32

AB62

P62
V62

H63

G61

AC63
AE63

AE62
AG62

AL63
AJ62

SKYLAKE-U_BGA1356

REV = 1
@

1

CC1080

2

10U_0603_6.3V6M

UC1L

VCC_A30
VCC_A34
VCC_A39
VCC_A44
VCC_AK33
VCC_AK35
VCC_AK37
VCC_AK38
VCC_AK40
VCC_AL33
VCC_AL37
VCC_AL40
VCC_AM32
VCC_AM33
VCC_AM35
VCC_AM37
VCC_AM38
VCC_G30

RSVD_K32

RSVD_AK32

VCCOPC_AB62
VCCOPC_P62
VCCOPC_V62

VCC_OPC_1P8_H63

VCC_OPC_1P8_G61

VCCOPC_SENSE
VSSOPC_SENSE

VCCEOPIO_AE62
VCCEOPIO_AG62

VCCEOPIO_SENSE
VSSEOPIO_SENSE

SKL_U LT

CPU POWER 1 OF 4

1

CC1236

2

10U_0603_6.3V6M

?

G32

VCC_G32

G33

VCC_G33

G35

VCC_G35

G37

VCC_G37

G38

VCC_G38

G40

VCC_G40

G42

VCC_G42

J30

VCC_J30

J33

VCC_J33

J37

VCC_J37

J40

VCC_J40

K33

VCC_K33

K35

VCC_K35

K37

VCC_K37

K38

VCC_K38

K40

VCC_K40

K42

VCC_K42

K43

VCC_K43

E32

VCC_SENSE

E33

VSS_SENSE

B63

VIDALERT#

A63

VIDSCK

D64

VIDSOUT

G20

VCCSTG_G20

1

2

1 OF 20

CC1237

10U_0603_6.3V6M

?

1

1

CC1093

CC1092

2

2

10U_0603_6.3V6M

10U_0603_6.3V6M

VCORE_VCC_SEN
VCORE_VSS_SEN

CPU_SVID_ALERT#_R
CPU_SVID_CLK_R
CPU_SVID_DAT_R

1

CC1091

2

10U_0603_6.3V6M

4

1

2

+VCCSTG

CC1089

10U_0603_6.3V6M

VCORE_VCC_SEN

VCORE_VSS_SEN

VCORE_VCC_SEN 59
VCORE_VSS_SEN 59

1

CC1238

2

10U_0603_6.3V6M

1 2

RC77 100_0402_1%

1 2

RC82 100_0402_1%

VR_SVID_ALRT#59

VR_SVID_CLK59

VR_SVID_DAT59

+VCC_GT

Backside Cap 8x10uF 0402, SIT up date

1

1

1

CC1123

CC1124

CC1122

2

2

2

10U_0402_6.3V6M

10U_0402_6.3V6M

10U_0402_6.3V6M

@

@

@

3

+CPU_CORE +VCC_GT

SVID

RC131

1 2

1, Alert# Route Between CLK and Data

1

1

CC1126

CC1125

2

2

10U_0402_6.3V6M

10U_0402_6.3V6M

@

56_0402_5%

CD@

VCCGT_VCC_SEN

VCCGT_VSS_SEN

+VCCST_CPU

12

12

RC132

RC1544

100_0402_1%

100_0402_1%

@

RC133 220_0402_1%

RC134 0_0402_5%@

RC1545 0_04 02_5%@

1

1

1

CC1128

CC1127

CC1129

2

2

2

10U_0402_6.3V6M

10U_0402_6.3V6M

10U_0402_6.3V6M

CD@

1 2

RC83 100_0402_1%

1 2

RC98 100_0402_1%

1

CC42

0.1u_0201_10V6K

@

2

1 2

1 2

1 2

CPU_SVID_ALERT#_R

CPU_SVID_CLK_R

CPU_SVID_DAT_R

2

?

+VCC_GT

3100 0mA

VCCGT_VCC_SEN59
VCCGT_VSS_SEN5 9

VCCGT_VCC_SEN
VCCGT_VSS_SEN

UC1M

A48

VCCGT_A48

A53

VCCGT_A53

A58

VCCGT_A58

A62

VCCGT_A62

A66

VCCGT_A66

AA63

VCCGT_AA63

AA64

VCCGT_AA64

AA66

VCCGT_AA66

AA67

VCCGT_AA67

AA69

VCCGT_AA69

AA70

VCCGT_AA70

AA71

VCCGT_AA71

AC64

VCCGT_AC64

AC65

VCCGT_AC65

AC66

VCCGT_AC66

AC67

VCCGT_AC67

AC68

VCCGT_AC68

AC69

VCCGT_AC69

AC70

VCCGT_AC70

AC71

VCCGT_AC71

J43

VCCGT_J43

J45

VCCGT_J45

J46

VCCGT_J46

J48

VCCGT_J48

J50

VCCGT_J50

J52

VCCGT_J52

J53

VCCGT_J53

J55

VCCGT_J55

J56

VCCGT_J56

J58

VCCGT_J58

J60

VCCGT_J60

K48

VCCGT_K48

K50

VCCGT_K50

K52

VCCGT_K52

K53

VCCGT_K53

K55

VCCGT_K55

K56

VCCGT_K56

K58

VCCGT_K58

K60

VCCGT_K60

L62

VCCGT_L62

L63

VCCGT_L63

L64

VCCGT_L64

L65

VCCGT_L65

L66

VCCGT_L66

L67

VCCGT_L67

L68

VCCGT_L68

L69

VCCGT_L69

L70

VCCGT_L70

L71

VCCGT_L71

M62

VCCGT_M62

N63

VCCGT_N63

N64

VCCGT_N64

N66

VCCGT_N66

N67

VCCGT_N67

N69

VCCGT_N69

J70

VCCGT_SENSE

J69

VSSGT_SENSE

SKYLAKE-U_BGA1356

REV = 1
@

SKL_U LT

CPU POWER 2 OF 4

VCCGTX_SENSE
VSSGTX_SENSE

1 OF 20

VCCGT_N70
VCCGT_N71
VCCGT_R63
VCCGT_R64
VCCGT_R65
VCCGT_R66
VCCGT_R67
VCCGT_R68
VCCGT_R69
VCCGT_R70
VCCGT_R71
VCCGT_T62
VCCGT_U65
VCCGT_U68

VCCGT_U71
VCCGT_W63
VCCGT_W64
VCCGT_W65
VCCGT_W66
VCCGT_W67
VCCGT_W68
VCCGT_W69
VCCGT_W70
VCCGT_W71

VCCGT_Y62

VCCGTX_AK42
VCCGTX_AK43
VCCGTX_AK45
VCCGTX_AK46
VCCGTX_AK48
VCCGTX_AK50
VCCGTX_AK52
VCCGTX_AK53
VCCGTX_AK55
VCCGTX_AK56
VCCGTX_AK58
VCCGTX_AK60
VCCGTX_AK70
VCCGTX_AL43
VCCGTX_AL46
VCCGTX_AL50
VCCGTX_AL53
VCCGTX_AL56

VCCGTX_AL60
VCCGTX_AM48
VCCGTX_AM50
VCCGTX_AM52
VCCGTX_AM53
VCCGTX_AM56
VCCGTX_AM58

VCCGTX_AU58

VCCGTX_AU63

VCCGTX_BB57

VCCGTX_BB66

?

N70
N71
R63
R64
R65
R66
R67
R68
R69
R70
R71
T62
U65
U68
U71
W63
W64
W65
W66
W67
W68
W69
W70
W71
Y62

AK42
AK43
AK45
AK46
AK48
AK50
AK52
AK53
AK55
AK56
AK58
AK60
AK70
AL43
AL46
AL50
AL53
AL56
AL60
AM48
AM50
AM52
AM53
AM56
AM58
AU58
AU63
BB57
BB66

AK62
AL61

+VCC_GT

1

For UMA 2+3e

VCCGTX_SENSE
VSSGTX_SENSE

+VCC_GT

1

TC133 @

1

TC134 @

+CPU_CORE

15x1uF 0201, SIT update to 0402 package

1

1

1

CC1095

2

1U_0402_6.3V6K

1U_0402_6.3V6K

B B

A A

CC1098

CC1096

CC1097

2

2

1U_0402_6.3V6K

1U_0402_6.3V6K

5

1

1

1

CC1099

2

1U_0402_6.3V6K

1

CC1100

CC1102

CC1101

2

2

2

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1

1

2

1

CC1104

CC1105

2

2

1U_0402_6.3V6K

1U_0402_6.3V6K

1

1

CC1109

CC1108

2

2

1U_0201_6.3V6-M

1U_0201_6.3V6-M

@

@

4

+VCC_GT

Backside Cap 12x1uF 0201, SIT up date

1

CC1111

2

1U_0402_6.3V6K

1

CC1114

CC1115

2

1U_0402_6.3V6K

1U_0402_6.3V6K

1

1

1

CC1118

CC1116

2

2

1U_0402_6.3V6K

3

CC1119

2

1U_0402_6.3V6K

1U_0402_6.3V6K

1

1

1

CC1241

CC1240

2

2

2

1U_0402_6.3V6K

1U_0402_6.3V6K

Security Classification LC Future Center Secret Data

Security Classification LC Future Center Secret Data

Security Classification LC Future Center Secret Data

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING D RAWING IS T HE PROPRIETARY PROPERTY OF LC FUTURE CEN TER. AND CON TAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING D RAWING IS T HE PROPRIETARY PROPERTY OF LC FUTURE CEN TER. AND CON TAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING D RAWING IS T HE PROPRIETARY PROPERTY OF LC FUTURE CEN TER. AND CON TAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. TH IS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. TH IS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. TH IS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHOR IZED BY L C FUTURE CENTER NEITHER THIS SHEET NOR TH E INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHOR IZED BY L C FUTURE CENTER NEITHER THIS SHEET NOR TH E INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHOR IZED BY L C FUTURE CENTER NEITHER THIS SHEET NOR TH E INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH OUT PRIOR WRITTEN CON SENT OF LC FU TURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH OUT PRIOR WRITTEN CON SENT OF LC FU TURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH OUT PRIOR WRITTEN CON SENT OF LC FU TURE CENTER.

2015/08/20

2015/08/20

2015/08/20

Deciphered Date

Deciphered Date

Deciphered Date

2

2016/08/20

2016/08/20

2016/08/20

Title

Title

Title

MCP (CPU PWR1)

MCP (CPU PWR1)

MCP (CPU PWR1)

Size

Size

Size

Document Number Rev

Document Number Rev

Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

DG421

DG421

DG421

Sunday, J anuary 22, 2017

Sunday, J anuary 22, 2017

Sunday, J anuary 22, 2017

1

12 60

12 60

12 60

1.0

1.0

1.0

5

+1.2V

D D

C C

2A , 3x22uF, 6x10uF, 4x1uF, SIT update

1

1

1

2

CC1258

22U_0603_6.3V6-M

CC1168

2

10U_0603_6.3V6M

CD@

RC1497 0_04 02_5%@

RC104 0_0402_5%@

1

2

2

CD@

1

CC1256

CC1257

2

22U_0603_6.3V6-M

22U_0603_6.3V6-M

+1.2V

CC1169

10U_0402_6.3V6M

1 2

1 2

1

2

CC1171

10U_0402_6.3V6M

1

CC1222

2

10U_0603_6.3V6M

+VDDQ_CPU_CLK

@

+VCCSFR_OC

1

1

CC1223

2

10U_0603_6.3V6M

1

CC1229

2

1U_0201_6.3V6-M

1

CC85

2

1U_0201_6.3V6-M

1

1

1

1

CC1243

CC1224

CC1244

CC1225

2

2

2

10U_0402_6.3V6M

10U_0402_6.3V6M

@

CD@

@

1

CC1228

2

10U_0402_6.3V6M

CC1226

2

2

1U_0201_6.3V6-M

1U_0201_6.3V6-M

1U_0201_6.3V6-M

@

CD@

+VCCIO

+VCCST_CPU

Reserved for VCCST/VCCSTG/VCCPLL
power optimized

+VCCST_CPU

1

CC1227

2

1U_0201_6.3V6-M

@

RC103 0_0402_5%@

RC1604 0_04 02_5%@

4

1 2

1 2

1 2

RC105 0_0402_5%@

+VDDQ_CPU_CLK

+VCCST_CPU

+VCCSTG

+VCCSFR_OC

+VCCPLL_CPU

+VCCSTG

1

2

+1.2V

CC87

1U_0402_6.3V6K

1

2

2800 mA

130m A

+VCCST_CPU

+VCCPLL_CPU

CC1249

0.1u_0201_10V6K

1

2

1

2

120mA

CC86

120mA

CC84

1U_0402_6.3V6K

1U_0402_6.3V6K

UC1N

AU23

VDDQ_AU23

AU28

VDDQ_AU28

AU35

VDDQ_AU35

AU42

VDDQ_AU42

BB23

VDDQ_BB23

BB32

VDDQ_BB32

BB41

VDDQ_BB41

BB47

VDDQ_BB47

BB51

VDDQ_BB51

AM40

VDDQC

A18

VCCST

A22

VCCSTG_A22

AL23

VCCPLL_OC

K20

VCCPLL_K20

K21

VCCPLL_K21

SKYLAKE-U_BGA1356

REV = 1
@

SKL_U LT

CPU POWER 3 OF 4

?

1 OF 20

VCCIO_AK28
VCCIO_AK30

VCCIO_AL30

VCCIO_AL42
VCCIO_AM28
VCCIO_AM30
VCCIO_AM42

VCCSA_AK23
VCCSA_AK25

VCCSA_G23

VCCSA_G25

VCCSA_G27

VCCSA_G28

VCCSA_J22
VCCSA_J23

VCCSA_J27
VCCSA_K23
VCCSA_K25
VCCSA_K27
VCCSA_K28
VCCSA_K30

VCCIO_SENSE
VSSIO_SENSE

VSSSA_SENSE
VCCSA_SENSE

3

+VCCIO

AK28

3100 mA

AK30
AL30
AL42
AM28
AM30
AM42

AK23
AK25
G23
G25
G27
G28
J22
J23
J27
K23
K25
K27
K28
K30

AM23
AM22

H21
H20

?

+VCCSA

5100 mA

VCCIO_SENSE
VSSIO_SENSE

VCCSA_VSS_SEN
VCCSA_VCC_SEN

1

TC136 @

1

TC137 @

VCCSA_VSS_SEN 59
VCCSA_VCC_SEN 59

VCCSA_VCC_SEN

VCCSA_VSS_SEN

RC101 100_0402_1%

RC102 100_0402_1%

2

+VCCIO

3.1A 2x10uF, 4x1uF

1

1

1

1

CC1152

CC1153

CC1158

2

2

10U_0402_6.3V6M

+VCCSA

4.5A 10x10uF, 7x1uF, SIT update

1

1

2

2

CC1132

10U_0603_6.3V6M

1 2

1 2

CC1159

2

2

1U_0201_6.3V6-M

1U_0201_6.3V6-M

10U_0402_6.3V6M

@

@

1

1

CC1133

CC1134

CC1135

2

2

10U_0603_6.3V6M

10U_0402_6.3V6M

10U_0402_6.3V6M

@

@

+VCCSA

1

1

1

1

CC1218

CC1160

CC1161

2

2

2

1U_0402_6.3V6K

1U_0201_6.3V6-M

1U_0201_6.3V6-M

@

@

1

1

CC1136

CC1137

2

2

10U_0603_6.3V6M

10U_0603_6.3V6M

+1.0VALW +VCCST_CPU

Reserved for VCCST/VCCSTG/VCCPLL power optimized

1

2

1

2

CC1230

1U_0402_6.3V6K

CC1251

10U_0603_6.3V6M

@

1

1

CC1231

2

2

1U_0402_6.3V6K

@

1

1

CC1252

2

2

10U_0402_6.3V6M

@

RC1605 0_0402_5%@

CC1232

1U_0402_6.3V6K

CC1253

10U_0402_6.3V6M

1 2

1

1

CC1140

CC1139

2

2

1U_0402_6.3V6K

1U_0402_6.3V6K

CD@

1

1

1

CC1145

CC1142

2

2

1U_0402_6.3V6K

1U_0402_6.3V6K

CD@

1

1

CC1141

CC1144

CC1143

2

2

2

1U_0201_6.3V6-M

1U_0201_6.3V6-M

1U_0201_6.3V6-M

CD@

1

2

+VCCIO

CC1250

10U_0603_6.3V6M

+VCCST_CPU

1

C1102

2
@

22U_0603_6.3V6-M

1

CC80

2
@

10U_0603_6.3V6M

2016/08/20

2016/08/20

2016/08/20

Title

Title

Title

MCP (CPU PWR2)

MCP (CPU PWR2)

MCP (CPU PWR2)

Size

Size

Size

Document Number Rev

Document Number Rev

Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

DG421

DG421

DG421

Sunday, J anuary 22, 2017

Sunday, J anuary 22, 2017

Sunday, J anuary 22, 2017

1

13 60

13 60

13 60

1.0

1.0

1.0

+1.0VALW

1 2

B B

A A

5

EC_VCCIO_EN44

PM_SLP_S3#11, 44

EC_VCCST_EN44

RC128 0_0402_5%@

DC1

RB751V-40_SOD323-2

1 2

RC142 0_0402_5%@

1 2

VCCIO_EN

@

1

0.01U_0201_6.3V7-K
CC77

2

@

VCCST_EN

1

0.01U_0201_6.3V7-K
CC81

2

@

4

+1.0VALW

CC79

10U_0603_6.3V6M

1

1

CC72

CC71

2

2

10U_0603_6.3V6M

@

22U_0603_6.3V6-M

1

2

+5VALW

VCCIO_EN

VCCST_EN

UC4

1

OUT1_2

IN1_1

2

OUT1_1

IN1_2

3

EN1

4

VBIAS

5

EN2

6

IN2_1

OUT2_2

7

IN2_2

OUT2_1

G5016KD1U_TDFN14_2X3

14
13

12

CC1293 1000P_0201_50V7-K

CT1

11

GND

10

CC1292 1000P_0201_50V7-K

CT2

9
8

15

GPAD

1 2

1 2

Follow DG470 change to Dua l Switch 8 / 24 wei

Security Classification LC Future Center Secret Data

Security Classification LC Future Center Secret Data

Security Classification LC Future Center Secret Data

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING D RAWING IS T HE PROPRIETARY PROPERTY OF LC FUTURE CEN TER. AND CON TAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING D RAWING IS T HE PROPRIETARY PROPERTY OF LC FUTURE CEN TER. AND CON TAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING D RAWING IS T HE PROPRIETARY PROPERTY OF LC FUTURE CEN TER. AND CON TAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. TH IS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. TH IS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. TH IS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHOR IZED BY L C FUTURE CENTER NEITHER THIS SHEET NOR TH E INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHOR IZED BY L C FUTURE CENTER NEITHER THIS SHEET NOR TH E INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHOR IZED BY L C FUTURE CENTER NEITHER THIS SHEET NOR TH E INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH OUT PRIOR WRITTEN CON SENT OF LC FU TURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH OUT PRIOR WRITTEN CON SENT OF LC FU TURE CENTER.

3

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH OUT PRIOR WRITTEN CON SENT OF LC FU TURE CENTER.

2015/08/20

2015/08/20

2015/08/20

Deciphered Date

Deciphered Date

Deciphered Date

2

5

1 2

RC1503 0_0603_5%@

+1.0VALW +VCCAMPHY

+1.0VALW +VCCAPLL_1P0

D D

+3VALW_PCH

1 2

RC1504 0_0402_5%@

RC1586 0_0402_5%@

+VCCHDA

1 2

4

3

1 2

RC1622 0_0402_5%@

2

+VCCPGPPG+3VALW_PCH

1

+1.0VALW

1 2

RC1620 0_0402_5%@

VCCMPHYON_1P0_L1

1

CC144

2

1U_0402_6.3V6K

+3VALW_PCH

1

1

1

CC164

CC156

2

2

@

@

1U_0402_6.3V6K

20mA

AK15

4mA

AG15

6mA

Y16

8mA

Y15

6mA

T16

161mA

AF16

61mA

AD15

V19

T1

6mA

AA1

1mA

AK17

AK19
BB14

BB10

VCCRTCEXT

35mA

A14

29mA

K19

24mA

L21

33mA

N20

4mA

L19

10mA

A10

AN11
AN13

?

1U_0402_6.3V6K

+1.8VALW

1mA

+1.0VALW

+1.0VALW

+VCCCLK4

+VCCCLK5

1

CC172

2

@

+1.0VALW

2

1U_0402_6.3V6K

Near Y15

1

CC173

+VCCPGPPG

CC174

2

@

1U_0402_6.3V6K

1U_0402_6.3V6K

1

CC57

2

1U_0402_6.3V6K

RC1588 0_0603_5%@

RC1589 0_0603_5%@

@

@

1

2

1

2

1

2

@

+1.0VALW

1 2

C1099

22U_0603_6.3V6-M

1 2

C1100

22U_0603_6.3V6-M

CC175

1U_0402_6.3V6K

1

2

1

CC176

2

@

1U_0402_6.3V6K

1 2

RC1587 0_0603_5%@

1

CC56

2

@

1U_0402_6.3V6K

+1.0VALW+VCCCLK4

+1.0VALW+VCCCLK5

C1098

22U_0603_6.3V6-M

+3VALW_PCH

+1.8VALW

1

CC142

1U_0402_6.3V6K

+1.0VALW

1

CC149

2

0.1u_0201_10V6K

1

CC55

2

0.1u_0201_10V6K

2

+3VALW_PCH

1

CC143

2

1U_0402_6.3V6K

1

2

VCCRTC

1

CC146

CC1242

2

1U_0402_6.3V6K

0.1u_0201_10V6K

1

CC158

2

CC153

VCCMPHYON_1P0_L1

11mA

+1.0VALW

Near AB19

1U_0402_6.3V6K

0.696A

1

CC141

2

@

1U_0402_6.3V6K

33mA

1

CC169

2

AB19

VCCPRIM_1P0_AB19

AB20

VCCPRIM_1P0_AB20

P18

VCCPRIM_1P0_P18

AF18

VCCPRIM_CORE_AF18

AF19

VCCPRIM_CORE_AF19

V20

VCCPRIM_CORE_V20

V21

VCCPRIM_CORE_V21

AL1

DCPDSW_1P0

K17

VCCMPHYAON_1P0_K17

L1

VCCMPHYAON_1P0_L1

N15

VCCMPHYGT_1P0_N15

N16

VCCMPHYGT_1P0_N16

N17

VCCMPHYGT_1P0_N17

P15

VCCMPHYGT_1P0_P15

P16

VCCMPHYGT_1P0_P16

K15

VCCAMPHYPLL_1P0_K15

L15

VCCAMPHYPLL_1P0_L15

V15

VCCAPLL_1P0

AB17

VCCPRIM_1P0_AB17

Y18

VCCPRIM_1P0_Y18

AD17

VCCDSW_3P3_AD17

AD18

VCCDSW_3P3_AD18

AJ17

VCCDSW_3P3_AJ17

AJ19

VCCHDA

AJ16

VCCSPI

AF20

VCCSRAM_1P0_AF20

AF21

VCCSRAM_1P0_AF21

T19

VCCSRAM_1P0_T19

T20

VCCSRAM_1P0_T20

AJ21

VCCPRIM_3P3_AJ21

AK20

VCCPRIM_1P0_AK20

N18

VCCAPLLEBB

SKYLAKE-U_BGA1356

REV = 1
@

1U_0402_6.3V6K

UC1O

SKL_ULT

CPU POWER 4 OF 4

?

1 OF 20

VCCPGPPA

VCCPGPPB
VCCPGPPC
VCCPGPPD

VCCPGPPE

VCCPGPPF
VCCPGPPG

VCCPRIM_3P3_V19

VCCPRIM_1P0_T1

VCCATS_1P8

VCCRTCPRIM_3P3

VCCRTC_AK19
VCCRTC_BB14

DCPRTC

VCCCLK1

VCCCLK2

VCCCLK3

VCCCLK4

VCCCLK5

VCCCLK6

GPP_B0/CORE_VID0
GPP_B1/CORE_VID1

+1.0VALW

+VCCDSW_1P0

1

CC171

2

1U_0402_6.3V6K

CD@

+1.0VALW

PCH Internal VRM

1

CC165

2

0.1u_0201_10V6K

75mA

+1.0VALW

+1.0VALW

Near N15

88mA

1

CC151

2

1U_0402_6.3V6K

1

CC154

2

1U_0402_6.3V6K

@

Near K15

22mA

+1.0VALW

1

CC159

2

CD@

1U_0402_6.3V6K

1.5A

1

CC148

2

47U_0805_4V6-M

Near AF20

1

CC147

2

1U_0201_6.3V6-M

0.642A

+3VALW_PCH

+VCCHDA

+1.0VALW

+1.0VALW

1

C1096

2

@

22U_0603_6.3V6-M

1

C1097

2

0.1u_0201_10V6K

C C

+VCCAMPHY

+VCCAPLL_1P0

B B

1

2

CC145

1U_0402_6.3V6K

+3VALW

68mA

+3VALW_PCH

2.574A22mA

1

2

@

Near AF18

22U_0603_6.3V6-M

0.118A

Near A18

A A

Titl e

Titl e

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY P ROPERTY OF LC FUTURE CE NTER. AND CONTAINS CONFIDENTIA L

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY P ROPERTY OF LC FUTURE CE NTER. AND CONTAINS CONFIDENTIA L

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY P ROPERTY OF LC FUTURE CE NTER. AND CONTAINS CONFIDENTIA L
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT B E TRANSFERED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT B E TRANSFERED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT B E TRANSFERED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEP T AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCEP T AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCEP T AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
MAY BE USED BY OR D ISCLOSED TO ANY THIRD PARTY WIT HOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENT ER.

MAY BE USED BY OR D ISCLOSED TO ANY THIRD PARTY WIT HOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENT ER.

5

4

3

MAY BE USED BY OR D ISCLOSED TO ANY THIRD PARTY WIT HOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENT ER.

2015/08/20

2015/08/20

2015/08/20

LC Future Center Secret Data

LC Future Center Secret Data

LC Future Center Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

2016/08/20

2016/08/20

2016/08/20

Titl e

MCP (PCH PWR)

MCP (PCH PWR)

MCP (PCH PWR)

Size

Size

Size

Document Number R ev

Document Number R ev

Document Number R ev

Custom

Custom

Custom

Date : Sheet o f

Date : Sheet o f

Date : Sheet o f

DG421

DG421

DG421

Sunday, January 22, 2017

Sunday, January 22, 2017

Sunday, January 22, 2017

1

14 60

14 60

14 60

1.0

1.0

1.0

5

?

SKL_U LT

D D

C C

B B

UC1P

A5

VSS_A5

A67

VSS_A67

A70

VSS_A70

AA2

VSS_AA2

AA4

VSS_AA4

AA65

VSS_AA65

AA68

VSS_AA68

AB15

VSS_AB15

AB16

VSS_AB16

AB18

VSS_AB18

AB21

VSS_AB21

AB8

VSS_AB8

AD13

VSS_AD13

AD16

VSS_AD16

AD19

VSS_AD19

AD20

VSS_AD20

AD21

VSS_AD21

AD62

VSS_AD62

AD8

VSS_AD8

AE64

VSS_AE64

AE65

VSS_AE65

AE66

VSS_AE66

AE67

VSS_AE67

AE68

VSS_AE68

AE69

VSS_AE69

AF1

VSS_AF1

AF10

VSS_AF10

AF15

VSS_AF15

AF17

VSS_AF17

AF2

VSS_AF2

AF4

VSS_AF4

AF63

VSS_AF63

AG16

VSS_AG16

AG17

VSS_AG17

AG18

VSS_AG18

AG19

VSS_AG19

AG20

VSS_AG20

AG21

VSS_AG21

AG71

VSS_AG71

AH13

VSS_AH13

AH6

VSS_AH6

AH63

VSS_AH63

AH64

VSS_AH64

AH67

VSS_AH67

AJ15

VSS_AJ15

AJ18

VSS_AJ18

AJ20

VSS_AJ20

AJ4

VSS_AJ4

AK11

VSS_AK11

AK16

VSS_AK16

AK18

VSS_AK18

AK21

VSS_AK21

AK22

VSS_AK22

AK27

VSS_AK27

AK63

VSS_AK63

AK68

VSS_AK68

AK69

VSS_AK69

AK8

VSS_AK8

AL2

VSS_AL2

AL28

VSS_AL28

AL32

VSS_AL32

AL35

VSS_AL35

AL38

VSS_AL38

AL4

VSS_AL4

AL45

VSS_AL45

AL48

VSS_AL48

AL52

VSS_AL52

AL55

VSS_AL55

AL58

VSS_AL58

AL64

VSS_AL64

SKYLAKE-U_BGA1356

REV = 1
@

GND 1 OF 3

1 OF 20

VSS_AL65

VSS_AL66
VSS_AM13
VSS_AM21
VSS_AM25
VSS_AM27
VSS_AM43
VSS_AM45
VSS_AM46
VSS_AM55
VSS_AM60
VSS_AM61
VSS_AM68
VSS_AM71

VSS_AM8
VSS_AN20
VSS_AN23
VSS_AN28
VSS_AN30
VSS_AN32
VSS_AN33
VSS_AN35
VSS_AN37
VSS_AN38
VSS_AN40
VSS_AN42
VSS_AN58
VSS_AN63
VSS_AP10
VSS_AP18
VSS_AP20
VSS_AP23
VSS_AP28
VSS_AP32
VSS_AP35
VSS_AP38
VSS_AP42
VSS_AP58
VSS_AP63
VSS_AP68
VSS_AP70
VSS_AR11
VSS_AR15
VSS_AR16
VSS_AR20
VSS_AR23
VSS_AR28
VSS_AR35
VSS_AR42
VSS_AR43
VSS_AR45
VSS_AR46
VSS_AR48

VSS_AR5
VSS_AR50
VSS_AR52
VSS_AR53
VSS_AR55
VSS_AR58
VSS_AR63

VSS_AR8

VSS_AT2
VSS_AT20
VSS_AT23
VSS_AT28
VSS_AT35

VSS_AT4
VSS_AT42
VSS_AT56
VSS_AT58

4

AL65
AL66
AM13
AM21
AM25
AM27
AM43
AM45
AM46
AM55
AM60
AM61
AM68
AM71
AM8
AN20
AN23
AN28
AN30
AN32
AN33
AN35
AN37
AN38
AN40
AN42
AN58
AN63
AP10
AP18
AP20
AP23
AP28
AP32
AP35
AP38
AP42
AP58
AP63
AP68
AP70
AR11
AR15
AR16
AR20
AR23
AR28
AR35
AR42
AR43
AR45
AR46
AR48
AR5
AR50
AR52
AR53
AR55
AR58
AR63
AR8
AT2
AT20
AT23
AT28
AT35
AT4
AT42
AT56
AT58

?

UC1Q

AT63

VSS_AT63

AT68

VSS_AT68

AT71

VSS_AT71

AU10

VSS_AU10

AU15

VSS_AU15

AU20

VSS_AU20

AU32

VSS_AU32

AU38

VSS_AU38

AV1

VSS_AV1

AV68

VSS_AV68

AV69

VSS_AV69

AV70

VSS_AV70

AV71

VSS_AV71

AW10

VSS_AW10

AW12

VSS_AW12

AW14

VSS_AW14

AW16

VSS_AW16

AW18

VSS_AW18

AW21

VSS_AW21

AW23

VSS_AW23

AW26

VSS_AW26

AW28

VSS_AW28

AW30

VSS_AW30

AW32

VSS_AW32

AW34

VSS_AW34

AW36

VSS_AW36

AW38

VSS_AW38

AW41

VSS_AW41

AW43

VSS_AW43

AW45

VSS_AW45

AW47

VSS_AW47

AW49

VSS_AW49

AW51

VSS_AW51

AW53

VSS_AW53

AW55

VSS_AW55

AW57

VSS_AW57

AW6

VSS_AW6

AW60

VSS_AW60

AW62

VSS_AW62

AW64

VSS_AW64

AW66

VSS_AW66

AW8

VSS_AW8

AY66

VSS_AY66

B10

VSS_B10

B14

VSS_B14

B18

VSS_B18

B22

VSS_B22

B30

VSS_B30

B34

VSS_B34

B39

VSS_B39

B44

VSS_B44

B48

VSS_B48

B53

VSS_B53

B58

VSS_B58

B62

VSS_B62

B66

VSS_B66

B71

VSS_B71

BA1

VSS_BA1

BA10

VSS_BA10

BA14

VSS_BA14

BA18

VSS_BA18

BA2

VSS_BA2

BA23

VSS_BA23

BA28

VSS_BA28

BA32

VSS_BA32

BA36

VSS_BA36

F68

VSS_F68

BA45

VSS_BA45

SKYLAKE-U_BGA1356

REV = 1
@

3

SKL_U LT

GND 2 OF 3

?

1 OF 20

VSS_BA49
VSS_BA53
VSS_BA57

VSS_BA6
VSS_BA62
VSS_BA66
VSS_BA71
VSS_BB18
VSS_BB26
VSS_BB30
VSS_BB34
VSS_BB38
VSS_BB43
VSS_BB55

VSS_BB6
VSS_BB60
VSS_BB64
VSS_BB67
VSS_BB70

VSS_C1

VSS_C25

VSS_C5
VSS_D10
VSS_D11
VSS_D14
VSS_D18
VSS_D22
VSS_D25
VSS_D26
VSS_D30
VSS_D34
VSS_D39
VSS_D44
VSS_D45
VSS_D47
VSS_D48
VSS_D53
VSS_D58

VSS_D6
VSS_D62
VSS_D66
VSS_D69
VSS_E11
VSS_E15
VSS_E18
VSS_E21
VSS_E46
VSS_E50
VSS_E53
VSS_E56

VSS_E6
VSS_E65
VSS_E71

VSS_F1
VSS_F13

VSS_F2
VSS_F22
VSS_F23
VSS_F27
VSS_F28
VSS_F32
VSS_F33
VSS_F35
VSS_F37
VSS_F38

VSS_F4
VSS_F40
VSS_F42

VSS_BA41

2

BA49
BA53
BA57
BA6
BA62
BA66
BA71
BB18
BB26
BB30
BB34
BB38
BB43
BB55
BB6
BB60
BB64
BB67
BB70
C1
C25
C5
D10
D11
D14
D18
D22
D25
D26
D30
D34
D39
D44
D45
D47
D48
D53
D58
D6
D62
D66
D69
E11
E15
E18
E21
E46
E50
E53
E56
E6
E65
E71
F1
F13
F2
F22
F23
F27
F28
F32
F33
F35
F37
F38
F4
F40
F42
BA41

?

F8
G10
G22
G43
G45
G48

G5
G52
G55
G58

G6
G60
G63
G66
H15
H18
H71

J11
J13
J25
J28
J32
J35
J38
J42

J8
K16
K18
K22
K61
K63
K64
K65
K66
K67
K68
K70
K71

L11
L16
L17

SKYLAKE-U_BGA1356

REV = 1
@

SKL_U LT

UC1R

VSS_F8
VSS_G10
VSS_G22
VSS_G43
VSS_G45
VSS_G48
VSS_G5
VSS_G52
VSS_G55
VSS_G58
VSS_G6
VSS_G60
VSS_G63
VSS_G66
VSS_H15
VSS_H18
VSS_H71
VSS_J11
VSS_J13
VSS_J25
VSS_J28
VSS_J32
VSS_J35
VSS_J38
VSS_J42
VSS_J8
VSS_K16
VSS_K18
VSS_K22
VSS_K61
VSS_K63
VSS_K64
VSS_K65
VSS_K66
VSS_K67
VSS_K68
VSS_K70
VSS_K71
VSS_L11
VSS_L16
VSS_L17

GND 3 OF 3

?

1 OF 20

VSS_L18

VSS_L2

VSS_L20

VSS_L4

VSS_L8
VSS_N10
VSS_N13
VSS_N19
VSS_N21

VSS_N6
VSS_N65
VSS_N68
VSS_P17
VSS_P19
VSS_P20
VSS_P21
VSS_R13

VSS_R6
VSS_T15
VSS_T17
VSS_T18

VSS_T2

VSS_T21

VSS_T4
VSS_U10
VSS_U63
VSS_U64
VSS_U66
VSS_U67
VSS_U69
VSS_U70
VSS_V16
VSS_V17
VSS_V18

VSS_W13

VSS_W6

VSS_W9
VSS_Y17
VSS_Y19
VSS_Y20
VSS_Y21

L18
L2
L20
L4
L8
N10
N13
N19
N21
N6
N65
N68
P17
P19
P20
P21
R13
R6
T15
T17
T18
T2
T21
T4
U10
U63
U64
U66
U67
U69
U70
V16
V17
V18
W13
W6
W9
Y17
Y19
Y20
Y21

?

1

A A

Titl e

Titl e

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D
DEPARTMENT EXCEPT A S AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT A S AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT A S AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

3

2015/08/20

2015/08/20

2015/08/20

LC Future Center Secret Data

LC Future Center Secret Data

LC Future Center Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

2016/08/20

2016/08/20

2016/08/20

Titl e

MCP (VSS)

MCP (VSS)

MCP (VSS)

Size Document Number Re v

Size Document Number Re v

Size Document Number Re v

Custom

Custom

Custom

Date : Sheet o f

Date : Sheet o f

Date : Sheet o f

DG421

DG421

DG421

Sunday, January 22, 2017

Sunday, January 22, 2017

Sunday, January 22, 2017

15 60

15 60

15 60

1

1.0

1.0

1.0

5

CPU_CFG 0

D D

RC1618
1K_040 2_5%

@

1 2

C C

B B

RC106
1K_040 2_5%

1 2

RC162

49.9_0 402_1%

1 2

Pin Name Strap Description Configuration

A A

CFG[4] Display Port

Presence strap

— 1 = eD P Disabled
— 0 = eDP Enabled

5

TC142PAD @
TC143PAD @
TC144PAD @

TC146PAD @
TC147PAD @
TC148PAD @
TC153PAD @
TC150PAD @
TC151PAD @
TC152PAD @
TC157PAD @
TC154PAD @
TC155PAD @
TC156PAD @

TC159PAD @
TC158PAD @

TC161PAD @
TC160PAD @

TC166PAD @

TC186PAD @

TC189PAD @
TC191PAD @

TC171PAD @
TC172PAD @

TC169PAD @
TC170PAD @

Default
Value

1

*

CPU_CFG 1

1

CPU_CFG 2

1

XDP_CPU _CFG3

1

CPU_CFG 4
CPU_CFG 5

1

CPU_CFG 6

1

CPU_CFG 7

1

CPU_CFG 8

1

CPU_CFG 9

1

CPU_CFG 10

1

CPU_CFG 11

1

CPU_CFG 12

1

CPU_CFG 13

1

CPU_CFG 14

1

CPU_CFG 15

1

CPU_CFG 16

1

CPU_CFG 17

1

CPU_CFG 18

1

CPU_CFG 19

1

CFG_RC OMP

XDP_ITP_ PMODE

1

1

1
1

1
1

1
1

4

E68
B67
D65
D67
E70
C68
D68
C67
F71
G69
F70
G68
H70
G71
H69
G70

E63
F63

E66
F66

E60

E8

AY2
AY1

D1
D3

K46
K45

AL25
AL27

C71
B70

F60

A52

BA70
BA68

J71
J68

F65
G65

F61
E61

SKYLAKE- U_BGA1356

REV = 1
@

4

UC1S

CFG[0]
CFG[1]
CFG[2]
CFG[3]
CFG[4]
CFG[5]
CFG[6]
CFG[7]
CFG[8]
CFG[9]
CFG[10]
CFG[11]
CFG[12]
CFG[13]
CFG[14]
CFG[15]

CFG[16]
CFG[17]

CFG[18]
CFG[19]

CFG_RCOMP

ITP_PMODE

RSVD_AY2
RSVD_AY1

RSVD_D1
RSVD_D3

RSVD_K46
RSVD_K45

RSVD_AL25
RSVD_AL27

RSVD_C71
RSVD_B70

RSVD_F60

RSVD_A52

RSVD_TP_BA70
RSVD_TP_BA68

RSVD_J71
RSVD_J68

VSS_F65
VSS_G65

RSVD_F61
RSVD_E61

SKL_ ULT

RESERVED SIGNALS-1

?

1 OF 20

3

RSVD_TP_BB68
RSVD_TP_BB69

RSVD_TP_AK13
RSVD_TP_AK12

RSVD_TP_AW71
RSVD_TP_AW70

PROC_SELECT#

BB68
BB69

AK13
AK12

BB2

RSVD_BB2

BA3

RSVD_BA3

AU5

TP5

AT5

TP6

D5

RSVD_D5

D4

RSVD_D4

B2

RSVD_B2

C2

RSVD_C2

B3

RSVD_B3

A3

RSVD_A3

AW1

RSVD_AW1

E1

RSVD_E1

E2

RSVD_E2

BA4

RSVD_BA4

BB4

RSVD_BB4

A4

RSVD_A4

C4

RSVD_C4

BB5

TP4

A69

RSVD_A69

B69

RSVD_B69

RSVD_AY3

RSVD_D71
RSVD_C70

RSVD_C54
RSVD_D54

TP1
TP2

VSS_AY71

ZVM#

MSM#

?

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TR ANSFERED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TR ANSFERED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TR ANSFERED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF LC FUTURE CENT ER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF LC FUTURE CENT ER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF LC FUTURE CENT ER.

AY3

D71
C70

C54
D54

AY4
BB3

AY71
AR56

AW71
AW70

AP56
C64

RSVD_AY 3

VSS_AY71

PROC_S ELECT#

3

2015/08/20

2015/08/20

2015/08/20

1

TC173 P AD@

1

TC174 P AD@

1

TC175 P AD@

1

TC176 P AD@

1

TC183 P AD@

1

TC185 P AD@

1

TC184 P AD@

1

TC181 P AD@

1

TC187 P AD@

1

TC182 P AD@

1

TC188 P AD@

1

TC193 P AD@

1

TC190 P AD@

1

TC192 P AD@

1

TC167 P AD@

1

TC177 P AD@

1

TC178 P AD@

1

TC168 P AD@

1 2

LC Future Center Secret Da ta

LC Future Center Secret Da ta

LC Future Center Secret Da ta

Deciphered Date

Deciphered Date

Deciphered Date

+1.8VAL W

need to check with Intel

need to check with Intel

R22100K_0 402_5% Canno nlake@

2

Cannon lake@

RC1582 0_0 402_5%
RC1583 0_0 402_5%

Cannon lake@

+VCCST_ CPU

2

12
12

2016/08/20

2016/08/20

2016/08/20

@

@

1 2

1 2

RSVD_U1 2
RSVD_U1 1

RC107
0_0402 _5%

RC108
0_0402 _5%

1

F6
E3
C11
B11
A11
D12
C12
F52

+VCCST_ CPU

RSVD_F5 2

16 60

16 60

16 60

12

RC1619
150_04 02_5%

@

?

SKL_ ULT

UC1T

AW69
AW68

AU56

AW48

C7
U12
U11
H11

Titl e

Titl e

Titl e

Size D ocument Number Re v

Size D ocument Number Re v

Size D ocument Number Re v

Custom

Custom

Custom

Date : Sheet o f

Date : Sheet o f

Date : Sheet o f

SPAR E

RSVD_AW69
RSVD_AW68
RSVD_AU56
RSVD_AW48
RSVD_C7
RSVD_U12
RSVD_U11
RSVD_H11

SKYLAKE- U_BGA1356

REV = 1
@

MCP (CFG,RESERVED)

MCP (CFG,RESERVED)

MCP (CFG,RESERVED)

Sunday, Jan uary 22, 2017

Sunday, Jan uary 22, 2017

Sunday, Jan uary 22, 2017

1 OF 20

RSVD_F6
RSVD_E3

RSVD_C11

RSVD_B11

RSVD_A11
RSVD_D12
RSVD_C12

RSVD_F52

DG421

DG421

DG421

?

1

1.0

1.0

1.0

5

12

RD39

MD@

240_0402_1%

P3
P7
R3
N7
N3
P8
P2
R8
R2
R7
M3
T2
M7
T8

L2
M8
L8

K8
K7

K2

F3
G3
A7
B7

E2
E7

N2
N8

L3
L7
P9

M2

K3

T3

N9

P1

F1
H1
A2
D2
E3
A8
D8
E8
C9
H9

F9

12

RD43

MD@

240_0402_1%

UD1

P3

A0

P7

A1

R3

A2

N7

A3

N3

A4

P8

A5

P2

A6

R8

A7

R2

A8

R7

A9

M3

A10/AP

T2

A11

M7

A12/BC_N

T8

A13

L2

WE_N/A14

M8

CAS_N/A15

L8

RAS_N/A16

K8

CK_C

K7

CK_T

K2

CKE

F3

LDQS_C

G3

LDQS_T

A7

UDQS_C

B7

UDQS_T

E2

NF/UDM_N/UDBI_N

E7

NF/LDM_N/LDBI_N

N2

BA0

N8

BA1

L3

ACT_N

L7

CS_N

P9

ALERT_N

M2

BG0

K3

ODT

T3

PAR

N9

TEN

P1

RESET_N

F1

VSSQ1

H1

VSSQ2

A2

VSSQ3

D2

VSSQ4

E3

VSSQ5

A8

VSSQ6

D8

VSSQ7

E8

VSSQ8

C9

VSSQ9

H9

VSSQ10

F9

ZQ

MT40A512M16HA083EA_F BGA96

UD3

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC_N
A13

WE_N/A14
CAS_N/A15
RAS_N/A16

CK_C
CK_T

CKE

LDQS_C
LDQS_T
UDQS_C
UDQS_T

NF/UDM_N/UDBI_N
NF/LDM_N/LDBI_N

BA0
BA1

ACT_N
CS_N
ALERT_N

BG0

ODT

PAR

TEN

RESET_N

VSSQ1
VSSQ2
VSSQ3
VSSQ4
VSSQ5
VSSQ6
VSSQ7
VSSQ8
VSSQ9
VSSQ10

ZQ

MT40A512M16HA083EA_F BGA96

DDRA_MA0
DDRA_MA1
DDRA_MA2
DDRA_MA3
DDRA_MA4
DDRA_MA5
DDRA_MA6
DDRA_MA7
DDRA_MA8
DDRA_MA9
DDRA_MA10
DDRA_MA11
DDRA_MA12
DDRA_MA13

D D

C C

B B

A A

DDRA_MA14_WE#5
DDRA_MA15_CAS#5
DDRA_MA16_RAS#5

DDRA_CLK0#5
DDRA_CLK05

DDRA_CKE05

+1.2V +1.2V

1 2

RD65 0_0402_5%@
RD68 0_0402_5%@1 2

DDRA_BS0#5
DDRA_BS1#5

DDRA_ACT#5
DDRA_CS0#5
DDRA_ALERT#5

DDRA_BG05

DDRA_ODT05

DDRA_PAR5

RD94 10K_0402_5%MD@1 2

CPU_DRAMRST#6,18

+1.2V

1 2

RD87 0_0402_5%@

1 2

RD88 0_0402_5%@

1 2

RD96 10K_0402_5%MD@

DDRA_MA14_WE#
DDRA_MA15_CAS#
DDRA_MA16_RAS#

DDRA_CLK0#
DDRA_CLK0

DDRA_CKE0

DDRA_DQS#0
DDRA_DQS0
DDRA_DQS#1
DDRA_DQS1

DDRA_DM1
DDRA_DM0

DDRA_BS0#
DDRA_BS1#

DDRA_ACT#
DDRA_CS0#
DDRA_ALERT#

DDRA_BG0

DDRA_ODT0

DDRA_PAR

TEN_UD1 TEN_UD2

CPU_DRAMRST#

@

1

2

CD47

0.1u_0201_10V6K

DDRA_MA0
DDRA_MA1
DDRA_MA2
DDRA_MA3
DDRA_MA4
DDRA_MA5
DDRA_MA6
DDRA_MA7
DDRA_MA8
DDRA_MA9
DDRA_MA10
DDRA_MA11
DDRA_MA12
DDRA_MA13

DDRA_MA14_WE#
DDRA_MA15_CAS# DDRA_MA14_WE#
DDRA_MA16_RAS#

DDRA_CLK0#
DDRA_CLK0

DDRA_CKE0

DDRA_DQS#5
DDRA_DQS5
DDRA_DQS#4
DDRA_DQS4

DDRA_DM4
DDRA_DM5 DDRA_DM6

DDRA_BS0#
DDRA_BS1#

DDRA_ACT#
DDRA_CS0#
DDRA_ALERT#

DDRA_BG0

DDRA_ODT0

DDRA_PAR

TEN_UD3

CPU_DRAMRST#

@

1

2

0.1u_0201_10V6K

CD107

VDDQ10

VREFCA

VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9

VDDQ10

VREFCA

DQ10
DQ11
DQ12
DQ13
DQ14
DQ15

VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9

VDD10

VPP1
VPP2

VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9

VDD10

VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9

DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9

@

DDRA_DQ2

G2

DDRA_DQ3

DQ0

F7

DDRA_DQ7

DQ1

H3

DDRA_DQ1

DQ2

H7

DDRA_DQ4

DQ3

H2

DDRA_DQ0

DQ4

H8

DDRA_DQ6

DQ5

J3

DDRA_DQ5

DQ6

J7

DDRA_DQ11

DQ7

A3

DDRA_DQ8

DQ8

B8

DDRA_DQ14

DQ9

C3

DDRA_DQ13

DQ10

C7

DDRA_DQ15

DQ11

C2

DDRA_DQ12

DQ12

C8

DDRA_DQ10

DQ13

D3

DDRA_DQ9

DQ14

D7

DQ15

+1.2V

D1

VDD1

J1

VDD2

L1

VDD3

R1

VDD4

B3

VDD5

G7

VDD6

B9

VDD7

J9

VDD8

L9

VDD9

T9

A1
C1
G1
F2
J2
F8
J8
A9
D9
G9

B1

VPP1

R9

VPP2

VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9

@

NC

+VREF_CA_MD

M1

E1
K1
N1
T1
B2
G8
E9
K9
M9

T7

NC

G2
F7
H3
H7
H2
H8
J3
J7
A3
B8
C3
C7
C2
C8
D3
D7

D1
J1
L1
R1
B3
G7
B9
J9
L9
T9

A1
C1
G1
F2
J2
F8
J8
A9
D9
G9

B1
R9

M1

E1
K1
N1
T1
B2
G8
E9
K9
M9

T7

DDRA_DQ43
DDRA_DQ44
DDRA_DQ46
DDRA_DQ40
DDRA_DQ47
DDRA_DQ45
DDRA_DQ42
DDRA_DQ41
DDRA_DQ34
DDRA_DQ37
DDRA_DQ39
DDRA_DQ32
DDRA_DQ35
DDRA_DQ33
DDRA_DQ38
DDRA_DQ36

+1.2V

+VREF_CA_MD

1

MD@

2

.047U_0201_6.3V6K

CD113

1

MD@

MD@

2

.047U_0201_6.3V6K

CD115

4

DDRA_MA0
DDRA_MA1
DDRA_MA2
DDRA_MA3
DDRA_MA4
DDRA_MA5
DDRA_MA6
DDRA_MA7
DDRA_MA8
DDRA_MA9
DDRA_MA10
DDRA_MA11
DDRA_MA12
DDRA_MA13

DDRA_MA14_WE#
DDRA_MA15_CAS#
DDRA_MA16_RAS#

DDRA_CLK0#
DDRA_CLK0

DDRA_CKE0

DDRA_DQS#2
DDRA_DQS2
DDRA_DQS#3
DDRA_DQS3

1 2

RD66 0 _0402_5%@
RD69 0 _0402_5%@1 2

+2.5V_DDR

1

1

CD@

MD@

1

MD@

2

0.1u_0201_10V6K

CD120

1

2

0.1u_0201_10V6K

CD149

2

2

1U_0402_6.3V6K

1U_0402_6.3V6K

CD123

CD121

+2.5V_DDR

1

1

CD@

2

2

1U_0402_6.3V6K

1U_0402_6.3V6K

CD@

CD151

CD150

RD95 1 0K_0402_5%MD@1 2

+1.2V

1 2

RD89 0_0402_5%@

1 2

RD90 0_0402_5%@

1 2

RD97 10K_0402_5%MD@

DDRA_DM3
DDRA_DM2

DDRA_BS0#
DDRA_BS1#

DDRA_ACT#
DDRA_CS0#
DDRA_ALERT#

DDRA_BG0

DDRA_ODT0

DDRA_PAR

CPU_DRAMRST#

@

1

2

CD48

0.1u_0201_10V6K

12

RD40

MD@

240_0402_1%

DDRA_MA0

P3

DDRA_MA1

P7

DDRA_MA2

R3

DDRA_MA3

N7

DDRA_MA4

N3

DDRA_MA5

P8

DDRA_MA6

P2

DDRA_MA7

R8

DDRA_MA8

R2

DDRA_MA9

R7

DDRA_MA10

M3

DDRA_MA11

T2

DDRA_MA12

M7

DDRA_MA13

T8

L2

DDRA_MA15_CAS#

M8

DDRA_MA16_RAS#

L8

DDRA_CLK0#

K8

DDRA_CLK0

K7

DDRA_CKE0

K2

DDRA_DQS#7

F3

DDRA_DQS7

G3

DDRA_DQS#6

A7

DDRA_DQS6

B7

E2

DDRA_DM7

E7

DDRA_BS0#

N2

DDRA_BS1#

N8

DDRA_ACT#

L3

DDRA_CS0#

L7

DDRA_ALERT#

P9

DDRA_BG0

M2

DDRA_ODT0

K3

DDRA_PAR

T3

TEN_UD4

N9

CPU_DRAMRST#

P1

@

1

2

0.1u_0201_10V6K

CD108

F1
H1
A2
D2
E3
A8
D8
E8
C9
H9

F9

12

RD44

MD@

240_0402_1%

UD2

P3

A0

P7

A1

R3

A2

N7

A3

N3

A4

P8

A5

P2

A6

R8

A7

R2

A8

R7

A9

M3

A10/AP

T2

A11

M7

A12/BC_N

T8

A13

L2

WE_N/A14

M8

CAS_N/A15

L8

RAS_N/A16

K8

CK_C

K7

CK_T

K2

CKE

F3

LDQS_C

G3

LDQS_T

A7

UDQS_C

B7

UDQS_T

E2

NF/UDM_N/UDBI_N

E7

NF/LDM_N/LDBI_N

N2

BA0

N8

BA1

L3

ACT_N

L7

CS_N

P9

ALERT_N

M2

BG0

K3

ODT

T3

PAR

N9

TEN

P1

RESET_N

F1

VSSQ1

H1

VSSQ2

A2

VSSQ3

D2

VSSQ4

E3

VSSQ5

A8

VSSQ6

D8

VSSQ7

E8

VSSQ8

C9

VSSQ9

H9

VSSQ10

F9

ZQ

MT40A512M16HA083EA_F BGA96

UD4

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC_N
A13

WE_N/A14
CAS_N/A15
RAS_N/A16

CK_C
CK_T

CKE

LDQS_C
LDQS_T
UDQS_C
UDQS_T

VDDQ1

NF/UDM_N/UDBI_N

VDDQ2

NF/LDM_N/LDBI_N

VDDQ3
VDDQ4

BA0

VDDQ5

BA1

VDDQ6
VDDQ7

ACT_N

VDDQ8

CS_N

VDDQ9

ALERT_N

VDDQ10

BG0

ODT

VREFCA

PAR

TEN

RESET_N

VSSQ1
VSSQ2
VSSQ3
VSSQ4
VSSQ5
VSSQ6
VSSQ7
VSSQ8
VSSQ9
VSSQ10

ZQ

MT40A512M16HA083EA_F BGA96

3

@

DDRA_DQ18

G2

DDRA_DQ19

DQ0

F7

DDRA_DQ16

DQ1

H3

DDRA_DQ21

DQ2

H7

DDRA_DQ22

DQ3

H2

DDRA_DQ17

DQ4

H8

DDRA_DQ23

DQ5

J3

DDRA_DQ20

DQ6

J7

DDRA_DQ30

DQ7

A3

DDRA_DQ28

DQ8

B8

DDRA_DQ26

DQ9

C3

DDRA_DQ25

DQ10

C7

DDRA_DQ31

DQ11

C2

DDRA_DQ29

DQ12

C8

DDRA_DQ27

DQ13

D3

DDRA_DQ24

DQ14

D7

DQ15

+1.2V

D1

VDD1

J1

VDD2

L1

VDD3

R1

VDD4

B3

VDD5

G7

VDD6

B9

VDD7

J9

VDD8

L9

VDD9

T9

VDD10

A1

VDDQ1

C1

VDDQ2

G1

VDDQ3

F2

VDDQ4

J2

VDDQ5

F8

VDDQ6

J8

VDDQ7

A9

VDDQ8

D9

VDDQ9

G9

VDDQ10

B1

VPP1

R9

VPP2

VREFCA

VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9

@

DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8

DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15

VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9

VDD10

VPP1
VPP2

VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9

NC

+VREF_CA_MD

M1

E1
K1
N1
T1
B2
G8
E9
K9
M9

T7

NC

G2
F7
H3
H7
H2
H8
J3
J7
A3
B8
C3
C7
C2
C8
D3
D7

D1
J1
L1
R1
B3
G7
B9
J9
L9
T9

A1
C1
G1
F2
J2
F8
J8
A9
D9
G9

B1
R9

M1

E1
K1
N1
T1
B2
G8
E9
K9
M9

T7

DDRA_DQ59
DDRA_DQ60
DDRA_DQ62
DDRA_DQ56
DDRA_DQ63
DDRA_DQ61
DDRA_DQ58
DDRA_DQ57
DDRA_DQ54
DDRA_DQ52
DDRA_DQ51
DDRA_DQ49
DDRA_DQ50
DDRA_DQ53
DDRA_DQ55
DDRA_DQ48

+1.2V

+VREF_CA_MD

1

1

MD@

MD@

2

2

0.1u_0201_10V6K

.047U_0201_6.3V6K

CD114

CD122

1

1

MD@

MD@

2

2

0.1u_0201_10V6K

.047U_0201_6.3V6K

CD153

CD116

DDR_SA_VREF CA5

CD111

0.022U_0201_6.3V6 -K

24.9_0402_1% MD@

+2.5V_DDR

1

1

MD@

MD@

2

2

1U_0402_6.3V6K

1U_0402_6.3V6K

CD125

CD124

+2.5V_DDR

1

1

MD@

2

2

1U_0402_6.3V6K

1U_0402_6.3V6K

CD@

CD155

CD154

2

+1.2V

1

12

MD@

MD@

RD45

CD119

2

1 2

MD@

2.7_0402_1%

(1uF_0402_6.3V) *16
Place 4 near each DRAM

1

1

MD@

2

2

1U_0402_6.3V6K

1U_0402_6.3V6K

CD@

CD127

CD126

(1OuF_0603_6.3V) *5
Place around the DRAMs

1

1

CD@

2

2

10U_0603_6.3V6M

CD143

CD142

(1OuF_0603_6.3V) *3
Place around the DRAMs

1

1

MD@

2

2

10U_0603_6.3V6M

CD152

CD156

(1uF_0402_6.3V) *8
Place 2 near each DRAM

1

1

MD@

2

2

1U_0402_6.3V6K

1U_0402_6.3V6K

CD159

CD158

1

2

CD128

10U_0603_6.3V6M

10U_0603_6.3V6M

1

2

CD@

CD160

1.8K_0402_1%

12

RD47

1.8K_0402_1%MD@

MD@

1U_0402_6.3V6K

MD@

CD@

CD@

1U_0402_6.3V6K

+VREF_CA_MD

1

MD@

CD112

0.1u_0201_10V6K

2

1

1

1

CD@

CD@

2

2

2

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

CD@

CD129

1

2

10U_0603_6.3V6M

CD144

CD132

CD130

CD131

1

1

MD@

2

2

10U_0603_6.3V6M

10U_0603_6.3V6M

CD@

CD145

CD146

1

2

10U_0603_6.3V6M

CD147

1

1

1

1

CD@

MD@

2

2

2

2

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

CD@

CD161

CD162

CD164

CD163

0.1u_0201_10V6K

RD46

1

MD@

2

12

RD48

+1.2V

MD@

+1.2V

CD@

+2.5V_DDR

MD@

+0.6VS

MD@

1

1

MD@

2

2

1U_0402_6.3V6K

1U_0402_6.3V6K

CD133

(1OuF_0603_6.3V) *2
Place around the DRAMs

1

MD@

2

1U_0402_6.3V6K

CD165

MD@

CD@

CD166

1

2

DDRA_DQ[0..63]

DDRA_DQS#[0..7]

DDRA_DQS[0..7]

DDRA_MA[0..13]

1

MD@

2

1U_0402_6.3V6K

CD134

+1.2V

+2.5V_DDR

1

MD@

2

10U_0603_6.3V6M

CD167

1

2

CD135

10U_0603_6.3V6M

MD@

1U_0402_6.3V6K

1

2

1

2

DDRA_CLK0#
DDRA_CLK0

DDRA_CS0#
DDRA_ODT0

DDRA_CKE0

DDRA_MA0
DDRA_MA1
DDRA_MA2
DDRA_MA3

DDRA_MA4
DDRA_MA5
DDRA_MA6
DDRA_MA7

DDRA_MA8
DDRA_MA9
DDRA_MA10
DDRA_MA11

DDRA_MA12
DDRA_MA13
DDRA_MA14_WE#
DDRA_MA15_CAS#

DDRA_MA16_RAS#
DDRA_BG0
DDRA_BS0#
DDRA_BS1#

DDRA_ACT#
DDRA_PAR

DDRA_ALERT#

1

2

1U_0402_6.3V6K

CD136

CD109
22P_0402_50V8-J

RF@

CD157
22P_0402_50V8-J

RF@

DDRA_DQ[0..63] 5

DDRA_DQS#[0..7] 5

DDRA_DQS[0..7] 5

1

2

1U_0402_6.3V6K

CD@

CD137

DDRA_MA[0..13] 5

1 2

RD49 36_0402_1%MD@

1 2

RD50 36_0402_1%MD@

1 2

RD51 34.8_0402_1%MD@

1 2

RD52 34.8_0402_1%MD@

1 2

RD53 34.8_0402_1%MD@

1 2

RD54 34.8_0402_1%MD@

1 2

RD55 34.8_0402_1%MD@

1 2

RD56 34.8_0402_1%MD@

1 2

RD57 34.8_0402_1%MD@

1 2

RD58 34.8_0402_1%MD@

1 2

RD59 34.8_0402_1%MD@

1 2

RD60 34.8_0402_1%MD@

1 2

RD61 34.8_0402_1%MD@

1 2

RD62 34.8_0402_1%MD@

1 2

RD63 34.8_0402_1%MD@

1 2

RD64 34.8_0402_1%MD@

1 2

RD67 34.8_0402_1%MD@

1 2

RD70 34.8_0402_1%MD@

1 2

RD71 34.8_0402_1%MD@

1 2

RD72 34.8_0402_1%MD@

1 2

RD73 34.8_0402_1%MD@

1 2

RD74 34.8_0402_1%MD@

1 2

RD75 34.8_0402_1%MD@

1 2

RD76 34.8_0402_1%MD@
RD77 34.8_0402_1%MD@1 2

1 2

RD78 34.8_0402_1%MD@

1 2

RD79 34.8_0402_1%MD@

1 2

RD86 49.9_0402_1%MD@

1

MD@

2

1U_0402_6.3V6K

CD@

CD138

CD139

1

CD110
22P_0402_50V8-J

RF@

2

1

CD148
22P_0402_50V8-J

RF@

2

+0.6VS

1

2

1

1

MD@

2

2

1U_0402_6.3V6K

CD140

CD168
22P_0402_50V8-J

RF@

1

+0.6VS

+1.2V

1

MD@

2

1U_0402_6.3V6K

1U_0402_6.3V6K

CD141

1

CD169
22P_0402_50V8-J

RF@

2

Title

Title

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

5

4

3

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

2

2015/08/20

2015/08/20

2015/08/20

LC Future Center Secret Data

LC Future Center Secret Data

LC Future Center Secret Data

Deciphered Da te

Deciphered Da te

Deciphered Da te

2016/08/20

2016/08/20

2016/08/20

Title

DDR4 Memory Down

DDR4 Memory Down

DDR4 Memory Down

Size Do cument Number Re v

Size Do cument Number Re v

Size Do cument Number Re v

Custom

Custom

Custom

Date : Sheet of

Date : Sheet of

Date : Sheet of

Sunday, January 22, 2017

Sunday, January 22, 2017

Sunday, January 22, 2017

1

DG421

DG421

DG421

17 60

17 60

17 60

1.0

1.0

1.0

5

DDR4 SO-DIMM

+1.2V +1.2V +1.2V+1.2V+1.2V +1.2V +1.2V +1.2V

DDRB_DQ12

DDRB_DQ13

DDRB_DQS#1
DDRB_DQS1

12

12

RD93
240_0402_1%

DDRB_DQ10

DDRB_DQ14

DDRB_DQ0

DDRB_DQ6

DDRB_DQ7

DDRB_DQ3

DDRB_DQ18

DDRB_DQ16

DDRB_DQS#2
DDRB_DQS2

DDRB_DQ22

DDRB_DQ23

DDRB_DQ27

DDRB_DQ28

DDRB_DQ25

DDRB_DQ30

DDRB_DQS#8
DDRB_DQS8

DDRB_CKE0

DDRB_BG1
DDRB_BG0

DDRB_MA12
DDRB_MA9

DDRB_MA8
DDRB_MA6

1

CD13

0.022U_0201_6.3V6-K

2

12

RD6

24.9_0402_1%

0.1u_0201_10V6K

D D

+1.2V

RD92

240_0402_1%

C C

DDRB_CKE06

DDRB_BG16
DDRB_BG06

DDRB_MA126
DDRB_MA96

DDRB_MA86
DDRB_MA66

B B

DDR_SB_VREFCA5

RD4

101
103
105
107
109
111
113
115
117
119
121
123
125
127
129

CD117

1 2

2_0402_5%

1
3
5
7

9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99

JDDR1A

VSS_1
DQ5
VSS_3
DQ1
VSS_5
DQS0_C

DM0_n/DBIO_n/NC
DQS0_t
VSS_8
DQ7
VSS_10
DQ3
VSS_12
DQ13
VSS_14
DQ9
VSS_16
DM1_n/DBl1_n/NC
VSS_17
DQ15
VSS_19
DQ10
VSS_21
DQ21
VSS_23
DQ17
VSS_25
DQS2_c

DM2_n/DBl2_n/NC
DQS2_t
VSS_28
DQ23
VSS_30
DQ19
VSS_32
DQ29
VSS_34
DQ25
VSS_36
DM3_n/DBl3_n/NC
VSS_37
DQ30
VSS_39
DQ26
VSS_41
CB5/NC
VSS_43
CB1/NC
VSS_45
DQS8_c

DM8_n/DBI8_n/NC
DQS8_t
VSS_48
CB2/NC
VSS_50
CB3/NC
VSS_52
CKE0
VDD_1
BG1
BG0
VDD_3
A12
A9
VDD_5
A8
A6
VDD_7

ARGOS_D4AS0-26001-1P60

ME@

+1.2V

1

12

2

RD3

1K_0402_1%

12

RD5

1K_0402_1%

VSS_2

VSS_4

VSS_6

VSS_7

VSS_9

VSS_11

VSS_13

VSS_15
DQS1_c

DQS1_t

VSS_18

VSS_20

VSS_22

VSS_24

VSS_26

VSS_27

VSS_29

VSS_31

VSS_33

VSS_35
DQS3_c

DQS3_t

VSS_38

VSS_40

VSS_42
CB4/NC
VSS_44
CB0/NC
VSS_46

VSS_47
CB6/NC
VSS_49
CB7/NC
VSS_51

RESET_n

VDD_2
ACT_n

ALERT_n

VDD_4

VDD_6

VDD_8

DQ4

DQ0

DQ6

DQ2

DQ12

DQ8

DQ14

DQ11

DQ20

DQ16

DQ22

DQ18

DQ28

DQ24

DQ31

DQ27

CKE1

A11

4

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122

A7

124
126

A5

128

A4

130

Note:
VREF trace width:20 mils at least
Spacing:20mil s to other si gnal/planes
Place near DIMM scoket

1

CD14

0.1u_0201_10V6K

2

+VREF_CA_DIMM

DDRB_DQ9

DDRB_DQ8

DDRB_DQ11

DDRB_DQ15

DDRB_DQ5

DDRB_DQ4

DDRB_DQS#0
DDRB_DQS0

DDRB_DQ1

DDRB_DQ2

DDRB_DQ20

DDRB_DQ21

DDRB_DQ17

DDRB_DQ19

DDRB_DQ24

DDRB_DQ29

DDRB_DQS#3
DDRB_DQS3

DDRB_DQ26

DDRB_DQ31

CPU_DRAMRST#
DDRB_CKE1

DDRB_ACT#
DDRB_ALERT#

DDRB_MA11
DDRB_MA7

DDRB_MA5
DDRB_MA4

DDRB_DQ[0..63]

DDRB_DQS#[0..7]

DDRB_DQS[0..7]

DDRB_CKE1 6

DDRB_ACT# 6
DDRB_ALERT# 6

DDRB_MA11 6
DDRB_MA7 6

DDRB_MA5 6
DDRB_MA4 6

1

CD3

0.1u_0201_10V6K

@

2

+1.2V

3

DDRB_DQ[0..63] 6

DDRB_DQS#[0..7] 6

DDRB_DQS[0..7] 6

CPU_DRAMRST# 6,17

RD1

+3VS

RD2

+2.5V_DDR

2

1

2

CD6

1U_0402_6.3V6K

CD118

JDDR1B

131

A3

133

A1

135

VDD_9

137

CK0_t

139

CK0_c

141

VDD_11

143

Parity

145

BA1

147

VDD_13

149

CS0_n

151

WE_n/A14

153

VDD_15

155

ODT0

157

CS1_n

159

VDD_17

161

ODT1

163

VDD_19

165

C1/CS3_n/NC

167

VSS_53

169

DQ37

171

VSS_55

173

DQ33

175

VSS_57

177

DQS4_c

179

DQS4_t

181

VSS_60

183

DQ38

185

VSS_62

187

DQ34

189

VSS_64

191

DQ44

193

VSS_66

195

DQ40

197

VSS_68

199

DM5_n/DBl5_n/NC

201

VSS_69

203

DQ46

205

VSS_71

207

DQ42

209

VSS_73

211

DQ52

213

VSS_75

215

DQ49

217

VSS_77

219

DQS6_c

221

DQS6_t

223

VSS_80

225

DQ55

227

VSS_82

229

DQ51

231

VSS_84

233

DQ61

235

VSS_86

237

DQ56

239

VSS_88

241

DM7_n/DBl7_n/NC

243

VSS_89

245

DQ62

247

VSS_91

249

DQ58

251

VSS_93

253

SCL

255

VDDSPD

257

VPP_1

259

VPP_2

261

GND_1

ARGOS_D4AS0-26001-1P60

ME@

@

1

1

2

2

1U_0402_6.3V6K

10U_0603_6.3V6M

CD7

EVENT_n

VDD_10

CK1_t

CK1_c

VDD_12

A10/AP

VDD_14

RAS_n/A16

VDD_16

CAS_n/A15

VDD_18

C0/CS2_n/NC

VREFCA

VSS_54

VSS_56

VSS_58

DM4_n/DBl4_n/NC

VSS_59

VSS_61

VSS_63

VSS_65

VSS_67
DQS5_c
DQS5_t
VSS_70

VSS_72

VSS_74

VSS_76

VSS_78

DM6_n/DBl6_n/NC

VSS_79

VSS_81

VSS_83

VSS_85

VSS_87
DQS7_c
DQS7_t
VSS_90

VSS_92

VSS_94

GND_2

1

2

10U_0603_6.3V6M

CD8

CD@

132

A2

134
136
138
140
142
144

A0

146
148
150

BA0

152
154
156
158

A13

160
162
164
166

SA2

168
170

DQ36

172
174

DQ32

176
178
180
182

DQ39

184
186

DQ35

188
190

DQ45

192
194

DQ41

196
198
200
202
204

DQ47

206
208

DQ43

210
212

DQ53

214
216

DQ48

218
220
222
224

DQ54

226
228

DQ50

230
232

DQ60

234
236

DQ57

238
240
242
244
246

DQ63

248
250

DQ59

252
254

SDA

256

SA0

258

Vtt

260

SA1

262

+2.5V_DDR+0.6VS

CD@

DDRB_MA2
DDRB_EVENT#

DDRB_CLK1
DDRB_CLK1#

DDRB_MA0

DDRB_MA10

DDRB_BS0#
DDRB_MA16_RAS#

DDRB_MA15_CAS#
DDRB_MA13

+VREF_CA_DIMM
DDRB_SA2

DDRB_DQ36

DDRB_DQ37

DDRB_DQ34

DDRB_DQ35

DDRB_DQ45

DDRB_DQ44

DDRB_DQS#5
DDRB_DQS5

DDRB_DQ46

DDRB_DQ42

DDRB_DQ52

DDRB_DQ49

DDRB_DQ55

DDRB_DQ51

DDRB_DQ56

DDRB_DQ61

DDRB_DQS#7
DDRB_DQS7

DDRB_DQ62

DDRB_DQ63

SMB_DATA_S3
DDRB_SA0

DDRB_SA1

1

1

2

2

10U_0603_6.3V6M

10U_0603_6.3V6M

CD9

CD10

1

2

1

CD5

0.1u_0201_10V6K

2

DDRB_MA3
DDRB_MA1

DDRB_CLK0
DDRB_CLK0#

DDRB_PAR

DDRB_BS1#

DDRB_CS0#
DDRB_MA14_WE#

DDRB_ODT0
DDRB_CS1#

DDRB_ODT1

DDRB_DQ32

DDRB_DQ33

DDRB_DQS#4
DDRB_DQS4

DDRB_DQ39

DDRB_DQ38

DDRB_DQ41

DDRB_DQ40

DDRB_DQ47

DDRB_DQ43

DDRB_DQ53

DDRB_DQ48

DDRB_DQS#6
DDRB_DQS6

DDRB_DQ54

DDRB_DQ50

DDRB_DQ60

DDRB_DQ57

DDRB_DQ59

DDRB_DQ58

SMB_CLK_S3
+VDD_SPD

+VPP

DDRB_MA36
DDRB_MA16

DDRB_CLK06
DDRB_CLK0#6

DDRB_PAR6

DDRB_BS1#6

DDRB_CS0#6
DDRB_MA14_WE#6

DDRB_ODT06
DDRB_CS1#6

DDRB_ODT16

SMB_CLK_S37,40 SMB_DATA_S3 7,40

1 2

@

0_0603_5%

CD4

2.2U_0402_6.3V6M

1 2

@

0_0603_5%

Layout Not e:
Place near DIMM

1

+1.2V

12

RD91

240_0402_1%

@

DDRB_MA2 6

DDRB_CLK1 6
DDRB_CLK1# 6

DDRB_MA0 6

DDRB_MA10 6

DDRB_BS0# 6
DDRB_MA16_RAS# 6

DDRB_MA15_CAS# 6
DDRB_MA13 6

@

1

1

2

2

0.1u_0201_10V6K
CD2

CD1

2.2U_0402_6.3V6M

+0.6VS

1

1

2

2

1U_0402_6.3V6K

1U_0402_6.3V6K

CD11

CD12

CD@

1

1

1

1

2

2

2

10U_0603_6.3V6M

10U_0603_6.3V6M

CD21

CD20

CD19

+3VS +3VS +3VS

12

RD7
0_0402_5%

@

A A

DDRB_SA0 DDRB_SA1 DDRB_SA2

12

RD10
0_0402_5%

@

12

12

RD8
0_0402_5%

@

RD11
0_0402_5%

@

12

RD9
0_0402_5%

@

12

RD12
0_0402_5%

@

SPD Address = 2H

5

4

CD@

+1.2V

1

1

EMC_NS@

2

CD15

1

EMC_NS@

EMC_NS@

2

2

4.7U_0402_6.3V6M

4.7U_0402_6.3V6M
CD16

CD17

For EMC

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING D RAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENT IAL

THIS SHEET OF ENGINEERING D RAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENT IAL

THIS SHEET OF ENGINEERING D RAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENT IAL
AND TRADE SECRET INFORM ATION. THIS SHEET MAY NOT BE TRANSFERE D FROM THE CUSTODY OF THE COMPETENT DIVIS ION OF R&D

AND TRADE SECRET INFORM ATION. THIS SHEET MAY NOT BE TRANSFERE D FROM THE CUSTODY OF THE COMPETENT DIVIS ION OF R&D

AND TRADE SECRET INFORM ATION. THIS SHEET MAY NOT BE TRANSFERE D FROM THE CUSTODY OF THE COMPETENT DIVIS ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED B Y LC FUTURE CENTER NEITHER THIS SHEET N OR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED B Y LC FUTURE CENTER NEITHER THIS SHEET N OR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED B Y LC FUTURE CENTER NEITHER THIS SHEET N OR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT P RIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT P RIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT P RIOR WRITTEN CONSENT OF LC FUTURE CENTER.

3

10U_0603_6.3V6M

0.1u_0201_10V6K

2

CD22

1

EMC_NS@

2

CD18

10U_0603_6.3V6M

0.1u_0201_10V6K

2015/08/20

2015/08/20

2015/08/20

1

2

CD23

CD@

Near JDDRL1

1

1

2

2

10U_0603_6.3V6M

RF@

1

2

CD36

10U_0603_6.3V6M

10U_0603_6.3V6M

CD25

CD24

RF@

1

2

33P_0402_50V8J

33P_0402_50V8J

CD37

LC Future Center Secret Data

LC Future Center Secret Data

LC Future Center Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

1

1

2

2

10U_0603_6.3V6M

CD26

CD27

2

1U_0402_6.3V6K

1

2

1U_0402_6.3V6K

CD28

2016/08/20

2016/08/20

2016/08/20

1

1

1

2

2

2

1U_0402_6.3V6K

1U_0402_6.3V6K

CD29

CD30

CD@

CD31

Title

Title

Title

DDR4 SO-DIMM

DDR4 SO-DIMM

DDR4 SO-DIMM

Size

Size

Size

Document Num ber Re v

Document Num ber Re v

Document Num ber Re v

Custom

Custom

Custom

Date: Sheet o f

Date: Sheet o f

Date: Sheet o f

1

2

1U_0402_6.3V6K

CD32

Sunday, Janu ary 22, 2017

Sunday, Janu ary 22, 2017

Sunday, Janu ary 22, 2017

1

1

2

2

1U_0402_6.3V6K

CD33

CD@

CD34

DG421

DG421

DG421

1U_0402_6.3V6K

1.0

1.0

18 60

18 60

18 60

1

1.0

1U_0402_6.3V6K

5

4

3

2

1

N16x GPIO

GPIO I/O ACTIV E Functio n Description

-

OUT

GPIO0

GPIO1

OUT

GPIO2

GPIO3

GPIO4

GPIO5

GPIO6

GPIO7

GPIO8

GPIO9

GPIO10

GPIO11

GPIO12

GPIO13

GPIO14

GPIO15

OUT

OUT

OUT

OUT

IN

OUT

I/O

I/O N/A

OUT

OUT

IN

OUT

IN

IN

D D

C C

GPIO16

IN

GPIO17

IN

GPIO18

IN

GPIO19

GPIO20

GPIO21

OUT GPU PCIe self-reset control

OVERT

FB Enable for GC6 2.0

N/A

N/A

N/A

N/A

GPU power sequen cing---3V3_MAIN_EN

N/A

-

GPU wake signal for GC6 2.0

N/A

-

System side PCIe rese t Monitor

2.2K Pull-up

FBVREF_ALTV for GDDR5

-

GPU Core VDD PWM control s ignal

AC Pow er Detect Input

-

Phase Shedding

N/A

N/A

N/A

N/A

N/A

N/A

N/A

Active Low Thermal Catastrophic Over TemperatureOUT

(10K pull High)

Performance Mode P0 TDP and EDP-Continuous current (GDDR5)

FBVDDQ

Mem

Min

Core Clk

849

(V)

TBD

NVVDD

(A)

191.616

GPU

Products

N16S-GMR

N16S-GTR

18 1.7 96 7 26.5 2 4 .2 800 6 0

FBVDD

(GPU+Mem)

(1.35V) (1.35V)

(A)

(A)

(W)

(W)

TBD

TBD TBD

4.2

2

TBD

(1.05V)
(6)

800 6 0

Other

(3.3V)

(W)(W)

(mA)(MHz)(W)(W)

N16x Multi-level Straps

Physi cal
Strapping pin

ROM_S CLK

ROM_S I

ROM_S O PCIE_ CFG

STRAP 0

STRAP 1

STRAP 2

STRAP 3

STRAP 4

Power Rai l

+3VGS

+3VGS

+3VGS

+3VGS

+3VGS

+3VGS

+3VGS

+3VGS

Logic al
Strapping Bit3

SOR3_EXPOS ED

DEVID _SEL

Reserved(keep pull-up and pull-down footprint and stuff 50Kohm pull-up)

Reserved(keep pull-up and pull-down footprint and not stuff by default)

Logic al
Strapping Bit2

SOR2_EXPOS ED SOR1_EX POSED SOR0_EXP OSED

Logic al
Strapping Bit1

RAM_CFG[1 ]RAM_CFG[3 ] RAM_CFG[2]

(W)(mA)

TBD

Logic al
Strapping Bit0

RAM_CFG[0 ]

VGA_DE VIC ESMB_AL T_AD DR

N15V-GM Power Sequence

B B

A A

+3VG_ AON

+VGA_ CORE

+1.05V S_V GA

+1.35 VGS

Other Power rail

+3VG_ AON

5

tNVVDD >0

tPEX_VDD >0

1. all power rail ramp up time should be larger than 40us~4ms

Tpower-off <1 0ms

1.all GPU power rails should b e turned off within 10ms

2. Optimus system VDD33 avoids drop down earlie r than NVDD and FBVDDQ

4

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROP RIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROP RIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROP RIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT O F LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT O F LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT O F LC FUTURE CENTER.

3

2015/08/20

2015/08/20

2015/08/20

LC Future Cente r Secret Data

LC Future Cente r Secret Data

LC Future Cente r Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

2016/08/20

2016/08/20

2016/08/20

Titl e

Titl e

Titl e

VGA Notes List

VGA Notes List

VGA Notes List

Size Document Number Re v

Size Document Number Re v

Size Document Number Re v

C

C

C

Date: Sheet of

Date: Sheet of

Date: Sheet of

DG421

DG421

DG421

Sunday, J anuary 22, 2017

Sunday, J anuary 22, 2017

Sunday, J anuary 22, 2017

19 60

19 60

1

19 60

1.0

1.0

1.0

5

PCIE_CRX_GTX_N[0..3]9

PCIE_CRX_GTX_P[0..3]9

PCIE_CTX_C_GRX_N[0..3]9

PCIE_CTX_C_GRX_P[0..3]9

D D

C C

B B

A A

2.2K_0402_5%

VGA_SMB_CK2

VGA_SMB_DA2

GPU_CLKREQ#10

RV3

@

PLT_RST#11,32,37,40,44

PXS_RST#8

+3VG_AON

RV5

2.2K_0402_5%

@

1 2

1 2

S

RV9 0_0402_5%@ 12

PLT_RST#

GPU_PEX_RST_HOLD#

SYS_PEX_RST_MON#

0.1u_0201_10V6K

S

RV7 0_0402_5%@ 12

G

2

QV1A
2N7002KDWH_SOT363-6

@

61

D

1

2

CV23

@

5

+3VG_AON

G

5

QV1B
2N7002KDWH_SOT363-6

@

34

D

+3VGARST

5

UV2

IN1

VCC

OUT

IN2

GND

MC74VHC1G08DFT2G_SC70-5

3

OPT@

RV14 10K_0402_5%OPT@ 12

RV16 0_0402_5%@1 2

DV6

2

3

BAT54AW_SOT323-3

GC6@

RV39 0_0402_5%NGC6@1 2

+3VG_AON

RV40
10K_0402_5%

@

1 2

1

2

2

G

1 3

D

QV5
2N7002KW_SOT323-3

@

RV48

@1 2

0_0402_5%

PU AT EC SIDE, +3VS AND 4.7K

RV10

0_0402_5%

RV12

1

CV11

0.1u_0201_10V6K

OPT@

2

4

+3VG_AON

+3VGS

RV180

2.2K_0402_5%

GC6@

1 2

1 2

1

+3VG_AON

RV44
10K_0402_5%

@

1 2

RV46
10K_0402_5%

@

1 2

CLK_REQ_GPU#

S

EC_SMB_CK2 7,39,44

EC_SMB_DA2 7,39,44

+3VS

@ 12

+3VG_AON

@1 2

0_0402_5%

SYS_PEX_RST_MON#

RV37
10K_0402_5%

@

PLT_RST_VGA#

4

PCIE_CTX_C_GRX_P0
PCIE_CTX_C_GRX_N0
PCIE_CTX_C_GRX_P1
PCIE_CTX_C_GRX_N1
PCIE_CTX_C_GRX_P2
PCIE_CTX_C_GRX_N2
PCIE_CTX_C_GRX_P3
PCIE_CTX_C_GRX_N3

PCIE_CRX_GTX_P0
PCIE_CRX_GTX_N0
PCIE_CRX_GTX_P1 PCIE_CRX_C_GTX_P1

PCIE_CRX_GTX_P2
PCIE_CRX_GTX_N2

PCIE_CRX_GTX_N3 PCIE_CRX_C_GTX_N3

Differential signal

4

CV10 0.22U_0201_6.3V6-KOPT@ 1 2

1 2

CV13 0.22U_0201_6.3V6-KOPT@
CV8 0.22U_0201_6.3V6-KOPT@ 1 2
CV9 0.22U_0201_6.3V6-KOPT@ 1 2

1 2

CV6 0.22U_0201_6.3V6-KOPT@
CV7 0.22U_0201_6.3V6-KOPT@ 1 2

1 2

CV4 0.22U_0201_6.3V6-KOPT@
CV5 0.22U_0201_6.3V6-KOPT@ 1 2

CLK_PCIE_GPU10
CLK_PCIE_GPU#10

RV35

1 2

200_0402_1%

1 2

OPT@

2.49K_0402_1%

PCIE_CRX_C_GTX_P0
PCIE_CRX_C_GTX_N0

PCIE_CRX_C_GTX_N1PCIE_CRX_GTX_N1
PCIE_CRX_C_GTX_P2
PCIE_CRX_C_GTX_N2
PCIE_CRX_C_GTX_P3PCIE_CRX_GTX_P3

CLK_PCIE_GPU
CLK_PCIE_GPU#
CLK_REQ_GPU#

PEX_TSTCLK_OUT

RV32

@

PEX_TSTCLK_OUT#

PLT_RST_VGA#
PEX_TERMP

10P_0201_25V8G

OPT@

AG6
AG7
AF7
AE7
AE9
AF9

AG9
AG10
AF10
AE10
AE12
AF12
AG12
AG13
AF13
AE13
AE15
AF15
AG15
AG16
AF16
AE16
AE18
AF18
AG18
AG19
AF19
AE19
AE21
AF21
AG21
AG22

AC9

AB9
AB10
AC10
AD11
AC11
AC12
AB12
AB13
AC13
AD14
AC14
AC15

AB15
AB16
AC16
AD17
AC17
AC18
AB18
AB19
AC19
AD20
AC20
AC21
AB21
AD23
AE23
AF24
AE24
AG24
AG25

AE8
AD8
AC6

AF22
AE22

AC7

AF25

CV19

UV1A

PEX_RX0
PEX_RX0_N
PEX_RX1
PEX_RX1_N
PEX_RX2
PEX_RX2_N
PEX_RX3
PEX_RX3_N
NC81
NC82
NC83
NC84
NC85
NC86
NC87
NC88
NC1
NC2
NC3
NC4
NC5
NC6
NC7
NC8
NC9
NC10
NC11
NC12
NC13
NC14
NC15
NC16

PEX_TX0
PEX_TX0_N
PEX_TX1
PEX_TX1_N
PEX_TX2
PEX_TX2_N
PEX_TX3
PEX_TX3_N
NC89
NC90
NC91
NC92
NC93
NC94
NC95
NC96
NC17
NC18
NC19
NC20
NC21
NC22
NC23
NC24
NC25
NC26
NC27
NC28
NC29
NC30
NC31
NC32

PEX_REFCLK
PEX_REFCLK_N
PEX_CLKREQ_N

PEX_TSTCLK
PEX_TSTCLK_N

PEX_RST_N
PEX_TERMP

N15S-GT-S-A2_FCBGA595

@

RV38 10M_0402_5%OPT@

YV1

XTAL_IN

1

1

27MHZ_10PF_7V27000050

OPT@

2

3

Part 1 of 6

PCI EXPRESS

1 2

OSC1

GND2

GND12OSC2

3

DACsI2C GPI O

CORE_PLLVDD

CLK

XTAL_OUTBUFF

GPIO10
GPIO11
GPIO12
GPIO13
GPIO14
GPIO15
GPIO16
GPIO17
GPIO18
GPIO19
GPIO20
GPIO21

OVERT

I2CA_SCL

I2CA_SDA

I2CB_SCL

I2CB_SDA

I2CC_SCL
I2CC_SDA

I2CS_SCL

I2CS_SDA

SP_PLLVDD

VID_PLLVDD

XTAL_IN

XTAL_OUT

XTAL_SSIN

4

XTAL_OUT

3

GPIO0
GPIO1
GPIO2
GPIO3
GPIO4
GPIO5
GPIO6
GPIO7
GPIO8
GPIO9

NC100
NC101

NC102
NC103
NC104

NC33

NC97
NC98
NC99

FB_GC6_EN

C6
B2
D6
C7
F9

3VGS_PWR_EN

A3

GPU_EVENT#_R

A4
B6

SYS_PEX_RST_MON#

E9

VGA_ALERT#

F8

GPIO10_FBVREF_ALTV

C5

NVVDD_PWM_VID

E7

VGA_AC_DET_R

D7

PSI_VGA_R

B4
B3
C3
D5
D4
C2
F7
E6

GPU_PEX_RST_HOLD#

C4

A6

OVERT#

AB6

AG3
AF4
AF3

AE3
AE4

W5
AE2
AF2

VGA_CRT_CLK

B7

VGA_CRT_DATA

A7

I2CB_SCL

C9

I2CB_SDA

C8

I2CC_SCL

A9

I2CC_SDA

B9

VGA_SMB_CK2

D9

VGA_SMB_DA2

D8

60mA

L6
M6

45mA

N6

45mA

XTAL_IN

C11

XTAL_OUT

B10

A10

XTALSSIN

C10

XTALOUT

1

CV20
10P_0201_25V8G

OPT@

2

2

FB_GC6_EN 24

3VGS_PWR_EN 22,58

GPIO10_FBVREF_ALTV 25
NVVDD_PWM_VID 58

1 2

RV6 0_0402_5%@

I2C,if not use, can be soft grounded
and delete pull up resistor

---co lin

RB751V-40_SOD323-2

DV1

OPT@

PSI_VGA 58

12

VGA_AC_DET 44

Internal Thermal Sensor

+PLLVDD

RV24 0_0402_5%@1 2

1 2

RV34 10K_0402_5%OPT@1 2
RV36 10K_0402_5%OPT@

+SP_PLLVDD

VGA_CRT_DATA

RV17 2.2K_0402_5%@

VGA_CRT_CLK

RV19 2.2K_0402_5%@

I2CB_SCL

RV22 2.2K_0402_5%@1 2

I2CB_SDA

RV25 2.2K_0402_5%@1 2

I2CC_SCL

RV28 2.2K_0402_5%@1 2

I2CC_SDA

RV30 2.2K_0402_5%@

RV33 10K_0402_5%@1 2

XTALOUT

Under GPU(below 150mils )

+SP_PLLVDD

150mA

Under GPU

+PLLVDD

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE S ECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE S ECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE S ECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

2015/08/20

2015/08/20

2015/08/20

LC Future Center Secret Data

LC Future Center Secret Data

LC Future Center Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

1

+3VG_AON

RV41
10K_0402_5%

+3VG_AON

RV45

10K_0402_5%

@

10K_0402_5%

10K_0402_5%

PLT_RST_VGA#

1 2

1 2

1 2

RV47

@

1 2

+3VG_AON +3VG_AON

RV13

@

1 2

RV15 0_0402_5%GC6@1 2

RV174

OVERT#

CV221

0.01U_0201_10V6K

@

+3VG_AON

FB_GC6_EN FB_GC6_EN_R

1 2

1

OPT@

2

CV15

OPT@

OPT@

2

2

CV17

CV16

0.1u_020 1_10V6K

0.1u_020 1_10V6K

4.7U_040 2_6.3V6M

1

1

Near GPU

1

1

OPT@

OPT@

2

2

CV22

CV21

0.1u_020 1_10V6K
22U_0603 _6.3V6-M

2016/08/20

2016/08/20

2016/08/20

@

1 2

1

CV24

0.1u_0201_10V6K

@

G

2

2

13

D

S

QV6
2N7002KW_SOT323-3

@

12

RV49 0_0402_5%GC6@

1

CV12

0.1u_0201_10V6K

G

2

@

2

1

G

2

2

13

D

@1 2

0_0603_5%

@1 2

0_0603_5%

Sunday, Janu ary 22, 2017

Sunday, Janu ary 22, 2017

Sunday, Janu ary 22, 2017

1

GPU_EVENT#GPU_EVENT#_R

CV218
220P_0201_25V7-K

@

RV18 10K_0402_5%OPT@

1 2

RV20 10K_0402_5%OPT@

RV23 10K_0402_5%OPT@1 2

RV26 100K_0402_5%OPT@1 2

RV29 10K_0402_5%OPT@1 2

1 2

RV31 10K_0402_5%OPT@

DG421

DG421

DG421

13

D

S

QV4
2N7002KW_SOT323-3

@

@1 2

56_0402_5%

S

QV23

1

2N7002KW_SOT323-3

@

2

3VGS_PWR_EN

OVERT#

VGA_ALERT#

VGA_AC_DET_R

PSI_VGA

GPU_PEX_RST_HOLD#

180ohms (ESR=0.2) Bead

1

OPT@

2

CV18

22U_0603 _6.3V6-M

30ohms (ESR=0.05) Bead

Title

Title

Title

N16X_PCIE/ DAC/ GPIO

N16X_PCIE/ DAC/ GPIO

N16X_PCIE/ DAC/ GPIO

Size Document Number Re v

Size Document Number Re v

Size Document Number Re v

Custom

Custom

Custom

Date : Sheet of

Date : Sheet of

Date : Sheet of

WRST# 44

LV1

LV2

FB_GC6_EN_R 8

GPU_EVENT# 8

12

+1.05VGS

+1.05VGS

20 60

20 60

20 60

+3VG_AON

1.0

1.0

1.0

5

4

3

2

1

D D

C C

B B

UV1C

AC3

NC105

AC4

NC106

Y4

NC107

Y3

NC108

AA3

NC109

AA2

NC110

AB1

NC111

AA1

NC112

AA4

NC113

AA5

NC114

AB5

NC115

AB4

NC116

AB3

NC117

AB2

NC118

AD3

NC119

AD2

NC120

AE1

NC121

AD1

NC122

AD4

NC123

AD5

NC124

T2

NC125

T3

NC126

T1

NC127

R1

NC128

R2

NC129

R3

NC130

N2

NC131

N3

NC132

V3

NC133

V4

NC134

U3

NC135

U4

NC136

T4

NC137

T5

NC138

R4

NC139

R5

NC140

N1

NC34

M1

NC35

M2

NC36

M3

NC37

K2

NC38

K3

NC39

K1

NC40

J1

NC41

M4

NC42

M5

NC43

L3

NC44

L4

NC45

K4

NC46

K5

NC47

J4

NC48

J5

NC49

N4

NC141

N5

NC142

P3

NC143

P4

NC144

J2

NC145

J3

NC146

H3

NC147

H4

NC148

N15S-GT-S-A2_FCBGA595

@

Part 3 of 6

LVDS/TMDS

MULTI_STRAP_REF0_GND

MULTI_STRAP_REF1_GNDMLS_REF1

MULTI_STRAP_REF2_GND

NC50
NC51
NC52

FERMI_RSVD1
FERMI_RSVD2

NC56
NC57
NC58

NC

NC59
NC60
NC61
NC62
NC63
NC64
NC65
NC66
NC67
NC68

BUFRST_N

PGOOD

NC71

NC72

STRAP0
STRAP1

GENERA L

STRAP2
STRAP3
STRAP4

NC73

THERMDP

THERMDN

VDD_SENSE

GND_SENSE

TEST

TESTMODE

JTAG_TCK

JTAG_TDI
JTAG_TDO
JTAG_TMS

JTAG_TRST_N

SERIAL

ROM_CS_N

ROM_SI

ROM_SO

ROM_SCLK

F11
AD10
AD7

V5
V6
G1
G2
G3
G4
G5
G6
G7
V1
V2
W1
W2
W3
W4

D11

D10

E10

F10

D1
D2
E4
E3
D3
C1

F6
F4
F5

F12

E12

F2

F1

AD9
AE5
AE6
AF6
AD6
AG4

D12
B12
A12
C12

12

RV50 10K_0402_5%@

STRAP0
STRAP1
STRAP2
STRAP3
STRAP4

MULTI_STRAP_REF0_GND

VCCSENSE_VGA

trace width: 16mils
differential voltage sensing.
differential signal routing.

VSSSENSE_VGA

TESTMODE

1

@

TV1

1

@

TV2

1

@

TV3

1

@

TV4

1

@

ROM_SI
ROM_SO
ROM_SCLK

TV5

STRAP0 29
STRAP1 29
STRAP2 29
STRAP3 29
STRAP4 29

VCCSENSE_VGA 58

VSSSENSE_VGA 58

1 2

RV52 10K_0402_5%OPT@

1 2

RV53 10K_0402_5%OPT@

ROM_SI 29
ROM_SO 29
ROM_SCLK 29

+3VG_AON

12

12

RV181
10K_0402_5%

@

RV51

40.2K_0402_1%

OPT@

A A

Titl e

Titl e

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROP RIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROP RIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROP RIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT O F LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT O F LC FUTURE CENTER.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT O F LC FUTURE CENTER.

3

2015/08/20

2015/08/20

2015/08/20

LC Future Cente r Secret Data

LC Future Cente r Secret Data

LC Future Cente r Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

2016/08/20

2016/08/20

2016/08/20

Titl e

N16X_LVDS/ HDMI/ THERM

N16X_LVDS/ HDMI/ THERM

N16X_LVDS/ HDMI/ THERM

Size Document Number Re v

Size Document Number Re v

Size Document Number Re v

C

C

C

Date: Sheet of

Date: Sheet of

Date: Sheet of

DG421

DG421

DG421

Sunday, J anuary 22, 2017

Sunday, J anuary 22, 2017

Sunday, J anuary 22, 2017

21 60

21 60

1

21 60

1.0

1.0

1.0

5

4

3

2

1

PEX_IOVVDD/Q Decouling

+3VG_AON

1

OPT@

2

CV49

4.7U_0402_6.3V6M

1

1

OPT@

OPT@

2

2

1U_0402_6.3V6K

CV52

CV53

@

HCB1608KF-121T30_0603

1 2

RV62 0_0603_5%@

2

G

MLCC

1.0uF

4.7uF

10uF

22uF

RV54 0_0402_5%@

4.7U_0402_6.3V6M

12

+1.35VGS

12

13

D

S

+1.35VGS

D D

C C

Near GPU

OPT@

1

2

CD@

2

1

10U_0603_6.3V6M

22U_0603_6.3V6-M

CV25

CV26

Under GPU(below 150mils)

OPT@

OPT@

1

2

4.7U_0402_6.3V6M

CV27

OPT@

1

1

2

2

4.7U_0402_6.3V6M

1U_0402_6.3V6K

CV28

CV29

CD@

1

2

1U_0402_6.3V6K

CV30

OPT@

OPT@

1

1

2

2

CV32

CV31

0.1u_0201_10V6K

0.1u_0201_10V6K

3.5A

UV1D

B26

FBVDDQ_01

C25

FBVDDQ_02

E23

FBVDDQ_03

E26

FBVDDQ_04

F14

FBVDDQ_05

F21

FBVDDQ_06

G13

FBVDDQ_07

G14

FBVDDQ_08

G15

FBVDDQ_09

G16

FBVDDQ_10

G18

FBVDDQ_11

G19

FBVDDQ_12

G20

FBVDDQ_13

G21

FBVDDQ_14

L22

FBVDDQ_19

L24

FBVDDQ_20

L26

FBVDDQ_21

M21

FBVDDQ_22

N21

FBVDDQ_23

R21

FBVDDQ_24

T21

FBVDDQ_25

V21

FBVDDQ_26

W21

FBVDDQ_27

H24

FBVDDQ_AON_1

H26

FBVDDQ_AON_2

J21

FBVDDQ_AON_3

K21

FBVDDQ_AON_4

V7

NC149

W7

NC150

AA6

NC151

W6

NC152

Y6

NC153

M7

NC154

N7

NC155

T6

NC156

P6

NC157

T7

NC158

R7

NC159

U6

NC160

R6

NC161

J7

NC76

K7

NC77

K6

NC78

H6

NC79

J6

NC80

N15S-GT-S-A2_FCBGA595

@

Part 4 of 6

PEX_IOVDDQ_1
PEX_IOVDDQ_2
PEX_IOVDDQ_3
PEX_IOVDDQ_4
PEX_IOVDDQ_5
PEX_IOVDDQ_6
PEX_IOVDDQ_7
PEX_IOVDDQ_8

PEX_IOVDDQ_9
PEX_IOVDDQ_10
PEX_IOVDDQ_11
PEX_IOVDDQ_12
PEX_IOVDDQ_13
PEX_IOVDDQ_14

PEX_IOVDD_1
PEX_IOVDD_2
PEX_IOVDD_3
PEX_IOVDD_4
PEX_IOVDD_5
PEX_IOVDD_6

3V3_AON_1
3V3_AON_2

3V3_MAIN_1
3V3_MAIN_2

POWER

FB_CAL_VDDQ

FB_CAL_GND

FB_CAL_TERM

PEX_PLL_HVDD_1
PEX_PLL_HVDD_2

PEX_SVDD_3V3

PEX_PLLVDD_1

PEX_PLLVDD_2

AA10
AA12
AA13
AA16
AA18
AA19
AA20
AA21
AB22
AC23
AD24
AE25
AF26
AF27

AA22
AB23
AC24
AD25
AE26
AE27

G10
G12

G8
G9

D22

C24

B25

AA8
AA9

AB8

AA14
AA15

Under GPU

2000mA

(below 150mi ls)

1 2

RV55 40.2_0402_1%OPT@

1 2

RV56 40.2_0402_1%OPT@

1 2

RV57 60.4_0402_1%OPT@

Place near balls

120mA

+PEX_PLLVDD

Near GPU

1

OPT@

2

1U_0402_6.3V6K

CV33

+1.05VGS

1

OPT@

2

22U_0603_6.3V6-M

CV43

+3VG_AON

+VDD33

+1.35VGS

Under GPU(below 150mils)

Near balls

+1.05VGS

1

2

1

OPT@

2

CV37

4.7U_0402_6.3V6M

RF@

OPT@

1

CV39

For RF

2

10U_0603_6.3V6M

CV215

33P_0402_50V8J

Unde r Near

1

1

OPT@

OPT@

2

2

CV48

CV47

1U_0402_6.3V6K

0.1u_0201_10V6K

Near balls
(Under GPU)

1

1

1

OPT@

2

CV55

1

OPT@

2

CV58

OPT@

OPT@

2

2

CV57

CV56

0.1u_0201_10V6K

4.7U_0402_6.3V6M

1

1

OPT@

OPT@

2

2

1U_0402_6.3V6K

CV59

CV60

0.1u_0201_10V6K

Near GPU

1

1

OPT@

OPT@

2

2

CV50

CV51

0.1u_0201_10V6K

0.1u_0201_10V6K

+3VG_AON

4.7U_0402_6.3V6M

120ohm (ESR=0.18) Bead

4.7U_0402_6.3V6M

+3.3VS TO +3VG_AON

+3VS

CV61

RV65

@

LP2301ALT1G_SOT23-3

QV11

1

2

1

CV64

0.1u_0201_10V6K

OPT@

2

+5VALW

B B

PXS_PWREN#

PXS_PWREN8,58

RV66

100K_0402_5%

OPT@

47K_0402_5%

12

2

G

OPT@

RV63

12

0.1u_0201_10V6K

1 2

OPT@

10K_0402_5%

13

D

QV12
2N7002KW_SOT323-3

OPT@

S

+3VG_AON

D

S

13

OPT@

G

2

1

CV62

0.01U_0201_10V6K

@

2

PXS_PWREN#

2

G

12

RV64
470_0603_5%

@

13

D

QV13
2N7002KW_SOT323-3

@

S

1

CV63
10U_0603_6.3V6M

OPT@

2

FBVDDQ_PWR_EN24,57

47K_0402_5%

2

G

RV69

+5VALW

@

12

FBVDDQ_PWR_EN#

13

D

QV18
2N7002KW_SOT323-3

@

S

1 2

CALIBRATION PIN

FB_CAL_x_P D_VDD Q

FB_CAL_x_ PU_GN D

FB_CAL_xTE RM_GN D

LV3

RV67
470_0603_5%

@

QV15
2N7002KW_SOT323-3

@

Q'ty

1

1

1

1

+3VGS

GDDR5

40.2Ohm

40.2Ohm

60.4Ohm

+1.05VGS

2

2016/08/20

2016/08/20

2016/08/20

G

+1.05VGS

12

RV59
470_0603_5%

@

13

D

QV10
2N7002KW_SOT323-3

@

S

Titl e

Titl e

Titl e

N16X_Power

N16X_Power

N16X_Power

Size Document Number Re v

Size Document Number Re v

Size Document Number Re v

C

C

C

Date: Sheet of

Date: Sheet of

Date: Sheet of

DG421

DG421

DG421

Sunday, J anuary 22, 2017

Sunday, J anuary 22, 2017

Sunday, J anuary 22, 2017

22 60

22 60

1

22 60

1.0

1.0

1.0

RV60

47K_0402_5%

2

G

Deciphered Date

Deciphered Date

Deciphered Date

2

+5VALW

12

@

1.05VGS_EN#

13

D

QV9
2N7002KW_SOT323-3

@

S

0.1u_0201_10V6K

1 2

4.7K_0402_5%

CV72

RV73

+3VG_AON

1

@

2

1

2

1 2

RV171

0_0603_5%

LP2301ALT1G_SOT23-3

S

QV16

CV75

0.1u_0201_10V6K

GC6@

+3.3VS TO +3VGS

+5VALW

12

RV71

RV74

100K_0402_5%

GC6@

47K_0402_5%

DGPU_PWR_EN#

2

12

GC6@

G

GC6@

13

D

QV19
2N7002KW_SOT323-3

GC6@

S

A A

3VGS_PWR_EN20,58

5

G

2

4

D

13

GC6@

+3VGS

NGC6@

1

2

DGPU_PWR_EN#

CV73

0.01U_0201_10V6K

GC6@

2

G

12

RV72
470_0603_5%

@

13

D

QV20
2N7002KW_SOT323-3

@

S

1

CV74
10U_0603_6.3V6M

GC6@

2

EN_VGA23,55,57,58

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROP RIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROP RIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROP RIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT O F LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT O F LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT O F LC FUTURE CENTER.

3

2015/08/20

2015/08/20

2015/08/20

LC Future Cente r Secret Data

LC Future Cente r Secret Data

LC Future Cente r Secret Data

5

D D

4

3

2

1

UV1E

A2

A26
AB11
AB14
AB17
AB20
AB24

AC2
AC22
AC26

AC5

AC8
AD12
AD13
AD15
AD16
AD18
AD19
AD21
AD22
AE11
AE14
AE17
AE20

AF1
AF11
AF14
AF17

C C

B B

AF20
AF23

AG26

AF5

AF8

AG2

B1
B11
B14
B17
B20
B23
B27

B5

B8
E11
E14
E17

E2
E20
E22
E25

E5

E8

H2
H23
H25

H5

Part 5 of 6

GND_001
GND_002
GND_003
GND_004
GND_005
GND_006
GND_007
GND_008
GND_009
GND_010
GND_011
GND_012
GND_013
GND_014
GND_015
GND_016
GND_017
GND_018
GND_019
GND_020
GND_021
GND_022
GND_023
GND_024
GND_025
GND_026
GND_027
GND_028
GND_029
GND_030
GND_031
GND_032
GND_033
GND_034
GND_035
GND_036
GND_037
GND_038
GND_039
GND_040
GND_041
GND_042
GND_043
GND_044
GND_045
GND_046
GND_047
GND_048
GND_049
GND_050
GND_051
GND_052
GND_053
GND_054
GND_055
GND_056

N15S-GT-S-A2_FCBGA595

@

GND

GND_057
GND_058
GND_059
GND_060
GND_061
GND_062
GND_063
GND_064
GND_065
GND_066
GND_067
GND_068
GND_069
GND_070
GND_071
GND_072
GND_073
GND_074
GND_075
GND_076
GND_077
GND_078
GND_079
GND_080
GND_081
GND_082
GND_083
GND_084
GND_085
GND_086
GND_087
GND_088
GND_089
GND_090
GND_091
GND_092
GND_093
GND_094
GND_095
GND_096
GND_097
GND_098
GND_099
GND_100
GND_101
GND_102
GND_103
GND_104
GND_105
GND_106
GND_107
GND_108
GND_109
GND_110
GND_111
GND_112

GND_113
GND_114

K11
K13
K15
K17
L10
L12
L14
L16
L18
L2
L23
L25
L5
M11
M13
M15
M17
N10
N12
N14
N16
N18
P11
P13
P15
P17
P2
P23
P26
P5
R10
R12
R14
R16
R18
T11
T13
T15
T17
U10
U12
U14
U16
U18
U2
U23
U26
U5
V11
V13
V15
V17
Y2
Y23
Y26
Y5

AA7
AB7

+VGA_CORE

Under GPU

1

OPT@

2

CV76

OPT@

1

2

CV89

1

OPT@

2

CV93

OPT@

1

2

CV103

Near GPU

@

1

1

CD@

2

CV77

4.7U_0402_6.3V6M

4.7U_0402_6.3V6M

OPT@

1

2

1U_0402_6.3V6K

1U_0402_6.3V6K

CV90

1

OPT@

2

CV94

4.7U_0402_6.3V6M

4.7U_0402_6.3V6M

OPT@

1

2

CV104

22U_0603_6.3V6-M

22U_0603_6.3V6-M

EN_VGA22,55,57,58

OPT@

2

CV78

4.7U_0402_6.3V6M

OPT@

1

2

1U_0402_6.3V6K

CV91

1

OPT@

2

CV95

4.7U_0402_6.3V6M

CD@

1

2

CV105

22U_0603_6.3V6-M

RV172

47K_0402_5%

2

G

1

OPT@

2

CV79

4.7U_0402_6.3V6M

OPT@

1

2

1U_0402_6.3V6K

CV92

1

CD@

2

CV96

4.7U_0402_6.3V6M

RF@

1

2

33P_0402_50V8J

CV214

+5VALW

@

1 2

13

D

QV21
2N7002KW_SOT323-3

@

S

1

OPT@

2

CV80

RF@

1

2

CV213

1

CD@

2

CV97

For RF

4.7U_0402_6.3V6M

For RF

33P_0402_50V8J

4.7U_0402_6.3V6M

1

1

OPT@

OPT@

2

2

CV81

CV82

4.7U_0402_6.3V6M

4.7U_0402_6.3V6M

@

@

1

1

2

2

CV98

CV99

4.7U_0402_6.3V6M

4.7U_0402_6.3V6M

+VGA_CORE

12

13

2

G

1

OPT@

2

CV83

4.7U_0402_6.3V6M

@

1

2

CV100

4.7U_0402_6.3V6M

RV173
470_0603_5%

@

D

QV22
2N7002KW_SOT323-3

@

S

1

OPT@

2

CV84

@

1

2

CV101

@

1

1

OPT@

2

2

CV85

CV86

4.7U_0402_6.3V6M

4.7U_0402_6.3V6M

@

1

2

CV102

4.7U_0402_6.3V6M

4.7U_0402_6.3V6M

@

1

1

2

2

CV87

CV88

4.7U_0402_6.3V6M

4.7U_0402_6.3V6M

4.7U_0402_6.3V6M

UV1F

K10

VDD_001

K12

VDD_002

K14

VDD_003

K16

VDD_004

K18

VDD_005

L11

VDD_006

L13

VDD_007

L15

VDD_008

L17

VDD_009

M10

VDD_010

M12

VDD_011

M14

VDD_012

M16

VDD_013

M18

VDD_014

N11

VDD_015

N13

VDD_016

N15

VDD_017

N17

VDD_018

P10

VDD_019

P12

VDD_020

N15S-GT-S-A2_FCBGA595

@

Part 6 of 6

POWER

VDD_041
VDD_040
VDD_039
VDD_038
VDD_037
VDD_036
VDD_035
VDD_034
VDD_033
VDD_032
VDD_031
VDD_030
VDD_029
VDD_028
VDD_027
VDD_026
VDD_025
VDD_024
VDD_023
VDD_022
VDD_021

+VGA_CORE+VGA_CORE

V18
V16
V14
V12
V10
U17
U15
U13
U11
T18
T16
T14
T12
T10
R17
R15
R13
R11
P18
P16
P14

A A

Titl e

Titl e

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROP RIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROP RIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROP RIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT O F LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT O F LC FUTURE CENTER.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT O F LC FUTURE CENTER.

3

2015/08/20

2015/08/20

2015/08/20

LC Future Cente r Secret Data

LC Future Cente r Secret Data

LC Future Cente r Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

2016/08/20

2016/08/20

2016/08/20

Titl e

N16X_+VGA CORE, GND

N16X_+VGA CORE, GND

N16X_+VGA CORE, GND

Size Document Number Re v

Size Document Number Re v

Size Document Number Re v

C

C

C

Date: Sheet of

Date: Sheet of

Date: Sheet of

DG421

DG421

DG421

Sunday, J anuary 22, 2017

Sunday, J anuary 22, 2017

Sunday, J anuary 22, 2017

23 60

23 60

1

23 60

1.0

1.0

1.0

5

FBA_D[0..63]25,26

FBA_CMD[31..0]25 ,26

FBA_EDC[7..0]25,26

D D

C C

+FB_PLLAVDD

B B

FBA_DBI[7..0]25,26

30ohms (ESR=0.01) Bead

1 2

LV4

HCB1608KF-300T60_2P

Place close to BGA

1

OPT@

2

CV111

22U_0603_6.3V6-M

Place close to ballPlace close to BGA

+FB_PLLAVDD

OPT@

CV112

OPT@

1

2

FBA_D0
FBA_D1
FBA_D2
FBA_D3
FBA_D4
FBA_D5
FBA_D6
FBA_D7
FBA_D8

FBA_D9
FBA_D10
FBA_D11
FBA_D12
FBA_D13
FBA_D14
FBA_D15
FBA_D16
FBA_D17
FBA_D18
FBA_D19
FBA_D20
FBA_D21
FBA_D22
FBA_D23
FBA_D24
FBA_D25
FBA_D26
FBA_D27
FBA_D28
FBA_D29
FBA_D30
FBA_D31
FBA_D32
FBA_D33
FBA_D34
FBA_D35
FBA_D36
FBA_D37
FBA_D38
FBA_D39
FBA_D40
FBA_D41

1 2

FBA_D42
FBA_D43
FBA_D44
FBA_D45
FBA_D46
FBA_D47
FBA_D48
FBA_D49
FBA_D50
FBA_D51
FBA_D52
FBA_D53
FBA_D54
FBA_D55
FBA_D56
FBA_D57
FBA_D58
FBA_D59
FBA_D60
FBA_D61
FBA_D62
FBA_D63

CV115

0.1u_0201_10V6K

+FB_PLLAVDD+1.05VGS

200mA

1

OPT@

2

1U_0402_6.3V6K

0.1u_0201_10V6K

CV113

Place close to ball

OPT@

1 2

RV119 0_0402_5%@

1 2

RV120 10K_0402_5%OPT@

FB_CLAMPFB_GC6_EN

4

UV1B

E18

FBA_D00

F18

FBA_D01

E16

FBA_D02

F17

FBA_D03

D20

FBA_D04

D21

FBA_D05

F20

FBA_D06

E21

FBA_D07

E15

FBA_D08

D15

FBA_D09

F15

FBA_D10

F13

FBA_D11

C13

FBA_D12

B13

FBA_D13

E13

FBA_D14

D13

FBA_D15

B15

FBA_D16

C16

FBA_D17

A13

FBA_D18

A15

FBA_D19

B18

FBA_D20

A18

FBA_D21

A19

FBA_D22

C19

FBA_D23

B24

FBA_D24

C23

FBA_D25

A25

FBA_D26

A24

FBA_D27

A21

FBA_D28

B21

FBA_D29

C20

FBA_D30

C21

FBA_D31

R22

FBA_D32

R24

FBA_D33

T22

FBA_D34

R23

FBA_D35

N25

FBA_D36

N26

FBA_D37

N23

FBA_D38

N24

FBA_D39

V23

FBA_D40

V22

FBA_D41

T23

FBA_D42

U22

FBA_D43

Y24

FBA_D44

AA24

FBA_D45

Y22

FBA_D46

AA23

FBA_D47

AD27

FBA_D48

AB25

FBA_D49

AD26

FBA_D50

AC25

FBA_D51

AA27

FBA_D52

AA26

FBA_D53

W26

FBA_D54

Y25

FBA_D55

R26

FBA_D56

T25

FBA_D57

N27

FBA_D58

R27

FBA_D59

V26

FBA_D60

V27

FBA_D61

W27

FBA_D62

W25

FBA_D63

F16

FB_PLLAVDD_1

P22

FB_PLLAVDD_2

D23

FB_VREF

H22

FB_DLLAVDD

F3

FB_CLAMP

N15S-GT-S-A2_FCBGA595

@

Part 2 of 6

MEMORY

FBA_CMD00
FBA_CMD01
FBA_CMD02
FBA_CMD03
FBA_CMD04
FBA_CMD05
FBA_CMD06
FBA_CMD07
FBA_CMD08
FBA_CMD09
FBA_CMD10
FBA_CMD11
FBA_CMD12
FBA_CMD13
FBA_CMD14
FBA_CMD15
FBA_CMD16
FBA_CMD17
FBA_CMD18
FBA_CMD19
FBA_CMD20
FBA_CMD21
FBA_CMD22
FBA_CMD23
FBA_CMD24
FBA_CMD25
FBA_CMD26
FBA_CMD27
FBA_CMD28
FBA_CMD29
FBA_CMD30
FBA_CMD31
FBA_CMD32

FBA_CMD34
FBA_CMD35

INTERFACE A

FBA_DQS_RN0
FBA_DQS_RN1
FBA_DQS_RN2
FBA_DQS_RN3
FBA_DQS_RN4
FBA_DQS_RN5
FBA_DQS_RN6
FBA_DQS_RN7

FBA_DQS_WP0
FBA_DQS_WP1
FBA_DQS_WP2
FBA_DQS_WP3
FBA_DQS_WP4
FBA_DQS_WP5
FBA_DQS_WP6
FBA_DQS_WP7

FBA_CLK0_N

FBA_CLK1_N

FBA_WCK01

FBA_WCK01_N

FBA_WCK23

FBA_WCK23_N

FBA_WCK45

FBA_WCK45_N

FBA_WCK67

FBA_WCK67_N

FBA_DQM0
FBA_DQM1
FBA_DQM2
FBA_DQM3
FBA_DQM4
FBA_DQM5
FBA_DQM6
FBA_DQM7

FBA_CLK0

FBA_CLK1

C27
C26
E24
F24
D27
D26
F25
F26
F23
G22
G23
G24
F27
G25
G27
G26
M24
M23
K24
K23
M27
M26
M25
K26
K22
J23
J25
J24
K27
K25
J27
J26
B19

F22

RV121 60.4_0402_1%@

J22

RV122 60.4_0402_1%@

D19
D14
C17
C22
P24
W24
AA25
U25

F19
C14
A16
A22
P25
W22
AB27
T27

E19
C15
B16
B22
R25
W23
AB26
T26

D24
D25

N22
M22

D18
C18
D17
D16
T24
U24
V24
V25

FBA_CMD0
FBA_CMD1
FBA_CMD2
FBA_CMD3
FBA_CMD4
FBA_CMD5
FBA_CMD6
FBA_CMD7
FBA_CMD8
FBA_CMD9
FBA_CMD10
FBA_CMD11
FBA_CMD12
FBA_CMD13
FBA_CMD14
FBA_CMD15
FBA_CMD16
FBA_CMD17
FBA_CMD18
FBA_CMD19
FBA_CMD20
FBA_CMD21
FBA_CMD22
FBA_CMD23
FBA_CMD24
FBA_CMD25
FBA_CMD26
FBA_CMD27
FBA_CMD28
FBA_CMD29
FBA_CMD30
FBA_CMD31

FBA_DBI0
FBA_DBI1
FBA_DBI2
FBA_DBI3
FBA_DBI4
FBA_DBI5
FBA_DBI6
FBA_DBI7

FBA_EDC0
FBA_EDC1
FBA_EDC2
FBA_EDC3
FBA_EDC4
FBA_EDC5
FBA_EDC6
FBA_EDC7

FBA_CLK0
FBA_CLK0#

FBA_CLK1
FBA_CLK1#

FBA_WCLK01
FBA_WCLK01#
FBA_WCLK23
FBA_WCLK23#
FBA_WCLK45
FBA_WCLK45#
FBA_WCLK67
FBA_WCLK67#

12
12

FBA_CLK0 25
FBA_CLK0# 25

FBA_CLK1 26
FBA_CLK1# 26

3

+1.35VGS

FBA_WCLK01 25
FBA_WCLK01# 25
FBA_WCLK23 25
FBA_WCLK23# 25
FBA_WCLK45 26
FBA_WCLK45# 26
FBA_WCLK67 26
FBA_WCLK67# 26

RV210

10K_0402_1%

FBA_CMD14

FBA_CMD30

FBA_CMD13

FBA_CMD29

RV212

10K_0402_1%

+1.35VGS

12

12

12

RV209

10K_0402_1%

12

RV211

10K_0402_1%

2

1

DV4 GC6@

GC6_ENFB _GC6_EN

BAV70W-7-F_SOT323-3

1 2

RV126

0_0402_5%

2

1

3

NGC6@

12

RV125
200K_0402_5%

GC6@

4

FBVDDQ_PWR_EN 22,57

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROP RIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROP RIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROP RIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT O F LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT O F LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT O F LC FUTURE CENTER.

3

2015/08/20

2015/08/20

2015/08/20

LC Future Cente r Secret Data

LC Future Cente r Secret Data

LC Future Cente r Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

2016/08/20

2016/08/20

2016/08/20

Titl e

Titl e

Titl e

N16X_MEM Interface

N16X_MEM Interface

N16X_MEM Interface

Size Document Number Re v

Size Document Number Re v

Size Document Number Re v

C

C

C

Date: Sheet of

Date: Sheet of

Date: Sheet of

DG421

DG421

DG421

Sunday, J anuary 22, 2017

Sunday, J anuary 22, 2017

Sunday, J anuary 22, 2017

24 60

24 60

1

24 60

1.0

1.0

1.0

1 2

RV123

RV124

0_0402_5%

1 2

10K_0402_5%

@

@

FB_GC6_EN20

+3VGS

A A

DGPU_PWROK8,55,57,58

5

5

4

3

2

1

Lower 32 bits

FBA_D[0..63]24,26

FBA_CMD[31..0]24,26

FBA_EDC[7..0]24,26

FBA_DBI[7..0]24,26

D D

RV192
549_0402_1%

FBA_VREFC0

RV191

1.33K_0402_1%

FBA_CLK0
FBA_CLK0#

RV194

40.2_0402_1%

Q34

2

G

12

RV208
100K_0402_5%

12

12

RV193

40.2_0402_1%

1

CV228

0.01U_0201_10V6K

2

@

1 2

RV182 1K_0402_1%

1 2

RV183 1K_0402_1%

1 2

RV185 121_0402_1%

FBA_WCLK01#24,25

FBA_WCLK0124,25

FBA_WCLK23#24,25

FBA_WCLK2324,25

FBA_VREFD_L FBA_VREFD_L

1

CV222

2

@

820P_0402_25V7

12

RV190

931_0402_1%

13

D

S

2N7002KW_SOT323-3

FBA_CLK024

FBA_CLK0#24

C C

+1.35VGS

12

12

B B

GPIO10_FBVREF_ALTV20

A A

FBA_EDC0

FBA_EDC2

FBA_DBI0

FBA_DBI2

FBA_CLK0
FBA_CLK0#
FBA_CMD14

FBA_CMD2
FBA_CMD4
FBA_CMD3
FBA_CMD1

FBA_CMD6
FBA_CMD11
FBA_CMD10
FBA_CMD7
FBA_CMD9

FBA_SEN0 FBA_SEN0

FBA_CMD8
FBA_CMD12
FBA_CMD0
FBA_CMD15
FBA_CMD5

FBA_WCLK01#
FBA_WCLK01

FBA_WCLK23#
FBA_WCLK23

FBA_VREFC0

1

FBA_CMD13

CV224

2

820P_0402_25V7

FBA_VREFC

+1.35VGS +1.35VGS

MF=0 No Mirror

UV5

MF=0 MF=1 MF=0MF=1

C2

EDC0 E DC3

C13

EDC1 E DC2

R13

EDC2 E DC1

R2

EDC3 E DC0

D2

DBI0# DBI3#

D13

DBI1# DBI2#

P13

DBI2# DBI1#

P2

DBI3# DBI0#

J12

CK

J11

CK#

J3

CKE#

H11

BA0/A2 BA2/A4

K10

BA1/A5 BA3/A3

K11

BA2/A4 BA0/A2

H10

BA3/A3 BA1/A5

K4

A8/A7 A10/A0

H5

A9/A1 A11/A6

H4

A10/A0 A8/A7

K5

A11/A6 A9/A1

J5

A12/RFU/NC

A5

VPP/NC1

U5

VPP/NC2

J1

MF

J10

SEN

J13

ZQ

J4

ABI#

G3

RAS# CAS#

G12

CS# WE#

L3

CAS# RAS#

L12

WE# CS#

D5

WCK01# WCK23#

D4

WCK01 WCK23

P5

WCK23# WCK01#

P4

WCK23 WCK01

A10

VREFD1

U10

VREFD2

J14

VREFC

J2

RESET#

H1

VSS1

K1

VSS2

B5

VSS3

G5

VSS4

L5

VSS5

T5

VSS6

B10

VSS7

D10

VSS8

G10

VSS9

L10

VSS10

P10

VSS11

T10

VSS12

H14

VSS13

K14

VSS14

G1

VDD1

L1

VDD2

G4

VDD3

L4

VDD4

C5

VDD5

R5

VDD6

C10

VDD7

R10

VDD8

D11

VDD9

G11

VDD10

L11

VDD11

P11

VDD12

G14

VDD13

L14

VDD14

170-BALL

SGRAM GDDR5

VRAM@

H5GQ1H24AFR-T2L_BGA170

DQ24 DQ 0
DQ25 DQ 1
DQ26 DQ 2
DQ27 DQ 3
DQ28 DQ 4
DQ29 DQ 5
DQ30 DQ 6
DQ31 DQ 7
DQ16 DQ 8
DQ17 DQ 9
DQ18 DQ10
DQ19 DQ11
DQ20 DQ12
DQ21 DQ13
DQ22 DQ14
DQ23 DQ15
DQ8 DQ16
DQ9 DQ17
DQ10 DQ18
DQ11 DQ19
DQ12 DQ20
DQ13 DQ21
DQ14 DQ22
DQ15 DQ23
DQ0 DQ24
DQ1 DQ25
DQ2 DQ26
DQ3 DQ27
DQ4 DQ28
DQ5 DQ29
DQ6 DQ30
DQ7 DQ31

VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8

VDDQ9
VDDQ10
VDDQ11
VDDQ12
VDDQ13
VDDQ14
VDDQ15
VDDQ16
VDDQ17
VDDQ18
VDDQ19
VDDQ20
VDDQ21
VDDQ22
VDDQ23
VDDQ24
VDDQ25
VDDQ26
VDDQ27
VDDQ28
VDDQ29
VDDQ30
VDDQ31
VDDQ32
VDDQ33
VDDQ34
VDDQ35
VDDQ36

VSSQ1
VSSQ2
VSSQ3
VSSQ4
VSSQ5
VSSQ6
VSSQ7
VSSQ8

VSSQ9
VSSQ10
VSSQ11
VSSQ12
VSSQ13
VSSQ14
VSSQ15
VSSQ16
VSSQ17
VSSQ18
VSSQ19
VSSQ20
VSSQ21
VSSQ22
VSSQ23
VSSQ24
VSSQ25
VSSQ26
VSSQ27
VSSQ28
VSSQ29
VSSQ30
VSSQ31
VSSQ32
VSSQ33
VSSQ34
VSSQ35
VSSQ36

MF=1 Mirror

UV6

FBA_D0

A4

FBA_D1

A2

FBA_D2

B4

FBA_D3

B2

FBA_D4

E4

FBA_D5

E2

FBA_D6

F4

FBA_D7

F2
A11
A13
B11
B13
E11
E13
F11
F13

FBA_D16

U11

FBA_D17

U13

FBA_D18

T11

FBA_D19

T13

FBA_D20

N11

FBA_D21

N13

FBA_D22

M11

FBA_D23

M13
U4
U2
T4
T2
N4
N2
M4
M2

+1.35VGS +1.35VGS

B1
D1
F1
M1
P1
T1
G2
L2
B3
D3
F3
H3
K3
M3
P3
T3
E5
N5
E10
N10
B12
D12
F12
H12
K12
M12
P12
T12
G13
L13
B14
D14
F14
M14
P14
T14

A1
C1
E1
N1
R1
U1
H2
K2
A3
C3
E3
N3
R3
U3
C4
R4
F5
M5
F10
M10
C11
R11
A12
C12
E12
N12
R12
U12
H13
K13
A14
C14
E14
N14
R14
U14

FBA_VREFC

+1.35VGS

1 2

RV184 1K_0402_1%

1 2

RV186 121_0402_1%

FBA_WCLK23#24,25

FBA_WCLK2324,25

FBA_WCLK01#24,25

FBA_WCLK0124,25

FBA_VREFC0

1

CV226

2

820P_0402_25V7

FBA_EDC3

FBA_EDC1

FBA_DBI3

FBA_DBI1

FBA_CLK0
FBA_CLK0#
FBA_CMD14

FBA_CMD3
FBA_CMD1
FBA_CMD2
FBA_CMD4

FBA_CMD10
FBA_CMD7
FBA_CMD6
FBA_CMD11
FBA_CMD9

FBA_CMD8
FBA_CMD15
FBA_CMD5
FBA_CMD12
FBA_CMD0

FBA_WCLK23#
FBA_WCLK23

FBA_WCLK01#
FBA_WCLK01

FBA_CMD13

MF=0 MF=1 MF=0MF=1

C2

EDC0 E DC3

C13

EDC1 E DC2

R13

EDC2 E DC1

R2

EDC3 E DC0

D2

DBI0# DBI3#

D13

DBI1# DBI2#

P13

DBI2# DBI1#

P2

DBI3# DBI0#

J12

CK

J11

CK#

J3

CKE#

H11

BA0/A2 BA2/A4

K10

BA1/A5 BA3/A3

K11

BA2/A4 BA0/A2

H10

BA3/A3 BA1/A5

K4

A8/A7 A10/A0

H5

A9/A1 A11/A6

H4

A10/A0 A8/A7

K5

A11/A6 A9/A1

J5

A12/RFU/NC

A5

VPP/NC1

U5

VPP/NC2

J1

MF

J10

SEN

J13

ZQ

J4

ABI#

G3

RAS# CAS#

G12

CS# WE#

L3

CAS# RAS#

L12

WE# CS#

D5

WCK01# WCK23#

D4

WCK01 WCK23

P5

WCK23# WCK01#

P4

WCK23 WCK01

A10

VREFD1

U10

VREFD2

J14

VREFC

J2

RESET#

H1

VSS1

K1

VSS2

B5

VSS3

G5

VSS4

L5

VSS5

T5

VSS6

B10

VSS7

D10

VSS8

G10

VSS9

L10

VSS10

P10

VSS11

T10

VSS12

H14

VSS13

K14

VSS14

G1

VDD1

L1

VDD2

G4

VDD3

L4

VDD4

C5

VDD5

R5

VDD6

C10

VDD7

R10

VDD8

D11

VDD9

G11

VDD10

L11

VDD11

P11

VDD12

G14

VDD13

L14

VDD14

170-BALL

SGRAM GDDR5

VRAM@

DQ24 DQ 0
DQ25 DQ 1
DQ26 DQ 2
DQ27 DQ 3
DQ28 DQ 4
DQ29 DQ 5
DQ30 DQ 6
DQ31 DQ 7
DQ16 DQ 8
DQ17 DQ 9
DQ18 DQ10
DQ19 DQ11
DQ20 DQ12
DQ21 DQ13
DQ22 DQ14
DQ23 DQ15
DQ8 DQ16
DQ9 DQ17
DQ10 DQ18
DQ11 DQ19
DQ12 DQ20
DQ13 DQ21
DQ14 DQ22
DQ15 DQ23
DQ0 DQ24
DQ1 DQ25
DQ2 DQ26
DQ3 DQ27
DQ4 DQ28
DQ5 DQ29
DQ6 DQ30
DQ7 DQ31

VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8

VDDQ9
VDDQ10
VDDQ11
VDDQ12
VDDQ13
VDDQ14
VDDQ15
VDDQ16
VDDQ17
VDDQ18
VDDQ19
VDDQ20
VDDQ21
VDDQ22
VDDQ23
VDDQ24
VDDQ25
VDDQ26
VDDQ27
VDDQ28
VDDQ29
VDDQ30
VDDQ31
VDDQ32
VDDQ33
VDDQ34
VDDQ35
VDDQ36

VSSQ1
VSSQ2
VSSQ3
VSSQ4
VSSQ5
VSSQ6
VSSQ7
VSSQ8

VSSQ9
VSSQ10
VSSQ11
VSSQ12
VSSQ13
VSSQ14
VSSQ15
VSSQ16
VSSQ17
VSSQ18
VSSQ19
VSSQ20
VSSQ21
VSSQ22
VSSQ23
VSSQ24
VSSQ25
VSSQ26
VSSQ27
VSSQ28
VSSQ29
VSSQ30
VSSQ31
VSSQ32
VSSQ33
VSSQ34
VSSQ35
VSSQ36

H5GQ1H24AFR-T2L_BGA170

FBA_D24

A4

FBA_D25

A2

FBA_D26

B4

FBA_D27

B2

FBA_D28

E4

FBA_D29

E2

FBA_D30

F4

FBA_D31

F2
A11
A13
B11
B13
E11
E13
F11
F13

FBA_D8

U11

FBA_D9

U13

FBA_D10

T11

FBA_D11

T13

FBA_D12

N11

FBA_D13

N13

FBA_D14

M11

FBA_D15

M13
U4
U2
T4
T2
N4
N2
M4
M2

B1
D1
F1
M1
P1
T1
G2
L2
B3
D3
F3
H3
K3
M3
P3
T3
E5
N5
E10
N10
B12
D12
F12
H12
K12
M12
P12
T12
G13
L13
B14
D14
F14
M14
P14
T14

A1
C1
E1
N1
R1
U1
H2
K2
A3
C3
E3
N3
R3
U3
C4
R4
F5
M5
F10
M10
C11
R11
A12
C12
E12
N12
R12
U12
H13
K13
A14
C14
E14
N14
R14
U14

+1.35VGS

CV614

CV637

CV626

CV623

10U_0603_6.3V6M

1U_0402_6.3V6K

1

1

OPT@

OPT@

CV631

OPT@

@

2

CV606

1

2

1

2

CV632

1

2

OPT@

OPT@

2

CV610

0.1U_0201_6.3V6-K

0.1U_0201_6.3V6-K

1

1

OPT@

OPT@

2

2

CV627

1U_0402_6.3V6K

10U_0603_6.3V6M

1

OPT@

OPT@

2

CV636

0.1U_0201_6.3V6-K

0.1U_0201_6.3V6-K

1

1

@

@

2

2

CV621

CV608

0.1U_0201_6.3V6-K

CV628

CV634

0.1U_0201_6.3V6-K

CV625

CV622

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1

1

1

OPT@

OPT@

2

2

2

CV609

CV607

0.1U_0201_6.3V6-K

0.1U_0201_6.3V6-K

0.1U_0201_6.3V6-K

1

1

1

OPT@

OPT@

OPT@

2

2

2

CV629

CV630

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1

1

1

OPT@

OPT@

2

2

2

CV633

CV635

0.1U_0201_6.3V6-K

0.1U_0201_6.3V6-K

0.1U_0201_6.3V6-K

1

1

1

@

@

@

2

2

2

Titl e

Titl e

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROP RIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROP RIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROP RIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT O F LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT O F LC FUTURE CENTER.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT O F LC FUTURE CENTER.

3

2015/08/20

2015/08/20

2015/08/20

LC Future Cente r Secret Data

LC Future Cente r Secret Data

LC Future Cente r Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

2016/08/20

2016/08/20

2016/08/20

Titl e

N16X_GDDR5_Rank0_[31:0]

N16X_GDDR5_Rank0_[31:0]

N16X_GDDR5_Rank0_[31:0]

Size Document Number Re v

Size Document Number Re v

Size Document Number Re v

C

C

C

Date: Sheet of

Date: Sheet of

Date: Sheet of

DG421

DG421

DG421

Sunday, J anuary 22, 2017

Sunday, J anuary 22, 2017

Sunday, J anuary 22, 2017

25 60

25 60

1

25 60

1.0

1.0

1.0

5

4

3

2

1

upper 32 bits

FBA_D[0..63]24,25

FBA_CMD[31..0]24 ,25

FBA_EDC[7..0]24,25

FBA_DBI[7..0]24,25

D D

FBA_CLK124

FBA_CLK1#24

C C

B B

A A

FBA_CLK1
FBA_CLK1#

RV196

40.2_0402_1%

12

12

RV195

40.2_0402_1%

1

CV649

0.01U_0201_10V6K

2

@

+1.35VGS

1 2

RV199 1K_0402_1%

1 2

RV198 1K_0402_1%

1 2

RV200 121_0402_1%

FBA_WCLK67#24

FBA_WCLK6724

FBA_WCLK45#24

FBA_WCLK4524

FBA_VREFD_H FBA_VREFD_H

1

CV661

2

@

820P_0402_25V7

FBA_EDC7

FBA_EDC5

FBA_DBI7

FBA_DBI5

FBA_CLK1
FBA_CLK1#
FBA_CMD30

FBA_CMD19
FBA_CMD17
FBA_CMD18
FBA_CMD20

FBA_CMD26
FBA_CMD23
FBA_CMD22
FBA_CMD27
FBA_CMD25

FBA_SEN1 FBA_SEN1

FBA_CMD24
FBA_CMD31
FBA_CMD21
FBA_CMD28
FBA_CMD16

FBA_WCLK67#
FBA_WCLK67

FBA_WCLK45#
FBA_WCLK45

FBA_VREFC1

1

FBA_CMD29

CV662

2

820P_0402_25V7

+1.35VGS

MF=1 Mirror

UV13

MF=0 MF=1 MF=0MF=1

C2

EDC0 E DC3

C13

EDC1 E DC2

R13

EDC2 E DC1

R2

EDC3 E DC0

D2

DBI0# DBI3#

D13

DBI1# DBI2#

P13

DBI2# DBI1#

P2

DBI3# DBI0#

J12

CK

J11

CK#

J3

CKE#

H11

BA0/A2 BA2/A4

K10

BA1/A5 BA3/A3

K11

BA2/A4 BA0/A2

H10

BA3/A3 BA1/A5

K4

A8/A7 A10/A0

H5

A9/A1 A11/A6

H4

A10/A0 A8/A7

K5

A11/A6 A9/A1

J5

A12/RFU/NC

A5

VPP/NC1

U5

VPP/NC2

J1

MF

J10

SEN

J13

ZQ

J4

ABI#

G3

RAS# CAS#

G12

CS# WE#

L3

CAS# RAS#

L12

WE# CS#

D5

WCK01# WCK23#

D4

WCK01 WCK23

P5

WCK23# WCK01#

P4

WCK23 WCK01

A10

VREFD1

U10

VREFD2

J14

VREFC

J2

RESET#

H1

VSS1

K1

VSS2

B5

VSS3

G5

VSS4

L5

VSS5

T5

VSS6

B10

VSS7

D10

VSS8

G10

VSS9

L10

VSS10

P10

VSS11

T10

VSS12

H14

VSS13

K14

VSS14

G1

VDD1

L1

VDD2

G4

VDD3

L4

VDD4

C5

VDD5

R5

VDD6

C10

VDD7

R10

VDD8

D11

VDD9

G11

VDD10

L11

VDD11

P11

VDD12

G14

VDD13

L14

VDD14

170-BALL

SGRAM GDDR5

VRAM@

DQ24 DQ 0
DQ25 DQ 1
DQ26 DQ 2
DQ27 DQ 3
DQ28 DQ 4
DQ29 DQ 5
DQ30 DQ 6
DQ31 DQ 7
DQ16 DQ 8
DQ17 DQ 9

DQ18 DQ10
DQ19 DQ11
DQ20 DQ12
DQ21 DQ13
DQ22 DQ14
DQ23 DQ15
DQ8 DQ16
DQ9 DQ17
DQ10 DQ18
DQ11 DQ19
DQ12 DQ20
DQ13 DQ21
DQ14 DQ22
DQ15 DQ23
DQ0 DQ24
DQ1 DQ25
DQ2 DQ26
DQ3 DQ27
DQ4 DQ28
DQ5 DQ29
DQ6 DQ30
DQ7 DQ31

VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8

VDDQ9
VDDQ10
VDDQ11
VDDQ12
VDDQ13
VDDQ14
VDDQ15
VDDQ16
VDDQ17
VDDQ18
VDDQ19
VDDQ20
VDDQ21
VDDQ22
VDDQ23
VDDQ24
VDDQ25
VDDQ26
VDDQ27
VDDQ28
VDDQ29
VDDQ30
VDDQ31
VDDQ32
VDDQ33
VDDQ34
VDDQ35
VDDQ36

VSSQ1
VSSQ2
VSSQ3
VSSQ4
VSSQ5
VSSQ6
VSSQ7
VSSQ8

VSSQ9
VSSQ10
VSSQ11
VSSQ12
VSSQ13
VSSQ14
VSSQ15
VSSQ16
VSSQ17
VSSQ18
VSSQ19
VSSQ20
VSSQ21
VSSQ22
VSSQ23
VSSQ24
VSSQ25
VSSQ26
VSSQ27
VSSQ28
VSSQ29
VSSQ30
VSSQ31
VSSQ32
VSSQ33
VSSQ34
VSSQ35
VSSQ36

H5GQ1H24AFR-T2L_BGA170

MF=0 No Mirror

UV14

FBA_D56

A4

FBA_D57

A2

FBA_D58

B4

FBA_D59

B2

FBA_D60

E4

FBA_D61

E2

FBA_D62

F4

FBA_D63

F2
A11
A13
B11
B13
E11
E13
F11
F13

FBA_D40

U11
U13

FBA_D42

T11

FBA_D43

T13

FBA_D44

N11

FBA_D45

N13

FBA_D46

M11
M13
U4
U2
T4
T2
N4
N2
M4
M2

+1.35VGS +1.35VGS

B1
D1
F1
M1
P1
T1
G2
L2
B3
D3
F3
H3
K3
M3
P3
T3
E5
N5
E10
N10
B12
D12
F12
H12
K12
M12
P12
T12
G13
L13
B14
D14
F14
M14
P14
T14

A1
C1
E1
N1
R1
U1
H2
K2
A3
C3
E3
N3
R3
U3
C4
R4
F5
M5
F10
M10
C11
R11
A12
C12
E12
N12
R12
U12
H13
K13
A14
C14
E14
N14
R14
U14

FBA_VREFC

1 2

RV197 1K_0402_1%

1 2

RV201 121_0402_1%

FBA_VREFC1

1

CV665

2

820P_0402_25V7

FBA_EDC4

FBA_EDC6

FBA_DBI4

FBA_DBI6

FBA_CLK1
FBA_CLK1#
FBA_CMD30

FBA_CMD18
FBA_CMD20
FBA_CMD19
FBA_CMD17

FBA_CMD22
FBA_CMD27
FBA_CMD26
FBA_CMD23
FBA_CMD25

FBA_CMD24
FBA_CMD28
FBA_CMD16
FBA_CMD31
FBA_CMD21

FBA_WCLK45#
FBA_WCLK45

FBA_WCLK67#
FBA_WCLK67

FBA_CMD29

+1.35VGS

MF=0 MF=1 MF=0MF=1

C2

EDC0 E DC3

C13

EDC1 E DC2

R13

EDC2 E DC1

R2

EDC3 E DC0

D2

DBI0# DBI3#

D13

DBI1# DBI2#

P13

DBI2# DBI1#

P2

DBI3# DBI0#

J12

CK

J11

CK#

J3

CKE#

H11

BA0/A2 BA2/A4

K10

BA1/A5 BA3/A3

K11

BA2/A4 BA0/A2

H10

BA3/A3 BA1/A5

K4

A8/A7 A10/A0

H5

A9/A1 A11/A6

H4

A10/A0 A8/A7

K5

A11/A6 A9/A1

J5

A12/RFU/NC

A5

VPP/NC1

U5

VPP/NC2

J1

MF

J10

SEN

J13

ZQ

J4

ABI#

G3

RAS# CAS#

G12

CS# WE#

L3

CAS# RAS#

L12

WE# CS#

D5

WCK01# WCK23#

D4

WCK01 WCK23

P5

WCK23# WCK01#

P4

WCK23 WCK01

A10

VREFD1

U10

VREFD2

J14

VREFC

J2

RESET#

H1

VSS1

K1

VSS2

B5

VSS3

G5

VSS4

L5

VSS5

T5

VSS6

B10

VSS7

D10

VSS8

G10

VSS9

L10

VSS10

P10

VSS11

T10

VSS12

H14

VSS13

K14

VSS14

G1

VDD1

L1

VDD2

G4

VDD3

L4

VDD4

C5

VDD5

R5

VDD6

C10

VDD7

R10

VDD8

D11

VDD9

G11

VDD10

L11

VDD11

P11

VDD12

G14

VDD13

L14

VDD14

170-BALL

SGRAM GDDR5

VRAM@

DQ24 DQ 0
DQ25 DQ 1
DQ26 DQ 2
DQ27 DQ 3
DQ28 DQ 4
DQ29 DQ 5
DQ30 DQ 6
DQ31 DQ 7
DQ16 DQ 8
DQ17 DQ 9
DQ18 DQ10
DQ19 DQ11
DQ20 DQ12
DQ21 DQ13
DQ22 DQ14
DQ23 DQ15
DQ8 DQ16
DQ9 DQ17
DQ10 DQ18
DQ11 DQ19
DQ12 DQ20
DQ13 DQ21
DQ14 DQ22
DQ15 DQ23
DQ0 DQ24
DQ1 DQ25
DQ2 DQ26
DQ3 DQ27
DQ4 DQ28
DQ5 DQ29
DQ6 DQ30
DQ7 DQ31

VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8

VDDQ9
VDDQ10
VDDQ11
VDDQ12
VDDQ13
VDDQ14
VDDQ15
VDDQ16
VDDQ17
VDDQ18
VDDQ19
VDDQ20
VDDQ21
VDDQ22
VDDQ23
VDDQ24
VDDQ25
VDDQ26
VDDQ27
VDDQ28
VDDQ29
VDDQ30
VDDQ31
VDDQ32
VDDQ33
VDDQ34
VDDQ35
VDDQ36

VSSQ1
VSSQ2
VSSQ3
VSSQ4
VSSQ5
VSSQ6
VSSQ7
VSSQ8

VSSQ9
VSSQ10
VSSQ11
VSSQ12
VSSQ13
VSSQ14
VSSQ15
VSSQ16
VSSQ17
VSSQ18
VSSQ19
VSSQ20
VSSQ21
VSSQ22
VSSQ23
VSSQ24
VSSQ25
VSSQ26
VSSQ27
VSSQ28
VSSQ29
VSSQ30
VSSQ31
VSSQ32
VSSQ33
VSSQ34
VSSQ35
VSSQ36

H5GQ1H24AFR-T2L_BGA170

FBA_D32

A4

FBA_D33

A2

FBA_D34

B4

FBA_D35

B2

FBA_D36

E4

FBA_D37

E2

FBA_D38

F4

FBA_D39

F2
A11
A13
B11
B13
E11
E13
F11
F13

FBA_D48

U11

FBA_D49FBA_D41

U13

FBA_D50

T11

FBA_D51

T13

FBA_D52

N11

FBA_D53

N13

FBA_D54

M11

FBA_D55FBA_D47

M13
U4
U2
T4
T2
N4
N2
M4
M2

B1
D1
F1
M1
P1
T1
G2
L2
B3
D3
F3
H3
K3
M3
P3
T3
E5
N5
E10
N10
B12
D12
F12
H12
K12
M12
P12
T12
G13
L13
B14
D14
F14
M14
P14
T14

A1
C1
E1
N1
R1
U1
H2
K2
A3
C3
E3
N3
R3
U3
C4
R4
F5
M5
F10
M10
C11
R11
A12
C12
E12
N12
R12
U12
H13
K13
A14
C14
E14
N14
R14
U14

+1.35VGS

CV660

CV647

CV654

CV650

10U_0603_6.3V6M

1U_0402_6.3V6K

1

1

OPT@

OPT@

CV642

OPT@

@

2

CV655

1

2

1

2

CV643

1

2

OPT@

OPT@

2

CV659

0.1U_0201_6.3V6-K

0.1U_0201_6.3V6-K

1

1

OPT@

OPT@

2

2

CV638

1U_0402_6.3V6K

10U_0603_6.3V6M

1

OPT@

OPT@

2

CV648

0.1U_0201_6.3V6-K

0.1U_0201_6.3V6-K

1

1

@

@

2

2

CV651

CV657

0.1U_0201_6.3V6-K

CV639

CV646

0.1U_0201_6.3V6-K

CV652

CV653

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1

1

1

OPT@

OPT@

2

2

2

CV658

CV656

0.1U_0201_6.3V6-K

0.1U_0201_6.3V6-K

0.1U_0201_6.3V6-K

1

1

1

OPT@

OPT@

OPT@

2

2

2

CV640

CV641

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1

1

1

OPT@

OPT@

2

2

2

CV645

CV644

0.1U_0201_6.3V6-K

0.1U_0201_6.3V6-K

0.1U_0201_6.3V6-K

1

1

1

@

@

@

2

2

2

Titl e

Titl e

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROP RIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROP RIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROP RIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT O F LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT O F LC FUTURE CENTER.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT O F LC FUTURE CENTER.

3

2015/08/20

2015/08/20

2015/08/20

LC Future Cente r Secret Data

LC Future Cente r Secret Data

LC Future Cente r Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

2016/08/20

2016/08/20

2016/08/20

Titl e

N16X_GDDR5_Rank0_[64:32]

N16X_GDDR5_Rank0_[64:32]

N16X_GDDR5_Rank0_[64:32]

Size Document Number Re v

Size Document Number Re v

Size Document Number Re v

C

C

C

Date: Sheet of

Date: Sheet of

Date: Sheet of

DG421

DG421

DG421

Sunday, J anuary 22, 2017

Sunday, J anuary 22, 2017

Sunday, J anuary 22, 2017

26 60

26 60

1

26 60

1.0

1.0

1.0

5

D D

C C

4

3

2

1

B B

A A

Titl e

Titl e

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROP RIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROP RIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROP RIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT O F LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT O F LC FUTURE CENTER.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT O F LC FUTURE CENTER.

3

2015/08/20

2015/08/20

2015/08/20

LC Future Cente r Secret Data

LC Future Cente r Secret Data

LC Future Cente r Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

2016/08/20

2016/08/20

2016/08/20

Titl e

N16X_DDR3_Rank1_[31:0]

N16X_DDR3_Rank1_[31:0]

N16X_DDR3_Rank1_[31:0]

Size Document Number Re v

Size Document Number Re v

Size Document Number Re v

C

C

C

Date: Sheet of

Date: Sheet of

Date: Sheet of

DG421

DG421

DG421

Sunday, J anuary 22, 2017

Sunday, J anuary 22, 2017

Sunday, J anuary 22, 2017

27 60

27 60

1

27 60

1.0

1.0

1.0

5

D D

C C

4

3

2

1

B B

A A

Titl e

Titl e

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROP RIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROP RIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROP RIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT O F LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT O F LC FUTURE CENTER.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT O F LC FUTURE CENTER.

3

2015/08/20

2015/08/20

2015/08/20

LC Future Cente r Secret Data

LC Future Cente r Secret Data

LC Future Cente r Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

2016/08/20

2016/08/20

2016/08/20

Titl e

N16X_DDR3_Rank1_[64:32]

N16X_DDR3_Rank1_[64:32]

N16X_DDR3_Rank1_[64:32]

Size Document Number Re v

Size Document Number Re v

Size Document Number Re v

C

C

C

Date: Sheet of

Date: Sheet of

Date: Sheet of

DG421

DG421

DG421

Sunday, J anuary 22, 2017

Sunday, J anuary 22, 2017

Sunday, J anuary 22, 2017

28 60

28 60

1

28 60

1.0

1.0

1.0

5

4

3

2

1

Physi cal
Strapping pin

ROM_S CLK

ROM_S I

ROM_S O PCIE_ CFG

STRAP 0

STRAP 1

STRAP 2

STRAP 3

STRAP 4

Resistor Values

RV149

4.99K_0402_1%

@

RV154

4.99K_0402_1%

@

+3VG_AON

1 2

1 2

RV150

45.3K_0402_1%

@

RV155

45.3K_0402_1%

@

D D

RV156

4.99K_0402_1%

@

RV159
20K_0402_1%

@

RV147

4.99K_0402_1%

@

1 2

RV152

4.99K_0402_1%

@

1 2

1 2

1 2

RV157

4.99K_0402_1%

@

RV160

4.99K_0402_1%

OPT@

RV148

24.9K_0402_1%

@

1 2

RV153
15K_0402_1%

@

1 2

+3VGS

1 2

1 2

RV158

4.99K_0402_1%

@

RV161

4.99K_0402_1%

OPT@

1 2

1 2

RV146

49.9K_0402_1%

OPT@

1 2

STRAP021
STRAP121
STRAP221
STRAP321
STRAP421

C C

STRAP0
STRAP1
STRAP2
STRAP3
STRAP4

RV151

45.3K_0402_1%

@

1 2

X76

1 2

ROM_SI

ROM_SI21

ROM_SO21

ROM_SCLK21

B B

ROM_SO
ROM_SCLK

1 2

4.99 K

10K

15K

20K

24.9 K

30.1 K

34.8 K

45.3 K

Power Rai l

+3VGS

+3VGS

+3VGS

+3VGS

+3VGS

+3VGS

+3VGS

+3VGS

Logic al
Strapping Bit3

SOR3_EXPOS ED

DEVID _SEL

Reserved(keep pull-up and pull-down footprint and stuff 50Kohm pull-up)

Reserved(keep pull-up and pull-down footprint and not stuff by default)

Pull-up to

+3VGS

1000

1001

1010

1011

1100

1101

1110

1111

Pull-down to Gnd

Logic al
Strapping Bit2

SOR2_EXPOS ED SOR1_EX POSED SOR0_EXP OSED

Logic al
Strapping Bit1

RAM_CFG[1 ]RAM_CFG[3 ] RAM_CFG[2]

DEVID_SEL

0000

0001

0010

0011

0100

0101

0110

0111

0

1

PCIE_CFG

0

1

SMBUS_ALT_ADDR

0

1

VGA_DEVICE

0

1

Logic al
Strapping Bit0

RAM_CFG[0 ]

VGA_DE VIC ESMB_AL T_A DDR

(Default )

(Default )

0x9E (Default)

0x9C (Multi-GPU usage)

3D Device (Class Code 302h)

VGA Device (Default)

GPU STRAP 0ROM_S O STRAP 4STRAP 3STRAP 2STRAP 1ROM_SC LK

Config urat ion

2G VRAM

N16S- GTR
N16V- GMR1

4G VRAM

A A

5

FB Memory (DDR3L)

Samsu ng
2500M Hz

Hyni x
2500M Hz

Micro n
2500M Hz

Samsu ng
2500M Hz

Hyni x
2500M Hz

Micro n
2500M Hz

256M x 16

H5GC4H2 4AJ R-T2 C

256M x 16

EDW4032 BABG -60 -F

256M x 16

K4G8032 5FB -HC0 3

512M x 16

H5GC8H2 4MJ R-T2 C

512M x 16

MT51J25 6M32 HF-6 0:A

512M x 16

4

ROM_S I

0x7K4G4132 5FE -HC2 8

PD 45.3K

0x6

PD 34.8K

0x4

PD 24.9K

PD 4.99K Un-st uffPD 4.99K PU 49.9K

0x0

PD 4.99K

0x5

PD 30.1K

0x1

PD 10K

Un-st uffUn- stuf fUn-st uff

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROP RIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROP RIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROP RIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT O F LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT O F LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT O F LC FUTURE CENTER.

3

2015/08/20

2015/08/20

2015/08/20

LC Future Cente r Secret Data

LC Future Cente r Secret Data

LC Future Cente r Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

2016/08/20

2016/08/20

2016/08/20

Titl e

Titl e

Titl e

N16X_MISC

N16X_MISC

N16X_MISC

Size Document Number Re v

Size Document Number Re v

Size Document Number Re v

C

C

C

Date: Sheet of

Date: Sheet of

Date: Sheet of

DG421

DG421

DG421

Sunday, J anuary 22, 2017

Sunday, J anuary 22, 2017

Sunday, J anuary 22, 2017

29 60

29 60

1

29 60

1.0

1.0

1.0

5

4

3

2

1

+3VALW

1 2

RA213 0_0402_5%@

+3VS

1 2

RA216 0_0402 _5%@

D D

Analog power for mixers , & IO por ts

+5VS +5VA

1 2

RA7 0_0603_5%@

C C

B B

0.1U_0201_6.3V6-K

2

CA42

1

+3VALW

+3VS +3VS_CARD

1U_0402_6.3V6K

1

@

C2062

2

+3VL

HDA_RST_AUDIO#8

1 2

RA203 0_0402_5%@

To solve th e ba ckgrou nd n oise while combo jack co nnec ting t o an
active s peake r an d sy stem ent ry into S3/ S4/ S5 wit hout an alog po wer.

RA1 0_0402_5%

RA4 0_0402_5%

RA9 0_0402_5%@

RA12 0_0402_5%

Digital power for HDA link

Power sup ply for full-br idge left/ Righ t chan nel

+5VS +5VD

EMC_NS@

1 2

LA25 BLM15PD600SN1D_2P

1 2

1U_0402_6.3V6K

Power for card re ad er cont rolle r

1 2

1 2

1 2

1 2

RA10 0_0603_5%@

2

CA20

1

1 2

RA220 0_0402_5%@

1 2

RA219 0_0402_5%@

Power for combo jack depo p circu it at syst em
shu td ow n mo de

VDD_STB

1 2

RA217 0_0402_5%@

EMC_NS@

EMC_NS@

EMC_NS@

DVDD_IO

2

CA2

0.1U_0201_6.3V6-K

1

Close to Pin7

CA178

10U_0805_10V6K

1

2

1

TC203@

CA18 0.1U_0201_6.3V6-K

2

1

GNDAGND

+1.8VS +1.8V_AUDIO

1 2

RA225 0_0402 _5%@

+1.8VALW

1 2

RA226 0_0402_5%@

HDA_SDOUT_AUDIO8
HDA_BITCLK_AUDIO8

HDA_SDIN08

HDA_SYNC_AUDIO8

RING2_CONN

CA19 0.1U_0201_6.3V6-K

2

1

MICBIASB

USB20_N5 USB20_N5_R

1

USB20_P5

4

FOR EMI

1 2

RA38 2.2K_0402_5%

1 2

RA37 2.2K_0402_5%

LW2

1

4

EXC24CH900U_4P

EMC_NS@

RING3_CONN

EC_MUTE#44

BEEP#44

PCH_BEEP8

2

3

2

3

8/ 29 Ad d +1.8VS Circu it for Aud io w ei

DMIC_DATA

DMIC_DATA33

DMIC_CLK33

SD_CMD_R31
SD_D3_R31
SD_D2_R31

USB20_N59
USB20_P59

+3VS_CARD

USB20_P5_R

+3VS

4.7U_0402_6.3V6M

RA19 0_0402_5%@

DMIC_CLK

RA18 0_0402_5%@

CA1 2.2U_0402_6.3V6M

HDA_SDIN0 SDATA_IN

RA16 33_0402_5%

RA205 100K_0402_1%

PLUG_IN

RA204 200K_0402_1%

CA41 2.2U_0402_6.3V6M

SD_CMD_R
SD_D3_R
SD_D2_R

CW1 1U_0402_6.3V6K

CW2 1U_0402_6.3V6K
RW11 6.2K_0402_ 1%

USB20_N5 USB20_N5_R

RW12 0_0402_5%@

USB20_P5 USB20 _P5_R

RW13 0_0402_5%@

1

CW18

2

LRB751V-40T1G_SOD323-2

RA35 0_0402_5%@

DA1

2

1

3

LBAT54CWT1G_SOT323-3

1 2
1 2

1 2

1 2

DVDD_IO

1 2
1 2

1 2

1 2

1 2
1 2
1 2
1 2

CARD_3V3

1

CW19

0.1u_0201_10V6K

2

DA4

1 2

@

1 2

1 2

@

RA211 0_0402_5%

2

CA183

1

220P_0201_25V7-K

220P_0201_25V7-K

CD@

DMIC_DATA_R
DMIC_CLK_R
HDA_SDOUT_AUDIO
HDA_BITCLK_AUDIO

HDA_SYNC_AUDIO
PC_BEEP

JSENSE

VDD_STB

LINE1_R
LINE1_L

RREF

SPKR_MUTE#EC_MUTE#

12

12

2

CA184

1

220P_0201_25V7-K

CD@

CD@

RA43
10K_0402_5%

1 2

CA40

RA14
10K_0402_5%

2

CA29

CA30

1

220P_0201_25V7-K

CD@

1
2
3
4
5
6
7
8

9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29

0.1U_0201_6.3V6-K

1 2

RA223 15_040 2_5%CD@

1 2

RA224 15_040 2_5%CD@

1 2

RA32 15_0402_5%CD@

1 2

RA33 15_0402_5%CD@

2

1

UA1

HD-GPIO0/DMIC-DATA
HD-GPIO1/DMIC-CLK
HD-SDATA-OUT
HD-BCLK
HD-LDO3-CAP
HD-SDATA-IN
HD-DVDD-IO
HD-SYNC
HD-PCBEEP
HD-JD1(HP/LINE1)
HD-MIC2-L(RING)
HD-MIC2-R(SLEEVE)
HD-3V5V-STB
HD-MIC2-CAP
HD-LINE1-R
HD-LINE1-L
HD-LINE2-R
HD-LINE2-L
CR-SD-CMD
CR-SD-DAT[3]
CR-SD-DAT[2]
CR-SDREG
CR-TEST1
CR-V18-CAP
CR-RREF
CR-DM
CR-DP
CR-3V3-IN
CR-SD-3V3

RTS5199-CG_QFN56_7X7

PC_BEEPPC_BEEP1

30

HD-LINE1-VREFO-L

SPK_R+
SPK_R­SPK_L+
SPK_L-

CR-GPIO

CR-SD-CD

CR-SD-WP
CR-SD-DAT[1]
CR-SD-DAT[0]

CR-SD-CLK

HD-AVDD1
HD-LDO1-CAP

HD-VREF

HD-MIC2-VREFO

HD-HPOUT-L

HD-HPOUT-R

HD-CPVEE

HD-CBN

HD-CPVDD

HD-CBP

HD-LDO2-CAP

HD-AVDD2

HD-PVDD1

HD-SPKOUT-LP
HD-SPKOUT-LN
HD-SPKOUT-RN
HD-SPKOUT-RP

HD-PVDD2

HD-PDB

HD-DVDD

GNDPAD

SD_CD#

31

SD_WP

32

SD_D1_R

33

SD_D0_R

34

SD_CLK_R

35
36

+5VA
LDO1_CAP

37
38
39

MICBIASB
LINE1_VREF_L

40

HPOUT_L

41

HPOUT_R

42
43
44
45
46

HD_LDO2

47
48
49

+5VD
SPK_L+

50

SPK_L-

51

SPK_R-

52

SPK_R+

53
54

+5VD
SPKR_MUTE#

55
56

57

LINE1_L

CA45 1U_0402_6.3V6K

LINE1_VREF_L

RA41 4.7K_0402_5%

HPOUT_L A_HP_OUTL_R

LINE1_VREF_L

RA42 4.7K_0402_5%

LINE1_R

CA46 1U_0402_6.3V6K

1 2

RA222 0_0402_5%@

1 2

RA221 0_0402_5%@

1 2

RA30 0_0402_5%@

1 2

RA34 0_0402_5%@

11 / 8 SIT Co st d own t o 0ohm w ei

SD_CD# 31
SD_WP 31
SD_D1_R 31
SD_D0_R 31

1 2

CA43 2.2U_0402_6.3V6M

1 2

CA44 1U_0402_6.3V6K

1 2

CA47 1U_0402_6.3V6K

1 2

CC167 10U_0402_6.3V6M

SD_CLK_R 31

+3VS

1 2

CA48 1U_0402_6.3V6K

+1.8V_AUDIO

12

CA44.7U_0603_6.3V6K

@

Analog powe r for DACs, ADCs

Digital p owe r for digital I/ O cir cuit

2

2

1U_0402_6.3V6K

1 2

1 2

1 2

1 2

0.1U_0201_6.3V6-K
CA179

CA180

1

1

1 2

RA21 51_0402_1%

1 2

RA20 51_0402_1%

A_HP_OUTR_RHPOUT_R

11 / 8 SIT Ven dor sugges tion form 47 ohm change t o 51om wei

JSPK1

470P_0201_50V7-K

ME@

1

1

2

2

3

3

4

4

5

GND1

6

GND2

ACES_88231-04001

SPK_R+_CONN
SPK_R-_CONN
SPK_L+_CONN
SPK_L-_CONN

470P_0201_50V7-K

470P_0201_50V7-K

470P_0201_50V7-K

CA32

CA181

CA31

1

EMC@

2

CA182

1

1

EMC@

1

EMC@

EMC@

2

2

2

8/ 16 Up da te Au d io Jack P/ N SP01 15 09 16 3 wei

CC257

10U_0402_6.3V6M

+1.8V_AUDIO

2

1

Audio Jack

RING2_CONN

1 2

R3124

R3123

0_0402_5%

1 2

0_0402_5%

RING3_CONN
RING2_CONN
A_HP_OUTL_R
A_HP_OUTR_R
PLUG_IN

1

1

1

C185

EMC_NS@

A A

2

2

47P_0201_25V8-J

2

AZ5123-01F.R7GR_DF N1006P2X2

AZ5123-01F.R7GR_DF N1006P2X2

1

1

DA6

DA5

1

1

EMC_NS@

EMC_NS@

2

2

2

2

AZ5123-01F.R7GR_DF N1006P2X2

AZ5123-01F.R7GR_DF N1006P2X2

1

DA7

1

EMC_NS@

2

2

AZ5123-01F.R7GR_DF N1006P2X2

1

DA8

DA9

1

EMC_NS@

EMC_NS@

2

2

1

CA38

2

EMC_NS@

100P_0201_25V8J

DMIC_CLK

DMIC_DATA

1

CA39

2

EMC_NS@

100P_0201_25V8J

CA23

1

2

EMC_NS@

22P_0201_258J

1 2

RA27 27_0402_5%

EMC@

CA24

CA25

1

1

EMC@

2

2

EMC_NS@

22P_0201_258J

33P_0201_50V8-J

33P_0201_50V8-J

HDA_SYNC_AUDIO
HDA_SDOUT_AUDIO
HDA_BITCLK_AUDIO
HDA_SDIN0

CA26

1

2

EMC_NS@

For EMI

1 2

C232

@

@

470P_0201_50V7-K@

1 2

C184

470P_0201_50V7-K@

A_HP_OUTL_R

PLUG_IN

A_HP_OUTR_R

RING3_CONN

1

1

C183

C182

EMC@

EMC@

2

2

100P_0201_25V8J

100P_0201_25V8J

JHP1

3

G/M

1

L

5

5

6

6

2

R

4

M/G

7

MS

SINGA_2SJ3095-140111F

ME@

8/ 16 Up da te Aud io Jack P/ N DC02 16 0 81 01 we i

Titl e

Titl e

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROP RIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROP RIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROP RIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT O F LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT O F LC FUTURE CENTER.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT O F LC FUTURE CENTER.

3

2015/08/20

2015/08/20

2015/08/20

LC Future Cente r Secret Data

LC Future Cente r Secret Data

LC Future Cente r Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

2016/08/20

2016/08/20

2016/08/20

Titl e

Codec & CR_RTS5199

Codec & CR_RTS5199

Codec & CR_RTS5199

Size Document Number Re v

Size Document Number Re v

Size Document Number Re v

C

C

C

Date: Sheet of

Date: Sheet of

Date: Sheet of

DG421

DG421

DG421

Sunday, J anuary 22, 2017

Sunday, J anuary 22, 2017

Sunday, J anuary 22, 2017

30 60

30 60

1

30 60

1.0

1.0

1.0

5

D D

4

3

CARD_3V3

2

1

SD / MMC

CW9

@

CARD_3V3

SD_CD#30
SD_WP30

1

1

2

2

FOR ESD

1

CW17

2

0.1u_0201_10V6K

SD_D3
SD_CMD

SD_CLK

SD_D0
SD_D1
SD_D2

SD_CD#
SD_WP

JREAD1

1

CD/DAT3

2

CMD

3

VSS1

4

VDD

5

CLK

6

VSS2

7

DAT0

8

DAT1

9

DAT2

10

CARDDETECT

11

WRITEPROTECT

T-SOL_5-251301001000-6_NR

ME@

SH1
SH2
SH3
SH4

12
13
14
15

8/ 1 6 Up date Conn . P/ N SP070 00 WG00 we i

DW1

AZ5123-01F.R7GR_DFN1006P2X2

EMC_NS@

SD_D0_R30

SD_D1_R30

C C

B B

SD_D2_R30

SD_D3_R30

SD_CMD_R30

SD_CLK_R30

SD_D0_R

SD_D1_R

SD_D2_R

SD_D3_R

1 2

RW3 0_0402_5%@

1 2

RW4 0_0402_5%@

1 2

RW5 0_0402_5%@

1 2

RW6 0_0402_5%@

1 2

RW7 0_0402_5%@

1 2

RW8 0_0402_5%@

1 2

CW5 5.6P_0402_50V8-D

EMC@

1 2

CW6 5.6P_0402_50V8-D

EMC@

1 2

CW7 5.6P_0402_50V8-D

EMC@

1 2

CW8 5.6P_0402_50V8-D

EMC@

1 2

CW11 5.6P_0402_50V8-D

EMC@

1 2

CW12 5.6P_0402_50V8-D

EMC@

SD_D0

SD_D1

SD_D2

SD_D3

SD_CMDSD_CMD_R

SD_CLKSD_CLK_R

1

2

4.7U_0402_6.3V6M

Close to Connector

Close to Connector

A A

Titl e

Titl e

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DR AWING IS THE PROPRIETARY PROPERTY OF LC FUT URE CENTER. AND CONTAINS CONFIDENT IAL

THIS SHEET OF ENGINEERING DR AWING IS THE PROPRIETARY PROPERTY OF LC FUT URE CENTER. AND CONTAINS CONFIDENT IAL

THIS SHEET OF ENGINEERING DR AWING IS THE PROPRIETARY PROPERTY OF LC FUT URE CENTER. AND CONTAINS CONFIDENT IAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUT HORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CON TAINS

DEPARTMENT EXCEPT AS AUT HORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CON TAINS

DEPARTMENT EXCEPT AS AUT HORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CON TAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF LC FUTURE CEN TER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF LC FUTURE CEN TER.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF LC FUTURE CEN TER.

2015/08/20

2015/08/20

2015/08/20

3

LC Future Center Secret Data

LC Future Center Secret Data

LC Future Center Secret Data

Deciphered D ate

Deciphered D ate

Deciphered D ate

2016/08/20

2016/08/20

2016/08/20

2

Titl e

Cardreader

Cardreader

Cardreader

Size Document Number Re v

Size Document Number Re v

Size Document Number Re v

Custom

Custom

Custom

Date : Sheet o f

Date : Sheet o f

Date : Sheet o f

Sunday, Janu ary 22, 2017

Sunday, Janu ary 22, 2017

Sunday, Janu ary 22, 2017

DG421

DG421

DG421

31 60

31 60

31 60

1

1.0

1.0

1.0

5

4

3

2

1

1 2

D D

RTPM1 0_0603 _5%TPM@

1

CTPM4

0.1u_0 201_10V6K

TPM@

2

1

CTPM1
10U_06 03_6.3V6M

2

TPM@

+3VS_TP M+3VS

1A

1

CTPM3

0.1u_0 201_10V6K

TPM@

2

TPM

UTPM1

1

NC_1

2

C C

RTPM12

1 2

TPM@

0_0402 _5%

Reserve for Nationz TPM

+3VALW

RTPM11

1 2

TPM@

0_0603 _5%

Add for Nuvoton TPM

B B

NC_2

3

NC_3

7

PP

6

NC_4

9

NC_7

4

GND_1

11

GND_2

18

GND_3

5

NC_5

8

NC_6

12

NC_8

13

NC_9

14

NC_10

Z32H32 0TC-LPC-T28 -LT1_TSSOP2 8

TPM@

VDD3
VDD1

LPCPD#
SERIRQ

LAD0
LAD1

LFRAME#

LAD2
LAD3

GND_4

LCLK

VDD2

CLK_RUN#

LRESET#

24
10

28

SERIRQ_ TPM

27

LPC_AD0 _TPM

26

LPC_AD1 _TPM

23

LPC_FRA ME#_TPM

22

LPC_AD2 _TPM

20

LPC_AD3 _TPM

17

25
21
19

TPM_CLK RUN#

15

16

1 2

RTPM2 4.7K_04 02_5%TPM@

RTPM5 0_0402 _5%TPM@
RTPM6 0_0402 _5%TPM@
RTPM7 0_0402 _5%TPM@
RTPM8 0_0402 _5%TPM@
RTPM9 0_0402 _5%TPM@
RTPM10 0_0402 _5%TPM@

PLT_RST# 11 ,20,37,40,4 4

1 2
1 2
1 2
1 2
1 2
1 2

+3VS_TP M

Reserve for Nationz TPM

1 2

RTPM13

0_0402 _5%

Reserve for Nuvoton TPM

12

RTPM4
0_0402 _5%

TPM@

SERIRQ 7,44

LPC_AD0 7,44
LPC_AD1 7,44
LPC_FRA ME# 7 ,44
LPC_AD2 7,44
LPC_AD3 7,44

CLK_PC I_TPM 7

@

+3VS_TP M

PM_CLKR UN# 7

Nationz TPM Nuvoton TPM

RTPM2

RTPM12

RTPM11 NC

Stuff

Stuff

NC

NC

Stuff

A A

Titl e

Titl e

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TR ANSFERED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TR ANSFERED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TR ANSFERED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF LC FUTURE CENT ER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF LC FUTURE CENT ER.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF LC FUTURE CENT ER.

3

2015/08/20

2015/08/20

2015/08/20

LC Future Center Secret Da ta

LC Future Center Secret Da ta

LC Future Center Secret Da ta

Deciphered Date

Deciphered Date

Deciphered Date

2

2016/08/20

2016/08/20

2016/08/20

Titl e

TPM

TPM

TPM

Size D ocument Number Re v

Size D ocument Number Re v

Size D ocument Number Re v

Custom

Custom

Custom

Date : Sheet o f

Date : Sheet o f

Date : Sheet o f

Sunday, Jan uary 22, 2017

Sunday, Jan uary 22, 2017

Sunday, Jan uary 22, 2017

DG421

DG421

DG421

32 60

32 60

1

32 60

1.0

1.0

1.0

5

+3VS

1

C1

0.1u_0201_10V6K

D D

PCH_ENVDD

2

U5 EN PIN VIH MIN 1.5V

V20B+ +LEDVDD

2A 80 mil

LCD POWER CIRCUIT

U5

5

4

SY6288C20AAC_SOT23-5

R17 0_0805_5%@

IN

EN

1 2

1

OUT

2

GND

3

OCB

R263

1 2

@

0_0805_5%

2A 80 mil

1

CD@

2

C14

4.7U_0805_25V6-K

4

+LCDVDD_CON+LCDVDD

W=60mi ls

@

1

2

4.7U_0402_6.3V6M

C121

RF_NS@

1

1

2

2

33P_0402_50V8J

0.1u_0201_10V6K

C122

C123

For RF

1

EMC@

2

C15

0.1U_0201_25V6-K

3

CMOS Camera

CMOS_ON#

0.01U_0201_25V6-K

EMC_NS@

For EMI

Close to R5

1 2

R5

100K_0402_5%

1

C9

2

2

+3VS +3VS_CMOS_R

W=40 mils

LP2301ALT1G_SOT23-3

Q7 @

1

C5

0.1u_0201_10V6K

@

@

2

1

C10

0.1u_0201_10V6K

@

2

Need short

J1

@

112

JUMP_43X39

S

G

2

1

2

+3VS_CMOS

D

13

@

1

2

C6

0.01U_0201_10V6K

1 2

R3

0_0603_5%

1

C3

0.1u_0201_10V6K

CD@

2

W=40mi ls

@

1

C4
10U_0603_6.3V6M

@

2

EMI Request

PCH_ENVDD4

100K_0402_5%

C C

PCH_ENBKL

R11

BKOFF#44

PCH_ENBKL4

B B

PCH_EDP_PWM4

R12 0_0402_5%@

R14 0_0402_5%@

R19 0_0402_5%@

R1

1 2

@

0_0402_5%

1 2

1 2

1 2

PCH_ENVDD

12

+3VS

1 2

12

+3VS

1 2

12

R10

4.7K_0402_5%

@

DISPOFF#

ENBKL

R16
100K_0402_5%

R18
1K_0402_5%

@

INVT_PWM

R20
100K_0402_5%

ENBKL 44

R9

100K_0402_1%

@

R15

100K_0402_1%

@

1 2

PCH_CMOS_ON#8

EC_CMOS_ON#44

R296 0_0402_5%@

1 2

R297 0_0402_5%@

EMI request

DMIC_CLK

1

EMC@

2

C11

100P_0201_25V8J

100K_0402_1%

1 2

100K_0402_1%

1 2

DISPOFF#

+3VS

R8

@

1 2

EDP_AUX
EDP_AUX#

R13

@

1 2

EMC_NS@

680P_0402_50V7K

CMOS_ON#

INVT_PWM

1

2

EMC_NS@

C12

470P_0201_50V7-K

1

2

EMC_NS@

C13

470P_0201_50V7-K

CPU_EDP_TX0+4
CPU_EDP_TX0-4

CPU_EDP_TX1+4
CPU_EDP_TX1-4

CPU_EDP_AUX4
CPU_EDP_AUX#4

+3VS

1 2

R21

@

0_0402_5%

1

C22

2

CPU_EDP_TX1+ EDP_TX1+

CPU_EDP_AUX EDP_AUX
CPU_EDP_AUX# EDP_AUX#

CPU_EDP_HPD4

W=60mi ls

DMIC_DATA30

DMIC_CLK30

USB20_P89
USB20_N89

USB20_N8 USB20_N8_R

USB20_P8 USB20_P8_R

+LEDVDD

1 2

C19 0.1u_0201_1 0V6K

1 2

C16 0.1u_0201_1 0V6K

1 2

C17 0.1u_0201_1 0V6K

1 2

C18 0.1u_0201_1 0V6K

1 2

C20 0.1u_0201_1 0V6K

1 2

C21 0.1u_0201_1 0V6K

+LCDVDD_CON

+3VS

1 2

R182 0_0402_5%@

1 2

R183 0_0402_5%@

+3VS_CMOS

.047U_0201_6.3V6K

EMC_NS@

EMI request

L12

EMC_NS@

1

1

4

4

EXC24CH900U_4P

EDP_TX0+CPU_EDP_TX0+
EDP_TX0-CPU_EDP_TX0-

EDP_TX1-CPU_EDP_TX1-

DISPOFF#

INVT_PWM

USB20_P8_R
USB20_N8_R

W=40mi ls

1

C24

2

For EM I

2

2

3

3

JEDP1

1

1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

9

9

10

10

11

11

12

12

13

13

14

14

15

15

16

16

17

17

18

18

19

19

20

20

21

21

22

22

23

23

24

24

25

25

26

26

27

27

28

28

29

29

30

30

31

G1

32

G2

DRAPH_FC5AF301-3181H

ME@

Touch Screen

USB20_P6_CONN

USB20_P6

USB20_N6

A A

L15

1

1

4

4

EXC24CH900U_4P

EMC_NS@

For EM I

USB20_P6_CONN

2

2

USB20_N6_CONN

3

3

5

USB20_N6_CONN

+5VS_TS

1

D2

1

2

AZ5725-01F.R7GR_DFN1006P2X2

2

EMC_NS@

For ESD

3

2

D1
AZC199-02S.R7G_SOT23-3

EMC_NS@

1

4

Touch Screen

+5VS_TS+5VS

1 2

R26 0_0402_5%@

0.1u_0201_10V6K

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE C ENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE C ENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE C ENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

3

2015/08/20

2015/08/20

2015/08/20

1

C25

TS@

EC_TS_ON44

2

LC Future Center Secret Data

LC Future Center Secret Data

LC Future Center Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

USB20_N69
USB20_P69

1 2

R28 0_0402_5%@

1 2

R23 0_0402_5%@

1 2

R24 0_0402_5%@

2016/08/20

2016/08/20

2016/08/20

2

JTS1

ME@

1

1

TS_RS

USB20_N6_CONN
USB20_P6_CONN

Title

Title

Title

eDP/CMOS/Touch screen

eDP/CMOS/Touch screen

eDP/CMOS/Touch screen

Size Document Number Re v

Size Document Number Re v

Size Document Number Re v

Custom

Custom

Custom

Date : Sheet of

Date : Sheet of

Date : Sheet of

2
3
4
5
6

CVILU_CI1806M2HR0-NH

Sunday, January 22, 2017

Sunday, January 22, 2017

Sunday, January 22, 2017

2
3
4
5
6

DG421

DG421

DG421

GND1

GND2

7

8

33 60

33 60

33 60

1

1.0

1.0

1.0

5

4

3

2

1

L2

HDMI_CLK-_C

HDMI_CLK+_C HDMI_CLK+_CON

D D

HDMI_TX0-_C

HDMI_TX0+_C

HDMI_TX1-_C HDMI_TX1-_CON

HDMI_TX1+_C

HDMI_TX2-_C

HDMI_TX2+_C

1

1

4

4

EXC24CH900U_4P

L3

1

1

4

4

EXC24CH900U_4P

L4

1

1

4

4

EXC24CH900U_4P

L5

1

1

4

4

EXC24CH900U_4P

EMC@

EMC@

EMC@

EMC@

HDMI_CLK-_CON

2

2

3

3

HDMI_TX0-_CON

2

2

HDMI_TX0+_CON

3

3

2

2

HDMI_TX1+_CON

3

3

HDMI_TX2-_CON

2

2

HDMI_TX2+_CON

3

3

For EM C

C C

B B

HDMI_CLK-_C

HDMI_CLK+_C

HDMI_TX0-_C

HDMI_TX0+_C

HDMI_TX1-_C

HDMI_TX1+_C

HDMI_TX2-_C

HDMI_TX2+_C

1 2

R29 470_0402_5%

R30 470_0402_5%1 2

R31 470_0402_5%1 2

1 2

R32 470_0402_5%

1 2

R33 470_0402_5%

1 2

R34 470_0402_5%

R37 470_0402_5%1 2

R38 470_0402_5%1 2

+3VS

R42

2

G

1 2

@

100K_0402_5%

EMC_NS@

1 2

C26 3.3P_0402_50V8-C

EMC_NS@

1 2

C27 3.3P_0402_50V8-C

EMC_NS@

1 2

C28 3.3P_0402_50V8-C

EMC_NS@

1 2

C29 3.3P_0402_50V8-C

EMC_NS@

1 2

C30 3.3P_0402_50V8-C

EMC_NS@

1 2

C31 3.3P_0402_50V8-C

EMC_NS@

1 2

C32 3.3P_0402_50V8-C

EMC_NS@

1 2

C33 3.3P_0402_50V8-C

13

D

Q13

2N7002KW_SOT323-3

S

+3VS

G

5

Q1B

S

HDMICLK_R

34

DDPB_CLK4

DDPB_DATA4

2

G

Q1A

S

61

2N7002KDWH_SOT363-6

D

D

2N7002KDWH_SOT363-6

HDMIDAT_R

HDMI_DET HDMI_DET

HDMIDAT_R

HDMICLK_R HDMICLK_R

+5VS_HDMI

D3

1

1

2

4

5

3

8

EMC_NS@

10

9

7

6

2

4

5

3

AZ1045-04F_DFN2510P10E-10-9

9

HDMIDAT_R

8

7

+5VS_HDMI

6

For EM C

R41
20K_0402_5%

1 2

12

12

12
12

12

+5VS

3

D4

BAT54S-7-F_SOT23-3

1

D4

2

@

HDMI_DET

SUSP46

12

R46 0_0402_5%@
R45 0_0402_5%@ 12

HDMI_TX1+_C
HDMI_TX1-_C HDMI_TX 1-_CON

R48 0_0402_5%@
R47 0_0402_5%@ 12
R50 0_0402_5%@
R49 0_0402_5%@

R44 0_0402_5%@ 12
R43 0_0402_5%@

12

12
12

12

HDMI_TX1+_CON

+5VS

+5VS_HDMI

D5

2

@

3

RB491D_SOT23-3

LP2301ALT1G_SOT23-3

1 3

D

S

Q22

G

2

JHDMI1

18

+5V_Power

7

TMDS_Data0+

9

TMDS_Data0-

4

TMDS_Data1+

6

TMDS_Data1-

1

TMDS_Data2+

3

TMDS_Data2-

8

TMDS_Data0_Shield

5

TMDS_Data1_Shield

2

TMDS_Data2_Shield

11

TMDS_Clock_Shield

10

TMDS_Clock+

12

TMDS_Clock-

ALLTO_C128S9-K1935-L

1

F1

21

0.5A_6V_1206L050YRHF

0.1u_0201_10V6K

ME@

SCL

SDA

CEC

DDC/CEC_Ground

Hot_Plug_Detect

Utility

GND1
GND2
GND3
GND4

+5VS_HDMI+5VS_HDMI_F

1

C34

2

HDMICLK_R

15

HDMIDAT_R

16

13
17

HDMI_DET

19

14

23

RP1

2.2K_0404_4P2R_5%

14

20
21
22
23

+3VS

R35

1M_0402_5%

HDMI_HPD4

HDMI_TX0+4
HDMI_TX0-4
HDMI_TX1+4
HDMI_TX1-4
HDMI_TX2+4
HDMI_TX2-4

HDMI_CLK+4
HDMI_CLK-4

2

G

Q12

1 2

13

D

S

2N7002KW_SOT323-3

HDMI_TX0+ HDMI_TX0+_C HDMI_TX0+_CON

C38 0.1u_0201_10V6K

HDMI_TX0- HDMI_TX0-_C HDMI_TX0-_CON

C37 0.1u_0201_10V6K12

HDMI_TX1+

C40 0.1u_0201_10V6K

HDMI_TX1-

C39 0.1u_0201_10V6K12

HDMI_TX2+ HDMI_TX2+_C HDMI_TX2+_CON

C42 0.1u_0201_10V6K

HDMI_TX2- HDMI_TX2-_C HDMI_TX2-_CON

C41 0.1u_0201_10V6K

HDMI_CLK+ HDMI_CLK+_C HDMI_CLK+_CON

C36 0.1u_0201_10V6K12

HDMI_CLK- HDMI_CLK-_C HDMI_CLK-_CON

C35 0.1u_0201_10V6K

8/ 16 Upd ate HDMICo nn . P/ N DC0 2160 8081 w ei

Close to JHDMI1

D6

1

HDMI_CLK-_CON HDMI_CLK-_CON

A A

1

2

2

4

4

5

5

3

3

8

AZ1045-04F_DFN2510P10E-10-9

EMC_NS@

HDMI_CLK+_CONHDMI_CLK+_CON

9

10

8

9

HDMI_TX0+_CONHDMI_TX0+_CON

7

7

6

6

For EM C

HDMI_TX1-_CON

HDMI_TX1+_CON

HDMI_TX2-_CON

HDMI_TX2+_CONHDMI_TX0-_CON HDMI_TX0-_CON

D7

1

1

2

2

4

4

5

5

3

3

8

AZ1045-04F_DFN2510P10E-10-9

EMC_NS@

10

9

7

6

HDMI_TX1-_CON

9

HDMI_TX1+_CON

8

HDMI_TX2-_CON

7

HDMI_TX2+_CON

6

Titl e

Titl e

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D
DEPARTMENT EXCEPT A S AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT A S AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT A S AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

3

2015/08/20

2015/08/20

2015/08/20

LC Future Center Secret Data

LC Future Center Secret Data

LC Future Center Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

2016/08/20

2016/08/20

2016/08/20

Titl e

HDMI_CONN

HDMI_CONN

HDMI_CONN

Size Document Number Re v

Size Document Number Re v

Size Document Number Re v

Custom

Custom

Custom

Date : Sheet o f

Date : Sheet o f

Date : Sheet o f

DG421

DG421

DG421

Sunday, January 22, 2017

Sunday, January 22, 2017

Sunday, January 22, 2017

34 60

34 60

34 60

1

1.0

1.0

1.0

5

D D

C C

4

3

2

1

B B

A A

Titl e

Titl e

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TR ANSFERED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TR ANSFERED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TR ANSFERED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF LC FUTURE CENT ER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF LC FUTURE CENT ER.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF LC FUTURE CENT ER.

3

2015/08/20

2015/08/20

2015/08/20

LC Future Center Secret Da ta

LC Future Center Secret Da ta

LC Future Center Secret Da ta

Deciphered Date

Deciphered Date

Deciphered Date

2

2016/08/20

2016/08/20

2016/08/20

Titl e

P35-Blank

P35-Blank

P35-Blank

Size D ocument Number Re v

Size D ocument Number Re v

Size D ocument Number Re v

Custom

Custom

Custom

Date : Sheet o f

Date : Sheet o f

Date : Sheet o f

Sunday, Jan uary 22, 2017

Sunday, Jan uary 22, 2017

Sunday, Jan uary 22, 2017

DG421

DG421

DG421

35 60

35 60

1

35 60

1.0

1.0

1.0

5

D D

C C

4

3

2

1

B B

A A

Titl e

Titl e

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D
DEPARTMENT EXCEPT A S AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT A S AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT A S AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

3

2015/08/20

2015/08/20

2015/08/20

LC Future Center Secret Data

LC Future Center Secret Data

LC Future Center Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

2016/08/20

2016/08/20

2016/08/20

Titl e

Blank

Blank

Blank

Size Document Number Re v

Size Document Number Re v

Size Document Number Re v

Custom

Custom

Custom

Date : Sheet o f

Date : Sheet o f

Date : Sheet o f

DG421

DG421

DG421

Sunday, January 22, 2017

Sunday, January 22, 2017

Sunday, January 22, 2017

36 60

36 60

36 60

1

1.0

1.0

1.0

5

4

3

2

1

+3VALW TO +3VALW_LAN

+3VALW_LAN rising t i me ( 10 %~90 %):

+3VALW +3VALW _LAN

D D

LAN_PW R_ON#44

PCIE_WA KE#1 1,40,44

C C

LAN_WA KE#40, 44

+3VS

12

12

RL9
1K_040 2_1%

ISOLATE#

RL11
15K_04 02_5%

@

RL2

100K_0 402_5%

RL10

+3VALW

@

1 2

0_0402 _5%

12

@

RL3

LAN_PW R_ON#

1 2

@

47K_04 02_5%

1 2

RL7 0_040 2_5%@

1 2

RL6 0_040 2_5%@

0.1u_0 201_10V6K

CL8

1

2

@

Need short

JL1

112

JUMP_43 X79

LP2301 ALT1G_SOT2 3-3

S

Q14

G

2

+3VALW _LAN

RL5
10K_04 02_5%

@

1 2

PCIE_WA KE#_R

PCIE_PR X_DTX_N59
PCIE_PR X_DTX_P59

2

@

D

13

@

CL9

@

PLT_RST#11,2 0,32,40,44

0.5ms＜spec＜ 10 0m s

width : 40 mils

CL4

1

2

0.01U_ 0201_10V6 K

Close to Pin11 Close to Pin32

RL12

CL10 0.1 u_0201_1 0V6K
CL11 0.1 u_0201_1 0V6K

CL10 close t o Pin18
CL11 close t o Pin17

1

2

@

4.7U_0 402_6.3V6M

@

1 2

0_0402 _5%

1 2
1 2

RL8

2.49K_0 402_1%

CL5

1

2

@

1 2

TL3 @

TL4 @

CL6

4.7U_0 402_6.3V6M

CL7

1

2

1

2

0.1u_0 201_10V6K

0.1u_0 201_10V6K

Close to Pin11 Close t o Pin32

manual change the Codec PN to RTL8111GUL-CG

+3VALW _LAN
RSET

+LAN_V DD10
LAN_XTAL O
LAN_XTAL I

1

LAN_DIS ABLE#LAN_PW R_ON#

1

+LAN_REGOUT
+LAN_V DDREG
+LAN_V DD10
PCIE_WA KE#_R

ISOLATE#
PLT_RST#

PCIE_PR X_C_DTX_N5
PCIE_PR X_C_DTX_P5

UL1

33

GND

32

AVDD33_2

31

RSET

30

AVDD10

29

CKXTAL2

28

CKXTAL1

27

LED0

26

LED1/GPIO

25

LED2

24

REGOUT

23

VDDREG

22

DVDD10

21

LANWAKEB

20

ISOLATEB

19

PERSTB

18

HSON

17

HSOP

RTL811 1GUL-CG Q FN 32P

8111G UL@

+3VALW _LAN +LAN_V DDREG

16

REFCLK_N

15

REFCLK_P

14

HSIN

13

HSIP

12

CLKREQB

11

AVDD33_1

10

MDIN3

9

MDIP3

8

AVDD10_2

7

MDIN2

6

MDIP2

5

MDIN1

4

MDIP1

3

AVDD10_1

2

MDIN0

1

MDIP0

RL1

1 2

0_0603 _5%

CLK_PCI E_LAN#
CLK_PCI E_LAN
PCIE_PTX _C_DRX_N5
PCIE_PTX _C_DRX_P5
LAN_CL KREQ#_R
+3VALW _LAN
LAN_MDI3­LAN_MDI3+
+LAN_VD D10
LAN_MDI2­LAN_MDI2+
LAN_MDI1­LAN_MDI1+
+LAN_V DD10
LAN_MDI0­LAN_MDI0+

@

1

CL1

4.7U_0 402_6.3V6M

2

LAN_CL KREQ#_R

CLK_PC IE_LAN# 10
CLK_PCI E_LAN 10
PCIE_PTX _C_DRX_N5 9
PCIE_PTX _C_DRX_P5 9

LAN_MDI3- 38
LAN_MDI3+ 38

LAN_MDI2- 38
LAN_MDI2+ 38
LAN_MDI1- 38
LAN_MDI1+ 38

LAN_MDI0- 38
LAN_MDI0+ 38

1

CL2

0.1u_0 201_10V6K

2

+3VALW _LAN +3VS

@

RL4

10K_04 02_5%

1 2

2

G

QL1

1 3

D

2N7002 KW_SOT323 -3

1 2

RL18 0 _0402_5%@

@

S

LAN_CL KREQ# 10

B B

LAN_XTAL O_R

YL1

1

OSC1

GND12OSC2

1

CL12

12P_04 02_50V8-J

A A

25MHZ_1 0PF_7V2500 0014

2

5

GND2

4

3

1

CL13
15P_04 02_50V8J

2

1 2

RL21 1K_0402 _5%

4

LAN_XTAL I

LAN_XTAL O

+LAN_REGOUT

For RTL8111GUL(SWR mode, reserved)
For RTL8111H (LDO mode)

1 2

LL1

2.2UH_ NLC25201 8T-2R2J-N_5 %

1 2

RL20

Layout Note: LL1 must be
within 200mil to Pin24,
CL15,CL16 must be within
200mil to LL1
+LAN_REGOUT: Width =60mil

8111GU L@

8111H@

0_0805 _5%

CL15

4.7U_0 402_6.3V6M

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TR ANSFERED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TR ANSFERED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TR ANSFERED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF LC FUTURE CENT ER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF LC FUTURE CENT ER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF LC FUTURE CENT ER.

3

1

1

2

2

CL16

0.1u_0 201_10V6K

2015/08/20

2015/08/20

2015/08/20

+LAN_VDD10

1

CL17

0.1u_0 201_10V6K

2

1

CL18

0.1u_0 201_10V6K

2

Close to Pin3, 8, 22, 30

LC Future Center Secret Da ta

LC Future Center Secret Da ta

LC Future Center Secret Da ta

Deciphered Date

Deciphered Date

Deciphered Date

2

2016/08/20

2016/08/20

2016/08/20

1

CL19

0.1u_0 201_10V6K

2

1

CL20

0.1u_0 201_10V6K

2

1

CL21
1U_040 2_6.3V6K

2

1

CL22

0.1u_0 201_10V6K

2

Close to Pin22(Reser ved)

Titl e

Titl e

Titl e

LAN_RTL8111H_CG

LAN_RTL8111H_CG

LAN_RTL8111H_CG

Size D ocument Number Re v

Size D ocument Number Re v

Size D ocument Number Re v

Custom

Custom

Custom

Date : Sheet o f

Date : Sheet o f

Date : Sheet o f

Sunday, Jan uary 22, 2017

Sunday, Jan uary 22, 2017

Sunday, Jan uary 22, 2017

DG421

DG421

DG421

37 60

37 60

1

37 60

1.0

1.0

1.0

5

DL1/DL2
1'S PN:SC300003M00

4

3

2

1

TL1

24

D D

LAN_MDI2+

LAN_MDI2-

LAN_MDI3+

LAN_MDI3-

C C

LAN_MDI1-

LAN_MDI1+

LAN_MDI0-

LAN_MDI0+

DL1

1

LINE1IN

2

3

4

11

12

1

2

3

4

11

12

LINE1OUT

LINE2IN

LINE2OUT

GND1

LINE3IN

LINE4IN5LINE4OUT

GND3

GND4

AZ3133-08F.R7G_DFN3 020P10E10

EMC_NS@

DL2

LINE1IN

LINE2IN

GND1

LINE3IN

LINE4IN5LINE4OUT

GND3

GND4

AZ3133-08F.R7G_DFN3 020P10E10

EMC_NS@

GND2

LINE3OUT

GND5

LINE1OUT

LINE2OUT

GND2

LINE3OUT

GND5

LAN_MDI2+

10

LAN_MDI2-

9

8

LAN_MDI3+

7

LAN_MDI3-

6

13

1

LAN_MDI1-

10

LAN_MDI1+

9

8

LAN_MDI0-

7

LAN_MDI0+

6

13

CL24

0.01U_0201_25V 6-K

EMC@

2

EMC

LAN_MDI0+37

LAN_MDI0-37

LAN_MDI1+37

LAN_MDI1-37

LAN_MDI2+37

LAN_MDI2-37

LAN_MDI3+37

LAN_MDI3-37

LAN_MDI0+

LAN_MDI0-

LAN_MDI1+

LAN_MDI1-

LAN_MDI2+

LAN_MDI2-

LAN_MDI3+

LAN_MDI3-

MCT1

23

MX1+

22

MX1-

21

MCT2

20

MX2+

19

MX2-

18

MCT3

17

MX3+

16

MX3-

15

MCT4

14

MX4+

13

MX4-

BOTH_GST5009 LF

Place Close to TL1

EMC

B B

1 2

RL14 0_0603_5%

1 2

RL15 0_0603_5%

1 2

RL16 0_0603_5%

@

@

@

EMC

CHASSIS1_GND

TCT1

TD1+

TD1-

TCT2

TD2+

TD2-

TCT3

TD3+

TD3-

TCT4

TD4+

TD4-

1

2

3

4

5

6

7

8

9

10

11

12

MCT

LAN_MDO0+

LAN_MDO0-

MCT

LAN_MDO1+

LAN_MDO1-

MCT

LAN_MDO2+

LAN_MDO2-

MCT

LAN_MDO3+

LAN_MDO3-

LAN_MDO0+

LAN_MDO0-

LAN_MDO1+

LAN_MDO2+

LAN_MDO2-

LAN_MDO1-

LAN_MDO3+

LAN_MDO3-

12

EMC@

RL17
20_0603_5%

1

0.022U_0603_50 V7K

CL32

EMC@

CHASSIS1_GND

JRJ1

1

TX_DA+

2

TX_DA-

3

RX_DB+

4

BI_DC+

5

BI_DC-

6

RX_DB-

7

BI_DD+

8

BI_DD-

ALLTO_C10235-10839 -L

2

GND_4

GND_3

GND_2

GND_1

8/ 16 Upd ate RJ45 P/ N DC02160 809 1 wei

1

CL25
1000P_1206_2K V7-K

EMC@

2

EMC

ME@

12

11

10

9

CHASSIS1_GND

1

DL3

1

PDT5061_DO-214AA

EMC@

2

EMC

2

A A

Titl e

Titl e

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF E NGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC F UTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF E NGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC F UTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF E NGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC F UTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEE T MAY NOT BE TRAN SFERED FROM TH E CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEE T MAY NOT BE TRAN SFERED FROM TH E CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEE T MAY NOT BE TRAN SFERED FROM TH E CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUT HORIZED BY LC FU TURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUT HORIZED BY LC FU TURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUT HORIZED BY LC FU TURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSE D TO ANY THIRD PARTY WITHOUT PRIOR WR ITTEN CONSENT OF LC FUTURE C ENTER.

MAY BE USED BY OR DISCLOSE D TO ANY THIRD PARTY WITHOUT PRIOR WR ITTEN CONSENT OF LC FUTURE C ENTER.

MAY BE USED BY OR DISCLOSE D TO ANY THIRD PARTY WITHOUT PRIOR WR ITTEN CONSENT OF LC FUTURE C ENTER.

5

4

2015/08/20

2015/08/20

2015/08/20

3

LC Future Center Secret Data

LC Future Center Secret Data

LC Future Center Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2016/08/20

2016/08/20

2016/08/20

2

Titl e

LAN_Transformer

LAN_Transformer

LAN_Transformer

Size

Size

Size

Document Number Re v

Document Number Re v

Document Number Re v

B

B

B

Sunday, January 22, 2017

Sunday, January 22, 2017

Date : She et o f

Date : She et o f

Date : She et o f

Sunday, January 22, 2017

DG421

DG421

DG421

1

38 60

38 60

38 60

1.0

1.0

1.0

5

Close to U1

2200P_0201_25V7-K

D D

C44

REMOTE+_R

1

@

REMOTE-_R

2

REMOTE+_R

REMOTE-_R

REMOTE+/-_R, REMOTE1+/-, REMOTE2+/-:
Trace width/space:10/10 mil
Trace length:<8"

SMSC thermal sensor

+3VS

R51

REMOTE+_R

REMOTE-_R

10K_0402_5%

1

C47

0.1u_0201_10V6K

@

2

+3VS

C C

placed near DIMM

U1

1

VDD

2

D+

3

D-

12

@

4

T_CRIT#

NCT7718W_MS OP8

Address 1001_101xb

SCL

SDA

ALERT#

GND

4

1 2

R175 0_0402_5%@

1 2

R176 0_0402_5%@

1 2

R177 0_0402_5%@

1 2

R178 0_0402_5%@

@

EC_SMB_CK2

8

EC_SMB_DA2

7

6

5

REMOTE1+

REMOTE2+

REMOTE2-

REMOTE1-

EC_SMB_CK2 7,20,44

EC_SMB_DA2 7,20,44

3

REMOTE1+

100P_0201_25V8J

REMOTE1-

C45

@

NTC_V1

2

1

Near GPU&VRAM

C

2

Q15

B

2

MMBT3904WH _SOT323-3

E

@

3 1

+3VALW

12

R36

13.7K_0402_1%

12

R287
100K_0402_1%_NCP15W F104F03RC

DIS@

R184

@

0_0402_5%

1 2

EC_AGND

R185
0_0402_5%

@

1 2

REMOTE2+

100P_0201_25V8J

REMOTE2-

NTC_V2

1

C46

@

C

2

Q16

B

2

MMBT3904WH _SOT323-3

E

@

3 1

+3VALW

12

R25

13.7K_0402_1%

12

R288
100K_0402_1%_NCP15W F104F03RC

1

Near CPU core

Near CPU

for layout opti mized, change t he EC_AGND to GND

+5VLP

1

C7

0.1u_0201_10V6K

@

2

B B

A A

5

HW thermal sensor

U4

1

2

3

4

over temperature threshold:
RSET=3* RTMH
92+/-30C
Hysteresis temperature threshold.
RHYST=(RSET*RTML)/(3*RTML -RSET)
56+/ -30C

@

VCC

TMSNS1

GND

RHYST1

OT1

TMSNS2

RHYST2

OT2

G718TM1U_SOT23-8

8

TMSNS1

7

PHYST1

6

TMSNS2

5

PHYST2

1 2

R6 10K_0402_5%@

1 2

R7 10K_0402_5%@

4

21.5K_0402_1%

+5VLP +5VLP

R252

@

R253

21.5K_0402_1%

@

1 2

1 2

1 2

R196 0_0402_5%@

1 2

R197 0_0402_5%@

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R &D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R &D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R &D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENT ER NEITHER TH IS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENT ER NEITHER TH IS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENT ER NEITHER TH IS SHEET NOR T HE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTUR E CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTUR E CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTUR E CENTER.

NTC_V1

NTC_V2

2016/08/16

2016/08/16

2016/08/16

3

NTC_V1 44

NTC_V2 44EC_ON44,54,55

+5VS

1 2

R52 0_0603_5%@

1

C49
10U_0805_10V6K

2

LC Future Center Secret Data

LC Future Center Secret Data

LC Future Center Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2017/08/15

2017/08/15

2017/08/15

2

FAN Conn

JFAN1

@

C50

EC_FAN_SPEED44
EC_FAN_PWM44

1

2

0.1u_0201_10V6K

+5VS_FAN

Titl e

Titl e

Titl e

Thermal sensor/FAN CONN

Thermal sensor/FAN CONN

Thermal sensor/FAN CONN

Size Document Number Re v

Size Document Number Re v

Size Document Number Re v

Custom

Custom

Custom

Date : Sheet o f

Date : Sheet o f

Date : Sheet o f

Sunday, January 22, 2017

Sunday, January 22, 2017

Sunday, January 22, 2017

ME@

1

1

2

2

3

3

4

4

5

GND1

6

GND2

ACES_85205-04001

DG421

DG421

DG421

1

39 60

39 60

39 60

1.0

1.0

1.0

A

B

C

D

E

Mini-Express Card(WLAN/WiMAX)

R258

49.9K_0402_1%

+3VS

12

12

R259

49.9K_0402_1%

UART_RX_DEBUG 8

UART_TX_DEBUG 8

EC_RX 44

SUSCLK 10
PLT_RST# 11,20, 32,37,44
PCH_BT_OFF# 8
PCH_WLAN_OFF# 8

SMB_DATA_S3 7,18
SMB_CLK_S3 7,18

EC_TX 44

+3VS_WLAN

Need short

J2

112

1 1

2 2

JUMP_43X79

+3VS_WLAN+3VS

@

2

1

C53

0.1u_0201_10V6K

@

2

WLAN_CLKREQ#10

PCIE_WAKE#11,37,44

LAN_WAKE#37,44

R61 0_0402_5%@
R262 0_0402_5%@

R57 0_0402_5%@

1 2
1 2

1 2

USB20_P79
USB20_N79

PCIE_PTX_C_DRX_P69
PCIE_PTX_C_DRX_N69

PCIE_PRX_DTX_P69
PCIE_PRX_DTX_N69

CLK_PCIE_WLAN10
CLK_PCIE_WLAN#10

WLAN_CLKREQ_Q#
PCIE_WAKE#_W LAN

JWLAN1

1

GND1

3

USB_D+

5

USB_D-

7

GND2

9

SDIO_CLK

11

SDIO_CMD

13

SDIO_DATA0

15

SDIO_DATA1

17

SDIO_DATA2

19

SDIO_DATA3

21

SDIO_WAKE#

23

SDIO_RESET#

25
27
29
31

33

GND3

35

PETP0

37

PETN0

39

GND4

41

PERP0

43

PERN0

45

GND5

47

REFCLKP0

49

REFCLKN0

51

GND6

53

CLKREQ0#

55

PEWAKE0#

57

GND7

59

RSRVD/PETP1

61

RSRVD/PETN1

63

GND8

65

RSRVD/PERP1

67

RERVD/PERN1

69

GND9

71

RSRVD/REFCLKP1

73

RSRVD/REFCLKN1

75

GND10

77

GND15

ARGOS_NASE0-S6701-TS40

ME@

3.3VAUX1

3.3VAUX2
LED1#

PCM_CLK/I2S_SCK

PCM_SYNC/I2S_WS

PCM_IN/I2S_SD_IN

PCM_OUT/I2S_SD_OUT

LED#2

GND11

UART_WAKE#

UART_RXD

KEY E
PIN24~PIN31 NC PIN

UART_TXD
UART_CTS

UART_RTS
VENDOR_DEFINED1
VENDOR_DEFINED2
VENDOR_DEFINED3

COEX3
COEX2
COEX1

SUSCLK

PERST0#
W_DISABLE2#
W_DISABLE1#

I2C_DATA

I2C_CLK

ALERT#
RSRVD

UIM_SWP/PERST1#

UIM_POWER_SNK/ CLKREQ1#

UIM_POWER_SRC/GP IO1/PEWAKE1#

3.3VAUX3

3.3VAUX4

GND14

2
4
6
8
10
12
14
16
18
20
22

24
26
28
30

32
34
36
38
40
42
44
46
48
50
52
54
56

58
60
62
64
66
68
70
72
74

76

1

1

UART_RX_DEBUG_R

UART_TX_DEBUG_R

EC_TX_RSVD
EC_RX_RSVD

SUSCLK_R
PLT_RST#
BT_OFF#
WLAN_OFF#

WLAN_SMB_DATA
WLAN_SMB_CLK

EC_TX_R

+3VS_WLAN

T2@

T3@

1 2

R256 0_0402_5%@

1 2

R257 0_0402_5%@

1 2

R62 0_0402_5%@

1 2

R63 0_0402_5%@

1 2

R88 0_0402_5%@

1 2

R55 0_0402_5%@

1 2

R53 1K_0402_5%

1 2

R56 0_0402_5%@

1 2

R58 0_0402_5%@

1 2

R59 0_0402_5%@

1 2

R89 0_0402_5%@

12

R186
100K_0402_5%

8/ 16 Up da te Conn . P/ N SP 07 00 13 20 0 wei

3 3

4 4

Titl e

Titl e

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROP RIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROP RIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROP RIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT O F LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT O F LC FUTURE CENTER.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT O F LC FUTURE CENTER.

C

2015/08/20

2015/08/20

2015/08/20

LC Future Cente r Secret Data

LC Future Cente r Secret Data

LC Future Cente r Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

D

2016/08/20

2016/08/20

2016/08/20

Titl e

NGFF WLAN&SSD

NGFF WLAN&SSD

NGFF WLAN&SSD

Size Document Number Re v

Size Document Number Re v

Size Document Number Re v

C

C

C

Date: Sheet of

Date: Sheet of

Date: Sheet of

DG421

DG421

DG421

Sunday, J anuary 22, 2017

Sunday, J anuary 22, 2017

Sunday, J anuary 22, 2017

40 60

40 60

E

40 60

1.0

1.0

1.0

A

LEFT SIDE USB3.0 PORT x2

1 1

+5VALW +USB_VCCA

1

C128
1U_0402_6.3V6K

USB_ON#44

2

U2

5

OUT

IN

GND

4

OCB

ENB

SY6288D20AAC_SOT23-5

Low Active 2A

1

2

3

1

2

USB_OC1#

C140
1000P_0201_50V7-K

EMC_NS@

B

USB_OC1# 9

C

1 2

USB30_TX_P19

USB30_TX_N19

USB20_P19

USB20_N19

USB30_RX_P19

USB30_RX_N19

C126 0 .1u_0201_10V6K

USB30_TX_N1 USB30_TX_C_N1 USB30_TX_R_N1

USB30_RX_P1 USB30_RX_R_P1

1 2

C124 0 .1u_0201_10V6K

USB30_TX_C_P1 USB30_TX_R_P1USB30 _TX_P1

1 2

R95 0_0402_5%@

1 2

R96 0_0402_5%@

1 2

R97 0_0402_5%@

1 2

R93 0_0402_5%@

1 2

R94 0_0402_5%@

1 2

R98 0_0402_5%@

D

+USB_VCCA

+

1 2

C55

220U_6.3V_M

1 2

C1117

47U_0805_6.3V6-M@

1 2

C125

1U_0402_10V6K@

1 2

C127

1U_0402_10V6K@

JUSB1

9

StdA_SSTX+

1

VBUS

8

USB20_P1_RUSB20_P1

USB20_N1_RUSB20_N1

USB30_RX_R_N1USB30_RX_N1

StdA_SSTX-

3

D+

7

GND_DRAIN

2

D-

6

StdA_SSRX+

4

GND_1

5

StdA_SSRX-

ALLTO_C190AG-10939-L

ME@

GND_2
GND_3
GND_4
GND_5

E

10
11
12
13

09 / 0 5 Updat e USBConn. P/ N DC0 21 60 90 11 w ei

L13

USB30_RX_N1 USB30_RX_R_N1

USB30_RX_P1 USB30_RX_R_P1

USB30_TX_C_N1 USB30_TX_R_N1

USB30_TX_C_P1 USB30_TX_R_P1

2 2

3 3

4 4

USB20_P1

USB20_N1

USB30_RX_N3 USB30_RX_R_N3

USB30_RX_P3 USB30_RX_R_P3

USB30_TX_C_N3 USB30_TX_R_N3

USB30_TX_C_P3 USB30_TX_R_P3

USB20_P3

USB20_N3

1

4

1

4

1

4

1

1

4

4

EXC24CH900U_4P

L16

1

1

4

4

EXC24CH900U_4P

L8

1

1

4

4

EXC24CH900U_4P

L30

EMC@

1

4

EXC24CH900U_4P

L29

EMC@

1

4

EXC24CH900U_4P

L17

EMC@

1

4

EXC24CH900U_4P

EMC@

2

2

3

EMC@

EMC@

3

2

2

3

3

USB20_P1_R

2

2

USB20_N1_R

3

3

+USB_VCCA

1

2

AZ5725-01F.R7GR_DF N1006P2X2

1

2

EMC@

D11

EMC

2

2

3

3

2

2

3

3

USB20_P3_R

2

2

USB20_N3_R

3

3

USB30_TX_P39

USB30_TX_N39

USB30_RX_P39

USB30_RX_N39

USB20_P3_R

USB20_N3_R

EMC

USB20_P1_R

USB20_N1_R

3

2

D13
AZC199-02S.R7G_SOT23-3

EMC@

1

USB30_TX_N3 USB30_TX_C_N3 USB30_TX_R_N3

USB20_P39

USB20_N39

USB20_P3

USB20_N3

USB30_RX_P3 USB30_RX_R_P3

USB30_RX_N3

1 2

C2057 0.1u_0201_10V6K

1 2

C2058 0.1u_0201_10V6K

USB30_TX_C_P3 USB30_TX_R_P3USB30 _TX_P3

1 2

R3119 0_0402_5%@

1 2

R3116 0_0402_5%@

1 2

R3103 0_0402_5%@

1 2

R942 0_0402_5%@

1 2

R3117 0_0402_5%@

1 2

R3114 0_0402_5%@

USB30_RX_R_N1

USB30_RX_R_P1

USB30_TX_R_P1

D12

EMC@

9

10

8

9

7

7

6

6

AZ1045-04F_DFN2510P10E-10-9

USB20_P3_R

USB20_N3_R

USB30_RX_R_N3

1

1

2

2

4

4

5

5

3

3

8

+USB_VCCA

USB30_RX_R_N1

USB30_RX_R_P1

USB30_TX_R_N1USB30_TX_R_N1

USB30_TX_R_P1

1 2

C2060

1 2

C2059

JUSB3

9

StdA_SSTX+

1

VBUS

8

StdA_SSTX-

3

D+

7

GND_DRAIN

2

D-

6

StdA_SSRX+

4

GND_1

5

StdA_SSRX-

ALLTO_C190AG-10939-L

1U_0402_10V6K@

1U_0402_10V6K@

ME@

10

GND_2

11

GND_3

12

GND_4

13

GND_5

09 / 0 5 Upda te USBCon n . P/ N DC021 60 90 11 w ei

Close to ConnectorFOR ESD

+USB_VCCA

3

2

1

D43
AZC199-02S.R7G_SOT23-3

EMC@

1

D34

1

EMC_NS@

2

2

AZ5725-01F.R7GR_DF N1006P2X2

USB30_RX_R_N3

USB30_RX_R_P3

USB30_TX_R_P3 USB30_TX_R_P3

D45

EMC@

9

10

8

9

7

7

6

6

AZ1045-04F_DFN2510P10E-10-9

1

1

2

2

4

4

5

5

3

3

8

USB30_RX_R_N3

USB30_RX_R_P3

USB30_TX_R_N3USB30_TX_R_N3

Titl e

Titl e

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROP RIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROP RIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROP RIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT O F LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT O F LC FUTURE CENTER.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT O F LC FUTURE CENTER.

C

2015/08/20

2015/08/20

2015/08/20

LC Future Cente r Secret Data

LC Future Cente r Secret Data

LC Future Cente r Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

D

2016/08/20

2016/08/20

2016/08/20

Titl e

USB3.0 PORT (LEFT)

USB3.0 PORT (LEFT)

USB3.0 PORT (LEFT)

Size Document Number Re v

Size Document Number Re v

Size Document Number Re v

C

C

C

Date: Sheet of

Date: Sheet of

Date: Sheet of

DG421

DG421

DG421

Sunday, J anuary 22, 2017

Sunday, J anuary 22, 2017

Sunday, J anuary 22, 2017

41 60

41 60

E

41 60

1.0

1.0

1.0

A

B

C

D

E

F

G

H

SATA HDD Conn.

1 1

+5VS_HDD

SATA_PTX_DRX_P09

1

C74
33P_0201_50V8-J

RF@

2

1

C76
33P_0201_50V8-J

RF@

2

1

C75

0.1u_0201_10V6K

2

1

C77
10U_0805_10V6K

2

1

C78
10U_0805_10V6K

@

2

SATA_PTX_DRX_N09

SATA_PRX_DTX_N09
SATA_PRX_DTX_P09

For EMC

2 2

+5VS +5V_ODD

Need Short

J4

@

2

112

JUMP_43X79

1

1

CD@

2

2

C85

10U_0603_10V6K

0.1u_0201_10V6K

C86

SATA_PTX_DRX_P0
SATA_PTX_DRX_N0

SATA_PRX_DTX_P0

1 2

C66 0.01U_0201_10V6K

1 2

C67 0.01U_0201_10V6K

1 2

C68 0.01U_0201_10V6K

1 2

C69 0.01U_0201_10V6K

+5VS +5VS_HDD

Need short

J3

JUMP_43X79

112

SATA_PTX_C_DRX_P0
SATA_PTX_C_DRX_N0

SATA_PRX_C_DTX_N0SATA_PRX_DTX_N0
SATA_PRX_C_DTX_P0

2

@

JHDD1

10

10

9

9

8

8

7

7

GND2

6

6

5

5

4

4

3

3

GND1

2

2

1

1

ELCO_006809610010846

ME@

12

11

FOR 14"

SATA ODD Conn.

JODD1

3 3

4 4

SATA_PTX_DRX_P19
SATA_PTX_DRX_N19

SATA_PRX_DTX_N19

SATA_PRX_DTX_P19

A

SATA_PTX_DRX_N1

SATA_PRX_DTX_N1 SATA_PRX_C_DTX_N1_14
SATA_PRX_DTX_P1

1 2

C70 0.01U_0201_10V6K14@

1 2

C71 0.01U_0201_10V6K14@

1 2

C72 0.01U_0201_10V6K14@

1 2

C73 0.01U_0201_10V6K14@

B

SATA_PTX_C_DRX_P1_14SATA_PTX_DRX_P1
SATA_PTX_C_DRX_N1_14

SATA_PRX_C_DTX_P1_14

+5V_ODD

C

1
2
3
4
5
6
7

8

9
10
11
12
13

ME@

GND_1
RX+
RX­GND_2
TX­TX+
GND_3

DP
+5V_1
+5V_2
MD
GND_4
GND_5

SUYIN_127382FB013S255ZL

14

GND1

15

GND2

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DR AWING IS THE PROPRIETARY PROPERTY OF LC FUT URE CENTER. AND CONTAINS CONFIDENT IAL

THIS SHEET OF ENGINEERING DR AWING IS THE PROPRIETARY PROPERTY OF LC FUT URE CENTER. AND CONTAINS CONFIDENT IAL

THIS SHEET OF ENGINEERING DR AWING IS THE PROPRIETARY PROPERTY OF LC FUT URE CENTER. AND CONTAINS CONFIDENT IAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUT HORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CON TAINS

DEPARTMENT EXCEPT AS AUT HORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CON TAINS

DEPARTMENT EXCEPT AS AUT HORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CON TAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF LC FUTURE CEN TER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF LC FUTURE CEN TER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF LC FUTURE CEN TER.

D

2015/08/20

2015/08/20

2015/08/20

SATA_PTX_DRX_P1
SATA_PTX_DRX_N1

SATA_PRX_DTX_N1
SATA_PRX_DTX_P1

LC Future Center Secret Data

LC Future Center Secret Data

LC Future Center Secret Data

Deciphered D ate

Deciphered D ate

Deciphered D ate

E

C79 0.01U_0201_10V6K15@
C80 0.01U_0201_10V6K15@

C81 0.01U_0201_10V6K15@
C82 0.01U_0201_10V6K15@

1 2
1 2

1 2
1 2

F

SATA_PTX_C_DRX_P1_15
SATA_PTX_C_DRX_N1_15

SATA_PRX_C_DTX_N1_15
SATA_PRX_C_DTX_P1_15

+5V_ODD

8/ 1 6 Up date Conn . P/ N SP01 00 1YV00 w ei

Titl e

Titl e

Titl e

2016/08/20

2016/08/20

2016/08/20

HDD/ODD CONN

HDD/ODD CONN

HDD/ODD CONN

Size Document Number Re v

Size Document Number Re v

Size Document Number Re v

Custom

Custom

Custom

Date : Sheet o f

Date : Sheet o f

Date : Sheet o f

G

FOR 15" 17''

SATA ODD FFC Conn

JODD2

1

ME@

1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

9

GND1

10

GND2

HIGHS_FC5AF081-2931H

DG421

DG421

Sunday, Janu ary 22, 2017

Sunday, Janu ary 22, 2017

Sunday, Janu ary 22, 2017

DG421

42 60

42 60

42 60

H

1.0

1.0

1.0

5

4

3

2

1

D D

USB30_TX_N29
USB30_TX_P29

USB30_RX_N29
USB30_RX_P29

C C

USB30_RX_N2

C2068 0.1U_0201_6.3V6-K

USB30_RX_P2

C2067 0.1U_0201_6.3V6-K

USB30_TX_N2

C2065 0.1U_0201_6.3V6-K

USB30_TX_P2

C2066 0.1U_0201_6.3V6-K

+3V_MUX +3V_MUX

R3139

B B

A A

10K_0402_5%

1 2

M1 M0

R3144
10K_0402_5%@

1 2

+3V_MUX

R3146
10K_0402_5%@

1 2

VBUS_EN

R3141
10K_0402_5%

1 2

+3V_MUX

PH at CPU side 09/ 06 wei

R3147
10K_0402_5%@

1 2

TYPE_C_OCP#

R3140
10K_0402_5%@

1 2

1 2
1 2

1 2
1 2

USB30_TX_N2
USB30_TX_P2

USB30_RX_N2
USB30_RX_P2

+3VALW

R133 0_0402_ 5%@

+3VS

R134 0_0402_ 5%@

TYPE_C_OCP#
VBUS_EN

VMON

USB30_RX_N2_M
USB30_RX_P2_M

USB30_TX_N2_M
USB30_TX_P2_M

6.2K_0402_1%

Rp co nfiguration

Rp:1.5A (no w)

R3142
10K_0402_5%@

1 2

R4674
10K_0402_5%

1 2

For C_VBUS
power switch enable pin

Power switch enable pin

For C_VBUS
power s witch OCP pin

Power switch OCP pin

5

1 2

1 2

M1
M0

R3150

Rp:900 mA

Rp:1.5 A

Rp:3.0 A

High Active

U26

16
15

17

4
5

6
7

23
21
22

18

1 2

M1 M0

1

1 1

High Active

+3V_MUX +5V_MUX

OCP_DET
VBUS_EN

VMON

SSRX_1P/2N
SSRX_1N/2P

10Gbps 2:1 MUX

SSTX_1P/2N
SSTX_1N/2P

NC
RP_SEL_M1
RP_SEL_M0

REXT

10

0

R3146 mountLow Active

R3141 mount

+5VALW

Realtek

RTS5449

RTS5449-GR_QFN24_4X4

R3144/R3142 mount

R3139/R3143 mount

R3139/R3142 mount

Note

Note

R3147 mountLow Active

R3140 mount

+5VS

C_TX2_1P/2N
C_TX2_1N/2P

C_RX2_1P/2N
C_RX2_1N/2P

C_TX1_1P/2N
C_TX1_1N/2P

C_RX1_1P/2N
C_RX1_1N/2P

VCON_IN

LDO_3V3

Note

E-PAD

1 2

R173 0_0402_ 5%@

1 2

R174 0_0402_ 5%@

2

CC1271
220P_0201_25V7-K

1

12

CC1

14

CC2

MUX_TX2_N

11

C2076 0.1U_0201_6.3V6-K

MUX_TX2_P

10

C2075 0.1U_0201_6.3V6-K

24
1

MUX_TX1_N

8

C2073 0.1U_0201_6.3V6-K

MUX_TX1_P

9

C2074 0.1U_0201_6.3V6-K

2
3

13

19

5V_IN

20

25

4

1

CC1273

2

1 2
1 2

1 2
1 2

+3V_MUX

4.7U_0402_6.3V6M

2

1

Close Pin 19

CC1272

220P_0201_25V7-K

CC1

A5

CC2

B5

C_TX2_N

B3

C_TX2_P

B2

C_RX2_N

A10

C_RX2_P

A11

C_TX1_N

A3

C_TX1_P

A2

C_RX1_N

B10

C_RX1_P

C2063

2

1

0.1u_0201_10V6K

Close Pin 13

2

C2077

1

B11

10U_0805_10V6K

@

1 2

R943 0_0402_ 5%

L23

112

4

4

EXC24CH900U_4P

@

1 2

R91 0_0402_5%

@

R944 0_0402_ 5%

L24

334

2

2

EXC24CH900U_4P

@

R3107 0_0402_5%

@

R100 0_0402_ 5%

L25

334

2

2

EXC24CH900U_4P

@

R101 0_0402_ 5%

+5V_MUX

2

C2064

1

0.1u_0201_10V6K

USB20_P29

USB20_N29

C_TX2_N

C_TX2_P C_TX2_ P_C

C_RX2_P

C_RX2_N

U27

@

1

6

OUT

+5VALW VBUS_P0

1 2

Iset =6800 / 3.3k=2.0 6A

11/ 16 SIT Rese rve Powe r switch for OPC# flip issu e we i

1.5A

+5VALW VBUS_P0

47U_0805_6.3V6-M

1

1

+

C213

@

2

2

VBUS_EN TYPE_C_OCP#

VBUS_P0

12

R3155
200K_0402_1%

VMON

R3149
10K_0402_1%

1 2

EMC@

EMC@

EMC@

12

1

12

12

1

12

C_DP

2

C_DM

3

3

C_TX2_N_C

4

1

C_RX2_P_C

4

C_RX2_N_C

1

3

IN

2

5

R4183.3K_0402_1% @

VBUS_EN TYPE_C_OCP#

C1333
150U_B2_6.3VM_R35M

A1
B1
C1

D3

VBUS_P0

1

1

2

EMC_NS@

2

AZ5725-01F.R7GR_DFN1006P2X2

Security Classification

Security Classification

Security Classification

GND

ISET

3

4

OCB

EN/ENB

SY6861B1ABC_SOT23-6

U6

VIN1
VIN2
VIN3

ON

GND2B2GND1

A2

C2

D38

1

C918

2

10U_0805_25V6K

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY O F LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY O F LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY O F LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET M AY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET M AY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET M AY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

A3

VOUT1

B3

VOUT2

C3

VOUT3

D1

OC_FLAGB

D2

ISET

GND3

FPF2595UCX_WLCSP12

Rset 52 8 Min 1800 mA Type 2000 mA Max 22 00mA
Rset 46 9 Min 2025 mA Type 2250 mA Max 24 75mA

1

12

12

C919

C922

@

2

4.7U_0805_25V6-K

0.47U_0402_25V6-K

1 2

R3135 0_0402_5%

C_RX1_N

C_RX1_P

C_TX1_P C_TX1_ P_C

C_TX1_N C_TX1_N_C

L31

4

4

112

EXC24CH900U_4P

1 2

R3137 0_0402_5%

1 2

R3136 0_0402_5%

L32

4

4

112

EXC24CH900U_4P

R3138 0_0402_5%

2015/08/20

2015/08/20

2015/08/20

12

R604
523_0402_1%

12

12

C921

C920

0.47U_0402_25V6-K

0.47U_0402_25V6-K

@

EMC@

3

3

2

@

@

EMC@

3

3

2

@

1 2

LC Future Center Secret Data

LC Future Center Secret Data

LC Future Center Secret Data

2

TYPE_C_OCP# 9

C1334

0.47U_0402_25V6-K

C_RX1_N_C

C_RX1_P_C

C_TX2_P_C

C_TX2_N_C

C_RX1_N_C

C_RX1_P_C

Deciphered Date

Deciphered Date

Deciphered Date

C_RX1_P_C

C_RX1_N_C

C_DM

C_DP

CC2

C_TX2_N_C

C_TX2_P_C

D36

EMC_NS@

9

8

7

6

1

1

10

2

9

2

4

7

4

5

6

5

3

3

8

AZ1045-04F_DFN2510P10E-1 0-9

2016/08/20

2016/08/20

2016/08/20

3A

JP1

24

Power_GND_B12

23

SSRXp1_B11

22

SSRXn1_B10

21

VBUS_B9

20

SBU2_B8

19

Dn2_B7

18

Dp2_B6

17

CC2_B5

16

VBUS_B4

15

SSTXn2_B3

14

SSTXp2_B2

13

GND_B1

09/ 02 Upd ate Type -C Conn. DC0216 082 91 wei

CC1
CC2

312

D47

AZC199-02S.R7G_SOT23-3

C_TX2_P_C

C_TX2_N_C

C_RX1_N_C

C_RX1_P_C

Custom

Custom

Custom

28

ME@

GND525GND626GND727GND8

32

EMC_NS@

C_TX1_P_C

C_TX1_N_C

C_RX2_P_C

For ESD

Title

Title

Title

3D Camera

3D Camera

3D Camera

Size

Size

Size

Document Number Rev

Document Number Rev

Document Number Rev

Sunday, Janua ry 22, 2017

Sunday, Janua ry 22, 2017

Sunday, Janua ry 22, 2017

Date: Sheet of

Date: Sheet of

Date: Sheet of

1

GND_A1

2

SSTXp1_A2

3

SSTXn1_A3

4

VBUS_A4

5

CC1_A5

6

Dp1_A6

7

Dn1_A7

8

SBU1_A8

9

VBUS_A9

10

SSRXn2_A10

11

SSRXp2_A11

12

GND_A12

GND929GND1030GND1131GND12

HIGHS_UB11246-15A0C-1H

C_DP
C_DM

312

D48

D20

EMC_NS@

9

10

8

9

7

7

6

6

AZ1045-04F_DFN2510P10E-1 0-9

DG421

DG421

DG421

1

VBUS_P0

C_TX1_P_C

C_TX1_N_C

CC1

C_DP

C_DM

C_RX2_N_C

C_RX2_P_C

EMC_NS@

AZC199-02S.R7G_SOT23-3

C_TX1_P_C

1

1

C_TX1_N_C

2

2

C_RX2_N_CC_RX2_N_C

4

4

C_RX2_P_C

5

5

3

3

8

43 60

43 60

43 60

1.0

1.0

1.0

5

For ESD

PLT_RST#

1

CE1
220P_0201_25V7-K

EMC@

2

D D

WRST#20

+3VL_EC

1 2

DE1

RB751V-40_SOD323-2

RE8

C C

+3VL_EC

+3VS

B B

+3VL

1 2

RE35 10K_0402_5%@

1 2

RE36 10K_0402_5%@

RE38 100K_0402_5%

1 2

RE40 10K_0402_5%

1 2

100K_0402_5%

RPE2

2 3
1 4

2.2K_0404_4P2R_5%

RPE3

1 4
2 3

2.2K_0404_4P2R_5%

EC_ON

H_PECI4

EC_VR_ON59

12

@

PM_SLP_S3#

For EMI

CLK_PCI_EC

KBRST#7

SERIRQ7,32
LPC_FRAME#7,32
LPC_AD37,32
LPC_AD27,32
LPC_AD17,32
LPC_AD07,32
CLK_PCI_EC7

1

CE12
1U_0402_6.3V6K

2

KSI[0..7]45

KSO[0..17]45

EC_SMB_DA1
EC_SMB_CK1

EC_SMB_CK2
EC_SMB_DA2

12

RE58 0_0402_5%@

1 2

RE24 43_0402_5%

+3VL

1 2

DE2

RB751V-40_SOD323-2@

ON/OFF

BKOFF#

LID_SW#

BKOFF#

1 2

RE2 33_0402_5%

EMC@

CE2

22P_0402_50V8-J

EMC@

RE56 0_0402_5%@
RE59 0_0402_5%@

1 2

RE60 0_0402_5%@

1 2

RE61 0_0402_5%@

1 2

RE62 0_0402_5%@

1 2

RE63 0_0402_5%@

1 2

RE64 0_0402_5%@

EC_SMI#9
EC_RX40
EC_TX40

PLT_RST#11,20,32,37,40

EC_SCI#4

KSI[0..7]

KSO[0..17]

EC_SMB_CK1
EC_SMB_DA1

KSI7
KSI6
WRST#

PAD @
PAD @
PAD @
PAD @
PAD @

PAD @
PAD @
PAD @

For factory EC flash

ON/OFF45

EC_SMB_CK152,53
EC_SMB_DA152,53

LAN_PWR_ON#37

EC_SMB_CK27,20,39
EC_SMB_DA27,20,39

1 2

RE27 0_0402_5%@

1 2

RE272 0_0402_5%@

USB_ON#41

DPWROK_EC11

EC_RSMRST#11

PCIE_WAKE#11,37,40

AC_PRESENT11

1

2

12
12

CLK_PCI_EC

WRST#

EC_RX
EC_TX
PLT_RST#

EC_RTCRST#_ON

1
1
1
1
1

1
1
1

ON/OFF

EC_SMB_CK1
EC_SMB_DA1
PECI_EC

EC_SMB_CK2
EC_SMB_DA2

USB_ON#

PCIE_WAKE#

IT1
IT2
IT3
IT4
IT5

IT6
IT7
IT8

for EC version update to EX, manual modify PN to FX

+3VL

GPG2

A A

GPG2

GPG2

when mirror, GPG2 pull high
when no mir ror, GPG2 pull low

12

RE43 10K_0402_5%@

12

RE44 10K_0402_5%

12

RE46 10K_0402_5%@

+3VL_EC

EC_SPI_CS0#

RE45 0_0402_5%@

EC_SPI_SI

RE47 0_0402_5%@

EC_SPI_SO

RE48 0_0402_5%@

EC_SPI_CLK

RE49 0_0402_5%@

5

4

Close EC

1 2

0.1u_0201_10V6K

1 2

UE1

4

KBRST#/GPB6

5

SERIRQ/GPM6

6

LFRAME#/GPM5

7

LAD3/GPM3

8

LAD2/GPM2

9

LAD1/GPM1

10

LAD0/GPM0

13

LPCCLK/GPM4

14

WRST#

15

ECSMI#/GPD4

16

PWUREQ#/BBO/ SMCLK2ALT/GPC7

17

LPCPD#/GPE6

22

LPCRST#/GPD2

23

ECSCI#/GPD3

126

GA20/GPB5

58

KSI0/STB#

59

KSI1/AFD#

60

KSI2/INIT#

61

KSI3/SLIN#

62

KSI4

63

KSI5

64

KSI6

65

KSI7

36

KSO0/PD0

37

KSO1/PD1

38

KSO2/PD2

39

KSO3/PD3

40

KSO4/PD4

41

KSO5/PD5

42

KSO6/PD6

43

KSO7/PD7

44

KSO8/ACK#

45

KSO9/BUSY

46

KSO10/PE

51

KSO11/ERR#

52

KSO12/SLCT

53

KSO13

54

KSO14

55

KSO15

56

KSO16/SMOSI/GPC3

57

KSO17/SMISO/GPC5

110

PWRSW#

111

XLP_OUT

115

SMCLK1/GPC1

116

SMDAT1/GPC2

117

SMCLK2/PECI/GPF6

118

SMDAT2/PECIRQT#/GPF7

94

CRX1/SIN1/SMCLK3/GPH1 /ID1

95

CTX1/SOUT1/GPH2/SMDAT3/ID2

112

VSTBY0

125

GPE4

33

GINT/CTS0#/GPD5

35

RTS1#/GPE5

93

CLKRUN#/GPH0/ID0

2

CK32KE/GPJ7

128

CK32K/GPJ6

IT8586E-AX_LQFP128_14X14

SPI_CS0#

SPI_SI

SPI_SO

SPI_CLK

4

VCOREVCC

CE3

Change RE6 to 0ohm jump

RE6 0_0402_5%@

LPC_FRAME#_EC
LPC_AD3_EC
LPC_AD2_EC
LPC_AD1_EC
LPC_AD0_EC

KSI0
KSI1
KSI2
KSI3
KSI4
KSI5
KSI6
KSI7
KSO0
KSO1
KSO2
KSO3
KSO4
KSO5
KSO6
KSO7
KSO8
KSO9
KSO10
KSO11
KSO12
KSO13
KSO14
KSO15
KSO16
KSO17

12

12

12

12

+3VS

11

12

3

VCC

VBAT

VCORE

IT8586E/AX
LQFP-128L

Int. K/B
Matrix

EXTERNAL SERIAL FLASH

SM Bus

WAKE UP

GPIO

Clock

1

SPI_CS0# 7

SPI_SI 7

SPI_SO 7

SPI_CLK 7

1 2

RE1 0_0603_5%

1 2

RE3 0_0603_5%@

+3VL_EC_R

74

50

92

114

121

127

AVCC

VSTBY2

VSTBY3

VSTBY4

VSTBY126VSTBY5

VSTBY(PLL)

PWM

LPC

SPI Flash RO M

VSS1

VSS2

VSS4

VSS5

VSS349VSS6

27

91

113

122

NOVO#

1

2

3

+3VL

+3VALW

+3VL_EC

All capacitors close to EC

1

1

CD@

2

2

0.1u_0201_10V6K

0.1u_0201_10V6K

CE6

CE7

minimum t race width 12 mil

PWM0/GPA0
PWM1/GPA1
PWM2/GPA2
PWM3/GPA3
PWM4/GPA4
PWM5/GPA5

PWM6/SSCK/GPA 6

PWM7/RIG1#/GP A7

TMRI0/GPC4
TMRI1/GPC6

ADC0/GPI0
ADC1/GPI1
ADC2/GPI2

ADC

ADC3/GPI3
ADC4/GPI4

ADC5/DCD1#/GPI5

ADC6/DSR1#/GPI6
ADC7/CTS1#/GPI7

DAC2/TACH0B/GPJ2
DAC3/TACH1B/GPJ3

DAC

DAC4/DCD0#/GPJ4

DAC5/RIG0#/GPJ5

PS2CLK0/TMB0/CEC/GPF0

PS2DAT0/TMB1/GPF1

PS2

UART

GPIO

DTR1#/SBUSY/GPG1/ID7

AVSS

75

EC_AGND

CE48

0.01U_0201_10V6K

EMC_NS@

GPF2

GPF3
PS2CLK2/GPF4
PS2DAT2/GPF5

GPH3/ID3
GPH4/ID4
GPH5/ID5
GPH6/ID6

AC_IN#

LID_SW#

EGAD/GPE1
EGCS#/GPE2
EGCLK/GPE3

GPJ1
SSCE0#/GPG2
SSCE1#/GPG0

DSR0#/GPG6

CRX0/GPC0

CTX0/TMA0/GPB2

RI1#/GPD0
RI2#/GPD1

TACH2/GPJ0

TACH1A/TMA1/GPD7

TACH0A/GPD6

L80HLAT/BAO/GPE0

L80LLAT/GPE7

PECI_EC

BATT_TEMP

ACIN#

ON/OFF

NC1
NC2
NC3
NC4

3

2

+3VL_EC+3VL_EC

1 2

LE1 0_0603_5%@

1

2

CE10

1 2

TE1 @

1 2

1 2

0_0402_5%

2N7002KW_SOT323-3

@

1

2

CE11

0.1u_0201_10V6K

0.1u_0201_10V6K

PWR_LED# 45
BATT_CHG_LED# 45
BATT_LOW_LED# 45

EC_VCCST_PWRGD 11
SYS_PWROK 11
EC_FAN_PWM 39
BEEP# 30

RE54

SUSP# 46

NTC_V1 39

NTC_V2 39
BATT_TEMP 52,53

PM_SLP_SUS# 11

CPU_VR_READY 59

ADP_I 53

RE2760_0402_5% @

SUSWARN# 11

SUSACK# 11

ENBKL 33

1 2

PBTN_OUT# 11
EC_SMB_CK3 55
EC_SMB_DA3 55

EC_LID_OUT# 45

CAPS_LED# 45
PCH_PWR_EN 46,55
EC_BKL_EN 45
PCH_PWROK 11

LID_SW# 45

VDDQ_PGOOD 55
EC_VPP_PWREN 55

EC_MUTE# 30

EC_CMOS_ON# 33

BKOFF# 33

PM_SLP_S3# 11,13
PM_SLP_S4# 11
NOVO# 45

EC_TS_ON 33

EC_FAN_SPEED 39

NUM_LED# 45

@

RE267

100_0402_5%

QE1

2

G

+3VS

2015/08/20

2015/08/20

2015/08/20

1 2

@

0_0402_5%

+3VL_EC

PSYS 53,59

RE570_0402_5% @

1

SYSON

12

RE55 0_0402_5%@

Reserve for VGA_AC_DET

12

1

CE14
47P_0201_25V8-J

EMC_NS@

2

13

D

S

ACIN#11

1

CE19

0.1u_0201_10V6K

2

LC Future Cente r Secret Data

LC Future Cente r Secret Data

LC Future Cente r Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

1 2

LE2 0_0603_5%@

12

RE65
100K_0402_5%

TE2 @

VGA_AC_DET

ACIN#

2

CE4

0.1u_0201_10V6K

EC_VCCIO_EN

H_PROCHOT# 4, 55

+3VL

1 2

13

D

S

2N7002KW_SOT323-3

@

@

1

1

2

2

0.1u_0201_10V6K

0.1u_0201_10V6K

CE8

CE9

PWR_LED#

24
25
28

EC_VCCST_PWRGD

29
30

EC_FAN_PWM

31
32

EC_VCCST_EN_R EC_VCCST_EN

34

LAN_WAKE#

120
124

SUSP#

66
67

BATT_TEMP

68
69
70
71

B+_Track

72
73

78
79

H_PROCHOT#_EC

80
81

EC_ON_GPIO

85
86

EC_SMB_CK3

87

EC_SMB_DA3

88
89
90

96
97
98
99

101
102
103
105

108
109

82
83
84

77
100
106
104
107
119
123
18
21
76
48
47
19
20

1

EC_LID_OUT#

EC_SPI_CS0#
EC_SPI_SI
EC_SPI_SO
EC_SPI_CLK

ACIN#
LID_SW#

EC_VPP_PWREN

GPG2

SYSON_R

RE271 0_0402_5%@

BKOFF#

EC_FAN_SPEED

1 2

CE15 47P_0201_25V8-JEMC_NS@

1 2

CE16 100P_0201_25V8JEMC_NS@

1 2

CE17 100P_0201_25V8JEMC_NS@

1 2

CE18 1U_0402_6.3V6K@

Issued Date

Issued Date

Issued Date

RE34

H_PROCHOT#_EC

VR_HOT#53,59

Security Classification

Security Classification

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROP RIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROP RIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROP RIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT O F LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT O F LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT O F LC FUTURE CENTER.

1

2

EC_AGND

EC_AGND

EC_VCCST_EN 13

EC_ON 39,54,55

ME_FLASH 8
SYSON 55

EC_VCCIO_EN 13

RE42
100K_0402_5%

1 2

RE262 0_0402_5%@

QE2

2

G

2016/08/20

2016/08/20

2016/08/20

+3VL_EC_R

1

2

VGA_AC_DET 20

EC_RTCRST#_ON

1

V20B+

12

RE261
470K_0402_5%

@

B+_Track

RE273

1 2

1 2

1 2

1 2

LAN_WAKE# 37,40

+3VL_EC+3VALW

12

12

@

12

RE274
0_0402_5%@

R260
47K_0402_5%

@

+3VS

+5VALW

+3VL_EC

CE5
1000P_0201_50V7-K

EC_FAN_SPEED

EC_FAN_PWM

LPC_FRAME#

ENBKL

CPU_VR_READY

EC_CMOS_ON#

EC_LID_OUT#

+3VL_EC

12

RE5
10K_0402_5%

LAN_WAKE#

1 2

RE10 10K_0402_5%

1 2

RE11 10K_0402_5%@

1 2

RE7 10K_0402_5%@

1 2

RE9 100K_0402_5%@

1 2

RE270 10K_04 02_5%

1 2

RE275 10K_04 02_5%@

1 2

RE277 10K_04 02_5%@

For PMIC

0_0402_5%

EC_SMB_DA3
EC_SMB_CK3

USB_ON#

SUSP#

SUSP#

SYSON_R

EC_VCCST_EN

EC_VCCIO_EN

RPE4

1 4
2 3

2.2K_0404_4P2R_5%

1 2

RE15 100K_0402_5%

1 2

RE18 100K_0402_5%@

1 2

RE19 100K_0402_5%

1 2

RE21 100K_0402_5%

1 2

RE269 100K_0 402_5%@

1 2

RE268 100K_0 402_5%@

Add to fix Reset&PWRGD te st fail issue

VDDQ_PGOOD

CE51 0.01U_0201_10V6K

PM_SLP_S4#

CE50 1000P_0201_50V7-KEMC_NS@

PM_SLP_S3#

CE21 1000P_0201_50V7-KEMC_NS@

SYSON

CE13 1000P_0201_50V7-KEMC_NS@

EMC Request

DE3

1 2

RB751V-40_SOD323-2

12

RE50

@

ACIN 53

Sunday, J anuary 22, 2017

Sunday, J anuary 22, 2017

Sunday, J anuary 22, 2017

@

EC_RTC_RST# 10

13

D

QE3

2

G

S

2N7002KW_SOT323-3@

DG421

DG421

DG421

1

44 60

44 60

44 60

PM_SLP_S4#

100K_0402_5%

Titl e

Titl e

Titl e

EC ITE8586LQFP

EC ITE8586LQFP

EC ITE8586LQFP

Size Document Number Re v

Size Document Number Re v

Size Document Number Re v

C

C

C

Date: Sheet of

Date: Sheet of

Date: Sheet of

1.0

1.0

1.0

5

ON/OFF switch Novo butto n

100K_0402_5%

NOVO#

NOVO#44

ON/OFF

D D

1 2

J5

SHORT PADS

1 2

J6

SHORT PADS

+3VALW

+3VL

R83

R82

100K_0402_5%

@

1 2

R261 0_0402_5%@

1 2

1 2

2

D15

1 2

R85 0_0402_5%@

1 2

R119 0_0402_5%@

@

@

3

BAT54CW_SOT323-3

+3VALW

R111
100K_0402_5%

@

1 2

ON/OFFON/OFFBTN#

4

NOVO_BTN#

1

@

+3VL

R114
100K_0402_5%

1 2

ON/OFF 44

8/ 1 6 Del Power Butt on w ei

ON/OFFBTN#

1

D25

1

2

EMC@

2

AZ5123-01F.R7GR_DFN1006P 2X2

3

2

SW2

4

5

NTC325-EKJ-A160T_3P

123

NOVO_BTN#

1

D24

1

AZ5123-01F.R7GR_DFN1006P2X2

EMC@

2

2

1

8/ 3 1 Upd ate th e P/ N SN100 008 W00 w ei

LID switch

1

OUTPUT

C1104
100P_0201_25V8J

2

LID_SW#

3

LID_SW# 44

U14

1

GND

1

C1105

0.01U_0201_10V6K

+VCC_LID

2

1 2

R264

@

+3VL

0_0402_5%

2

VCC

AH9247-W-7_SC59-3

K/B Connector

EMC_NS@

PWR_CAPS_LED

CAPS_LED#

NUM_LED#_R

C C

1 2

C133 100P_0201_25V8J

EMC@

1 2

C117 100P_0201_25V8J

1 2

C118 100P_0201_25V8J

EMC_15@

CAPS_LED# NUM_LED#_R

1

D22

1

AZ5123-01F.R7GR_DFN1006P2X2

EMC@

2

2

1

1

2

2

D23
AZ5123-01F.R7GR_DFN1006P2X2

EMC_15@

Finger Print Connector

+3VS

R3120 0_0402_5%@

USB20_N4_CONN

B B

A A

USB20_P4_CONN

312

BATT_LOW_LED#44

BATT_CHG_LED#44

BATT_LOW_LED#

1

1

2

2

BATT_CHG_LED#

1

1

2

2

PWR_LED#44

PWR_LED#

PWR_LED Change to M/B (310 ->320) 08/ 17

5

AZC199-02S.R7G_SOT23-3

KSI[0..7]

KSO[0..17]

For EMC

FP_PWR

1 2

1

2

0.1u_0201_10V6K

C2061

DT2

FP@

9/ 7 Add for ESD wei

1 2

LED2

L-C192JFCT-LCFC_SUPER_AMBER

D18
AZ5123-01F.R7GR_DFN1006P2X2

EMC_NS@

1 2

LED3

L-C192WDT-LCFC_WHITE

D19
AZ5725-01F.R7GR_DFN1006P2X2

EMC_NS@

1 2

LED4

L-C192WDT-LCFC

KSI[0..7] 44

KSO[0..17] 44

8/ 2 3 PWR LED funct ion unde r check

PWR_LED#

1

D46

1

AZ5123-01F.R7GR_DFN1006P2X2

EMC@

2

2

USB20_N4

R3122 0_0402_5%@

USB20_P4 USB20_P4_CONN

USB20_N49
USB20_P49

FP@

R3121 0_0402_5%@

1 2

R143 470_0402_5%

1 2

R144 1.5K_0402_5%

1 2

R4672 1.5K_0402_5%

PWR_LED#

1 2

R285 0_0402_5%@

1 2

KSO17
KSO16

+3VALW

USB20_N4_CONN

R279 0_0402_5%15@

1 2

R281 0_0402_5%15@

1 2

R280 0_0402_5%15@

1 2

R275 0_0402_5%@

1 2

R84

200_0402_1%

To be confir m Pin define

JFP1

1
2
3
4
5
6
7
8

9

10

HIGHS_FC5AF081-2931H

1
2
3
4
5
6
7
8

GND1
GND2

1 2
1 2

NUM_LED#44

CAPS_LED#44

8/ 2 3 Upd ate FG Conn. P/ N SP0100 1YV00 w ei

+3VALW

+5VALW

+5VALW

4

1

D16

1

AZ5725-01F.R7GR_DFN1006P2X2

EMC_NS@

2

2

PWR_LED#

ON/OFFBTN#

NUM_LED#_R
KSO17_R
KSO16_R

KSI1
KSI7
KSI6
KSO9
KSI4
KSI5
KSO0
KSI2
KSI3
KSO5
KSO1
KSI0
KSO2
KSO4
KSO7
KSO8
KSO6
KSO3
KSO12
KSO13
KSO14
KSO11
KSO10
KSO15

CAPS_LED#_RCAPS_LED#

PWR_CAPS_LED

JKB1

32

GND1

32

31

GND2

31

30

30

29

29

28

28

27

27

26

26

25

25

24

24

23

23

22

22

21

21

20

20

19

19

18

18

17

17

16

16

15

15

14

14

13

13

12

12

11

11

10

10

9

9

8

8

7

7

6

6

5

5

4

4

3

3

2

2

1

1

CVILU_CF32321D0RONH

ME@

3

KB Back light Con nector

33
34

EC_BKL_EN44

EC_BKL_EN

0.1u_0201_10V6K

C1109

KBL@

TP/B Connector

R141 0_0402_5%@

TP_I2C_SCL0
TP_I2C_SDA0

312

For EMC

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTO DY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTO DY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTO DY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

AZC199-02S.R7G_SOT23-3

2015/08/20

2015/08/20

2015/08/20

+5VALW

12

R265

10K_0402_5%

KBL@

13

D

2

G

S

1

2

TP_PWR+3VS

1 2

1

2

C114

0.1u_0201_10V6K

DT1

EMC_NS@

LC Future Center Secret Data

LC Future Center Secret Data

LC Future Center Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

+5VS

R266

1 2

100K_0402_5%

KBL@

Q32
2N7002KW_SOT323-3

KBL@

EC_LID_OUT#44
PCH_TP_INT#8

TP_I2C_SDA08
TP_I2C_SCL08

S

G

2

1

2

C1106

KBL@

+VCC_KB_LED

1

2

0.1u_0201_10V6K

+VCC_KB_LED

1

C1107

0.1u_0201_10V6K

KBL@

2

C1110

@

1

2

Q31
LP2301ALT1G_SOT23-3

KBL@

D

13

10U_0603_6.3V6M

C1108

0.01U_0201_10V6K

KBL@

8/ 3 1 Upd ate KBL Conn. P/ N SP011 608 241 we i

1 2

R4675 0_0402_5%@

1 2

R4676 0_0402_5%@

TP_PWR

1

1

2

2

EMC_NS@

EMC_NS@

C116

C115

100P_0201_25V8J

100P_0201_25V8J

11/ 16 SIT change to 6Pin I2 C inter face T/ P w ei

Title

Title

2016/08/20

2016/08/20

2016/08/20

Title

KBD/PWR/IO/LED/TP Conn.

KBD/PWR/IO/LED/TP Conn.

KBD/PWR/IO/LED/TP Conn.

Size Document Number Re v

Size Document Number Re v

Size Document Number Re v

Custom

Custom

Custom

Date: Sheet o f

Date: Sheet o f

Date: Sheet o f

To be confir m Pin define

CVILU_CF50041D0RN-10-NH

EC_LID_OUT#_R
TP_INT#

TP_I2C_SDA0
TP_I2C_SCL0

DG421

DG421

DG421

Sunday, January 22, 2017

Sunday, January 22, 2017

Sunday, January 22, 2017

1

JKBL1

1

1

2

2

3

3

4

4

ME@

6

GND2

5

GND1

JTP1

ME@

1

1

2

2

GND1

3

3

4

4

GND2

5

5

6

6

ELCO_04-6809-606-110-846-+

45 60

45 60

45 60

7

8

1.0

1.0

1.0

A

B

C

D

E

Load Switch
+5VALW To +5VS
+3VALW To +3VS

1 2

R64 0_0402_5%@

1 1

2 2

R27 0_0402_5%@1 2

SUSP# 5VSON

1

C180

1U_0402_6.3V6K

PCH_PWR_EN#_R PCH_PW R_EN#

PCH_PWR_EN44,55

2

R158 100K_0402_5%@1 2

1

1U_0402_6.3V6K

2

PCH_PWR_EN

100K_0402_5%

3VSON

R162

+5VALW

1

C177
1U_0402_6.3V6K

2

+3VALW

1

C178
1U_0402_6.3V6K

2

@

+5VALW

12

R155
100K_0402_5%

@

13

D

Q30

2

G

S

12

@

2N7002KW_SOT323-3@

+5VALW

22U_0603_6.3V6-M

+3VS, C173 --> 2.74ms
+5VS, C176 --> 2.03ms

VIN 5V and 3.3V (VBIAS=5V), IMAX(per channel )=6A, Rds=16mohm

5VSON

3VSON

Change the main source to SA000067600 (GMT) 7/16

C1103

1

@

2

PCH_PWR_EN#_R

U13

1

IN1_1

2

IN1_2

3

EN1

4

VBIAS

5

EN2

6

IN2_1

7

IN2_2

G5016KD1U_TDFN14_2X3

14

OUT1_2
OUT1_1

CT1

GND

CT2

OUT2_2
OUT2_1

GPAD

+3VALW +3VALW_PCH

12

R87
100K_0402_5%

@

+5VS_LS

13

12

1 2

C176 1000P_0201_50V7-K

11

10

C173 2200P_0402_25V7-K1 2

+3VS_LS

9
8

15

Need short

J7

112

JUMP_43X79

LP2301ALT1G_SOT23-3

S

Q29

G

2

1

2

@

2

D

@

13

C131

0.1u_0201_10V6K

@

Need Short

J12

@

112

JUMP_43X118

J11

@

112

JUMP_43X118

Need Short

Id=3.2 A

1

C130

0.01U_0201_10V6K

@

2

2

2C179

+5VS

1

C174

0.1u_0201_10V6K

@

2

SUSP

1 2

R201 0_0402_5%@

+3VS

1

C175

0.1u_0201_10V6K

@

2

+5VALW

1

C2078

0.1u_0201_10V6K

@

2

+1.8VALW +1.8VS

C201

0.1u_02 01_10V6K

1

2

12

R202

470K_0402_5%@

Q35

S

LP2301ALT1G_SOT23-3

G

2

1

2

1

C2080

0.1u_0201_10V6K

@

2

0.6A

D

13

C202

0.1u_02 01_10V6K

+3VALW

1

2

C203

0.1u_02 01_10V6K

1

2

C204

0.1u_02 01_10V6K

1

2

8/ 2 9 Add +1.8VS Circuit fo r Audio wei

C2079

0.1u_0201_10V6K

@

EMC

C205

0.1u_02 01_10V6K

1

2

3 3

+5VLP +5VALW

12

2

G

Q10

12

R157
100K_0402_5%

@

13

D

S

2N7002KW_SOT323-3

08/29: Need double check enable signal and the resistance

Security Classification

Security Classification

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D
DEPARTMENT EXCEPT A S AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT A S AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT A S AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

R156

100K_0402_5%

SUSP34

SUSP#44

4 4

A

SUSP

Issued Date

Issued Date

Issued Date

+0.6VS

C

12

R159
47_0603_5%

@

13

D

Q11

2

G

S

2N7002KW_SOT323-3

@

SUSP

2015/08/20

2015/08/20

2015/08/20

For DisCharge

LC Future Center Secret Data

LC Future Center Secret Data

LC Future Center Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

+2.5V_DDR

12

R278
200_0402_5%

@

13

D

Q33

S

2N7002KW_SOT323-3

@

D

2

G

2016/08/20

2016/08/20

2016/08/20

SUSP

Titl e

Titl e

Titl e

DC V TO VS INTERFACE

DC V TO VS INTERFACE

DC V TO VS INTERFACE

Size Document Number Re v

Size Document Number Re v

Size Document Number Re v

Custom

Custom

Custom

Date : Sheet o f

Date : Sheet o f

Date : Sheet o f

DG421

DG421

DG421

Sunday, January 22, 2017

Sunday, January 22, 2017

Sunday, January 22, 2017

46 60

46 60

46 60

E

1.0

1.0

1.0

5

D D

AC
MO DE

BATT

MODE

C C

B B

A1

VIN

BATT

B1

V

PU301

V

4

B2

A2

+3VLP

V

B5

V

A4

+3VALW

V

A2

PU904

V

B+

EC

EC_ON

ON/OFF

NOVO

11

PU901
+CPU_CORE

A3

VR_REDY

B4

B3

V

V

V

10

VR_ON

SUSP#,SUSP

3

PCH_PWR_EN#

1

DPWROK_EC

4

PCH_RSMRST #

5

PBTN_OUT#

PM_SLP_S3#
PM_SLP_S4#
PM_SLP_S5#

V

PM_SLP_SUS#

12

PCH_PWR OK

13

SYS_PW ROK

SYSON

2

2

Q25,+3V_PCH

V

3

+3V_PCH

1

V

V

PM_DRAM_PWRGD

V V

PCH

6

H_CPUPWR GD

CPU_PLTRST #

14

V

15

16

CPU

V

V

V

V

NVDD_PWR_EN

(DIS)

7

9

+1.35V
PU501

V

Q31

V

+5VS

Q32

V

+3VS

PU602

V

+1.5VS

PU502

V

Vb

DGPU_PWR_EN

(DIS)

Va

+VGA_CORE

V

PU801

DGPU_PWR OK

+1.5VS_VGA

V

PU601

+1.05VSP_VGA

V

PU702

+3VS_VGA

V

Q27

VV

VGA

V

V V

+0.675V

SUS_VCC P

8

PU701

V

+1.05VS

A A

Titl e

Titl e

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D
DEPARTMENT EXCEPT A S AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT A S AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT A S AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

3

2015/08/20

2015/08/20

2015/08/20

LC Future Center Secret Data

LC Future Center Secret Data

LC Future Center Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

2016/08/20

2016/08/20

2016/08/20

Titl e

Power sequence block

Power sequence block

Power sequence block

Size Document Number Re v

Size Document Number Re v

Size Document Number Re v

Custom

Custom

Custom

Date : Sheet o f

Date : Sheet o f

Date : Sheet o f

DG421

DG421

DG421

Sunday, January 22, 2017

Sunday, January 22, 2017

Sunday, January 22, 2017

47 60

47 60

47 60

1

1.0

1.0

1.0

5

D D

C C

4

3

2

1

B B

A A

Titl e

Titl e

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROP RIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROP RIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROP RIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT O F LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT O F LC FUTURE CENTER.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT O F LC FUTURE CENTER.

3

2015/08/20

2015/08/20

2015/08/20

LC Future Cente r Secret Data

LC Future Cente r Secret Data

LC Future Cente r Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

2016/08/20

2016/08/20

2016/08/20

Titl e

Virtual symbol

Virtual symbol

Virtual symbol

Size Document Number Re v

Size Document Number Re v

Size Document Number Re v

C

C

C

Date: Sheet of

Date: Sheet of

Date: Sheet of

DG421

DG421

DG421

Sunday, J anuary 22, 2017

Sunday, J anuary 22, 2017

Sunday, J anuary 22, 2017

48 60

48 60

1

48 60

1.0

1.0

1.0

5

4

3

2

1

CPU Thermal Holex3 GPU Thermal Holex2

H1
HOLEA

D D

1

pad_c6p0d4p0

DC-IN x2

C C

H17
HOLEA

1

pad_o2p6x2p9d2p6 x2p9n

SH1

ME@

B B

1

1

SPRING_FINGER_6.2X1.64

SH4

ME@

1

1

SPRING_FINGER_6.2X1.64

H2
HOLEA

1

pad_c6p0d4p0

H3
HOLEA

1

pad_c6p0d4p0

H10
HOLEA

pad_ct5p5d2p5

H18
HOLEA

1

PAD_CT7P0D3P0

SH2

ME@

1

1

SPRING_FINGER_6.2X1.64

SH5

ME@

1

1

SPRING_FINGER_6.2X1.64

1

pad_c7p0d3p3

H19
HOLEA

1

PAD_CT7P0D3P0

SH3

1

1

SH6

1

1

H4
HOLEA

1

WLAN Standoff

pad_ct7p0b6p0 d3p3

ME@

SPRING_FINGER_6.2X1.64

ME@

SPRING_FINGER_6.2X1.64

H5
HOLEA

pad_c7p0d3p3

H11
HOLEA

1

1

pad_c3p3d3p3 n

H20
HOLEA

1

USB3.0 Shielding

Close to RJ45 Close to Audio jack

H12
HOLEA

1

pad_ct7p0d3p0

H6
HOLEA

1

CHASSIS1_GND

pad_ct7p0b8p0 d3p0

pad_ct7p0d3p0

SH12

1

1

SPRING_FINGER_6.2X1.64

SH13

1

1

SPRING_FINGER_6.2X1.64

ME@

ME@

H13
HOLEA

1

pad_ct5p0d2p5

H7
HOLEA

1

pad_ct7p0b8p0 d3p0

H15
HOLEA

1

SH7

1

1

SHIELDING_SUL-35A2M_ 9P2X3P3_1P

SH9

1

1

SHIELDING_SUL-35A2M_ 9P2X3P3_1P

H16
HOLEA

1

pad_cb5p5d2p 5

ME@

ME@

DDR4 Shielding

SHIELDING_SUL-35A2M_ 9P2X3P3_1P

PCB Fedical Mark PAD

FD1

FD2

1

1

SH8

ME@

1

1

SHIELDING_SUL-35A2M_ 9P2X3P3_1P

SH10

ME@

1

1

FD4

FD3

1

SH14

1

SHIELDING_SUL-35A2M_ 9P2X3P3_1P

SH11

1

1

SHIELDING_SUL-35A2M_ 9P2X3P3_1P

FD5

1

1

ME@

1

ME@

FD6

1

A A

Titl e

Titl e

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF E NGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC F UTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF E NGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC F UTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF E NGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC F UTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEE T MAY NOT BE TRAN SFERED FROM TH E CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEE T MAY NOT BE TRAN SFERED FROM TH E CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEE T MAY NOT BE TRAN SFERED FROM TH E CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUT HORIZED BY LC FU TURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUT HORIZED BY LC FU TURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUT HORIZED BY LC FU TURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSE D TO ANY THIRD PARTY WITHOUT PRIOR WR ITTEN CONSENT OF LC FUTURE C ENTER.

MAY BE USED BY OR DISCLOSE D TO ANY THIRD PARTY WITHOUT PRIOR WR ITTEN CONSENT OF LC FUTURE C ENTER.

MAY BE USED BY OR DISCLOSE D TO ANY THIRD PARTY WITHOUT PRIOR WR ITTEN CONSENT OF LC FUTURE C ENTER.

5

4

2015/08/20

2015/08/20

2015/08/20

3

LC Future Center Secret Data

LC Future Center Secret Data

LC Future Center Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2016/08/20

2016/08/20

2016/08/20

2

Titl e

Hole

Hole

Hole

Size

Size

Size

Document Number Re v

Document Number Re v

Document Number Re v

B

B

B

Sunday, January 22, 2017

Sunday, January 22, 2017

Date : She et o f

Date : She et o f

Date : She et o f

Sunday, January 22, 2017

DG421

DG421

DG421

1

49 60

49 60

49 60

1.0

1.0

1.0

5

D D

4

3

Silergy

LV5028AGQV
VQFN40_5X5

LDO

EN

For DDR4

+1.05VGS/ 1.5 A

2

NAPGOODEN_VGA

1

PCH_PWR _EN EN

PGOODEN

PGOODEN

PGOOD

+5VLP/ 100mA

+5VALW/6 A

NA

+3VLP/ 100mA

+3VALW/ 5A

ALW_PWR GD

+1.2V/7A

+0.6VS/2 A

VDDQ_PG OOD

PCH_PWR _EN

EC_VPP_PWREN

V20B+

Adaptor 45W/65W

C C

TI

EC_ON

EC_ON

SYSON

CPU_DRA MPG_CNT L

BQ24780SRUYR

Silergy

SY8288CRAC
QFN20_3X3

Converter
FOR SYSTEM

Silergy

SY8286BRAC
QFN20_3X3

Converter
FOR SYSTEM

Silergy

LV5028AGQV

S5

VQFN40_5X5

Switch Mode

S3

FOR DDR4

Silergy

LV5028AGQV

VQFN40_5X5

Converter

FOR PCH

Silergy

LV5028AGQV
VQFN40_5X5

Converter

EN

For GPU

Silergy

LV5028AGQV
VQFN40_5X5

LDO

EN

For DDR4

PGOOD

PGOOD

PGOOD

+1.0VALW/ 6A

NA

+1.8VALW/ 1A

NA

+2.5V/1A

NA

Battery Charger

Switch Mode

PGOOD

PGOOD

+1.35V/8 A

NA

+VGA_CORE /31 A

DGPU_PW ROK

MPS

NB685GQ-Z
QFN16_3X3

Switch Mode

SMBus

B B

FBVDDQ_ PWR_EN

Battery

polymer

PXS_PWR EN

EN

FOR VRAM

Richtek

RT8812AGQW
WQFN20_3X3

VID

Switch Mode

EN

FOR GPU VDDC

2S1P

PGOOD

CPU Core/23A

VCCGT/25 A

VCCSA/7A

CPU_VR_ READY

Title

Title

Security Classification LC Future Center Secret Data

Security Classification LC Future Center Secret Data

Security Classification LC Future Center Secret Data

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING D RAWING IS T HE PROPRIETARY PROPERTY OF LC FUTURE CEN TER. AND CON TAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING D RAWING IS T HE PROPRIETARY PROPERTY OF LC FUTURE CEN TER. AND CON TAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING D RAWING IS T HE PROPRIETARY PROPERTY OF LC FUTURE CEN TER. AND CON TAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. TH IS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. TH IS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. TH IS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHOR IZED BY L C FUTURE CENTER NEITHER THIS SHEET NOR TH E INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHOR IZED BY L C FUTURE CENTER NEITHER THIS SHEET NOR TH E INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHOR IZED BY L C FUTURE CENTER NEITHER THIS SHEET NOR TH E INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH OUT PRIOR WRITTEN CON SENT OF LC FU TURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH OUT PRIOR WRITTEN CON SENT OF LC FU TURE CENTER.

3

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH OUT PRIOR WRITTEN CON SENT OF LC FU TURE CENTER.

2015/08/20

2015/08/20

2015/08/20

Deciphered Date

Deciphered Date

Deciphered Date

2

2016/08/20

2016/08/20

2016/08/20

Title

PWR-Power Diagram

PWR-Power Diagram

PWR-Power Diagram

Size

Size

Size

Document Number Rev

Document Number Rev

Document Number Rev

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

DG421

DG421

DG421

Sunday, J anuary 22, 2017

Sunday, J anuary 22, 2017

Sunday, J anuary 22, 2017

1

50 60

50 60

50 60

1.0

1.0

1.0

Onsemi

NCP81216MNR2G
QFN60_7X7

Switch Mode

VID

EC_VR_O N

A A

5

FOR CPU Core

EN

4

5

4

3

2

1

EMC@

HCB2012KF-121T50_0805

JDCIN1

1

1

2

GND1

3

GND2

4

GND3

5

GND4

6

D D

C C

GND5

7

GND6

HIGHS_PJSS0026-8B01H

ME@

VCCRTC

@

PC105
1U_0402_6.3V6K

1 2

PF101

ADPIN

7A_24VDC_F1206HI7000V024TM

1

PD101

BAT54CW_SOT323-3

RTC_VCC 2 0MIL
+3VL 20MIL
VCCRTC 20MIL

21

APDIN_F

2

3

12

PC101

EMC@

PC102

1 2

EMC@

1000P_02 01_50V7-K

470P_020 1_50V7-K

+3VL

PR101

1K_0603_5%

12

PR102

1.5K_0402_1%

12

PR103

45.3K_0402_1%

12

PL101

1 2

EMC_NS@

HCB2012KF-121T50_0805

PL102

1 2

RTC_VCC

1
2
3
4

HIGHS_WS33020-S0351-HF

1
2
3
4

HIGHS_WS33020-S0351-HF

JRTC1

1
2
GND1
GND2

ME@

JRTC2

1
2
GND1
GND2

ME@

VIN

12

PC104

PC103

EMC@

1 2

1000P_02 01_50V7-K

EMC@

470P_020 1_50V7-K

B B

No charge RTC with 35mm cable

RTC Battery for GCM BOM
(2nd source and quoted price )

A A

Titl e

Titl e

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D
DEPARTMENT EXCEPT A S AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT A S AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT A S AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

3

2015/08/20

2015/08/20

2015/08/20

LC Future Center Secret Data

LC Future Center Secret Data

LC Future Center Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

2016/08/20

2016/08/20

2016/08/20

Titl e

PWR-DCIN / RTC charger

PWR-DCIN / RTC charger

PWR-DCIN / RTC charger

Size Document Number Re v

Size Document Number Re v

Size Document Number Re v

Custom

Custom

Custom

Date : Sheet o f

Date : Sheet o f

Date : Sheet o f

DG421

DG421

DG421

Sunday, January 22, 2017

Sunday, January 22, 2017

Sunday, January 22, 2017

51 60

51 60

51 60

1

1.0

1.0

1.0

5

4

3

2

1

D D

C C

B B

JBATT1

1
2

9

3

GND1

10

4

GND2

5
6
7
8

ME@

SUYIN_125022HB008M202ZL

VBAT

1
2

EC_SMCA

3

EC_SMDA

4
5
6
7
8

1

1

2

2

3

1

BATT_TEMP_IN

PD202

AZ5215-01F_DFN1006P2E2

EMC_NS@

2

PD201

AZC199-02S.R7G_SOT23-3

EMC_NS@

PR209

1 2

100K_0402_1%

PR213

1 2

10K_0402_5%

1 2

PR202 100_0402_1%

1 2

PR201 100_0402_1%

+3VALW

BATT_TEMP 44,53

EC_SMB_CK1 44,53
EC_SMB_DA1 44,53

1 2

EMC@

HCB2012KF-121T50_0805

PL201

1 2

1 2

PL202

HCB2012KF-121T50_0805

EMC@

PC201

1000P_0201_50V7-K

EMC@

BATT+

12

PC202

0.01U_0201_25V6-K

EMC@

2S1P polymer battery
voltage level: +6V ~

8.4 V

A A

Titl e

Titl e

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D
DEPARTMENT EXCEPT A S AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT A S AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT A S AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

3

2015/08/20

2015/08/20

2015/08/20

LC Future Center Secret Data

LC Future Center Secret Data

LC Future Center Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

2016/08/20

2016/08/20

2016/08/20

Titl e

PWR-BATTERY CO NN/OTP

PWR-BATTERY CO NN/OTP

PWR-BATTERY CO NN/OTP

Size Document Number Re v

Size Document Number Re v

Size Document Number Re v

Custom

Custom

Custom

Date : Sheet o f

Date : Sheet o f

Date : Sheet o f

DG421

DG421

DG421

Sunday, January 22, 2017

Sunday, January 22, 2017

Sunday, January 22, 2017

52 60

52 60

52 60

1

1.0

1.0

1.0

5

4

3

2

1

AON6414AL_DFN8-5

VIN

D D

PC301

PR313 PR315 :432K and 64.9k
change to 43k and 7.15k.
vin detect volatege level:16.8V

C C

B B

PC309:0.1u change to 0.01u
decrease ACDET deassert time

PQ311

5

4

12

12

PR302

470P_0201_50V7-K

4.7_0603_5%

12

PR310

ADP_I44

N1

1
2
3

12

12

PR311

4.02K_0603_1%

4.02K_0603_1%

7.15K_0402_1%

1 2

PR315

1 2

0.01U_0402_25V7K

BQ24780_VDD

ACIN44

EC_SMB_DA144,52

EC_SMB_CK144,52

1 2

1 2

PC325

PC324

100P_0201_25V8J

100P_0201_25V8J

AON7408L_DFN8-5

1
2
3

PC302

0.022U_0402_25V7K

PC309

Psys59

IDCHG

4

PQ312

43K_0402_1%

PR340

20K_0402_1%

1 2

+3VALW

5

VIN

PR313

PR324100K_0402_1% @

1 2

1 2

1 2

1 2

1 2

PC1108

N2

1 2

12

PR339 20K_0402_1%@

12

PR3250_0402_5% @

PR3200_0402_5% @

PR3220_0402_5% @

PR3230_0402_5% @

@

100P_0201_25V8J

1 2

316K_0402_1%

JUMP_43X118

PC303

EMC_NS@

10U_0603_25V6-M

1U_0603_25V6K

1U_0603_25V6K

ACDET

12

VR_HOT#44,59

PR331

PJ301

@

112

PC307

VIN

2

PC315

12

ACIN_R

EC_SMB_DA1_R

EC_SMB_CK1_R

ADP_I_R

1 2

2

1 2

BATT+

3

1

PR314

10_1206_5%

1 2

780_VCC

ILIM

1 2

@

12

PR333
100K_0402_1%

PC328

0.1U_0201_25V6-K

PC304

EMC_NS@

10U_0603_25V6-M

12

PD302

BAT54CW_SOT323-3

28

VCC

6

ACDET

BQ24780SRUYR_QFN24_4X4

3

CMSRC

4

ACDRV

5

ACOK

11

SDA

12

SCL

7

IADP

8

IDCHG

9

PMON

10

PROCHOT#

13

CMPIN

14

CMPOUT

21

ILIM

PR330
0_0402_5%

1 2

14.7K_0402_1%
PR332

PR301

0.01_1206_1%

1

2

0.1U_0201_25V6-K

PC305

1 2

ACP

2

ACP

PU301

TB_STAT#

16

TB_STAT#ILIM_R

ACN

1

4

3

ACN

HIDRV

PHASE

LODRV

BATDRV

BATSRC

BATPRES#

15

REGN

BTST

GND

PAD

SRP

SRN

PC306

0.1U_0201_25V6-K

1 2

BQ24780_VDD

24

BST_CHG

25

DH_CHG

26

LX_CHG

27

DL_CHG

23

22

29

18

17

SRP_R

20

SRN_R

19

BATT_TEMP 44, 52

12

1 2

PC3162.2U_0603_10V6-K

PR316

1 2

2.2_0603_5%

BQ24780_BATDRV

PR328

PR329

PC329

220P_0402_50V7K

EMC@

PC318

12

0.047U_0603_16V7K

PR338 10_0603_5%

12

12

10_0603_5%

12

10_0603_5%

12

PC330

EMC@

AON7408L_DFN8-5

V20B+

12

12

470P_0402_50V7K

12

PC331

EMC@

PC332

680P_0402_50V7K

EMC@

4700P_0402_50V7-K

PC333

EMC@

6800P_0402_25V7-K

12

PC334

EMC@

0.01U_0201_25V6-K

BQ24780_BATDRV

499K_0402_1%

PR303

12

4

PC308

0.01U_0201_25V6-K

1 2

5

321

PQ314
AON6324_DFN8-5

V20B+

PQ317

PQ316

AON7408L_DFN8-5

4.7UH_PCMB053T-4R7MS_4A_20%

12

PR321

2.2_0805_5%

EMC_NS@

12

PC321

1000P_0402_50V7K

EMC_NS@

PC310

EMC@

2200P_0201_25V7-K

1 2

5

4

321

5

4

321

PC327

1 2

0.1U_0201_25V6-K

PL302

PC313

1 2

1 2

1 2

PC314

10U_0805_25V6K

10U_0805_25V6K

PR317

0.01_1206_1%

1

CHG

SRP

SRN

4

3

2

PC322

1 2

PC323

1 2

0.1U_0201_25V6-K

0.1U_0201_25V6-K

BATT+

PC319

1 2

1 2

PC320

10U_0805_25V6K

10U_0805_25V6K

A A

Titl e

Titl e

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROP RIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROP RIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROP RIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT O F LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT O F LC FUTURE CENTER.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT O F LC FUTURE CENTER.

3

2015/08/20

2015/08/20

2015/08/20

LC Future Cente r Secret Data

LC Future Cente r Secret Data

LC Future Cente r Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

2016/08/20

2016/08/20

2016/08/20

Titl e

PWR-CHARGER

PWR-CHARGER

PWR-CHARGER

Size Document Number Re v

Size Document Number Re v

Size Document Number Re v

C

C

C

Date: Sheet of

Date: Sheet of

Date: Sheet of

DG421

DG421

DG421

Sunday, J anuary 22, 2017

Sunday, J anuary 22, 2017

Sunday, J anuary 22, 2017

53 60

53 60

1

53 60

1.0

1.0

1.0

5

4

3

2

1

+3VALW

PR407

@

PC409

4.7U_0603_6.3V6K

100K_0402_5%

1 2

2.2UH_PCMB053T-2R2MS_5.5A_20%
PL401

1 2

12

PR403

2.2_0805_5%

EMC_NS@

12

PC410

1000P_0402_50V7K

EMC_NS@

PC411

1 2

1000P_0201_25V7K

12

12

PC434

22U_0603_6.3V6-M

1 2

1K_0402_1%

PR405

+3VALW

@

PJ402

JUMP_43X79

5A

112

Vou t=3 .3 V± 5 %
Vset=3.37V ± 1.5%

OCP =12 A
OVP= (1.1 5~ 1.2 5) *Vo ut
UVP= (0.5 5~ 0.6 5) *Vo ut
Fsw= 60 0Kh z

+3VALW_P

12

12

PC431

PC435

PC432

22U_0603_6.3V6-M

22U_0603_6.3V6-M

22U_0603_6.3V6-M

2

V20B+

@

PJ401

2

112

JUMP_43X79

D D

PR414

1 2

0_0402_5%

@

EC_ON +3/5VALW_EN

EC_ON39,44,55

12

PC401

EMC@

0.01U_0201_25V6-K

+3/5VALW_EN

12

12

PC402

PC452

10U_0805_25V6K

10U_0805_25V6K

+3V_VIN

12

@

PC408

0.1U_0201_25V6-K

PU401

+3V_VIN

5

IN1

4

IN2

3

IN3

2

IN4

7

GND1

8

GND2

18

GND3

21

GND4

12

EN1

11

EN2

SY8286BRAC_QFN20_3X3

10

NC1

12

15

NC2

PR401

+3VLP +3VL

NC316LDO

1M_0402_5%

@

PJ404

2

112

JUMP_43X39

+3V_PWRGD

9

PG

1

1 2

+3VBS

BS

PC403

0.1U_0603_25V7-M

6

LX1

19

LX2

20

+3VLX

LX3

100 mA

+3VALW_P

+3VALW_FB

+3VLP

12

14

OUT

13

FF

17

C C

V20B+

+3/5VALW_EN

B B

A A

@

PJ405

2

JUMP_43X79

PU402

+5V_VIN

+5V_VIN

SY8288CRAC_QFN20_3X3

5

IN1

4

IN2

3

IN3

2

IN4

7

GND1

8

GND2

18

GND3

21

GND4

12

EN1

11

EN2

10

NC1
NC216VCC

112

12

12

12

PC413

PC412

EMC@

0.01U_0201_25V6-K

12

@

PC414

10U_0805_25V6K

10U_0805_25V6K

12

PC421

PR412

1M_0402_5%

0.1U_0201_25V6-K

ALW_PWR GD

9

PG

1

+5VBS

BS

6

LX1

19

LX2

20

LX3

14

OUT

13

FF

15

LDO

17

+5VVCC

0.1U_0603_25V7-M

12

PC416

PC415

1 2

1U_0603_25V6M

+5VLX

PR410

1 2

0_0402_5%

12

PC422

4.7U_0603_6.3V6K

+3VALW

1 2

+5VALW_P+5VALW_OUT

@

+5VLP

100 mA

PR406

@

100K_0402_5%

+5VFB

ALW_PWR GD 55

PL402

1 2

2.2UH_PCMB063T-2R2MS_8A_20%

12

PR411

2.2_0805_5%

EMC_NS@

12

PC423

1000P_0402_50V7K

EMC_NS@

PC424

1 2

1000P_0201_25V7K

12

PR413

1 2

1K_0402_1%

PJ406

+5VALW_P

12

12

12

PC417

22U_0603_6.3V6-M

PC420

PC419

PC418

22U_0603_6.3V6-M

22U_0603_6.3V6-M

22U_0603_6.3V6-M

2

JUMP_43X79

+5VALW

8A

112

@

Vout =5V ± 3%
Vset =5.1 V± 1 .5%
OCP =12 A
OVP= (1.1 5~ 1.2 5) *Vo ut
UVP= (0.5 5~ 0.6 5) *Vo ut
Fsw= 60 0Kh z

Titl e

Titl e

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROP RIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROP RIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROP RIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT O F LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT O F LC FUTURE CENTER.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT O F LC FUTURE CENTER.

3

2015/08/20

2015/08/20

2015/08/20

LC Future Cente r Secret Data

LC Future Cente r Secret Data

LC Future Cente r Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

2016/08/20

2016/08/20

2016/08/20

Titl e

PWR_3VALW/5VALW

PWR_3VALW/5VALW

PWR_3VALW/5VALW

Size Document Number Re v

Size Document Number Re v

Size Document Number Re v

C

C

C

Date: Sheet of

Date: Sheet of

Date: Sheet of

DG421

DG421

DG421

Sunday, J anuary 22, 2017

Sunday, J anuary 22, 2017

Sunday, J anuary 22, 2017

54 60

54 60

1

54 60

1.0

1.0

1.0

5

D D

@

@

@

@

@

+2.5V_DDR_EN

+1.05VGS_B_EN

0.1u_0201_10V6K

@

PC504

1 2

VDDQ_EN

VTT_EN

+1.8VALW_L_EN

+1.0VALW_EN

PC506

1 2

@

0.1u_0201_10V6K

12

OPT@

PC537

0.1U_0402_25V6

1 2

SYSON44

CPU_DRAMPG_CNTL5

PCH_PWR_EN44,46

EC_VPP_PWREN44

C C

B B

DGPU_PWROK22,23,58

PR501

0_0402_5%

1 2

PR503

0_0402_5%

1 2

PR507

0_0402_5%

1 2

PR506

0_0402_5%

1 2

PR508

0_0402_5%

PR526

1 2

0_0402_5%

OPT5075@

EN_VGA22,23,58

12

0_0402_5%

PR524

@

1 2

PR525

0_0402_5% OPT5028@

4

PR521

0_0402_5%

PMIC_VCC

EN_LDO1

EN_LDO2

EN_V1P0A

EN_V1P8A

EN_VDDQ

EN_VTT

VIN_V1P0A1
VIN_V1P0A2

VIN_V1P8A

VIN_VTT

VTT

VSNS_VTT

CS_VDDQ

VIN_LDO1

VIN_LDO2

PR522 0_0402_5%@

PMIC_EN

VSYS_PMIC

9

27

28

41

VCC

GND

VSYS

SDA

PMIC_EN

SCL

OT

PG_V1P0A

PG_V1P8A

PG_VDDQ

LX_V1P0A1
LX_V1P0A2
LX_V1P0A3
LX_V1P0A4

VO_V1P0A

LX_V1P8A1
LX_V1P8A2

VO_V1P8A

UGATE_VDDQ

BS_VDDQ

LX_VDDQ

LGATE_VDDQ

VSNS_VDDQ

LDO1

LDO2

FB_LDO2

+5VALW

PR502

PR505

PC509

12

1 2

+1.8VALW_L_VIN

PR520

1 2

10_0603_5%

PC502

0.1u_0201_10V6K

1 2

+2.5V_DDR_EN

+1.8VALW_L_EN

+1.0VALW_EN

+1.05VGS_B_EN

VDDQ_EN

VTT_EN

+1.0VALW_B_VIN

12

PC510

0.1u_0201_10V6K

+1.05VGS_B_VIN

PC534

OPT@

22U_0603_6.3V6-M

+1.2V_P

12

PC519

22U_0603_6.3V6-M

PC521

10U_0603_10V6K

1 2

10_0603_5%

EMC_NS@

@

2.2U_0603_6.3V6K

29

11

16

31

36

19

38

39

40

30

1

7
8

5

4

PC500

1 2

PU500
LV5028RPC_QFN40_5X5

+5VLP

VDDQ_P

1 2

10_0402_5%

PC508

PC503

PC505

1 2

1 2

1 2

@

@

@

0.1u_0201_10V6K

0.1u_0201_10V6K

0.1u_0201_10V6K

+5VALW

PJ500

@

2

112

12

JUMP_43X39

PJ508

@

22U_0603_6.3V6-M

2

+3VALW

112

JUMP_43X39

1 2

PC517 10U_0603_10V6K

2

+0.6VS

PR515

@

1 2

33K_0402_1%

PJ502

2

112

JUMP_43X39

PJ510

@

2

112

JUMP_43X39

PJ504

JUMP_43X39

@

@

112

12

PC523
10U_0603_10V6K

+5VALW

1 2

1 2

PMIC_SMB_DAT1

25

PMIC_SMB_CLK1

26

24

22

21

23

12
13
14
15

+1.0VALW_FB

10

17
18

+1.05VGS_FB

20

33

BST_VDDQ

32

34

35

37

6

PC520 22U_0603_6.3V6-M

3

2

PR517
75K_0402_1%

1 2

3

@

PR510

0_0402_5%

PR511

0_0402_5%

PMIC_ALERT#

PR512 0_0402_5%@

+1.0VALW_PG

+1.05VGS_B_PG

VDDQ_PGOOD

PL500

LX_1P0

1 2

0.47UH_CMMB062D-R47MS_15A_20%

LX_1P05

1UH_PH041H-1R0MS_3.8A_20%

UG_VDDQ

PR1031

1 2

0_0603_5%

LX_VDDQ

LG_VDDQ

+1.2V_P

+2.5V_P+2.5V_DDR_VIN

12

PR516

1 2

105K_0402_1%

+1.8VALW_L_FB

1 2

1 2

1 2

1

1

PL502

1 2

+1.8VALW_L_P

PC522

22U_0603_6.3V6-M

EC_ON 39,44,54

ALW_PWRGD 54

@

@

12

OPT@

PC518

0.1U_0603_25V7-M

PJ503

2

JUMP_43X39

PJ511

2

JUMP_43X39

UG_VDDQ

LX_VDDQ

LG_VDDQ

2

+3VALW

EC_SMB_DA3 44

EC_SMB_CK3 44

H_PROCHOT# 4,44

PTC501PAD @

PTC502PAD @

12

12

12

12

12

12

@

112

@

112

5

4

321

5

AON7506_DFN

4

321

PC511

22U_0603_6.3V6-M

12

OPT@

PC535

+2.5V_DDR+3VALW

PQ500

AON7408L_DFN8-5

PQ501

PC514

PC513

PC512

22U_0603_6.3V6-M

22U_0603_6.3V6-M

12

PC536

@

22U_0603_6.3V6-M

22U_0603_6.3V6-M

+1.8VALW

0.47UH_CMMB062D-R47MS_15A_20%

4.7_0603_5%
PR518

EMC_NS@

1 2

12

PC533

1200P_0402_50V7-K

EMC_NS@

@

22U_0603_6.3V6-M

1 2

PL501

12

PR513

R_0402

100K_0402_5%

VDDQ_PGOOD 44

PJ501

@

+1.0VALW_FB

2

112

PJ509

@

112

PJ512

@

112

PR1029

4.7_0603_5%

EMC_NS@

PC1109

1200P_0402_50V7-K

EMC_NS@

12

PC525

PC526

12

12

PC528

22U_0603_6.3V6-M

+1.0VALW

+1.05VGS

5075 PJ512 tinplate
5028 PJ509 tinplate

+1.8VGS

LX_1P05

12

PR1030

4.7_0603_5%

EMC_OPTNS@

12

PC1110

1200P_0402_50V7-K

EMC_OPTNS@

PJ506

VDDQ_P

10U_0805_25V6K

+1.2V_P

12

12

PC531

PC529

PC530

22U_0603_6.3V6-M

22U_0603_6.3V6-M

@

2

112

V20B+

JUMP_43X39

+1.2V

@

PJ507

2

112

JUMP_43X79

12

PC532

0.1U_0402_25V6

22U_0603_6.3V6-M

EMC_NS@

JUMP_43X79

12

PC515

PC516

@

22U_0603_6.3V6-M

22U_0603_6.3V6-M

+1.05VGS_FB

2

JUMP_43X79

2

JUMP_43X79

LX_1P0

12

12

12

12

PC524

EMC@

0.1U_0201_25V6-K
10U_0805_25V6K

@

@

12

12

PC527

PC1113

22U_0603_6.3V6-M

22U_0603_6.3V6-M

1

A A

Title

Title

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC F UTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC F UTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC F UTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS A UTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS A UTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS A UTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR D ISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CE NTER.

MAY BE USED BY OR D ISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CE NTER.

5

4

3

MAY BE USED BY OR D ISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CE NTER.

2

2015/08/20

2015/08/20

2015/08/20

LC Future Center Secret Data

LC Future Center Secret Data

LC Future Center Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2016/08/20

2016/08/20

2016/08/20

Title

PWR PMIC-DDR4/1.0ALW/1.8ALW

PWR PMIC-DDR4/1.0ALW/1.8ALW

PWR PMIC-DDR4/1.0ALW/1.8ALW

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

D

D

D

Date: Sheet of

Date: Sheet of

Date: Sheet of

Sunday, January 22, 2017

Sunday, January 22, 2017

Sunday, January 22, 2017

1

DG421

DG421

DG421

55 60

55 60

55 60

1.0

1.0

1.0

5

D D

C C

B B

4

3

2

1

A A

5

4

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TR ANSFERED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TR ANSFERED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TR ANSFERED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF LC FUTURE CENT ER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF LC FUTURE CENT ER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF LC FUTURE CENT ER.

3

2015/08/20

2015/08/20

2015/08/20

LC Future Center Secret Da ta

LC Future Center Secret Da ta

LC Future Center Secret Da ta

Deciphered Date

Deciphered Date

Deciphered Date

2

2016/08/20

2016/08/20

2016/08/20

Titl e

Titl e

Titl e

PWR

PWR

PWR

Size D ocument Number Re v

Size D ocument Number Re v

Size D ocument Number Re v

Custom

Custom

Custom

Date : Sheet o f

Date : Sheet o f

Date : Sheet o f

Sunday, Jan uary 22, 2017

Sunday, Jan uary 22, 2017

Sunday, Jan uary 22, 2017

DG421

DG421

DG421

56 60

56 60

1

56 60

1.0

1.0

1.0

5

4

3

2

1

D D

FBVDDQ_PWR_EN22,24

C C

V20B+

OPT@

PR1412

1 2

10K_0402_1%

@

PJ1401

1A

2

112

OPT@

PC1416

0.1u_0201_10V6K

JUMP_43X79

1 2

+3VALW

12

EMC_NS@

+3VALW

PC1401

0.1U_0402_25V6

1 2

PR1405

4.7_0402_5%

12

OPT@

OPT@

PC1402

10U_0805_25V6K

OPT@

PR1408

1 2

10K_0402_1%

100K_0402_1%

PC1411

OPT@

1.35V_GND

12

PR1403

1U_0402_6.3V6K

12

OPT@

PC1403

+1.35V_VIN

10U_0805_25V6K

12

@

+1.35V_3V3

+1.35V_S3

+1.35V_S5

1.35V_GND

+1.35V_Mode

PR1410
0_0402_5%

@

1 2

PU1401

1

VIN

16

EN1

15

EN2

12

PG

3

3V3

4

AGND

2

PGND

14

MODE

OPT@

1.35V_GND

PJ1404

1 2

JUMPER

@

PJ1402

@

112

+1.35VGS

8A

BST

9

SW

13

FB

6

VDDQ

5

VTT

NB685GQ-Z_QFN16_3X3

8

VTTS

7

VTTREF

11

OTW#

+1.35V_LX

+1.35V_FB

+1.35V_P

MPS_VTTREF

12

OPT@

PC1415

1U_0402_6.3V6K

1.35V_GND

OPT@

PR1401
0_0603_5%

+1.35V_BST +1.35V_BST_R

1 2

10

PC1404

0.1U_0603_25V7-M

1 2

12

PR1402

2.2_0805_5%

EMC_OPTNS@

+1.35V_SN

12

PC1412

1000P_0402_50V7K

EMC_OPTNS@

OPT@

OPT@

0.47UH_PCMB053T-R47MS_13A_20%
PL1401

1 2

12

PR1404

12

12

PR1406
499_0402_1%

@

PC1405
220P_0402_50V7K

@

1M_0402_5%

@

+1.35V_COMP

12

12

1.35V_GND

12

PC1406

OPT@

PR1407

41.2K_0402_1%

OPT@

PR1411

32.4K_0402_1%

OPT@

+1.35V_P

12

12

12

12

PC1408

PC1407

PC1409

@

22U_0603_6.3V6-M

22U_0603_6.3V6-M

22U_0603_6.3V6-M

OPT@

22U_0603_6.3V6-M

OPT@

Vout =1.3 5V ± 5%
Vset =1.3 6V ± 2%
OCP =13 A
Vref =0 .6V
OVP= (1.2 5~ 1.3 5) *Vr ef
UVP= (0.7 ~0 .8) *V ref
Fsw= 700K hz (Rm od e=0 )
Fsw= 500K hz( Rm ode =1 50K )

OPT@

PC1410

22U_0603_6.3V6-M

2

JUMP_43X79

+5VALW

12

B B

DGPU_PWROK8,24,58

500mA

12

PC701

22U_0603_6.3V6-M

OPT5075@

0_0402_5%

PR708

OPT5075@

0_0402_5%

PR705

@

12

EN_VGA22 ,23,58

+1.8VGS

1U_0402_6.3V6K

12

PC702

OPT5075@

+1.05VGS_EN_5075

12

PC706

.1U_0402_10V6-K

obli ga tio n

TP Pin connect to GND

PU701

6

VPP

5

VIN

VO1

9

TP

VO2

OPT5075@

8

VEN

7

POK

ADJ

GND

@

12

+3VALW

G971MF11U _SO8

1

@

PR702

100K_0402_5%

3
4

2

+1.05VGS_FB_5075

PR706

22.6K_0402_1%

12

OPT5075@

12

PR707

71.5K_0402_1%

OPT5075@

12

PC708
220P_0201_25V7-K

@

12

OPT5075@

2

12

@

PC704

PC703

22U_0603_6.3V6-M

22U_0603_6.3V6-M

2A

+1.05VGS+1.05VSP_VGA_5075

PJ702

112

JUMP_43X39

@

5075 PJ702 tinplate

A A

Titl e

Titl e

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROP RIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROP RIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROP RIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT O F LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT O F LC FUTURE CENTER.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT O F LC FUTURE CENTER.

3

2015/08/20

2015/08/20

2015/08/20

LC Future Cente r Secret Data

LC Future Cente r Secret Data

LC Future Cente r Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

2016/08/20

2016/08/20

2016/08/20

Titl e

PWR-+1.05VGS/+1.35V_VRAM

PWR-+1.05VGS/+1.35V_VRAM

PWR-+1.05VGS/+1.35V_VRAM

Size Document Number Re v

Size Document Number Re v

Size Document Number Re v

C

C

C

Date: Sheet of

Date: Sheet of

Date: Sheet of

DG421

DG421

DG421

Sunday, J anuary 22, 2017

Sunday, J anuary 22, 2017

Sunday, J anuary 22, 2017

57 60

57 60

1

57 60

1.0

1.0

1.0

5

4

3

2

1

0_0402_5%

PR841
0_0402_5%

@

PR818

0_0402_5%

@

+VGA_CORE

PR835

VSSSENSE_VGA

VCCSENSE_VGA

1 2

NVVDD_PWM_VID

PSI_VGA

VSSSENSE_VGA

VCCSENSE_VGA

DGPU_PWROK

@

12

12

12

2700P_0402_50V7-K

0.1U_0201_25V6-K

PR831

12

100_0402_5%

OPT@

PR832

100_0402_5%

OPT@

PR801

1 2

18K_0402_1%

PC805

1 2

PC826

12

OPT@

VREF_VGA

OPT@

OPT@

1 2

2.2_0603_5%

PD801
RB751V-40_SOD323-2

OPT@

1 2

PR817

0_0402_5%

@

PC816

1 2

2700P_0402_50V7-K

PR804

1 2

20K_0402_1% OPT@

1 2

2K_0402_1% OPT@

PR830

OPT@

PR836

12

0_0402_5%

@

PR837

12

0_0402_5%

@

PR802

12

OPT@

PR839

1 2

430K_0402_1%

OPT@

VSS_SEN

PC842

12

1000P_0201_25V7K

@

VCC_SEN

12

PC812

0.1u_0201_10V6K

OPT@

EN_VGA

12

PR803
20K_0402_1%

OPT@

REFIN

PC804

1 2

OPT@

0.1U_0603_25V7K

EN_VGA 22, 23,57

12

@

PC821

10P_0201_25V8G

VREF_VGA

VSS_SEN

6

7

8

9

10

REFADJ

REFIN

VREF

TON

RGND

PC824

OPT@

21

1000P_0201_25V7K

NVVDD_PWM_VIDGPU_VID

PR826
0_0402_5%

@

1 2

PSI_VGA

4

5

PSI

VID

SS11VSNS12PGOOD13UGATE214BOOT2

GND

VCC_SEN

12

VGA_UGATE1

VGA_BOOT1

EN_VGA

1

2EN3

UGATE1

15

VGA_UGATE2

1 2

DGPU_PWROK

+3VGS

PR807

1 2

0_0603_5%

OPT@

BOOT1

20

PHASE1

19

LGATE1

18

PVCC

17

LGATE2

16

PHASE2

PU801

OPT@

RT8812AGQW_W QFN20_3X3

PR823

1 2

VGA_BOOT2

0_0603_5%

PR822
10K_0402_1%

OPT@

1 2

0.22U_0603_16V7K

VGA_PHASE1

VGA_LGATE1

VGA_LGATE2

VGA_PHASE2

OPT@

PC806

OPT@

VGA_UGATE1

VGA_LGATE1

PVCC_VGA

PC817

OPT@

1 2

0.22U_0603_16V7K

12

PR842

7.15K_0402_1%

PR815 0_0402_5% @

VGA_UGATE2

VGA_LGATE2

1

6

OPT@

PC810

OPT@

4.7U_0603_6.3V6K

1 2

12

1

6

2

435

+5VS

2

435

PQ801
AON6982_DFN8-7

VGA_PHASE1

7

PQ803
AON6982_DFN8-7

OPT@

VGA_PHASE2

7

EMC_OPT@

12

PR808

2.2_0805_5%

EMC_OPTNS@

12

PC809

1000P_0402_50V7K

EMC_OPTNS@

EMC_OPT@

12

PR824

2.2_0805_5%

EMC_OPTNS@

12

PC820

1000P_0402_50V7K

EMC_OPTNS@

+VGA_B+

12

12

12

PC802

PC803

PC801

10U_0805_25V6K

10U_0805_25V6K

0.1U_0201_25V6-K

OPT@

OPT@

OPT@

0.22UH_PCMB063T-R22MS_23A_20%
PL801

1 2

+VGA_B+

12

12

12

PC813

PC815

PC814

10U_0805_25V6K

10U_0805_25V6K

0.1U_0201_25V6-K

OPT@

OPT@

OPT@

0.22UH_PCMB063T-R22MS_23A_20%
PL802

1 2

@

PJ801

2

JUMP_43X118

OPT@

V20B+

112

+VGA_CORE

1

1

+

+

PC808

PC807

2

2

330U_D2_2V_Y

OPT@

12

12

12

PC830

PC829

22U_0603_6.3V6-M

22U_0603_6.3V6-M

OPT@

OPT@

330U_D2_2V_Y

OPT@

12

12

12

PC832

PC831

22U_0603_6.3V6-M

OPT@

PC834

PC833

22U_0603_6.3V6-M

22U_0603_6.3V6-M

22U_0603_6.3V6-M

@

OPT@

+VGA_CORE

1

+

PC818

@

2

330U_D2_2V_Y

OPT@

12

12

PC843

22U_0603_6.3V6-M

@

12

12

PC846

PC845

PC844

22U_0603_6.3V6-M

OPT@

22U_0603_6.3V6-M

22U_0603_6.3V6-M

OPT@

D D

C C

B B

A A

NVVDD_PWM_VID20

PSI_VGA20

VSSSENSE_VGA21

VCCSENSE_VGA21

DGPU_PWROK8,24

PXS_PWREN8,22

3VGS_PWR_EN20,22

+VGA_B+

Titl e

Titl e

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROP RIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROP RIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROP RIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT O F LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT O F LC FUTURE CENTER.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT O F LC FUTURE CENTER.

3

2015/08/20

2015/08/20

2015/08/20

LC Future Cente r Secret Data

LC Future Cente r Secret Data

LC Future Cente r Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

2016/08/20

2016/08/20

2016/08/20

Titl e

PWR-VGA_CORE

PWR-VGA_CORE

PWR-VGA_CORE

Size Document Number Re v

Size Document Number Re v

Size Document Number Re v

C

C

C

Date: Sheet of

Date: Sheet of

Date: Sheet of

DG421

DG421

DG421

Sunday, J anuary 22, 2017

Sunday, J anuary 22, 2017

Sunday, J anuary 22, 2017

58 60

58 60

1

58 60

1.0

1.0

1.0

SVID Specification

Vmi n(V )
Vma x(V )

Vste p( mV)

RFs w

14K

D D

RVb oot SA

14K

VCORE_VCC_SEN12

C C

VCORE_VSS_SEN12

5

Con fig

0

1.5 2
5

Cor e/G T

600 K

SA

600 K

Cor e GT

0V 1.0 5V

0V

PC913
1000P_0402_50V7K

12

12

12

PH902

1 2

PR942
0_0402_5%

@

PR931

8.25K_0402_1%

CPU_VR_READY44

12

+VCCST_CPU

12

12

@

PR944

54.9_0402_1%

EC_VR_ON44

VR_HOT#44,53

1 2

PR910

1.07K_0402_1%

PC924

0.1U_0402_25V6

1.07K_0402_1%

1 2

PR913

1 2

PC904 1000P_0402_50V7K

@

PR945

2.7K_0402_1%

1 2

PR903

Place close to MOSFET

100K_0402_1%_TSM0B104F4251RZ

VCCGT_VCC_SEN12

PR960
0_0402_5%

@

PR963

8.25K_0402_1%

VCCGT_VSS_SEN12

12

VCCSA_VCC_SEN13

PC934

VCCSA_VSS_SEN13

.1U_0402_10V6-K

1000P_0402_50V7K

1 2

B B

12

12

12

PH903

100K_0402_1%_TSM0B104F4251RZ

PC937

PC931

1000P_0402_50V7K

1 2

1 2

1.54K_0402_1%

4

12

@

PR946

1K_0402_1%

1K_0402_1%

PR916

0_0402_5%

1500P_0402_50V6-K

1 2

PC901 15P_0402_50V8J

348_0402_1%

1 2

PR911

1 2

470P_0402_50V7K

1 2

PR914

49.9_0402_1%

PC907

1 2

PR918

1K_0402_1%

1.5K_0402_1%

1 2

PR965

1 2

PC935 15P_0402_50V8J

1.54K_0402_1%
PR966

1 2

PC938 1000P_0402_50V7K

PR907

@

12

12

PC902

PC906330P_0402_50V7K

470P_0402_50V7K

PC930

25.5K_0402_1%
PR959

1 2

0.015U_0402_25V7-K

12

1 2

Psys53

VR_EN

12K_0402_1%

470P_0402_50V7K

12

PC911

12

PR917

40.2K_0402_1%

Vcore_TSENSE

12

12

100K_0402_1%

PR902

PR934

1 2

8.45K_0402_1%

PC932 10P_0402_50V8J

910_0402_1%

1 2

PR964

1 2

PC933 2200P_0402_50V7K

PC936

348_0402_1%

1 2

PC939 220P_0402_50V7K

PR940

1 2

0_0402_5%

Vcore_COMP

Vcore_ILIM

12

PR901

1 2

PC9091000P_0402_50V7K

Vcore_VSP

Vcore_VSN

Vcore_IOUT

GT_IOUT

12

GT_DIFFOUT

2200P_0402_50V7K

1 2

PC908

1 2

GT_FB

GT_TSENSE

SA_COMP

PR912

1 2

15.8K_0402_1%

1 2

PC9401000P_0402_50V7K

PR970

1 2

2.2_0603_5%
PR922

PU1402

GT_COMP

GT_VSN

SA_ILIM

SA_VSP

SA_VSN

470P_0402_50V7K

+5VS +5VS

1 2

1 2

PC916

PC912

2.2U_0603_10V7K

VR_PVCC

18

50

PSYS/TSENSE_1b

41

EN

PVCC

42

VR_RDY

35

VRHOT#

30

COMP_1a

31

ILIM_1a

28

VSP_1a

29

VSN_1a

34

IOUT_1a

27

TSENSE_1a

1

IOUT_2ph

2

DIFFOUT_2ph/ICCMAX_2ph

4

COMP_2ph

3

FB_2ph

51

VSP_2ph

52

VSN_2ph

11

TSENSE_2ph

47

COMP_1b

46

ILIM_1b

49

VSP_1b

48

VSN_1b

IOUT_1b

43

SA_Iout

12

PC929

V20B+

2.2_0603_5%
PR926

12

1 2

1 2

2.2U_0603_10V7K

VR_VCC

VR_VRMP

13

12

VCC

VCORE PORTION

VCCGT PORTION

NCP81216MNTXG_QFN 52_6X6

VCCSA PORTION

LG2/ADDR_VBOOT

53

12

PR958

59K_0402_1%

3

PR923

1K_0402_1%

VRMP

ALERT#

LG3/ICCMAX_1b

CSP_1a

CSN_1a

CSSUM_2ph

CSCOMP_2ph

ILIM_2ph

CSREF_2ph

LG1/ROSC

CSP1_2ph

CSP2_2ph

PWM/ICCMAX_1a

CSP_1b

CSN_1b

EPAD

12

PC920

0.01U_0201_25V6-K

SDIO

SCLK

DRON

BST3

HG3

SW3

BST1

HG1

SW1

BST2

HG2

SW2

36
38
37

39

26

25

24

23

33

32

7

6

5

8

14

15

16

17

10

9

40

22

21

20

19

44

45

Vcore_BST

GT_ILIM

GT_CSREF

GT_BST1

SA_BST

VR_SVID_DAT_1
VR_SVID_CLK_1
VR_SVID_ALRT#_1

PR919

1 2

2.2_0603_5%

11K_0402_1%

1 2

PR941

GT_CSSUM

GT_CSCOMP

PR951

1 2

12.7K_0402_1%

1 2

PR925 2.2_0603_5 %

GT_HG 60

GT_LG 60

PR954

12

14K_0402_1%

1 2

102K_0402_1%

PR927

1 2

PR989 2.2_0603_5 %

SA_HG 60

14K_0402_1%

1 2

PR955

SA_CSP

PC910

1 2

0.22U_0603_16V7K

Vcore_HG 60

Vcore_LG 60

PR950 75K_0402_1%

220K_0402_5%_TSM0B224J4702RE

GT_CSP1

GT_CSP2

SA_LG 60

Vcore_CSP

1 2

1 2

PC915

1 2

0.22U_0603_16V7K

1 2

Vcore_PH

PH901

PC989

0.22U_0603_16V7K

1 2

1 2

PC914 330P_0402_50V7K

12

GT_PH

SA_PH

2

23.2K_0402_1%

1 2

PR947

PH905

22K_0402_1%

1 2

1 2

PR948

100K_0402_1%_TSM0B104F4251RZ

1 2

PC942 3300P_0402_50V7-K

1 2

PC922 2700P_0402_50V7-K

PR904

110K_0402_1%

PC925
270P_0402_50V7K

12

PC917

0.01U_0402_25V7K

VR_SVID_DAT_1

VR_SVID_ALRT#_1

VR_SVID_CLK_1

1 2

12

0.047U_0402_16V7K
PC926

PR952

2K_0402_1%

PC918

1U_0402_6.3V6K

PR936

10_0402_1%

PR937

0_0402_5%

PR938

49.9_0402_1%

Vcore_PH 60

+CPU_CORE

PR949

93.1K_0402_1%

+VCC_GT

10_0402_1%

1 2

PR924

1 2

PR953

1.8K_0402_1%

12

13K_0402_1%

1 2

PR956

22K_0402_1%

1 2

PR957

100K_0402_1%_TSM0B104F4251RZ

1 2

PC941 3300P_0402_50V7K

1 2

PC927 3300P_0402_50V7K

12

PR933

12

12

12

GT_PH

+5VS

PH904

1 2

+VCCST_CPU

12

45.3_0402_1%

GT_PH 60

12

1

@

PR943

75_0402_1%

+VCCSA

12

PR932

100_0402_1%

VR_SVID_DAT 12

VR_SVID_ALRT# 12

VR_SVID_CLK 12

SA_PH 60

A A

Titl e

Titl e

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROP RIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROP RIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROP RIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT O F LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT O F LC FUTURE CENTER.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT O F LC FUTURE CENTER.

3

2015/08/20

2015/08/20

2015/08/20

LC Future Cente r Secret Data

LC Future Cente r Secret Data

LC Future Cente r Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

2016/08/20

2016/08/20

2016/08/20

Titl e

PWR_CPU_CORE1

PWR_CPU_CORE1

PWR_CPU_CORE1

Size Document Number Re v

Size Document Number Re v

Size Document Number Re v

C

C

C

Date: Sheet of

Date: Sheet of

Date: Sheet of

DG421

DG421

DG421

Sunday, J anuary 22, 2017

Sunday, J anuary 22, 2017

Sunday, J anuary 22, 2017

59 60

59 60

1

59 60

1.0

1.0

1.0

5

5

PQ1001
AON6380_DFN8-5

Vcore_HG59

Vcore_PH59

D D

Vcore_LG59

C C

GT_HG5 9

GT_PH59

GT_LG59

B B

4

321

5

PQ1002
AON6324_DFN8-5

4

321

5

PQ1005
AON6380_DFN8-5

4

321

5

PQ1006
AON6324_DFN8-5

4

321

EMC@

12

PR1002

2.2_0805_5%

EMC_NS@

12

PC1026

1000P_0402_50V7K

EMC_NS@

12

PR1008

2.2_0805_5%

EMC_NS@

12

PC1047

1000P_0402_50V7K

EMC_NS@

12

PC1002

PC1001

0.1U_0201_25V6-K

0.15UH_PCMB063T-R15MS_30A_20%

EMC@

PC1032

0.1U_0201_25V6-K

0.15UH_PCMB063T-R15MS_30A_20%

12

PC1003

10U_0805_25V6K

1 2

PL1001

12

PC1033

1 2

10U_0805_25V6K

10U_0805_25V6K

PL1003

12

Vcore_PH

12

4

VCCIA_VIN

+CPU_CORE

PC1031

10U_0805_25V6K

GT_PH

12

+VCC_GT

2

VCCGT_VIN

PJ1001

112

JUMP_43X79

@

PJ1003

2

JUMP_43X79

3

1

+

PC1004
68U_25V_M

2

1

+

PC1015

2 3

220U_D2_2VM_R6M

@

112

V20B+

V20B+

+CPU_CORE

SA_HG59

SA_LG59

12

12

12

PC1005

PC1006

22U_0603_6.3V6-M

22U_0603_6.3V6-M

@

12

12

12

PC1016

PC1022

22U_0603_6.3V6-M

22U_0603_6.3V6-M

@

12

PC1008

22U_0603_6.3V6-M

PC1017

22U_0603_6.3V6-M

PC1009

@

12

PC1025

@

3

4

2

9

AON7934L_DFN10

7

6

5

12

12

PC1013

22U_0603_6.3V6-M

22U_0603_6.3V6-M

12

12

PC1024

PC1018

22U_0603_6.3V6-M

22U_0603_6.3V6-M

SA_PH
59

10

12

PC1007

22U_0603_6.3V6-M

12

PC1023

22U_0603_6.3V6-M

PQ1003

1

8

+VCC_GT

1

1

+

+

PC1045

PC1066

2

2 3

330U_D2_2V_Y

220U_D2_2VM_R6M

12

12

12

@

PC1052

22U_0603_6.3V6-M

12

12

12

PC1054

PC1053

22U_0603_6.3V6-M

PC1055

PC1056

22U_0603_6.3V6-M

22U_0603_6.3V6-M

22U_0603_6.3V6-M

@

12

12

@

PC1057

PC1058

22U_0603_6.3V6-M

22U_0603_6.3V6-M

@

12

12

PC1059

PC1060

22U_0603_6.3V6-M

22U_0603_6.3V6-M

12

12

PC1061

PC1062

22U_0603_6.3V6-M

22U_0603_6.3V6-M

12

PC1011

PC1010

22U_0603_6.3V6-M

22U_0603_6.3V6-M

12

12

PC1019

22U_0603_6.3V6-M

22U_0603_6.3V6-M

EMC@

12

PR1006

2.2_0805_5%

EMC_NS@

12

PC1046

1000P_0402_50V7K

EMC_NS@

+VCC_GT

12

PC1064

PC1063

22U_0603_6.3V6-M

2

+CPU_CORE

12

12

PC1014

PC1012

22U_0603_6.3V6-M

22U_0603_6.3V6-M

12

PC1020

PC1021

22U_0603_6.3V6-M

22U_0603_6.3V6-M

12

PC1028

10U_0805_25V6K

PL1002

1 2

12

PC1029

10U_0805_25V6K

SA_PH

12

PC1027

0.1U_0201_25V6-K

0.47UH_PCMB053T-R47MS_13A_20%

22U_0603_6.3V6-M

Vboo t= 0V
Ripp le=+3 0mV/- 10mV( 0A-0. 5A)
Ripple=± 10mV(0.5A-TDC)
Ripple=± 15mV(TDC- Iccm ax)
TDC=21A Iccmax=32A
OCP =37 A

UVP= VID -3 00m V

@

PJ1002

VCCSA_VIN

2

112

JUMP_43X79

12

@

+VCCSA

12

PC1112

47U_0603_4V6-M

@

12

12

PC1111

47U_0603_4V6-M

PC1036

22U_0603_6.3V6-M

Vboo t=1 .0 5V
Ripp le=+3 0mV/- 10mV( 0A-0. 5A)
Ripple=± 10mV(0.5A-TDC)
Ripple=± 15mV(TDC- Iccm ax)
TDC=5A Iccmax=5.1A
OCP =8A
OVP=1.72V(dur ing SS)
UVP= VID -3 00m V

Load line =2 .4m Ω

V20B+

12

PC1038

PC1037

22U_0603_6.3V6-M

22U_0603_6.3V6-M

Loadline=1 0.3mΩ

1

OVP= VID +3 00m VOVP=1.72V(dur ing SS)

12

12

PC1039

PC1040

22U_0603_6.3V6-M

OVP= VID +3 00m V

12

22U_0603_6.3V6-M

+VCCSA

12

PC1041

22U_0603_6.3V6-M

@

PC1042

22U_0603_6.3V6-M

12

12

PC1067

22U_0603_6.3V6-M

A A

5

4

12

12

PC1068

22U_0603_6.3V6-M

PC1070

PC1069

22U_0603_6.3V6-M

22U_0603_6.3V6-M

@

3

12

12

12

PC1071

22U_0603_6.3V6-M

Security Classification

Security Classification

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROP RIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROP RIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROP RIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT O F LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT O F LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT O F LC FUTURE CENTER.

PC1072

22U_0603_6.3V6-M

@

Issued Date

Issued Date

Issued Date

12

@

PC1073

PC1074

22U_0603_6.3V6-M

22U_0603_6.3V6-M

12

12

12

@

PC1077

PC1076

PC1075

22U_0603_6.3V6-M

2015/08/20

2015/08/20

2015/08/20

22U_0603_6.3V6-M

22U_0603_6.3V6-M

LC Future Cente r Secret Data

LC Future Cente r Secret Data

LC Future Cente r Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Vboo t= 0V
Ripp le=+3 0mV/- 10mV( 0A-0. 5A)
Ripple=± 10mV(0.5A-TDC)
Ripple=± 15mV(TDC- Iccm ax)
TDC=18A Iccmax=31A
OCP =76 A
OVP=1.72V(dur ing SS)
UVP= VID -3 00m V

2

2016/08/20

2016/08/20

2016/08/20

Load line =3 .1m Ω

OVP= VID +3 00m V

Titl e

Titl e

Titl e

PWR_CPU_CORE2

PWR_CPU_CORE2

PWR_CPU_CORE2

Size Document Number Re v

Size Document Number Re v

Size Document Number Re v

C

C

C

Date: Sheet of

Date: Sheet of

Date: Sheet of

DG421

DG421

DG421

Sunday, J anuary 22, 2017

Sunday, J anuary 22, 2017

Sunday, J anuary 22, 2017

60 60

60 60

1

60 60

1.0

1.0

1.0