Lenovo IDEAPAD 310 Block Diagram

A

1 1

B

C

D

E

LCFC Confidential

CG411/CG511 MB Schematics Document

Intel Skylake-U22&U23/Kabylake-U22&U23 with DDR4

2 2

2016-01-11

REV:1.0

3 3

4 4

Title

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

A

B

C

2015/08/20

LC Future Center Secret Data

Deciphered Date

D

2016/08/20

Title

Cover Page

Size

Document Number Re v

Custom

Thursday, January 14, 2016

Date: Sheet

Thursday, January 14, 2016

CG411

E

160

1.0

of

A

LCFC confidential

B

C

D

E

DDR4 SO-DIMM x1

Page 18

Memory Bus (Dual Channel)

1.2V DDR4 2133MT/s

1 1

USB3.0 x1

HDMI (DDI 1)

DP x2 Lane (DDI 2)

VGA Conn.

Page36

HDMI Conn.

Page34

DP to VGA

ITE IT6516BFN

Page35

eDP x2 Lane

eDP Conn

Int. Camera Conn.

USB2.0 Port4

USB2.0 x1

Int. MIC Conn.

2 2

Page33

SATA HDD

Page42

SATA Port0

SATA Gen3 x1

Intel MCP

SKL-U22 15W KBL-U22 15W

BGA-1356

SATA ODD

Page42

SATA Port1A

SATA Gen1 x1

42mm*24mm

USB2.0 x1

USB3.0 x1

USB2.0 x1

USB3.0 Left Conn

USB3.0 Port1 USB2.0 Port1

USB3.0 Right Conn 1 (Optional)

USB3.0 Port2

USB2.0 Right Conn 1

USB2.0 Port3

USB2.0 Right Conn 2

USB2.0 Port2

Touch Screen (Optional)

USB2.0 Port6

DDR4 Memory Down

4pcs x16

Page41

Page45

Page33

Page45

USB Board

Page 17

USB2.0 x1

LAN Chip

RJ45 Conn.

Page38

3 3

Conexant_CX11802_33 Z

Page43

Codec

Realtek_RTL8111 GUL Realtek_RTL8111H_CG

Page37

PCIe Port5

SPK Conn.

Page43

HP&Mic Combo Conn.

Page43

PCIe Gen1 x1

HD Audio

PCIe Gen1 x1 USB2.0 x1

SPI

Page3~16

LPC

Card Reader

Realtek RTS5170

USB2.0 Port5

Page30

NGFF WLAN&BT

PCIe Port6

USB2.0 Port7

Page40

SPI ROM (8MB)

W25Q64FVSSIQ

Page07

SPI ROM (4MB) (Reserved)

W25Q32FVSSIQ

Page07

SD/MMC Conn.

Sub-board( for 14")

EC

ITE IT8586E-LQFP

Page44

TPM (Reserved)

Z32H320TC

Page32

USBBOARD

TP BOARD

Sub-board( for 15")

Touch Pad

Page45 Page45

Int.KBD

Thermal Sensor (Reserved)

NCT7718W

Page39

USBBOARD

4 4

TP BOARD

ODD BOARD

Title

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

A

B

C

2015/08/20

LC Future Center Secret Data

Deciphered Date

D

2016/08/20

Title

Block Diagram

Size

Document Number Re v

Custom

Thursday, January 14, 2016

Date: Sheet

Thursday, January 14, 2016

CG411

E

260

1.0

of

A

B

C

D

E

Voltage Rails

Power Plane

1 1

State

S0

S3

2 2

Battery only

S5 S4 AC Only

S5 S4 Battery only

S5 S4 AC & Battery don't exist

SMBUS Control Table

SOURCE

3 3

EC_SMB_DA1

EC_SMB_CK2 EC_SMB_DA2

IT8586EEC_SMB_CK1

+3VL_EC

IT8586E

+3VS

( O --> Means ON , X --> Means OFF )

+3VALW

+1.2V +2.5V_DDR +VCCST

V20B+

+5VALW +3VALW_PCH +1.8VALW +1.0VALW

O

O X

O

XX

BATT

V

X

ChargerVDGPU

X

V

+3VG_AON

IT8586E

V

+3VL_EC

V

+3VS

Memory Down

X

XX

O

X

PCH

X

V

+3VALW_PCH

+5VS +3VS +VCCIO +VCCSTG +VCCSA +VCC_GT +CPU_CORE +0.6VS

O

X

PMIC

X

SODIMM

X

Thermal Sensor

X

V

WLAN WiMAX

X

STATE

Full ON

S3 (Suspend to RAM)

S4 (Suspend to Disk)

S5 (Soft OFF)

SIGNAL

HSIO PORT

1 2

USB3.0

USB2.0

PCIE

SATA

3 4 5 6 1 2 3 4 5 6 7 8 9 10 1 2 3 4 5 6 7 8

9~12

X4 PCIE

0 1A 1B 2

SLP_S3# SLP_S4# SLP_S5# +VALW +V +VS Clock

HIGH HIGH HIGH

LOW

HIGH

LOWLOW

HIGH

LOW

Function

USB3.0 Conn Left USB3.0 Conn Right(optional) 3D Camera(optional) NC NC NC USB3.0 Conn Left USB2.0 Conn1 Right USB2.0 Conn2 Right Camera Cardreader Touch Panel Bluetooth NC NC NC NC NC NC NC LAN WLAN used as SATA used as SATA

DGPU

HDD ODD used as PCIE used as PCIE

ON

ON ON ON

ON

OFF

OFFLOW LOW LOW

@ 14@ 15@ 14or15@ 14or17@

Cannonlake@ CD@ DUALMIC@ EMC@ EMC_15@ EMC_NS@ EMC_PX@ EMC_PXNS@ ES@ EXO@

ME@ NTS@

PX@ RANKA@ RANKB@ Realtek_SD@ SINGLEMIC@ SINGLERANK@ DUALRANK@ TS@ TPM@ UMA@

OFF

BTO ItemBOM Structure

Not stuff For 14" part For 15" part For 14" or 15" part For 14" or 17" part

For Cannonlake part For C cost down For Dual MIC part For EMC part For EMC 15" part For EMC nu-stuff part For EMC PX part For EMC PX nu-stuff part For ES CPU For EXO GPU

For ME part For nu-touch part

For PX part For VRAM rank A part For VRAM rank B part For Realtek SD part For single MIC part For single VRAN rank part For dual VRAN rank part For touch screen part For TPM part For UMA part

EC_SMB_CK3 EC_SMB_DA3

PCH_SMB_CLK PCH_SMB_DATA

EC SMBus1 address

Device

Smart Battery

4 4

Charger

IT8586E

+3VL_EC

PCH

+3VALW_PCH

need to update

0001 0010 b

A

V

+3VL_EC

X

EC SMBus2 address

Device

Thermal Sensor(NCT7718W)

PCH

DGPU

X

XX

V

+3VALW_PCH

EC SMBus3 address

Device

1001_100xb

need to update need to update

B

PMIC

VXXX X X XX

V

+3VS

AddressAddress

need to update

X

V

+3VS

PCH SM Bus address

Device

DDR4 SODIMM Wlan

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

C

AddressAddress

need to update Reserved

2015/08/20

LC Future Center Secret Data

Deciphered Date

D

2016/08/20

Title

Notes List

Size

Document Number Re v

Custom

Thursday, January 14, 2016

Date: Sheet

Thursday, January 14, 2016

CG411

E

360

1.0

of

5

D D

HDMI D2 HDMI D1 HDMI D0

HDMI CLK

DP TO VGA Converter

+VCCIO

C C

+VCCSTG

12

check PROCHOT# circuit with PWR

H_PROCHOT#44,55

12

+VCCST_CPU

HDMI_TX2-34 HDMI_TX2+34 HDMI_TX1-34 HDMI_TX1+34 HDMI_TX0-34 HDMI_TX0+34 HDMI_CLK-34 HDMI_CLK+34

VGA_TX0-35 VGA_TX0+35 VGA_TX1-35 VGA_TX1+35

DDPB_CLK34

DDPB_DATA34

RC4 24.9_0402_1%

RC19 1K_0402_5%

RC20 499 +-1% 0402

RC143 1K_0402_5%

12

1 2

+VCCIO&EDP_COMP : Trace Width: 20mil Isolation Spacing: 25mil Max length: 100mil

HDMI_TX2HDMI_TX2+ HDMI_TX1HDMI_TX1+ HDMI_TX0HDMI_TX0+ HDMI_CLKHDMI_CLK+

VGA_TX0VGA_TX0+ VGA_TX1VGA_TX1+

DDPB_CLK DDPB_DATA

DDPC_CLK DDPC_DATA

EDP_COMP PCH_ENVDD

check H_THRMTRIP# if need to connector to EC

1 2

RC155 49.9_0402_1%

1 2

RC156 49.9_0402_1%

1 2

RC157 49.9_0402_1%U23E@

1 2

RC170 49.9_0402_1%U23E@

B B

4

?

UC1A

E55

DDI1_TXN[0]

F55

DDI1_TXP[0]

E58

DDI1_TXN[1]

F58

DDI1_TXP[1]

F53

DDI1_TXN[2]

G53

DDI1_TXP[2]

F56

DDI1_TXN[3]

G56

DDI1_TXP[3]

C50

DDI2_TXN[0]

D50

DDI2_TXP[0]

C52

DDI2_TXN[1]

D52

DDI2_TXP[1]

A50

DDI2_TXN[2]

B50

DDI2_TXP[2]

D51

DDI2_TXN[3]

C51

DDI2_TXP[3]

L13

GPP_E18/DDPB_CTRLCLK

L12

GPP_E19/DDPB_CTRLDATA

N7

GPP_E20/DDPC_CTRLCLK

N8

GPP_E21/DDPC_CTRLDATA

N11

GPP_E22/DDPD_CTRLCLK

N12

GPP_E23/DDPD_CTRLDATA

E52

EDP_RCOMP

SKYLAKE-U_BGA1356

+VCCST_CPU

12

@

H_PECI44

TC11PAD@ TC12PAD@ TC13PAD@ TC14PAD@

TC162@PAD TC163@PAD

REV = 1 @

RC1625

49.9_0402_1%

CATERR# H_PECI XDP_TDO H_PROCHOT#_R H_THRMTRIP#

XDP_BPM0#

1

XDP_BPM1#

1

XDP_BPM2#

1

XDP_BPM3#

1

GPP_E3

1

GPP_E7

1

PROC_OPI_RCOMP PCH_OPI_RCOMP EDRAM_OPIO_RCOMP EOPIO_RCOMP

SKL_ULT

DDI

DISPLAY SIDEBANDS

UC1D

D63

CATERR#

A54

PECI

C65

PROCHOT#

C63

THERMTRIP#

A65

SKTOCC#

C55

BPM#[0]

D55

BPM#[1]

B54

BPM#[2]

C56

BPM#[3]

A6

GPP_E3/CPU_GP0

A7

GPP_E7/CPU_GP1

BA5

GPP_B3/CPU_GP2

AY5

GPP_B4/CPU_GP3

AT16

PROC_POPIRCOMP

AU16

PCH_OPIRCOMP

H66

OPCE_RCOMP

H65

OPC_RCOMP

SKYLAKE-U_BGA1356

REV = 1 @

1 OF 20

SKL_ULT

CPU MISC

EDP

?

1 OF 20

3

EDP_TXN[0] EDP_TXP[0] EDP_TXN[1] EDP_TXP[1] EDP_TXN[2] EDP_TXP[2] EDP_TXN[3] EDP_TXP[3]

EDP_AUXN EDP_AUXP

EDP_DISP_UTIL

DDI1_AUXN DDI1_AUXP DDI2_AUXN DDI2_AUXP DDI3_AUXN DDI3_AUXP

GPP_E13/DDPB_HPD0 GPP_E14/DDPC_HPD1 GPP_E15/DDPD_HPD2 GPP_E16/DDPE_HPD3

GPP_E17/EDP_HPD

EDP_BKLTEN

EDP_BKLTCTL

EDP_VDDEN

JTAG

PROC_TCK

PROC_TDI PROC_TDO PROC_TMS

PROC_TRST#

PCH_JTAG_TCK

PCH_JTAG_TDI PCH_JTAG_TDO PCH_JTAG_TMS

PCH_TRST#

JTAGX

2

C47 C46 D46 C45 A45 B45 A47 B47

E45 F45

B52 G50

F50 E48 F48 G46 F46

L9 L7 L6 N9 L10

R12 R11 U13

?

B61 D60 A61 C60 B59

B56 D59 A56 C59 C61 A59

?

CPU_EDP_TX0CPU_EDP_TX0+ CPU_EDP_TX1CPU_EDP_TX1+

CPU_EDP_AUX# CPU_EDP_AUX

VGA_AUX# VGA_AUX

HDMI_HPD DP_VGA_HPD GPP_E15

CPU_EDP_HPD PCH_ENBKL

PCH_EDP_PWM

XDP_TCK XDP_TDI XDP_TDO XDP_TMS XDP_TRST#

PCH_JTAG_TCK PCH_JTAG_TDI PCH_JTAG_TDO PCH_JTAG_TMS PCH_JTAG_TRST# JTAGX

CPU_EDP_TX0- 33 CPU_EDP_TX0+ 33 CPU_EDP_TX1- 33 CPU_EDP_TX1+ 33

CPU_EDP_AUX# 33

CPU_EDP_AUX 33

VGA_AUX# 35

VGA_AUX 35

HDMI_HPD 34

1 2

RC181 0_0402_5%@

PCH_ENBKL 33

PCH_EDP_PWM 33 PCH_ENVDD 33

XDP_TCK

RC1546 0_0402_5%@ RC1547 0_0402_5%@

1 1 1 1 1

1 1 1 1 1 1

TC15 TC16 TC17 TC18 TC27

TC29 TC31 TC35 TC36 TC42 TC43

PAD@ PAD@ PAD@ PAD@ PAD@

PAD@ PAD@ PAD@ PAD@ PAD@ PAD@

confirmed with ITE, the HPD pull down resistor should follow ITE recommended resistor 4.7k~10Kohm

GPP_E15

RC37

4.7K_0402_5%

1 2

DP_VGA_HPD 35 EC_SCI# 44

12

RC13 100K_0402_5%

1 2 1 2

XDP_TDI PCH_JTAG_TDI

1 2

RC1548 0_0402_5%@

1 2

RC1549 0_0402_5%@

1 2

RC1550 0_0402_5%@

CPU_EDP_HPD 33

JTAGX PCH_JTAG_TDO

RC1601 10K_0402_5%@

RC1551 51_0402_5% RC1543 51_0402_5%

PCH_JTAG_TMSXDP_TMS PCH_JTAG_TRST#XDP_TRST#

check JTAG circuit?

1 2

1 2 1 2

1

+3VS

+VCCSTG

check DDPC_CLK pull high or not?

+3VS

RPC19

18 27 36 45

2.2K_0804_8P4R_5%

DDPC_CLK

DDPC_DATA

DDPB_CLK

DDPB_DATA

DDP*_CTRLDATA strapping sampled on the rising edge of PWROK

Port

Port 1

Port 2

A A

5

Strap Enable Disable

DDPB_CTRLDATA

DDPC_CTRLDATA

Pull up to 3.3 V with 2.2Kohm

NC

4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

3

2015/08/20

LC Future Center Secret Data

Deciphered Date

2

2016/08/20

Title

MCP (DDI,EDP)

Size

Document Number Re v

Custom

Thursday, January 14, 2016

Date: Sheet

Thursday, January 14, 2016

CG411

1

460

1.0

of

5

DDRA_DQ[0..63]17

D D

C C

DDRA_DQ0 DDRA_DQ1 DDRA_DQ2 DDRA_DQ3 DDRA_DQ4 DDRA_DQ5 DDRA_DQ6 DDRA_DQ7 DDRA_DQ8 DDRA_DQ9 DDRA_DQ10 DDRA_DQ11 DDRA_DQ12 DDRA_DQ13 DDRA_DQ14 DDRA_DQ15 DDRA_DQ16 DDRA_DQ17 DDRA_DQ18 DDRA_DQ19 DDRA_DQ20 DDRA_DQ21 DDRA_DQ22 DDRA_DQ23 DDRA_DQ24 DDRA_DQ25 DDRA_DQ26 DDRA_DQ27 DDRA_DQ28 DDRA_DQ29 DDRA_DQ30 DDRA_DQ31 DDRA_DQ32 DDRA_DQ33 DDRA_DQ34 DDRA_DQ35 DDRA_DQ36 DDRA_DQ37 DDRA_DQ38 DDRA_DQ39 DDRA_DQ40 DDRA_DQ41 DDRA_DQ42 DDRA_DQ43 DDRA_DQ44 DDRA_DQ45 DDRA_DQ46 DDRA_DQ47 DDRA_DQ48 DDRA_DQ49 DDRA_DQ50 DDRA_DQ51 DDRA_DQ52 DDRA_DQ53 DDRA_DQ54 DDRA_DQ55 DDRA_DQ56 DDRA_DQ57 DDRA_DQ58 DDRA_DQ59 DDRA_DQ60 DDRA_DQ61 DDRA_DQ62 DDRA_DQ63

4

UC1B

AL71

DDR0_DQ[0]

AL68

DDR0_DQ[1]

AN68

DDR0_DQ[2]

AN69

DDR0_DQ[3]

AL70

DDR0_DQ[4]

AL69

DDR0_DQ[5]

AN70

DDR0_DQ[6]

AN71

DDR0_DQ[7]

AR70

DDR0_DQ[8]

AR68

DDR0_DQ[9]

AU71

DDR0_DQ[10]

AU68

DDR0_DQ[11]

AR71

DDR0_DQ[12]

AR69

DDR0_DQ[13]

AU70

DDR0_DQ[14]

AU69

DDR0_DQ[15]

BB65

DDR0_DQ[16]/DDR0_DQ[32]

AW65

DDR0_DQ[17]/DDR0_DQ[33]

AW63

DDR0_DQ[18]/DDR0_DQ[34]

AY63

DDR0_DQ[19]/DDR0_DQ[35]

BA65

DDR0_DQ[20]/DDR0_DQ[36]

AY65

DDR0_DQ[21]/DDR0_DQ[37]

BA63

DDR0_DQ[22]/DDR0_DQ[38]

BB63

DDR0_DQ[23]/DDR0_DQ[39]

BA61

DDR0_DQ[24]/DDR0_DQ[40]

AW61

DDR0_DQ[25]/DDR0_DQ[41]

BB59

DDR0_DQ[26]/DDR0_DQ[42]

AW59

DDR0_DQ[27]/DDR0_DQ[43]

BB61

DDR0_DQ[28]/DDR0_DQ[44]

AY61

DDR0_DQ[29]/DDR0_DQ[45]

BA59

DDR0_DQ[30]/DDR0_DQ[46]

AY59

DDR0_DQ[31]/DDR0_DQ[47]

AY39

DDR0_DQ[32]/DDR1_DQ[0]

AW39

DDR0_DQ[33]/DDR1_DQ[1]

AY37

DDR0_DQ[34]/DDR1_DQ[2]

AW37

DDR0_DQ[35]/DDR1_DQ[3]

BB39

DDR0_DQ[36]/DDR1_DQ[4]

BA39

DDR0_DQ[37]/DDR1_DQ[5]

BA37

DDR0_DQ[38]/DDR1_DQ[6]

BB37

DDR0_DQ[39]/DDR1_DQ[7]

AY35

DDR0_DQ[40]/DDR1_DQ[8]

AW35

DDR0_DQ[41]/DDR1_DQ[9]

AY33

DDR0_DQ[42]/DDR1_DQ[10]

AW33

DDR0_DQ[43]/DDR1_DQ[11]

BB35

DDR0_DQ[44]/DDR1_DQ[12]

BA35

DDR0_DQ[45]/DDR1_DQ[13]

BA33

DDR0_DQ[46]/DDR1_DQ[14]

BB33

DDR0_DQ[47]/DDR1_DQ[15]

AY31

DDR0_DQ[48]/DDR1_DQ[32]

AW31

DDR0_DQ[49]/DDR1_DQ[33]

AY29

DDR0_DQ[50]/DDR1_DQ[34]

AW29

DDR0_DQ[51]/DDR1_DQ[35]

BB31

DDR0_DQ[52]/DDR1_DQ[36]

BA31

DDR0_DQ[53]/DDR1_DQ[37]

BA29

DDR0_DQ[54]/DDR1_DQ[38]

BB29

DDR0_DQ[55]/DDR1_DQ[39]

AY27

DDR0_DQ[56]/DDR1_DQ[40]

AW27

DDR0_DQ[57]/DDR1_DQ[41]

AY25

DDR0_DQ[58]/DDR1_DQ[42]

AW25

DDR0_DQ[59]/DDR1_DQ[43]

BB27

DDR0_DQ[60]/DDR1_DQ[44]

BA27

DDR0_DQ[61]/DDR1_DQ[45]

BA25

DDR0_DQ[62]/DDR1_DQ[46]

BB25

DDR0_DQ[63]/DDR1_DQ[47]

SKYLAKE-U_BGA1356

REV = 1 @

?

SKL_ULT

DDR0_MA[5]/DDR0_CAA[0]/DDR0_MA[5] DDR0_MA[9]/DDR0_CAA[1]/DDR0_MA[9] DDR0_MA[6]/DDR0_CAA[2]/DDR0_MA[6] DDR0_MA[8]/DDR0_CAA[3]/DDR0_MA[8] DDR0_MA[7]/DDR0_CAA[4]/DDR0_MA[7]

DDR0_BA[2]/DDR0_CAA[5]/DDR0_BG[0] DDR0_MA[12]/DDR0_CAA[6]/DDR0_MA[12] DDR0_MA[11]/DDR0_CAA[7]/DDR0_MA[11]

DDR0_MA[15]/DDR0_CAA[8]/DDR0_ACT# DDR0_MA[14]/DDR0_CAA[9]/DDR0_BG[1]

DDR0_MA[13]/DDR0_CAB[0]/DDR0_MA[13]

DDR0_CAS#/DDR0_CAB[1]/DDR0_MA[15]

DDR0_WE#/DDR0_CAB[2]/DDR0_MA[14]

DDR0_RAS#/DDR0_CAB[3]/DDR0_MA[16]

DDR0_BA[0]/DDR0_CAB[4]/DDR0_BA[0]

DDR0_MA[2]/DDR0_CAB[5]/DDR0_MA[2]

DDR0_BA[1]/DDR0_CAB[6]/DDR0_BA[1] DDR0_MA[10]/DDR0_CAB[7]/DDR0_MA[10]

DDR0_MA[1]/DDR0_CAB[8]/DDR0_MA[1] DDR0_MA[0]/DDR0_CAB[9]/DDR0_MA[0]

DDR0_DQSN[2]/DDR0_DQSN[4] DDR0_DQSP[2]/DDR0_DQSP[4] DDR0_DQSN[3]/DDR0_DQSN[5] DDR0_DQSP[3]/DDR0_DQSP[5] DDR0_DQSN[4]/DDR1_DQSN[0] DDR0_DQSP[4]/DDR1_DQSP[0] DDR0_DQSN[5]/DDR1_DQSN[1] DDR0_DQSP[5]/DDR1_DQSP[1] DDR0_DQSN[6]/DDR1_DQSN[4] DDR0_DQSP[6]/DDR1_DQSP[4] DDR0_DQSN[7]/DDR1_DQSN[5] DDR0_DQSP[7]/DDR1_DQSP[5]

DDR CH - A

1 OF 20

DDR0_CKN[0] DDR0_CKP[0] DDR0_CKN[1] DDR0_CKP[1]

DDR0_CKE[0] DDR0_CKE[1] DDR0_CKE[2] DDR0_CKE[3]

DDR0_CS#[0] DDR0_CS#[1] DDR0_ODT[0] DDR0_ODT[1]

DDR0_MA[3] DDR0_MA[4]

DDR0_DQSN[0] DDR0_DQSP[0] DDR0_DQSN[1] DDR0_DQSP[1]

DDR0_ALERT#

DDR0_PAR

DDR_VREF_CA DDR0_VREF_DQ DDR1_VREF_DQ

DDR_VTT_CNTL

3

AU53 AT53 AU55 AT55

BA56 BB56 AW56 AY56

AU45 AU43 AT45 AT43

BA51 BB54 BA52 AY52 AW52 AY55 AW54 BA54 BA55 AY54

AU46 AU48 AT46 AU50 AU52 AY51 AT48 AT50 BB50 AY50 BA50 BB52

DDRA_DQS#0

AM70

DDRA_DQS0

AM69

DDRA_DQS#1

AT69

DDRA_DQS1

AT70

DDRA_DQS#2

BA64

DDRA_DQS2

AY64

DDRA_DQS#3

AY60

DDRA_DQS3

BA60

DDRA_DQS#4

BA38

DDRA_DQS4

AY38

DDRA_DQS#5

AY34

DDRA_DQS5

BA34

DDRA_DQS#6

BA30

DDRA_DQS6

AY30

DDRA_DQS#7

AY26

DDRA_DQS7

BA26 AW50

AT52 AY67

AY68 BA67

DDR_VTT_CNTL

AW67

?

DDRA_CLK0# 17 DDRA_CLK0 17

DDRA_CKE0 17

DDRA_CS0# 17 DDRA_ODT0 17

DDRA_MA5 17 DDRA_MA9 17 DDRA_MA6 17 DDRA_MA8 17 DDRA_MA7 17 DDRA_BG0 17 DDRA_MA12 17 DDRA_MA11 17 DDRA_ACT# 17

DDRA_MA13 17 DDRA_MA15_CAS# 17 DDRA_MA14_WE# 17 DDRA_MA16_RAS# 17 DDRA_BS0# 17 DDRA_MA2 17 DDRA_BS1# 17 DDRA_MA10 17 DDRA_MA1 17 DDRA_MA0 17 DDRA_MA3 17 DDRA_MA4 17

DDRA_ALERT# 17

DDRA_PAR 17 DDR_SA_VREFCA 17 DDR_SB_VREFCA 18

DDRA_DQS#[0..7] DDRA_DQS[0..7]

2

DDRA_DQS#[0..7] 17 DDRA_DQS[0..7] 17

SMVREF

WIDTH:20MIL SPACING: 20MIL

1

B B

+3VALW

12

RC30 100K_0402_5%

+1.2V

C

QC18

RC3

1 2

1K_0402_5%

DDR_VTT_CNTL

A A

5

4

2

B

RC29

10K_0402_5%

E

3 1

MMBT3904WH_SOT323-3

@

1 2

CPU_DRAMPG_CNTL 55

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

3

2015/08/20

LC Future Center Secret Data

Deciphered Date

2

2016/08/20

Title

MCP (DDR4)

Size

Document Number Re v

Custom

Thursday, January 14, 2016

Date: Sheet of

Thursday, January 14, 2016

CG411

1

560

1.0

5

DDRB_DQ[0..63]18

D D

C C

B B

DDRB_DQ0 DDRB_DQ1 DDRB_DQ2 DDRB_DQ3 DDRB_DQ4 DDRB_DQ5 DDRB_DQ6 DDRB_DQ7 DDRB_DQ8 DDRB_DQ9 DDRB_DQ10 DDRB_DQ11 DDRB_DQ12 DDRB_DQ13 DDRB_DQ14 DDRB_DQ15 DDRB_DQ16 DDRB_DQ17 DDRB_DQ18 DDRB_DQ19 DDRB_DQ20 DDRB_DQ21 DDRB_DQ22 DDRB_DQ23 DDRB_DQ24 DDRB_DQ25 DDRB_DQ26 DDRB_DQ27 DDRB_DQ28 DDRB_DQ29 DDRB_DQ30 DDRB_DQ31 DDRB_DQ32 DDRB_DQ33 DDRB_DQ34 DDRB_DQ35 DDRB_DQ36 DDRB_DQ37 DDRB_DQ38 DDRB_DQ39 DDRB_DQ40 DDRB_DQ41 DDRB_DQ42 DDRB_DQ43 DDRB_DQ44 DDRB_DQ45 DDRB_DQ46 DDRB_DQ47 DDRB_DQ48 DDRB_DQ49 DDRB_DQ50 DDRB_DQ51 DDRB_DQ52 DDRB_DQ53 DDRB_DQ54 DDRB_DQ55 DDRB_DQ56 DDRB_DQ57 DDRB_DQ58 DDRB_DQ59 DDRB_DQ60 DDRB_DQ61 DDRB_DQ62 DDRB_DQ63

4

?

UC1C

AF65

DDR1_DQ[0]/DDR0_DQ[16]

AF64

DDR1_DQ[1]/DDR0_DQ[17]

AK65

DDR1_DQ[2]/DDR0_DQ[18]

AK64

DDR1_DQ[3]/DDR0_DQ[19]

AF66

DDR1_DQ[4]/DDR0_DQ[20]

AF67

DDR1_DQ[5]/DDR0_DQ[21]

AK67

DDR1_DQ[6]/DDR0_DQ[22]

AK66

DDR1_DQ[7]/DDR0_DQ[23]

AF70

DDR1_DQ[8]/DDR0_DQ[24]

AF68

DDR1_DQ[9]/DDR0_DQ[25]

AH71

DDR1_DQ[10]/DDR0_DQ[26]

AH68

DDR1_DQ[11]/DDR0_DQ[27]

AF71

DDR1_DQ[12]/DDR0_DQ[28]

AF69

DDR1_DQ[13]/DDR0_DQ[29]

AH70

DDR1_DQ[14]/DDR0_DQ[30]

AH69

DDR1_DQ[15]/DDR0_DQ[31]

AT66

DDR1_DQ[16]/DDR0_DQ[48]

AU66

DDR1_DQ[17]/DDR0_DQ[49]

AP65

DDR1_DQ[18]/DDR0_DQ[50]

AN65

DDR1_DQ[19]/DDR0_DQ[51]

AN66

DDR1_DQ[20]/DDR0_DQ[52]

AP66

DDR1_DQ[21]/DDR0_DQ[53]

AT65

DDR1_DQ[22]/DDR0_DQ[54]

AU65

DDR1_DQ[23]/DDR0_DQ[55]

AT61

DDR1_DQ[24]/DDR0_DQ[56]

AU61

DDR1_DQ[25]/DDR0_DQ[57]

AP60

DDR1_DQ[26]/DDR0_DQ[58]

AN60

DDR1_DQ[27]/DDR0_DQ[59]

AN61

DDR1_DQ[28]/DDR0_DQ[60]

AP61

DDR1_DQ[29]/DDR0_DQ[61]

AT60

DDR1_DQ[30]/DDR0_DQ[62]

AU60

DDR1_DQ[31]/DDR0_DQ[63]

AU40

DDR1_DQ[32]/DDR1_DQ[16]

AT40

DDR1_DQ[33]/DDR1_DQ[17]

AT37

DDR1_DQ[34]/DDR1_DQ[18]

AU37

DDR1_DQ[35]/DDR1_DQ[19]

AR40

DDR1_DQ[36]/DDR1_DQ[20]

AP40

DDR1_DQ[37]/DDR1_DQ[21]

AP37

DDR1_DQ[38]/DDR1_DQ[22]

AR37

DDR1_DQ[39]/DDR1_DQ[23]

AT33

DDR1_DQ[40]/DDR1_DQ[24]

AU33

DDR1_DQ[41]/DDR1_DQ[25]

AU30

DDR1_DQ[42]/DDR1_DQ[26]

AT30

DDR1_DQ[43]/DDR1_DQ[27]

AR33

DDR1_DQ[44]/DDR1_DQ[28]

AP33

DDR1_DQ[45]/DDR1_DQ[29]

AR30

DDR1_DQ[46]/DDR1_DQ[30]

AP30

DDR1_DQ[47]/DDR1_DQ[31]

AU27

DDR1_DQ[48]

AT27

DDR1_DQ[49]

AT25

DDR1_DQ[50]

AU25

DDR1_DQ[51]

AP27

DDR1_DQ[52]

AN27

DDR1_DQ[53]

AN25

DDR1_DQ[54]

AP25

DDR1_DQ[55]

AT22

DDR1_DQ[56]

AU22

DDR1_DQ[57]

AU21

DDR1_DQ[58]

AT21

DDR1_DQ[59]

AN22

DDR1_DQ[60]

AP22

DDR1_DQ[61]

AP21

DDR1_DQ[62]

AN21

DDR1_DQ[63]

SKYLAKE-U_BGA1356

REV = 1 @

SKL_ULT

DDR1_MA[5]/DDR1_CAA[0]/DDR1_MA[5] DDR1_MA[9]/DDR1_CAA[1]/DDR1_MA[9] DDR1_MA[6]/DDR1_CAA[2]/DDR1_MA[6] DDR1_MA[8]/DDR1_CAA[3]/DDR1_MA[8] DDR1_MA[7]/DDR1_CAA[4]/DDR1_MA[7]

DDR1_BA[2]/DDR1_CAA[5]/DDR1_BG[0] DDR1_MA[12]/DDR1_CAA[6]/DDR1_MA[12] DDR1_MA[11]/DDR1_CAA[7]/DDR1_MA[11]

DDR1_MA[15]/DDR1_CAA[8]/DDR1_ACT# DDR1_MA[14]/DDR1_CAA[9]/DDR1_BG[1]

DDR1_MA[13]/DDR1_CAB[0]/DDR1_MA[13]

DDR1_CAS#/DDR1_CAB[1]/DDR1_MA[15]

DDR1_WE#/DDR1_CAB[2]/DDR1_MA[14]

DDR1_RAS#/DDR1_CAB[3]/DDR1_MA[16]

DDR1_BA[0]/DDR1_CAB[4]/DDR1_BA[0]

DDR1_MA[2]/DDR1_CAB[5]/DDR1_MA[2]

DDR1_BA[1]/DDR1_CAB[6]/DDR1_BA[1] DDR1_MA[10]/DDR1_CAB[7]/DDR1_MA[10]

DDR1_MA[1]/DDR1_CAB[8]/DDR1_MA[1] DDR1_MA[0]/DDR1_CAB[9]/DDR1_MA[0]

DDR1_DQSN[0]/DDR0_DQSN[2]

DDR1_DQSP[0]/DDR0_DQSP[2]

DDR1_DQSN[1]/DDR0_DQSN[3]

DDR1_DQSP[1]/DDR0_DQSP[3]

DDR1_DQSN[2]/DDR0_DQSN[6]

DDR1_DQSP[2]/DDR0_DQSP[6]

DDR1_DQSN[3]/DDR0_DQSN[7]

DDR1_DQSP[3]/DDR0_DQSP[7]

DDR1_DQSN[4]/DDR1_DQSN[2]

DDR1_DQSP[4]/DDR1_DQSP[2]

DDR1_DQSN[5]/DDR1_DQSN[3]

DDR1_DQSP[5]/DDR1_DQSP[3]

DDR CH - B

1 OF 20

3

DDR1_CKN[0] DDR1_CKN[1] DDR1_CKP[0] DDR1_CKP[1]

DDR1_CKE[0] DDR1_CKE[1] DDR1_CKE[2] DDR1_CKE[3]

DDR1_CS#[0] DDR1_CS#[1] DDR1_ODT[0] DDR1_ODT[1]

DDR1_MA[3] DDR1_MA[4]

DDR1_DQSN[6] DDR1_DQSP[6] DDR1_DQSN[7] DDR1_DQSP[7]

DDR1_ALERT#

DDR1_PAR

DRAM_RESET# DDR_RCOMP[0] DDR_RCOMP[1] DDR_RCOMP[2]

2

AN45 AN46 AP45 AP46

AN56 AP55 AN55 AP53

BB42 AY42 BA42 AW42

AY48 AP50 BA48 BB48 AP48 AP52 AN50 AN48 AN53 AN52

BA43 AY43 AY44 AW44 BB44 AY47 BA44 AW46 AY46 BA46 BB46 BA47

DDRB_DQS#0

AH66

DDRB_DQS0

AH65

DDRB_DQS#1

AG69

DDRB_DQS1

AG70

DDRB_DQS#2

AR66

DDRB_DQS2

AR65

DDRB_DQS#3

AR61

DDRB_DQS3

AR60

DDRB_DQS#4

AT38

DDRB_DQS4

AR38

DDRB_DQS#5

AT32

DDRB_DQS5

AR32

DDRB_DQS#6

AR25

DDRB_DQS6

AR27

DDRB_DQS#7

AR22

DDRB_DQS7

AR21 AN43

AP43

CPU_DRAMRST#_R

AT13

SM_RCOMP_0

AR18

SM_RCOMP_1

AT18

SM_RCOMP_2

AU18

?

DDRB_CLK0# 18 DDRB_CLK1# 18 DDRB_CLK0 18 DDRB_CLK1 18

DDRB_CKE0 18 DDRB_CKE1 18

DDRB_CS0# 18 DDRB_CS1# 18 DDRB_ODT0 18 DDRB_ODT1 18

DDRB_MA5 18 DDRB_MA9 18 DDRB_MA6 18 DDRB_MA8 18 DDRB_MA7 18 DDRB_BG0 18 DDRB_MA12 18 DDRB_MA11 18 DDRB_ACT# 18 DDRB_BG1 18

DDRB_MA13 18 DDRB_MA15_CAS# 18 DDRB_MA14_WE# 18 DDRB_MA16_RAS# 18 DDRB_BS0# 18 DDRB_MA2 18 DDRB_BS1# 18 DDRB_MA10 18 DDRB_MA1 18 DDRB_MA0 18 DDRB_MA3 18 DDRB_MA4 18

DDRB_DQS#[0..7] DDRB_DQS[0..7]

DDRB_ALERT# 18

DDRB_PAR 18

1 2

RC24 121_0402_1%

1 2

RC25 80.6_0402_1%

1 2

RC26 100_0402_1%

DDRB_DQS#[0..7] 18 DDRB_DQS[0..7] 18

1

+1.2V

12

RC22 470_0402_5%

1 2

CPU_DRAMRST#17,18

1

2

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

5

4

3

RC23 0_0402_5%@

CC1

0.01U_0201_25V6-K

EMC_NS@

2015/08/20

LC Future Center Secret Data

Deciphered Date

CPU_DRAMRST#_R

2

2016/08/20

Title

MCP (DDR4)

Size

Document Number Re v

Custom

Thursday, January 14, 2016

Date: Sheet

Thursday, January 14, 2016

CG411

1

660

1.0

of

5

1 2

SPI_CLK44

D D

C C

B B

SPI_SO44

SPI_SI44

SPI_CS0#44

Check with BIOS, SPI is Dual mode or quad mode

SPI_WP#_R

SPI_HOLD#_R

SPI_WP#_R SPI_WP#_1

SPI_HOLD#_R

+3VALW_PCH

SPI_CLK_1

SPI_SO SPI_SO_1

SPI_SI SPI_SI_1

SPI_CS0# SPI_CS0#_R

RC54 15_0402_5%@

RC55 15_0402_5%@

RC176 33_0402_5%@

RC178 33_0402_5%@

Follow CRB, need to check the strap ?

RC1568 20K_0402_5%@ RC1565 20K_0402_5%@ RC1578 20K_0402_5%@ RC1580 20K_0402_5%@

Follow CRB, need to check the strap ?

RC1567 4.7K_0402_5%@ RC1566 4.7K_0402_5%@ RC1581 4.7K_0402_5%@ RC64 1K_0402_5%ES@

RC1539 15_0402_5% RC1538 33_0402_5%@

RC53 15_0402_5% RC177 33_0402_5%@

RC52 15_0402_5% RC175 33_0402_5%@

RC51 0_0402_5%@ RC174 0_0402_5%@

1 2

12 12 12 12

12 12 12

1 2

1 2 1 2

RC60

1K_0402_5%

RC179

1K_0402_5%

+3V_SPI

12

+3V_SPI

12

@

SPI_SO_R SPI_SI_R SPI_WP#_R SPI_HOLD#_R

12

RC61 1K_0402_5%

12

RC180 1K_0402_5%

@

SPI_SO_R

SPI_SI_R

SPI_CS1#_RSPI_CS1#

SPI_WP#

SPI_HOLD#

SPI_HOLD#_1

BOARD_ID48

KBRST#44 SERIRQ32,44

+3VS

+3VALW_PCH

RC171 0_0402_5%@ RC172 0_0402_5%@

*

+3V_SPI

1. If support DS3, connect to +3VS and don't support EC mirror code;

2. If don't support DS3, connect to +3VALW_PCH and support EC mirror code.

SPI_CS0# SPI_SO SPI_WP#

SPI_CS1# SPI_SO_1 SPI_WP#_1

UC3

1

CS#

2

DO

3

WP#

4

GND

W25Q64FVSSIQ_SO8

UC6

1

CS#

2

DO

3

WP#

4

GND

W25Q32FVSSIQ_SO8

@

SPI_CLK_RSPI_CLK SPI_CLK_R SPI_SO_R SPI_SI_R SPI_WP#_R SPI_HOLD#_R SPI_CS0#_R SPI_CS1#_R

BOARD_ID4

KBRST# SERIRQ

1 2 1 2

VCC

HOLD#

CLK

DI

VCC

HOLD#

CLK

DI

4

8 7 6 5

AV2

SPI0_CLK

AW3

SPI0_MISO

AV3

SPI0_MOSI

AW2

SPI0_IO2

AU4

SPI0_IO3

AU3

SPI0_CS0#

AU2

SPI0_CS1#

AU1

SPI0_CS2#

M2

GPP_D1/SPI1_CLK

M3

GPP_D2/SPI1_MISO

J4

GPP_D3/SPI1_MOSI

V1

GPP_D21/SPI1_IO2

V2

GPP_D22/SPI1_IO3

M1

GPP_D0/SPI1_CS#

G3

CL_CLK

G2

CL_DATA

G1

CL_RST#

AW13

GPP_A0/RCIN#

AY11

GPP_A6/SERIRQ

REV = 1 @

+3V_SPI

SPI_HOLD# SPI_CLK SPI_SI

SPI_HOLD#_1 SPI_CLK_1 SPI_SI_1

UC1E

SPI - FLASH

SPI - TOUCH

C LINK

SKYLAKE-U_BGA1356

+3V_SPI

1

2

+3V_SPI

1

CC97

0.1u_0201_10V6K

@

2

CC8

0.1u_0201_10V6K

SKL_ULT

?

SMBUS, SMLINK

GPP_B23/SML1ALERT#/PCHHOT#

LPC

GPP_A14/SUS_STAT#/ESPI_RESET#

GPP_A9/CLKOUT_LPC0/ESPI_CLK

1 OF 20

check CLKRUN# / SUS_STAT# signal if need to connect

PM_CLKRUN#

SERIRQ

KBRST#

GPP_C0/SMBCLK

GPP_C1/SMBDATA

GPP_C2/SMBALERT#

GPP_C3/SML0CLK

GPP_C4/SML0DATA

GPP_C5/SML0ALERT#

GPP_C6/SML1CLK

GPP_C7/SML1DATA

GPP_A1/LAD0/ESPI_IO0 GPP_A2/LAD1/ESPI_IO1 GPP_A3/LAD2/ESPI_IO2 GPP_A4/LAD3/ESPI_IO3

GPP_A5/LFRAME#/ESPI_CS#

GPP_A10/CLKOUT_LPC1

GPP_A8/CLKRUN#

1 2

RC11 8.2K_0402_5%

1 2

RC12 10K_0402_5%

1 2

RC10 10K_0402_5%

1 2

CC1255 1000P_0201_50V7-K

EMC_NS@

+3VALW_PCH +3VS

RPC25

2.2K_0404_4P2R_5%

PCH_SML1_CLK

PCH_SML1_DAT

3

PCH_SMB_CLK

R7

PCH_SMB_DATA

R8

SMB_ALERT#

R10

SML0_CLK

R9

SML0_DATA

W2

SML0_ALERT#

W1

PCH_SML1_CLK

W3

PCH_SML1_DAT

V3

SML1_ALERT#

AM7

AY13 BA13 BB13 AY12 BA12

SUS_STAT#

BA11

CLK_PCI_EC_R

AW9

CLK_PCI_TPM_R

AY9

PM_CLKRUN#

AW11

?

1 4

2 3

QC10A

2N7002KDWH_SOT363-6

DIMM, NGFF

GPU, EC, Thermal Sensor

LPC_AD0 32,44 LPC_AD1 32,44 LPC_AD2 32,44 LPC_AD3 32,44 LPC_FRAME# 32,44

RC173 22_0402_5% RC1541 22_0402_5%TPM@

+3VS

2

G

6 1

@

S

D

5

G

3 4

QC10B

D

2N7002KDWH_SOT363-6

1

12 12

@

S

TC81@

CLK_PCI_EC 44 CLK_PCI_TPM 32

PM_CLKRUN# 32

EC_SMB_CK2 39,44

EC_SMB_DA2 39,44

2

+3VALW_PCH +3VS +3VS

RPC20

2.2K_0404_4P2R_5%

PCH_SMB_CLK

PCH_SMB_DATA

2

G

1 4

2 3

SML0_ALERT#

SML1_ALERT#

To enable D irect Co nnect Inter face (DC I), a 150K pull up resi stor will need to be added to PCHHOT# pin. This pin must be low during the rising edge of RSMRST#. (Refer to WW52_MOW)

6 1

QC2A

2N7002KDWH_SOT363-6

SMB_ALERT#

SML0_CLK SML0_DATA

This signal has a weak internal pull-down. 0 = LPC Is selected for EC. (Default) 1 = eSPI Is selected for EC. Notes:

1. The internal pull-down is disabled after RSMRST# de-asserts.

2. This signal is in the primary wel Rising edge of RSMRST#

S

D

RC1564 2.2K_0402_5%@

RC1569 150K_0402_5%

5

G

3 4

QC2B

D

2N7002KDWH_SOT363-6

2.2K_0402_5%

RPC23

2.2K_0404_4P2R_5%

1 2

12

S

12

14 23

RPC24

2.2K_0404_4P2R_5%

1 4

2 3

+3VALW_PCH

RC1562

+3VALW_PCH

1

SMB_CLK_S3 18,40

SMB_DATA_S3 18,40

+3VALW_PCH

Based on WW36 SKL U&Y WOM, RC64 populated,

and RC61 de-populated for SKL U ES sample. In this case, customers must ensure that the

A A

SPI flash device on the platform has HOLD functionality disabled by default.

5

Title

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

4

3

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

2015/08/20

LC Future Center Secret Data

Deciphered Date

2

2016/08/20

Title

MCP (MISC,JTAG,SPI,LPC,SMB)

Size

Document Number Re v

Custom

Date: Sheet

Thursday, January 14, 2016

1

CG411

760

1.0

of

5

4

3

2

1

+3VS

RC1608

1 2

10K_0402_5%

SINGLEMIC@

RC1607

1 2

10K_0402_5%

+3VS

12

RC1639

10K_0402_5%

12

RC1640

10K_0402_5%

DUALMIC@

RC1614

@

RC1606

1 2

10K_0402_5%

RC123

10K_0402_5%

1 2

?

UC1F

AN8

GPP_B15/GSPI0_CS#

AP7

GPP_B16/GSPI0_CLK

AP8

1 2

RC1561 2.2K_0402_5%@

+3VS

D D

1 2

RC1558 10K_0402_5%UMA@

+3VS

RC1595 10K_0402_5%@

C C

+3VALW_PCH

RC1596 10K_0402_5% RC1597 10K_0402_5%

double check if need the pull up resisor

+3VS

*

HDA_SDO This signal has a weak internal pull-down. 0 = Enable security measures defined in the Flash Descriptor. 1 = Disable Flash Descriptor Security(override). This strap should only be asserted high during external pull-up in manufacturing/debug environments ONLY.

12 12 12

1 2

RC1600 1K_0402_5%@

1 2

RC47 1K_0402_5%@

For EMI

1

CC7 10P_0201_50V8F

EMC_NS@

B B

2

HDA_SDOUT_AUDIO43 ME_FLASH44

DGPU_PWROK

PCH_CMOS_ON# PCH_WLAN_OFF# PCH_BT_OFF#

HDA_SDOUT

HDA_SDIN0

1 2

RC45 33_0402_5%

1 2

RC46 0_0402_5%@

PCH_CMOS_ON#33

UART_RX_DEBUG40 UART_TX_DEBUG40

PCH_WLAN_OFF#40 PCH_BT_OFF#40

HDA_SDOUT

1 2

RC1563 2.2K_0402_5%@

1 2

HDA_SYNC_AUDIO43 HDA_BITCLK_AUDIO43

HDA_SDIN043 HDA_RST_AUDIO#43

PCH_BEEP43

RC43 33_0402_5%

1 2

RC42 33_0402_5%

1 2

RC44 33_0402_5%

GPP_B18

PCH_CMOS_ON# GPP_B22

DGPU_PWROK

PCH_WLAN_OFF# PCH_BT_OFF#

+3VS

RC14 2.2K_0402_5%@

HDA_SYNC HDA_BCLK HDA_SDOUT HDA_SDIN0

HDA_RST#

BOARD_ID9

PCH_BEEP

1 2

GPP_B17/GSPI0_MISO

AR7

GPP_B18/GSPI0_MOSI

AM5

GPP_B19/GSPI1_CS#

AN7

GPP_B20/GSPI1_CLK

AP5

GPP_B21/GSPI1_MISO

AN5

GPP_B22/GSPI1_MOSI

AB1

GPP_C8/UART0_RXD

AB2

GPP_C9/UART0_TXD

W4

GPP_C10/UART0_RTS#

AB3

GPP_C11/UART0_CTS#

AD1

GPP_C20/UART2_RXD

AD2

GPP_C21/UART2_TXD

AD3

GPP_C22/UART2_RTS#

AD4

GPP_C23/UART2_CTS#

U7

GPP_C16/I2C0_SDA

U6

GPP_C17/I2C0_SCL

U8

GPP_C18/I2C1_SDA

U9

GPP_C19/I2C1_SCL

AH9

GPP_F4/I2C2_SDA

AH10

GPP_F5/I2C2_SCL

AH11

GPP_F6/I2C3_SDA

AH12

GPP_F7/I2C3_SCL

AF11

GPP_F8/I2C4_SDA

AF12

GPP_F9/I2C4_SCL

SKYLAKE-U_BGA1356

REV = 1 @

LPSS ISH

UC1G

AUDIO

BA22

HDA_SYNC/I2S0_SFRM

AY22

HDA_BLK/I2S0_SCLK

BB22

HDA_SDO/I2S0_TXD

BA21

HDA_SDI0/I2S0_RXD

AY21

HDA_SDI1/I2S1_RXD

AW22

HDA_RST#/I2S1_SCLK

J5

GPP_D23/I2S_MCLK

AY20

I2S1_SFRM

AW20

I2S1_TXD

AK7

GPP_F1/I2S2_SFRM

AK6

GPP_F0/I2S2_SCLK

AK9

GPP_F2/I2S2_TXD

AK10

GPP_F3/I2S2_RXD

H5

GPP_D19/DMIC_CLK0

D7

GPP_D20/DMIC_DATA0

D8

GPP_D17/DMIC_CLK1

C8

GPP_D18/DMIC_DATA1

AW5

GPP_B14/SPKR

SKYLAKE-U_BGA1356

REV = 1 @

PCH_BEEP

SKL_ULT

GPP_D5/ISH_I2C0_SDA GPP_D6/ISH_I2C0_SCL

GPP_D7/ISH_I2C1_SDA GPP_D8/ISH_I2C1_SCL

GPP_F10/I2C5_SDA/ISH_I2C2_SDA

GPP_F11/I2C5_SCL/ISH_I2C2_SCL

GPP_D13/ISH_UART0_RXD/SML0BDATA/I2C4B_SDA

GPP_D14/ISH_UART0_TXD/SML0BCLK/I2C4B_SCL

GPP_D16/ISH_UART0_CTS#/SML0BALERT#

GPP_C12/UART1_RXD/ISH_UART1_RXD

GPP_C14/UART1_RTS#/ISH_UART1_RTS# GPP_C15/UART1_CTS#/ISH_UART1_CTS#

1 OF 20

?

SKL_ULT

1 OF 20

GPP_D15/ISH_UART0_RTS#

GPP_C13/UART1_TXD/ISH_UART1_TXD

GPP_A12/BM_BUSY#/ISH_GP6

SDIO/SDXC

GPP_G1/SD_DATA0 GPP_G2/SD_DATA1 GPP_G3/SD_DATA2 GPP_G4/SD_DATA3

GPP_A17/SD_PWR_EN#/ISH_GP7

GPP_A16/SD_1P8_SEL

GPP_D9 GPP_D10 GPP_D11 GPP_D12

GPP_A18/ISH_GP0 GPP_A19/ISH_GP1 GPP_A20/ISH_GP2 GPP_A21/ISH_GP3 GPP_A22/ISH_GP4 GPP_A23/ISH_GP5

GPP_G0/SD_CMD

GPP_G5/SD_CD# GPP_G6/SD_CLK

GPP_G7/SD_WP

SD_RCOMP

GPP_F23

?

AB11 AB13 AB12 W12 W11 W10 W8 W7

BA9 BB9

AB7

AF13

P2 P3 P4 P1

M4 N3

N1 N2

AD11 AD12

U1 U2 U3 U4

AC1 AC2 AC3 AB4

AY8 BA8 BB7 BA7 AY7 AW7 AP13

SD_RCOMP

BOARD_ID0 BOARD_ID1

BOARD_ID3 BOARD_ID6

BOARD_ID5 BOARD_ID7

BOARD_ID8

12

RC49 200_0402_1%

17@

BOARD_ID0 BOARD_ID1

BOARD_ID29 BOARD_ID47

BOARD_ID2 BOARD_ID3 BOARD_ID4 BOARD_ID5

14or15@

15@

RC1615

1 2

10K_0402_5%

14or17@

RC1616

1 2

10K_0402_5%

TS@

RC1613

1 2

10K_0402_5%

NTS@

RC1614

1 2

10K_0402_5%

RC1611

1 2

10K_0402_5%

RC1612

1 2

10K_0402_5%

Board ID Description

00

Board_ID[0:1]

01 10 11

Board_ID2 Non-touch

0 1

Board_ID3 UMA

0 1

Board_ID4

0 1

Board_ID5 SingleMIC

0 1

BOARD_ID6 BOARD_ID7 BOARD_ID8 BOARD_ID9

12

@

RC1631

10K_0402_5%

12

@

RC1634

10K_0402_5%

12

@

RC1632

10K_0402_5%

12

@

RC1635

10K_0402_5%

DUALRANK@

OPT@

RC1609

1 2

10K_0402_5%

SINGLERANK@

UMA@

RC1610

1 2

10K_0402_5%

Stuff R 14" 15" 17"

RC1616

RC1616 RC1613

RC1615 Reserved

RC1612 Touch

RC1611

RC1610 DIS

RC1609 SingleRankRC1607 DualRank

RC1608

RC123 DualMIC

510Z@

12

RC1633

10K_0402_5%

310G@

12

RC1636

10K_0402_5%

RC1606

DescriptionBoard ID

Pin Name Strap Description Configuration

Internal PD

SPKR / GPP_B14

GSPI0_MOSI /GPP_B18

A A

GSPI1_MOSI /GPP_B22

Top Swap Override

No Reboot

Boot BIOS Strap Bit BBS

5

0 = Disable “ Top Swap” mode. (Default) 1 = Enable “ Top Swap” mode.

Internal PD 0 = Disable “ No Reboot” mode. (Default)

1 = Enable “ No Reboot” mode

Internal PD 0 = SPI (Default) 1 = LPC

Default Value

*

When Sampled

Rising edge

0

of PCH_PWROK

0*Rising edge

of PCH_PWROK

Rising edge

0

of PCH_PWROK

Board_ID[6:7]

Board_ID8

BOARD_ID9

Title

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

4

3

2015/08/20

LC Future Center Secret Data

Deciphered Date

2

2016/08/20

Title

MCP (LPSS,ISH,AUDIO,SDIO)

Size

Document Number Re v

Custom

Thursday, January 14, 2016

Date: Sheet

Thursday, January 14, 2016

00

Samsung 8Gb

Hynix 8Gb RC1632RC1634

01

10

Micron 8Gb

11

Reserved

0

310G

1

510Z

0

Reserved

1

CG411

1

Stuff R

RC1635RC1634

RC1635RC1631

RC1632RC1631

RC1636

RC1633

of

860

1.0

5

4

3

2

1

D D

UC1H

PCIE/USB3/SATA

H13

PCIE1_RXN/USB3_5_RXN

G13

PCIE1_RXP/USB3_5_RXP

B17

PCIE1_TXN/USB3_5_TXN

A17

PCIE1_TXP/USB3_5_TXP

G11

PCIE2_RXN/USB3_6_RXN

F11

PCIE2_RXP/USB3_6_RXP

D16

PCIE2_TXN/USB3_6_TXN

C16

PCIE2_TXP/USB3_6_TXP

H16

PCIE3_RXN

G16

PCIE3_RXP

D17

PCIE3_TXN

C17

PCIE3_TXP

G15

PCIE4_RXN

F15

PCIE4_RXP

B19

PCIE4_TXN

A19

PCIE_PRX_DTX_N537

C C

LAN

WLAN

SATA HDD

SATA ODD

DGPU

B B

PCIE_PRX_DTX_P537 PCIE_PTX_C_DRX_N537 PCIE_PTX_C_DRX_P537

PCIE_PRX_DTX_N640 PCIE_PRX_DTX_P640 PCIE_PTX_C_DRX_N640 PCIE_PTX_C_DRX_P640

SATA_PRX_DTX_N042 SATA_PRX_DTX_P042 SATA_PTX_DRX_N042 SATA_PTX_DRX_P042

SATA_PRX_DTX_N142 SATA_PRX_DTX_P142 SATA_PTX_DRX_N142 SATA_PTX_DRX_P142

RC119 100_0402_1%

PCIE_RCOMPN and PCIE_RCOMPP Trace Width: 12-15mil Differential between RCOMPP/RCOMPN

1 2

CC22 0.1u_0201_10V6K

1 2

CC23 0.1u_0201_10V6K

1 2

CC24 0.1u_0201_10V6K

1 2

CC25 0.1u_0201_10V6K

1 2

TC20PAD@ TC19PAD@

PCIE_PRX_DTX_N5 PCIE_PRX_DTX_P5 PCIE_PTX_DRX_N5 PCIE_PTX_DRX_P5

PCIE_PRX_DTX_N6 PCIE_PRX_DTX_P6 PCIE_PTX_DRX_N6 PCIE_PTX_DRX_P6

SATA_PRX_DTX_N0 SATA_PRX_DTX_P0 SATA_PTX_DRX_N0 SATA_PTX_DRX_P0

SATA_PRX_DTX_N1 SATA_PRX_DTX_P1 SATA_PTX_DRX_N1 SATA_PTX_DRX_P1

PCIE_RCOMPN PCIE_RCOMPP

XDP_PRDY#

1

XDP_PREQ#

1

PIRQA#

PCIE4_TXP

F16

PCIE5_RXN

E16

PCIE5_RXP

C19

PCIE5_TXN

D19

PCIE5_TXP

G18

PCIE6_RXN

F18

PCIE6_RXP

D20

PCIE6_TXN

C20

PCIE6_TXP

F20

PCIE7_RXN/SATA0_RXN

E20

PCIE7_RXP/SATA0_RXP

B21

PCIE7_TXN/SATA0_TXN

A21

PCIE7_TXP/SATA0_TXP

G21

PCIE8_RXN/SATA1A_RXN

F21

PCIE8_RXP/SATA1A_RXP

D21

PCIE8_TXN/SATA1A_TXN

C21

PCIE8_TXP/SATA1A_TXP

E22

PCIE9_RXN

E23

PCIE9_RXP

B23

PCIE9_TXN

A23

PCIE9_TXP

F25

PCIE10_RXN

E25

PCIE10_RXP

D23

PCIE10_TXN

C23

PCIE10_TXP

F5

PCIE_RCOMPN

E5

PCIE_RCOMPP

D56

PROC_PRDY#

D61

PROC_PREQ#

BB11

GPP_A7/PIRQA#

E28

PCIE11_RXN/SATA1B_RXN

E27

PCIE11_RXP/SATA1B_RXP

D24

PCIE11_TXN/SATA1B_TXN

C24

PCIE11_TXP/SATA1B_TXP

E30

PCIE12_RXN/SATA2_RXN

F30

PCIE12_RXP/SATA2_RXP

A25

PCIE12_TXN/SATA2_TXN

B25

PCIE12_TXP/SATA2_TXP

SKYLAKE-U_BGA1356

REV = 1 @

SKL_ULT

?

1 OF 20

SSIC / USB3

USB3_1_RXN

USB3_1_RXP USB3_1_TXN USB3_1_TXP

USB3_2_RXN/SSIC_1_RXN

USB3_2_RXP/SSIC_1_RXP

USB3_2_TXN/SSIC_1_TXN USB3_2_TXP/SSIC_1_TXP

USB3_3_RXN/SSIC_2_RXN

USB3_3_RXP/SSIC_2_RXP

USB3_3_TXN/SSIC_2_TXN USB3_3_TXP/SSIC_2_TXP

USB3_4_RXN

USB3_4_RXP USB3_4_TXN USB3_4_TXP

USB2

USB2_COMP

USB2_VBUSSENSE

GPP_E9/USB2_OC0# GPP_E10/USB2_OC1# GPP_E11/USB2_OC2# GPP_E12/USB2_OC3#

GPP_E4/DEVSLP0 GPP_E5/DEVSLP1 GPP_E6/DEVSLP2

GPP_E0/SATAXPCIE0/SATAGP0 GPP_E1/SATAXPCIE1/SATAGP1 GPP_E2/SATAXPCIE2/SATAGP2

GPP_E8/SATALED#

USB2N_1

USB2P_1

USB2N_2

USB2P_2

USB2N_3

USB2P_3

USB2N_4

USB2P_4

USB2N_5

USB2P_5

USB2N_6

USB2P_6

USB2N_7

USB2P_7

USB2N_8

USB2P_8

USB2N_9

USB2P_9

USB2N_10 USB2P_10

USB2_ID

?

USB30_RX_N1

H8

USB30_RX_P1

G8

USB30_TX_N1

C13

USB30_TX_P1

D13

USB30_RX_N2

J6

USB30_RX_P2

H6

USB30_TX_N2

B13

USB30_TX_P2

A13 J10

H10 B15 A15

E10 F10 C15 D15

USB20_N1

AB9

USB20_P1

AB10

USB20_N2

AD6

USB20_P2

AD7

USB20_N3

AH3

USB20_P3

AJ3

USB20_N4

AD9

USB20_P4

AD10

USB20_N5

AJ1

USB20_P5

AJ2

USB20_N6

AF6

USB20_P6

AF7

USB20_N7

AH1

USB20_P7

AH2 AF8

AF9 AG1

AG2 AH7

AH8

USB2_COMP

AB6

USB2_ID

AG3

USB2_VBUSSENSE

AG4

USB_OC0#

A9

USB_OC1#

C9

USB_OC2#

D9

USB_OC3#

B9

GPP_E4

J1

GPP_E5

J2 J3

H2

SATA0GP ODD_DETECT#

H3 G4

SATA2GP BOARD_ID2

H1

RC118 113_0402_1% RC1626 0_0402_5%@ RC1627 1K_0402_5%

1 2

RC1628 0_0402_5%@

USB30_RX_N1 41

USB30_RX_P1 41 USB30_TX_N1 41

USB30_TX_P1 41

USB30_RX_N2 45 USB30_RX_P2 45 USB30_TX_N2 45 USB30_TX_P2 45

USB20_N1 41 USB20_P1 41

USB20_N2 45 USB20_P2 45

USB20_N3 45 USB20_P3 45

USB20_N4 33 USB20_P4 33

USB20_N5 30 USB20_P5 30

USB20_N6 33 USB20_P6 33

USB20_N7 40 USB20_P7 40

1 2 1 2

USB_OC1# 41 USB_OC2# 45

BOARD_ID2 8

LEFT USB (3.0)

Right USB (3.0) (Optional)

LEFT USB (3.0) RIGHT USB (2.0) RIGHT USB (2.0) Camera Card reader Touch panel BT

12

1

EC_SMI# 44

TC202PAD@

+3VS

USBRBIAS

Width 20Mil Space 15Mil Length 500Mil

+3VALW_PCH

+3VS

A A

5

RPC2

1 8 2 7 3 6 4 5

10K_0804_8P4R_5%

ODD_DETECT# SATA0GP SATA2GP PIRQA#

4

USB_OC0# USB_OC1# USB_OC3# USB_OC2#

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

3

RPC17

18 27 36 45

10K_0804_8P4R_5%

2015/08/20

LC Future Center Secret Data

Deciphered Date

GPP_E4

RC1617 10K_0402_5%@

2

2016/08/20

12

Title

MCP (PCIE,SATA,USB3,USB2)

Size

Document Number Re v

Custom

Thursday, January 14, 2016

Date: Sheet

Thursday, January 14, 2016

CG411

1

960

of

1.0

5

4

3

2

1

UC1I

CSI-2

A36

CSI2_DN0

B36

CSI2_DP0

C38

CSI2_DN1

D38

CSI2_DP1

C36

D D

check the Pull up resistor

+3VS

RPC4

1 8 2 7 3 6 4 5

10K_0804_8P4R_5%

C C

PCIE CLK0 DGPU

PCIE CLK4

PCIE CLK5

B B

GPU_CLKREQ# LAN_CLKREQ#

WLAN_CLKREQ#

LAN

WLAN

D42

GPU_CLKREQ#

CLK_PCIE_LAN#37 CLK_PCIE_LAN37 LAN_CLKREQ#37

CLK_PCIE_WLAN#40 CLK_PCIE_WLAN40 WLAN_CLKREQ#40

CLK_PCIE_LAN# CLK_PCIE_LAN LAN_CLKREQ#

CLK_PCIE_WLAN# CLK_PCIE_WLAN WLAN_CLKREQ#

C42

AR10

B42 A42 AT7

D41 C41 AT8

D40 C40

AT10

B40 A40

AU8

E40 E38

AU7

CSI2_DN2

D36

CSI2_DP2

A38

CSI2_DN3

B38

CSI2_DP3

C31

CSI2_DN4

D31

CSI2_DP4

C33

CSI2_DN5

D33

CSI2_DP5

A31

CSI2_DN6

B31

CSI2_DP6

A33

CSI2_DN7

B33

CSI2_DP7

A29

CSI2_DN8

B29

CSI2_DP8

C28

CSI2_DN9

D28

CSI2_DP9

A27

CSI2_DN10

B27

CSI2_DP10

C27

CSI2_DN11

D27

CSI2_DP11

SKYLAKE-U_BGA1356

REV = 1 @

UC1J

CLKOUT_PCIE_N0 CLKOUT_PCIE_P0 GPP_B5/SRCCLKREQ0#

CLKOUT_PCIE_N1 CLKOUT_PCIE_P1 GPP_B6/SRCCLKREQ1#

CLKOUT_PCIE_N2 CLKOUT_PCIE_P2 GPP_B7/SRCCLKREQ2#

CLKOUT_PCIE_N3 CLKOUT_PCIE_P3 GPP_B8/SRCCLKREQ3#

CLKOUT_PCIE_N4 CLKOUT_PCIE_P4 GPP_B9/SRCCLKREQ4#

CLKOUT_PCIE_N5 CLKOUT_PCIE_P5 GPP_B10/SRCCLKREQ5#

SKYLAKE-U_BGA1356

REV = 1 @

SKL_ULT

CLOCK SIGNALS

?

GPP_D4/FLASHTRIG

EMMC

GPP_F13/EMMC_DATA0 GPP_F14/EMMC_DATA1 GPP_F15/EMMC_DATA2 GPP_F16/EMMC_DATA3 GPP_F17/EMMC_DATA4 GPP_F18/EMMC_DATA5 GPP_F19/EMMC_DATA6 GPP_F20/EMMC_DATA7

GPP_F21/EMMC_RCLK

GPP_F22/EMMC_CLK

GPP_F12/EMMC_CMD

1 OF 20

?

1 OF 20

CSI2_CLKN0 CSI2_CLKP0 CSI2_CLKN1 CSI2_CLKP1 CSI2_CLKN2 CSI2_CLKP2 CSI2_CLKN3 CSI2_CLKP3

CSI2_COMP

EMMC_RCOMP

?

CLKOUT_ITPXDP_N CLKOUT_ITPXDP_P

GPD8/SUSCLK

XTAL24_OUT

XCLK_BIASREF

C37 D37 C32 D32 C29 D29 B26 A26

E13 B7

AP2 AP1 AP3 AN3 AN1 AN2 AM4 AM1

AM2 AM3 AP4

AT1

XTAL24_IN

RTCX1 RTCX2

SRTCRST#

RTCRST#

?

CSI2_COMP

EMMC_RCOMP

CLK_PCIE_XDP#

F43

CLK_PCIE_XDP

E43 BA17

SUSCLK XTAL24_IN

E37

XTAL24_OUT

E35

DIFFCLK_BIASREF

E42

RTC_X1

AM18

RTC_X2

AM20

SRTC_RST#

AN18

RTC_RST#

AM16

1 2

RC73 100_0402_1%

1 2

RC50 200_0402_1%

1

TC85 @

1

TC87 @

SUSCLK 40

1 2

RC72 2.7K_0402_1%

VCCRTC

1 2

RC33 20K_0402_1%

1 2

RC34 20K_0402_1%

+VCCCLK5

1U_0402_6.3V6K

CC3

CC6

1

2

1

2

SRTC_RST# RTC_RST#

12

JCMOS1 SHORT PADS

@

SUSCLK

DIFFCLK_BIASREF

1 2

RC1624

1 2

RC95 1K_0402_5%@

1 2

RC1555 60.4_0402_1%

Cannonlake@

@

0_0402_5%

EC_RTC_RST# 44

RTC_X1

RTC_X2

2

CC5 7P_0402_50V8J

1

when single end external clock generator used, this pin should be grounded

XTAL24_IN

3.3P_0402_50V8-C

CC12

RC71 1M_0402_5%

YC2

GND12OSC2

1

OSC1

GND2

1

2

24MHZ_6PF_7V24000032

12

YC1

1 2

12

3 4

XTAL24_OUT

1

CC11

3.3P_0402_50V8-C

2

RC32 10M_0402_5%

32.768KHZ_9PF_X1A0001410002

2

CC4 7P_0402_50V8J

1

need to use 38.4MHz (30ohm) for Cannonlake-u

A A

Title

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

5

4

3

2015/08/20

LC Future Center Secret Data

Deciphered Date

2

2016/08/20

Title

MCP (CSI2,EMMC,CLOCK)

Size

Document Number Re v

Custom

Thursday, January 14, 2016

Date: Sheet

Thursday, January 14, 2016

CG411

1

10 60

1.0

of

5

D D

+3VALW

PLT_RST#32,37,40,44

EC_RSMRST#44

VCCST_PWRGD_R

SYS_PWROK44 PCH_PWROK44

SUSWARN#44

SUSACK#44

PCIE_WAKE#37,40,44

Reserve for DS3

RC84 0_0402_5%@ RC85 0_0402_5%@

TC21PAD@

1

RC93 60.4_0402_1% RC139 0_0402_5%@

RC126 0_0402_5%@

RC86 0_0402_5%@ RC79 0_0402_5%@

RC91 0_0402_5%@

4

1 2 1 2

1 2

1 2 1 2

1 2

PLT_RST#_R SYS_RESET# PCH_RSMRST#_R

CPU_PROCPWRGD VCCST_PWRGD

SYS_PWROK_R PCH_PWROK_R PCH_DPWROK_R

SUSWARN#_R SUSACK#_R

WAKE# PCH_LAN_WAKE#

UC1K

SYSTEM POWER MANAGEMENT

AN10

GPP_B13/PLTRST#

B5

SYS_RESET#

AY17

RSMRST#

A68

PROCPWRGD

B65

VCCST_PWRGD

B6

SYS_PWROK

BA20

PCH_PWROK

BB20

DSW_PWROK

AR13

GPP_A13/SUSWARN#/SUSPWRDNACK

AP11

GPP_A15/SUSACK#

BB15

WAKE#

AM15

GPD2/LAN_WAKE#

AW17

GPD11/LANPHYPC

AT15

GPD7/RSVD

SKYLAKE-U_BGA1356

REV = 1 @

3

SKL_ULT

?

1 OF 20

GPP_B12/SLP_S0#

GPD4/SLP_S3# GPD5/SLP_S4#

GPD10/SLP_S5#

SLP_SUS#

SLP_LAN#

GPD9/SLP_WLAN#

GPD6/SLP_A#

GPD3/PWRBTN#

GPD1/ACPRESENT

GPD0/BATLOW#

GPP_A11/PME#

INTRUDER#

GPP_B11/EXT_PWR_GATE#

GPP_B2/VRALERT#

2

AT11

PM_SLP_S3#_R

AP15

PM_SLP_S4#_R

BA16 AY16

PM_SLP_SUS#_R

AN15 AW15 BB17 AN16

PBTN_OUT#_R

BA15

AC_PRESENT_R

AY15 AU13

BATLOW#

AU11

PME#

AP16

INTVRMEN

AM10 AM11

?

1

TC89@

1 2

RC96 0_0402_5%@

1 2

RC97 0_0402_5%@

1 2

RC89 0_0402_5%@

Reserve for DS3

1 2

RC87 0_0402_5%@

RC41 330K_0402_5%

12

PM_SLP_S3# 13,44 PM_SLP_S4# 44

PM_SLP_SUS# 44

PBTN_OUT# 44

VCCRTC

1

1 2

RC74 10K_0402_5%

1 2

RC75 8.2K_0402_5% RC76 1K_0402_5%

1 2

C C

+3VALW_PCH

B B

RC90 10K_0402_5%

1 2

RC78 10K_0402_5%@

+3VS

1 2

RC80 10K_0402_5%

12

1 2

CC12541000P_0201_50V7-K

EMC_NS@

CC1040.01U_0201_10V6K

CC1031000P_0201_50V7-K

EMC_NS@

CC10147P_0201_25V8-J

CC12780.01U_0201_10V6K

AC_PRESENT_R BATLOW# WAKE#

PCH_LAN_WAKE#

SUSWARN#_R

SYS_RESET#

PCH_RSMRST#_R

Stuff to fix Reset&PWRGD test fail issue

PCH_PWROK

PCH_DPWROK_R

SYS_PWROK

EC_RSMRST#

Follow CRB change to 1kohm

1 2

AC_PRESENT44

+VCCST_CPU +VCCSTG

+3VALW

RC136 10K_0402_5%

@

1 2

61

1 2

EC_VCCST_PWRGD44

RC138 0_0402_5%@

1

CC46

0.01U_0201_25V6-K

EMC_NS@

2

D

G

QC6A 2N7002KDWH_SOT363-6

@

S

5

G

RC137 1K_0402_5%

1 2

34

D

QC6B 2N7002KDWH_SOT363-6

@

S

RC1554 1K_0402_5%

@

1 2

VCCST_PWRGD_R

RC88 0_0402_5%@

ACIN#44

2

CC140 1000P_0201_50V7-K

EMC_NS@

1

2

G

AC_PRESENT_R

13

D

QC8 2N7002KW_SOT323-3

@

S

Add to fix Reset&PWRGD test fail issue

1 2

RPC21

1 8 2 7 3 6 4 5

10K_0804_8P4R_5%

PCH_RSMRST#_R PCH_PWROK SYS_PWROK

PM_SLP_S3#

1 2

DC4

RB751V-40_SOD323-2

@

RC1599 0_0402_5%@

1 2

RC92100K_0402_5% RC94100K_0402_1% @

PLT_RST#_R PCH_DPWROK_R

PCH_DPWROK_R

12 12

RC182 0_0402_5%@

1 2

RC81 0_0402_5%@

EC_RSMRST#

DPWROK_EC 44

Reserve for DS3

A A

Title

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

5

4

3

2015/08/20

LC Future Center Secret Data

Deciphered Date

2

2016/08/20

Title

MCP (SYSTEM PWR MANAGEMENT)

Size

Document Number Re v

Custom

Thursday, January 14, 2016

Date: Sheet

Thursday, January 14, 2016

CG411

1

11 60

1.0

of

5

4

3

2

1

+CPU_CORE +CPU_CORE

D D

1

TC90@

3.2A

0.05A

VCCOPC_SENSE VSSOPC_SENSE

VCCEOPIO_SENSE VSSEOPIO_SENSE

RC1641

VCCOPC_SENSE57 VSSOPC_SENSE57

+VCCOPC_1.0V

1 2

U23E@

0_0402_5%

+VCCEOPIO

+1.8VALW +V1.8S_EDRAM

For UMA 2+3e

C C

+CPU_CORE

1

2

@

13x10uF 0402, SIT update to 0603 package

1

CC1086

CC1085

2

10U_0402_6.3V6M

CD@

1

CC1080

2

10U_0603_6.3V6M

A30 A34 A39

A44 AK33 AK35 AK37 AK38 AK40 AL33 AL37 AL40

AM32 AM33 AM35 AM37 AM38

G30

K32 AK32 AB62

P62

V62

H63

G61

AC63

AE63 AE62

AG62

AL63

AJ62

UC1L

VCC_A30 VCC_A34 VCC_A39 VCC_A44 VCC_AK33 VCC_AK35 VCC_AK37 VCC_AK38 VCC_AK40 VCC_AL33 VCC_AL37 VCC_AL40 VCC_AM32 VCC_AM33 VCC_AM35 VCC_AM37 VCC_AM38 VCC_G30

RSVD_K32 RSVD_AK32 VCCOPC_AB62

VCCOPC_P62 VCCOPC_V62

VCC_OPC_1P8_H63 VCC_OPC_1P8_G61 VCCOPC_SENSE

VSSOPC_SENSE VCCEOPIO_AE62

VCCEOPIO_AG62 VCCEOPIO_SENSE

VSSEOPIO_SENSE

SKYLAKE-U_BGA1356

REV = 1 @

1

CC1236

2

SKL_ULT

CPU POWER 1 OF 4

1

CC1237

2

10U_0603_6.3V6M

?

10U_0603_6.3V6M

1 OF 20

1

2

CC1093

10U_0603_6.3V6M

VCC_G32 VCC_G33 VCC_G35 VCC_G37 VCC_G38 VCC_G40 VCC_G42

VCC_J30 VCC_J33 VCC_J37

VCC_J40 VCC_K33 VCC_K35 VCC_K37 VCC_K38 VCC_K40 VCC_K42 VCC_K43

VCC_SENSE VSS_SENSE

VIDALERT#

VIDSCK

VIDSOUT

VCCSTG_G20

1

CC1092

2

10U_0603_6.3V6M

G32 G33 G35 G37 G38 G40 G42 J30 J33 J37 J40 K33 K35 K37 K38 K40 K42 K43

VCORE_VCC_SEN

E32

VCORE_VSS_SEN

E33

CPU_SVID_ALERT#_R

B63

CPU_SVID_CLK_R

A63

CPU_SVID_DAT_R

D64 G20

?

1

CC1091

2

10U_0603_6.3V6M

1

CC1089

2

10U_0603_6.3V6M

VCORE_VCC_SEN

VCORE_VSS_SEN VCCGT_VSS_SEN

VCORE_VCC_SEN 59 VCORE_VSS_SEN 59

+VCCSTG

+VCC_GT

CC1238

10U_0603_6.3V6M

1 2

RC77 100_0402_1%

1 2

RC82 100_0402_1%

VR_SVID_ALRT#59

VR_SVID_CLK59

VR_SVID_DAT59

Backside Cap 8x10uF 0402, SIT update

1

CC1122

2

@

10U_0402_6.3V6M

1

CC1123

10U_0402_6.3V6M

CC1124

2

@

2

@

+CPU_CORE +VCC_GT

SVID

1 2

RC131

56_0402_5%

12

@

+VCCST_CPU

RC1544

100_0402_1%

VCCGT_VCC_SEN

12

RC132

100_0402_1%

1 2

RC133 220_0402_1%

1 2

RC134 0_0402_5%@

1 2

RC1545 0_0402_5%@

1 2

RC83 100_0402_1%

1 2

RC98 100_0402_1%

1

CC42

0.1u_0201_10V6K

@

2

1, Alert# Route Between CLK and Data

10U_0402_6.3V6M

1

CC1126

CC1125

2

10U_0402_6.3V6M

@

10U_0402_6.3V6M

1

2

CD@

1

CC1128

CC1127

10U_0402_6.3V6M

CD@

CC1129

2

10U_0402_6.3V6M

CPU_SVID_ALERT#_R

CPU_SVID_CLK_R

CPU_SVID_DAT_R

VCCGT_VCC_SEN59 VCCGT_VSS_SEN59

VCCGT_VCC_SEN VCCGT_VSS_SEN

+VCC_GT

UC1M

A48

VCCGT_A48

A53

VCCGT_A53

A58

VCCGT_A58

A62

VCCGT_A62

A66

VCCGT_A66

AA63

VCCGT_AA63

AA64

VCCGT_AA64

AA66

VCCGT_AA66

AA67

VCCGT_AA67

AA69

VCCGT_AA69

AA70

VCCGT_AA70

AA71

VCCGT_AA71

AC64

VCCGT_AC64

AC65

VCCGT_AC65

AC66

VCCGT_AC66

AC67

VCCGT_AC67

AC68

VCCGT_AC68

AC69

VCCGT_AC69

AC70

VCCGT_AC70

AC71

VCCGT_AC71

J43

VCCGT_J43

J45

VCCGT_J45

J46

VCCGT_J46

J48

VCCGT_J48

J50

VCCGT_J50

J52

VCCGT_J52

J53

VCCGT_J53

J55

VCCGT_J55

J56

VCCGT_J56

J58

VCCGT_J58

J60

VCCGT_J60

K48

VCCGT_K48

K50

VCCGT_K50

K52

VCCGT_K52

K53

VCCGT_K53

K55

VCCGT_K55

K56

VCCGT_K56

K58

VCCGT_K58

K60

VCCGT_K60

L62

VCCGT_L62

L63

VCCGT_L63

L64

VCCGT_L64

L65

VCCGT_L65

L66

VCCGT_L66

L67

VCCGT_L67

L68

VCCGT_L68

L69

VCCGT_L69

L70

VCCGT_L70

L71

VCCGT_L71

M62

VCCGT_M62

N63

VCCGT_N63

N64

VCCGT_N64

N66

VCCGT_N66

N67

VCCGT_N67

N69

VCCGT_N69

J70

VCCGT_SENSE

J69

VSSGT_SENSE

SKYLAKE-U_BGA1356

REV = 1 @

SKL_ULT

CPU POWER 2 OF 4

?

VCCGTX_SENSE

VSSGTX_SENSE

1 OF 20

VCCGT_N70 VCCGT_N71 VCCGT_R63 VCCGT_R64 VCCGT_R65 VCCGT_R66 VCCGT_R67 VCCGT_R68 VCCGT_R69 VCCGT_R70 VCCGT_R71

VCCGT_T62 VCCGT_U65 VCCGT_U68 VCCGT_U71

VCCGT_W63 VCCGT_W64 VCCGT_W65 VCCGT_W66 VCCGT_W67 VCCGT_W68 VCCGT_W69 VCCGT_W70 VCCGT_W71

VCCGT_Y62

VCCGTX_AK42 VCCGTX_AK43 VCCGTX_AK45 VCCGTX_AK46 VCCGTX_AK48 VCCGTX_AK50 VCCGTX_AK52 VCCGTX_AK53 VCCGTX_AK55 VCCGTX_AK56 VCCGTX_AK58 VCCGTX_AK60 VCCGTX_AK70 VCCGTX_AL43 VCCGTX_AL46 VCCGTX_AL50 VCCGTX_AL53 VCCGTX_AL56

VCCGTX_AL60 VCCGTX_AM48 VCCGTX_AM50 VCCGTX_AM52 VCCGTX_AM53 VCCGTX_AM56 VCCGTX_AM58 VCCGTX_AU58 VCCGTX_AU63

VCCGTX_BB57

VCCGTX_BB66

+VCC_GT

N70 N71 R63 R64 R65 R66 R67 R68 R69 R70 R71 T62 U65 U68 U71 W63 W64 W65 W66 W67 W68 W69 W70 W71 Y62

AK42 AK43 AK45 AK46 AK48 AK50 AK52 AK53 AK55 AK56 AK58 AK60 AK70 AL43 AL46 AL50 AL53 AL56 AL60 AM48 AM50 AM52 AM53 AM56 AM58 AU58 AU63 BB57 BB66

AK62 AL61

?

+VCC_GT

For UMA 2+3e

VCCGTX_SENSE VSSGTX_SENSE

1 1

TC133 @ TC134 @

+CPU_CORE

CC1095

1U_0402_6.3V6K

B B

15x1uF 0201, SIT update to 0402 package

1

1U_0402_6.3V6K

CC1098

CC1097

2

1U_0402_6.3V6K

CC1096

2

1U_0402_6.3V6K

1

CC1099

CC1100

2

1U_0402_6.3V6K

1

CC1101

CC1102

2

1U_0402_6.3V6K

1

CC1105

CC1104

2

1U_0402_6.3V6K

1

CC1108

1U_0201_6.3V6-M

CC1109

2

1U_0201_6.3V6-M

@

2

@

+VCC_GT

Backside Cap 12x1uF 0201, SIT update

1

1U_0402_6.3V6K

1

CC1111

2

1U_0402_6.3V6K

1

CC1115

CC1114

2

1U_0402_6.3V6K

1

CC1116

2

1U_0402_6.3V6K

1

CC1118

CC1119

CC1240

2

1U_0402_6.3V6K

CC1241

2

1U_0402_6.3V6K

For UMA 2+3e

1 2

RC1642 0_0805_5%U23E@

1

CC1268

2

10U_0402_6.3V6-M

U23E@

+VCCEOPIO+VCCOPC_1.0V

VCCOPC_SENSE

VSSOPC_SENSE

+VCCEOPIO +V1.8S_EDRAM+VCCOPC_1.0V

CC1275

10U_0402_6.3V6-M

1

2

U23E@

CC1276

10U_0402_6.3V6-M

1

CC1277

2

@

1U_0402_6.3V6K

VCCEOPIO_SENSE

VSSEOPIO_SENSE

1

CC1269

1U_0201_6.3V6-M

U23E@

CC1270

2

1

2

1U_0201_6.3V6-M

U23E@

CC1271

1

2

1U_0201_6.3V6-M

U23E@

CC1272

1

2

1U_0201_6.3V6-M

U23E@

CC1273

1

2

1U_0201_6.3V6-M

U23E@

CC1274

1U_0201_6.3V6-M

1

2

U23E@

1 2

RC1643 100_0402_1%U23E@

1 2

RC1644 100_0402_1%U23E@

1 2

RC1645 100_0402_1%U23E@

1 2

RC1646 100_0402_1%U23E@

+VCCOPC_1.0V

+VCCEOPIO

+VCC_GT

1

2

U23E@

Backside Cap 8x10uF 0402

1

CC1260

CC1261

2

10U_0402_6.3V6-M

U23E@

CC1262

10U_0402_6.3V6-M

U23E@

2

10U_0402_6.3V6-M

U23E@

CC1263

1

2

10U_0402_6.3V6-M

U23E@

CC1264

1

2

10U_0402_6.3V6-M

U23E@

CC1265

1

2

10U_0402_6.3V6-M

U23E@

CC1266

1

2

10U_0402_6.3V6-M

U23E@

CC1267

10U_0402_6.3V6-M

A A

VCCOPC_SENSE

5

4

1 2

RC1647 0_0402_5%@

1 2

RC1648 0_0402_5%@

VCCEOPIO_SENSE

VSSEOPIO_SENSEVSSOPC_SENSE

3

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

2015/08/20

LC Future Center Secret Data

Deciphered Date

2

2016/08/20

Title

MCP (CPU PWR1)

Size

Document Number Re v

Custom

Thursday, January 14, 2016

Date: Sheet

Thursday, January 14, 2016

CG411

1

12 60

1.0

of

5

4

3

+VCCIO

2

3.1A 2x10uF, 4x1uF

1

+1.2V

D D

1

CC1256

2

CD@

+1.2V

C C

2A , 3x22uF, 6x10uF, 4x1uF, SIT update

1

CC1257

2

22U_0603_6.3V6-M

RC1497 0_0402_5%@

RC104 0_0402_5%@

2

22U_0603_6.3V6-M

1

CC1258

2

CD@

22U_0603_6.3V6-M

1 2

CC1168

1

CC1169

2

10U_0603_6.3V6M

+VDDQ_CPU_CLK

+VCCSFR_OC

10U_0402_6.3V6M

1

CC1171

2

10U_0402_6.3V6M

1

CC1229

2

@

1U_0201_6.3V6-M

1

CC85

2

1U_0201_6.3V6-M

1

10U_0603_6.3V6M

1

CC1244

CC1243

CC1223

2

10U_0603_6.3V6M

2

10U_0402_6.3V6M

@

1

CC1222

2

10U_0402_6.3V6M

2

CD@

CC1224

1U_0201_6.3V6-M

1

CC1225

2

@

1U_0201_6.3V6-M

CD@

1

2

CC1226

1U_0201_6.3V6-M

+VCCSTG

1

CC1227

2

1U_0201_6.3V6-M

@

+VCCST_CPU

+VDDQ_CPU_CLK

+VCCST_CPU

+VCCSTG

+VCCSFR_OC

+VCCPLL_CPU

120mA

1 2

RC103 0_0402_5%

+VCCIO

1

+VCCST_CPU

CC1228

2

Reserved for VCCST/VCCSTG/VCCPLL power optimized

10U_0402_6.3V6M

+VCCST_CPU

1 2

RC1604 0_0402_5%@

1 2

RC105 0_0402_5%

1

2

CC87

1U_0402_6.3V6K

1

CC1249

2

1

CC86

2

+VCCPLL_CPU

120mA

1

CC84

2

0.1u_0201_10V6K

1U_0402_6.3V6K

UC1N

AU23

VDDQ_AU23

AU28

VDDQ_AU28

AU35

VDDQ_AU35

AU42

VDDQ_AU42

BB23

VDDQ_BB23

BB32

VDDQ_BB32

BB41

VDDQ_BB41

BB47

VDDQ_BB47

BB51

VDDQ_BB51

AM40

VDDQC

A18

VCCST

A22

VCCSTG_A22

AL23

VCCPLL_OC

K20

VCCPLL_K20

K21

VCCPLL_K21

SKYLAKE-U_BGA1356

REV = 1 @

SKL_ULT

CPU POWER 3 OF 4

?

1 OF 20

VCCIO_AK28 VCCIO_AK30

VCCIO_AL30

VCCIO_AL42 VCCIO_AM28 VCCIO_AM30 VCCIO_AM42

VCCSA_AK23 VCCSA_AK25

VCCSA_G23 VCCSA_G25 VCCSA_G27 VCCSA_G28

VCCSA_J22 VCCSA_J23

VCCSA_J27 VCCSA_K23 VCCSA_K25 VCCSA_K27 VCCSA_K28 VCCSA_K30

VCCIO_SENSE VSSIO_SENSE

VSSSA_SENSE

VCCSA_SENSE

AK28 AK30 AL30 AL42 AM28 AM30 AM42

AK23 AK25 G23 G25 G27 G28 J22 J23 J27 K23 K25 K27 K28 K30

AM23 AM22

H21 H20

?

VCCSA_VCC_SEN

VCCSA_VSS_SEN

+VCCIO

+VCCSA

VCCIO_SENSE VSSIO_SENSE

VCCSA_VSS_SEN VCCSA_VCC_SEN

RC101 100_0402_1%

RC102 100_0402_1%

1 1

1 2

TC136 @ TC137 @

VCCSA_VSS_SEN 59 VCCSA_VCC_SEN 59

+VCCSA

1

2

+VCCSA

1

CC1153

CC1152

2

10U_0402_6.3V6M

1

CC1159

CC1158

2

1U_0201_6.3V6-M

@

4.5A 10x10uF, 7x1uF, SIT update

10U_0603_6.3V6M

1

CC1135

CC1134

2

10U_0402_6.3V6M

@

1

2

CC1133

2

CC1132

10U_0603_6.3V6M

1

1U_0402_6.3V6K

10U_0603_6.3V6M

1

CC1231

2

1

2

@

CC1232

2

1U_0402_6.3V6K

@

1U_0402_6.3V6K

1

2

CD@

1

CC1145

CC1141

2

1U_0402_6.3V6K

1

CC1142

2

1U_0402_6.3V6K

1

CC1252

CC1253

2

10U_0402_6.3V6M

@

1

CC1139

1U_0402_6.3V6K

2

CD@

CC1140

2

1U_0201_6.3V6-M

1

CC1144

CC1143

2

1U_0201_6.3V6-M

CD@

1

CC1161

CC1218

CC1160

2

1U_0201_6.3V6-M

@

1

CC1136

10U_0603_6.3V6M

CC1137

2

10U_0603_6.3V6M

2

CC1230

2

1U_0402_6.3V6K

1

CC1251

2

+1.0VALW +VCCST_CPU

1 2

RC1605 0_0402_5%@

Reserved for VCCST/VCCSTG/VCCPLL power optimized

3

RC1584 120K_0402_5%

1 2

0.01U_0201_25V6-K

+VCCST_CPU+1.0VALW

1

2

@

CC80

10U_0603_6.3V6M

VCCST_EN#

12

RC135 470_0603_5%

@

13

D

2

G

QC14 2N7002KW_SOT323-3

@

S

+VCCST_CPU switch

QC19

B B

1

CC71

2

@

+3VALW

RC128

RC1575

47K_0402_5%

@

1 2

A A

EC_VCCIO_EN44

PM_SLP_S3#11,44

RC1577 0_0402_5%@

1 2

DC1

RB751V-40_SOD323-2

@

VCCIO_EN

V20B+

1 2

47K_0402_5%

RC1621 100K_0402_5%

VCCIO_EN#

5

G

12

2

G

34

D

QC12B 2N7002KDWH_SOT363-6

S

CC72

2

10U_0603_6.3V6M

22U_0603_6.3V6-M

61

D

QC12A

2N7002KDWH_SOT363-6

S

AON7408L_DFN8-5 QC11

5

D

4

S1 S2 S3

G

1

2

1 2 3

CC77

0.01U_0201_25V6-K

+VCCIO+1.0VALW

12

RC125 470K_0402_5%

1

CC79

CC1250

1

C1102

2

@

10U_0603_6.3V6M

22U_0603_6.3V6-M

VCCIO_EN#

12

RC124 470_0603_5%

@

13

D

2

G

QC13 2N7002KW_SOT323-3

@

S

EC_VCCST_EN44

+3VALW

RC141

EC_VCCST_EN

1 2

47K_0402_5%

V20B+

RC142

VCCST_EN#

5

G

1 2

100K_0402_5%

2

G

34

D

QC16B 2N7002KDWH_SOT363-6

S

2

10U_0603_6.3V6M

61

D

QC16A 2N7002KDWH_SOT363-6

S

AO3402_SOT-23-3

1

D

G

2

1

2

S

CC81

Title

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

5

4

3

2015/08/20

LC Future Center Secret Data

Deciphered Date

2

2016/08/20

Title

MCP (CPU PWR2)

Size

Document Number Re v

Custom

Thursday, January 14, 2016

Date: Sheet

Thursday, January 14, 2016

CG411

1

13 60

1.0

of

5

1 2

+1.0VALW +VCCAMPHY

+1.0VALW +VCCAPLL_1P0

D D

RC1503 0_0603_5%@

1 2

RC1504 0_0603_5%

+3VS

+3VALW_PCH

4

1 2

RC1585 0_0402_5%@

1 2

RC1586 0_0603_5%

+VCCHDA

3

+VCCPGPPG+3VALW_PCH

1 2

RC1622 0_0402_5%@

2

1

1 2

+1.0VALW

1.5A

1

CC148

2

47U_0805_4V6-M

Near AF20

+3VALW_PCH

RC1620 0_0402_5%@

CC147

1U_0201_6.3V6-M

+VCCHDA

0.642A

1

2

CD@

+1.0VALW

C C

1

Near N15

CC151

Near K15

1U_0402_6.3V6K

22mA

+1.0VALW

CC154

1U_0402_6.3V6K

1

CC159

2

CD@

2

@

1U_0402_6.3V6K

1

C1096

2

@

22U_0603_6.3V6-M

C1097

0.1u_0201_10V6K

88mA

1

2

1

2

+VCCAMPHY

+VCCAPLL_1P0

1

2

+1.0VALW

B B

VCCMPHYON_1P0_L1

+VCCDSW_1P0

PCH Internal VRM

1

2

+1.0VALW

CC171

1U_0402_6.3V6K

+1.0VALW

CC165

0.1u_0201_10V6K

75mA

1

CC145

2

1U_0402_6.3V6K

+3VALW_PCH

+3VALW

68mA

1

CC144

2

1U_0402_6.3V6K

2.574A22mA

+1.0VALW

1

CC158

2

@

Near AF18

22U_0603_6.3V6-M

VCCMPHYON_1P0_L1

0.118A

11mA

+1.0VALW

0.696A

Near AB19

CC153

1U_0402_6.3V6K

33mA

1

CC141

2

@

1U_0402_6.3V6K

1

CC169

2

1U_0402_6.3V6K

Near A18

UC1O

AB19

VCCPRIM_1P0_AB19

AB20

VCCPRIM_1P0_AB20

P18

VCCPRIM_1P0_P18

AF18

VCCPRIM_CORE_AF18

AF19

VCCPRIM_CORE_AF19

V20

VCCPRIM_CORE_V20

V21

VCCPRIM_CORE_V21

AL1

DCPDSW_1P0

K17

VCCMPHYAON_1P0_K17

L1

VCCMPHYAON_1P0_L1

N15

VCCMPHYGT_1P0_N15

N16

VCCMPHYGT_1P0_N16

N17

VCCMPHYGT_1P0_N17

P15

VCCMPHYGT_1P0_P15

P16

VCCMPHYGT_1P0_P16

K15

VCCAMPHYPLL_1P0_K15

L15

VCCAMPHYPLL_1P0_L15

V15

VCCAPLL_1P0

AB17

VCCPRIM_1P0_AB17

Y18

VCCPRIM_1P0_Y18

AD17

VCCDSW_3P3_AD17

AD18

VCCDSW_3P3_AD18

AJ17

VCCDSW_3P3_AJ17

AJ19

VCCHDA

AJ16

VCCSPI

AF20

VCCSRAM_1P0_AF20

AF21

VCCSRAM_1P0_AF21

T19

VCCSRAM_1P0_T19

T20

VCCSRAM_1P0_T20

AJ21

VCCPRIM_3P3_AJ21

AK20

VCCPRIM_1P0_AK20

N18

VCCAPLLEBB

SKYLAKE-U_BGA1356

REV = 1 @

SKL_ULT

CPU POWER 4 OF 4

?

1 OF 20

VCCPGPPA VCCPGPPB VCCPGPPC VCCPGPPD VCCPGPPE

VCCPGPPF

VCCPGPPG

VCCPRIM_3P3_V19

VCCPRIM_1P0_T1

VCCATS_1P8

VCCRTCPRIM_3P3

VCCRTC_AK19 VCCRTC_BB14

DCPRTC VCCCLK1 VCCCLK2 VCCCLK3 VCCCLK4 VCCCLK5 VCCCLK6

GPP_B0/CORE_VID0 GPP_B1/CORE_VID1

+3VALW_PCH

1

CC156

CC164

2

1U_0402_6.3V6K

+1.8VALW

+1.0VALW

+1.0VALW +VCCCLK4 +VCCCLK5

CC172

2

@

Near Y15

+1.0VALW

2

@

20mA

AK15

4mA

AG15

6mA

Y16

8mA

Y15

6mA

T16

161mA

AF16

61mA

AD15 V19 T1

6mA

AA1

1mA

AK17 AK19

BB14 BB10 A14 K19 L21 N20 L19 A10 AN11

AN13

?

1mA

VCCRTCEXT

35mA

29mA

24mA

33mA

4mA

10mA

1U_0402_6.3V6K

1

CC173

2

@

1U_0402_6.3V6K

CC174

1U_0402_6.3V6K

1

CC57

2

1U_0402_6.3V6K

+VCCPGPPG

1

CC175

2

@

+1.0VALW

1 2

1

C1099

2

@

22U_0603_6.3V6-M

1 2

1

C1100

2

@

22U_0603_6.3V6-M

1U_0402_6.3V6K

1

CC56

2

RC15880_0603_5% @

RC15890_0603_5% @

1

CC176

2

@

1U_0402_6.3V6K

1 2

1

C1098

2

@

1U_0402_6.3V6K

+1.0VALW+VCCCLK4

+1.0VALW+VCCCLK5

+3VALW_PCH

1

2

RC15870_0603_5% @

22U_0603_6.3V6-M

+1.8VALW

CC142

1U_0402_6.3V6K

+1.0VALW

1

CC149

2

0.1u_0201_10V6K

1

CC55

2

1

2

1

CC146

2

0.1u_0201_10V6K

+3VALW_PCH

CC143

1U_0402_6.3V6K

1

CC1242

2

1U_0402_6.3V6K

VCCRTC

A A

Title

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

5

4

3

2015/08/20

LC Future Center Secret Data

Deciphered Date

2

2016/08/20

Title

MCP (PCH PWR)

Size

Document Number Re v

Custom

Thursday, January 14, 2016

Date: Sheet

Thursday, January 14, 2016

CG411

1

14 60

1.0

of

5

GND 1 OF 3

?

1 OF 20

VSS_AL65

VSS_AL66 VSS_AM13 VSS_AM21 VSS_AM25 VSS_AM27 VSS_AM43 VSS_AM45 VSS_AM46 VSS_AM55 VSS_AM60 VSS_AM61 VSS_AM68 VSS_AM71

VSS_AM8 VSS_AN20 VSS_AN23 VSS_AN28 VSS_AN30 VSS_AN32 VSS_AN33 VSS_AN35 VSS_AN37 VSS_AN38 VSS_AN40 VSS_AN42 VSS_AN58 VSS_AN63

VSS_AP10 VSS_AP18 VSS_AP20 VSS_AP23 VSS_AP28 VSS_AP32 VSS_AP35 VSS_AP38 VSS_AP42 VSS_AP58 VSS_AP63 VSS_AP68

VSS_AP70 VSS_AR11 VSS_AR15 VSS_AR16 VSS_AR20 VSS_AR23 VSS_AR28 VSS_AR35 VSS_AR42 VSS_AR43 VSS_AR45 VSS_AR46 VSS_AR48

VSS_AR5 VSS_AR50 VSS_AR52 VSS_AR53 VSS_AR55 VSS_AR58 VSS_AR63

VSS_AR8

VSS_AT2 VSS_AT20 VSS_AT23 VSS_AT28 VSS_AT35

VSS_AT4 VSS_AT42 VSS_AT56 VSS_AT58

SKL_ULT

UC1P

A5

VSS_A5

A67

VSS_A67

A70

D D

C C

B B

VSS_A70

AA2

VSS_AA2

AA4

VSS_AA4

AA65

VSS_AA65

AA68

VSS_AA68

AB15

VSS_AB15

AB16

VSS_AB16

AB18

VSS_AB18

AB21

VSS_AB21

AB8

VSS_AB8

AD13

VSS_AD13

AD16

VSS_AD16

AD19

VSS_AD19

AD20

VSS_AD20

AD21

VSS_AD21

AD62

VSS_AD62

AD8

VSS_AD8

AE64

VSS_AE64

AE65

VSS_AE65

AE66

VSS_AE66

AE67

VSS_AE67

AE68

VSS_AE68

AE69

VSS_AE69

AF1

VSS_AF1

AF10

VSS_AF10

AF15

VSS_AF15

AF17

VSS_AF17

AF2

VSS_AF2

AF4

VSS_AF4

AF63

VSS_AF63

AG16

VSS_AG16

AG17

VSS_AG17

AG18

VSS_AG18

AG19

VSS_AG19

AG20

VSS_AG20

AG21

VSS_AG21

AG71

VSS_AG71

AH13

VSS_AH13

AH6

VSS_AH6

AH63

VSS_AH63

AH64

VSS_AH64

AH67

VSS_AH67

AJ15

VSS_AJ15

AJ18

VSS_AJ18

AJ20

VSS_AJ20

AJ4

VSS_AJ4

AK11

VSS_AK11

AK16

VSS_AK16

AK18

VSS_AK18

AK21

VSS_AK21

AK22

VSS_AK22

AK27

VSS_AK27

AK63

VSS_AK63

AK68

VSS_AK68

AK69

VSS_AK69

AK8

VSS_AK8

AL2

VSS_AL2

AL28

VSS_AL28

AL32

VSS_AL32

AL35

VSS_AL35

AL38

VSS_AL38

AL4

VSS_AL4

AL45

VSS_AL45

AL48

VSS_AL48

AL52

VSS_AL52

AL55

VSS_AL55

AL58

VSS_AL58

AL64

VSS_AL64

SKYLAKE-U_BGA1356

REV = 1 @

4

AL65 AL66 AM13 AM21 AM25 AM27 AM43 AM45 AM46 AM55 AM60 AM61 AM68 AM71 AM8 AN20 AN23 AN28 AN30 AN32 AN33 AN35 AN37 AN38 AN40 AN42 AN58 AN63 AP10 AP18 AP20 AP23 AP28 AP32 AP35 AP38 AP42 AP58 AP63 AP68 AP70 AR11 AR15 AR16 AR20 AR23 AR28 AR35 AR42 AR43 AR45 AR46 AR48 AR5 AR50 AR52 AR53 AR55 AR58 AR63 AR8 AT2 AT20 AT23 AT28 AT35 AT4 AT42 AT56 AT58

?

3

SKL_ULT

UC1Q

AT63

VSS_AT63

AT68

VSS_AT68

AT71

VSS_AT71

AU10

VSS_AU10

AU15

VSS_AU15

AU20

VSS_AU20

AU32

VSS_AU32

AU38

VSS_AU38

AV1

VSS_AV1

AV68

VSS_AV68

AV69

VSS_AV69

AV70

VSS_AV70

AV71

VSS_AV71

AW10

VSS_AW10

AW12

VSS_AW12

AW14

VSS_AW14

AW16

VSS_AW16

AW18

VSS_AW18

AW21

VSS_AW21

AW23

VSS_AW23

AW26

VSS_AW26

AW28

VSS_AW28

AW30

VSS_AW30

AW32

VSS_AW32

AW34

VSS_AW34

AW36

VSS_AW36

AW38

VSS_AW38

AW41

VSS_AW41

AW43

VSS_AW43

AW45

VSS_AW45

AW47

VSS_AW47

AW49

VSS_AW49

AW51

VSS_AW51

AW53

VSS_AW53

AW55

VSS_AW55

AW57

VSS_AW57

AW6

VSS_AW6

AW60

VSS_AW60

AW62

VSS_AW62

AW64

VSS_AW64

AW66

VSS_AW66

AW8

VSS_AW8

AY66

VSS_AY66

B10

VSS_B10

B14

VSS_B14

B18

VSS_B18

B22

VSS_B22

B30

VSS_B30

B34

VSS_B34

B39

VSS_B39

B44

VSS_B44

B48

VSS_B48

B53

VSS_B53

B58

VSS_B58

B62

VSS_B62

B66

VSS_B66

B71

VSS_B71

BA1

VSS_BA1

BA10

VSS_BA10

BA14

VSS_BA14

BA18

VSS_BA18

BA2

VSS_BA2

BA23

VSS_BA23

BA28

VSS_BA28

BA32

VSS_BA32

BA36

VSS_BA36

F68

VSS_F68

BA45

VSS_BA45

SKYLAKE-U_BGA1356

REV = 1 @

GND 2 OF 3

?

1 OF 20

VSS_BA49 VSS_BA53 VSS_BA57

VSS_BA6 VSS_BA62 VSS_BA66 VSS_BA71 VSS_BB18 VSS_BB26 VSS_BB30 VSS_BB34 VSS_BB38 VSS_BB43 VSS_BB55

VSS_BB6 VSS_BB60 VSS_BB64 VSS_BB67 VSS_BB70

VSS_C1

VSS_C25

VSS_C5 VSS_D10 VSS_D11 VSS_D14 VSS_D18 VSS_D22 VSS_D25 VSS_D26 VSS_D30 VSS_D34 VSS_D39 VSS_D44 VSS_D45 VSS_D47 VSS_D48 VSS_D53 VSS_D58

VSS_D6 VSS_D62 VSS_D66 VSS_D69 VSS_E11 VSS_E15 VSS_E18 VSS_E21 VSS_E46 VSS_E50 VSS_E53 VSS_E56

VSS_E6 VSS_E65 VSS_E71

VSS_F1

VSS_F13

VSS_F2 VSS_F22 VSS_F23 VSS_F27 VSS_F28 VSS_F32 VSS_F33 VSS_F35 VSS_F37 VSS_F38

VSS_F4 VSS_F40 VSS_F42

VSS_BA41

2

GND 3 OF 3

?

1 OF 20

VSS_L18

VSS_L2

VSS_L20

VSS_L4

VSS_L8 VSS_N10 VSS_N13 VSS_N19 VSS_N21

VSS_N6 VSS_N65 VSS_N68 VSS_P17 VSS_P19 VSS_P20 VSS_P21 VSS_R13

VSS_R6 VSS_T15 VSS_T17 VSS_T18

VSS_T2

VSS_T21

VSS_T4 VSS_U10 VSS_U63 VSS_U64 VSS_U66 VSS_U67 VSS_U69 VSS_U70 VSS_V16 VSS_V17 VSS_V18

VSS_W13

VSS_W6

VSS_W9 VSS_Y17 VSS_Y19 VSS_Y20 VSS_Y21

L18 L2 L20 L4 L8 N10 N13 N19 N21 N6 N65 N68 P17 P19 P20 P21 R13 R6 T15 T17 T18 T2 T21 T4 U10 U63 U64 U66 U67 U69 U70 V16 V17 V18 W13 W6 W9 Y17 Y19 Y20 Y21

?

SKL_ULT

UC1R

BA49 BA53 BA57 BA6 BA62 BA66 BA71 BB18 BB26 BB30 BB34 BB38 BB43 BB55 BB6 BB60 BB64 BB67 BB70 C1 C25 C5 D10 D11 D14 D18 D22 D25 D26 D30 D34 D39 D44 D45 D47 D48 D53 D58 D6 D62 D66 D69 E11 E15 E18 E21 E46 E50 E53 E56 E6 E65 E71 F1 F13 F2 F22 F23 F27 F28 F32 F33 F35 F37 F38 F4 F40 F42 BA41

?

F8

VSS_F8

G10

VSS_G10

G22

VSS_G22

G43

VSS_G43

G45

VSS_G45

G48

VSS_G48

G5

VSS_G5

G52

VSS_G52

G55

VSS_G55

G58

VSS_G58

G6

VSS_G6

G60

VSS_G60

G63

VSS_G63

G66

VSS_G66

H15

VSS_H15

H18

VSS_H18

H71

VSS_H71

J11

VSS_J11

J13

VSS_J13

J25

VSS_J25

J28

VSS_J28

J32

VSS_J32

J35

VSS_J35

J38

VSS_J38

J42

VSS_J42

J8

VSS_J8

K16

VSS_K16

K18

VSS_K18

K22

VSS_K22

K61

VSS_K61

K63

VSS_K63

K64

VSS_K64

K65

VSS_K65

K66

VSS_K66

K67

VSS_K67

K68

VSS_K68

K70

VSS_K70

K71

VSS_K71

L11

VSS_L11

L16

VSS_L16

L17

VSS_L17

SKYLAKE-U_BGA1356

REV = 1 @

1

A A

Title

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

5

4

3

2015/08/20

LC Future Center Secret Data

Deciphered Date

2

2016/08/20

Title

MCP (VSS)

Size

Document Number Re v

Custom

Thursday, January 14, 2016

Date: Sheet

Thursday, January 14, 2016

CG411

1

15 60

1.0

of

5

D D

RC1618 1K_0402_5%

@

1 2

C C

B B

RC106 1K_0402_5%

1 2

RC162

49.9_0402_1%

1 2

Pin Name Strap Description Configuration

A A

CFG[4] Display Port

Presence strap

—1 = eDP Disabled —0 = eDP Enabled

5

*

TC142PAD@ TC143PAD@ TC144PAD@

TC146PAD@ TC147PAD@ TC148PAD@ TC153PAD@ TC150PAD@ TC151PAD@ TC152PAD@ TC157PAD@ TC154PAD@ TC155PAD@ TC156PAD@

TC159PAD@ TC158PAD@

TC161PAD@ TC160PAD@

TC166PAD@

TC186PAD@

TC189PAD@ TC191PAD@

TC171PAD@ TC172PAD@

TC169PAD@ TC170PAD@

Default Value

1

CPU_CFG0 CPU_CFG1

1

CPU_CFG2

1

XDP_CPU_CFG3

1

CPU_CFG4 CPU_CFG5

1

CPU_CFG6

1

CPU_CFG7

1

CPU_CFG8

1

CPU_CFG9

1

CPU_CFG10

1

CPU_CFG11

1

CPU_CFG12

1

CPU_CFG13

1

CPU_CFG14

1

CPU_CFG15

1

CPU_CFG16

1

CPU_CFG17

1

CPU_CFG18

1

CPU_CFG19

1

CFG_RCOMP XDP_ITP_PMODE

1

1 1

4

E68

CFG[0]

B67

CFG[1]

D65

CFG[2]

D67

CFG[3]

E70

CFG[4]

C68

CFG[5]

D68

CFG[6]

C67

CFG[7]

F71

CFG[8]

G69

CFG[9]

F70

CFG[10]

G68

CFG[11]

H70

CFG[12]

G71

CFG[13]

H69

CFG[14]

G70

CFG[15]

E63

CFG[16]

F63

CFG[17]

E66

CFG[18]

F66

CFG[19]

E60

CFG_RCOMP

E8

ITP_PMODE

AY2

RSVD_AY2

AY1

RSVD_AY1

D1

RSVD_D1

D3

RSVD_D3

K46

RSVD_K46

K45

RSVD_K45

AL25

RSVD_AL25

AL27

RSVD_AL27

C71

RSVD_C71

B70

RSVD_B70

F60

RSVD_F60

A52

RSVD_A52

BA70

RSVD_TP_BA70

BA68

RSVD_TP_BA68

J71

RSVD_J71

J68

RSVD_J68

F65

VSS_F65

G65

VSS_G65

F61

RSVD_F61

E61

RSVD_E61

SKYLAKE-U_BGA1356

REV = 1 @

4

UC1S

SKL_ULT

RESERVED SIGNALS-1

?

1 OF 20

3

TP5 TP6

TP4

TP1 TP2

ZVM#

MSM#

?

Issued Date

BB68 BB69

AK13 AK12

BB2 BA3

AU5 AT5

D5 D4 B2 C2

B3 A3

AW1 E1

E2 BA4

BB4 A4

C4 BB5 A69

B69 AY3 D71

C70 C54

D54 AY4

BB3 AY71

AR56 AW71

AW70 AP56

C64

3

RSVD_AY3

VSS_AY71

PROC_SELECT#

RSVD_TP_BB68 RSVD_TP_BB69

RSVD_TP_AK13 RSVD_TP_AK12

RSVD_BB2 RSVD_BA3

RSVD_D5 RSVD_D4 RSVD_B2 RSVD_C2

RSVD_B3 RSVD_A3

RSVD_AW1

RSVD_E1 RSVD_E2

RSVD_BA4 RSVD_BB4

RSVD_A4 RSVD_C4

RSVD_A69 RSVD_B69

RSVD_AY3 RSVD_D71

RSVD_C70 RSVD_C54

RSVD_D54

VSS_AY71

RSVD_TP_AW71 RSVD_TP_AW70

PROC_SELECT#

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

1 1

1

1 1

1

2015/08/20

TC173 PAD@ TC174 PAD@

TC175 PAD@ TC176 PAD@

+1.8VALW

TC183 PAD@ TC185 PAD@

TC184 PAD@ TC181 PAD@

TC187 PAD@

TC182 PAD@

TC188 PAD@ TC193 PAD@

need to check with Intel

TC190 PAD@ TC192 PAD@

need to check with Intel

ZVM# 57

TC177 PAD@ TC178 PAD@

TC168 PAD@

1 2

LC Future Center Secret Data

For UMA 2+3e

+VCCST_CPU

R22100K_0402_5% Cannonlake@

Deciphered Date

2

Cannonlake@

RC1582 0_0402_5% RC1583 0_0402_5%

Cannonlake@

2

12 12

2016/08/20

1 2

RSVD_U12 RSVD_U11

RC107 0_0402_5%

RC108 0_0402_5%

1

?

SKL_ULT

UC1T

SPARE

AW69

RSVD_AW69

AW68

RSVD_AW68

AU56

RSVD_AU56

AW48

RSVD_AW48

C7

RSVD_C7

U12

RSVD_U12

U11

RSVD_U11

H11

RSVD_H11

SKYLAKE-U_BGA1356

REV = 1 @

Title

MCP (CFG,RESERVED)

Size

Document Number Re v

Custom

Date: Sheet

1 OF 20

Thursday, January 14, 2016

RSVD_F6

RSVD_E3 RSVD_C11 RSVD_B11 RSVD_A11 RSVD_D12 RSVD_C12 RSVD_F52

?

CG411

1

F6 E3 C11 B11 A11 D12 C12 F52

+VCCST_CPU

RSVD_F52

16 60

12

RC1619 150_0402_5%

@

of

1.0

5

DDRA_MA0 DDRA_MA1 DDRA_MA2 DDRA_MA3 DDRA_MA4 DDRA_MA5 DDRA_MA6 DDRA_MA7 DDRA_MA8 DDRA_MA9 DDRA_MA10 DDRA_MA11 DDRA_MA12 DDRA_MA13

D D

C C

DDRA_MA14_WE#5 DDRA_MA15_CAS#5 DDRA_MA16_RAS#5

DDRA_CLK0#5 DDRA_CLK05

DDRA_CKE05

+1.2V +1.2V

1 2

RD65 0_0402_5%@

1 2

RD68 0_0402_5%@

DDRA_BS0#5 DDRA_BS1#5

DDRA_ACT#5 DDRA_CS0#5

DDRA_ALERT#5 DDRA_BG05 DDRA_ODT05 DDRA_PAR5

1 2

RD94 10K_0402_5%

CPU_DRAMRST#6,18

DDRA_MA14_WE# DDRA_MA15_CAS# DDRA_MA16_RAS#

DDRA_CLK0# DDRA_CLK0

DDRA_CKE0 DDRA_DQS#0

DDRA_DQS0 DDRA_DQS#1 DDRA_DQS1

DDRA_DM1 DDRA_DM0

DDRA_BS0# DDRA_BS1#

DDRA_ACT# DDRA_CS0# DDRA_ALERT#

DDRA_BG0 DDRA_ODT0 DDRA_PAR TEN_UD1 TEN_UD2 CPU_DRAMRST#

@

1

2

CD47

0.1u_0201_10V6K

UD1

P3

A0

P7

A1

R3

A2

N7

A3

N3

A4

P8

A5

P2

A6

R8

A7

R2

A8

R7

A9

M3

A10/AP

T2

A11

M7

A12/BC_N

T8

A13

L2

WE_N/A14

M8

CAS_N/A15

L8

RAS_N/A16

K8

CK_C

K7

CK_T

K2

CKE

F3

LDQS_C

G3

LDQS_T

A7

UDQS_C

B7

UDQS_T

E2

NF/UDM_N/UDBI_N

E7

NF/LDM_N/LDBI_N

N2

BA0

N8

BA1

L3

ACT_N

L7

CS_N

P9

ALERT_N

M2

BG0

K3

ODT

T3

PAR

N9

TEN

P1

RESET_N

F1

VSSQ1

H1

VSSQ2

A2

VSSQ3

D2

VSSQ4

E3

VSSQ5

A8

VSSQ6

D8

VSSQ7

E8

VSSQ8

C9

VSSQ9

H9

VSSQ10

F9

ZQ

12

RD39

MT40A512M16HA083EA_FBGA96

240_0402_1%

DQ10 DQ11 DQ12 DQ13 DQ14 DQ15

VDD1 VDD2 VDD3 VDD4 VDD5 VDD6 VDD7 VDD8 VDD9

VDD10

VDDQ1 VDDQ2 VDDQ3 VDDQ4 VDDQ5 VDDQ6 VDDQ7 VDDQ8 VDDQ9

VDDQ10

VPP1 VPP2

VREFCA

VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9

@

DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9

NC

DDRA_DQ2

G2

DDRA_DQ3

F7

DDRA_DQ7

H3

DDRA_DQ1

H7

DDRA_DQ4

H2

DDRA_DQ0

H8

DDRA_DQ6

J3

DDRA_DQ5

J7

DDRA_DQ11

A3

DDRA_DQ8

B8

DDRA_DQ14

C3

DDRA_DQ13

C7

DDRA_DQ15

C2

DDRA_DQ12

C8

DDRA_DQ10

D3

DDRA_DQ9

D7

+1.2V

D1 J1 L1 R1 B3 G7 B9 J9 L9 T9

A1 C1 G1 F2 J2 F8 J8 A9 D9 G9

B1 R9

M1 E1

K1 N1 T1 B2 G8 E9 K9 M9

T7

+VREF_CA_MD

1

2

CD113

1

2

.047U_0201_6.3V6K

CD120

4

DDRA_MA0 DDRA_MA1 DDRA_MA2 DDRA_MA3 DDRA_MA4 DDRA_MA5 DDRA_MA6 DDRA_MA7 DDRA_MA8 DDRA_MA9 DDRA_MA10 DDRA_MA11 DDRA_MA12 DDRA_MA13

DDRA_MA14_WE# DDRA_MA15_CAS# DDRA_MA16_RAS#

DDRA_CLK0# DDRA_CLK0

DDRA_CKE0 DDRA_DQS#2

DDRA_DQS2 DDRA_DQS#3 DDRA_DQS3

@

CD48

1

2

DDRA_DM3 DDRA_DM2

DDRA_BS0# DDRA_BS1#

DDRA_ACT# DDRA_CS0# DDRA_ALERT#

DDRA_BG0 DDRA_ODT0 DDRA_PAR

CPU_DRAMRST#

0.1u_0201_10V6K

1 2

RD66 0_0402_5%@

1 2

RD69 0_0402_5%@

+2.5V_DDR

1

2

1U_0402_6.3V6K

CD121

0.1u_0201_10V6K

CD123

1 2

RD95 10K_0402_5%

UD2

P3

A0

P7

A1

R3

A2

N7

A3

N3

A4

P8

A5

P2

A6

R8

A7

R2

A8

R7

A9

M3

A10/AP

T2

A11

M7

A12/BC_N

T8

A13

L2

WE_N/A14

M8

CAS_N/A15

L8

RAS_N/A16

K8

CK_C

K7

CK_T

K2

CKE

F3

LDQS_C

G3

LDQS_T

A7

UDQS_C

B7

UDQS_T

E2

NF/UDM_N/UDBI_N

E7

NF/LDM_N/LDBI_N

N2

BA0

N8

BA1

L3

ACT_N

L7

CS_N

P9

ALERT_N

M2

BG0

K3

ODT

T3

PAR

N9

TEN

P1

RESET_N

F1

VSSQ1

H1

VSSQ2

A2

VSSQ3

D2

VSSQ4

E3

VSSQ5

A8

VSSQ6

D8

VSSQ7

E8

VSSQ8

C9

VSSQ9

H9

VSSQ10

F9

ZQ

12

RD40

MT40A512M16HA083EA_FBGA96

240_0402_1%

3

DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8

DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15

VDD1 VDD2 VDD3 VDD4 VDD5 VDD6 VDD7 VDD8 VDD9

VDD10 VDDQ1

VDDQ2 VDDQ3 VDDQ4 VDDQ5 VDDQ6 VDDQ7 VDDQ8 VDDQ9

VDDQ10

VPP1 VPP2

VREFCA

VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9

2

DDRA_DQ[0..63]

@

NC

DDRA_DQ18

G2

DDRA_DQ19

F7

DDRA_DQ16

H3

DDRA_DQ21

H7

DDRA_DQ22

H2

DDRA_DQ17

H8

DDRA_DQ23

J3

DDRA_DQ20

J7

DDRA_DQ30

A3

DDRA_DQ28

B8

DDRA_DQ26

C3

DDRA_DQ25

C7

DDRA_DQ31

C2

DDRA_DQ29

C8

DDRA_DQ27

D3

DDRA_DQ24

D7

+1.2V

D1 J1 L1 R1 B3 G7 B9 J9 L9 T9

A1 C1 G1 F2 J2 F8 J8 A9 D9 G9

B1 R9

M1 E1

K1 N1 T1 B2 G8 E9 K9 M9

T7

+VREF_CA_MD

1

2

CD114

1

2

0.1u_0201_10V6K

.047U_0201_6.3V6K

CD122

1

2

CD124

+2.5V_DDR

1U_0402_6.3V6K

DDR_SA_VREFCA5

1

2

CD125

0.022U_0201_6.3V6-K

24.9_0402_1%

1U_0402_6.3V6K

CD111

RD48

0.1u_0201_10V6K

1 2

RD46

2.7_0402_1%

1

2

12

CD119

+1.2V

1

12

RD45

1.8K_0402_1%

2

+VREF_CA_MD

12

RD47

1.8K_0402_1%

1

CD112

0.1u_0201_10V6K

2

DDRA_DQS#[0..7] DDRA_DQS[0..7] DDRA_MA[0..13]

DDRA_DQ[0..63] 5 DDRA_DQS#[0..7] 5 DDRA_DQS[0..7] 5

DDRA_MA[0..13] 5

DDRA_CLK0# DDRA_CLK0

DDRA_CS0# DDRA_ODT0

DDRA_CKE0 DDRA_MA0

DDRA_MA1 DDRA_MA2 DDRA_MA3

DDRA_MA4 DDRA_MA5 DDRA_MA6 DDRA_MA7

DDRA_MA8 DDRA_MA9 DDRA_MA10 DDRA_MA11

DDRA_MA12 DDRA_MA13 DDRA_MA14_WE# DDRA_MA15_CAS#

DDRA_MA16_RAS# DDRA_BG0 DDRA_BS0# DDRA_BS1#

DDRA_ACT# DDRA_PAR

DDRA_ALERT#

RD49 36_0402_1% RD50 36_0402_1%

RD51 34.8_0402_1% RD52 34.8_0402_1%

RD53 34.8_0402_1% RD54 34.8_0402_1%

RD55 34.8_0402_1% RD56 34.8_0402_1% RD57 34.8_0402_1%

RD58 34.8_0402_1% RD59 34.8_0402_1% RD60 34.8_0402_1% RD61 34.8_0402_1%

RD62 34.8_0402_1% RD63 34.8_0402_1% RD64 34.8_0402_1% RD67 34.8_0402_1%

RD70 34.8_0402_1% RD71 34.8_0402_1% RD72 34.8_0402_1% RD73 34.8_0402_1%

RD74 34.8_0402_1% RD75 34.8_0402_1% RD76 34.8_0402_1% RD77 34.8_0402_1%

RD78 34.8_0402_1% RD79 34.8_0402_1%

RD86 49.9_0402_1%

1 2 1 2

1 2 1 2 1 2

1 2 1 2 1 2 1 2

1 2 1 2

1 2

1

+0.6VS

+1.2V

(1uF_0402_6.3V) *16 Place 4 near each DRAM

DDRA_MA0 DDRA_MA1 DDRA_MA2 DDRA_MA3 DDRA_MA4 DDRA_MA5 DDRA_MA6 DDRA_MA7 DDRA_MA8 DDRA_MA9 DDRA_MA10 DDRA_MA11 DDRA_MA12 DDRA_MA13

DDRA_MA14_WE# DDRA_MA15_CAS# DDRA_MA14_WE# DDRA_MA16_RAS#

DDRA_CLK0#

B B

+1.2V

A A

1 2

RD87 0_0402_5%@

1 2

RD88 0_0402_5%@

1 2

RD96 10K_0402_5%

DDRA_CLK0 DDRA_CKE0 DDRA_DQS#5

DDRA_DQS5 DDRA_DQS#4 DDRA_DQS4

DDRA_DM4 DDRA_DM5 DDRA_DM6

DDRA_BS0# DDRA_BS1#

DDRA_ACT# DDRA_CS0# DDRA_ALERT#

DDRA_BG0 DDRA_ODT0 DDRA_PAR TEN_UD3 CPU_DRAMRST#

@

1

2

0.1u_0201_10V6K

CD107

UD3

P3

A0

P7

A1

R3

A2

N7

A3

N3

A4

P8

A5

P2

A6

R8

A7

R2

A8

R7

A9

M3

A10/AP

T2

A11

M7

A12/BC_N

T8

A13

L2

WE_N/A14

M8

CAS_N/A15

L8

RAS_N/A16

K8

CK_C

K7

CK_T

K2

CKE

F3

LDQS_C

G3

LDQS_T

A7

UDQS_C

B7

UDQS_T

E2

NF/UDM_N/UDBI_N

E7

NF/LDM_N/LDBI_N

N2

BA0

N8

BA1

L3

ACT_N

L7

CS_N

P9

ALERT_N

M2

BG0

K3

ODT

T3

PAR

N9

TEN

P1

RESET_N

F1

VSSQ1

H1

VSSQ2

A2

VSSQ3

D2

VSSQ4

E3

VSSQ5

A8

VSSQ6

D8

VSSQ7

E8

VSSQ8

C9

VSSQ9

H9

VSSQ10

F9

ZQ

12

MT40A512M16HA083EA_FBGA96

RD43 240_0402_1%

DQ10 DQ11 DQ12 DQ13 DQ14 DQ15

VDD1 VDD2 VDD3 VDD4 VDD5 VDD6 VDD7 VDD8 VDD9

VDD10

VDDQ1 VDDQ2 VDDQ3 VDDQ4 VDDQ5 VDDQ6 VDDQ7 VDDQ8 VDDQ9

VDDQ10

VPP1 VPP2

VREFCA

VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9

@

DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9

NC

DDRA_DQ43

G2

DDRA_DQ44

F7

DDRA_DQ46

H3

DDRA_DQ40

H7

DDRA_DQ47

H2

DDRA_DQ45

H8

DDRA_DQ42

J3

DDRA_DQ41

J7

DDRA_DQ34

A3

DDRA_DQ37

B8

DDRA_DQ39

C3

DDRA_DQ32

C7

DDRA_DQ35

C2

DDRA_DQ33

C8

DDRA_DQ38

D3

DDRA_DQ36

D7

+1.2V

D1 J1 L1 R1 B3 G7 B9 J9 L9 T9

A1 C1 G1 F2 J2 F8 J8 A9 D9 G9

B1 R9

M1 E1

K1 N1 T1 B2 G8 E9 K9 M9

T7

+VREF_CA_MD

1

2

CD115

1

2

0.1u_0201_10V6K

.047U_0201_6.3V6K

CD149

1

2

CD150

+2.5V_DDR

1U_0402_6.3V6K

1

2

CD@

CD151

1U_0402_6.3V6K

+1.2V

RD89 0_0402_5%@ RD90 0_0402_5%@

RD97 10K_0402_5%

1 2 1 2

1 2

@

CD108

1

2

0.1u_0201_10V6K

DDRA_MA0 DDRA_MA1 DDRA_MA2 DDRA_MA3 DDRA_MA4 DDRA_MA5 DDRA_MA6 DDRA_MA7 DDRA_MA8 DDRA_MA9 DDRA_MA10 DDRA_MA11 DDRA_MA12 DDRA_MA13

DDRA_MA15_CAS# DDRA_MA16_RAS#

DDRA_CLK0# DDRA_CLK0

DDRA_CKE0 DDRA_DQS#7

DDRA_DQS7 DDRA_DQS#6 DDRA_DQS6

DDRA_DM7 DDRA_BS0#

DDRA_BS1# DDRA_ACT#

DDRA_CS0# DDRA_ALERT#

DDRA_BG0 DDRA_ODT0 DDRA_PAR TEN_UD4 CPU_DRAMRST#

UD4

P3

A0

P7

A1

R3

A2

N7

A3

N3

A4

P8

A5

P2

A6

R8

A7

R2

A8

R7

A9

M3

A10/AP

T2

A11

M7

A12/BC_N

T8

A13

L2

WE_N/A14

M8

CAS_N/A15

L8

RAS_N/A16

K8

CK_C

K7

CK_T

K2

CKE

F3

LDQS_C

G3

LDQS_T

A7

UDQS_C

B7

UDQS_T

E2

NF/UDM_N/UDBI_N

E7

NF/LDM_N/LDBI_N

N2

BA0

N8

BA1

L3

ACT_N

L7

CS_N

P9

ALERT_N

M2

BG0

K3

ODT

T3

PAR

N9

TEN

P1

RESET_N

F1

VSSQ1

H1

VSSQ2

A2

VSSQ3

D2

VSSQ4

E3

VSSQ5

A8

VSSQ6

D8

VSSQ7

E8

VSSQ8

C9

VSSQ9

H9

VSSQ10

F9

ZQ

12

MT40A512M16HA083EA_FBGA96

RD44 240_0402_1%

DQ10 DQ11 DQ12 DQ13 DQ14 DQ15

VDD1 VDD2 VDD3 VDD4 VDD5 VDD6 VDD7 VDD8 VDD9

VDD10

VDDQ1 VDDQ2 VDDQ3 VDDQ4 VDDQ5 VDDQ6 VDDQ7 VDDQ8 VDDQ9

VDDQ10

VPP1 VPP2

VREFCA

VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9

@

DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9

NC

DDRA_DQ59

G2

DDRA_DQ60

F7

DDRA_DQ62

H3

DDRA_DQ56

H7

DDRA_DQ63

H2

DDRA_DQ61

H8

DDRA_DQ58

J3

DDRA_DQ57

J7

DDRA_DQ54

A3

DDRA_DQ52

B8

DDRA_DQ51

C3

DDRA_DQ49

C7

DDRA_DQ50

C2

DDRA_DQ53

C8

DDRA_DQ55

D3

DDRA_DQ48

D7

+1.2V

D1 J1 L1 R1 B3 G7 B9 J9 L9 T9

A1 C1 G1 F2 J2 F8 J8 A9 D9 G9

B1 R9

M1 E1

K1 N1 T1 B2 G8 E9 K9 M9

T7

+VREF_CA_MD

1

2

CD116

1

2

0.1u_0201_10V6K

.047U_0201_6.3V6K

CD153

1

2

CD@

CD154

+2.5V_DDR

1U_0402_6.3V6K

1

2

CD155

1U_0402_6.3V6K

1

2

CD126

+1.2V

1

2

CD142

+2.5V_DDR

1

2

CD152

+0.6VS

1

2

CD158

1U_0402_6.3V6K

CD@

CD127

10U_0603_6.3V6M

1U_0402_6.3V6K

CD159

1

2

1U_0402_6.3V6K

CD128

CD129

(1OuF_0603_6.3V) *5 Place around the DRAMs

1

2

10U_0603_6.3V6M

1

2

CD@

CD160

10U_0603_6.3V6M

CD144

1

2

10U_0603_6.3V6M

CD147

1

2

1U_0402_6.3V6K

CD161

CD162

CD143

(1OuF_0603_6.3V) *3 Place around the DRAMs

1

2

CD156

(1uF_0402_6.3V) *8 Place 2 near each DRAM

1

2

1U_0402_6.3V6K

1

2

CD130

1

2

CD145

1U_0402_6.3V6K

10U_0603_6.3V6M

1

2

CD@

CD163

1

2

CD@

CD131

1U_0402_6.3V6K

1

2

CD@

CD146

1

2

CD164

1

2

1U_0402_6.3V6K

CD132

CD133

10U_0603_6.3V6M

(1OuF_0603_6.3V) *2 Place around the DRAMs

1

2

1U_0402_6.3V6K

CD165

1

2

CD@

CD166

1

2

CD134

10U_0603_6.3V6M

1U_0402_6.3V6K

+1.2V

+2.5V_DDR

1

2

CD167

1

2

CD135

10U_0603_6.3V6M

1U_0402_6.3V6K

1

2

1

2

1

2

1U_0402_6.3V6K

CD@

CD136

CD137

CD109 22P_0402_50V8-J

RF@

CD157 22P_0402_50V8-J

RF@

1U_0402_6.3V6K

1

2

1U_0402_6.3V6K

CD138

1

CD110 22P_0402_50V8-J

RF@

2

1

CD148 22P_0402_50V8-J

RF@

2

+0.6VS

1

2

1U_0402_6.3V6K

CD@

CD139

1

CD168 22P_0402_50V8-J

RF@

2

1

2

CD140

1

2

1U_0402_6.3V6K

CD141

1

CD169 22P_0402_50V8-J

RF@

2

Title

Security Classification

Issued Date

THIS SHEET OF ENGINE ERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTU RE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINE ERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTU RE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

5

4

3

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

2

2015/08/20

LC Future Center Secret Data

Deciphered Date

2016/08/20

Title

DDR4 Memory Down

Document Number Rev

Size

Custom

Date: Sheet

1

CG411

Thursday, January 14, 2016

17 60

1.0

of

5

DDR4 SO-DIMM

+1.2V +1.2V +1.2V+1.2V+1.2V +1.2V +1.2V +1.2V

DDRB_DQ12 DDRB_DQ13 DDRB_DQS#1

DDRB_DQS1

RD93 240_0402_1%

DDRB_DQ10 DDRB_DQ14 DDRB_DQ0 DDRB_DQ6

DDRB_DQ7 DDRB_DQ3 DDRB_DQ18 DDRB_DQ16 DDRB_DQS#2

DDRB_DQS2 DDRB_DQ22 DDRB_DQ23 DDRB_DQ27 DDRB_DQ28

DDRB_DQ25 DDRB_DQ30

DDRB_DQS#8 DDRB_DQS8

DDRB_CKE0 DDRB_BG1

DDRB_BG0 DDRB_MA12

DDRB_MA9 DDRB_MA8

DDRB_MA6

D D

+1.2V

12

RD92

240_0402_1%

C C

DDRB_CKE06 DDRB_BG16

DDRB_BG06 DDRB_MA126

DDRB_MA96 DDRB_MA86

DDRB_MA66

JDDR1A

1

VSS_1

3

DQ5

5

VSS_3

7

DQ1

9

VSS_5

11

DQS0_C

13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59 61 63 65 67 69 71 73 75 77 79 81 83 85 87 89 91 93 95 97

99 101 103 105 107 109 111 113 115 117 119 121 123 125 127 129

DM0_n/DBIO_n/NC DQS0_t VSS_8 DQ7 VSS_10 DQ3 VSS_12 DQ13 VSS_14 DQ9 VSS_16 DM1_n/DBl1_n/NC VSS_17 DQ15 VSS_19 DQ10 VSS_21 DQ21 VSS_23 DQ17 VSS_25 DQS2_c

DM2_n/DBl2_n/NC DQS2_t VSS_28 DQ23 VSS_30 DQ19 VSS_32 DQ29 VSS_34 DQ25 VSS_36 DM3_n/DBl3_n/NC VSS_37 DQ30 VSS_39 DQ26 VSS_41 CB5/NC VSS_43 CB1/NC VSS_45 DQS8_c

DM8_n/DBI8_n/NC DQS8_t VSS_48 CB2/NC VSS_50 CB3/NC VSS_52 CKE0 VDD_1 BG1 BG0 VDD_3 A12 A9 VDD_5 A8 A6 VDD_7

ARGOS_D4AS0-26001-1P60

ME@

VSS_2

DQ4

VSS_4

DQ0

VSS_6 VSS_7

DQ6

VSS_9

DQ2

VSS_11

DQ12

VSS_13

DQ8 VSS_15 DQS1_c

DQS1_t

VSS_18

DQ14

VSS_20

DQ11

VSS_22

DQ20

VSS_24

DQ16

VSS_26 VSS_27

DQ22

VSS_29

DQ18

VSS_31

DQ28

VSS_33

DQ24 VSS_35 DQS3_c

DQS3_t

VSS_38

DQ31 VSS_40

DQ27 VSS_42 CB4/NC VSS_44 CB0/NC VSS_46

VSS_47 CB6/NC VSS_49 CB7/NC VSS_51

RESET_n

CKE1

VDD_2

ACT_n

ALERT_n

VDD_4

A11

VDD_6

VDD_8

2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72 74 76 78 80 82 84 86 88 90 92 94 96 98 100 102 104 106 108 110 112 114 116 118 120 122

A7

124 126

A5

128

A4

130

4

DDRB_DQ9 DDRB_DQ8

DDRB_DQ11 DDRB_DQ15 DDRB_DQ5 DDRB_DQ4 DDRB_DQS#0

DDRB_DQS0 DDRB_DQ1 DDRB_DQ2 DDRB_DQ20 DDRB_DQ21

DDRB_DQ17 DDRB_DQ19 DDRB_DQ24 DDRB_DQ29 DDRB_DQS#3

DDRB_DQS3 DDRB_DQ26 DDRB_DQ31

CPU_DRAMRST# DDRB_CKE1

DDRB_ACT# DDRB_ALERT#

DDRB_MA11 DDRB_MA7

DDRB_MA5 DDRB_MA4

DDRB_DQ[0..63] DDRB_DQS#[0..7] DDRB_DQS[0..7]

DDRB_CKE1 6 DDRB_ACT# 6

DDRB_ALERT# 6 DDRB_MA11 6

DDRB_MA7 6 DDRB_MA5 6

DDRB_MA4 6

1

CD3

0.1u_0201_10V6K

@

2

3

DDRB_DQ[0..63] 6 DDRB_DQS#[0..7] 6 DDRB_DQS[0..7] 6

CPU_DRAMRST# 6,17

RD1

+3VS

DDRB_MA36 DDRB_MA16

DDRB_CLK06 DDRB_CLK0#6

DDRB_PAR6

DDRB_BS1#6 DDRB_CS0#6

DDRB_MA14_WE#6 DDRB_ODT06

DDRB_CS1#6 DDRB_ODT16

1 2

@

0_0603_5%

CD4

2.2U_0402_6.3V6M

2

JDDR1B

DDRB_MA3 DDRB_MA1

DDRB_CLK0 DDRB_CLK0#

DDRB_PAR

DDRB_BS1# DDRB_CS0#

DDRB_MA14_WE# DDRB_ODT0

DDRB_CS1# DDRB_ODT1

DDRB_DQ32 DDRB_DQ33 DDRB_DQS#4

DDRB_DQS4 DDRB_DQ39 DDRB_DQ38 DDRB_DQ41 DDRB_DQ40

DDRB_DQ47 DDRB_DQ43 DDRB_DQ53 DDRB_DQ48 DDRB_DQS#6

DDRB_DQS6 DDRB_DQ54 DDRB_DQ50 DDRB_DQ60 DDRB_DQ57

DDRB_DQ59 DDRB_DQ58

1

CD5

0.1u_0201_10V6K

2

SMB_CLK_S3 +VDD_SPD

SMB_CLK_S37,40 SMB_DATA_S3 7,40

1

2

131

A3

133

A1

135

VDD_9

137

CK0_t

139

CK0_c

141

VDD_11

143

Parity

145

BA1

147

VDD_13

149

CS0_n

151

WE_n/A14

153

VDD_15

155

ODT0

157

CS1_n

159

VDD_17

161

ODT1

163

VDD_19

165

C1/CS3_n/NC

167

VSS_53

169

DQ37

171

VSS_55

173

DQ33

175

VSS_57

177

DQS4_c

179 181 183 185 187 189 191 193 195 197 199 201 203 205 207 209 211 213 215 217 219 221 223 225 227 229 231 233 235 237 239 241 243 245 247 249 251 253 255 257 259

261

DM4_n/DBl4_n/NC DQS4_t VSS_60 DQ38 VSS_62 DQ34 VSS_64 DQ44 VSS_66 DQ40 VSS_68 DM5_n/DBl5_n/NC VSS_69 DQ46 VSS_71 DQ42 VSS_73 DQ52 VSS_75 DQ49 VSS_77 DQS6_c

DM6_n/DBl6_n/NC DQS6_t VSS_80 DQ55 VSS_82 DQ51 VSS_84 DQ61 VSS_86 DQ56 VSS_88 DM7_n/DBl7_n/NC VSS_89 DQ62 VSS_91 DQ58 VSS_93 SCL VDDSPD VPP_1 VPP_2

GND_1

ARGOS_D4AS0-26001-1P60

ME@

EVENT_n

VDD_10

CK1_t

CK1_c

VDD_12

A10/AP

VDD_14

BA0

RAS_n/A16

VDD_16

CAS_n/A15

A13

VDD_18

C0/CS2_n/NC

VREFCA

SA2

VSS_54

DQ36

VSS_56

DQ32

VSS_58 VSS_59

DQ39

VSS_61

DQ35

VSS_63

DQ45

VSS_65

DQ41 VSS_67 DQS5_c

DQS5_t

VSS_70

DQ47 VSS_72

DQ43 VSS_74

DQ53 VSS_76

DQ48 VSS_78

VSS_79

DQ54 VSS_81

DQ50 VSS_83

DQ60 VSS_85

DQ57 VSS_87 DQS7_c

DQS7_t

VSS_90

DQ63 VSS_92

DQ59 VSS_94

SDA

SA0 SA1

GND_2

132

A2

134 136 138 140 142 144

A0

146 148 150 152 154 156 158 160 162 164 166 168 170 172 174 176 178 180 182 184 186 188 190 192 194 196 198 200 202 204 206 208 210 212 214 216 218 220 222 224 226 228 230 232 234 236 238 240 242 244 246 248 250 252 254 256 258

Vtt

260 262

DDRB_MA2 DDRB_EVENT#

DDRB_CLK1 DDRB_CLK1#

DDRB_MA0

DDRB_MA10 DDRB_BS0#

DDRB_MA16_RAS# DDRB_MA15_CAS#

DDRB_MA13

+VREF_CA_DIMM DDRB_SA2

DDRB_DQ36 DDRB_DQ37

DDRB_DQ34 DDRB_DQ35 DDRB_DQ45 DDRB_DQ44 DDRB_DQS#5

DDRB_DQS5 DDRB_DQ46 DDRB_DQ42 DDRB_DQ52 DDRB_DQ49

DDRB_DQ55 DDRB_DQ51 DDRB_DQ56 DDRB_DQ61 DDRB_DQS#7

DDRB_DQS7 DDRB_DQ62 DDRB_DQ63 SMB_DATA_S3

DDRB_SA0 DDRB_SA1

1

CD1

+0.6VS

RD91

240_0402_1%

DDRB_MA2 6

DDRB_CLK1 6 DDRB_CLK1# 6

DDRB_MA0 6

DDRB_MA10 6 DDRB_BS0# 6

DDRB_MA16_RAS# 6 DDRB_MA15_CAS# 6

DDRB_MA13 6

@

1

2

0.1u_0201_10V6K

CD2

+1.2V

12

@

1

2

2.2U_0402_6.3V6M

1 2

@

1

2

CD20

1

EMC_NS@

2

CD16

RD2

0_0603_5%

Layout Note: Place near DIMM

1

2

10U_0603_6.3V6M

CD21

1

EMC_NS@

2

0.1u_0201_10V6K

4.7U_0402_6.3V6M

CD17

2

CD22

1

EMC_NS@

2

CD18

1

2

10U_0603_6.3V6M

CD23

CD@

RF@

1

2

0.1u_0201_10V6K CD36

Near JDDRL1

+2.5V_DDR

+1.2V

1

CD117

0.1u_0201_10V6K

B B

DDR_SB_VREFCA5

A A

1

CD13

0.022U_0201_6.3V6-K

2

12

RD6

24.9_0402_1%

+3VS +3VS +3VS

12

RD7 0_0402_5%

@

12

RD10 0_0402_5%

@

RD4

1 2

2_0402_5%

DDRB_SA0 DDRB_SA1 DDRB_SA2

2

12

RD8 0_0402_5%

@

12

RD11 0_0402_5%

@

12

RD3 1K_0402_1%

12

RD5 1K_0402_1%

Note: VREFtrace width:20mils at least Spacing:20milsto other signal/planes PlacenearDIMMscoket

+VREF_CA_DIMM

1

CD14

0.1u_0201_10V6K

2

12

RD9 0_0402_5%

@

12

RD12 0_0402_5%

@

+1.2V

1

2

10U_0603_6.3V6M

CD19

CD@

+1.2V

1

EMC_NS@

2

4.7U_0402_6.3V6M

CD15

For EMC

+VPP

+2.5V_DDR+0.6VS

@

1

2

CD30

1

2

1U_0402_6.3V6K

10U_0603_6.3V6M

CD9

CD10

CD11

CD@

1

2

CD32

1

2

1U_0402_6.3V6K

CD33

CD@

1

2

1U_0402_6.3V6K

CD31

1U_0402_6.3V6K

CD12

@

1

2

1U_0402_6.3V6K

CD34

1

+

2

1U_0402_6.3V6K

220U_6.3V_M

CD35

CD7

1

2

10U_0603_6.3V6M

CD8

CD@

1

2

1U_0402_6.3V6K

CD29

CD@

1

2

1U_0402_6.3V6K

1

2

CD27

CD118

1U_0402_6.3V6K

1

2

CD28

CD6

1

2

10U_0603_6.3V6M

CD24

RF@

1

2

33P_0402_50V8J

CD37

2

CD25

1

2

10U_0603_6.3V6M

CD26

SPD Address = 2H

5

Title

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

4

3

2015/08/20

LC Future Center Secret Data

Deciphered Date

2

2016/08/20

Title

DDR4 SO-DIMM

Size

Document Number Re v

Custom

Date: Sheet of

Thursday, January 14, 2016

CG411

18 60

1

18 60

1.0

5

D D

4

3

2

1

C C

B B

A A

Title

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

5

4

3

2015/08/20

LC Future Center Secret Data

Deciphered Date

2

2016/08/20

Title

Blank

Size

Document Number Re v

C

Thursday, January 14, 2016

Date: Sheet

Thursday, January 14, 2016

CG411

1

19 60

1.0

of

5

D D

C C

4

3

2

1

B B

A A

Title

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

5

4

3

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

2015/08/20

LC Future Center Secret Data

Deciphered Date

2

2016/08/20

Title

Blank

Size

Document Number Rev

Custom

Date: Sheet

Thursday, January 14, 2016

CG411

1

20 60

1.0

of

5

D D

4

3

2

1

C C

B B

A A

Title

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

5

4

3

2015/08/20

LC Future Center Secret Data

Deciphered Date

2

2016/08/20

Title

Blank

Size

Document Number Re v

C

Thursday, January 14, 2016

Date: Sheet

Thursday, January 14, 2016

CG411

1

21 60

1.0

of

5

D D

4

3

2

1

C C

B B

A A

Title

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

5

4

3

2015/08/20

LC Future Center Secret Data

Deciphered Date

2

2016/08/20

Title

Blank

Size

Document Number Re v

C

Thursday, January 14, 2016

Date: Sheet

Thursday, January 14, 2016

CG411

1

22 60

1.0

of

5

D D

4

3

2

1

C C

B B

A A

Title

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

5

4

3

2015/08/20

LC Future Center Secret Data

Deciphered Date

2

2016/08/20

Title

Blank

Size

Document Number Re v

C

Thursday, January 14, 2016

Date: Sheet

Thursday, January 14, 2016

CG411

1

23 60

1.0

of

5

D D

4

3

2

1

C C

B B

A A

Title

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

5

4

3

2015/08/20

LC Future Center Secret Data

Deciphered Date

2

2016/08/20

Title

Blank

Size

Document Number Re v

C

Thursday, January 14, 2016

Date: Sheet

Thursday, January 14, 2016

CG411

1

24 60

1.0

of

5

D D

4

3

2

1

C C

B B

A A

Title

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

5

4

3

2015/08/20

LC Future Center Secret Data

Deciphered Date

2

2016/08/20

Title

Blank

Size

Document Number Re v

C

Thursday, January 14, 2016

Date: Sheet

Thursday, January 14, 2016

CG411

1

25 60

1.0

of

5

D D

4

3

2

1

C C

B B

A A

Title

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

5

4

3

2015/08/20

LC Future Center Secret Data

Deciphered Date

2

2016/08/20

Title

Blank

Size

Document Number Re v

C

Thursday, January 14, 2016

Date: Sheet

Thursday, January 14, 2016

CG411

1

26 60

1.0

of

5

D D

4

3

2

1

C C

B B

A A

Title

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

5

4

3

2015/08/20

LC Future Center Secret Data

Deciphered Date

2

2016/08/20

Title

Blank

Size

Document Number Re v

C

Thursday, January 14, 2016

Date: Sheet

Thursday, January 14, 2016

CG411

1

27 60

1.0

of

5

D D

4

3

2

1

C C

B B

A A

Title

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

5

4

3

2015/08/20

LC Future Center Secret Data

Deciphered Date

2

2016/08/20

Title

Blank

Size

Document Number Re v

C

Thursday, January 14, 2016

Date: Sheet

Thursday, January 14, 2016

CG411

1

28 60

1.0

of

5

D D

4

3

2

1

C C

B B

A A

Title

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

5

4

3

2015/08/20

LC Future Center Secret Data

Deciphered Date

2

2016/08/20

Title

Blank

Size

Document Number Re v

C

Thursday, January 14, 2016

Date: Sheet

Thursday, January 14, 2016

CG411

1

29 60

1.0

of

5

USB20_N59 USB20_P59

D D

USB20_N5

USB20_P5

FOR EMI

LW1

1

4

EXC24CH900U_4P

EMC_NS@

2

3

2

3

USB20_N5_R

USB20_P5_R

4

USB20_N5 USB20_P5

+3VS

4.7U_0402_6.3V6M

CW2

3

UW1

RW2 6.2K_0402_1%

1 2 1 2

RW9 0_0402_5%@

1 2

RW10 0_0402_5%@

1

2

1

CW3

0.1u_0201_10V6K

2

1U_0402_6.3V6K

CW4

1

2

RREF USB20_N5_R USB20_P5_R

CARD_3V3 SDREG

SD_WP SD_D1_R

SD_D0_R

1

RREF

2

DM

3

DP

4

3V3_IN

5

CARD_3V3

6

SDREG

7

XD_CD#

8

SP1

9

SP2

10

SP3

11

SP4

12

SP5

25

GND

RTS5170-GRT_QFN24_4X4

V18

XD_D7

SP14 SP13 SP12 SP11 SP10

GPIO0

SP9 SP8 SP7 SP6

24 23 22 21 20 19 18 17 16 15 14 13

VDD18

SD_D2_R SD_D3_R

SD_CMD_R

SD_CLK_R SD_CD#

2

CW11U_0402_6.3V6K

12

1

C C

B B

SD_D0_R

SD_D1_R

SD_D2_R

SD_D3_R

1 2

RW3 0_0402_5%@

1 2

RW4 0_0402_5%@

1 2

RW5 0_0402_5%@

1 2

RW6 0_0402_5%@

1 2

RW7 0_0402_5%@

1 2

RW8 0_0402_5%

1 2

CW5 5.6P_0402_50V8-D

EMC@

1 2

CW6 5.6P_0402_50V8-D

EMC@

1 2

CW7 5.6P_0402_50V8-D

EMC@

1 2

CW8 5.6P_0402_50V8-D

EMC@

CW11 5.6P_0402_50V8-D

1 2

EMC@

1 2

CW12 5.6P_0402_50V8-D

EMC@

SD_D0

SD_D1

SD_D2

SD_D3

SD_CMDSD_CMD_R

SD_CLKSD_CLK_R

Close to Connector

CARD_3V3

1

DW1

1

CARD_3V3

1

CW9

2

4.7U_0402_6.3V6M

1

CW17

2

0.1u_0201_10V6K

Close to Connector

SD_D0 SD_D1 SD_D2 SD_D3

SD_CD# SD_WP

SD_CMD SD_CLK

SD / MMC

JREAD1

4

VDD

7

DAT0

8

DAT1

9

DAT2

1

CD/DAT3

11

C/D

10

W/P

2

CMD

5

CLK

3

VSS1 VSS2

GND_1 GND_2

6

DEREN_404232501111RHF_NR

ME@

12 13

2

EMC_NS@

2

AZ5123-01F.R7GR_DFN1006P2X2

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUT URE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUT URE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUT URE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

5

4

FOR ESD

3

2015/08/20

LC Future Center Secret Data

Deciphered Date

2016/08/20

2

Title

Cardreader

Size

Document Number Rev

Custom

Thursday, January 14, 2016

Date: Sheet

Thursday, January 14, 2016

CG411

30 60

1

30 60

1.0

of

5

D D

C C

4

3

2

1

B B

A A

Title

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

5

4

3

2015/08/20

LC Future Center Secret Data

Deciphered Date

2

2016/08/20

Title

Blank

Size

Document Number Re v

Custom

Thursday, January 14, 2016

Date: Sheet

Thursday, January 14, 2016

CG411

1

31 60

1.0

of

5

D D

4

RTPM1 0_0603_5%TPM@

1

CTPM4

0.1u_0201_10V6K

TPM@

2

1 2

1

CTPM1 10U_0603_6.3V6M

2

TPM@

1A

+3VS_TPM+3VS

1

CTPM3

0.1u_0201_10V6K

TPM@

2

3

2

1

TPM

UTPM1

1

NC_1

2

C C

RTPM12

1 2

TPM@

0_0402_5%

Reserve for Nationz TPM

+3VALW

RTPM11

1 2

TPM@

0_0603_5%

Add for Nuvoton TPM

NC_2

3

NC_3

7

PP

6

NC_4

9

NC_7

4

GND_1

11

GND_2

18

GND_3

5

NC_5

8

NC_6

12

NC_8

13

NC_9

14

NC_10

Z32H320TC-LPC-T28-LT1_TSSOP28

TPM@

VDD3 VDD1

LPCPD#

SERIRQ

LAD0 LAD1

LFRAME#

LAD2 LAD3

GND_4

LCLK

VDD2

CLK_RUN#

LRESET#

24 10

28

SERIRQ_TPM

27

LPC_AD0_TPM

26

LPC_AD1_TPM

23

LPC_FRAME#_TPM

22

LPC_AD2_TPM

20

LPC_AD3_TPM

17 25

21 19

TPM_CLKRUN#

15 16

1 2

RTPM2 4.7K_0402_5%TPM@

RTPM5 0_0402_5%TPM@ RTPM6 0_0402_5%TPM@ RTPM7 0_0402_5%TPM@ RTPM8 0_0402_5%TPM@ RTPM9 0_0402_5%TPM@ RTPM10 0_0402_5%TPM@

PLT_RST# 11,37,40,44

1 2 1 2 1 2 1 2 1 2 1 2

+3VS_TPM

Reserve for Nationz TPM

1 2

RTPM13

0_0402_5%

Reserve for Nuvoton TPM

12

RTPM4 0_0402_5%

TPM@

SERIRQ 7,44

LPC_AD0 7,44 LPC_AD1 7,44

LPC_FRAME# 7,44

LPC_AD2 7,44 LPC_AD3 7,44

CLK_PCI_TPM 7

@

+3VS_TPM

PM_CLKRUN# 7

B B

Nationz TPM Nuvoton TPM

RTPM2

RTPM12

RTPM11 NC

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

5

4

3

2015/08/20

LC Future Center Secret Data

Deciphered Date

Stuff

2

2016/08/20

NC

Stuff

Title

TPM

Size

Document Number Re v

Custom

Thursday, January 14, 2016

Date: Sheet

Thursday, January 14, 2016

CG411

1.0

of

32 60

of

32 60

of

1

32 60

5

4

3

2

1

LCD POWER CIRCUIT

+3VS

U5

5

IN

1

D D

0.1u_0201_10V6K

C1

PCH_ENVDD

2

4

EN

SY6288C20AAC_SOT23-5

OUT GND OCB

1 2 3

R263

1 2

@

0_0805_5%

U5 EN PIN VIH MIN 1.5V

PCH_ENVDD4

R1

100K_0402_5%

+3VS

PCH_ENBKL

BKOFF#44

C C

B B

PCH_ENBKL4

PCH_EDP_PWM4

1 2

R11

0_0402_5%

1 2

R12 0_0402_5%@

1 2

R14 0_0402_5%@

1 2

R19 0_0402_5%@

@

1 2

12

+3VS

1 2

12

PCH_ENVDD

12

R10

4.7K_0402_5%

@

DISPOFF#

ENBKL

R16 100K_0402_5%

R18 1K_0402_5%

@

INVT_PWM

R20 100K_0402_5%

ENBKL 44

PCH_CMOS_ON#8

EC_CMOS_ON#44

V20B+ +LEDVDD

2A80mil

+LCDVDD_CON+LCDVDD

R296 0_0402_5%@

R297 0_0402_5%@

1 2

R17 0_0805_5%@

W=60mils

1

2

4.7U_0402_6.3V6M

C121

1 2

@

1

2

C122

RF_NS@

1

2

0.1u_0201_10V6K C123

For RF

2A80mil

33P_0402_50V8J

CMOS_ON#

1

2

4.7U_0805_25V6-K

1

EMC@

2

C15

CD@

C14

EMIRequest

0.1U_0201_25V6-K

EMC_NS@

680P_0402_50V7K

CMOS_ON#

0.01U_0201_25V6-K

EMC_NS@

For EMI

Close to R5

EDP_AUX EDP_AUX#

CPU_EDP_AUX4 CPU_EDP_AUX#4

+3VS

R21

1

C22

2

C9

+3VS

1 2

CPU_EDP_TX0+4 CPU_EDP_TX0-4

CPU_EDP_TX1+4 CPU_EDP_TX1-4

1 2

0_0402_5%

R5

1

2

R8 100K_0402_1%

@

R13 100K_0402_1%

@

W=40 mils

0.1u_0201_10V6K

1 2

@

100K_0402_5%

R9 100K_0402_1%

@

1 2

R15 100K_0402_1%

@

1 2

CPU_EDP_TX1+ EDP_TX1+

CPU_EDP_AUX EDP_AUX CPU_EDP_AUX# EDP_AUX#

CPU_EDP_HPD4

W=60mils

DMIC_DATA43

DMIC_CLK43

USB20_P49 USB20_N49

Touch Screen

+5VS_TS+5VS

1 2

R26 0_0402_5%TS@

0.1u_0201_10V6K

USB20_P6

A A

USB20_N6

L15

1

4

EXC24CH900U_4P

EMC_NS@

2

3

ForEMI

5

1

C25

TS@

2

USB20_P6_CONN

USB20_N6_CONN

3

TS_RS USB20_N6_CONN

USB20_P6_CONN

2

D1 AZC199-02S.R7G_SOT23-3

EMC_NS@

1

1 2 1 2

12

EC_TS_ON44

USB20_N69

USB20_P69

+5VS_TS

R28 0_0402_5%TS@ R23 0_0402_5%TS@

R24 0_0402_5%TS@

USB20_P6_CONN USB20_N6_CONN

1

D2

1

2

AZ5725-01F.R7GR_DFN1006P2X2

2

EMC_NS@

ForEMI

4

JTS1

1

2

3

4

5

6

CVILU_CI1806M2HR0-NH

ME@

GND1 GND2

7 8

Touch Screen

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

3

2015/08/20

LC Future Center Secret Data

Deciphered Date

CMOS Camera

+3VS +3VS_CMOS_R

C5

@

+LCDVDD_CON

2

Need short

J1

@

2

112

JUMP_43X39

LP2301ALT1G_SOT23-3 Q7 @

1

2

1

C10

0.1u_0201_10V6K

@

2

+LEDVDD

1 2

C19 0.1u_0201_10V6K

1 2

C16 0.1u_0201_10V6K

1 2

C17 0.1u_0201_10V6K

1 2

C18 0.1u_0201_10V6K

1 2

C20 0.1u_0201_10V6K

1 2

C21 0.1u_0201_10V6K

+3VS

R182 0_0402_5% R183 0_0402_5%

+3VS_CMOS

.047U_0201_6.3V6K

S

G

2

DMIC_CLK

1 2 1 2

EMC_NS@

C24

D

13

1

EMC@

2

C11

100P_0201_25V8J

W=40mils

1

2

@

C6

EDP_TX0+CPU_EDP_TX0+ EDP_TX0-CPU_EDP_TX0-

EDP_TX1-CPU_EDP_TX1-

DISPOFF# INVT_PWM

USB20_P4_R USB20_N4_R

EMI request

L12

USB20_N4 USB20_N4_R

USB20_P4 USB20_P4_R

2016/08/20

EMC_NS@

1

4

EXC24CH900U_4P

Title

Size

Custom

Date: Sheet

+3VS_CMOS

W=40mils

1

C4 10U_0603_6.3V6M

@

2

1

2

0.01U_0201_10V6K

1 2

R3

0_0603_5%

1

C3

0.1u_0201_10V6K

CD@

2

@

EMI request

DISPOFF#

1

2

EMC_NS@

C12

470P_0201_50V7-K

JEDP1

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

28

29

30

31

G1

32

G2

DRAPH_FC5AF301-3181H

ME@

INVT_PWM

1

2

EMC_NS@

C13

470P_0201_50V7-K

ForEMI

2

3

eDP/CMOS/Touch screen

Document Number Re v

CG411

Thursday, January 14, 2016

CG411

1

33 60

of

1.0

5

4

3

2

1

HDMI_CLK-_C

HDMI_CLK+_C HDMI_CLK+_CON

D D

HDMI_TX0-_C

HDMI_TX0+_C

HDMI_TX1-_C HDMI_TX1-_CON

HDMI_TX1+_C

HDMI_TX2-_C

HDMI_TX2+_C

L2

1

4

EXC24CH900U_4P L3

1

4

EXC24CH900U_4P L4

1

4

EXC24CH900U_4P L5

1

4

EXC24CH900U_4P

EMC@

1

4

1

4

1

4

1

4

2

3

EMC@

2

3

EMC@

2

3

EMC@

2

3

2

3

2

3

2

3

2

3

HDMI_CLK-_CON

HDMI_TX0-_CON

HDMI_TX0+_CON

HDMI_TX1+_CON

HDMI_TX2-_CON

HDMI_TX2+_CON

EMC_NS@

1 2

C26 3.3P_0402_50V8-C

EMC_NS@

1 2

C27 3.3P_0402_50V8-C

EMC_NS@

1 2

C28 3.3P_0402_50V8-C

EMC_NS@

1 2

C29 3.3P_0402_50V8-C

EMC_NS@

1 2

C30 3.3P_0402_50V8-C

EMC_NS@

1 2

C31 3.3P_0402_50V8-C

EMC_NS@

1 2

C32 3.3P_0402_50V8-C

EMC_NS@

1 2

C33 3.3P_0402_50V8-C

+3VS

5

G

Q1B

DDPB_CLK4

2

G

Q1A

DDPB_DATA4

S

2N7002KDWH_SOT363-6

S

2N7002KDWH_SOT363-6

61

D

34

D

HDMICLK_R

HDMIDAT_R

HDMI_DET HDMI_DET HDMIDAT_R HDMICLK_R HDMICLK_R +5VS_HDMI

D3

1

2

4

5

3

8

AZ1045-04F_DFN2510P10E-10-9

EMC_NS@

9

10

8

9

7

6

HDMIDAT_R

+5VS_HDMI

For EMC

C C

B B

HDMI_CLK-_C HDMI_CLK+_C HDMI_TX0-_C HDMI_TX0+_C HDMI_TX1-_C HDMI_TX1+_C HDMI_TX2-_C HDMI_TX2+_C

1 2

R29 470_0402_5%

1 2

R30 470_0402_5%

1 2

R31 470_0402_5%

1 2

R32 470_0402_5%

1 2

R33 470_0402_5%

1 2

R34 470_0402_5%

1 2

R37 470_0402_5%

1 2

R38 470_0402_5%

+3VS

1 2

R42

100K_0402_5%

+3VS

R35

1M_0402_5%

1 2

13

D

2

G

@

Q13 2N7002KW_SOT323-3

S

HDMI_HPD4

HDMI_CLK-4 HDMI_CLK+4

HDMI_TX0-4

HDMI_TX0+4

HDMI_TX1-4

HDMI_TX1+4

HDMI_TX2-4

HDMI_TX2+4

2N7002KW_SOT323-3

S

2

G

Q12

13

D

HDMI_CLKHDMI_CLK+

HDMI_TX0HDMI_TX0+

HDMI_TX1HDMI_TX1+

HDMI_TX2HDMI_TX2+

1 2

+5VS

2

3

D4

@

BAT54S-7-F_SOT23-3

1

D4

R41 20K_0402_5%

C35 0.1u_0201_10V6K C36 0.1u_0201_10V6K

C37 0.1u_0201_10V6K C38 0.1u_0201_10V6K

C39 0.1u_0201_10V6K C40 0.1u_0201_10V6K

C41 0.1u_0201_10V6K C42 0.1u_0201_10V6K

12 12

SUSP46

HDMI_DET

+5VS

HDMI_CLK-_C HDMI_CLK+_C

HDMI_TX0-_C HDMI_TX0+_C

HDMI_TX1-_C HDMI_TX1+_C

HDMI_TX2-_C HDMI_TX2+_C

D5

2 3

RB491D_SOT23-3

@

LP2301ALT1G_SOT23-3

1 3

D

2

R43 0_0402_5%@ R44 0_0402_5%@

R45 0_0402_5%@ R46 0_0402_5%@

R47 0_0402_5%@ R48 0_0402_5%@

R49 0_0402_5%@ R50 0_0402_5%@

1

Q22

S

G

12 12

2.2K_0402_5%

HDMIDAT_R HDMICLK_R

F1

21

0.5A_6V_1206L050YRHF

R39

1 2

HDMI_CLK-_CON HDMI_CLK+_CON

HDMI_TX0-_CON HDMI_TX0+_CON

HDMI_TX1-_CON HDMI_TX1+_CON

HDMI_TX2-_CON HDMI_TX2+_CON

+5VS_HDMI+5VS_HDMI_F

R40

2.2K_0402_5%

1

C34

0.1u_0201_10V6K

2

JHDMI1

19

HP_DET

18

+5V

17

DDC/CEC_GND

16

SDA

15

SCL

14

Reserved

13

CEC

12

CKCK_shield CK+ D0D0_shield D0+ D1D1_shield D1+ D2D2_shield D2+

GND1 GND2 GND3 GND4

11 10

9 8 7 6 5 4 3 2 1

SINGA_2HE3Y37-000111F

ME@

20 21 22 23

Close to JHDMI1

D6

1

HDMI_CLK-_CON HDMI_CLK-_CON

A A

2

4

5

3

8

AZ1045-04F_DFN2510P10E-10-9

EMC_NS@

5

HDMI_CLK+_CONHDMI_CLK+_CON

9

10

8

9

HDMI_TX0+_CONHDMI_TX0+_CON

7

6

For EMC

HDMI_TX1-_CON HDMI_TX1+_CON HDMI_TX2-_CON HDMI_TX2+_CONHDMI_TX0-_CON HDMI_TX0-_CON

D7

1

2

4

5

3

8

AZ1045-04F_DFN2510P10E-10-9

EMC_NS@

4

9

10

8

9

7

6

HDMI_TX1-_CON HDMI_TX1+_CON HDMI_TX2-_CON HDMI_TX2+_CON

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

3

2015/08/20

LC Future Center Secret Data

Deciphered Date

2

2016/08/20

Title

HDMI_CONN

Size

Document Number Re v

Custom

Thursday, January 14, 2016

Date: Sheet

Thursday, January 14, 2016

CG411

1

34 60

1.0

of

5

4

3

2

1

+DP_3V3+3VS

1 2

RVG16 0_0603_5%@

1

D D

C C

10U_0603_6.3V6M

CVG8

2

UVG1

DP_VGA_HPD4

VGA_TX0+4 VGA_TX0-4

VGA_TX1+4 VGA_TX1-4

VGA_AUX4 VGA_AUX#4 CRT_DDC_CLK 36

CVG3 0.1u_0201_10V6K CVG2 0.1u_0201_10V6K

CVG4 0.1u_0201_10V6K CVG5 0.1u_0201_10V6K

CVG6 0.1u_0201_10V6K CVG7 0.1u_0201_10V6K

1 2 1 2

+RX_AVCC

DP_VGA_HPD

DRX0P DRX0N

DRX1P DRX1N

AUXP AUXN

26

18 19

20 21

15 14

17 22

HPD

RX0P RX0N

RX1P RX1N

RXAUXP RXAUXN

AVCC ASPVCC

+DP_3V3 +DP_3V3 +IVDDO

8

32

OVDD1

OVDD2

23

IVDD33

25

IVDDO

IT6516BFN

+RX_IVDD

9

30

IVDD1

IVDD216IVDD4

IVDD3

31

VGADDCCLK

VGADDCSDA

NC

ISPSCL ISPSDA

VSYNC HSYNC

VDDAC

27

10 11

13 12

1 2

4

VGA_VS VGA_HS

1

TVG1 @

+DAC_VDDC

CRT_DDC_DAT 36

VGA_VS 36 VGA_HS 36

+IVDDO +RX_AVCC

1 2

LVG2 0_0402_5%@

1

CVG10 10U_0603_6.3V6M

2

+IVDDO +RX_IVDD

1 2

RVG19 0_0603_5%@

+IVDDO +DAC_VDDC

1 2

LVG4 0_0402_5%@

0.1u_0201_10V6K

CVG17

1

CVG15

0.1u_0201_10V6K

2

1

CVG16

0.1u_0201_10V6K

2

1

2

1

CVG11

4.7U_0402_6.3V6M

2

CRT_R

7

IORP

CRT_G

TVG3@ TVG4@

TVG2@

B B

1 1

1

29

PCSDA

28

PCSCL

24

URDBG

IT6516BFN-BX-0061_QFN32_4X4

GND

33

IOGP

IOBP

RSET

6

CRT_B

5

3

1 2

RVG3 200_0402_1%

RVG3 closed to pin3

CRT_R 36

CRT_G 36

CRT_B 36

12

RVG25 75_0402_1%

12

RVG26 75_0402_1%

12

RVG27 75_0402_1%

CRT_R

CRT_G

CRT_B

CLOSE TO UVG1

A A

Title

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

5

4

3

2015/08/20

LC Future Center Secret Data

Deciphered Date

2

2016/08/20

Title

DP to VGA (IT6516BFN)

Size

Document Number Re v

Custom

Thursday, January 14, 2016

Date: Sheet

Thursday, January 14, 2016

CG411

1

35 60

1.0

of

5

4

+CRT_VCC_CON

3

2

1

CRT Connector

14

23

RPVG3

2.2K_0404_4P2R_5%

D D

CRT_DDC_DAT35 CRT_DDC_CLK35

CRT_R35

CRT_G35

CRT_B35

CRT_DDC_DAT CRT_DDC_CLK

1 2

RVG4 22_0402_5%

1 2

RVG5 22_0402_5%

CRT_DDC_DAT_R CRT_DDC_CLK_R

CVG35

15P_0402_50V8J

1

2

EMC@

100P_0201_25V8J

CVG36

15P_0402_50V8J

1

2

EMC@

CVG43

15P_0402_50V8J

1

2

1

@

2

LVG6

BLM15BA220SN1D_2P

LVG7

BLM15BA220SN1D_2P

LVG8

BLM15BA220SN1D_2P

CVG37

1

CVG44 68P_0201_50V8-J

@

2

1 2

EMC@

1

2

EMC@

CVG38

15P_0402_50V8J

1

2

EMC@

15P_0402_50V8J

CVG39

1

2

EMC@

15P_0402_50V8J

CVG40

+5VS

DVG1

2

@

3

RB491D_SOT23-3

+CRT_VCC

1

CRT_R_CON CRT_DDC_DAT_R

CRT_G_CON HSYNC_CON

CRT_B_CON VSYNC_CON

CRT_DDC_CLK_R

100P_0201_25V8J

CVG41

FVG1

0.5A_6V_1206L050YRHF

W=40mils

1

@

2

+CRT_VCC_CON

21

@

+CRT_VCC_CON

1

2

JCRT1

6

11

1 7

12

2 8

13

3 9

14

4 10 15

5

SUYIN_070546HR015M25KZR

ME@

@

1 2

RVG39 0_0603_5%

CVG34

0.1u_0201_10V6K

CD@

For EMC

16

G

17

G

+5VS_HDMI

1

DVG2

1

AZ5725-01F.R7GR_DFN1006P2X2

EMC_NS@

2

C C

VGA_HS35

VGA_VS35

B B

VGA_HS

VGA_VS

1 2

RVG32 0_0402_5%@

1 2

RVG33 0_0402_5%@

HSYNC_CON

1

CVG42

10P_0201_50V8F

2

VSYNC_CON

1

CVG45 10P_0201_50V8F

2

CRT_B_CON CRT_G_CON CRT_G_CON CRT_R_CON

A A

DVG3

1

2

4

5

3

8

AZ1045-04F_DFN2510P10E-10-9

EMC_NS@

5

9

10

8

9

7

6

CRT_B_CON

CRT_R_CON

For EMC

VSYNC_CON HSYNC_CON CRT_DDC_CLK_R CRT_DDC_DAT_R

DVG4

1

2

4

5

3

8

AZ1045-04F_DFN2510P10E-10-9

EMC_NS@

4

9

10

8

9

7

6

VSYNC_CON HSYNC_CON CRT_DDC_CLK_R CRT_DDC_DAT_R

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

3

2015/08/20

LC Future Center Secret Data

Deciphered Date

2

2016/08/20

Title

CRT_CONN

Size

Document Number Re v

Custom

Thursday, January 14, 2016

Date: Sheet

Thursday, January 14, 2016

CG411

1

36 60

1.0

of

5

4

3

2

1

+3VALW TO +3VALW_LAN

+3VALW_LAN rising ti me (10%~90%):

+3VALW +3VALW_LAN

D D

100K_0402_5%

LAN_PWR_ON#44

RL2

@

+3VALW

12

RL3

1 2

@

47K_0402_5%

CL8

1

2

@

0.1u_0201_10V6K

Need short

JL1

112

JUMP_43X79 LP2301ALT1G_SOT23-3 Q14

D

S

13

G

2

@

CL9

1

2

@

0.5ms＜spec＜ 10 0m s

width: 40mils

CL4

1

2

@

0.01U_0201_10V6K

Closeto Pin11 Close to Pin32

CL5

1

2

@

4.7U_0402_6.3V6M

CL6

CL7

1

2

0.1u_0201_10V6K

1

2

0.1u_0201_10V6K

Closeto Pin11 Close to Pin32

+3VALW_LAN +LAN_VDDREG

RL1

1 2

0_0603_5%

@

1

CL1

4.7U_0402_6.3V6M

@

2

1

CL2

0.1u_0201_10V6K

CD@

2

+3VALW_LAN +3VS

+3VALW_LAN

RL5 10K_0402_5%

@

1 2

PCIE_WAKE#11,40,44

LAN_WAKE#40,44

C C

+3VS

12

RL9 1K_0402_1%

LAN_PWR_ON#

@

YL1

1

OSC1 GND12OSC2

25MHZ_10PF_7V25000014

CL12

RL10

1 2

0_0402_5%

1

2

ISOLATE#

12

RL11 15K_0402_5%

@

B B

12P_0402_50V8-J

RL7 0_0402_5%@ RL6 0_0402_5%@

GND2

1 2

4 3

LAN_XTALO_R

1

CL13 15P_0402_50V8J

2

PCIE_WAKE#_R

PLT_RST#11,32,40,44 PCIE_PRX_DTX_N59 PCIE_PRX_DTX_P59

1 2

RL21 1K_0402_5%

RL8

@

1 2

RL12

0_0402_5%

1 2

CL10 0.1u_0201_10V6K

1 2

CL11 0.1u_0201_10V6K

CL10close to Pin18 CL11close to Pin17

LAN_XTALI

LAN_XTALO

1 2

2.49K_0402_1%

manual change the Codec PN to RTL8111GUL-CG

+3VALW_LAN RSET

+LAN_VDD10 LAN_XTALO LAN_XTALI

1

TL3 @ TL4 @

LAN_DISABLE#LAN_PWR_ON#

1

+LAN_REGOUT +LAN_VDDREG +LAN_VDD10 PCIE_WAKE#_R ISOLATE# PLT_RST# PCIE_PRX_C_DTX_N5 PCIE_PRX_C_DTX_P5

UL1

33

GND

32

AVDD33_2

31

RSET

30

AVDD10

29

CKXTAL2

28

CKXTAL1

27

LED0

26

LED1/GPIO

25

LED2

24

REGOUT

23

VDDREG

22

DVDD10

21

LANWAKEB

20

ISOLATEB

19

PERSTB

18

HSON

17

HSOP

RTL8111GUL-CG QFN 32P

8111GUL@

REFCLK_N

REFCLK_P

HSIN

HSIP

CLKREQB

AVDD33_1

MDIN3 MDIP3

AVDD10_2

MDIN2 MDIP2 MDIN1 MDIP1

AVDD10_1

MDIN0 MDIP0

CLK_PCIE_LAN#

16

CLK_PCIE_LAN

15

PCIE_PTX_C_DRX_N5

14

PCIE_PTX_C_DRX_P5

13

LAN_CLKREQ#_R

12

+3VALW_LAN

11

LAN_MDI3-

10

LAN_MDI3+

9

+LAN_VDD10

8

LAN_MDI2-

7

LAN_MDI2+

6

LAN_MDI1-

5

LAN_MDI1+

4

+LAN_VDD10

3

LAN_MDI0-

2

LAN_MDI0+

1

For RTL8111GUL(SWR mode, reserved)

+LAN_REGOUT

For RTL8111H (LDO mode)

LL1

RL20

1 2

2.2UH_NLC252018T-2R2J-N_5%

1 2

0_0805_5%

8111GUL@

8111H@

4.7U_0402_6.3V6M

CL15

1

CL16

0.1u_0201_10V6K

2

+LAN_VDD10

1

CL17

0.1u_0201_10V6K

2

CD@

CLK_PCIE_LAN# 10 CLK_PCIE_LAN 10 PCIE_PTX_C_DRX_N5 9 PCIE_PTX_C_DRX_P5 9

LAN_MDI3- 38 LAN_MDI3+ 38

LAN_MDI2- 38 LAN_MDI2+ 38 LAN_MDI1- 38 LAN_MDI1+ 38

LAN_MDI0- 38 LAN_MDI0+ 38

1

CL18

0.1u_0201_10V6K

2

LAN_CLKREQ#_R

1

CL19

0.1u_0201_10V6K

2

@

RL4

10K_0402_5%

QL1

1 2

2N7002KW_SOT323-3

RL18 0_0402_5%@

1

CL20

0.1u_0201_10V6K

2

G

1 3

D

1 2

@

S

1

CL21 1U_0402_6.3V6K

2

LAN_CLKREQ# 10

1

CL22

0.1u_0201_10V6K

2

Closeto Pin3,8, 22, 30

Close to Pin22(Reserved)

LayoutNote:LL1mustbe within 200mil to Pin24, CL15,CL16 must be within 200mil to LL1 +LAN_REGOUT:Width =60mil

A A

Title

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

5

4

3

2015/08/20

LC Future Center Secret Data

Deciphered Date

2

2016/08/20

Title

LAN_RTL8111H_CG

Size

Document Number Re v

Custom

Thursday, January 14, 2016

Date: Sheet

Thursday, January 14, 2016

CG411

1

37 60

1.0

of

5

DL1/DL2 1'S PN:SC300003M00

4

3

2

1

TL1

24

D D

LAN_MDI2+ LAN_MDI2-

LAN_MDI3+ LAN_MDI3-

C C

LAN_MDI1LAN_MDI1+

LAN_MDI0LAN_MDI0+

DL1

1

LINE1IN

2

LINE2IN

3

GND1

4

LINE3IN LINE4IN5LINE4OUT

11

GND3

12

GND4

AZ3133-08F.R7G_DFN3020P10E10

EMC_NS@

DL2

1

LINE1IN

2

LINE2IN

3

GND1

4

LINE3IN LINE4IN5LINE4OUT

11

GND3

12

GND4

AZ3133-08F.R7G_DFN3020P10E10

EMC_NS@

LINE1OUT LINE2OUT

GND2

LINE3OUT

GND5

LINE1OUT LINE2OUT

GND2

LINE3OUT

GND5

10 9 8 7 6 13

LAN_MDI2+ LAN_MDI2-

LAN_MDI3+ LAN_MDI3-

LAN_MDI1LAN_MDI1+

LAN_MDI0LAN_MDI0+

1

CL24

0.01U_0201_25V6-K

EMC@

2

EMC

LAN_MDI0+37 LAN_MDI0-37

LAN_MDI1+37 LAN_MDI1-37

LAN_MDI2+37 LAN_MDI2-37

LAN_MDI3+37 LAN_MDI3-37

LAN_MDI0+ LAN_MDI0-

LAN_MDI1+ LAN_MDI1-

LAN_MDI2+ LAN_MDI2-

LAN_MDI3+ LAN_MDI3-

MCT1

23

MX1+

22

MX1-

21

MCT2

20

MX2+

19

MX2-

18

MCT3

17

MX3+

16

MX3-

15

MCT4

14

MX4+

13

MX4-

BOTH_GST5009 LF

Place Close to TL1

EMC

B B

1 2

RL14 0_0603_5%@

1 2

RL15 0_0603_5%@

1 2

RL16 0_0603_5%@

EMC

CHASSIS1_GND

TCT1 TD1+

TD1TCT2 TD2+

TD2TCT3 TD3+

TD3TCT4 TD4+

TD4-

1 2 3 4 5 6 7 8 9 10 11 12

MCT LAN_MDO0+ LAN_MDO0-

MCT LAN_MDO1+ LAN_MDO1-

MCT LAN_MDO2+ LAN_MDO2-

MCT LAN_MDO3+ LAN_MDO3-

0.022U_0603_50V7K

LAN_MDO0+ LAN_MDO0LAN_MDO1+ LAN_MDO2+ LAN_MDO2LAN_MDO1LAN_MDO3+ LAN_MDO3-

1 2 3 4 5 6 7 8

CL32

EMC@

1

2

CHASSIS1_GND

JRJ1

PR1+ PR1PR2+ PR3+ PR3PR2PR4+ PR4-

SANTA_130460-3

12

EMC@

RL17 20_0603_5%

1

CL25 1000P_1206_2KV7-K

EMC@

2

GND_4 GND_3 GND_2 GND_1

EMC

ME@

1

2

12 11 10 9

CHASSIS1_GND

DL3 PDT5061_DO-214AA

EMC@

EMC

A A

Title

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

5

4

2015/08/20

3

LC Future Center Secret Data

Deciphered Date

2016/08/20

2

Title

LAN_Transformer

Size

Document Number Rev

B

Thursday, January 14, 2016

Date: Sheet of

Thursday, January 14, 2016

CG411

38 60

1

38 60

1.0

5

4

3

2

1

1 2

R175 0_0402_5%@

Close to U1

REMOTE+_R

1

2200P_0201_25V7-K

D D

C44

@

2

REMOTE-_R

REMOTE+_R

REMOTE-_R

1 2

R176 0_0402_5%@

1 2

R177 0_0402_5%@

R178 0_0402_5%@

1 2

REMOTE+/-_R, REMOTE1+/-, REMOTE2+/-: Trace width/space:10/10 mil Trace length:<8"

SMSC thermal sensor

placed near DIMM

+3VS

R51

REMOTE+_R REMOTE-_R

12

@

10K_0402_5%

1

C47

0.1u_0201_10V6K

@

2

+3VS

C C

U1

1

VDD

2

D+

3

D-

4

T_CRIT#

NCT7718W_MSOP8

@

SCL

SDA

ALERT#

GND

Address 1001_101xb

8 7 6 5

EC_SMB_CK2 EC_SMB_DA2

REMOTE1+

REMOTE2+

REMOTE2-

REMOTE1-

EC_SMB_CK2 7,44 EC_SMB_DA2 7,44

REMOTE1+

100P_0201_25V8J

REMOTE1-

C45

@

NTC_V1

Near GPU&VRAM

1

2

B

C

Q15

MMBT3904WH_SOT323-3

E

@

3 1

+3VALW

12

R36

13.7K_0402_1%

12

R287 100K_0402_1%_NCP15WF104F03RC

OPT@

R184 0_0402_5%

OPT@

1 2

EC_AGND

R185 0_0402_5%

@

1 2

REMOTE2+

100P_0201_25V8J

REMOTE2-

C46

NTC_V2

1

@

2

C

2

B

E

3 1

+3VALW

12

R25

13.7K_0402_1%

12

R288 100K_0402_1%_NCP15WF104F03RC

Near CPU core

Q16

MMBT3904WH_SOT323-3

@

Near CPU

for layout optimized, change the EC_AGND to GND

+5VLP

HW thermal sensor

1

C7

0.1u_0201_10V6K

@

2

B B

over temperature threshold:

U4

1

VCC

TMSNS1

2

GND

RHYST1

3

OT1

TMSNS2

4

RHYST2

OT2

G718TM1U_SOT23-8

@

8

TMSNS1

7

PHYST1

6

TMSNS2

5

PHYST2

1 2

R6 10K_0402_5%@

1 2

R7 10K_0402_5%@

21.5K_0402_1%

+5VLP +5VLP

R252

@

1 2

R253

21.5K_0402_1%

@

1 2

R196 0_0402_5%@

R197 0_0402_5%@

1 2

NTC_V1

NTC_V2

NTC_V1 44

NTC_V2 44EC_ON44,54,55

RSET=3*RTMH 92+/-30C Hysteresis temperature threshold. RHYST=(RSET*RTML)/(3*RTML-RSET) 56+/-30C

+5VS

1

C49 10U_0805_10V6K

2

1 2

R52 0_0603_5%@

@

1

2

C50

0.1u_0201_10V6K

+5VS_FAN

EC_FAN_SPEED44 EC_FAN_ANTI44

EC_FAN_PWM44

FAN Conn

JFAN1

1

2

3

4

5

6

GND1

7

GND2

ACES_50273-0050N-001

ME@

A A

Title

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUT URE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUT URE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUT URE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

5

4

2015/08/20

3

LC Future Center Secret Data

Deciphered Date

2016/08/20

2

Title

Thermal sensor/FAN CONN

Size

Document Number Rev

Custom

Thursday, January 14, 2016

Date: Sheet

Thursday, January 14, 2016

CG411

39 60

1

39 60

1.0

of

A

B

Mini-Express Card(WLAN/WiMAX)

C

D

E

R258

+3VS

12

R259

49.9K_0402_1%

UART_RX_DEBUG 8

UART_TX_DEBUG 8

EC_RX 44

SUSCLK 10 PLT_RST# 11,32,37,44

PCH_BT_OFF# 8

PCH_WLAN_OFF# 8

SMB_DATA_S3 7,18 SMB_CLK_S3 7,18

EC_TX 44

+3VS_WLAN

Need short

1 1

2 2

@

J2

112

JUMP_43X79

+3VS_WLAN+3VS

2

USB20_P79 USB20_N79

PCIE_PTX_C_DRX_P69 PCIE_PTX_C_DRX_N69

PCIE_PRX_DTX_P69 PCIE_PRX_DTX_N69

CLK_PCIE_WLAN10 CLK_PCIE_WLAN#10

WLAN_CLKREQ_Q# PCIE_WAKE#_WLAN

WLAN_CLKREQ#10

PCIE_WAKE#11,37,44 LAN_WAKE#37,44

1

C53

0.1u_0201_10V6K

@

2

1 2

R61 0_0402_5%@

1 2

R262 0_0402_5%@

1 2

R57 0_0402_5%@

JWLAN1

1

GND1

3

USB_D+

5

USB_D-

7

GND2

9

SDIO_CLK

11

SDIO_CMD

13

SDIO_DAT0

15

SDIO_DAT1

17

SDIO_DAT2

19

SDIO_DAT3

21

SDIO_WAKE

23

SDIO_RESET

KEY E PIN24~PIN31 NC PIN

25 27 29 31

33

GND3

35

PETP0

37

PETN0

39

GND4

41

PERP0

43

PERN0

45

GND5

47

REFCLKP0

49

REFCLKN0

51

GND6

53

CLKEQ0#

55

PEWAKE0#

57

GND7

59

RSRVD/PETP1

61

RSRVD/PETN1

63

GND8

65

RSRVD/PERP1

67

RERVD/PERN1

69

GND9

71

RSRVD1

73

RSRVD2

75

GND10

77

GND15

LCN_DAN05-67406-0102

ME@

3.3VAUX1

3.3VAUX2 LED#1

PCM_CLK

PCM_SYNC

PCM_IN

PCM_OUT

LED#2

GND11

UART_WAKE

UART_RX

24 26 28 30

UART_TX UART_CTS UART_RTS

RSRVD10 RSRVD11

RSRVD9

COEX3 COEX2 COEX1

SUSCLK

RSRVD/W_DISABLE#2

PERSTO#

W_DISABLE#1

I2C_DATA

I2C_CLK

ALERT RSRVD6 RSRVD7 RSRVD8

RSRVD12

3.3VAUX3

3.3VAUX4 GND14

2 4 6 8 10 12 14 16 18 20 22

32 34 36 38 40 42 44 46 48 50 52 54 56

58 60 62 64 66 68 70 72 74

76

1

UART_RX_DEBUG_R

UART_TX_DEBUG_R

EC_TX_RSVD EC_RX_RSVD

SUSCLK_R PLT_RST# BT_OFF# WLAN_OFF#

WLAN_SMB_DATA WLAN_SMB_CLK

EC_TX_R

+3VS_WLAN

T2@

T3@

12

49.9K_0402_1%

1 2

R256 0_0402_5%@

1 2

R257 0_0402_5%@

1 2

R62 0_0402_5%@

1 2

R63 0_0402_5%@

1 2

R88 0_0402_5%@

1 2

R55 0_0402_5%@

1 2

R53 1K_0402_5%

1 2

R56 0_0402_5%@

1 2

R58 0_0402_5%@

1 2

R59 0_0402_5%@

1 2

R89 0_0402_5%@

R186 100K_0402_5%

3 3

4 4

Title

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

A

B

2015/08/20

C

LC Future Center Secret Data

Deciphered Date

2016/08/20

D

Title

NGFF WLAN

Size

Document Number Re v

Custom

Thursday, January 14, 2016

Date: Sheet of

Thursday, January 14, 2016

CG411

40 60

E

40 60

1.0

A

1 1

LEFT SIDE USB3.0 PORT x1

B

C

D

+USB_VCCA

+

1 2

C55

C1111

C125

C127

220U_6.3V_M

1 2

47U_0805_6.3V6-M@

1 2

1U_0402_10V6K@

1 2

1U_0402_10V6K@

E

1 2

+5VALW +USB_VCCA

1

C128 1U_0402_6.3V6K

2

2 2

3 3

USB_ON#44,45

U2

5

4

SY6288D20AAC_SOT23-5

IN

ENB

OUT GND OCB

Low Active 2A

USB30_RX_P1

USB30_RX_N1

USB30_TX_C_P1

USB30_TX_C_N1

USB20_P1

USB20_N1

1 2 3

USB_OC1#

1

C140 1000P_0201_50V7-K

EMC_NS@

2

L13

1

4

EXC24CH900U_4P

L16

1

4

EXC24CH900U_4P L8

1

4

EXC24CH900U_4P

EMC@

USB_OC1# 9

USB30_RX_R_P1

2

USB30_RX_R_N1

3

USB30_TX_R_P1

2

USB30_TX_R_N1

3

USB20_P1_R

2

USB20_N1_R

3

USB30_TX_P19 USB30_TX_N19

USB20_P19

USB20_N19

USB30_RX_P19 USB30_RX_N19

USB30_TX_N1 USB30_TX_C_N1 USB30_TX_R_N1

USB30_RX_P1 USB30_RX_R_P1

+USB_VCCA

1

D11

1

2

EMC_NS@

2

AZ5725-01F.R7GR_DFN1006P2X2

C126 0.1u_0201_10V6K

1 2

C124 0.1u_0201_10V6K

USB30_RX_R_N1 USB30_RX_R_P1

USB30_TX_R_P1

USB30_TX_C_P1 USB30_TX_R_P1USB30_TX_P1

D12

9

10

8

9

7

6

AZ1045-04F_DFN2510P10E-10-9

EMC_NS@

1

2

4

5

3

8

1 2

R95 0_0402_5%@

1 2

R96 0_0402_5%@

1 2

R97 0_0402_5%@

1 2

R93 0_0402_5%@

1 2

R94 0_0402_5%@

1 2

R98 0_0402_5%@

USB30_RX_R_N1

1

USB30_RX_R_P1

2

USB30_TX_R_N1USB30_TX_R_N1

4

USB30_TX_R_P1

5 3

USB20_P1_RUSB20_P1 USB20_N1_RUSB20_N1

USB30_RX_R_N1USB30_RX_N1

USB20_P1_R USB20_N1_R

JUSB1

9

StdA_SSTX+

1

VBUS

8

StdA_SSTX-

3

D+

7

GND_DRAIN

2

D-

6

StdA_SSRX+

4

GND_5

5

StdA_SSRX-

SUYIN_020053GR009M2736L

3

2

1

D13 AZC199-02S.R7G_SOT23-3

EMC_NS@

ME@

GND_1 GND_2 GND_3 GND_4

10 11 12 13

EMC EMC

4 4

Title

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

A

B

C

2015/08/20

LC Future Center Secret Data

Deciphered Date

D

2016/08/20

Title

USB3.0 PORT (LEFT)

Size

Document Number Re v

Custom

Thursday, January 14, 2016

Date: Sheet

Thursday, January 14, 2016

CG411

E

41 60

1.0

of

A

B

C

D

E

F

G

H

SATA HDD Conn.

JHDD1

10

SATA_PTX_DRX_P09 SATA_PTX_DRX_N09

1 1

SATA_PRX_DTX_N09

SATA_PRX_DTX_P09

+5VS_HDD

1

C74 33P_0201_50V8-J

@

2

SATA_PTX_DRX_P0 SATA_PTX_DRX_N0

SATA_PRX_DTX_P0

1

C76 33P_0201_50V8-J

@

2

C66 0.01U_0201_10V6K

1 2 1 2

C67 0.01U_0201_10V6K

1 2

C68 0.01U_0201_10V6K

1 2

C69 0.01U_0201_10V6K

+5VS +5VS_HDD

1

C75

0.1u_0201_10V6K

2

Need short

J3

JUMP_43X79

1

C77 10U_0805_10V6K

2

112

SATA_PTX_C_DRX_P0 SATA_PTX_C_DRX_N0

SATA_PRX_C_DTX_N0SATA_PRX_DTX_N0 SATA_PRX_C_DTX_P0

@

2

1

C78 10U_0805_10V6K

@

2

10

9

8

7

6 5 4 3 2 1

GND2 6 5 4 3

GND1 2 1

ELCO_006809610010846

ME@

12

11

SATA_PTX_DRX_P19 SATA_PTX_DRX_N19

SATA_PRX_DTX_N19

SATA_PRX_DTX_P19

SATA_PTX_DRX_N1 SATA_PRX_DTX_N1 SATA_PRX_C_DTX_N1_14

SATA_PRX_DTX_P1

1 2

C70 0.01U_0201_10V6K14@

1 2

C71 0.01U_0201_10V6K14@

1 2

C72 0.01U_0201_10V6K14@

1 2

C73 0.01U_0201_10V6K14@

SATA_PTX_C_DRX_P1_14SATA_PTX_DRX_P1 SATA_PTX_C_DRX_N1_14

SATA_PRX_C_DTX_P1_14

+5V_ODD

FOR14"

SATAODD Conn.

JODD1

1

GND_1

2

RX+

3

RX-

4

GND_2

5

TX-

6

TX+

7

GND_3

8

DP

9

+5V_1

10

+5V_2

11

MD

12

GND_4

13

GND_5

SUYIN_127382FB013S255ZL

ME@

GND1 GND2

14 15

FOR15"

2 2

For EMC

SATAODD FFCConn

JODD2

1

SATA_PTX_DRX_P1 SATA_PTX_DRX_N1

SATA_PRX_DTX_N1 SATA_PRX_DTX_P1

+5VS +5V_ODD

3 3

Need Short

J4

@

2

112

JUMP_43X79

1

2

10U_0805_10V6K

C85

1

2

0.1u_0201_10V6K

C86

CD@

1 2

C79 0.01U_0201_10V6K15@

1 2

C80 0.01U_0201_10V6K15@

1 2

C81 0.01U_0201_10V6K15@

1 2

C82 0.01U_0201_10V6K15@

SATA_PTX_C_DRX_P1_15 SATA_PTX_C_DRX_N1_15

SATA_PRX_C_DTX_N1_15 SATA_PRX_C_DTX_P1_15

+5V_ODD

1

2

3

4

5

6

7

8

HIGHS_FC1AF081-1151H

ME@

GND1 GND2

9 10

4 4

Title

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUT URE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUT URE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUT URE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

A

B

C

D

2015/08/20

E

LC Future Center Secret Data

Deciphered Date

F

2016/08/20

Title

HDD/ODD CONN

Size

Document Number Rev

Custom

Thursday, January 14, 2016

Date: Sheet

Thursday, January 14, 2016

G

CG411

42 60

H

1.0

of

5

+3VS

1 2

RA2 0_0603_5%@

+5VS

1 2

RA7 0_0603_5%@

1 2

D D

DA1

BAT54CW_SOT323-3

PLUG_IN

1

2

4.7U_0603_10V6-K

CA16

2

3

RA17

RA36

2

1

CA18

1

5.11K_0402_1%

1 2

39.2K_0402_1%

1 2

20K_0402_1%

+5VD

CD@

2

1

0.1u_0201_10V6K

0.1u_0201_10V6K CA19

BEEP#44

PCH_BEEP8

C C

CD@

1

2

CA15

RA10 0_0603_5%@

RA15

12

+3.3VD

1 2

0.1u_0201_10V6K

1 2

CA2

RA14 10K_0402_5%

JSENSE

+3.3VD

+5VA

+5VD

PC_BEEPPC_BEEP1

change the Codec PN to CX11802-33Z,, symbol check ok

HDA_RST_AUDIO#8

HDA_BITCLK_AUDIO8 HDA_SYNC_AUDIO8

HDA_SDIN08

HDA_SDOUT_AUDIO8

DMIC_CLK33 DMIC_DATA33

0_0402_5% @

Close to Pin11,13,16

+3.3VD

1 2

RA24

B B

HDA_RST_AUDIO#

EC_MUTE#44

1

A A

EMC_NS@

2

CA37

EC_MUTE#

1

EMC_NS@

2

CA38

100P_0201_25V8J

DMIC_CLK

DMIC_DATA

100P_0201_25V8J

5

@

0_0402_5%

RB751V-40_SOD323-2

1 2

DA3

RB751V-40_SOD323-2 DA4

1 2

RA35

@

1 2

0_0402_5%

For EMI

12

RA28 47K_0402_5%

@

SPKR_MUTE#

1

EMC@

2

68P_0402_50V8J

CA22

1

EMC_NS@

2

22P_0201_25V8

CA23

1

EMC_NS@

2

22P_0201_25V8

CA24

4

+3VALW_PCH

1 2

RA1633_0402_5%

+5VD

1 2

RA44 0_0402_5%@

RA11 0_0402_5%@

PC_BEEP SPKR_MUTE#

JSENSE

DMIC_CLK_R DMIC_DATA_R

0.1u_0201_10V6K CA13

+3VS

HDA_RST_AUDIO#

HDA_BITCLK_AUDIO HDA_SYNC_AUDIO

HDA_SDOUT_AUDIO

1 2

RA1833_0402_5%

1 2

RA19

CA14 1U_0402_6.3V6K

CA17 2.2U_0402_6.3V6M

GND

Use 250mils wide trace bridging AGND and DGND at codec

HDA_RST_AUDIO# HDA_SYNC_AUDIO HDA_SDOUT_AUDIO

EMC@

1

EMC_NS@

2

33P_0201_50V8-J

CA26

4

HDA_BITCLK_AUDIO HDA_SDIN0

1 2

RA27

27_0402_5%

1

EMC@

2

33P_0201_50V8-J

CA25

1 2

SDATA_IN

1 2

RA1 0_0402_5%@

1 2

RA4 0_0402_5%EMC@ RA6 0_0402_5%@

1 2

RA9 0_0402_5%EMC@

1 2 1 2

RA12 0_0402_5%@

1 2

RA13 0_0402_5%@

For EMI

DVDD_IO

CA1

2

1

0.1u_0201_10V6K

Close to Pin7

UA1

9

RESET#

5

BIT_CLK

8

SYNC

6

SDATA_IN

4

SDATA_OUT

10

PC_BEEP

39

SPKR_MUTE#

38

JSENSE

37

GPIO1/PORTC_R_MIC MUSIC_REQ/GPIO0/PORTC_L_MIC36MICBIASC

40

DMIC_CLK/MUSIC_REQ/GPIO0

1

DMIC_DAT/GPIO1

11

CLASS-D_REF

13

LPWR_5.0

16

RPWR_5.0

19

FLY_P

20

FLY_N

21

AVEE

41

GND

CX11802-33Z QFN LOW POWER CODEC

CX20751-11Z

PORTB_R_LINE

PORTB_L_LINE

PORTD_A_MIC PORTD_B_MIC

GNDA

Audio Jack

RING3_CONN RING2_CONN HP_OUTL_R

HP_OUTR_R

PLUG_IN

1000P_0402_50V7K

FOR ESD

CA43

EMC@

Close to Connector

FILT_1.8V

VDD_IO VDDO_3.3 DVDD_3.3

AVDD_3.3

VREF_1.65V

AVDD_5V

LEFT+

LEFT-

RIGHT+

RIGHT-

MICBIASB

HGNDA

HGNDB

AVDD_HP

PORTA_R

PORTA_L

1

2

EMC_NS@

AZ5123-01F.R7GR_DFN1006P2X2

3

+3VL

3 7 2 18

27 29 28

12 14

17 15

35 34

33 32

30 31

25 26

24 23

22

CD@

2

1

CA27

1

DA5

1

2

3

2

+3VS

1 2

+3VALW

RA3 0_0603_5%@

RA5 0_0603_5%@

1 2

RA43 0_0603_5%@

1 2

AVDD_HP

Close to Pin3

CA16 close to Pin18

1

2

1

0.1u_0201_10V6K

CA3

FILT_1.8V DVDD_IO

AVDD_3.3 VREF_1.65V +5VA

SPK_L+ SPK_L-

SPK_R+ SPK_R-

MICBIASB LINE_B_R

LINE_B_L PORTD_A_MIC

PORTD_B_MIC RING2_CONN

RING3_CONN AVDD_HP HPOUT_R

HPOUT_L

CD@

2

1

220P_0201_25V7-K

CA28

EMC_NS@

AZ5725-01F.R7GR_DFN1006P2X2

CD@

2

1

220P_0201_25V7-K

CA29

CA30

1

DA6

1

2

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

1

2

EMC_NS@

AZ5725-01F.R7GR_DFN1006P2X2

DA7

CA17 close to Pin2

CA4

4.7U_0402_6.3V6M

+3.3VD

MICBIASB

12

RA42

0_0402_5%

@

1 2 1 2 1 2 1 2

1

2

EMC_NS@

AZ5725-01F.R7GR_DFN1006P2X2

2

CD@

1

0.1u_0201_10V6K

CA7

DA2 BAT54AW_SOT323-3

1

@

3

2

3K_0402_1%

12

RA38

RA37

PORTD_A_MIC PORTD_B_MIC

SPK_R+

RA2515_0402_5% CD@

SPK_R-

RA2915_0402_5% CD@

SPK_L+

RA3215_0402_5% CD@

SPK_L-

RA3315_0402_5% CD@

EMC_NS@

AZ5725-01F.R7GR_DFN1006P2X2

2015/08/20

1

2

DA8

1

2

1U_0402_6.3V6K

CA8

12

RA41 0_0402_5%

@

4.7U_0603_10V6-K

RA26 PBY160808T-221Y-N_2PEMC@ RA31 PBY160808T-221Y-N_2PEMC@ RA30 PBY160808T-221Y-N_2PEMC@ RA34 PBY160808T-221Y-N_2PEMC@

DA9

LC Future Center Secret Data

CA35

RPA1

2 3 1 4

100_0404_4P2R_1%

1 2 1 2 1 2 1 2

HP_OUTR HP_OUTR_R HP_OUTL

1 2

RA47

@

0_0402_5%

1 2

RA48

@

0_0402_5%

Deciphered Date

2

LINE_B_R

LINE_B_L

RPA2 100_0404_4P2R_1%

1 4

2 3

1

CA36

4.7U_0603_10V6-K

2

RA45 0_0402_5%@ RA46 0_0402_5%@

1 2

@

470P_0201_50V7-K

1 2

@

470P_0201_50V7-K

Close to Pin27

Close to Pin29

1 4 2 3

1 2

CA39 2.2U_0402_6.3V6M CA40 2.2U_0402_6.3V6M

1 2

1 2 1 2

CA41

CA42

2016/08/20

+5VA

2

1

CA11

AVDD_HP

0.1u_0201_10V6K

Close to Pin28 Close to Pin24

1

2

1

CA6

CA5

0.1u_0201_10V6K

82.5_0404_4P2R_1%

HP_OUTL_R

HP_OUTR_R

2

1

CA9

RPA3

SPK_R+_CONN SPK_R-_CONN SPK_L+_CONN SPK_L-_CONN

EMC@

1

2

CA31

2.2U_0402_6.3V6M

1

2

1U_0402_6.3V6K

CA10

EMC@

1

2

CA32

470P_0201_50V7-K

HP_OUTL_R

RING2_CONN

PLUG_IN

RING3_CONN

HP_OUTR HP_OUTL

RING3_CONN RING2_CONN

EMC@

1

2

CA34

CA33

470P_0201_50V7-K

1

2

CA45

Title

Codec_CX11802 & Audio jack

Size

Document Number Re v

Custom

Date: Sheet of

2

1

CA12

0.1u_0201_10V6K

JSPK1

1

2

3

4

5

GND1

6

GND2

ACES_88231-04001

ME@

470P_0201_50V7-K

1

2

CA44

100P_0201_25V8J

Thursday, January 14, 2016

1

CG411

1

JHP1

3

G/M

1

L/R

5

6

2

R/L

4

M/G

SINGA_2SJ3095-091111F

ME@

43 60

7

MS

1.0

5

ForESD

PLT_RST#

1

CE1 220P_0201_25V7-K

EMC@

2

D D

+3VL_EC

1 2

DE1 RB751V-40_SOD323-2

1 2

RE8

100K_0402_5%

C C

+3VL_EC

RPE2

2 3 1 4

2.2K_0404_4P2R_5%

+3VS

RPE3

1 4 2 3

2.2K_0404_4P2R_5%

H_PECI4

B B

+3VL

1 2

RE35 10K_0402_5%@

1 2

RE36 10K_0402_5%@ RE38 100K_0402_5%

RE40 10K_0402_5%1 2

EC_VR_ON57,59

@

1

2

EC_SMB_DA1 EC_SMB_CK1

EC_SMB_CK2 EC_SMB_DA2

EC_ON

RE58 0_0402_5%@ 12

RE24 43_0402_5%

PM_SLP_S3#

12

For EMI

CLK_PCI_EC

CE12 1U_0402_6.3V6K

KSO[0..17]45

1 2

+3VL

DE2

ON/OFF BKOFF# LID_SW#

BKOFF#

KBRST#7

SERIRQ7,32

LPC_FRAME#7,32

LPC_AD37,32 LPC_AD27,32 LPC_AD17,32 LPC_AD07,32

CLK_PCI_EC7

KSI[0..7]45

1 2

RE2 10_0402_5%

EMC@

10P_0201_50V8F

EMC@

RE56 0_0402_5%@ RE59 0_0402_5%@ RE60 0_0402_5%@ RE61 0_0402_5%@1 2 RE62 0_0402_5%@ RE63 0_0402_5%@ RE64 0_0402_5%@

EC_SMI#9 EC_RX40 EC_TX40

PLT_RST#11,32,37,40

EC_SCI#4

KSI[0..7] KSO[0..17]

EC_SMB_CK1 EC_SMB_DA1

KSI7 KSI6 WRST#

For factory EC flash

ON/OFF45

EC_SMB_CK152,53 EC_SMB_DA152,53

LAN_PWR_ON#37

EC_SMB_CK27,39 EC_SMB_DA27,39

RE27 0_0402_5%@1 2 RE272 0_0402_5%@

RB751V-40_SOD323-2@

USB_ON#41,45

DPWROK_EC11

EC_RSMRST#11

PCIE_WAKE#11,37,40

AC_PRESENT11

1

CE2

2

1 2 1 2

CLK_PCI_EC WRST#

EC_RX EC_TX PLT_RST#

EC_RTCRST#_ON

PAD @

1 1

PAD @

1

PAD @

1

PAD @

1

PAD @

1

PAD @

1

PAD @ PAD @

1

ON/OFF EC_SMB_CK1

EC_SMB_DA1 PECI_EC

EC_SMB_CK2 EC_SMB_DA2

1 2

USB_ON#

PCIE_WAKE#

Change RE6 to 0ohm jump

12 12

IT1 IT2 IT3 IT4 IT5

IT6 IT7 IT8

LPC_FRAME#_EC LPC_AD3_EC LPC_AD2_EC LPC_AD1_EC LPC_AD0_EC

KSI0 KSI1 KSI2 KSI3 KSI4 KSI5 KSI6 KSI7 KSO0 KSO1 KSO2 KSO3 KSO4 KSO5 KSO6 KSO7 KSO8 KSO9 KSO10 KSO11 KSO12 KSO13 KSO14 KSO15 KSO16 KSO17

forECversionupdatetoEX,manualmodifyPNtoFX

+3VL

+3VL_EC

GPG2

A A

GPG2 GPG2

RE43 10K_0402_5%@ RE44 10K_0402_5% RE46 10K_0402_5%@

whenmirror,GPG2pullhigh

whennomirror,GPG2pulllow

12 12 12

5

EC_SPI_CS0#

EC_SPI_SI

EC_SPI_SO

EC_SPI_CLK

RE45 0_0402_5%@

RE47 0_0402_5%@

RE48 0_0402_5%@

RE49 0_0402_5%@ 12

12

4

Close EC

1 2

CE3

0.1u_0201_10V6K

1 2

RE6 0_0402_5%@

4 5 6 7 8

9 10 13 14 15 16 17 22 23

126

58 59 60 61 62 63 64 65 36 37 38 39 40 41 42 43 44 45 46 51 52 53 54 55 56 57

110 111 115 116 117 118

94 95

112 125

33 35 93

2

128

SPI_CS0#

SPI_SI

SPI_SO

SPI_CLK

4

VCOREVCC

+3VS

11

3

VBAT

12

VCC

VCORE

UE1

KBRST#/GPB6 SERIRQ/GPM6 LFRAME#/GPM5 LAD3/GPM3 LAD2/GPM2 LAD1/GPM1 LAD0/GPM0 LPCCLK/GPM4 WRST# ECSMI#/GPD4 PWUREQ#/BBO/SMCLK2ALT/GPC7 LPCPD#/GPE6 LPCRST#/GPD2 ECSCI#/GPD3 GA20/GPB5

IT8586E/AX

KSI0/STB# KSI1/AFD# KSI2/INIT# KSI3/SLIN# KSI4 KSI5 KSI6 KSI7 KSO0/PD0 KSO1/PD1 KSO2/PD2 KSO3/PD3 KSO4/PD4 KSO5/PD5 KSO6/PD6 KSO7/PD7 KSO8/ACK# KSO9/BUSY KSO10/PE KSO11/ERR# KSO12/SLCT KSO13 KSO14 KSO15 KSO16/SMOSI/GPC3 KSO17/SMISO/GPC5

PWRSW# XLP_OUT SMCLK1/GPC1 SMDAT1/GPC2 SMCLK2/PECI/GPF6 SMDAT2/PECIRQT#/GPF7 CRX1/SIN1/SMCLK3/GPH1/ID1 CTX1/SOUT1/GPH2/SMDAT3/ID2

VSTBY0 GPE4

GINT/CTS0#/GPD5 RTS1#/GPE5 CLKRUN#/GPH0/ID0

CK32KE/GPJ7 CK32K/GPJ6

IT8586E-AX_LQFP128_14X14

LQFP-128L

Int. K/B

Matrix

WAKE UP

Clock

SPI_CS0# 7

SPI_SI 7

SPI_SO 7

SPI_CLK 7

1 2

RE1 0_0603_5%@

RE3 0_0603_5%@1 2

+3VL_EC

+3VL_EC_R

minimumtracewidth12mil

74

127

50

92

114

121

VSTBY3

VSTBY4

AVCC

VSTBY(PLL)

VSTBY2

VSTBY126VSTBY5

PWM

LPC

DAC

PS2

EXTERNAL SERIAL FLASH

SPI Flash ROM

UART

SM Bus

GPIO

VSS1

1

VSS2

27

NOVO#

VSS4

VSS5

VSS349VSS6

91

113

122

1

2

AVSS

75

EC_AGND

CE48

0.01U_0201_10V6K

EMC_NS@

3

+3VL

+3VALW

Allcapacitors close to EC

1

CD@

2

CE6

PWM6/SSCK/GPA6 PWM7/RIG1#/GPA7

ADC

ADC5/DCD1#/GPI5 ADC6/DSR1#/GPI6

ADC7/CTS1#/GPI7

DAC2/TACH0B/GPJ2 DAC3/TACH1B/GPJ3

DAC4/DCD0#/GPJ4

DAC5/RIG0#/GPJ5

PS2CLK0/TMB0/CEC/GPF0

PS2DAT0/TMB1/GPF1

DTR1#/SBUSY/GPG1/ID7

CTX0/TMA0/GPB2

TACH1A/TMA1/GPD7

L80HLAT/BAO/GPE0

0.1u_0201_10V6K

CE7

PWM0/GPA0 PWM1/GPA1 PWM2/GPA2 PWM3/GPA3 PWM4/GPA4 PWM5/GPA5

TMRI0/GPC4 TMRI1/GPC6

ADC0/GPI0 ADC1/GPI1 ADC2/GPI2 ADC3/GPI3 ADC4/GPI4

GPF2

GPF3 PS2CLK2/GPF4 PS2DAT2/GPF5

GPH3/ID3 GPH4/ID4 GPH5/ID5 GPH6/ID6

NC1 NC2 NC3 NC4

AC_IN#

LID_SW#

EGAD/GPE1 EGCS#/GPE2 EGCLK/GPE3

GPJ1 SSCE0#/GPG2 SSCE1#/GPG0

DSR0#/GPG6

CRX0/GPC0

RI1#/GPD0 RI2#/GPD1

TACH2/GPJ0

TACH0A/GPD6

L80LLAT/GPE7

PECI_EC BATT_TEMP ACIN# ON/OFF

1

2

3

2

+3VL_EC+3VL_EC

LE1 0_0603_5%@1 2

@

1

2

0.1u_0201_10V6K

CE8

PWR_LED#

24 25 28

EC_VCCST_PWRGD

29 30

EC_FAN_PWM

31 32

EC_VCCST_EN_R EC_VCCST_EN

34

LAN_WAKE#

120 124

SUSP#

66 67

BATT_TEMP

68 69 70 71 72 73

78 79

H_PROCHOT#_EC

80 81

EC_ON_GPIO

85 86

EC_SMB_CK3

87

EC_SMB_DA3

88

TP_CLK

89

TP_DATA

90 96

97 98 99

EC_SPI_CS0#

101

EC_SPI_SI

102

EC_SPI_SO

103

EC_SPI_CLK

105

108 109

EC_FAN_ANTI_R

82 83

EC_VPP_PWREN

84 77

100 106 104 107 119 123 18 21 76 48

EC_FAN_SPEED

47 19 20

VR_HOT#53,59

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

0.1u_0201_10V6K

CE9

B+_Track

ACIN# LID_SW#

GPG2

SYSON_R BKOFF#

1 2

CE15 47P_0201_25V8-JEMC_NS@

1 2

CE16 100P_0201_25V8JEMC_NS@ CE17 100P_0201_25V8JEMC_NS@ 1 2

1 2

CE18 1U_0402_6.3V6K@

Issued Date

1

2

0.1u_0201_10V6K

RE271 0_0402_5%@

RE34

H_PROCHOT#_EC

1

2

CE10

1 2

@

1

2

CE11

0.1u_0201_10V6K

PWR_LED# 45 BATT_CHG_LED# 45 BATT_LOW_LED# 45

EC_VCCST_PWRGD 11 SYS_PWROK 11 EC_FAN_PWM 39 BEEP# 43

SUSP# 46

NTC_V1 39 NTC_V2 39

BATT_TEMP 52,53

PM_SLP_SUS# 11

CPU_VR_READY 59

ADP_I 53

TE1 @1

SUSWARN# 11

SUSACK# 11

ENBKL 33

1 2

PBTN_OUT# 11 EC_SMB_CK3 55 EC_SMB_DA3 55 TP_CLK 45 TP_DATA 45

CAPS_LED# 45 PCH_PWR_EN 46,55 EC_BKL_EN 45 PCH_PWROK 11

LID_SW# 45

VDDQ_PGOOD 55

EC_VPP_PWREN 55 EC_CMOS_ON# 33

EC_MUTE# 43

BKOFF# 33

PM_SLP_S3# 11,13 PM_SLP_S4# 11

NOVO# 45

EC_TS_ON 33

EC_FAN_SPEED 39

NUM_LED# 45

1 2

@

0_0402_5%

RE267

100_0402_5%

QE1

2

G

2N7002KW_SOT323-3

2015/08/20

0.1u_0201_10V6K

1 2

@

RE54

0_0402_5%

RE570_0402_5% @

For PMIC

EC_SMB_DA3 EC_SMB_CK3

RE53 0_0402_5%@

SYSON

RE55 0_0402_5%@

12

13

D

S

+3VS

1

CE19

0.1u_0201_10V6K

2

12

TE3 @1

1

CE14 47P_0201_25V8-J

EMC_NS@

2

ACIN#11

LC Future Center Secret Data

Deciphered Date

LE2 0_0603_5%@

+3VL_EC

12

RE65 100K_0402_5%

1 2

2

0.1u_0201_10V6K

1 2

RE273

0_0402_5%

RPE4

1 4 2 3

2.2K_0404_4P2R_5%

EC_VCCIO_EN

H_PROCHOT# 4,55

+3VL

ACIN#

1 2

13

D

S

1

CE4

2

EC_AGND

EC_VCCST_EN 13

EC_ON 39,54,55

+3VL_EC+3VALW

12

RE274 0_0402_5%

@

EC_FAN_ANTI 39

ME_FLASH 8 SYSON 55

EC_VCCIO_EN 13

RE42 100K_0402_5%

RE262 0_0402_5%@1 2

QE2

2

G

2N7002KW_SOT323-3

@

2016/08/20

+3VL_EC_R

1

CE5 1000P_0201_50V7-K

2

EC_FAN_SPEED EC_FAN_PWM LPC_FRAME# ENBKL CPU_VR_READY EC_CMOS_ON#

TP_CLK TP_DATA

USB_ON#

SUSP# SUSP# SYSON_R EC_VCCST_EN EC_VCCIO_EN

+3VL_EC

12

RE5 10K_0402_5%

LAN_WAKE#

1 2

RE10 10K_0402_5%

1 2

RE11 10K_0402_5%@

1 2

RE7 10K_0402_5%@ RE9 100K_0402_5%@1 2

1 2

RE270 10K_0402_5%

1 2

RE275 10K_0402_5%@

RE12 4.7K_0402_5% RE13 4.7K_0402_5%12

1 2

RE15 100K_0402_5%

1 2

RE18 100K_0402_5%@ RE19 100K_0402_5%1 2

1 2

RE21 100K_0402_5%

1 2

RE269 100K_0402_5%@

1 2

RE268 100K_0402_5%@

Add to fix Reset&PWRGD test fail issue

VDDQ_PGOOD

PM_SLP_S4#

PM_SLP_S3#

SYSON

CE51 0.01U_0201_10V6K

CE50 1000P_0201_50V7-KEMC_NS@

CE21 1000P_0201_50V7-KEMC_NS@

CE13 1000P_0201_50V7-KEMC_NS@

EMCRequest

DE3

1 2

RB751V-40_SOD323-2

PM_SLP_S4#

EC_RTCRST#_ON

RE50

100K_0402_5%

@

ACIN 53

Title

EC ITE8586LQFP

Size

Document Number Re v

C

Date: Sheet

@

QE3

2

G

12

CG411

Thursday, January 14, 2016

CG411

1

B+_Track

12

1 2

13

D

S

1

LAN_WAKE# 37,40

RE52

0_0402_5%

2N7002KW_SOT323-3@

V20B+

12

RE261 470K_0402_5%

@

12

R260 47K_0402_5%

@

+3VS

+3VS+5VS

@

1 2

+5VALW

+3VL_EC

EC_RTC_RST# 10

44 60

RE51 0_0402_5%

of

1.0

5

ON/OFF switch

+3VALW

+3VL

1 2

R85 0_0402_5%@

1 2

R119 0_0402_5%@

R83 100K_0402_5%

@

1 2

R261

0_0402_5%

2

D15

3

BAT54CW_SOT323-3

+3VALW

R111 100K_0402_5%

@

1 2

ON/OFFON/OFFBTN#

@

NOVO_BTN#

1

@

+3VL

R114 100K_0402_5%

1 2

ON/OFF 44

R82

100K_0402_5%

1 2

J5

SHORT PADS

1 2

J6

SHORT PADS

NOVO#

ON/OFF

@

NOVO#44

D D

4

3

2

1

Novo button

NOVO_BTN#

1

D24

1

AZ5123-01F.R7GR_DFN1006P2X2

EMC@

2

1

2

3

SW1 SKRBAAE010_4P

14@

4

1

2

EMC_14@

2

AZ5123-01F.R7GR_DFN1006P2X2

ON/OFFBTN#

D25

24

SW2 EVQP7L01K SPST

3 1

LID switch

ON/OFFBTN#

1

2

3

SW3 SKRBAAE010_4P

15@

4

1

2

EMC_15@

2

AZ5123-01F.R7GR_DFN1006P2X2

D26

U14

1

GND

OUTPUT

2

VCC

AH9247-W-7_SC59-3

+3VL

R264

0.01U_0201_10V6K

1 2

@

0_0402_5%

C1105

1

2

+VCC_LID

1

C1104 100P_0201_25V8J

2

3

LID_SW#

LID_SW# 44

K/B Connector

PWR_CAPS_LED PWR_NUM_LED

CAPS_LED# NUM_LED#_R

C C

CAPS_LED# NUM_LED#_R

1

2

EMC_NS@

1 2

C133 100P_0201_25V8J

1 2

C134 100P_0201_25V8J

EMC_NS@

EMC@

1 2

C117 100P_0201_25V8J

1 2

C118 100P_0201_25V8J

EMC_15@

D22 AZ5123-01F.R7GR_DFN1006P2X2

EMC@

1

D23

1

AZ5123-01F.R7GR_DFN1006P2X2

EMC_15@

2

USB DB Connector

Right Side USB2.0 Port X 2 (USB/B)

+5VALW +USB_VCCB

1

C141 1U_0402_6.3V6K

USB_ON#41,44

2

B B

USB20_P2

USB20_N2

USB20_P3

USB20_N3

USB30_RX_P2

USB30_RX_N2

USB30_TX_N2

USB30_TX_P2

U3

5

OUT

IN

GND

4

OCB

ENB

SY6288D20AAC_SOT23-5

Low Active 2A

L14

EMC_NS@

1

4

EXC24CH900U_4P

L17

EMC_NS@

1

4

EXC24CH900U_4P

EMC_NS@

L18

1

4

EXC24CH900U_4P

EMC_NS@

L19

1

4

EXC24CH900U_4P

2

3

2

3

2

3

2

3

4

1

4

1

4

1

4

1 2 3

2

3

2

3

2

3

2

3

KSI[0..7] KSO[0..17]

For EMC

USB_OC2#

1

C142 1000P_0201_50V7-K

EMC_NS@

2

USB20_P2_CONN

USB20_N2_CONN

USB20_P3_CONN

USB20_N3_CONN

USB30_RX_R_P2

USB30_RX_R_N2

USB30_TX_R_N2

USB30_TX_R_P2

USB_OC2# 9

KSI[0..7] 44 KSO[0..17] 44

KSO12

R291 0_0402_5%14@

KSO14

R292 0_0402_5%15@

KSI2

R289 0_0402_5%14@

KSI5

R290 0_0402_5%15@

USB20_P29

USB20_N29

USB20_P39

USB20_N39

USB30_RX_P29 USB30_RX_N29

USB30_TX_P29 USB30_TX_N29

+3VS +3VS_DB

1 2

R295 0_0402_5%510Z@

1 2 1 2

R67 0_0402_5%@ R66 0_0402_5%@

R254 0_0402_5%@ R255 0_0402_5%@

PWR_LED#44

R282 0_0402_5%510Z@ R283 0_0402_5%510Z@

R284 0_0402_5%510Z@ R285 0_0402_5%510Z@

1 2 1 2

NUM_LED#44

+5VALW

KB_P32

KB_P31

+3VS

KSO17 KSO16

R84

+3VS

USB20_P2_CONN USB20_N2_CONN

USB20_P3_CONN USB20_N3_CONN

PWR_LED#

USB30_RX_R_P2 USB30_RX_R_N2

USB30_TX_R_P2 USB30_TX_R_N2

+3VS_DB

+USB_VCCB

USB20_P2_CONN USB20_N2_CONN

USB20_P3_CONN USB20_N3_CONN

PWR_LED#

R279 0_0402_5%15@ R90 300_0402_5%15@ R281 0_0402_5%15@ R280 0_0402_5%15@

1 2

300_0402_5%

+USB_VCCB

1 2 1 2 1 2 1 2

CAPS_LED#44

JUSB3

12 11 10

9 8 7 6 5 4 3 2 1

ACES_50506-01201-AT1

ME@

JUSB4

22 21 20 19 18 17 16 15 14 13 12 11 10

9 8 7 6 5 4 3 2 1

HIGHS_FC5AF201-1151H

ME@

12 11 10 9 8 7 6 5 4 3 2 1

GND2 GND1 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1

KB_P32 KB_P31 NUM_LED#_R PWR_NUM_LED KSO17_R KSO16_R KSI1 KSI7 KSI6 KSO9 KSI4 KSI5 KSO0 KSI2 KSI3 KSO5 KSO1 KSI0 KSO2 KSO4 KSO7 KSO8 KSO6 KSO3 KSO12 KSO13 KSO14 KSO11 KSO10 KSO15 CAPS_LED# PWR_CAPS_LED

14

GND2

13

GND1

JKB1

32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10

33

GND1

32

34

GND2

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10

9

8

7

6

5

4

3

2

1

CVILU_CF32321D0RONH

ME@

TP/B Connector

TP_CLK TP_DATA

For EMC

KB Backlight Connector

EC_BKL_EN44

+5VS

1 2

R160

R141

@

0_0402_5%

1 2

0_0402_5%

3

AZC199-02S.R7G_SOT23-3

1

+3VS

2

EMC_NS@

DT1

EC_BKL_EN

C1109

0.1u_0201_10V6K

KBL@

TP_PWR

0.1u_0201_10V6K

C114

1

2

10K_0402_5%

1

2

TP_CLK44 TP_DATA44

R265

KBL@

2

G

+5VALW

12

1 2

100K_0402_5%

KBL@

13

D

Q32 2N7002KW_SOT323-3

KBL@

S

1

2

C115

+5VS

S

R266

1

2

EMC_NS@

C116

100P_0201_25V8J

Q31 LP2301ALT1G_SOT23-3

KBL@

D

13

G

2

1

C1108

0.01U_0201_10V6K

KBL@

2

+VCC_KB_LED

0.1u_0201_10V6K

TP_CLK TP_DATA

EMC_NS@

C1106

10U_0603_6.3V6M

KBL@

1

C1110

@

2

+VCC_KB_LED

1

C1107

0.1u_0201_10V6K

2

1 2 3 4

5 6

JTP1

1

2

3

4

5

GND1

6

GND2

HIGHS_FC1AF040-1201H

ME@

KBL@

JKBL1

1 2 3 4

GND1 GND2

HIGHS_FC1AF040-1201H

ME@

BATT_LOW_LED#44

A A

BATT_CHG_LED#44

BATT_LOW_LED#

1

2

BATT_CHG_LED#

1

2

5

1 2

LED2 L-C192JFCT-LCFC_SUPER_AMBER

D18 AZ5123-01F.R7GR_DFN1006P2X2

EMC_NS@

1 2

LED3

L-C192WDT-LCFC_WHITE

D19 AZ5725-01F.R7GR_DFN1006P2X2

EMC_NS@

1 2

R143 470_0402_5%

1 2

R144 1.5K_0402_5%

+3VALW

+5VALW

Title

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

4

3

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

2015/08/20

LC Future Center Secret Data

Deciphered Date

2

2016/08/20

Title

KBD/PWR/IO/LED/TP Conn.

Size

Document Number R ev

Custom

Date: Sheet

CG411

Thursday, January 14, 2016

1

45 60

1.0

of

A

B

C

D

E

LoadSwitch +5VALWTo +5VS +3VALWTo +3VS

1 2

R64 0_0402_5%@

1 1

SUSP# 5VSON

1 2

R27 0_0402_5%@

1U_0402_6.3V6K

C180

1

2

3VSON

C179 1U_0402_6.3V6K

+3VALW

1

2

+5VALW

1

C177 1U_0402_6.3V6K

2

C178 1U_0402_6.3V6K

@

+5VALW

VIN5Vand3.3V(VBIAS=5V),IMAX(perchannel)=6A,Rds=16mohm

5VSON

3VSON

Changethe main source to SA000067600 (GMT) 7/16

+3VS,C173‐‐>2.74ms +5VS,C176‐‐>2.03ms

U13

1

IN1_1

2

IN1_2

3

EN1

4

VBIAS

5

EN2

6

IN2_1

7

IN2_2

G5016KD1U_TDFN14_2X3

OUT1_2 OUT1_1

CT1

GND

CT2

OUT2_2 OUT2_1

GPAD

14 13

12

C176 1000P_0201_50V7-K

11 10

C173 2200P_0402_25V7-K

9 8

15

+5VS_LS

1 2

+3VS_LS

Need Short

J12

@

2

112

JUMP_43X118

J11

@

2

112

JUMP_43X118

Need Short

+5VS

1

C174

0.1u_0201_10V6K

@

2

+3VS

1

C175

0.1u_0201_10V6K

@

2

2 2

+5VALW

12

R155 100K_0402_5%

@

PCH_PWR_EN#_R PCH_PWR_EN#

PCH_PWR_EN44,55

3 3

1 2

R158 100K_0402_5%@

PCH_PWR_EN

100K_0402_5%

Q30

2

G

12

R162

@

+5VLP +5VALW

13

D

S

2N7002KW_SOT323-3@

22U_0603_6.3V6-M

C1103

1

@

2

PCH_PWR_EN#_R

+3VALW +3VALW_PCH

12

R87 100K_0402_5%

@

Need short

J7

@

112

JUMP_43X79

LP2301ALT1G_SOT23-3

Q29

S

G

2

1

2

D

13

C131

0.1u_0201_10V6K

@

2

Id=3.2A

@

1

C130

0.01U_0201_10V6K

@

2

ForDisCharge

12

R156

100K_0402_5%

SUSP34

SUSP

12

R157 100K_0402_5%

@

+0.6VS

12

R159 47_0603_5%

@

+2.5V_DDR

12

R278 200_0402_5%

@

SUSP#44

4 4

A

2

G

S

2N7002KW_SOT323-3

08/29:Needdoublecheckenablesignaland theresistance

B

13

D

Q10

13

D

Q11

2

G

S

2N7002KW_SOT323-3

@

SUSP

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

C

2015/08/20

13

D

Q33

2

G

S

2N7002KW_SOT323-3

@

LC Future Center Secret Data

SUSP

Deciphered Date

D

2016/08/20

Title

DC V TO VS INTERFACE

Size

Document Number Re v

Custom

Thursday, January 14, 2016

Date: Sheet

Thursday, January 14, 2016

CG411

E

46 60

1.0

of

5

D D

AC MODE

A1

VIN

V

A2

PU301

BATT

MODE

C C

BATT

V

B1

B+

4

PU904

V

EC_ON

V

ON/OFF

NOVO

B2

+3VLP

+3VALW

A3

A4

A2

B4

B3

B5

V

EC

3

PCH_PWR_EN#

1

DPWROK_EC

4

PCH_RSMRST#

5

PBTN_OUT#

PM_SLP_S3# PM_SLP_S4# PM_SLP_S5#

V

PM_SLP_SUS#

12

PCH_PWROK

13

SYS_PWROK

2

Q25,+3V_PCH

V

3

+3V_PCH

1

V

15

16

14

V V

CPU

PM_DRAM_PWRGD

VV

6

PCH

H_CPUPWRGD

CPU_PLTRST#

V

V V

NVDD_PWR_EN

(DIS)

Vb

VR_REDY

11

10

PU901 +CPU_CORE

B B

V

VR_ON

SUSP#,SUSP

SYSON

7

9

+1.35V PU501

V

Q31

V

+5VS

Q32

V

+3VS

PU602

V

DGPU_PWR_EN

(DIS)

Va

+1.5VS

PU502

V

+VGA_CORE

V

PU801

DGPU_PWROK

+1.5VS_VGA

V

PU601

+1.05VSP_VGA

V

PU702

+3VS_VGA

V

Q27

VV

VGA

V

VV

+0.675V

SUS_VCCP

8

PU701

V

+1.05VS

A A

Title

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

5

4

3

2015/08/20

LC Future Center Secret Data

Deciphered Date

2

2016/08/20

Title

Power sequence block

Size

Document Number Re v

Custom

Thursday, January 14, 2016

Date: Sheet

Thursday, January 14, 2016

CG411

1

47 60

1.0

of

5

D D

4

3

2

1

C C

B B

A A

Title

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

3

2015/08/20

LC Future Center Secret Data

Deciphered Date

2

2016/08/20

Title

Virtual symbol

Size

Document Number Re v

Custom

Date: Sheet

Thursday, January 14, 2016

CG411

48 60

1

48 60

1.0

of

5

4

3

2

1

PCB Fedical Mark PAD

NH1 HOLEA

D D

1

PAD_O2P6X2P5D2P6X2P5N

H1 HOLEA

1

PAD_D3P4

H11 HOLEA

C C

1

PAD_CT7P0B9P0D3P0

PAD_O2P5X3P0D2P5X3P0N

NH2 HOLEA

1

H12 HOLEA

1

pad_ct6p0b7p0d4p0

NH3 HOLEA

1

PAD_O2P5X2P9D2P5X2P9N

H3 HOLEA

1

CHASSIS1_GND

PAD_CT7P0B9P0D3P0

H13 HOLEA

1

pad_ct6p0b7p0d4p0

H14 HOLEA

1

pad_ct6p0b7p0d4p0

H5 HOLEA

1

PAD_C8P0

H15 HOLEA

1

pad_ct6p0b7p0d4p0

H6 HOLEA

1

PAD_C5P0

H16 HOLEA

1

PAD_ShapeT9P0X8P0CB9P0D3P0

H7 HOLEA

1

PAD_C7P0D3P0

H17 HOLEA

1

PAD_ShapeT7P5X8P0D3P4

H18 HOLEA

1

PAD_CT7P0B6P0D3P3

H19 HOLEA

1

PAD_C3P0D3P0N

FD1

1

FD2

1

H20 HOLEA

1

PAD_C7P0

FD3

1

FD4

1

H21 HOLEA

1

PAD_C6P0D2P5

FD5

FD6

1

B B

A A

Title

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

5

4

2015/08/20

3

LC Future Center Secret Data

Deciphered Date

2016/08/20

2

Title

Hole

Size

Document Number Rev

B

Thursday, January 14, 2016

Date: Sheet of

Thursday, January 14, 2016

CG411

49 60

1

49 60

1.0

5

4

3

2

1

Silergy

D D

SUSP#

B+

Converter

EN PGOOD

FOR PCH

Silergy

SY8288CRAC

PMIC-LV5075AGQV

Adaptor

EC_ON

Converter

FOR SYSTEM

PAGE 39

PGOODEN

+1.0VALW/6A

+5VLP/ 100mA

+5VALW/6A

ALW_PWRGD

ANPEC

Silergy

+3VLP/ 100mA

PMIC-LV5075AGQV

+1.8VALW/1A

SY8286BRAC QFN20_3X3

Converter

C C

EC_ON

FOR SYSTEM

PAGE 39

PGOODEN

Richtek

PMIC-LV5075AGQV

SYSON

TI

BQ24780SRUYR

S5

Switch Mode

S3SUSP#

FOR DDR

+3VALW/ 5A

ALW_PWRGD

+1.2V/7A

+0.6VS/2A

PGOOD

PGOODEN

Battery Charger

Switch Mode

PAGE 46

Richtek

NB685GQ-Z

SMBus

B B

SYSON SUSP#

S5

QFN16_3X3

S3

Switch Mode

FOR DDR

+1.35V/8A

EN

PGOOD

ANPEC

PMIC-LV5075AGQV

PGOOD

+2.5V/1A

Battery polymer

2S1P

VR_ON

Onsemi

NCP81206MNR2G QFN60_7X7

Switch Mode

FOR CPU Core

EN PGOOD

PGOOD_NB

CPU Core/23A

VCCGT/25A

VCCSA/7A

VGATE

RichTek

A A

EC_VR_ON

5

NB681GD-Z

VIDs

Switch Mode

EN

FOR GPU VDDC

4

PGOOD

VCC_OPC/4.5A

Title

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

3

2015/08/20

LC Future Center Secret Data

Deciphered Date

2

2016/08/20

Title

PWR-Power Diagram

Size

Document Number Rev

Custom

Thursday, January 14, 2016

Date: Sheet

Thursday, January 14, 2016

CG411

1

50 60

1.0

of

5

4

3

2

1

7A_24VDC_429007.WRML

VCCRTC

1 2

PF101

21

@

PC105 1U_0402_6.3V6K

APDIN_F

1000P_0201_50V7-K

BAT54CW_SOT323-3

470P_0201_50V7-K

12

EMC@

2

3

PC102

PC101

1 2

EMC@

PD101

1

JDCIN1

1

2

GND1

3

GND2

4

GND3

5

GND4

6

D D

C C

GND5

7

GND6

HIGHS_PJSS0026-8B01H

ME@

ADPIN

EMC@

HCB2012KF-121T50_0805

PL101

1 2

EMC@

HCB2012KF-121T50_0805

PL102

1 2

+3VL

12

PR1016

45.3K_0402_1%

PR101

1K_0603_5%

470P_0201_50V7-K

PR1015

1.5K_0402_1%

12

EMC@

RTC_VCC

EMC@

PC103

1 2

PC104

1000P_0201_50V7-K

JRTC1

1

2

3

G1

4

G2

ACES_50273-0020N-001

ME@

RTC_VCC 20MIL +3VL 20MIL VCCRTC 20MIL

No charge RTC

VIN

B B

A A

Title

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

5

4

3

2015/08/20

LC Future Center Secret Data

Deciphered Date

2

2016/08/20

Title

PWR-DCIN / RTC charger

Size

Document Number Re v

Custom

Thursday, January 14, 2016

Date: Sheet

Thursday, January 14, 2016

CG411

1

51 60

1.0

of

5

4

3

2

1

SUYIN_125022HB008M202ZL

10

9

JBATT1

GND1 GND2

ME@

1

2

3

4

5

6

7

8

D D

VBAT

EC_SMCA EC_SMDA

PF201

12A_24V_F1206HB12V024T/M

1 2

3

2

1 2

PR202 100_0402_1%

1 2

PR201 100_0402_1%

EC_SMB_CK1 44,53 EC_SMB_DA1 44,53

Reverse PD201 PD202 For EMI request

PD201

EMC_NS@

AZC199-02S.R7G_SOT23-3

1

PR209

1 2

100K_0402_1%

C C

BATT_TEMP_IN

1

PD202

1

EMC_NS@

AZ5215-01F_DFN1006P2E2

2

PR213

1 2

10K_0402_5%

+3VALW

BATT_TEMP 44,53

A/D

VBAT_F

HCB2012KF-121T50_0805

PC201

1000P_0201_50V7-K

1 2

EMC@

PL201

1 2 1 2

PL202

EMC@

BATT+

12

PC202

0.01U_0201_25V6-K

EMC@

2S1P BAT +6V ~ 8.4 V

SUYIN_125022HB008M202ZL

JBATT2

9

B B

A A

GND1

10

GND2

ME@

1

2

3

4

5

6

7

8

VBAT

EC_SMCA EC_SMDA

BATT_TEMP_IN

Title

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

5

4

3

2015/08/20

LC Future Center Secret Data

Deciphered Date

2

2016/08/20

Title

PWR-BATTERY CONN/OTP

Size

Document Number Re v

Custom

Thursday, January 14, 2016

Date: Sheet

Thursday, January 14, 2016

CG411

1

52 60

1.0

of

5

4

3

2

1

AON6414AL_DFN8-5

VIN

D D

12

PC329

1000P_0201_50V7-K

EMC_NS@

12

PC330

1000P_0201_50V7-K

EMC_NS@

12

PC317

1000P_0201_50V7-K

EMC_NS@

12

PC332

EMC_NS@

12

470P_0201_50V7-K

PQ311

1 2

4 12

PR302

4.7_0603_5%

3

5

PC301

N1

12

1 2 3

PC302

0.022U_0402_25V7K

PQ312

AON7408L_DFN8-5

4

N2

1 2

EMC_NS@

0.1U_0201_25V6-K

PR301

0.01_1206_1%

PC305

1 2

4 3

PC331

1 2

EMC_NS@

1000P_0201_50V7-K

BQ24780_BATDRV

499K_0402_1%

PR303

5

4

12

321

PC308

0.01U_0201_25V6-K

1 2

PC306

0.1U_0201_25V6-K

1 2

EMC_NS@

0.1U_0201_25V6-K

PC312

V20B+

PQ314 AON6414AL_DFN8-5

@

PJ301

1 2

JUMP_43X118

PC303

EMC_NS@

10U_0603_25V6-M

1U_0603_25V6K

112

PC307

VIN

2

1 2

BATT+

PC304

10U_0603_25V6-M

12

5

432K and 64.9k change to 43k and 6.49k.0.1u change to 0.01u decrease ACDET deassert time

12

C C

ADP_I44

B B

PR310

4.02K_0603_1%

12

PR311

1 2

4.02K_0603_1%

6.49K_0402_1%

ACIN44

EC_SMB_DA144,52

EC_SMB_CK144,52

1 2

PC325

PC324

100P_0201_25V8J

1 2

PR315

12

PC309

0.01U_0201_25V6-K

BQ24780_VDD

Psys59

100P_0201_25V8J

IDCHG

PR313

43K_0402_1%

1 2

PC1108

@

+3VALW

VIN

12

1U_0603_25V6K

PR339 20K_0402_1%@

12

PR324100K_0402_1% @

PR3250_0402_5% @1 2 PR3200_0402_5% @

PR3220_0402_5% @1 2

PR3230_0402_5% @

VR_HOT#44,59

100P_0201_25V8J

1 2

PR331

316K_0402_1%

PC315

ACDET

12

EC_SMB_DA1_R

EC_SMB_CK1_R

ADP_I_R

12

3

2

PD302

BAT54CW_SOT323-3

1

ACP

PR314

10_1206_5%

1 2

780_VCC

28

ACIN_R

11

12

10 13 14 21

ILIM

@

PR330

1 2

12

PR333 100K_0402_1%

PC328

1 2

need config special appliction

0.1U_0201_25V6-K

2

ACP

VCC

6

ACDET

BQ24780SRUYR_QFN24_4X4

3

CMSRC

4

ACDRV

5

ACOK SDA

PU301

SCL

7

IADP

8

IDCHG

9

PMON

PROCHOT# CMPIN CMPOUT ILIM

0_0402_5%

1 2

14.7K_0402_1%

TB_STAT#ILIM_R

PR332

V20B+

ACN

REGN

BTST

HIDRV

PHASE

LODRV

GND

PAD

BATDRV

BATSRC

SRP

SRN

BATPRES#

15

BQ24780_VDD

24

BST_CHG

25

DH_CHG

26

LX_CHG

27

DL_CHG

23 22

29

BQ24780_BATDRV

18

17

SRP_R

20

SRN_R

19

BATT_TEMP 44,52

1 2

PR316

1 2

2.2_0603_5%

PR328

PR329

PC3162.2U_0603_10V6-K

PC318

0.047U_0603_16V7K

PR338 10_0603_5%

10_0603_5%

12

PQ317

AON7408L_DFN8-5

12 12

12

1

ACN

TB_STAT#

16

4

1 2

5

PQ316 AON7408L_DFN8-5

321

5

321

PC327

0.1U_0201_25V6-K

PC310

1 2

2200P_0201_25V7-K

EMC@

4.7UH_PCMB063T-4R7MS_5.5A_20% PL302

1 2

12

PR321

4.7_0603_5%

EMC@

12

PC321

2200P_0201_25V7-K

EMC@

SRP

SRN

1 2

CHG

PC313

1 2

10U_0805_25V6K

PC314

0.01_1206_1%

1 2

PC322

1 2

10U_0805_25V6K

PR317

0.1U_0201_25V6-K

4 3

1 2

PC323

0.1U_0201_25V6-K

0.5C charge

PC319

1 2

10U_0805_25V6K

BATT+

PC320

10U_0805_25V6K

A A

Title

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

5

4

3

2015/08/20

LC Future Center Secret Data

Deciphered Date

2

2016/08/20

Title

PWR-CHARGER

Size

Document Number Re v

C

Thursday, January 14, 2016

Date: Sheet

Thursday, January 14, 2016

CG411

1

53 60

1.0

of

5

4

3

2

1

+3VALW

PR407 100K_0402_5%

V20B+

D D

EC_ON39,44,55

@

PJ401

2

JUMP_43X79

PR414

1 2

0_0402_5%

1M_0402_5%

PU401

5 4 3 2

7

8 18 21

12 11

10 15 16

IN1 IN2 IN3 IN4

GND1 GND2 GND3 GND4

EN1 EN2

NC1 NC2 NC3

@

PJ404

2

JUMP_43X39

SY8286BRAC_QFN20_3X3

112

LX1 LX2 LX3

OUT

LDO

PG

BS

FF

9 1

6 19 20

14 13

17

+3VL

+3V_PWRGD +3VBS

PC403

0.1U_0603_25V7-M

+3VLX

100mA

1 2

+3VALW_P

+3VALW_FB

+3VLP

12

PC409

4.7U_0603_6.3V6K

112

@

12

EMC@

1.5A

PC401

0.1U_0201_25V6-K

EC_ON_R

12

PC402

10U_0805_25V6K

0_0402_5% PR415

12

PC452

10U_0805_25V6K

12

+3V_VIN

12

@

PC408

0.1U_0201_25V6-K

+3V_VIN

+3VALW_EN

12

PR401

+3VLP

@

1 2

PL401

1 2

2.2UH_PCMB063T-2R2MS_8A_20%

12

PR403

2.2_0805_5%

EMC_NS@

12

PC410 1200P_0201_25V7-K

EMC_NS@

12

PC411

1 2

1000P_0201_25V7K

PC434

22U_0805_6.3V6M

12

PC432

22U_0805_6.3V6M

1 2

1K_0402_1%

PC431

PR405

22U_0805_6.3V6M

TDC-5A OCP-12A OVP-120%

@

+3VALW_P

12

PC435

22U_0805_6.3V6M

PJ402

2

JUMP_43X79

+3VALW

112

+3VALW

C C

V20B+

EC_ON_R +5VALW_EN

B B

@

PJ405

2

JUMP_43X79

PR409

1 2

0_0402_5%

PU402

5

IN1

4

IN2

3

IN3

2

IN4

7

GND1

8

GND2

18

GND3

21

GND4

12

EN1

11

EN2

10

NC1

16

NC2

SY8288CRAC_QFN20_3X3

LX1 LX2 LX3

OUT

LDO VCC

PG BS

FF

ALW_PWRGD

9 1

+5VBS

6 19 20

14 13 15 17

+5VVCC

PC416

1U_0603_25V6M

PC415

1 2

0.1U_0603_25V7-M

+5VLX

PR410

1 2

0_0402_5%

12

@

PC422

4.7U_0603_6.3V6K

12

EMC@

@

2.5A

12

PC412

0.1U_0201_25V6-K

12

PC421

0.1U_0201_25V6-K

12

PC413

10U_0805_25V6K

12

PR412

1M_0402_5%

PC414

10U_0805_25V6K

112

+5V_VIN

1 2

@

+5VALW_P+5VALW_OUT

+5VLP

100mA

PR406 100K_0402_5%

ALW_PWRGD 55

PL402

1 2

2.2UH_PCMB063T-2R2MS_8A_20%

12

PR411

2.2_0805_5%

EMC_NS@

12

PC423 1200P_0201_25V7-K

EMC_NS@

PC424

1 2

+5VFB

1000P_0201_25V7K

12

PC417

22U_0805_6.3V6M

1 2

1K_0402_1%

PC418

PR413

22U_0805_6.3V6M

TDC-6A OCP-14A OVP-120%

+5VALW_P

12

PC419

PC420

22U_0805_6.3V6M

PJ406

2

JUMP_43X79

@

112

+5VALW

A A

Title

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

6800pf soft start 2ms 47nf soft start 7ms

5

4

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

3

2015/08/20

LC Future Center Secret Data

Deciphered Date

2

2016/08/20

Title

PWR_3VALW/5VALW

Size

Document Number Re v

C

Thursday, January 14, 2016

Date: Sheet

Thursday, January 14, 2016

CG411

1

54 60

1.0

of

5

D D

1 2

SYSON44

CPU_DRAMPG_CNTL5

PCH_PWR_EN44,46

EC_VPP_PWREN44

C C

B B

PR501 0_0402_5%@

PR503 0_0402_5%@

PR504 0_0402_5%@

PR506 0_0402_5%@

PR507

1M_0402_5%

PR508

@

+3VALW

PR513

R_0402

1 2

0_0402_5%

12

100K_0402_5%

+1.8VALW_B_EN

12

+2.5V_DDR_ENEC_VPP_PWREN

PC504

@

0.1u_0201_10V6K

1 2

VDDQ_PGOOD 44

VDDQ_EN

VTT_EN

+1.8VALW_L_EN

+1.0VALW_EN

PC506

1 2

@

0.1u_0201_10V6K

4

PC507

1 2

@

0.1u_0201_10V6K

PC503

PC508

1 2

@

0.1u_0201_10V6K

2A

+5VALW

1 2

PC517 10U_0603_10V6K

+0.6VS

1A

600mA

+3VALW

+5VLP

PJ500

2

JUMP_43X39

2A

2

+5VALW

VDDQ_P

@

112

PJ508

2

JUMP_43X39

PR515

1 2

33K_0402_1% PJ502

112

JUMP_43X39

PJ504

112

JUMP_43X39

1 2

10_0402_5%

12

22U_0603_6.3V6-M

@

112

@

12

PR502

1 2

10_0603_5%

PR520

10_0603_5%

PR505

+2.5V_DDR_EN +1.8VALW_L_EN +1.0VALW_EN +1.8VALW_B_EN

VDDQ_EN VTT_EN

+1.0VALW_B_VIN

12

PC510

0.1u_0201_10V6K

PC509

EMC_NS@

+1.2V_P

12

PC519

22U_0603_6.3V6-M

PC521

12

10U_0603_10V6K

+1.8VALW_L_VIN

PC523 10U_0603_10V6K

@

2.2U_0603_6.3V6K

PC502

0.1u_0201_10V6K

1 2

29

11 16 31 36

19

38

39

40

30

PC500

1 2

PU500

EN_LDO1

1

EN_LDO2 EN_V1P0A EN_V1P8A EN_VDDQ EN_VTT

7

VIN_V1P0A_7

8

VIN_V1P0A_8

VIN_V1P8A_19

VIN_VTT

VTT

VSNS_VTT

CS_VDDQ

5

VIN_LDO1

4

VIN_LDO2

PMIC_VCC

VSYS_PMIC

28

VSYS

PR521 0_0402_5%@

PMIC_EN

27

41

9

VCC

GND

SDA

PMIC_EN

SCL

T_ALERT_B POK_V1P0A POK_V1P8A

POK_VDDQ

LX_V1P0A_12 LX_V1P0A_13 LX_V1P0A_14 LX_V1P0A_15

VO_V1P0A

LX_V1P8A_17 LX_V1P8A_18

VO_V1P8A_20

LV5075AGQV_VQFN40_5X5

UGATE_VDDQ

BOOT_VDDQ

PHASE_VDDQ LGATE_VDDQ

VSNS_VDDQ

LDO1

LDO2

FB_LDO2

PR500 0_0402_5%

1 2

PR522

0_0402_5%

1 2

@

PR523 0_0402_5%

1 2

@

25 26 24 22 21 23

12 13 14 15

+1.0VALW_FB

10

17 18

20

33

BST_VDDQ

32

34 35 37

6

PC520 22U_0603_6.3V6-M

3 2

PR517 75K_0402_1%

3

@

PMIC_VCC

PCH_PWR_EN

PMIC_SMB_DAT1 PMIC_SMB_CLK1

PMIC_ALERT#

+1.0VALW_PG +1.8VALW_B_PG

VDDQ_PGOOD

0.47UH_PCMB063T-R47MS_18A_20%

LX_1P0

UG_VDDQ

LX_VDDQ LG_VDDQ

+1.2V_P

+2.5V_P+2.5V_DDR_VIN

1 2

PR516

1 2

105K_0402_1%

+1.8VALW_L_FB

1 2

EC_ON 39,44,54

ALW_PWRGD 54

1 2

PR510 0_0402_5%@

1 2

PR511 0_0402_5%@ PR512 0_0402_5%@

1 1

1 2

PL500

PR1031

1 2

0_0603_5%

0.1U_0603_25V7-M

600mA

PJ503

@

2

112

JUMP_43X39

+1.8VALW_L_P

2

12

PC522

22U_0603_6.3V6-M

UG_VDDQ

4

LX_VDDQ

LG_VDDQ

4

12

PC518

12

+2.5V_DDR+3VALW

PJ505

112

JUMP_43X39

5

321

5

321

PTC501PAD @ PTC502PAD @

12

@

PQ500 AON7408L_DFN8-5

AON7506_DFN

PQ501

EC_SMB_DA3 44 EC_SMB_CK3 44 H_PROCHOT# 4,44

12

PC512

PC511

22U_0603_6.3V6-M

6mA

+1.8VALW

4.7_0805_5% PR518

EMC_NS@

1 2 12

PC533 68P_0402_50V8J

EMC_NS@

12

PC513

PC514

22U_0603_6.3V6-M

12

PC524

EMC@

0.1U_0201_25V6-K

0.68UH_PCMB063T-R68MS_16A_+-20%

1 2

12

PC515

@

22U_0603_6.3V6-M

12

PC525

10U_0805_25V6K

PL501

+1.0VALW_FB

PC516

@

22U_0603_6.3V6-M

12

PC526

2

JUMP_43X79

LX_1P0

12

PR1029

4.7_0603_5%

EMC@

12

PC1109 2200P_0201_25V7-K

EMC@

VDDQ_P

10U_0805_25V6K

@

12

PC1113

2

TDC-6A OCP-10A OVP-135%

PJ501

@

112

2A

12

PC527

22U_0603_6.3V6-M

PJ506

2

112

JUMP_43X39

@

12

PC528

22U_0603_6.3V6-M

+1.0VALW

V20B+

12

PC530

PC529

22U_0603_6.3V6-M

TDC-6A OCP-10A OVP-120%

PJ507

+1.2V_P

2

112

12

PC531

PC532

22U_0603_6.3V6-M

EMC_NS@

JUMP_43X79

@

0.1U_0402_25V6

12

22U_0603_6.3V6-M

1

+1.2V

A A

Title

Security Classification

Issued Date

THIS SHEE T OF ENGIN EERING D RAWING IS THE PROPRIETARY PR OPERTY OF LC FUTURE CENTER. AN D CONTAINS CONFIDE NTIAL

THIS SHEE T OF ENGIN EERING D RAWING IS THE PROPRIETARY PR OPERTY OF LC FUTURE CENTER. AN D CONTAINS CONFIDE NTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CU STODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CU STODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CU STODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY O R DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN C ONSENT OF LC FUTURE CEN TER.

MAY BE USED BY O R DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN C ONSENT OF LC FUTURE CEN TER.

5

4

3

MAY BE USED BY O R DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN C ONSENT OF LC FUTURE CEN TER.

2

2015/08/20

LC Future Center Secret Data

Deciphered Date

2016/08/20

Title

PWR PMIC-DDR4/1.0ALW/1.8ALW

Size

Document Number Rev

D

Date: Sheet

1

CG411

Thursday, January 14, 2016

55 60

1.0

of

5

D D

C C

4

3

2

1

B B

Titl e

Security Classification

A A

5

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

4

2015/08/20

Security Classification

LC Future Center Secret Data

Deciphered Date

3

2016/08/20

2

Titl e

PWR

Size

Document Number Rev

Custom

Thursday, January 14, 2016

Date: Sheet

Thursday, January 14, 2016

CG411

56 60

1

of

1.0

5

D D

4

ZVM# 16

3

2

1

PR710 0_0402_5%

U23E@

1A

V20B+

PJ705

2

112

JUMP_43X79

@

PR721

C C

EC_VR_ON44,59

1 2

VCCOPC_GND

0_0402_5%

U23E@

1 2

JUMPER

PJ701

@

PR719

1 2

@

12

PC722

U23E@

12

.1U_0402_10V6-K

47K_0402_5%

0.1U_0402_25V6

PC719

@

12

+VCCOPC_VIN

PC720

U23E@

10U_0805_25V6K

12

PC750

U23E@

10U_0805_25V6K

+3VS

0_0402_5%

PR708

1 2

U23E@

1 2

0_0402_5%

PR709

U23E@

+VCCOPC_EN

1

VIN

5

EN

3

C1

4

C0

PG

13

U23E@

100K_0402_5%

12

PR732

1 2

100K_0402_1%

6

7

LP#

MODE

PU703

NB681GD-Z_QFN13_2X3

U23E@

12

PR718

VCCOPC_GND

U23E@

3V3

10

U23E@

PR701

5.1_0402_1%

12

PC732

U23E@

PR734

2.2_0603_1%

1 2

9

BST

VOUT

PGND AGND

U23E@

1U_0402_6.3V6K

SW

12

+3VALW

U23E@

PC737

0.1U_0603_25V7-M

+VCCOPC_LX

8

12

2 11

VCCOPC_GND

12

PR717

2.2_0805_5%

EMC_NS@

12

PC718

EMC_NS@

1200P_0402_50V7-K

U23E@

0.56UH_PH041H-R56MS_5.4A_20% PL701

1 2

2.2_0603_1% PR736

U23E@

12

PR722

1 2

0_0402_5%

U23E@

1 2

PR723

0_0402_5%

U23E@

PC716

22U_0805_6.3V6M

4.5A

PJ706

2

JUMP_43X79

PC721

22U_0805_6.3V6M

12

U23E@

PC717

U23E@

22U_0805_6.3V6M

VCCOPC_SENSE 12

VSSOPC_SENSE 12

12

@

+VCCOPC_1.0V+VCCOPC_L

112

@

B B

A A

Title

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

5

4

3

2015/08/20

LC Future Center Secret Data

Deciphered Date

2

2016/08/20

Title

PWR-+VCCOPC

Size

Document Number Re v

C

Thursday, January 14, 2016

Date: Sheet

Thursday, January 14, 2016

CG411

1

57 60

1.0

of

5

D D

4

3

2

1

C C

B B

A A

Title

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

5

4

3

2015/08/20

LC Future Center Secret Data

Deciphered Date

2

2016/08/20

Title

PWR-VGA_CORE_AMD

Size

Document Number Re v

Custom

Date: Sheet

Thursday, January 14, 2016

CG411

1

58 60

1.0

of

5

4

3

2

1

+VCCST_CPU

+5VS+5VS

V20B+

2.2_0603_5%

Psys53

Vcore_ILIM

12

Vcore_VSP

Vcore_VSN Vcore_IOUT

GT_IOUT

GT_DIFFOUT

GT_COMP

PC908

GT_FB

GT_VSN

SA_COMP

SA_ILIM

PC9401000P_0402_50V7K

SA_VSP

SA_VSN

PC939220P_0402_50V7K

PR922

1 2

PC912

2.2U_0603_10V7K

PU901 NCP81206MNTXG_QFN52_6X6

50

PSYS

41

EN

42

VR_RDY

35

VRHOT#

30

COMP_1a

31

ILIM_1a

28

VSP_1a

29

VSN_1a

34

IOUT_1a

27

TSENSE_1ph

1

IOUT_2ph

2

DIFFOUT_2ph/ICCMAX_2ph

4

COMP_2ph

3

FB_2ph

51

VSP_2ph

52

VSN_2ph

11

TSENSE_2ph

47

COMP_1b

46

ILIM_1b

49

VSP_1b

48

VSN_1b

470P_0402_50V7K

PC929

+VCCST_CPU

D D

12

@

PR944

54.9_0402_1%

EC_VR_ON44,57

CPU_VR_READY44

VR_HOT#44,53

1.58K_0402_1%

1 2

VCORE_VCC_SEN12

VCORE_VSS_SEN12

C C

B B

12

PR960

0_0402_5%

12

PH903

100K_0402_1%_NCP15WF104F03RC

PR963

8.25K_0402_1%

PH902

Place close to MOSFET

12

PC913 1000P_0402_50V7K

12

100K_0402_1%_NCP15WF104F03RC

VCCGT_VCC_SEN12

VCCGT_VSS_SEN12

VCCSA_VCC_SEN13

PC934

VCCSA_VSS_SEN13

.1U_0402_10V6-K

12

0_0402_5%

12

1 2

PR942

PR931

8.25K_0402_1%

12

PC924

.1U_0402_10V6-K

PR913

1 2

PR910

PC904 1000P_0402_50V7K

1.58K_0402_1%

1 2

PC937

1000P_0402_50V7K

1 2

12

@

PR945

1K_0402_1%

2.7K_0402_1%

1 2

PR903

PC901 15P_0402_50V8J

1 2

PR914

49.9_0402_1%

PC931

1000P_0402_50V7K

1 2

PR907

1 2

3.16K_0402_1%

@

PR946

1K_0402_1%

PR916

@

1 2

0_0402_5%

1500P_0402_50V6-K

12

PC902

1 2

1K_0402_1%

1 2

PR911

1 2

PC906330P_0402_50V7K

1 2

470P_0402_50V7K

1 2

PC907

1 2

PR918

1K_0402_1%

1.5K_0402_1%

1 2

PR965

PC935 15P_0402_50V8J

0.015U_0402_25V7-K

1 2

PR966

1 2

3.16K_0402_1%

1 2

PC938 1000P_0402_50V7K

20K_0402_1%

1 2

PR940

470P_0402_50V7K

12

PC911

12

PR917

45.3K_0402_1%

Vcore_TSENSE

470P_0402_50V7K

12

PC930

PR95926.1K_0402_1%

12

1 2

154K_0402_1%

PR934

1 2

7.5K_0402_1% PC932 10P_0402_50V8J

1.5K_0402_1% PR964

1 2

PC933 3300P_0402_50V7-K

PC936

PR912 30.9K_0402_1%

1 2

VR_EN

Vcore_COMP

20K_0402_1%

PR901

1 2

PC9091000P_0402_50V7K

PR902

U23E@

2200P_0402_50V7K

1 2

GT_TSENSE

1 2

1K_0402_1%

PR970

1 2

2.2_0603_5% PR926

1 2

PC916

2.2U_0603_10V7K

VR_VCC

VR_PVCC

13

18

VCC

PVCC

VCORE PORTION

VCCGT PORTION

VCCSA PORTION

IOUT_1b

43

SA_Iout

12

1

PR958 121K_0402_1%

2

12

PR923

1K_0402_1%

12

VR_VRMP

12

SDIO

VRMP

PWM/ADDR_VBOOT

EPAD

53

SCLK

ALERT#

DRON

BST3

HG3

SW3

LG3/ICCMAX_1b

CSP_1a

CSN_1a

CSSUM_2ph

CSCOMP_2ph

ILIM_2ph

CSREF_2ph

BST1

HG1

SW1

LG1/ROSC

CSP1_2ph

CSP2_2ph

BST2

HG2

SW2

LG2/ICCMAX_1a

CSP_1b

CSN_1b

PC920

0.01U_0402_25V7K

36 38 37

39

Vcore_BST

26

25

24

23

33 32

7 6

GT_ILIM

5

GT_CSREF

8

GT_BST1

14

15

16

17

14K_0402_1%

10

9

40

SA_BST

22

21

20 19

SA_CSP

44 45

VR_SVID_DAT_1 VR_SVID_CLK_1 VR_SVID_ALRT#_1

DRON 60

PR919

1 2

2.2_0603_5%

11K_0402_1%

1 2

PR941

GT_CSSUM GT_CSCOMP

PR951 16.9K_0402_1%

1 2

PR925 2.2_0603_5%

PR954

1 2

22.1K_0402_1%

PR989 2.2_0603_5%

1 2

0.22U_0603_16V7K

U23E@

12

GT_HG1 60

GT_LG1 60

12

PR927

1 2

SA_HG 60

22.6K_0402_1%

1 2

PR955

PC910

Vcore_HG 60

PR950 180K_0402_1%1 2

GT_CSP1

GT_CSP2

Vcore_PH 59,60

Vcore_LG 60

Vcore_CSP

1 2

PC915

1 2

0.22U_0603_16V7K

GT_PWM 60

PC989

1 2

PH901

GT_PH1 59,60

0.22U_0603_16V7K

220K_0402_5%_ERTJ0EV224J

SA_LG 60

23.2K_0402_1% PR947

1 2

22K_0402_1%

1 2

PR948

100K_0402_1%_NCP15WF104F03RC

1 2

PC942 3300P_0402_50V7-K

1 2

PC922 2200P_0402_50V7K

110K_0402_1%

PC925 220P_0402_50V7K

12

PC917

0.01U_0402_25V7K

PR904

1 2

PC914 330P_0402_50V7K

12

SA_PH 59,60

PH905

1 2

12

1U_0402_6.3V6K

VR_SVID_DAT_1

VR_SVID_ALRT#_1

VR_SVID_CLK_1

180K_0402_1%

1 2

PR949

U23E@

1 2

PR1018

180K_0402_1%

U23E@

10_0402_1%

1 2

0.047U_0402_16V7K PC926

12

PC988

0.047U_0402_16V7K

U23E@

PR1019 2K_0402_1%

U22@

1 2

+5VS

1 2

PC941 5600P_0402_25V7-K

12

PC918

PR933

45.3_0402_1%

PR936

10_0402_1%

12

PR937

0_0402_5%

12

PR938

49.9_0402_1%

12

Vcore_PH 59,60

+CPU_CORE 12,60

GT_PH1 59,60 GT_PH2 59,60

PR924

PR988

10_0402_1%

1 2

U23E@

1 2

PR953

1.8K_0402_1%

1 2

PR952

1.8K_0402_1%

U23E@

13K_0402_1%

1 2

PR957

100K_0402_1%_NCP15WF104F03RC

22K_0402_1%

1 2

PC927 6800P_0402_25V7-K

PR956

1 2

12

+VCC_GT 12,60

GT_PH1 59,60

GT_PH2 59,60

PH904

12

@

PR943

75_0402_1%

12

PR932

100_0402_1%

VR_SVID_DAT 12

VR_SVID_ALRT# 12

VR_SVID_CLK 12

SA_PH 59,60

+VCCSA 13,60

A A

Title

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

5

4

3

2015/08/20

LC Future Center Secret Data

Deciphered Date

2

2016/08/20

Title

PWR_CPU_CORE1

Size

Document Number Re v

C

Thursday, January 14, 2016

Date: Sheet

Thursday, January 14, 2016

CG411

1

59 60

1.0

of

5

12

5

Vcore_HG59

D D

Vcore_PH59,60

Vcore_LG59

4

AON6372_DFN8-5 PQ1001

321 5

4

AON6764_DFN8-5 PQ1002

321

12

PR1002

2.2_0805_5%

EMC_NS@

12

EMC_NS@

+5VS

C C

GT_HG159

GT_PH159,60

B B

GT_LG159

12

PC1001

0.1U_0201_25V6-K

EMC@

0.15UH_PCMB063T-R15MS_30A_20%

PC1026 1000P_0201_50V7-K

U23E@

2.2_0603_5%

PR1014

1 2

5

4

321

5

4

321

PC1002

10U_0805_25V6K

1 2

U23E@

PC1034

AON6372_DFN8-5 PQ1005

AON6764_DFN8-5 PQ1006

12

PC1003

10U_0805_25V6K

PL1001

12

1U_0402_10V6K

4

CPU_VIN

GT_PWM59

DRON59

PJ1001

2

JUMP_43X79

@

+CPU_CORE 12,59

Vcore_PH 59,60

0_0402_5%

1 2 1 2

10_0402_5%

PR1005

U23E@

12

PR1008

2.2_0805_5%

EMC_NS@

12

PC1047 1200P_0201_25V7-K

EMC_NS@

1

112

+

PC1004 68U_25V_M

2

1

+

PC1015

2 3

GT_VCC GT_PWM_D

PR1004

U23E@

GT_EN

12

PC1033

PC1032

0.15UH_PCMB063T-R15MS_30A_20%

0.1U_0201_25V6-K

EMC@

1 2

10U_0805_25V6K

PL1003

1

+

PC1107 68U_25V_M

2

@

+CPU_CORE

12

PC1078

EMC_NS@

220U_D2_2VM_R6M

0.1U_0201_25V6-K

U23E@

PU902 NCP81151MNTBG_DFN8_2X2

4 2 3 9

12

VCC PWM EN FLAG

12

PC1031

10U_0805_25V6K

BST

DRVH

SW

DRVL

GND

CPU_VIN

V20B+

12

PC1114 2200P_0201_25V7-K

EMC_NS@

1 2

2.2_0603_5%

GT_BST2

1 8 7 5 6

+VCC_GT 12,59,60

GT_PH1 59,60

GT_HG2 GT_PH2 GT_LG2

3

PR1013

U23E@

0.22U_0603_16V7K

1

+

PC1045

2 3

220U_D2_2VM_R6M

PC1030

1 2

U23E@

1

+

2

PC1066

330U_2.0V_M

PC1081

EMC_NS@

0.1U_0201_25V6-K

5

4

321

5

4

321

+VCC_GT

12

AON6372_DFN8-5

PQ1007

U23E@

AON6764_DFN8-5 PQ1008

U23E@

12

PC1080

2200P_0201_25V7-K

12

1200P_0201_25V7-K

EMC_NS@

2

12

PC1007

PC1006

PC1005

22U_0603_6.3V6-M

@

12

PC1016

PC1022

22U_0603_6.3V6-M

U23E@

PR1017

2.2_0805_5%

EMC_NS@

PC1084

12

@

12

PC1023

22U_0603_6.3V6-M

12

PC1083

PC1082

0.1U_0201_25V6-K

0.15UH_PCMB063T-R15MS_30A_20%

1 2

12

PC1053

PC1052

22U_0603_6.3V6-M

@

12

PC1068

PC1067

22U_0603_6.3V6-M

@

12

PC1008

22U_0603_6.3V6-M

12

PC1017

22U_0603_6.3V6-M

12

U23E@

10U_0805_25V6K

U23E@

PL1004

12

PC1054

22U_0603_6.3V6-M

12

PC1069

22U_0603_6.3V6-M

12

22U_0603_6.3V6-M

@

12

22U_0603_6.3V6-M

12

PC1085

10U_0805_25V6K

12

PC1055

12

PC1070

PC1009

22U_0603_6.3V6-M

12

PC1025

22U_0603_6.3V6-M

GT_VIN

U23E@

12

22U_0603_6.3V6-M

12

22U_0603_6.3V6-M

12

PC1013

22U_0603_6.3V6-M

@

12

PC1024

PC1018

22U_0603_6.3V6-M

PJ1002

2

JUMP_43X79

+VCC_GT 12,59,60

GT_PH2 59

12

PC1056

PC1057

22U_0603_6.3V6-M

@

12

PC1072

PC1071

22U_0603_6.3V6-M

PC1010

22U_0603_6.3V6-M

12

22U_0603_6.3V6-M

@

12

112

PC1058

PC1073

PC1011

PC1019

22U_0603_6.3V6-M

12

22U_0603_6.3V6-M

12

PC1014

PC1020

22U_0603_6.3V6-M

PC1059

22U_0603_6.3V6-M

PC1074

@

22U_0603_6.3V6-M

@

+CPU_CORE

12

PC1012

22U_0603_6.3V6-M

@

12

PC1021

22U_0603_6.3V6-M

V20B+

+VCC_GT

1

+

2 3

12

PC1060

22U_0603_6.3V6-M

12

PC1075

22U_0603_6.3V6-M

PC1076

PC1086

220U_D2_2VM_R6M

PC1061

22U_0603_6.3V6-M

12

22U_0603_6.3V6-M

1

U23E@

+VCC_GT

12

PC1063

22U_0603_6.3V6-M

12

PC1064

22U_0603_6.3V6-M

12

PC1062

22U_0603_6.3V6-M

PC1077

22U_0603_6.3V6-M

@

12

@

PJ1003

2

JUMP_43X79

PC1115

47U_0603_4V6-M

@

112

12

PC1116

47U_0603_4V6-M

PC1036

22U_0603_6.3V6-M

V20B+

+VCCSA

12

22U_0603_6.3V6-M

PC1039

12

22U_0603_6.3V6-M

PC1040

12

22U_0603_6.3V6-M

PC1041

22U_0603_6.3V6-M

12

PC1042

22U_0603_6.3V6-M

2015/08/20

LC Future Center Secret Data

Deciphered Date

2

12

PC1037

PC1038

22U_0603_6.3V6-M

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.

3

2016/08/20

Title

PWR_CPU_CORE2

Size

Document Number Re v

C

Thursday, January 14, 2016

Date: Sheet

Thursday, January 14, 2016

CG411

1

60 60

1.0

of

5

D

PQ1003

3

5

D

3

AON7408L_DFN8-5

S11S22S3

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AON7506_DFN

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12

PR1006

2.2_0805_5%

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12

PC1046 1200P_0201_25V7-K

EMC_NS@

SA_HG59

A A

SA_PH59,60

SA_LG59

5

4

G

4

G

12

PC1027

0.1U_0201_25V6-K

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0.47UH_PCMB063T-R47MS_18A_20%

PC1028

10U_0805_25V6K

1 2

PL1002

4

12

PC1029

10U_0805_25V6K

CPU_VIN

+VCCSA 13,59

SA_PH 59,60

Lenovo IDEAPAD 310 Block Diagram

Specifications and Main Features

Frequently Asked Questions

User Manual