Lenovo G580, G580A, G585 Schematic

A

B

C

D

E

1

1

Compal Confidential

2

QIWG5/QIWG6 UMA M/B Schematics Document

Intel Ivy Bridge Processor with DDRIII + Panther Point PCH

2012-05-11

2

3

A-7987P

www.rosefix.com

L

3

REV:1.0

4

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

C

2011/06/15 2012/07/11

2011/06/15 2012/07/11

2011/06/15 2012/07/11

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

D

Date: Sheet

Compal Electronics, Inc.

Cover Page

Cover Page

Cover Page

LA-7987P

LA-7987P

LA-7987P

E

1 50Tuesday, October 30, 2012

1 50Tuesday, October 30, 2012

1 50Tuesday, October 30, 2012

of

of

of

4

1.0

1.0

1.0

A

Compal confidential

File Name : QIWG5/QIWG6

1

HDMI
C

onnector

CRT

2

Connector

LVDS
Connector

USB3.0 *2(Left)

Option

USB3.0

Renesas

uPD720202

3

Arthros

AR8161(GLAN)

AR8162(10/100)

RJ-45
Connector

PCI Express

Mini Card Slot *1

WLAN

4

Page24

Page23

Page22

Page34

Page26

Page27

Page25

PCI-E(WLAN)

B

PCI-E x1 *6

S

PIROM

BIOS

C

Intel

Ivy Bridge

Socket-rPGA988B

37.5mm*37.5mm

Page4-10

100MHz

2.7GT/s

FDI *8

MI *4

D

Intel

Panther Point

HM75 / HM76

FCBGA 989

25mm*25mm

Page13-21

Page13

LPC BUS

Page31

EC

ENE KB9012

Touch Pad Int. KBD

Page32

Thermal Sensor

EMC1403

Page28

DDR3 SO-DIMM *2

B

Dual Channel

DR3 1066MHz(1.5V)

D
DDR3 1333MHz(1.5V)
DDR3 1600MHz(1.5V)

Audio Codec

AZALIA

USB2.0 *14

ATA *6

S

Page32

Conexant

CX20671-21Z

ANK 0, 1, 2, 3

Up to 8GB

Page30

S

ATA HDD

SATA ODD

D

ZZZ1

ZZZ1

DAZ_PCB

DAZ_PCB

DAZ0N200601

DAZ0N200601

15@

15@

Page11-12

2 channel speaker

nt. MIC x1

I

Audio Jacks

Camera Conn.

BlueTooth Conn.

Mini Card Slot *1

Card Reader

Page22

Page29

Page25

Page32

Reltek

RTS5178 for SDR50
SDXC/MMC

USB2.0 *2(Right)

Page 32;33

USB2.0 *2(Left)

Page34

Page29

Page29

E

QIWG5

ZZZ

ZZZ

LA7987

DAZ_PCB

DAZ_PCB

DAZ0N100701

DAZ0N100701

14@

14@

(Port 0/Port 1 support SATA3)

LS7981P CardReader/B
LS7982P USB/B
LS7983P PWR/B

QIWG6

LS7981P CardReader/B
LS7982P USB/B
LS7983P PWR/B
LS7984P LED/B
LS7985P ODD/B

Page30

Page30

Page32

1

2

3

4

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

C

2011/06/15 2012/07/11

2011/06/15 2012/07/11

2011/06/15 2012/07/11

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

D

Date: Sheet

Compal Electronics, Inc.

Block Diagram

Block Diagram

Block Diagram

LA-7987P

LA-7987P

LA-7987P

E

2 50Tuesday, October 30, 2012

2 50Tuesday, October 30, 2012

2 50Tuesday, October 30, 2012

1.0

1.0

1.0

of

of

of

Voltage Rails

power

1

2

S5 S4/ Battery only

S5 S4/AC & Battery
don't exist

plane

State

S0

S3

S5 S4/AC

EC SM Bus1 address

Device

Smart Battery

PCH SM Bus address

Device Address

3

DDR DIMM0

DDR DIMM2

SMBUS Control Table

SOURCE

4

SMB_EC_CK1

SMB_EC_DA1

SMB_EC_CK2

SMB_EC_DA2

SMBCLK

SMBDATA

SML0CLK

SML0DATA

SML1CLK

SML1DATA

KB9012

+3VALW

KB9012

+3VALW

PCH

+3VALW

PCH

+3VALW

PCH

+3VALW

A

+B

+5VALW

+3VALW

O

O

O

O

X

Address

0001 011X b

1001 000Xb

1001 010Xb

VGA BATT KB9012 SODIMM

X V

+3VALW

X

X

X

V

+3VS

X

X

X

B

+5VS

+3VS

+1.5VS

+V1.05S_VCCP

+1.5V

+VCC_CORE

+VCC_GFXCORE_AXG

+1.8VS

+0.75VS

+1.05VS

O

O

O

X

O

X X

X

X X X

EC SM Bus2 address

Device

Thermal Sen sor F75303M

X

X

X

X

X

V

+3VS

V

+3VS

X

WLAN
WWAN

X

XX

V

+3VS

X

Address

1001_101xb

Thermal
Sensor

+3VS

X

X

X

XX

V

C

STATE

Full ON

S1(Power On Suspend)

S3 (Suspend to RAM)

S4 (Suspend to Disk)

S5 (Soft OFF)

SIGNAL

D

SLP_S1# SLP_S3# SLP_S4# SLP_S5# +VALW +V +VS Clock

HIGH HIGH HIGH HIGH

LOW

LOW

LOW

LOW LOW LOW LOW

HIGH

LOWLOWLOW

HIGHHIGHHIGH

HIGH

HIGH

ON

ON

ON

ON

ON

ON

ON

ON

OFF

OFF

E

ON ON

ON

OFF

OFF

OFF

LOW

OFF

OFF

OFF

1

Board ID / SKU ID Table for AD channelBOARD ID Table

Board ID

0

PCB Revision

0.1

1
2
3
4

OO

5
6
7

X

X

USB Port Table

EHCI1

USB3.0

EHCI2

PCH

USB 2.0 Port

UHCI0

UHCI1

UHCI2

UHCI3

UHCI4

UHCI5

UHCI6

0
1
2
3
4
5
6
7
8

9
10
11
12
13

3 External
USB Port

USB Port (Right Side CR-BD)

USB Port (Left Side)
USB Port (Left Side)

Camera

USB/B (Right Side USB-BD)

Mini Card(WLAN)
Card Reader

Blue Tooth

Vcc 3.3V +/- 5%

Board ID

0
1
2
3
4
5
6

100K +/- 5%Ra/Rc/Re

Rb / Rd / Rf V min

0

8.2K +/- 5%
18K +/- 5%
33K +/- 5%
56K +/- 5%
100K +/- 5%
200K +/- 5%

7 NC

USB3.0

USB3.0

AD_BID

0 V

V typ

AD_BID

V

max

AD_BID

0 V 0 V

0.216 V 0.250 V 0.289 V

0.436 V

0.712 V

1.036 V

0.503 V

0.819 V

0.538 V

0.875 V

1.185 V 1.264 V

1.453 V 1.650 V 1.759 V

1.935 V

2.500 V

2.200 V

3.300 V

2.341 V

3.300 V

BOM Structure Table

BTO Item BOM Structure

HDMI HDMI@
Interna-Intel-USB3.0 IU3@
External-NEC-USB3.0 EU3@
Blue Tooth BT@
Connector ME@
45 LEVEL 45@
10/100 LAN 8162@
GIGA LAN GIGA@
LAN LDO Mode LDO@
LAN Switch mode SWR@
Cameara CMOS@
For QIWG5 (14") 14@
For QIWG6 (15")
Unpop
G5/G6/G9(Low/Mid END)
G9 High-END

15@

@

nonBBH@

BBH@

Porject Phase

G-series

MP

G-series

PVT

G-series

DVT

G-series

EVT

Y-series

EVT

Y-series

DVT

Y-series

PVT

Y-series

MP

2

3

X

V

+3VS

X

X

XX X

4

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

C

2011/06/15 2012/07/11

2011/06/15 2012/07/11

2011/06/15 2012/07/11

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

B

B

B

LA-7987P

LA-7987P

LA-7987P

Date: Sheet

Date: Sheet

D

Date: Sheet

Compal Electronics, Inc.

Notes List

Notes List

Notes List

of

3 50Tuesday, October 30, 2012

of

3 50Tuesday, October 30, 2012

of

3 50Tuesday, October 30, 2012

E

1.0

1.0

1.0

5

D

C

B

eDP_COMPIO and ICOMPO signals
should be shorted near balls
and routed with typical
impedance <25 mohms

+V1.05S_VCCP

24.9_0402_1%

24.9_0402_1%

4

JCPU1A

JCPU1A

eDP_HPD

B27

DMI_RX#[0]

B25

DMI_RX#[1]

A25

DMI_RX#[2]

B24

DMI_RX#[3]

B28

DMI_RX[0]

B26

DMI_RX[1]

A24

DMI_RX[2]

B23

DMI_RX[3]

G21

DMI_TX#[0]

E22

DMI_TX#[1]

F21

DMI_TX#[2]

D21

DMI_TX#[3]

G22

DMI_TX[0]

D22

DMI_TX[1]

F20

DMI_TX[2]

C21

DMI_TX[3]

A21

FDI0_TX#[0 ]

H19

FDI0_TX#[1 ]

E19

FDI0_TX#[2 ]

F18

FDI0_TX#[3 ]

B21

FDI1_TX#[0 ]

C20

FDI1_TX#[1 ]

D18

FDI1_TX#[2 ]

E17

FDI1_TX#[3 ]

A22

FDI0_TX[0]

G19

FDI0_TX[1]

E20

FDI0_TX[2]

G18

FDI0_TX[3]

B20

FDI1_TX[0]

C19

FDI1_TX[1]

D19

FDI1_TX[2]

F17

FDI1_TX[3]

J18

FDI0_FSYNC

J17

FDI1_FSYNC

H20

FDI_INT

J19

FDI0_LSYNC

H17

FDI1_LSYNC

A18

eDP_COMP IO

A17

eDP_ICOMPO

B16

eDP_HPD#

C15

eDP_AUX

D15

eDP_AUX#

C17

eDP_TX[0]

F16

eDP_TX[1]

C16

eDP_TX[2]

G15

eDP_TX[3]

C18

eDP_TX#[0 ]

E16

eDP_TX#[1 ]

D16

eDP_TX#[2 ]

F15

eDP_TX#[3 ]

TYCO_2013620-2_IVY BRIDGE

TYCO_2013620-2_IVY BRIDGE

DMI

DMI

Intel(R) FDI

Intel(R) FDI

eDP

eDP

DMI_CRX_PTX_N0<15>

DMI_CRX_PTX_N1<15>

DMI_CRX_PTX_N2<15>

DMI_CRX_PTX_N3<15>

DMI_CRX_PTX_P0<15>

DMI_CRX_PTX_P1<15>

DMI_CRX_PTX_P2<15>

DMI_CRX_PTX_P3<15>

DMI_CTX_PRX_N0<15>

DMI_CTX_PRX_N1<15>

DMI_CTX_PRX_N2<15>

DMI_CTX_PRX_N3<15>

DMI_CTX_PRX_P0<15>

DMI_CTX_PRX_P1<15>

DMI_CTX_PRX_P2<15>

DMI_CTX_PRX_P3<15>

FDI_CTX_PRX_N0<15>

FDI_CTX_PRX_N1<15>
FDI_CTX_PRX_N2<15>

FDI_CTX_PRX_N3<15>
FDI_CTX_PRX_N4<15>
FDI_CTX_PRX_N5<15>

FDI_CTX_PRX_N6<15>
FDI_CTX_PRX_N7<15>

FDI_CTX_PRX_P0<15>
FDI_CTX_PRX_P1<15>
FDI_CTX_PRX_P2<15>

FDI_CTX_PRX_P3<15>
FDI_CTX_PRX_P4<15>

FDI_CTX_PRX_P5<15>
FDI_CTX_PRX_P6<15>

FDI_CTX_PRX_P7<15>

FDI_FSYNC0<15>
FDI_FSYNC1<15>

1

R7

R7

2

FDI_INT<15>

FDI_LSYNC0<15>

FDI_LSYNC1<15>

EDP_COMP

PEG_ICOMP I

PEG_ICOMP O

PEG_RCO MPO

PEG_RX# [0]
PEG_RX# [1]
PEG_RX# [2]

PEG_RX# [3]
PEG_RX# [4]

PEG_RX# [5]
PEG_RX# [6]

PEG_RX# [7]
PEG_RX# [8]
PEG_RX# [9]

PEG_RX# [10]
PEG_RX# [11]

PEG_RX# [12]
PEG_RX# [13]
PEG_RX# [14]

PEG_RX# [15]

PEG_RX[0 ]

PEG_RX[1 ]
PEG_RX[2 ]

PEG_RX[3 ]
PEG_RX[4 ]
PEG_RX[5 ]

PEG_RX[6 ]
PEG_RX[7 ]

PEG_RX[8 ]
PEG_RX[9 ]

PEG_RX[1 0]
PEG_RX[1 1]
PEG_RX[1 2]

PEG_RX[1 3]
PEG_RX[1 4]

PEG_RX[1 5]

PEG_TX# [0]
PEG_TX# [1]

PEG_TX# [2]
PEG_TX# [3]

PEG_TX# [4]
PEG_TX# [5]

PEG_TX# [6]
PEG_TX# [7]
PEG_TX# [8]

PEG_TX# [9]

PEG_TX# [10]

PEG_TX# [11]
PEG_TX# [12]

PCI EXPRESS* - GRAPHICS

PCI EXPRESS* - GRAPHICS

PEG_TX# [13]

PEG_TX# [14]
PEG_TX# [15]

PEG_TX[0 ]
PEG_TX[1 ]

PEG_TX[2 ]
PEG_TX[3 ]
PEG_TX[4 ]

PEG_TX[5 ]
PEG_TX[6 ]

PEG_TX[7 ]
PEG_TX[8 ]
PEG_TX[9 ]

PEG_TX[1 0]
PEG_TX[1 1]

PEG_TX[1 2]
PEG_TX[1 3]

PEG_TX[1 4]

PEG_TX[1 5]

3

+V1.05S_VCCP

R1

R1

24.9_0402_1%

24.9_0402_1%

J30
J28

H29
G27

E29
F27
D28

F26
E25

M28
M33

M30
L31
L28

K30
K27

J29
J27
H28

G28
E28

F28
D27

E26
D25

PEG_COMP

J22

J21
H22

K33
M35
L34

J35
J32

H34
H31

G33
G30
F35

E34
E32

D33
D31
B33

C32

J33

L35
K34

H35
H32
G34

G31
F33

F30
E35

E33
F32
D34

E31
C33

B32

M29
M32

M31
L32

L29
K31

K28

2

PEG_ICOMPI and RCOMPO signals should be
shorted and routed
with - max length = 500 mils - typical
impedance = 43 mohms

1

2

PEG_ICOMPO signals should be routed with ­max length = 500 mils

- typical impedance = 14.5 mohms

1

D

C

B

A

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2011/06/15 2012/07/11

2011/06/15 2012/07/11

2011/06/15 2012/07/11

Compal Secret Data

Compal Secret Data

Compal Secret Data

3

Deciphered Date

Deciphered Date

Deciphered Date

Title

Title

Title

PROCESSOR(1/7) DMI,FDI,PEG

PROCESSOR(1/7) DMI,FDI,PEG

PROCESSOR(1/7) DMI,FDI,PEG

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

LA-7987P

LA-7987P

LA-7987P

Date: Sheet

Date: Sheet

2

Date: Sheet

1

of

4 50Tuesday, October 30, 2012

of

4 50Tuesday, October 30, 2012

of

4 50Tuesday, October 30, 2012

A

1.0

1.0

1.0

5

D

+V1.05S_VCCP

1

R9

R9

62_0402_5%

62_0402_5%

H_PROCHOT#<31,37>

C

H_CPUPWRGD<18>

H_PROCHOT#

1

100P_0402_50V8J

100P_0402_50V8J

EMI Add

2

H_PM_SYNC<15>

2

R260_0402_5%

R260_0402_5%

2

R27

R02

C549

C549

R27

1

10K_0402_5%

10K_0402_5%

1

2

4

JCPU1B

JCPU1B

H_SNB_IVB#<18>

H_PROCHOT#_R

2

R22

R22

2

H_CPUPWRGD_R

PM_DRAM_PWR GD_R

2

BUF_CPU_RST#

H_CATERR#

H_PM_SYNC_R

T48

T48

H_PECI<18,31>

R15

R15

56_0402_5%

56_0402_5%

1

H_THRMTRIP#<18>

@

@

1

0_0402_5%

0_0402_5%

R29

R29

1

130_0402_5%

130_0402_5%

C26

PROC_SELECT#

AN34

SKTOCC#

AL33

CATERR#

AN33

PECI

AL32

PROCHOT#

AN32

THERMTRIP#

AM34

PM_SYNC

AP33

UNCOREPWRGOOD

V8

SM_DRAMPWR OK

AR33

RESET#

3

A28

BCLK

A27

BCLK#

PRDY#
PREQ#

TMS

TRST#

TDO

DBR#

BPM#[0]

BPM#[1]
BPM#[2]
BPM#[3]

BPM#[4]
BPM#[5]

BPM#[6]
BPM#[7]

TCK

A16

A15

R8

AK1

A5
A4

AP29
AP27

AR26
AR27
AP30

AR28

TDI

AP26

AL35

AT28

AR29
AR30
AT30

AP32
AR31

AT31
AR32

MISCTHERMALPWR MANAGEMENT

MISCTHERMALPWR MANAGEMENT

DPLL_REF_CLK

DPLL_REF_CLK#

CLOCKS

CLOCKS

SM_DRAMRST#

SM_RCOMP[0]

SM_RCOMP[1]
SM_RCOMP[2]

DDR3

MISC

DDR3

MISC

JTAG & BPM

JTAG & BPM

2

R10;R11 put on U4 side

@

CLK_CPU_DMI_R

CLK_CPU_DMII#_R

2

R12 1K_0402_5%

R12 1K_0402_5%

2

H_DRAMRST#

SM_RCOMP0

SM_RCOMP1

SM_RCOMP2

R13 1K_0402_5%

R13 1K_0402_5%

2

2

2

@

0_0402_5%

0_0402_5%

0_0402_5%

0_0402_5%

@

@

1

1

H_DRAMRST# <6>

1

R16 140_0402_1%

R16 140_0402_1%

1

R17 25.5_0402_1%

R17 25.5_0402_1%

1

R18 200_0402_1%

R18 200_0402_1%

DDR3 Compensation Signals

XDP_PRDY#

XDP_PREQ#

XDP_TCK

XDP_TMS

XDP_TRST#

XDP_TDI

XDP_TDO

XDP_DBRESET#

XDP_BPM#0

XDP_BPM#1

XDP_BPM#2

XDP_BPM#3

XDP_BPM#4

XDP_BPM#5

XDP_BPM#6

XDP_BPM#7

T97

T97

T98

T98

T102

T102

T103

T103

2

R28 1K_0402_5%

R28 1K_0402_5%

T49

T49

T90

T90

T91

T91

T92

T92
T93

T93

T94

T94

T95

T95

T96

T96

1

R10

R10

1

2

2

+V1.05S_VCCP

CLK_CPU_DMI <14>

CLK_CPU_DMI# <14>

1

R11

R11

D

For ESD fail issue del XDP_TMS &
XDP_TDO net ,
but keep R20&R23 for debug use

2

R20 51_0402_5%@

XDP_TDI

XDP_TCK
XDP_TRST#

1

R20 51_0402_5%@

2

R21 51_0402_5%

R21 51_0402_5%

2

R23 51_0402_5%@

R23 51_0402_5%@

2

R24 51_0402_5%

R24 51_0402_5%

2

R25 51_0402_5%

R25 51_0402_5%

+3VS

+V1.05S_VCCP

1

1

1

1

1

PU/PD for JTAG signals

C

TYCO_2013620-2_IVY BRIDGE

+3VALW

1

C33

C33

0.1U_0402_16V4Z

0.1U_0402_16V4Z

B

SYS_PWROK<15>

A

1

2

R880

@

R880

@

0_0402_5%

0_0402_5%

1

R161

R161

+3VS

10K_0402_5%

10K_0402_5%

PM_DRAM_PWR GD<15>

RUN_ON_CPU1.5VS3#<9>

5

2

U1

U1

2

5

1

P

B

2

A

G

74AHC1G09GW_TSSOP5

74AHC1G09GW_TSSOP5

3

PM_SYS_PWRGD_BUF

4

O

2

G

G

+1.5V_CPU_VDDQ

1

@

@

R33

R33

39_0402_5%

39_0402_5%

2

1

D

D

Q1

Q1
2N7002H_SOT23-3

2N7002H_SOT23-3

S

S

3

1

2

@

@

R30

R30

200_0402_5%

200_0402_5%

4

BUF_CPU_RST#

TYCO_2013620-2_IVY BRIDGE

1

R35

@

R35

@

0_0402_5%

0_0402_5%

2

Buffered reset to CPU

+3VS

+V1.05S_VCCP

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

R32

R32

75_0402_5%

75_0402_5%

R34

R34

2

43_0402_1%

43_0402_1%

1

BUFO_CPU_RST#

2

SN74LVC1G07DCKR_SC70-5

SN74LVC1G07DCKR_SC70-5

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

3

1

C34

C34

2

5

U2

U2

4

1

P

NC

Y

PCH_PLTRST#

2

A

G

3

2011/06/15 2012/07/11

2011/06/15 2012/07/11

2011/06/15 2012/07/11

3V

PCH_PLTRST# <17>

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

Compal Electronics, Inc.

Title

Title

Title

PROCESSOR(2/7) PM,XDP,CLK

PROCESSOR(2/7) PM,XDP,CLK

PROCESSOR(2/7) PM,XDP,CLK

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

LA-7987P

LA-7987P

LA-7987P

Date: Sheet

Date: Sheet

Date: Sheet

1

of

5 50Tuesday, October 30, 2012

of

5 50Tuesday, October 30, 2012

of

5 50Tuesday, October 30, 2012

B

A

1.0

1.0

1.0

5

JCPU1C

JCPU1C

DDR_A_D[0..63]<11>

D

C

B

DDR_A_BS0<11>

DDR_A_BS1<11>
DDR_A_BS2<11>

DDR_A_CAS#<11>
DDR_A_RAS#<11>

DDR_A_WE#<11>

DDR_A_D0
DDR_A_D1

DDR_A_D2

DDR_A_D3
DDR_A_D4

DDR_A_D5

DDR_A_D6

DDR_A_D7

DDR_A_D8

DDR_A_D9

DDR_A_D10

DDR_A_D11

DDR_A_D12
DDR_A_D13

DDR_A_D14

DDR_A_D15

DDR_A_D16

DDR_A_D17

DDR_A_D18

DDR_A_D19

DDR_A_D20
DDR_A_D21

DDR_A_D22

DDR_A_D23

DDR_A_D24

DDR_A_D25

DDR_A_D26
DDR_A_D27

DDR_A_D28

DDR_A_D29

DDR_A_D30

DDR_A_D31

DDR_A_D32
DDR_A_D33

DDR_A_D34

DDR_A_D35

DDR_A_D36
DDR_A_D37

DDR_A_D38

DDR_A_D39

DDR_A_D40
DDR_A_D41

DDR_A_D42
DDR_A_D43

DDR_A_D44

DDR_A_D45

DDR_A_D46
DDR_A_D47

DDR_A_D48

DDR_A_D49

DDR_A_D50

DDR_A_D51

DDR_A_D52
DDR_A_D53

DDR_A_D54
DDR_A_D55

DDR_A_D56
DDR_A_D57
DDR_A_D58

DDR_A_D59

DDR_A_D60

DDR_A_D61

DDR_A_D62
DDR_A_D63

G10

N10

M10

AG6

AG5

AK6
AK5

AH5
AH6

AK8

AK9

AH8

AH9

AL9

AL8

AP11

AN11

AL12

AM12

AM11

AL11
AP12

AN12

AJ14

AH14

AL15

AK15
AL14
AK14

AJ15

AH15

AE10

AF10

AE8
AD9

AF9

C5
D5

D3
D2
D6

C6
C2

C3

F10

F8

G9

G8
G7
K4

K5
K1

K2

M8

N8
N7

M9
N9

M7

AJ5
AJ6

AJ8

AJ9

V6

F9
F7

J1
J5

J4
J2

SA_DQ[0]
SA_DQ[1]

SA_DQ[2]
SA_DQ[3]
SA_DQ[4]

SA_DQ[5]
SA_DQ[6]

SA_DQ[7]
SA_DQ[8]
SA_DQ[9]

SA_DQ[10]
SA_DQ[11]

SA_DQ[12]
SA_DQ[13]

SA_DQ[14]
SA_DQ[15]
SA_DQ[16]

SA_DQ[17]
SA_DQ[18]

SA_DQ[19]
SA_DQ[20]

SA_DQ[21]
SA_DQ[22]
SA_DQ[23]

SA_DQ[24]
SA_DQ[25]

SA_DQ[26]
SA_DQ[27]
SA_DQ[28]

SA_DQ[29]
SA_DQ[30]

SA_DQ[31]
SA_DQ[32]

SA_DQ[33]
SA_DQ[34]
SA_DQ[35]

SA_DQ[36]
SA_DQ[37]

SA_DQ[38]
SA_DQ[39]

SA_DQ[40]
SA_DQ[41]
SA_DQ[42]

SA_DQ[43]
SA_DQ[44]

SA_DQ[45]
SA_DQ[46]

SA_DQ[47]
SA_DQ[48]
SA_DQ[49]

SA_DQ[50]
SA_DQ[51]

SA_DQ[52]
SA_DQ[53]
SA_DQ[54]

SA_DQ[55]
SA_DQ[56]

SA_DQ[57]
SA_DQ[58]

SA_DQ[59]
SA_DQ[60]
SA_DQ[61]

SA_DQ[62]
SA_DQ[63]

SA_BS[0]

SA_BS[1]
SA_BS[2]

SA_CAS#
SA_RAS#

SA_WE#

4

AB6

SA_CLK[0]

AA6

SA_CLK#[0]

V9

SA_CKE[0]

AA5

SA_CLK[1]

AB5

SA_CLK#[1]

V10

SA_CKE[1]

AB4

RSVD_TP[1]

AA4

RSVD_TP[2]

W9

RSVD_TP[3]

AB3

RSVD_TP[4]

AA3

RSVD_TP[5]

W10

RSVD_TP[6]

AK3

SA_CS#[0]

AL3

SA_CS#[1]

AG1

RSVD_TP[7]

AH1

RSVD_TP[8]

AH3

SA_ODT[0]

AG3

SA_ODT[1]

AG2

RSVD_TP[9]

SA_DQS[0]

SA_DQS[1]

SA_DQS[2]

SA_DQS[3]

SA_DQS[4]
SA_DQS[5]

SA_DQS[6]

SA_DQS[7]

SA_MA[0]
SA_MA[1]

SA_MA[2]
SA_MA[3]

SA_MA[4]
SA_MA[5]
SA_MA[6]

SA_MA[7]
SA_MA[8]

SA_MA[9]

SA_MA[10]

SA_MA[11]
SA_MA[12]
SA_MA[13]

SA_MA[14]
SA_MA[15]

AH2

C4
G6

J3

M6

AL6

AM8

AR12

AM15

D4

F6

K3

N6

AL5
AM9

AR11

AM14

AD10
W1

W2
W7

V3
V2
W3

W6
V1

W5
AD8

V4
W4
AF8

V5
V7

DDR_A_DQS#0

DDR_A_DQS#1

DDR_A_DQS#2

DDR_A_DQS#3

DDR_A_DQS#4

DDR_A_DQS#5

DDR_A_DQS#6

DDR_A_DQS#7

DDR_A_DQS0

DDR_A_DQS1

DDR_A_DQS2

DDR_A_DQS3
DDR_A_DQS4
DDR_A_DQS5

DDR_A_DQS6

DDR_A_DQS7

DDR_A_MA0

DDR_A_MA1

DDR_A_MA2
DDR_A_MA3

DDR_A_MA4

DDR_A_MA5

DDR_A_MA6
DDR_A_MA7

DDR_A_MA8

DDR_A_MA9

DDR_A_MA10
DDR_A_MA11

DDR_A_MA12
DDR_A_MA13

DDR_A_MA14

DDR_A_MA15

RSVD_TP[10]

SA_DQS#[0]
SA_DQS#[1]

SA_DQS#[2]

SA_DQS#[3]

SA_DQS#[4]

SA_DQS#[5]

SA_DQS#[6]

SA_DQS#[7]

DDR SYSTEM MEMORY A

DDR SYSTEM MEMORY A

M_CLK_DDR0 <11>
M_CLK_DDR#0 <11>

DDR_CKE0_DIMMA <11>

M_CLK_DDR1 <11>
M_CLK_DDR#1 <11>

DDR_CKE1_DIMMA <11>

DDR_CS0_DIMMA# <11>

DDR_CS1_DIMMA# <11>

M_ODT0 <11>
M_ODT1 <11>

3

DDR_A_DQS#[0..7] <11>

DDR_A_DQS[0..7] <11>

DDR_A_MA[0..15] <11>

2

JCPU1D

AH11

AH12

AN14
AR14

AA10

D10

K10

J10

AM5

AM6
AR3

AP3
AN3
AN2

AN1

AP2

AP5

AN9

AT5

AT6

AP6

AN8

AR6

AR5

AR9

AJ11

AT8

AT9

AR8

AJ12

AT11

AT14
AT12

AN15
AR15
AT15

AA9

AA7

R6

AB8
AB9

C9
A7

C8
A9

A8
D9

D8
G4

F4

F1

G1

G5

F5

F2

G2

J7

J8

K9

J9

K8
K7

M5
N4

N2
N1

M4
N5
M2

M1

JCPU1D

SB_DQ[0]
SB_DQ[1]

SB_DQ[2]
SB_DQ[3]
SB_DQ[4]

SB_DQ[5]
SB_DQ[6]

SB_DQ[7]
SB_DQ[8]
SB_DQ[9]

SB_DQ[10]
SB_DQ[11]

SB_DQ[12]
SB_DQ[13]

SB_DQ[14]
SB_DQ[15]
SB_DQ[16]

SB_DQ[17]
SB_DQ[18]

SB_DQ[19]
SB_DQ[20]

SB_DQ[21]
SB_DQ[22]
SB_DQ[23]

SB_DQ[24]
SB_DQ[25]

SB_DQ[26]
SB_DQ[27]

SB_DQ[28]
SB_DQ[29]
SB_DQ[30]

SB_DQ[31]
SB_DQ[32]

SB_DQ[33]
SB_DQ[34]

SB_DQ[35]
SB_DQ[36]
SB_DQ[37]

SB_DQ[38]
SB_DQ[39]

SB_DQ[40]
SB_DQ[41]
SB_DQ[42]

SB_DQ[43]
SB_DQ[44]

SB_DQ[45]
SB_DQ[46]

SB_DQ[47]
SB_DQ[48]
SB_DQ[49]

SB_DQ[50]
SB_DQ[51]

SB_DQ[52]
SB_DQ[53]

SB_DQ[54]
SB_DQ[55]
SB_DQ[56]

SB_DQ[57]
SB_DQ[58]

SB_DQ[59]
SB_DQ[60]

SB_DQ[61]
SB_DQ[62]
SB_DQ[63]

SB_BS[0]

SB_BS[1]
SB_BS[2]

SB_CAS#

SB_RAS#
SB_WE#

AE2

SB_CLK[0]

AD2

SB_CLK#[0]

R9

SB_CKE[0]

AE1

SB_CLK[1]

AD1

SB_CLK#[1]

R10

SB_CKE[1]

SB_CS#[0]

SB_CS#[1]

SB_ODT[0]

SB_ODT[1]

SB_DQS[0]

SB_DQS[1]

SB_DQS[2]

SB_DQS[3]

SB_DQS[4]

SB_DQS[5]

SB_DQS[6]

SB_DQS[7]

SB_MA[0]
SB_MA[1]

SB_MA[2]
SB_MA[3]

SB_MA[4]
SB_MA[5]
SB_MA[6]

SB_MA[7]
SB_MA[8]

SB_MA[9]

SB_MA[10]

SB_MA[11]
SB_MA[12]
SB_MA[13]

SB_MA[14]
SB_MA[15]

AB2
AA2

T9

AA1

AB1
T10

AD3

AE3
AD6

AE6

AE4

AD4

AD5

AE5

DDR_B_DQS#0

D7

DDR_B_DQS#1

F3

DDR_B_DQS#2

K6

DDR_B_DQS#3

N3

DDR_B_DQS#4

AN5

DDR_B_DQS#5

AP9

DDR_B_DQS#6

AK12

DDR_B_DQS#7

AP15

DDR_B_DQS0

C7

DDR_B_DQS1

G3

DDR_B_DQS2

J6

DDR_B_DQS3

M3

DDR_B_DQS4

AN6

DDR_B_DQS5

AP8

DDR_B_DQS6

AK11

DDR_B_DQS7

AP14

DDR_B_MA0

AA8

DDR_B_MA1

T7

DDR_B_MA2

R7

DDR_B_MA3

T6

DDR_B_MA4

T2

DDR_B_MA5

T4

DDR_B_MA6

T3

DDR_B_MA7

R2

DDR_B_MA8

T5

DDR_B_MA9

R3

DDR_B_MA10

AB7

DDR_B_MA11

R1

DDR_B_MA12

T1

DDR_B_MA13

AB10

DDR_B_MA14

DDR_B_MA15

R5
R4

RSVD_TP[11]
RSVD_TP[12]

RSVD_TP[13]

RSVD_TP[14]

RSVD_TP[15]
RSVD_TP[16]

RSVD_TP[17]

RSVD_TP[18]

RSVD_TP[19]

RSVD_TP[20]

SB_DQS#[0]

SB_DQS#[1]

SB_DQS#[2]
SB_DQS#[3]

SB_DQS#[4]
SB_DQS#[5]

SB_DQS#[6]

SB_DQS#[7]

DDR SYSTEM MEMORY B

DDR SYSTEM MEMORY B

DDR_B_D[0..63]<12>

DDR_B_D0

DDR_B_D1

DDR_B_D2

DDR_B_D3

DDR_B_D4

DDR_B_D5

DDR_B_D6

DDR_B_D7

DDR_B_D8

DDR_B_D9

DDR_B_D10

DDR_B_D11

DDR_B_D12

DDR_B_D13

DDR_B_D14

DDR_B_D15

DDR_B_D16

DDR_B_D17

DDR_B_D18

DDR_B_D19

DDR_B_D20

DDR_B_D21

DDR_B_D22

DDR_B_D23

DDR_B_D24

DDR_B_D25

DDR_B_D26

DDR_B_D27

DDR_B_D28

DDR_B_D29

DDR_B_D30

DDR_B_D31

DDR_B_D32

DDR_B_D33

DDR_B_D34

DDR_B_D35

DDR_B_D36

DDR_B_D37

DDR_B_D38

DDR_B_D39

DDR_B_D40

DDR_B_D41

DDR_B_D42

DDR_B_D43

DDR_B_D44

DDR_B_D45

DDR_B_D46

DDR_B_D47

DDR_B_D48

DDR_B_D49

DDR_B_D50

DDR_B_D51

DDR_B_D52

DDR_B_D53

DDR_B_D54

DDR_B_D55

DDR_B_D56

DDR_B_D57

DDR_B_D58

DDR_B_D59

DDR_B_D60

DDR_B_D61

DDR_B_D62

DDR_B_D63

DDR_B_BS0<12>
DDR_B_BS1<12>

DDR_B_BS2<12>

DDR_B_CAS#<12>

DDR_B_RAS#<12>
DDR_B_WE#<12>

1

M_CLK_DDR2 <12>
M_CLK_DDR#2 <12>
DDR_CKE2_DIMMB <12>

M_CLK_DDR3 <12>

M_CLK_DDR#3 <12>

DDR_CKE3_DIMMB <12>

DDR_CS2_DIMMB# <12>

DDR_CS3_DIMMB# <12>

M_ODT2 <12>
M_ODT3 <12>

DDR_B_DQS#[0..7] <12>

DDR_B_DQS[0..7] <12>

DDR_B_MA[0..15] <12>

D

C

B

TYCO_2013620-2_IVY BRIDGE

TYCO_2013620-2_IVY BRIDGE

+1.5V

R36

@

R36

@

0_0402_5%

0_0402_5%

1

2

D

S

D

S

1

3

Q2

Q2

G

G

LBSS138LT1G_SOT-23-3

LBSS138LT1G_SOT-23-3

2

1

C35

C35

0.047U 16V K X7R 0402

0.047U 16V K X7R 0402

2

DDR3_DRAMRST#_R

5

H_DRAMRST#

4.99K_0402_1%

4.99K_0402_1%

2

R39

R39

1

DRAMRST_CNTRL

H_DRAMRST#<5>

A

1

R37

R37

1K_0402_5%

1K_0402_5%

Eiffel used 0.01u
Module design used 0.047u

2

R38

R38
1K_0402_5%

1K_0402_5%

1

4

2

DDR3_DRAMRST# <11,12>

DRAMRST_CNTRL_PC H<14>

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

R02

1

R40 0_0402_5%

R40 0_0402_5%

3

2

DRAMRST_CNTRL

@

@

Compal Secret Data

Compal Secret Data

2011/06/15 2012/07/11

2011/06/15 2012/07/11

2011/06/15 2012/07/11

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

TYCO_2013620-2_IVY BRIDGE

TYCO_2013620-2_IVY BRIDGE

DRAMRST_CNTRL <9>

2

Compal Electronics, Inc.

Title

Title

Title

PROCESSOR(3/7) DDRIII

PROCESSOR(3/7) DDRIII

PROCESSOR(3/7) DDRIII

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

LA-7987P

LA-7987P

LA-7987P

Date: Sheet

Date: Sheet

Date: Sheet

1

of

6 50Tuesday, October 30, 2012

of

6 50Tuesday, October 30, 2012

of

6 50Tuesday, October 30, 2012

A

1.0

1.0

1.0

5

4

3

2

1

CFG Straps for Processor

CFG2

D

JCPU1E

JCPU1E

AK28

CFG[0]

AK29

CFG2

CFG4

CFG5

CFG6

CFG7

+VCC_GFXCORE_AXG

+VCC_CORE

R253

R253

49.9_0402_1%

C

49.9_0402_1%

2

R252

R252

49.9_0402_1%

49.9_0402_1%

2

1

1

1

R82 100_0402_ 1%@

R82 100_0402_ 1%@

1

R88 100_040 2_1%@

R88 100_040 2_1%@

2

2

VCC_AXG_VAL_SENSE

VSS_AXG_VAL_SENSE

VCC_VAL_SENSE

VSS_VAL_SENSE

Need PWR add new circuit on 1.0 5V(refer CRB)

VSS_AXG_VAL_SENSE

Check

R255

R255

49.9_0402_1%

49.9_0402_1%

INTEL 12/28 recommand
to add RC120, RC121, RC122, RC123

B

Please place as close as JCPU1

2

1

VSS_VAL_SENSE

2

R257

R257

49.9_0402_1%

49.9_0402_1%

1

CFG[1]

AL26

CFG[2]

AL27

CFG[3]

AK26

CFG[4]

AL29

CFG[5]

AL30

CFG[6]

AM31

CFG[7]

AM32

CFG[8]

AM30

CFG[9]

AM28

CFG[10]

AM26

CFG[11]

AN28

CFG[12]

AN31

CFG[13]

AN26

CFG[14]

AM27

CFG[15]

AK31

CFG[16]

AN29

CFG[17]

AJ31

VAXG_VAL_SENSE

AH31

VSSAXG_VAL_SENSE

AJ33

VCC_VAL_SENSE

AH33

VSS_VAL_SENSE

AJ26

RSVD5

F25

RSVD8

F24

RSVD9

F23

RSVD10

D24

RSVD11

G25

RSVD12

G24

RSVD13

E23

RSVD14

D23

RSVD15

C30

RSVD16

A31

RSVD17

B30

RSVD18

B29

RSVD19

D30

RSVD20

B31

RSVD21

A30

RSVD22

C29

RSVD23

J20

RSVD24

B18

RSVD25

J15

RSVD27

TYCO_2013620-2_IVY BRIDGE

TYCO_2013620-2_IVY BRIDGE

CFG

CFG

VCC_DIE_SENSE

VSS_DIE_SENSE

RESERVED

RESERVED

RSVD_NCTF10

RSVD_NCTF11
RSVD_NCTF12
RSVD_NCTF13

Interl request AH26 short GND
check on EVT phase

AH27

AH26

1

2

@

@

R02

RSVD28

RSVD29
RSVD30
RSVD31

RSVD32

RSVD33

RSVD34
RSVD35

RSVD37

RSVD38
RSVD39

RSVD40

RSVD_NCTF1

RSVD_NCTF2

RSVD_NCTF3

RSVD_NCTF4

RSVD_NCTF5

RSVD_NCTF6
RSVD_NCTF7

RSVD_NCTF8
RSVD_NCTF9

RSVD51
RSVD52

BCLK_ITP

BCLK_ITP#

KEY

L7

AG7
AE7
AK2

W8

AT26

AM33
AJ27

T8

J16
H16

G16

AR35

AT34

AT33

AP35

AR34

B34
A33

A34
B35
C35

AJ32
AK32

AN35

AM35

AT2
AT1
AR1

B1

R60 0_0402_5%

R60 0_0402_5%

PEG Static Lane Reversal - CFG2 is for the 16x

T13PAD

T13PAD

CFG2

*

Display Port Presence Strap

CFG4

*

PCIE Port Bifurcation Straps

11: (Default) x16 - Device 1 functions 1 and 2 disabled

*

CFG[6:5]

10: x8, x8 - Device 1 function 1 enabled ; function 2
disabled

01: Reserved - (Device 1 function 1 disabled ; function
2 enabled)

00: x8,x4,x4 - Device 1 functions 1 and 2 enabled

1

R41

R41
1K_0402_1%

1K_0402_1%

2

1: Normal Operation; Lane # definition matches
socket pin map definition

0:Lane Reversed

CFG4

1K_0402_1%

1K_0402_1%

1

R42

@

R42

@

1K_0402_1%

1K_0402_1%

2

1 : Disabled; No Physical Display Port
attached to Embedded Display Port

0 : Enabled; An external Display Port device is
connected to the Embedded Display Port

CFG6

CFG5

CFG7

@

@

1

1

R44

@

R44

2

1

2

@

1K_0402_1%

1K_0402_1%

2

R45

@

R45

@

1K_0402_1%

1K_0402_1%

R43

R43

D

C

B

PEG DEFER TRAINING

1: (Default) PEG Train immediately following xxRESETB

CFG7

de assertion

A

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

3

2011/06/15 2012/07/11

2011/06/15 2012/07/11

2011/06/15 2012/07/11

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

0: PEG Wait for BIOS for training

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

PROCESSOR(4/7) RSVD,CFG

PROCESSOR(4/7) RSVD,CFG

PROCESSOR(4/7) RSVD,CFG

LA-7987P

LA-7987P

LA-7987P

1

7 50Tuesday, October 30, 2012

7 50Tuesday, October 30, 2012

7 50Tuesday, October 30, 2012

A

1.0

1.0

1.0

of

of

of

5

POWER

+VCC_CORE

JCPU1F

JCPU1F

POWER

QC=94A
DC=53A

D

C

B

A

AG35

AG34
AG33

AG32
AG31
AG30

AG29
AG28

AG27
AG26

AF35

AF34
AF33

AF32
AF31

AF30
AF29
AF28

AF27
AF26

AD35
AD34
AD33

AD32
AD31

AD30
AD29

AD28
AD27
AD26

AC35
AC34

AC33
AC32

AC31

AC30
AC29

AC28
AC27

AC26
AA35
AA34

AA33
AA32

AA31
AA30
AA29

AA28
AA27

AA26

VCC1

VCC2
VCC3

VCC4
VCC5
VCC6

VCC7
VCC8

VCC9
VCC10
VCC11

VCC12
VCC13

VCC14
VCC15

VCC16
VCC17
VCC18

VCC19
VCC20

VCC21
VCC22
VCC23

VCC24
VCC25

VCC26
VCC27

VCC28
VCC29
VCC30

VCC31
VCC32

VCC33
VCC34
VCC35

VCC36
VCC37

VCC38
VCC39

VCC40
VCC41
VCC42

VCC43
VCC44

VCC45
VCC46
VCC47

VCC48
VCC49

VCC50

Y35

VCC51

Y34

VCC52

Y33

VCC53

Y32

VCC54

Y31

VCC55

Y30

VCC56

Y29

VCC57

Y28

VCC58

Y27

VCC59

Y26

VCC60

V35

VCC61

V34

VCC62

V33

VCC63

V32

VCC64

V31

VCC65

V30

VCC66

V29

VCC67

V28

VCC68

V27

VCC69

V26

VCC70

U35

VCC71

U34

VCC72

U33

VCC73

U32

VCC74

U31

VCC75

U30

VCC76

U29

VCC77

U28

VCC78

U27

VCC79

U26

VCC80

R35

VCC81

R34

VCC82

R33

VCC83

R32

VCC84

R31

VCC85

R30

VCC86

R29

VCC87

R28

VCC88

R27

VCC89

R26

VCC90

P35

VCC91

P34

VCC92

P33

VCC93

P32

VCC94

P31

VCC95

P30

VCC96

P29

VCC97

P28

VCC98

P27

VCC99

P26

VCC100

CORE SUPPLY

CORE SUPPLY

4

8.5A

AH13

VCCIO1

AH10

VCCIO2

AG10

VCCIO3

AC10

VCCIO4

Y10

VCCIO5

U10

VCCIO6

P10

VCCIO7

L10

VCCIO8

J14

VCCIO9

J13

VCCIO10

J12

VCCIO11

J11

VCCIO12

H14

VCCIO13

H12

VCCIO14

H11

VCCIO15

G14

VCCIO16

G13

VCCIO17

G12

VCCIO18

F14

VCCIO19

F13

VCCIO20

F12

VCCIO21

F11

VCCIO22

E14

VCCIO23

E12

VCCIO24

E11

VCCIO25

D14

VCCIO26

D13

VCCIO27

D12

VCCIO28

D11

VCCIO29

C14

VCCIO30

C13

VCCIO31

PEG AND DDR

PEG AND DDR

VCC_SENSE
VSS_SENSE

VCCIO_SENSE

VSS_SENSE_VCCIO

SENSE LINES SVID

SENSE LINES SVID

VCCIO32
VCCIO33
VCCIO34

VCCIO35
VCCIO36

VCCIO37
VCCIO38

VCCIO39

VCCIO40

VIDALERT#

VIDSCLK
VIDSOUT

C12
C11
B14

B12
A14

A13
A12

A11

J23

AJ29
AJ30
AJ28

AJ35
AJ34

B10

A10

3

+V1.05S_VCCP

+V1.05S_VCCP

1

C99

C99

0.1U_0402_10V6K

H_CPU_SVIDALRT#
H_CPU_SVIDCLK
H_CPU_SVIDDAT

0.1U_0402_10V6K

1

2

R47 43_0402_5%

R47 43_0402_5%

1

2

R480_0402_5 % @

R480_0402_5 % @

1

2

R490_0402_ 5% @

R490_0402_ 5% @

1

2

R50 130_0402_5%

R50 130_0402_5%

2

1

R46

R46

75_0402_5%

75_0402_5%

2

+V1.05S_VCCP

VR_SVID_CLK

VR_SVID_ALRT# <43>
VR_SVID_CLK <43>
VR_SVID_DAT <43>

0

.1uF on power side

series-resistors close to VR

VCC_SENCE 100ohm +-1% pull-up to VCC near processor

Trace Impedance =27-33 ohm
Trace Length Matc < 25 mils

VCCSENSE_R
VSSSENSE_R

VSSIO_SENSE_L

VSS_SENCE 100ohm +-1% pull-down to GND near processor

1

2

R52 0_0402_5%@

R52 0_0402_5%@

1

2

R53 0_0402_5%@

R53 0_0402_5%@

VSSIO_SENSE

1

2

R74

R74

10_0402_1%@

10_0402_1%@

R74 & R79 put together

VSSIO_SENSE_L <42>

R79

R79

2

10_0402_1%

10_0402_1%

VCCIO_SENSE <41,42>

+V1.05S_VCCP

1

2

+VCC_CORE

1

R51

R51

100_0402_1%

100_0402_1%

1

R66

R66
100_0402_1%

100_0402_1%

2

2

@

@

1

R54

R54
100_0402_1%

100_0402_1%

2

VCCSENSE <43>
VSSSENSE <43>

1

D

C

B

A

Security Classification

Security Classification

TYCO_2013620-2_IVY BRIDGE

TYCO_2013620-2_IVY BRIDGE

5

4

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

2011/06/15 2012/07/11

2011/06/15 2012/07/11

2011/06/15 2012/07/11

3

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Title

Title

Title

PROCESSOR(5/7) PWR,BYPASS

PROCESSOR(5/7) PWR,BYPASS

PROCESSOR(5/7) PWR,BYPASS

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

LA-7987P

LA-7987P

LA-7987P

Date: Sheet

Date: Sheet

2

Date: Sheet

8 50Tuesday, October 30, 2012

8 50Tuesday, October 30, 2012

8 50Tuesday, October 30, 2012

1

1.0

1.0

1.0

of

of

of

5

4

3

2

1

+1.5V

1

PAD-OPEN 4x4m

U3

U3

DMN3030LSS-13_SOP8L-8

DMN3030LSS-13_SOP8L-8

8

7

6

5

RUN_ON_CPU1.5VS3

Q4

Q4

2N7002_SOT23

2N7002_SOT23

AT24
AT23
AT21

AT20
AT18

AT17

AR24

AR23
AR21
AR20

AR18
AR17

AP24
AP23
AP21

AP20
AP18

AP17
AN24

AN23
AN21
AN20

AN18
AN17

AM24
AM23
AM21

AM20
AM18

AM17

AL24

AL23
AL21
AL20

AL18
AL17

AK24
AK23

AK21
AK20
AK18

AK17
AJ24

AJ23
AJ21
AJ20

AJ18
AJ17

AH24
AH23

AH21
AH20
AH18

AH17

B6
A6

A2

PAD-OPEN 4x4m

JCPU1G

JCPU1G

VAXG1
VAXG2
VAXG3

VAXG4
VAXG5

VAXG6
VAXG7

VAXG8
VAXG9
VAXG10

VAXG11
VAXG12

VAXG13
VAXG14
VAXG15

VAXG16
VAXG17

VAXG18
VAXG19

VAXG20
VAXG21
VAXG22

VAXG23
VAXG24

VAXG25
VAXG26
VAXG27

VAXG28
VAXG29

VAXG30
VAXG31

VAXG32
VAXG33
VAXG34

VAXG35
VAXG36

VAXG37
VAXG38

VAXG39
VAXG40
VAXG41

VAXG42
VAXG43

VAXG44
VAXG45
VAXG46

VAXG47
VAXG48

VAXG49
VAXG50

VAXG51
VAXG52
VAXG53

VAXG54

VCCPLL1
VCCPLL2

VCCPLL3

TYCO_2013620-2_IVY BRIDGE

TYCO_2013620-2_IVY BRIDGE

R668

@

R668

@

1

@

@

22U_0805_6.3V6M

22U_0805_6.3V6M

@

@

0_0402_5%

0_0402_5%

C345

C345

Check

10U

1

2

2

C130

10U_0603_6.3V6M

C130

10U_0603_6.3V6M

1

2

+VSB

1

R03

R56

R56
82K_0402_5%

82K_0402_5%

2

1

D

D

2

G

G

S

S

3

RUN_ON_CPU1.5VS3# <5>

+VCC_GFXCORE_AXG

1.5A

+1.8VS_VCCPLL

C131

1U_0402_6.3V6K

C131

1U_0402_6.3V6K

C132

1U_0402_6.3V6K

C132

1U_0402_6.3V6K

1

2

SUSP<35,42>

R667

@

R667

@

100K_0402_5%

100K_0402_5%

2

2

R580_0402_5% @

R580_0402_5% @

2

R590_0402_5% @

R590_0402_5% @

R69 0_0805_5%

R69 0_0805_5%

1

2

@

@

+3VALW

1

2

RUN_ON_CPU1.5VS3#

1

D

D

G

G

S

S

3

22U_0805_6.3V6M

22U_0805_6.3V6M

1

@

@

2

Q7

Q7
2N7002_SOT23

2N7002_SOT23

C154

C154

1

2

D

CPU1.5V_S3_GATE<31,35,42>

SUSP#<31,35,40,41,42>

C

B

A

1

1

+1.8VS

+1.5V_CPU_VDDQ

J1

@

J1

@

2

1

2

3

4

R885

R885

1

1

15K_0402_1%

15K_0402_1%

R57

R57

330K_0402_5%

330K_0402_5%

@

@

2

POWER

POWER

GRAPHICS

GRAPHICS

1.8V RAIL

1.8V RAIL

@

@

R55

R55

220_0402_5%

220_0402_5%

AP4800
Id=9.6A

R02

2

1

C97

C97

0.047U_0603_25V7K

0.047U_0603_25V7K

2

SENSE

SENSE

VREFMISC

VREFMISC

DDR3 -1.5V RAILS

DDR3 -1.5V RAILS

SA RAIL

SA RAIL

@

@
Q3

Q3

2N7002_SOT23

2N7002_SOT23

VAXG_SENSE

VSSAXG_SENSE

LINES

LINES

SM_VREF

SA_DIMM_VREFDQ

SB_DIMM_VREFDQ

VDDQ1

VDDQ2
VDDQ3

VDDQ4
VDDQ5
VDDQ6

VDDQ7
VDDQ8

VDDQ9

VDDQ10

VDDQ11

VDDQ12
VDDQ13

VDDQ14
VDDQ15

VCCSA1

VCCSA2
VCCSA3

VCCSA4
VCCSA5

VCCSA6
VCCSA7
VCCSA8

VCCSA_SENSE

VCCSA_VID[0]

VCCSA_VID[1]

VCCIO_SEL

1

2

1

D

D

2

G

G

S

S

3

+VCC_GFXCORE_AXG

AK35
AK34

+V_SM_VREF_CNT

AL1

+V_DDR_REFA_R

B4

+V_DDR_REFB_R

D1

AF7

AF4
AF1

AC7
AC4
AC1

Y7
Y4

Y1
U7

U4

U1
P7

P4
P1

+VCCSA

M27

M26
L26

J26
J25

J24
H26
H25

H23

C22

C24

A19

1

@

@

C92

C92

0.1U_0402_10V6K

0.1U_0402_10V6K

2

RUN_ON_CPU1.5VS3#

1

R616

R616

10_0402_1%

10_0402_1%

2

1

R626

R626

10_0402_1%

10_0402_1%

2

H_VCCSA_VID0 <41>
H_VCCSA_VID1 <41>

VCC_AXG_SENSE <43>

1

R89

@

R89

@

100_0402_1%

100_0402_1%

2

VSS_AXG_SENSE <43>

+V_SM_VREF should
have 20 mil trace width

10U_0603_6.3V6M

10U_0603_6.3V6M

1

C117

10U_0603_6.3V6M

C117

10U_0603_6.3V6M

1

2

2

10U

C124

10U_0603_6.3V6M

C124

10U_0603_6.3V6M

1

10U_0603_6.3V6M

10U_0603_6.3V6M

1

2

2

+VREF_DQ_DIMMA

+VREF_DQ_DIMMB

DRAMRST_CNTRL

LBSS138LT1G_SOT-23-3

LBSS138LT1G_SOT-23-3

2

G

G

Q9

Q9

M3 Circuit (Processor Generated SO-DIMM VREF_DQ)

RUN_ON_CPU1.5VS3

+1.5V_CPU_VDDQ

1

R67

R67

1K_0402_1%

1K_0402_1%

2

1

1

C98

C98

0.1U_0402_10V6K

0.1U_0402_10V6K

C118

C118

1

2

C126

10U_0603_6.3V6M

C126

10U_0603_6.3V6M

1

C125

C125

2

1

R68 0_0402_5%

R68 0_0402_5%

10U_0603_6.3V6M

10U_0603_6.3V6M

2

10U_0603_6.3V6M

10U_0603_6.3V6M

C120

10U_0603_6.3V6M

C120

10U_0603_6.3V6M

1

1

C119

C119

2

2

+VCCSA

C127

10U_0603_6.3V6M

C127

10U_0603_6.3V6M

1

2

@

@

2

H_VCCP_SELH_VCCP_SELH_VCCP_SELH_VCCP_SELH_VCCP_SELH_VCCP_SELH_VCCP_SELH_VCCP_SELH_VCCP_SELH_VCCP_SEL

IVY Bridge drives VCCIO_SEL low
VCCP_PWRCTRL:0
Sandy Bridge is NC for A19
VCCP_PWRCTRL:1

R78

R78

1K_0402_1%

1K_0402_1%

2

+1.5V_CPU_VDDQ

1

C122

10U_0603_6.3V6M

C122

10U_0603_6.3V6M

1

C121

C121

+

+

C123

C123

330U_2.5V_M

330U_2.5V_M

2

2

1

+

+

C128

@

C128

@

330U_D2_2.5VY_R9M

330U_D2_2.5VY_R9M

2

+VCCSA_SENSE <41>

1

2

R77 0_0402_5%

R77 0_0402_5%

10K_0402_5%

10K_0402_5%

R670

R670

1

1

R671

R671

1

D

D

S

S

3

+3VS

2

R75

R75

1

Q6

Q6

1

D

D

LBSS138LT1G_SOT-23-3

LBSS138LT1G_SOT-23-3

DRAMRST_CNTRL

2

G

G

@

@

S

S

3

+V_DDR_REFA_R

0_0402_5%~D

0_0402_5%~D

@

@

2

2

0_0402_5%~D

0_0402_5%~D

R353

R353

1K_0402_1%

1K_0402_1%

+V_DDR_REFB_R

1

@

@

2

1

1K_0402_1%

1K_0402_1%
@

@

2

Q5-orignal part
AP2302GN-HF_SOT23-3
SB523020210

G

G

2

PMV45EN_SOT23-3

PMV45EN_SOT23-3
Q5

@

Q5

@

1

3

D

S

D

S

@

@

2

+1.5V

2

R76

@

R76

@

10K_0402_5%

10K_0402_5%

1

+V_SM_VREF

C396

C396

0.1U_0402_10V6K

0.1U_0402_10V6K

1

C129

C129

0.1U_0402_10V6K

0.1U_0402_10V6K

1

C96

C96

0.1U_0402_10V6K

0.1U_0402_10V6K

1

2

C95

C95

0.1U_0402_10V6K

0.1U_0402_10V6K

1

VCCP_PWRCTRL <41>

R61

R61

1

0_0402_5%

0_0402_5%

+3VALW

R64

R64

+1.5V

+1.5V_CPU_VDDQ

@

@

2

@

@

2

2

1

2

1

R63

R63
1K_0402_1%

1K_0402_1%

2

DRAMRST_CNTRL <6>

R62

@

R62

@

1K_0402_1%

1K_0402_1%

@

@

D

C

B

A

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2011/06/15 2012/07/11

2011/06/15 2012/07/11

2011/06/15 2012/07/11

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Title

Title

Title

PROCESSOR(6/7) PWR

PROCESSOR(6/7) PWR

PROCESSOR(6/7) PWR

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

LA-7987P

LA-7987P

LA-7987P

Date: Sheet

Date: Sheet

2

Date: Sheet

1

9 50Tuesday, October 30, 2012

9 50Tuesday, October 30, 2012

9 50Tuesday, October 30, 2012

1.0

1.0

1.0

of

of

of

5

AT35
AT32

AT29
AT27

AT25
AT22

AT19
AT16
AT13

D

C

B

A

5

AT10

AT7

AT4
AT3

AR25

AR22
AR19

AR16
AR13

AR10

AR7
AR4

AR2

AP34

AP31
AP28
AP25

AP22
AP19

AP16
AP13

AP10

AP7
AP4

AP1

AN30

AN27
AN25
AN22

AN19
AN16

AN13
AN10

AN7
AN4

AM29

AM25
AM22

AM19
AM16

AM13
AM10

AM7

AM4
AM3

AM2
AM1

AL34

AL31
AL28

AL25
AL22

AL19
AL16
AL13

AL10

AL7

AL4
AL2

AK33

AK30
AK27

AK25
AK22

AK19
AK16
AK13

AK10

AK7

AK4

AJ25

4

JCPU1H

JCPU1H

VSS1
VSS2

VSS3
VSS4

VSS5
VSS6

VSS7
VSS8
VSS9

VSS10
VSS11

VSS12
VSS13
VSS14

VSS15
VSS16

VSS17
VSS18

VSS19
VSS20
VSS21

VSS22
VSS23

VSS24
VSS25
VSS26

VSS27
VSS28

VSS29
VSS30

VSS31
VSS32
VSS33

VSS34
VSS35

VSS36
VSS37
VSS38

VSS39
VSS40

VSS41
VSS42

VSS43
VSS44
VSS45

VSS46
VSS47

VSS48
VSS49

VSS50
VSS51
VSS52

VSS53
VSS54

VSS55
VSS56
VSS57

VSS58
VSS59

VSS60
VSS61

VSS62
VSS63
VSS64

VSS65
VSS66

VSS67
VSS68
VSS69

VSS70
VSS71

VSS72
VSS73

VSS74
VSS75
VSS76

VSS77
VSS78

VSS79
VSS80

TYCO_2013620-2_IVY BRIDGE

TYCO_2013620-2_IVY BRIDGE

VSS

VSS

4

3

JCPU1I

JCPU1I

AJ22

VSS81

AJ19

VSS82

AJ16

VSS83

AJ13

VSS84

AJ10

VSS85

AJ7

VSS86

AJ4

VSS87

AJ3

VSS88

AJ2

VSS89

AJ1

VSS90

AH35

VSS91

AH34

VSS92

AH32

VSS93

AH30

VSS94

AH29

VSS95

AH28

VSS96

AH25

VSS98

AH22

VSS99

AH19

VSS100

AH16

VSS101

AH7

VSS102

AH4

VSS103

AG9

VSS104

AG8

VSS105

AG4

VSS106

AF6

VSS107

AF5

VSS108

AF3

VSS109

AF2

VSS110

AE35

VSS111

AE34

VSS112

AE33

VSS113

AE32

VSS114

AE31

VSS115

AE30

VSS116

AE29

VSS117

AE28

VSS118

AE27

VSS119

AE26

VSS120

AE9

VSS121

AD7

VSS122

AC9

VSS123

AC8

VSS124

AC6

VSS125

AC5

VSS126

AC3

VSS127

AC2

VSS128

AB35

VSS129

AB34

VSS130

AB33

VSS131

AB32

VSS132

AB31

VSS133

AB30

VSS134

AB29

VSS135

AB28

VSS136

AB27

VSS137

AB26

VSS138

Y9

VSS139

Y8

VSS140

Y6

VSS141

Y5

VSS142

Y3

VSS143

Y2

VSS144

W35

VSS145

W34

VSS146

W33

VSS147

W32

VSS148

W31

VSS149

W30

VSS150

W29

VSS151

W28

VSS152

W27

VSS153

W26

VSS154

U9

VSS155

U8

VSS156

U6

VSS157

U5

VSS158

U3

VSS159

U2

VSS160

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2011/06/15 2012/07/11

2011/06/15 2012/07/11

2011/06/15 2012/07/11

3

T35

VSS161

T34

VSS162

T33

VSS163

T32

VSS164

T31

VSS165

T30

VSS166

T29

VSS167

T28

VSS168

T27

VSS169

T26

VSS170

P9

VSS171

P8

VSS172

P6

VSS173

P5

VSS174

P3

VSS175

P2

VSS176

N35

VSS177

N34

VSS178

N33

VSS179

N32

VSS180

N31

VSS181

N30

VSS182

N29

VSS183

N28

VSS184

N27

VSS185

N26

VSS186

M34

VSS187

L33

VSS188

L30

VSS189

L27

VSS190

L9

VSS191

L8

VSS192

L6

VSS193

L5

VSS194

L4

VSS195

L3

VSS196

L2

VSS197

L1

VSS198

K35

VSS199

K32

VSS200

K29

VSS201

K26

VSS202

J34

VSS203

J31

VSS204

H33

VSS205

H30

VSS206

H27

VSS207

H24

VSS208

H21

VSS209

H18

VSS210

H15

VSS211

H13

VSS212

H10

VSS213

H9

VSS214

H8

VSS215

H7

VSS216

H6

VSS217

H5

VSS218

H4

VSS219

H3

VSS220

H2

VSS221

H1

VSS222

G35

VSS223

G32

VSS224

G29

VSS225

G26

VSS226

G23

VSS227

G20

VSS228

G17

VSS229

G11

VSS230

F34

VSS231

F31

VSS232

F29

VSS233

TYCO_2013620-2_IVY BRIDGE

TYCO_2013620-2_IVY BRIDGE

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

VSS

VSS

2

VSS234
VSS235

VSS236
VSS237

VSS238
VSS239

VSS240
VSS241
VSS242

VSS243
VSS244

VSS245
VSS246
VSS247

VSS248
VSS249

VSS250
VSS251

VSS252
VSS253
VSS254

VSS255
VSS256

VSS257
VSS258

VSS259
VSS260
VSS261

VSS262
VSS263

VSS264
VSS265
VSS266

VSS267
VSS268

VSS269
VSS270

VSS271
VSS272
VSS273

VSS274
VSS275

VSS276
VSS277

VSS278
VSS279
VSS280

VSS281
VSS282

VSS283
VSS284

VSS285

2

F22
F19

E30
E27

E24
E21

E18
E15
E13

E10
E9

E8
E7
E6

E5
E4

E3
E2

E1
D35
D32

D29
D26

D20
D17

C34
C31
C28

C27
C25

C23
C10

C1

B22
B19

B17
B15

B13
B11
B9

B8
B7

B5
B3

B2
A35
A32

A29
A26

A23
A20

A3

1

Compal Electronics, Inc.

Title

Title

Title

PROCESSOR(7/7) VSS

PROCESSOR(7/7) VSS

PROCESSOR(7/7) VSS

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

LA-7987P

LA-7987P

LA-7987P

Date: Sheet

Date: Sheet

Date: Sheet

1

of

10 50Tuesday, October 30, 2012

of

10 50Tuesday, October 30, 2012

of

10 50Tuesday, October 30, 2012

D

C

B

A

1.0

1.0

1.0

+VREF_DQ_DIMMA

D

C

B

A

1K_0402_1%

1K_0402_1%

R70

R70
1K_0402_1%

1K_0402_1%

DDR_CKE0_DIMMA<6>

DDR_A_BS2<6>

M_CLK_DDR0<6>
M_CLK_DDR#0<6>

DDR_A_BS0<6>

5

+1.5V

3A@1.5V

3A@1.5V

3A@1.5V3A@1.5V

DDR3 SO-DIMM A

JDIMM1

2.2U_0603_6.3V4Z
C134

C134

1

1

2

2

DDR_A_WE#<6>

DDR_A_CAS#<6>

DDR_CS1_DIMMA#<6>

+3VS

5

DDR_A_D0

C133

C133

DDR_A_D1

DDR_A_DM0

DDR_A_D2

DDR_A_D3

DDR_A_D8

DDR_A_D9

DDR_A_DQS#1

DDR_A_DQS1

DDR_A_D10

DDR_A_D11

DDR_A_D16

DDR_A_D17

DDR_A_DQS#2

DDR_A_DQS2

DDR_A_D18

DDR_A_D19

DDR_A_D24

DDR_A_D25

DDR_A_DM3

DDR_A_D26

DDR_A_D27

DDR_CKE0_DIMMA

DDR_A_BS2

DDR_A_MA12

DDR_A_MA9

DDR_A_MA8

DDR_A_MA5

DDR_A_MA3

DDR_A_MA1

M_CLK_DDR0
M_CLK_DDR#0

DDR_A_MA10

DDR_A_BS0

DDR_A_WE#

DDR_A_CAS#

DDR_A_MA13

DDR_CS1_DIMMA#

DDR_A_D32

DDR_A_D33

DDR_A_DQS#4

DDR_A_DQS4

DDR_A_D34

DDR_A_D35

DDR_A_D40

DDR_A_D41

DDR_A_DM5

DDR_A_D42

DDR_A_D43

DDR_A_D48

DDR_A_D49

DDR_A_DQS#6

DDR_A_DQS6

DDR_A_D50

DDR_A_D51

DDR_A_D56

DDR_A_D57

DDR_A_DM7

DDR_A_D58

DDR_A_D59

1

2

R81

R81

10K_0402_5%

10K_0402_5%

0.1U_0402_10V6K

0.1U_0402_10V6K
C156

C156

2.2U_0603_6.3V4Z

2.2U_0603_6.3V4Z
C155

C155

1

1

2

2

10K_0402_5%

10K_0402_5%

1

2

+VREF_DQ_DIMMA

0.1U_0402_10V6K

0.1U_0402_10V6K

2.2U_0603_6.3V4Z

JDIMM1

1

VREF_DQ

3

VSS2

5

DQ0

7

DQ1

9

VSS4

11

DM0

13

VSS5

15

DQ2

17

DQ3

19

VSS7

21

DQ8

23

DQ9

25

VSS9

27

DQS#1

29

DQS1

31

VSS11

33

DQ10

35

DQ11

37

VSS13

39

DQ16

41

DQ17

43

VSS15

45

DQS#2

47

DQS2

49

VSS18

51

DQ18

53

DQ19

55

VSS20

57

DQ24

59

DQ25

61

VSS22

63

DM3

65

VSS23

67

DQ26

69

DQ27

71

VSS25

73

CKE0

75

VDD1

77

NC1

79

BA2

81

VDD3

83

A12/BC#

85

A9

87

VDD5

89

A8

91

A5

93

VDD7

95

A3

97

A1

99

VDD9

101

CK0

103

CK0#

105

VDD11

107

A10/AP

109

BA0

111

VDD13

113

WE#

115

CAS#

117

VDD15

119

A13

121

S1#

123

VDD17

125

NCTEST

127

129
131

133

135

137

139

141

143
145

147

149

151

153

155
157

159

161

163

165

167

169
171

173

175

177

179

181
183

185

187

189

191

193

195
197

199

201

R83

R83

203

205

VREF_CA

VSS27

DQ32
DQ33

VSS29

DQS#4

DQS4

VSS32

DQ34

DQ35
VSS34

DQ40

DQ41

VSS36

DM5

VSS37
DQ42

DQ43

VSS39

DQ48

DQ49

VSS41

DQS#6
DQS6

VSS44

DQ50

DQ51

VSS46

DQ56
DQ57

VSS48

DM7

VSS49

DQ58

DQ59

VSS51
SA0

VDDSPD

SA1

VTT1

G1

FOX_AS0A626-U4SN-7F

FOX_AS0A626-U4SN-7F
ME@

ME@

+1.5V

1

2

1

R71

R71

2

VSS1

DQ4

DQ5

VSS3

DQS#0

DQS0

VSS6

VSS8
DQ12

DQ13

VSS10

RESET#

VSS12

DQ14

DQ15

VSS14

DQ20

DQ21

VSS16

VSS17

DQ22

DQ23

VSS19

DQ28

DQ29

VSS21

DQS#3

DQS3

VSS24

DQ30

DQ31

VSS26

CKE1

VDD2

VDD4

VDD6

VDD8

VDD10

CK1#

VDD12

RAS#

VDD14

ODT0

VDD16

ODT1

VDD18

VSS28

DQ36

DQ37

VSS30

VSS31

DQ38

DQ39

VSS33

DQ44

DQ45

VSS35

DQS#5

DQS5

VSS38

DQ46

DQ47

VSS40

DQ52

DQ53

VSS42

VSS43

DQ54

DQ55

VSS45

DQ60

DQ61

VSS47

DQS#7

DQS7

VSS50

DQ62

DQ63

VSS52

EVENT#

DQ6

DQ7

DM1

DM2

VTT2

4

+1.5V

2

DDR_A_D4

4

DDR_A_D5

6
8

DDR_A_DQS#0

10

DDR_A_DQS0

12

14

DDR_A_D6

16

DDR_A_D7

18

20

DDR_A_D12

22

DDR_A_D13

24

26

DDR_A_DM1

28

DDR3_DRAMRST#

30

32

DDR_A_D14

34

DDR_A_D15

36

38

DDR_A_D20

40

DDR_A_D21

42

44

DDR_A_DM2

46
48

DDR_A_D22

50

DDR_A_D23

52

54

DDR_A_D28

56

DDR_A_D29

58
60

DDR_A_DQS#3

62

DDR_A_DQS3

64

66

DDR_A_D30

68

DDR_A_D31

70
72

DDR_CKE1_DIMMA

74

76

DDR_A_MA15

78

A15

A14

A11

CK1

BA1

S0#

NC2

DM4

DM6

SDA

SCL

DDR_A_MA14

80

82

DDR_A_MA11

84

DDR_A_MA7

86

A7

88

DDR_A_MA6

90

DDR_A_MA4

A6

92

A4

94

DDR_A_MA2

96

DDR_A_MA0

A2

98

A0

100

M_CLK_DDR1

102

M_CLK_DDR#1

104

106

DDR_A_BS1

108

DDR_A_RAS#

110
112

DDR_CS0_DIMMA#

114

M_ODT0

116

118

M_ODT1

120

122
124

126

128

DDR_A_D36

DDR_A_D37

130

132

DDR_A_DM4

134

136

DDR_A_D38

138

DDR_A_D39

140

142

DDR_A_D44

144

DDR_A_D45

146

148

DDR_A_DQS#5

150

DDR_A_DQS5

152

154

DDR_A_D46

156

DDR_A_D47

158

160

DDR_A_D52

162

DDR_A_D53

164

166

DDR_A_DM6

168

170

DDR_A_D54

172

DDR_A_D55

174

176

DDR_A_D60

178

DDR_A_D61

180

182

DDR_A_DQS#7

184

DDR_A_DQS7

186

188

DDR_A_D62

190

DDR_A_D63

192

194

196

SMB_DATA_S3

198

SMB_CLK_S3

200

202
204

206

G2

4

+0.75VS

0.65A@0.75V

0.65A@0.75V

0.65A@0.75V0.65A@0.75V

DDR3_DRAMRST# <6,12>

DDR_CKE1_DIMMA <6>

M_CLK_DDR1 <6>

M_CLK_DDR#1 <6>

DDR_A_BS1 <6>
DDR_A_RAS# <6>

DDR_CS0_DIMMA# <6>
M_ODT0 <6>

M_ODT1 <6>

0.1U_0402_10V6K

0.1U_0402_10V6K

1

2

VDDQ(1.5V) =

3*330uf / 12m ohm (TOTAL FOR 2 SO-DIMMs)

6*0603 10uf (PER CONNECTOR)

VTT(0.75V) =

3*0805 10uf

VREF =

1*0402 0.1uf

VDDSPD (3.3V)=

1*0402 0.1uf 1*0402 2.2uf

SMB_DATA_S3 <12,14,25>

SMB_CLK_S3 <12,14,25>

C135

C135

1

2

DDR_A_D[0..63]<6>

DDR_A_DQS[0..7]<6>

DDR_A_DQS#[0..7]<6>

DDR_A_MA[0..15]<6>

R72

R72

1K_0402_1%

1K_0402_1%

+VREF_CA

2.2U_0603_6.3V4Z

2.2U_0603_6.3V4Z
C136

C136

1K_0402_1%

1K_0402_1%

4*0402 1uf

1*0402 2.2uf

3

2

1

D

C

(220uF_6.3V_4.2L_ESR17m)*1=(SF000002Y00)OSCAN

+1.5V

1

2

1

R73

R73

2

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

Layout Note:
Place near DIMM

+1.5V

C138

10U_0603_6.3V6M

C138

10U_0603_6.3V6M

C139

10U_0603_6.3V6M

C139

C137

10U_0603_6.3V6M

C137

10U_0603_6.3V6M

1

@

@

@

@

2

Layout Note:
Place near DIMM

+0.75VS

@

@

C151

1U_0402_6.3V6K

C151

1U_0402_6.3V6K

C150

1U_0402_6.3V6K

C150

1U_0402_6.3V6K

1

2

2011/06/15 2012/07/11

2011/06/15 2012/07/11

2011/06/15 2012/07/11

10U_0603_6.3V6M

1

1

2

2

@

@

C152

1U_0402_6.3V6K

C152

1U_0402_6.3V6K

C153

1U_0402_6.3V6K

C153

1U_0402_6.3V6K

1

1

1

2

2

2

Compal Secret Data

Compal Secret Data

Compal Secret Data

(10uF_0603_6.3V)*8

(0.1uF_402_10V)*4

C141

10U_0603_6.3V6M

C141

10U_0603_6.3V6M

C140

10U_0603_6.3V6M

C140

10U_0603_6.3V6M

1

2

Deciphered Date

Deciphered Date

Deciphered Date

1

1

2

2

7/28 Update connect GND directly

DDR_A_DM0

DDR_A_DM1
DDR_A_DM2
DDR_A_DM3

DDR_A_DM4
DDR_A_DM5

DDR_A_DM6
DDR_A_DM7

2

C142

10U_0603_6.3V6M

C142

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

1

2

Layout Note:
Place near DIMM

C145

0.1U_0402_10V6K

C145

C143

C143

0.1U_0402_10V6K

C144

10U_0603_6.3V6M

C144

10U_0603_6.3V6M

1

1

2

1

2

2

Custom

Custom

Custom

C147

0.1U_0402_10V6K

C147

0.1U_0402_10V6K

C146

0.1U_0402_10V6K

C146

0.1U_0402_10V6K

1

2

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

EVT Check

1

C148

0.1U_0402_10V6K

C148

0.1U_0402_10V6K

+

+

C149

@

C149

1

2

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

DDRIII-SODIMM SLOT1

DDRIII-SODIMM SLOT1

DDRIII-SODIMM SLOT1

@

220U_6.3V_M

220U_6.3V_M

2

LA-7987P

LA-7987P

LA-7987P

1

of

11 50Tuesday, October 30, 2012

of

11 50Tuesday, October 30, 2012

of

11 50Tuesday, October 30, 2012

B

A

1.0

1.0

1.0

+VREF_DQ_DIMMB

D

For Arranale only +VREF_DQ_DIMMB
supply from a external 1.5V voltage divide
circuit.

C

B

A

+1.5V

@

@

@

@

1

2

1

2

R84

R84

1K_0402_1%

1K_0402_1%

1K_0402_1%

1K_0402_1%

R85

R85

5

3A@1.5V

3A@1.5V

3A@1.5V3A@1.5V

+1.5V

JDIMM2

JDIMM2

+VREF_DQ_DIMMB

DDR_B_D0

0.1U_0402_10V6K

0.1U_0402_10V6K

2.2U_0603_6.3V4Z

2.2U_0603_6.3V4Z

1

C158

C158

2

@

@

@

@

DDR_CKE2_DIMMB<6>

DDR_B_BS2<6>

M_CLK_DDR2<6>

M_CLK_DDR#2<6>

DDR_B_BS0<6>

DDR_B_WE#<6>
DDR_B_CAS#<6>

DDR_CS3_DIMMB#<6>

+3VS

2.2U_0603_6.3V4Z

2.2U_0603_6.3V4Z

1

2

@

@

5

DDR_B_D1

DDR_B_DM0

1

C157

C157

DDR_B_D2

DDR_B_D3

2

DDR_B_D8

DDR_B_D9

DDR_B_DQS#1

DDR_B_DQS1

DDR_B_D10

DDR_B_D11

DDR_B_D16

DDR_B_D17

DDR_B_DQS#2

DDR_B_DQS2

DDR_B_D18

DDR_B_D19

DDR_B_D24

DDR_B_D25

DDR_B_DM3

DDR_B_D26

DDR_B_D27

DDR_CKE2_DIMMB

DDR_B_BS2

DDR_B_MA12

DDR_B_MA9

DDR_B_MA8

DDR_B_MA5

DDR_B_MA3

DDR_B_MA1

M_CLK_DDR2

M_CLK_DDR#2

DDR_B_MA10

DDR_B_BS0

DDR_B_WE#

DDR_B_CAS#

DDR_B_MA13

DDR_CS3_DIMMB#

DDR_B_D32

DDR_B_D33

DDR_B_DQS#4

DDR_B_DQS4

DDR_B_D34

DDR_B_D35

DDR_B_D40

DDR_B_D41

DDR_B_DM5

DDR_B_D42

DDR_B_D43

DDR_B_D48

DDR_B_D49

DDR_B_DQS#6

DDR_B_DQS6

DDR_B_D50

DDR_B_D51

DDR_B_D56

DDR_B_D57

DDR_B_DM7

DDR_B_D58

DDR_B_D59

1

2

R95

R95

10K_0402_5%

10K_0402_5%

1

@

@

0.1U_0402_10V6K

0.1U_0402_10V6K

R97 10K_0402_5%

C177

C177

R97 10K_0402_5%

C178

C178

@

1

2

@

@

@

1

VREF_DQ

3

VSS2

5

DQ0

7

DQ1

9

VSS4

11

DM0

13

VSS5

15

DQ2

17

DQ3

19

VSS7

21

DQ8

23

DQ9

25

VSS9

27

DQS#1

29

DQS1

31

VSS11

33

DQ10

35

DQ11

37

VSS13

39

DQ16

41

DQ17

43

VSS15

45

DQS#2

47

DQS2

49

VSS18

51

DQ18

53

DQ19

55

VSS20

57

DQ24

59

DQ25

61

VSS22

63

DM3

65

VSS23

67

DQ26

69

DQ27

71

VSS25

73

CKE0

75

VDD1

77

NC1

79

BA2

81

VDD3

83

A12/BC#

85

A9

87

VDD5

89

A8

91

A5

93

VDD7

95

A3

97

A1

99

VDD9

101

CK0

103

CK0#

105

VDD11

107

A10/AP

109

BA0

111

VDD13

113

WE#

115

CAS#

117

VDD15

119

A13

121

S1#

123

VDD17

125

NCTEST

127

VSS27

129

DQ32

131

DQ33

133

VSS29

135

DQS#4

137

DQS4

139

VSS32

141

DQ34

143

DQ35

145

VSS34

147

DQ40

149

DQ41

151

VSS36

153

DM5

155

VSS37

157

DQ42

159

DQ43

161

VSS39

163

DQ48

165

DQ49

167

VSS41

169

DQS#6

171

DQS6

173

VSS44

175

DQ50

177

DQ51

179

VSS46

181

DQ56

183

DQ57

185

VSS48

187

DM7

189

VSS49

191

DQ58

193

DQ59

195

VSS51

197

SA0

199

VDDSPD

201

2

SA1

203

VTT1

205

G1

4

VSS1

DQ4

DQ5

VSS3

DQS#0

DQS0
VSS6

DQ6

DQ7

VSS8

DQ12

DQ13

VSS10

DM1

RESET#

VSS12

DQ14

DQ15

VSS14

DQ20

DQ21

VSS16

DM2

VSS17

DQ22
DQ23

VSS19

DQ28

DQ29

VSS21

DQS#3

DQS3

VSS24

DQ30

DQ31

VSS26

CKE1

VDD2

A15

A14

VDD4

A11

A7

VDD6

A6

A4

VDD8

A2

A0

VDD10

CK1

CK1#

VDD12

BA1

RAS#

VDD14

S0#

ODT0

VDD16

ODT1

NC2

VDD18

VREF_CA

VSS28

DQ36

DQ37

VSS30

DM4

VSS31

DQ38

DQ39

VSS33

DQ44

DQ45

VSS35

DQS#5

DQS5

VSS38

DQ46

DQ47

VSS40

DQ52
DQ53

VSS42

DM6

VSS43

DQ54

DQ55

VSS45

DQ60

DQ61

VSS47

DQS#7

DQS7

VSS50

DQ62

DQ63

VSS52

EVENT#

SDA

SCL

VTT2

FOX_AS0A626-U8SN-7F

FOX_AS0A626-U8SN-7F

ME@

ME@

4

3

+VREF_CB

2.2U_0603_6.3V4Z

2.2U_0603_6.3V4Z

1

2

@

@

4*0402 1uf

C160

C160

DDR_B_D[0..63]<6>

DDR_B_DQS[0..7]<6>

DDR_B_DQS#[0..7]<6>

DDR_B_MA[0..15]<6>

+1.5V

1

R86

R86

1K_0402_1%

1K_0402_1%

2

@

@

1

R87

R87

1K_0402_1%

1K_0402_1%

2

@

@

1*0402 2.2uf

3

Layout Note:
Place near DIMM

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

C162

C162

@

@

C174

1U_0402_6.3V6K

C174

1U_0402_6.3V6K

1

2

@

@

10U_0603_6.3V6M

1

2

@

@

C175

1U_0402_6.3V6K

C175

1U_0402_6.3V6K

1

2

Compal Secret Data

Compal Secret Data

Compal Secret Data

C161

C161

1

@

@

2

Layout Note:
Place near DIMM

+0.75VS

@

@

C173

1U_0402_6.3V6K

C173

1U_0402_6.3V6K

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2011/06/15 2012/07/11

2011/06/15 2012/07/11

2011/06/15 2012/07/11

+1.5V

2

DDR_B_D4

4

DDR_B_D5

6

8

DDR_B_DQS#0

10

DDR_B_DQS0

12
14

DDR_B_D6

16

DDR_B_D7

18

20

DDR_B_D12

22

DDR_B_D13

24
26

DDR_B_DM1

28

DDR3_DRAMRST#

30

32

DDR_B_D14

34

DDR_B_D15

36

38

DDR_B_D20

40

DDR_B_D21

42

44

DDR_B_DM2

46

48

DDR_B_D22

50

DDR_B_D23

52

54

DDR_B_D28

56

DDR_B_D29

58

60

DDR_B_DQS#3

62

DDR_B_DQS3

64

66

DDR_B_D30

68

DDR_B_D31

70

72

DDR_CKE3_DIMMB

74

76

DDR_B_MA15

78

DDR_B_MA14

80
82

DDR_B_MA11

84

DDR_B_MA7

86

88

DDR_B_MA6

90

DDR_B_MA4

92

94

DDR_B_MA2

96

DDR_B_MA0

98

100

M_CLK_DDR3

102

M_CLK_DDR#3

104

106

DDR_B_BS1

108

DDR_B_RAS#

110

112

DDR_CS2_DIMMB#

114

M_ODT2

116

118

M_ODT3

120

122

124

126
128

DDR_B_D36

130

DDR_B_D37

132

DDR_B_DM4

134

136

138

DDR_B_D38

DDR_B_D39

140

142

DDR_B_D44

144

DDR_B_D45

146

148

DDR_B_DQS#5

150

DDR_B_DQS5

152
154

DDR_B_D46

156

DDR_B_D47

158

160

DDR_B_D52

162

DDR_B_D53

164
166

DDR_B_DM6

168

170

DDR_B_D54

172

DDR_B_D55

174

176

DDR_B_D60

178

DDR_B_D61

180

182

DDR_B_DQS#7

184

DDR_B_DQS7

186

188

DDR_B_D62

190

DDR_B_D63

192

194

196

SMB_DATA_S3

198

SMB_CLK_S3

200

202

204

206

G2

0.65A@0.75V

0.65A@0.75V

0.65A@0.75V0.65A@0.75V

DDR3_DRAMRST# <6,11>

DDR_CKE3_DIMMB <6>

M_CLK_DDR3 <6>
M_CLK_DDR#3 <6>

DDR_B_BS1 <6>
DDR_B_RAS# <6>

DDR_CS2_DIMMB# <6>
M_ODT2 <6>

M_ODT3 <6>

0.1U_0402_10V6K

0.1U_0402_10V6K

C159

C159

1

2

VDDQ(1.5V) =

@

@

3*330uf / 12m ohm (TOTAL FOR 2 SO-DIMMs)

6*0603 10uf (PER CONNECTOR)

VTT(0.75V) =

3*0805 10uf

1*0402 0.1uf

VDDSPD (3.3V)=

1*0402 0.1uf 1*0402 2.2uf

SMB_DATA_S3 <11,14,25>

SMB_CLK_S3 <11,14,25>

+0.75VS

2

(10uF_0603_6.3V)*8

(0.1uF_402_10V)*4

+1.5V

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

C165

C163

C163

1

2

@

@

C176

1U_0402_6.3V6K

C176

1U_0402_6.3V6K

1

2

@

@

Deciphered Date

Deciphered Date

Deciphered Date

C165

C164

C164

1

2

@

@

DDR_B_DM0
DDR_B_DM1

DDR_B_DM2
DDR_B_DM3
DDR_B_DM4

DDR_B_DM5

1

DDR_B_DM6
DDR_B_DM7

2

2

10U_0603_6.3V6M

10U_0603_6.3V6M

C166

C166

1

1

2

2

@

@

@

@

Layout Note:
Place near DIMM

1

D

C

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

0.1U_0402_10V6K

C167

C167

C168

C168

1

2

@

@

0.1U_0402_10V6K
C169

1

2

C169

1

2

@

@

@

@

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

0.1U_0402_10V6K

0.1U_0402_10V6K

0.1U_0402_10V6K

1

2

@

@

C171

C171

1

2

LA-7987P

LA-7987P

LA-7987P

1

0.1U_0402_10V6K
C172

C172

@

@

0.1U_0402_10V6K

0.1U_0402_10V6K

C170

C170

1

2

@

@

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

DDRIII-SODIMM SLOT2

DDRIII-SODIMM SLOT2

DDRIII-SODIMM SLOT2

B

A

1.0

1.0

1.0

of

12 50Tuesday, October 30, 2012

of

12 50Tuesday, October 30, 2012

of

12 50Tuesday, October 30, 2012

5

W=20milsW=20mils

+RTCVCC

R99

R99

1K_0402_5%

1K_0402_5%

1

1

C179

C179

1U_0603_1 0V4Z

1U_0603_1 0V4Z

2

D

+RTCBAT T

2

1

CLRP1

CLRP1

SHORT PA DS

SHORT PA DS

2

C180

C180

18P_0402_5 0V8J

18P_0402_5 0V8J

4

1

R98 10M_0402_ 5%

R98 10M_0402_ 5%

1

2

2

Y1

Y1

1

2

PCH_RTC X1

PCH_RTC X2

32.768KHZ_ 12.5PF_CM31532 768DZFT

32.768KHZ_ 12.5PF_CM31532 768DZFT

1

C181

C181

18P_0402_5 0V8J

18P_0402_5 0V8J

2

3

2

1

D

+RTCVCC

1

R101 1M_0402_ 5%

R101 1M_0402 _5%

1

R102 330K_0402 _5%

R102 330K_0402 _5%

INTVRMEN

H

：：：：

Integrated VRM enable

*

L

：：：：

Integrated VRM disable

2

2

SM_INTRU DER#

PCH_INTV RMEN

(INTVRMEN should always be pull high.)

+3VS

1

R105 1K_0402_5 %@

R105 1K_0402_5 %@

HIGH= Enable ( No Reboot )
LOW= Disable (Default)

*

C

+3V_PCH

R106 1K_0402_5%@

R106 1K_0402_5%@

Low = Disabled (Default)

*

High = Enabled [Flash Descriptor Security Overide]

+3V_PCH

R108 1K_0402_5%

R108 1K_0402_5%

This signal has a weak internal pull-down
On Die PLL VR is supplied by

1.5V when smaple d high

1.8V when sample d low

*

Needs to be pull ed High for Chi ef River platfr om

HDA_BITC LK_AUDIO<30>

HDA_SYNC_ AUDIO<30>

B

HDA_RS T_AUDIO#<3 0>

HDA_SD OUT_AUDIO<30>

+3V_PCH

1

@

@
R121

R121

200_0402_5 %

200_0402_5 %

PCH_JTA G_TDO

2

1

@

@
R125

R125

100_0402_1 %

100_0402_1 %

2

A

2

1

2

1

2

33_0402_5%

33_0402_5%

1

R114

R114

33_0402_5%

33_0402_5%

1

33_0402_5%

33_0402_5%

1

33_0402_5%

33_0402_5%

1

+3V_PCH

1

@

@

R122

R122

200_0402_5 %

200_0402_5 %

PCH_JTA G_TMS

2

1

@

@

R126

R126

100_0402_1 %

100_0402_1 %

2

R112

R112

R116

R116

R118

R118

HDA_BIT_ CLK

2

HDA_SYNC_ R

2

HDA_RST #

2

HDA_SDO UT

2

+3V_PCH

1

PCH_JTA G_TDI

2

1

2

HDA_SPK R

HDA_SDO UT

HDA_SYNC

@

@
R123

R123

200_0402_5 %

200_0402_5 %

@

@
R128

R128

100_0402_1 %

100_0402_1 %

DPDG1.1

CMOS

+RTCVCC

1U_0603_1 0V4Z

1U_0603_1 0V4Z

1

R103 20K_04 02_5%

R103 20K_04 02_5%

1

R100 20K_04 02_5%

R100 20K_04 02_5%

C182

C182

1U_0603_1 0V4Z

1U_0603_1 0V4Z

+3V_PCH

ME_FLAS H

R107 1K_04 02_1%@

R107 1K_0 402_1%@

+5VS

G

G

2

3

S

S

R175

R175

1

0_0402_5%

0_0402_5%

ME_FLAS H<31>

2

R878

R878

1M_0402_5 %

1M_0402_5 %

1

Del Q10 check with codec
VDDIO using 3VALW

1

1

C183

C183

2

2

2

2

1

1

2

2

HDA_SPK R<30>

HDA_SDIN 0<30 >

1

1

2

2

2

R110

R110

51_0402_5%

51_0402_5%

Q10

Q10

LBSS138LT 1G_SOT-23-3

LBSS138LT 1G_SOT-23-3

HDA_SYNC

1

D

D

@

@

2

R124

R124

33_0402_5%

33_0402_5%

@

@

C190

C190

22P_0402_5 0V8J

22P_0402_5 0V8J

@

@

U4A

CLRP2

SHORT PADS

CLRP2

SHORT PADS

PCH_RTC X1

PCH_RTC X2

PCH_RTC RST#

PCH_SRT CRST#

CLRP3

SHORT PADS

CLRP3

SHORT PADS

SM_INTRU DER#

PCH_INTV RMEN

HDA_BIT_ CLK

HDA_SYNC

HDA_SPK R

HDA_RST #

HDA_SDIN 0

R109

R109

0_0402_5%

0_0402_5%

R26410K_0402_5 % @

R26410K_0402_5 % @

PCH_JTA G_TCK

1

PCH_JTA G_TMS

PCH_JTA G_TDI

PCH_JTA G_TDO

SPI_CLK_P CH_R

SPI_SB_C S0#

SPI_SI

SPI_SO_R

SPI_CLK_P CH_R

1

HDA_SDO UT

2

PCH_GPIO33

1

SPI_SB_C S1#

U4A

A20

RTCX1

C20

RTCX2

D20

RTCRST #

G22

SRTCRS T#

K22

INTRUDE R#

C17

INTVRME N

N34

HDA_BC LK

L34

HDA_SYNC

T10

SPKR

K34

HDA_RS T#

E34

HDA_SD IN0

G34

HDA_SD IN1

C34

HDA_SD IN2

A34

HDA_SD IN3

A36

HDA_SD O

C36

HDA_DOC K_EN# / GPIO33

N32

HDA_DOC K_RST# / GPIO13

J3

JTAG_TCK

H7

JTAG_TMS

K5

JTAG_TDI

H1

JTAG_TDO

T3

SPI_CLK

Y14

SPI_CS0#

T1

SPI_CS1#

V4

SPI_MOSI

U3

SPI_MISO

PANTHE R-POINT_FCBGA98 9

PANTHE R-POINT_FCBGA98 9

R124;c190 close to U4.T3 pin

2

RTC

RTC

IHDA

IHDA

JTAG

JTAG

SPI

SPI

LPC

LPC

FWH4 / LF RAME#

LDRQ1# / GPIO23

SATA

SATA

SATA0GP / GP IO21

SATA1GP / GP IO19

HM76@

HM76@

SATA 6G

SATA 6G

SATA3RC OMPO

U4

U4

LDRQ0#

SERIRQ

SATA0RX N
SATA0RX P
SATA0TX N

SATA0TX P

SATA1RX N

SATA1RX P

SATA1TX N

SATA1TX P

SATA2RX N
SATA2RX P

SATA2TX N
SATA2TX P

SATA3RX N
SATA3RX P

SATA3TX N
SATA3TX P

SATA4RX N

SATA4RX P

SATA4TX N

SATA4TX P

SATA5RX N

SATA5RX P

SATA5TX N
SATA5TX P

SATALED #

HM70@

HM70@

C38
A38
B37

C37

D36

E36

K36

V5

AM3
AM1
AP7

AP5

AM10

AM8
AP11

AP10

AD7
AD5

AH5
AH4

AB8
AB10

AF3
AF1

Y7

Y5
AD3

AD1

Y3
Y1

AB3
AB1

Y11

Y10

AB12

AB13

AH1

P3

V14

P1

FWH0 / LA D0
FWH1 / LA D1
FWH2 / LA D2

FWH3 / LA D3

SATAICOM PO

SATAICOM PI

SATA3COM PI

SATA3RB IAS

BD82HM70 SJTNV C1

BD82HM70 SJTNV C1

SA00005M Q80

SA00005M Q80

LPC_AD0

LPC_AD1

LPC_AD2

LPC_AD3

LPC_FRA ME#

R104 10K_0402_5%

R104 10K_0402_5%

SERIRQ

SERIRQ

SATA_ITX_ C_DRX_N0

SATA_ITX_ C_DRX_P0

SATA_DT X_C_IRX_N2

SATA_DT X_C_IRX_P2
SATA_ITX_ C_DRX_N2

SATA_ITX_ C_DRX_P2

SATA_COM P

SATA3_C OMP

RBIAS_SA TA3

SATALED #

PCH_GPIO21

BBS_BIT0_ R

+3VS

2

2

2

R221

R221

R129

R129

LPC_AD0 <25 ,31>
LPC_AD1 <25 ,31>

LPC_AD2 <25 ,31>
LPC_AD3 <25 ,31>

LPC_FRA ME# <25,31>

2

R111

R111

37.4_0402_1%

37.4_0402_1%

1

49.9_0402_1%

49.9_0402_1%

1

1

750_0402_1 %

750_0402_1 %

R117 10K_0402_ 5%

R117 10K_0402_ 5%

R119 10K_0402_ 5%

R119 10K_0402_ 5%

R187 10K_0402_5 %

R187 10K_0402_5 %

R266

R266

1

1

R127

R127

1

1

SERIRQ <31>

2

R113

R113

R115

R115

1

1

1

1

CAP on Conn, side

+1.05VS_VC C_SATA

+1.05VS_SA TA3

2

2

SPI_WP #1

2

3.3K_0402_5 %

3.3K_0402_5 %

SPI_HOLD# 1

2

3.3K_0402_5 %

3.3K_0402_5 %

SPI_WP #

2

3.3K_0402_5 %

3.3K_0402_5 %

SPI_HOLD#

2

3.3K_0402_5 %

3.3K_0402_5 %

EC and Mini card debug port

+3VS

SATA_DT X_C_IRX_N0

SATA_DT X_C_IRX_P0

SATA_ITX_ DRX_N0

1

2

C1840.01U_0402_ 25V7K

C1840.01U_0402_ 25V7K

SATA_ITX_ DRX_P0

1

2

C1850.01U_0402_25V 7K

C1850.01U_0402_25V 7K

SATA_DT X_C_IRX_N2 <29>

SATA_DT X_C_IRX_P2 <29>

SATA_ITX_ C_DRX_N2 <29>

SATA_ITX_ C_DRX_P2 <29>

SPI_SB_C S1#

+3VS

SPI_SO_R

+3VS

+3VS

SPI_SB_C S0#

SPI_SO_R

SATA_DT X_C_IRX_N0 <29>

SATA_DT X_C_IRX_P0 <29>

SATA_ITX_ DRX_N0 <29>
SATA_ITX_ DRX_P0 <29>

ODD

8MB SPI ROM FOR ME
& Non-share ROM.

R291

R291

CS1#

0_0402_5%

0_0402_5%

SPI_SO1

1

2

SPI_WP #1

1

2

R188

R188

33_0402_5%

33_0402_5%

U6 Rersver 4M+2M Solution

R130

R130

0_0402_5%

0_0402_5%
1

1

2

33_0402_5%

33_0402_5%

R131

R131

CS#

SPI_SO_L

2

SPI_WP #

U6

U6

1

CS#

2

SO

HOLD#

3

WP#

SCLK

4

GND

16M W2 5Q16BVSSIG SOIC 8P

16M W2 5Q16BVSSIG SOIC 8P

U5

U5

1

CS#

2

SO

3

WP#

4

GND

32M W2 5Q32BVSSIG SOIC 8P

32M W2 5Q32BVSSIG SOIC 8P

VCC

SI

VCC

HOLD#

SCLK

HDD

SI

8

7
6

5

+3VS

SPI_HOLD# 1

SPI_CLK1
SPI_SI1

+3VS

8

SPI_HOLD#

7

SPI_CLK_P CH

6

SPI_SI_R

5

0_0402_5%

0_0402_5%

1

1

C191

C191

1

2

0.1U_0402_1 6V4Z

0.1U_0402_1 6V4Z

R132

R132

0_0402_5%

0_0402_5%

1

1

R199

R199

SPI_CLK_P CH_R
SPI_SI

2

2

R196

R196

33_0402_5%

33_0402_5%

SPI_CLK_P CH_R

2

SPI_SI

2

R133

R133
33_0402_5%

33_0402_5%

C

B

A

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

3

2011/06/15 201 2/07/11

2011/06/15 201 2/07/11

2011/06/15 20 12/07/11

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

Compal Electronics, Inc.

Title

Title

Title

PCH (1/9) SATA,HDA,SPI, LPC, XDP

PCH (1/9) SATA,HDA,SPI, LPC, XDP

PCH (1/9) SATA,HDA,SPI, LPC, XDP

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

LA-7987P

LA-7987P

LA-7987P

Date: S heet

Date: S heet

Date: S heet

1

of

13 50Tuesday, October 30, 2012

of

13 50Tuesday, October 30, 2012

of

13 50Tuesday, October 30, 2012

1.0

1.0

1.0

5

LAN

WLAN

D

USB3.0

C

LAN

WLAN

USB3.0

B

PCIE_PRX _DTX_N1<26>
PCIE_PRX _DTX_P1<26>

PCIE_PTX _C_DRX_N1<26>

PCIE_PTX _C_DRX_P1<26>

PCIE_PRX _DTX_N2<25>

PCIE_PRX _DTX_P2<25>
PCIE_PTX _C_DRX_N2<25>
PCIE_PTX _C_DRX_P2<25>

PCIE_PRX _DTX_N4<34>

PCIE_PRX _DTX_P4<34>

PCIE_PTX _C_DRX_N4<34>

PCIE_PTX _C_DRX_P4<34>

CLK_PCIE _LAN#<26>

CLK_PCIE _LAN<26 >

CLKREQ_L AN#<26>

CLK_PCIE _WLAN1#<25>
CLK_PCIE _WLAN1<25>

CLKREQ_W LAN#<25>

CLK_PCIE _USB30#< 34>

CLK_PCIE _USB30<34>

CLKREQ_U SB30#<34>

+3V_PCH

+3VS

+3V_PCH

+3V_PCH

+3V_PCH

+3V_PCH

+3V_PCH

+3V_PCH

C309 0.1U_0402_10 V7K@

C309 0.1U_0402_10 V7K@

C308 0.1U_0402_10V7K@

C308 0.1U_0402_10V7K@

+3VS

1

C192 0.1U_040 2_10V7K

C192 0.1U_040 2_10V7K

C193 0.1U_0402_1 0V7K

C193 0.1U_0402_1 0V7K

C194 0.1U_040 2_10V7K

C194 0.1U_040 2_10V7K

C195 0.1U_0402_10 V7K

C195 0.1U_0402_10 V7K

R153 0_040 2_5%

R153 0_040 2_5%

R154 0_040 2_5%

R154 0_040 2_5%

R151 0_0402_5 %

R151 0_0402_5 %

R152 10K_040 2_5%

R152 10K_040 2_5%

R149 0_040 2_5%

R149 0_040 2_5%

R150 0_0402_5%

R150 0_0402_5%

R156 0_0402_ 5%

R156 0_0402_ 5%

R158 10K_040 2_5%

R158 10K_040 2_5%

R147 10K_0402 _5%

R147 10K_0402 _5%

R334 0_0402_5%@

R334 0_0402_5%@

R330 0_040 2_5%@

R330 0_040 2_5%@

R326 0_0402_5%@

R326 0_0402_5%@

R301 10K_0402_ 5%

R301 10K_0402_ 5%

R165 10K_0 402_5%

R165 10K_0 402_5%

R168 10K _0402_5%

R168 10K _0402_5%

R170 10K_0402_5 %

R170 10K_0402_5 %

R172 10K_ 0402_5%

R172 10K_ 0402_5%

R174 10K_0402_5 %

R174 10K_0402_5 %

2

1

2

1

2

1

2

1

2

1

2

CAP on Conn, side

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

4

PCIE_PRX _DTX_N1
PCIE_PRX _DTX_P1

PCIE_PTX _DRX_N1

PCIE_PTX _DRX_P1

PCIE_PRX _DTX_N2

PCIE_PRX _DTX_P2

PCIE_PTX _DRX_N2

PCIE_PTX _DRX_P2

PCIE_PRX _DTX_N4
PCIE_PRX _DTX_P4

PCIE_PTX _DRX_N4

PCIE_PTX _DRX_P4

CLK_PCIE _LAN#_R

CLK_PCIE _LAN_R

CLKREQ_L AN#_R

CLK_PCIE _WLAN1#_R

CLK_PCIE _WLAN1_R

CLKREQ_W LAN#_R

PCH_GPIO20

CLK_USB 30#

CLK_USB 30

CLKREQ_U SB30#_R

PCH_GPIO26

PCH_GPIO44

PCH_GPIO56

PCH_GPIO45

PCH_GPIO46

PCIE_CLK_8N
PCIE_CLK_8P

U4B

U4B

BG34

PERN1

BJ34

PERP1

AV32

PETN1

AU32

PETP1

BE34

PERN2

BF34

PERP2

BB32

PETN2

AY32

PETP2

BG36

PERN3

BJ36

PERP3

AV34

PETN3

AU34

PETP3

BF36

PERN4

BE36

PERP4

AY34

PETN4

BB34

PETP4

BG37

PERN5

BH37

PERP5

AY36

PETN5

BB36

PETP5

BJ38

PERN6

BG38

PERP6

AU36

PETN6

AV36

PETP6

BG40

PERN7

BJ40

PERP7

AY40

PETN7

BB40

PETP7

BE38

PERN8

BC38

PERP8

AW38

PETN8

AY38

PETP8

Y40

CLKOUT_P CIE0N

Y39

CLKOUT_P CIE0P

J2

PCIECLKR Q0# / GPIO73

AB49

CLKOUT_P CIE1N

AB47

CLKOUT_P CIE1P

M1

PCIECLKR Q1# / GPIO18

AA48

CLKOUT_P CIE2N

AA47

CLKOUT_P CIE2P

V10

PCIECLKR Q2# / GPIO20

Y37

CLKOUT_P CIE3N

Y36

CLKOUT_P CIE3P

A8

PCIECLKR Q3# / GPIO25

Y43

CLKOUT_P CIE4N

Y45

CLKOUT_P CIE4P

L12

PCIECLKR Q4# / GPIO26

V45

CLKOUT_P CIE5N

V46

CLKOUT_P CIE5P

L14

PCIECLKR Q5# / GPIO44

AB42

CLKOUT_P EG_B_N

AB40

CLKOUT_P EG_B_P

E6

PEG_B_CL KRQ# / GPIO56

V40

CLKOUT_P CIE6N

V42

CLKOUT_P CIE6P

T13

PCIECLKR Q6# / GPIO45

V38

CLKOUT_P CIE7N

V37

CLKOUT_P CIE7P

K12

PCIECLKR Q7# / GPIO46

AK14

CLKOUT_IT PXDP_N

AK13

CLKOUT_IT PXDP_P

PANTHE R-POINT_FCBGA98 9

PANTHE R-POINT_FCBGA98 9

PCI-E*

PCI-E*

CLOCKS

CLOCKS

3

SMBALE RT# / GPIO11

SMBCLK

SMBDAT A

SML0ALE RT# / GPIO60

SMBUSController

SMBUSController

SML1ALE RT# / PCHHOT# / GPIO74

Link

Link

PEG_A_CL KRQ# / GPIO47

FLEX CLOCKS

FLEX CLOCKS

SML0CLK

SML0DAT A

SML1CLK / GPIO58

SML1DAT A / GPIO75

CL_CLK1

CL_DATA 1

CL_RST1#

CLKOUT_P EG_A_N
CLKOUT_P EG_A_P

CLKOUT_D MI_N
CLKOUT_D MI_P

CLKOUT_D P_N
CLKOUT_D P_P

CLKIN_DM I_N

CLKIN_DM I_P

CLKIN_GND 1_N

CLKIN_GND 1_P

CLKIN_DOT _96N

CLKIN_DOT _96P

CLKIN_SA TA_N

CLKIN_SA TA_P

REFCLK1 4IN

CLKIN_PC ILOOPBACK

XTAL25_IN

XTAL25_OU T

XCLK_RC OMP

CLKOUTFL EX0 / GPIO64

CLKOUTFL EX1 / GPIO65

CLKOUTFL EX2 / GPIO66

CLKOUTFL EX3 / GPIO67

PCH_GPI01 1

E12

PCH_SM BCLK

H14

PCH_SM BDATA

C9

DRAMRS T_CNTRL_PCH

A12

PCH_SM L0CLK

C8

PCH_SM L0DATA

G12

PCH_HOT #

C13

SML1CLK

E14

SML1DAT A

M16

M7

T11

P10

PEG_CLKR EQ#_R

M10

AB37
AB38

CLK_CPU _DMI#

AV22

CLK_CPU _DMI

AU22

AM12
AM13

CLK_BUF _CPU_DMI#

BF18

CLK_BUF _CPU_DMI

BE18

CLKIN_DM I2#

BJ30

CLKIN_DM I2

BG30

CLK_BUF _DREF_96M#

G24

CLK_BUF _DREF_96M

E24

CLK_BUF _PCIE_SATA#

AK7

CLK_BUF _PCIE_SATA

AK5

CLK_BUF _ICH_14M

K45

CLK_PCI_L PBACK

H45

XTAL25_IN

V47

XTAL25_OU T

V49

XCLK_RC OMP

Y47

27M_SSC

K43

F47

LAN_48M

H47

PCH_GPIO67

K49

BIOS Request SKU ID

2

10K_0402_5 %

10K_0402_5 %

2

+3V_PCH

2

1

1

R207 22_04 02_5%@

R207 22_04 02_5%@

1

R134

R134

R140 10K_0 402_5%

R140 10K_0 402_5%

R143

R143

10K_0402_5 %

10K_0402_5 %

R155 10K_0402_5 %

R155 10K_0402_ 5%

+3V_PCH

2

1

R157 10K_ 0402_5%

R157 10K_ 0402_5%

R159 10K_ 0402_5%

R159 10K_ 0402_5%

R160 10K _0402_5%

R160 10K _0402_5%

R162 10K_ 0402_5%

R162 10K_ 0402_5%

R163 10K _0402_5%

R163 10K _0402_5%

R164 10K _0402_5%

R164 10K _0402_5%

R166 10K_ 0402_5%

R166 10K_ 0402_5%

R167 10K_0402 _5%

R167 10K_0402 _5%

R171

R171

90.9_0402_1%

90.9_0402_1%

1

+3V_PCH

PCH_HOT # <31>

1

2

R145 10K_04 02_5%@

R145 10K_04 02_5%@

CLK_CPU _DMI# <5>
CLK_CPU _DMI <5>

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

CLK_PCI_L PBACK <17>

+1.05VS_VC CDIFFCLKN

2

2

PCH_GPIO67 <18>

2

+3V_PCH

DRAMRS T_CNTRL_PCH <6>

1

R139

R139

+3V_PCH

1K_0402_5%

1K_0402_5%

+3V_PCH

PCH_LAN _48M

2.2K_0402_5 %

2.2K_0402_5 %
1

R136

R136

1

R135

R135

2.2K_0402_5 %

2.2K_0402_5 %

2.2K_0402_5 %

2.2K_0402_5 %

1

R141

R141

1

R142

R142

2.2K_0402_5 %

2.2K_0402_5 %

2

2

2

2

XTAL25_IN

XTAL25_OU T

Q60A

Q60A
2N7002DW -T/R7_SOT363-6

2N7002DW -T/R7_SOT363-6

SMB_CLK _S3

6

2.2K_0402_5 %

2.2K_0402_5 %

1

2

+3VS

1

5

2.2K_0402_5 %

2.2K_0402_5 %

SMB_DA TA_S3

3

4

2N7002DW -T/R7_SOT363-6

2N7002DW -T/R7_SOT363-6

Q60B

Q60B

Q61A

Q61A
2N7002DW -T/R7_SOT363-6

2N7002DW -T/R7_SOT363-6

6

1

2

+3VS

5

3

2N7002DW -T/R7_SOT363-6

2N7002DW -T/R7_SOT363-6
Q61B

Q61B

C196

C196

12P_0402_5 0V8J

12P_0402_5 0V8J

1

2

R137

R137

2

R138

R138

EC_SMB _CK2

EC_SMB _DA2

4

PCH_SM L0CLK

PCH_SM L0DATA

1

2

R169 1M_040 2_5%

R169 1M_040 2_5%

3

OSC

2

NC

Y2

Y2

25MHZ_1 0PF_7V25000014

25MHZ_1 0PF_7V25000014

1

R02

2

1

SMB_CLK _S3 <11,12,25>

DIMM1
DIMM2
MINI CARD

SMB_DA TA_S3 <11,12,25>

EC_SMB _CK2 <28,31>

VGA
EC
thermal sensor

EC_SMB _DA2 <28,31>

+3V_PCH

2

2

R544

2.2K_0402_5 %

2.2K_0402_5 %

NC

OSC

R544

4

1

1

2

1

1

C197

C197

12P_0402_5 0V8J

12P_0402_5 0V8J

R545

R545

2.2K_0402_5 %

2.2K_0402_5 %

D

C

B

A

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

3

2011/06/15 2012/07 /11

2011/06/15 2012/07 /11

2011/06/15 2012 /07/11

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sh eet

Date: Sh eet

2

Date: S heet

Compal Electronics, Inc.

PCH (2/9) PCIE, SMBUS, CLK

PCH (2/9) PCIE, SMBUS, CLK

PCH (2/9) PCIE, SMBUS, CLK

LA-7987P

LA-7987P

LA-7987P

1

14 50Tuesday, October 30, 2012

14 50Tuesday, October 30, 2012

14 50Tuesday, October 30, 2012

of

of

of

A

1.0

1.0

1.0

5

4

3

2

1

D

VGATE<43>

PCH_PW ROK

C

AEPWROK can be c onnect to
PWROK if iAMT di sable

PCH_POK

+3VS

@

+3V_PCH

B

@

2

R556 200_0402 _5%

R556 200_0402 _5%

2

R192 300K_0402 _5%

R192 300K_0402 _5%

2

R194 1 0K_0402_5%

R194 1 0K_0402_5%

1

R195 200K_0402_ 5%

R195 200K_0402_ 5%

2

R197 10K_0402 _5%

R197 10K_0402 _5%

R191

R191

1

0_0402_5%

0_0402_5%

1

1

1

2

1

2

U15

U15
MC74VH C1G08DFT2G SC70 5P

MC74VH C1G08DFT2G SC70 5P

3

1

G

A

Y

2

B

P

5

+3VS

APWR OK

PM_DRA M_PWRGD

SUSW ARN#

AC_PRES ENT_R

PCH_RSM RST#_R

SYS_PWR OK

4

1

R180

R180
100K_0402_ 1%

100K_0402_ 1%

2

SYS_PWR OK <5>

@

@

SUSACK# is only used on platfor m
that support the Deep Sx state.

PCH_PW ROK<31>

PCH_APW ROK<31>

PM_DRA M_PWRGD<5>

EC_RSM RST#<31>

PBTN_OUT #<31>

ACIN<31,38>

DMI_CTX_ PRX_N0< 4>

DMI_CTX_ PRX_N1<4 >

DMI_CTX_ PRX_N2<4 >

DMI_CTX_ PRX_N3<4 >

DMI_CTX_ PRX_P0<4>

DMI_CTX_ PRX_P1<4>
DMI_CTX_ PRX_P2<4>
DMI_CTX_ PRX_P3<4>

DMI_CRX _PTX_N0<4>

DMI_CRX _PTX_N1<4>

DMI_CRX _PTX_N2<4>

DMI_CRX _PTX_N3<4>

DMI_CRX _PTX_P0<4>
DMI_CRX _PTX_P1<4>

DMI_CRX _PTX_P2<4>
DMI_CRX _PTX_P3<4>

+1.05VS

1

R177 49.9_0402_1 %

R177 49.9_0402_1 %

1

R178 750_0402_1 %

R178 750_0402_1 %

4mil width and place
within 500mil of the PCH

T72

T72

+3VS

PCH_PW ROK

D29

D29

CH751H-40 PT_SOD323-2

CH751H-40 PT_SOD323-2

+3V_PCH

2

1

R190 0_0402_5%

R190 0_0402_5%

1

1

R193 0_0402_5%

R193 0_0402_5%

1

R198 0_0402_5%

R198 0_0402_5%

2

1

2

2

2

2

R18410K_0402_5%

R18410K_0402_5%

2

@

@

R3020 _0402_5%

R3020 _0402_5%

2

2

R200

R200
10K_0402_5 %

10K_0402_5 %

R201

R201

10K_0402_5 %

10K_0402_5 %

DMI_CTX_ PRX_N0

DMI_CTX_ PRX_N1

DMI_CTX_ PRX_N2

DMI_CTX_ PRX_N3

DMI_CTX_ PRX_P0

DMI_CTX_ PRX_P1

DMI_CTX_ PRX_P2

DMI_CTX_ PRX_P3

DMI_CRX _PTX_N0

DMI_CRX _PTX_N1

DMI_CRX _PTX_N2

DMI_CRX _PTX_N3

DMI_CRX _PTX_P0

DMI_CRX _PTX_P1

DMI_CRX _PTX_P2

DMI_CRX _PTX_P3

DMI_IRCOM P

RBIAS_CP Y

SUSACK #

SYS_RST#

1

SYS_PWR OK

PCH_POK

APWR OK

2

PM_DRA M_PWRGD

PCH_RSM RST#_R

SUSW ARN#

PBTN_OUT #_R

AC_PRES ENT_R

PCH_GPIO72

1

RI#

1

U4C

U4C

BC24

DMI0RXN

BE20

DMI1RXN

BG18

DMI2RXN

BG20

DMI3RXN

BE24

DMI0RXP

BC20

DMI1RXP

BJ18

DMI2RXP

BJ20

DMI3RXP

AW24

DMI0TXN

AW20

DMI1TXN

BB18

DMI2TXN

AV18

DMI3TXN

AY24

DMI0TXP

AY20

DMI1TXP

AY18

DMI2TXP

AU18

DMI3TXP

BJ24

DMI_ZCOM P

BG25

DMI_IRCOM P

BH21

DMI2RBIAS

C12

SUSACK #

K3

SYS_RESET #

P12

SYS_PWR OK

L22

PWROK

L10

APWR OK

B13

DRAMPW ROK

C21

RSMRST #

K16

SUSW ARN#/SUSPW RDNACK/GPIO30

E20

PWRB TN#

H20

ACPRES ENT / GPIO31

E10

BATLOW # / GPIO72

A10

RI#

PANTHE R-POINT_FCBGA98 9

PANTHE R-POINT_FCBGA98 9

FDI_RXN0
FDI_RXN1

FDI_RXN2
FDI_RXN3

FDI_RXN4
FDI_RXN5
FDI_RXN6

FDI_RXN7

FDI_RXP0

FDI_RXP1
FDI_RXP2

FDI_RXP3
FDI_RXP4
FDI_RXP5

DMI

DMI

System Power Management

System Power Management

FDI_RXP6

FDI

FDI

FDI_RXP7

FDI_INT

FDI_FSYNC0

FDI_FSYNC1

FDI_LSYNC0

FDI_LSYNC1

DSWV RMEN

DPWR OK

WAKE#

CLKRUN # / GPIO32

SUS_STA T# / GPIO61

SUSCLK / GP IO62

SLP_S5# / GPIO6 3

SLP_S4#

SLP_S3#

SLP_A#

SLP_SUS #

PMSYNCH

SLP_LAN# / GPIO29

AY14

BE14
BH13

BC12
BJ12
BG10

BG9

BG14

BB14
BF14

BG13
BE12
BG12

BJ10
BH9

AW16

AV12

BC10

AV14

BB10

A18

E22

B9

N3

G8

N14

D10

H4

F4

G10

G16

AP14

K14

FDI_CTX_P RX_N1

FDI_CTX_P RX_N2
FDI_CTX_P RX_N3

FDI_CTX_P RX_N4
FDI_CTX_P RX_N5
FDI_CTX_P RX_N6

FDI_CTX_P RX_N7

FDI_CTX_P RX_P0

FDI_CTX_P RX_P1
FDI_CTX_P RX_P2

FDI_CTX_P RX_P3
FDI_CTX_P RX_P4

FDI_CTX_P RX_P5

FDI_CTX_P RX_P6

FDI_CTX_P RX_P7

FDI_INT

FDI_FSYNC0

FDI_FSYNC1

FDI_LSYNC0

FDI_LSYNC1

DSWOD VREN

PCH_DPW ROK

WAKE#

PM_CLKR UN#

SUS_STA T#

SLP_A#

PM_SLP_ SUS#

H_PM_SYNC

PCH_GPIO29

FDI_CTX_P RX_N0

BJ14

1

2

R185 0_0402_5 %

R185 0_0402_5 %

1

2

R186

R186

1

2

R261

@

R261

@

10K_0402_5 %

10K_0402_5 %

FDI_CTX_P RX_N0 <4>
FDI_CTX_P RX_N1 <4>

FDI_CTX_P RX_N2 <4>
FDI_CTX_P RX_N3 <4>
FDI_CTX_P RX_N4 <4>

FDI_CTX_P RX_N5 <4>
FDI_CTX_P RX_N6 <4>

FDI_CTX_P RX_N7 <4>

FDI_CTX_P RX_P0 <4>
FDI_CTX_P RX_P1 <4>

FDI_CTX_P RX_P2 <4>
FDI_CTX_P RX_P3 <4>

FDI_CTX_P RX_P4 <4>
FDI_CTX_P RX_P5 <4>

FDI_CTX_P RX_P6 <4>
FDI_CTX_P RX_P7 <4>

FDI_INT <4>

FDI_FSYNC0 <4>

FDI_FSYNC1 <4>

FDI_LSYNC0 <4>

FDI_LSYNC1 <4>

R181

R181
0_0402_5%

0_0402_5%

10K_0402_5 %

10K_0402_5 %

T74

T74

T99

T99

T71

T71

H_PM_SYNC <5>

+3V_PCH

PCH_RSM RST#_R

1

2

PCIE_W AKE# <25 ,26,34>

+3V_PCH

SUSCLK <31>

PM_SLP_ S5# <31>

PM_SLP_ S4# <31>

PM_SLP_ S3# <31>

*

DSWODVREN - On D ie DSW VR Enabl e
H

：

Enable

L

：

Disable

+3VS

R189 8.2K_0402 _5%@

R189 8.2K_0402 _5%@

1

2

R299 10K_0402 _5%

R299 10K_0402 _5%

1

2

Can be left NC
when IAMT is not
support on the
platfrom

Can be left NC i f no use
integrated LAN.

+RTCVCC

1

2

R179

R179
330K_0402_ 5%

330K_0402_ 5%

1

R183

R183

330K_0402_ 5%

330K_0402_ 5%

@

@

2

D

C

B

A

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

3

2011/06/15 201 2/07/11

2011/06/15 201 2/07/11

2011/06/15 20 12/07/11

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: S heet

Date: S heet

2

Date: S heet

Compal Electronics, Inc.

Title

Title

Title

PCH (3/9) DMI,FDI,PM,

PCH (3/9) DMI,FDI,PM,

PCH (3/9) DMI,FDI,PM,

LA-7987P

LA-7987P

LA-7987P

of

15 50Tuesday, October 30, 2012

of

15 50Tuesday, October 30, 2012

of

1

15 50Tuesday, October 30, 2012

A

1.0

1.0

1.0

5

+3VS

1

2

1

R234

R234

2.2K_0402_5%

2.2K_0402_5%

2

EDID_CLK
EDID_DATA

DAC_BLU<23>

DAC_GRN<23>

DAC_RED<23>

+3VS

D

C

B

R559

R559

2.2K_0402_5%

2.2K_0402_5%

2.2K_0402_5%

2.2K_0402_5%

+3VS

1

2

R523

R523

1

R524

R524

2.2K_0402_5%

2.2K_0402_5%

2

CRT_DDC_CLK
CRT_DDC_DAT A

4

PCH_ENBKL<22>

PCH_ENVDD<22>

PCH_PWM<22>

EDID_CLK<22>

EDID_DATA<22>

1

2

R2042.2K_0402_5%

R2042.2K_0402_5%

1

2

R2052.2K_0402_5%

R2052.2K_0402_5%

1

2

R2062.37K_0402 _1%

R2062.37K_0402_ 1%

LVDS_ACLK#<22>

LVDS_ACLK<22>

LVDS_A0#<22>

LVDS_A1#<22>
LVDS_A2#<22>

LVDS_A0<22>

LVDS_A1<22>
LVDS_A2<22>

DAC_BLU

1

2

R208 150_0402_1%

R208 150_0402_1%

2

R209 150_0402_1%

R209 150_0402_1%

2

R210 150_0402_1%

R210 150_0402_1%

CRT_DDC_CLK<23>

CRT_DDC_DAT A<23>

CRT_HSYNC<23>
CRT_VSYNC<23>

1

1

DAC_GRN

DAC_RED

1K_0402_1%

1K_0402_1%

EDID_CLK
EDID_DATA

CTRL_CLK

CTRL_DATA

LVDS_IBG

LVD_VREF

CRT_DDC_CLK
CRT_DDC_DAT A

CRT_IREF

1

R211

R211

2

U4D

U4D

J47

L_BKLTEN

M45

L_VDD_EN

P45

L_BKLTCTL

T40

L_DDC_CLK

K47

L_DDC_DATA

T45

L_CTRL_CLK

P39

L_CTRL_DATA

AF37

LVD_IBG

AF36

LVD_VBG

AE48

LVD_VREFH

AE47

LVD_VREFL

AK39

LVDSA_CLK#

AK40

LVDSA_CLK

AN48

LVDSA_DATA#0

AM47

LVDSA_DATA#1

AK47

LVDSA_DATA#2

AJ48

LVDSA_DATA#3

AN47

LVDSA_DATA0

AM49

LVDSA_DATA1

AK49

LVDSA_DATA2

AJ47

LVDSA_DATA3

AF40

LVDSB_CLK#

AF39

LVDSB_CLK

AH45

LVDSB_DATA#0

AH47

LVDSB_DATA#1

AF49

LVDSB_DATA#2

AF45

LVDSB_DATA#3

AH43

LVDSB_DATA0

AH49

LVDSB_DATA1

AF47

LVDSB_DATA2

AF43

LVDSB_DATA3

N48

CRT_BLUE

P49

CRT_GREEN

T49

CRT_RED

T39

CRT_DDC_CL K

M40

CRT_DDC_DAT A

M47

CRT_HSYNC

M49

CRT_VSYNC

T43

DAC_IREF

T42

CRT_IRTN

PANTHER-POINT_FCBGA989

PANTHER-POINT_FCBGA989

3

DDPB_0P

DDPB_1P

DDPB_2P

DDPB_3P

DDPC_0P

DDPC_1P

DDPC_2P

DDPC_3P

DDPD_0P

DDPD_1P

AP43
AP45

AM42

AM40

AP39

AP40

P38

M39

AT49

AT47

AT40

AV42

AV40

AV45

AV46

AU48

AU47

AV47

AV49

P46

P42

AP47

AP49

AT38

AY47

AY49

AY43

AY45

BA47

BA48

BB47

BB49

M43
M36

AT45

AT43

BH41

BB43

BB45

BF44

BE44

BF42

BE42

BJ42

BG42

SDVO_TVCLKINN
SDVO_TVCLKINP

SDVO_STALLN

SDVO_STALLP

SDVO_INTN

SDVO_INTP

SDVO_CTRLCLK

SDVO_CTRLDATA

DDPB_AUXN

DDPB_AUXP

DDPB_HPD

DDPB_0N

LVDS

LVDS

Digital Display Interface

Digital Display Interface

CRT

CRT

DDPB_1N

DDPB_2N

DDPB_3N

DDPC_CTRLCLK

DDPC_CTRLDAT A

DDPC_AUXN

DDPC_AUXP

DDPC_HPD

DDPC_0N

DDPC_1N

DDPC_2N

DDPC_3N

DDPD_CTRLCLK

DDPD_CTRLDAT A

DDPD_AUXN

DDPD_AUXP

DDPD_HPD

DDPD_0N

DDPD_1N

DDPD_2N

DDPD_2P

DDPD_3N

DDPD_3P

R202

HDMI@

R202

HDMI@

2.2K_0402_5%

2.2K_0402_5%

HDMICLK_NB
HDMIDAT_NB

TMDS_B_DATA2#_PCH

TMDS_B_DATA2_PCH
TMDS_B_DATA1#_PCH

TMDS_B_DATA1_PCH

TMDS_B_DATA0#_PCH

TMDS_B_DATA0_PCH

TMDS_B_CLK#_PCH

TMDS_B_CLK_PCH

2

+3VS

1

1

R203

HDMI@

R203

HDMI@

2.2K_0402_5%

2.2K_0402_5%

2

2

HDMICLK_NB < 24>
HDMIDAT_NB <24>

TMDS_B_HPD# <24>

1

C200 0.1U_0402_10V6KHDMI@

C200 0.1U_0402_10V6KHDMI@

1

C201 0.1U_0402_10V6KHDMI@

C201 0.1U_0402_10V6KHDMI@

1

C202 0.1U_0402_10V6KHDMI@

C202 0.1U_0402_10V6KHDMI@

1

C203 0.1U_0402_10V6KHDMI@

C203 0.1U_0402_10V6KHDMI@

1

C204 0.1U_0402_10V6KHDMI@

C204 0.1U_0402_10V6KHDMI@

1

C205 0.1U_0402_10V6KHDMI@

C205 0.1U_0402_10V6KHDMI@

1

C206 0.1U_0402_10V6KHDMI@

C206 0.1U_0402_10V6KHDMI@

1

C207 0.1U_0402_10V6KHDMI@

C207 0.1U_0402_10V6KHDMI@

CAP move on Conn, side

1

D

2

2

2

2

2

2

2

2

HDMI_TX2-_CK <24>

HDMI_TX2+_CK <24>
HDMI_TX1-_CK <24>

HDMI_TX1+_CK <24>
HDMI_TX0-_CK <24>
HDMI_TX0+_CK <24>

HDMI_CLK-_CK <2 4>
HDMI_CLK+_CK <24>

HDMI

HDMI D2

HDMI D1

HDMI D0

HDMI CLK

C

B

A

Security Classification

Security Classification

Security Classification

2011/06/15 2012/07/11

2011/06/15 2012/07/11

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2011/06/15 2012/07/11

3

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Title

Title

Title

PCH (4/9) LVDS,CRT,DP,HDMI

PCH (4/9) LVDS,CRT,DP,HDMI

PCH (4/9) LVDS,CRT,DP,HDMI

Size Doc ument Number Rev

Size Doc ument Number Rev

Size Doc ument Number Rev

B

B

B

LA-7987P

LA-7987P

LA-7987P

Date: Sheet

Date: Sheet

2

Date: Sheet

1

of

16 50Tuesday, October 30, 2012

of

16 50Tuesday, October 30, 2012

of

16 50Tuesday, October 30, 2012

A

1.0

1.0

1.0

5

+3VS

RP2

RP2

8

7

6

5

8.2K_0804_8P4R_5%

8.2K_0804_8P4R_5%

RP1

D

C

GNT1#/
GPIO51

PCH_WL_OFF#

B

A16 swap overide Strap/Top-Block
Swap Override jumper

RP1

8

7

6
5

8.2K_0804_8P4R_5%

8.2K_0804_8P4R_5%

1

R213 8.2K_0402_5%

R213 8.2K_0402_5%

1

R225 8.2K_0402_5%

R225 8.2K_0402_5%

1

R292 8.2K_0402_5%@

R292 8.2K_0402_5%@

1

R557 8.2K_0402_5%@

R557 8.2K_0402_5%@

1

R259 8.2K_0402_5%

R259 8.2K_0402_5%

1

R212 8.2K_0402_5%

R212 8.2K_0402_5%

1

R214 8.2K_0402_5%@

R214 8.2K_0402_5%@

Boot BIOS Strap bit1 BBS1

PCI_GNT3#

A

PLT_RST#<25,26,31,34>

PCI_PIRQA#

1

PCI_PIRQD#

2

PCI_PIRQC#

3

PCI_PIRQB#

4

PCH_GPIO2

1

DGPU_PWR_EN_R

2

PCH_GPIO4

3

ODD_DA#_R

4

2

2

2

2

2

2

2

Bit11

Bit10

0 1

0

1

1

1

0

0

1

R215 1K_0402_5%@

R215 1K_0402_5%@

Low=A16 swap
override/Top-Block
Swap Override enabled
High=Default

C208

C208

1U_0402_6.3V4Z

1U_0402_6.3V4Z

5

PCH_GPIO5

PCH_WL_OFF#

PCH_GPIO51

PCH_GPIO53

DGPU_PWR_EN1

DGPU_HOLD_RST#_R

DGPU_HOLD_RST#_R

Boot BIOS
Destination

Reserved

Reserved

SPI

*

(Default)

LPC

GPIO55

2

*

1

@

@

2

PPT EDS DOC#474146

PCH_WL_OFF#<25>

ODD_DA#<29,31>

CLK_PCI_LPBACK<14>

CLK_PCI_EC<31>

CLK_PCI_DB<25>

1

2

R222

R222

0_0402_5%

0_0402_5%

3

1

G

A

4

Y

2

B

1

2

R223

R223

100K_0402_5%

100K_0402_5%

P

U7

@

U7

@

5

MC74VHC1G08DFT2G SC70 5P

MC74VHC1G08DFT2G SC70 5P

+3VS

4

USB3_RX1_N<34>
USB3_RX2_N<34>

USB3_RX1_P<34>
USB3_RX2_P<34>

USB3_TX1_N<34>
USB3_TX2_N<34>

USB3_TX1_P<34>

USB3_TX2_P<34>

PCH_PLTRST#

4

3

U4E

U4E

BG26

TP1

BJ26

TP2

BH25

TP3

BJ16

TP4

BG16

TP5

AH38

TP6

AH37

TP7

AK43

TP8

AK45

TP9

C18

TP10

N30

TP11

H3

TP12

AH12

TP13

AM4

TP14

AM5

TP15

Y13

TP16

K24

TP17

L24

TP18

AB46

TP19

AB45

TP20

B21

TP21

M20

TP22

AY16

TP23

BG46

TP24

USB3_RX1_N

USB3_RX2_N

T1829

T1829

T1825

T1825

T1832

T1832

T1826

T1826

T1831

T1831

T1827

T1827

T1830

T1830

T1828

T1828

1

R715 0_0402_5%@

R715 0_0402_5%@

2

PCI_PME#<31>

PCH_PLTRST#<5>

1

2

R21922_0402_5%

1

2

Security Classification

Security Classification

Security Classification

R21922_0402_5%

2

1

R17322_0402_5% @

R17322_0402_5% @

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

USB3_RX3_N

USB3_RX4_N

USB3_RX1_P

USB3_RX2_P

USB3_RX3_P

USB3_RX4_P

USB3_TX1_N

USB3_TX2_N

USB3_TX3_N

USB3_TX4_N

USB3_TX1_P

USB3_TX2_P

USB3_TX3_P

USB3_TX4_P

PCI_PIRQA#

PCI_PIRQB#

PCI_PIRQC#
PCI_PIRQD#

DGPU_HOLD_RST#_R

DGPU_PWR_EN1

DGPU_PWR_EN_R

PCH_GPIO51

PCH_GPIO53

PCH_WL_OFF#

PCH_GPIO2

ODD_DA#_R

PCH_GPIO4

PCH_GPIO5

PCH_PLTRST#

CLK_PCI_LPBACK_R
CLK_PCI_EC_R

CLK_PCI_DB_R

R22022_0402_5%

R22022_0402_5%

BE28

USB3Rn1

BC30

USB3Rn2

BE32

USB3Rn3

BJ32

USB3Rn4

BC28

USB3Rp1

BE30

USB3Rp2

BF32

USB3Rp3

BG32

USB3Rp4

AV26

USB3Tn1

BB26

USB3Tn2

AU28

USB3Tn3

AY30

USB3Tn4

AU26

USB3Tp1

AY26

USB3Tp2

AV28

USB3Tp3

AW30

USB3Tp4

K40

PIRQA#

K38

PIRQB#

H38

PIRQC#

G38

PIRQD#

C46

REQ1# / GPIO50

C44

REQ2# / GPIO52

E40

REQ3# / GPIO54

D47

GNT1# / GPIO51

E42

GNT2# / GPIO53

F46

GNT3# / GPIO55

G42

PIRQE# / GPIO2

G40

PIRQF# / GPIO3

C42

PIRQG# / GPIO4

D44

PIRQH# / GPIO5

K10

PME#

C6

PLTRST#

H49

CLKOUT_PCI0

H43

CLKOUT_PCI1

J48

CLKOUT_PCI2

K42

CLKOUT_PCI3

H40

CLKOUT_PCI4

PANTHER-POINT_FCBGA989

PANTHER-POINT_FCBGA989

2011/06/15 2012/07/11

2011/06/15 2012/07/11

2011/06/15 2012/07/11

3

RSVD

RSVD

PCI

PCI

USB

USB

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

USBRBIAS#

OC0# / GPIO59
OC1# / GPIO40
OC2# / GPIO41

OC3# / GPIO42
OC4# / GPIO43

OC5# / GPIO9

OC6# / GPIO10

OC7# / GPIO14

RSVD1
RSVD2
RSVD3

RSVD4

RSVD5

RSVD6

RSVD7

RSVD8

RSVD9
RSVD10
RSVD11

RSVD12
RSVD13

RSVD14
RSVD15
RSVD16

RSVD17
RSVD18

RSVD19
RSVD20

RSVD21
RSVD22

RSVD23

RSVD24

RSVD25

RSVD26
RSVD27

RSVD28
RSVD29

USBP0N

USBP0P

USBP1N

USBP1P

USBP2N

USBP2P

USBP3N

USBP3P

USBP4N

USBP4P
USBP5N

USBP5P
USBP6N

USBP6P
USBP7N

USBP7P
USBP8N
USBP8P

USBP9N
USBP9P

USBP10N
USBP10P

USBP11N
USBP11P
USBP12N

USBP12P
USBP13N

USBP13P

USBRBIAS

AY7
AV7
AU3

BG4

AT10

BC8

AU2

AT4

AT3
AT1
AY3

AT5
AV3

AV1
BB1
BA3

BB5
BB3

BB7
BE8

BD4
BF6

AV5

AV10

AT8

AY5
BA2

AT12
BF3

C24

A24
C25

B25
C26
A26

K28
H28

E28
D28
C28

A28
C29

B29
N28

M28
L30
K30

G30
E30

C30
A30

L32
K32

G32

E32
C32

A32

C33

B33

A14
K20
B17

C16
L16

A16
D14

C14

USB20_N0
USB20_P0

USB20_N1

USB20_P1

USB20_N2

USB20_P2

USB20_N3
USB20_P3

USB20_N8
USB20_P8

USB20_N9

USB20_P9

USB20_N11

USB20_P11

USBRBIAS

USB_OC0#

USB_OC1#

USB_OC2#

USB_OC3#

USB_OC1#
USB_OC5#

SMIB

USB_OC7#

2

Within 500 mils

2

1

USB DEBUG=PORT1 AND PORT9

USB20_N0 <34>

USB20_P0 <34>

USB20_N1 <34>

USB20_P1 <34>

USB20_N2 <32>
USB20_P2 <32>

USB20_N3 <22>
USB20_P3 <22>

USB20_N8 <29>

USB20_P8 <29>

USB20_N9 <33>
USB20_P9 <33>

USB20_N10 <25>

USB20_P10 <25>

USB20_N11 <32>

USB20_P11 <32>

1

R218

R218

22.6_0402_1%

22.6_0402_1%

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

LEFT USB

LEFT USB

(USB 3.0)

(CR-B/D USB)

USB Camera

Bluetooth

RIGHT USB

WLAN

CARD READER

2

USB_OC0# Share with USB_OC4#
d

ue to same power switch

USB_OC0# <45>

USB_OC1# <44>

USB_OC1# <44>

SMIB <45>

PCH (5/9) PCI, USB

PCH (5/9) PCI, USB

PCH (5/9) PCI, USB

LA-7987P

LA-7987P

LA-7987P

R03

USB_OC5#

USB_OC2#

USB_OC7#

USB_OC0#

USB_OC1#
USB_OC3#

SMIB

1

RP310K_1206_8P4R_5%

RP310K_1206_8P4R_5%

4
3

2

1

4

3

2

1

RP410K_1206_8P4R_5%

RP410K_1206_8P4R_5%

1

R262

R262

10K_0402_5%

10K_0402_5%

of

17 50Tuesday, October 30, 2012

of

17 50Tuesday, October 30, 2012

of

17 50Tuesday, October 30, 2012

2

+3V_PCH

5

6

7

8

5

6

7

8

D

C

B

A

1.0

1.0

1.0

5

D

+3V_PCH

GPIO28

On-Die PLL Voltage Regulator

This signal has a weak internal pull up

*

*

PCH_GPIO27 (Have internal Pull-High)
High: VCCVRM VR Enable
Low: VCCVRM VR Disable

C

B

Weak internal pull-high

2

R250

R250
10K_0402_5 %

10K_0402_5 %

R547

R547
10K_0402_5 %

10K_0402_5 %

EC_SMI#

@

@

1

2

R235 10K _0402_5%

R235 10K _0402_5%

：

On-Die voltage regulator enable

H
L

：

On-Die PLL Voltage Regulator disable

1

R240 1K_0402_5%@

R240 1K_0402_5%@

1

@

@

2

PCH_GPIO37

R245 10K_0402_5 %@

R245 10K_0402_5 %@

+3VS

1

R244

R244

10K_0402_5 %

10K_0402_5 %

2

1

R881

R881
10K_0402_5 %

10K_0402_5 %

2

PCH_GPIO28

PCH_GPIO27

+3VS

1

2

1

2

BIOS Request SKU ID

+3VS

1

2

R246

R246

R711

R711

R708

R708

@

A

@

2

1

2

1

10K_0402_5%

10K_0402_5%

10K_0402_5%

10K_0402_5%

PCH_GPIO38

PCH_GPIO67

1

R298

R298
@

@

10K_0402_5%

10K_0402_5%

PCH_GPIO38 PCH_GPIO67

2

10K_0402_5%

10K_0402_5%

0

0 1

1

1 1

5

PCH_GPIO36

PCH_GPIO67 <1 4>

0

0

EC_LID_OU T#< 31>

BT_DISAB LE<2 5>

R02

Function

Optimus

Reserved

DIS

UMA

+3VS

+3VS

+3V_PCH

PCH_BT_ ON#<25,29 >

+3V_PCH

+3VS

+3VS

+3VS

+3V_PCH

+3VS

R247 10K_0402_5 %

R247 10K_0402_5 %

+3VS

R248 10K_04 02_5%

R248 10K_04 02_5%

R249 10K_0402_ 5%

+3VS

R249 10K_0402_ 5%

R251 10K_0402_5 %

R251 10K_0402_5 %

4

1

R233 10K _0402_5%

R233 10K _0402_5%

1

R227 10 K_0402_5%

R227 10 K_0402_5%

1

R228 10K _0402_5%

R228 10K _0402_5%

1

R229 10K _0402_5%@

R229 10K _0402_5%@

R02

1

R230 1K_0402_5%

R230 1K_0402_5%

1

R231 10 K_0402_5%

R231 10 K_0402_5%

1

R232 10K _0402_1%@

R232 10K _0402_1%@

1

R238 10 K_0402_5%

R238 10 K_0402_5%

R241

R241

1

1

R242 10K _0402_5%

R242 10K _0402_5%

1

R243 10 K_0402_5%

R243 10 K_0402_5%

1

1

1

1

4

3

PCH_GPIO69

0
1

U4F

2

2

2

EC_SCI#<31>

EC_SMI#<31>

2

2

2

2

2

ODD_EN<29>

2

10K_0402_5 %

10K_0402_5 %

2

2

2

2

2

2

PCH_GPIO1

PCH_GPIO6

EC_SCI#

EC_SMI#

PCH_GPIO12

EC_LID_OU T#

PCH_GPIO16

DGPU_PW ROK_R

BT_DISAB LE

ODD_EN

PCH_GPIO27

PCH_GPIO28

PCH_BT_ ON#

PCH_GPIO35

PCH_GPIO36

PCH_GPIO37

PCH_GPIO38

PCH_GPIO39

PCH_GPIO48

PCH_GPIO49

PCH_GPIO57

U4F

T7

BMBUSY# / GPIO0

A42

TACH1 / GPIO1

H36

TACH2 / GPIO6

E38

TACH3 / GPIO7

C10

GPIO8

C4

LAN_PHY_PW R_CTRL / GPIO12

G2

GPIO15

U2

SATA4GP / GPIO16

D40

TACH0 / GPIO17

T5

SCLOCK / GPIO22

E8

GPIO24

E16

GPIO27

P8

GPIO28

K1

STP_PCI# / GPIO34

K4

GPIO35

V8

SATA2GP / GPIO36

M5

SATA3GP / GPIO37

N2

SLOAD / GPIO38

M3

SDATAOUT0 / GP IO39

V13

SDATAOUT1 / GP IO48

V3

SATA5GP / GPIO49 / TEMP_ALERT#

D6

GPIO57

A4

VSS_NCTF_1

A44

VSS_NCTF_2

A45

VSS_NCTF_3

A46

VSS_NCTF_4

A5

VSS_NCTF_5

A6

VSS_NCTF_6

B3

VSS_NCTF_7

B47

VSS_NCTF_8

BD1

VSS_NCTF_9

BD49

VSS_NCTF_10

BE1

VSS_NCTF_11

BE49

VSS_NCTF_12

BF1

VSS_NCTF_13

BF49

VSS_NCTF_14

PANTHE R-POINT_FCBGA98 9

PANTHE R-POINT_FCBGA98 9

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

3

Function

R702

PCH_GPIO69

PCH_GPIO68

C40

PCH_GPIO69

B41

PCH_GPIO70

C41

PCH_GPIO71

A40

P4

PCH_PEC I_R

AU16

KBRST#

P5

AY11

PCH_THR MTRIP#_R

AY10

T14

AY1

AH8

AK11

AH10

AK10

P37

BG2

BG48

BH3

BH47

BJ4

BJ44

BJ45

BJ46

BJ5

BJ6

C2

C48

D1

D49

E1

E49

F1

F49

Deciphered Date

Deciphered Date

Deciphered Date

R702

R707

@

R707

@

INIT3_3V

This signal has weak internal P U,can't pull lo w

NV_CLE

HM76 by PCH
HM70 by PCH

TACH4 / GPIO68

TACH5 / GPIO69

TACH6 / GPIO70

TACH7 / GPIO71

A20GATE

PECI

RCIN#

PROCPW RGD

GPIO

GPIO

THRMTRIP#

INIT3_3V#

DF_TVS

CPU/MISC

CPU/MISC

TS_VSS1

TS_VSS2

TS_VSS3

TS_VSS4

NC_1

VSS_NCTF_15

VSS_NCTF_16

VSS_NCTF_17

VSS_NCTF_18

VSS_NCTF_19

VSS_NCTF_20

VSS_NCTF_21

VSS_NCTF_22

VSS_NCTF_23

NCTF

NCTF

VSS_NCTF_24

VSS_NCTF_25

VSS_NCTF_26

VSS_NCTF_27

VSS_NCTF_28

VSS_NCTF_29

VSS_NCTF_30

VSS_NCTF_31

VSS_NCTF_32

Compal Secret Data

Compal Secret Data

2011/06/15 2012/07/11

2011/06/15 2012/07/11

2011/06/15 2012/07/11

Compal Secret Data

+3VS

2

1

PCH_GPIO70

10K_0402_5%

10K_0402_5%

2

1

10K_0402_5%

10K_0402_5%

1

1

R239 390_0 402_5%

R239 390_0 402_5%

2

+3VS

R703

@

R703

@

R02 R02

R705

R705

200K_0402_ 5%

200K_0402_ 5%

1

2

@

@

R2370_ 0402_5%

R2370_ 0402_5%

2

Reserved for BIOS Request

PCH_GPIO70

2

0 14/15"

10K_0402_5%

10K_0402_5%

PCH_GPIO71

1

0

1

2

1

1

+3VS

2

R22410K_0402_5%

R22410K_0402_5%

+3VS

2

R236

R236

10K_0402_5 %

10K_0402_5 %

1

H_PECI <5,3 1>

KBRST# <31>

H_CPUPW RGD <5>

H_THRM TRIP#

Function

17"

USB3.0 by PCH
USB3.0 by NEC

GATEA20 <31>

KBRST#

H_THRM TRIP# <5>

DMI Termination Voltage

NV_CLE

2

Set to Vcc when HIGH

Set to Vss when LOW

Weak internal
PU,Do not pull low

2

Title

Title

Title

PCH (6/9) GPIO, CPU, MISC

PCH (6/9) GPIO, CPU, MISC

PCH (6/9) GPIO, CPU, MISC

Size Document Nu mber Rev

Size Document Nu mber Rev

Size Document N umber Rev

Custom

Custom

Custom

LA-7987P

LA-7987P

LA-7987P

Date: Sheet

Date: Sheet

Date: Sheet

1

R217 1K_04 02_5%

R217 1K_04 02_5%

CLOSE TO THE BRA NCHING POINT

1

1

R226 10K_040 2_5%

R226 10K_040 2_5%

+1.8VS

1

R216

R216

2.2K_0402_5 %

2.2K_0402_5 %

2

1

+3VS

R704

@

R704

@

PCH_GPIO71

R706

R706

200K_0402_ 5%

200K_0402_ 5%

2

H_SNB_IV B# <5>

18 50Tuesday, October 30, 2012

18 50Tuesday, October 30, 2012

18 50Tuesday, October 30, 2012

2

1

10K_0402_5%

10K_0402_5%

2

+3VS

D

C

B

A

1.0

1.0

1.0

1

of

of

of

Compal Electronics, Inc.

5

+1.05VS

J2

@

J2

@

2

PAD-OPEN 4x4m

PAD-OPEN 4x4m

D

+1.05VS

R254 0_0603_5%

R254 0_0603_5%

This pin can be left as no connect in
On-Die VR enabled mode (default).

+1.05VS

+3VS

R260

R260

10U

10U_0603_6.3V6M

10U_0603_6.3V6M

1

2

2

0_0603_5%

0_0603_5%

C

This pin can be left as no connect in
On-Die VR enabled mode (default).

B

1

1

2

2

C221

C221

+1.05VS

+1.05VS_VC CCORE

1U_0402_6.3V6K

1U_0402_6.3V6K

C209

10U_0603_6.3V6M

C209

10U_0603_6.3V6M

1

2

1

+1.05VS_VC C_EXP

C222

1U_0402_6.3V6K

C222

1U_0402_6.3V6K

1

1

2

2

1

1

2

C210

C210

C211

1U_0402_6.3V6K

C211

1U_0402_6.3V6K

1

2

+VCCAPL LEXP

T47

T47

C223

1U_0402_6.3V6K

C223

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1

2

C227

C227

0.1U_0402_1 0V7K

0.1U_0402_1 0V7K

T50

T50

R263

R263

1

2

0_0603_5%

0_0603_5%

C212

1U_0402_6.3V6K

C212

1U_0402_6.3V6K

1

2

+1.05VS_VC CDPLLEXP

C225

1U_0402_6.3V6K

C225

1U_0402_6.3V6K

C224

C224

1

2

+3VS_VCC A3GBG

+VCCAFD I_VRM

+1.05VS_VC CAPLL_FDI

+1.05VS_VC CDPLL_FDI

+VCCP_V CCDMI

4

U4G

U4G

1300mA

AA23

VCCCORE [1]

AC23

VCCCORE [2]

AD21

VCCCORE [3]

AD23

VCCCORE [4]

AF21

VCCCORE [5]

AF23

VCCCORE [6]

AG21

VCCCORE [7]

AG23

VCCCORE [8]

AG24

VCCCORE [9]

AG26

VCCCORE [10]

AG27

VCCCORE [11]

AG29

VCCCORE [12]

AJ23

VCCCORE [13]

AJ26

VCCCORE [14]

AJ27

VCCCORE [15]

AJ29

VCCCORE [16]

AJ31

VCCCORE [17]

AN19

VCCIO[28]

BJ22

VCCAPLL EXP

AN16

VCCIO[15]

AN17

VCCIO[16]

AN21

VCCIO[17]

AN26

VCCIO[18]

AN27

VCCIO[19]

AP21

VCCIO[20]

AP23

VCCIO[21]

AP24

VCCIO[22]

AP26

VCCIO[23]

AT24

VCCIO[24]

AN33

VCCIO[25]

AN34

VCCIO[26]

BH29

VCC3_3[3]

AP16

VCCVRM [2]

BG6

VccAFDIPL L

AP17

VCCIO[27]

AU20

VCCDMI[2 ]

PANTHE R-POINT_FCBGA98 9

PANTHE R-POINT_FCBGA98 9

3711mA

POWER

POWER

VCC CORE

VCC CORE

VCCIO

VCCIO

FDI

FDI

1mA

VCCADA C

VSSADA C

CRTLVDS

CRTLVDS

1mA

VCCALVD S

VSSALVD S

VCCTX_L VDS[1]

VCCTX_L VDS[2]

60mA

VCCTX_L VDS[3]

VCCTX_L VDS[4]

VCC3_3[6]

VCC3_3[7]

HVCMOS

HVCMOS

VCCVRM [3]

VCCDMI[1 ]

DMI

DMI

20mA

VCCCLK DMI

VCCDFT ERM[1]

190mA

VCCDFT ERM[2]

VCCDFT ERM[3]

VCCDFT ERM[4]

DFT / SPI

DFT / SPI

20mA

VCCSPI

+VCCAD AC

U48

U47

+VCCA_L VDS

AK36

AK37

AM37

AM38

AP36

AP37

+3VS_VCC 3_3_6

V33

V34

+VCCAFD I_VRM

AT16

+VCCP_V CCDMI

AT20

+1.05VS_VC C_DMI_CCI

AB36

AG16

AG17

AJ16

AJ17

+3V_VCC PSPI

V1

3

+VCCTX_ LVDS

1

C216

C216

0.01U_0402_ 25V7K

0.01U_0402_ 25V7K

2

1

C219

C219

0.1U_0402_1 0V7K

0.1U_0402_1 0V7K

2

C226

C226

1U_0402_6 .3V6K

1U_0402_6 .3V6K

1

C228

C228

0.1U_0402_1 0V7K

0.1U_0402_1 0V7K

2

1

C230

C230
1U_0402_6 .3V6K

1U_0402_6 .3V6K

2

1

C213

C213

0.01U_0402_ 25V7K

0.01U_0402_ 25V7K

2

1

2

R256

R256

2

0_0603_5%

0_0603_5%

+VCCP_V CCDMI

1

2

+VCCPN AND

1

C214

C214

0.1U_0402_1 0V7K

0.1U_0402_1 0V7K

2

C217

C217

0.01U_0402_ 25V7K

0.01U_0402_ 25V7K

+3VS

1

R293

R293

2

0_0603_5%

0_0603_5%

R399

R399

1

0_0402_5%

0_0402_5%

L1 Change to 1 o hm P/N
S RES 1/10W 1 +- 1% 0603

10U

L1 1_0603_1%

L1 1_0603_1%

2

1

C215

C215

10U_0603_ 6.3V6M

10U_0603_ 6.3V6M

2

2

R295

R295

0_0603_5%

0_0603_5%

0.1UH_ML F1608DR10KT_10 %_1608

0.1UH_ML F1608DR10KT_10 %_1608

0.1uH inductor, 200mA

1

C218

C218
22U_0805_ 6.3V6M

22U_0805_ 6.3V6M

2

+1.05VS

R294

R294

1

2

0_0603_5%

0_0603_5%

+1.8VS

1

+3VS

2

2

+3VS

1

1

C395

@

C395

@

10U_0603_ 6.3V6M

10U_0603_ 6.3V6M

2

+3VS

1

+1.8VS

L2

L2

1

2

PCH Power Rail Table
Refer to CPU EDS R1.5

Voltage Rail

V_PROC_IO

V5REF

V5REF_Sus

Vcc3_3

VccADAC

VccADPLLA

VccADPLLB

VccCore

VccDMI

Voltage

1.05

5

5

3.3

3.3

1.05

1.05

1.05

1.05

1

S0 Iccmax
Current (A)

0.001

0.001

0.001

0.228

0.001

0.075

0.075

1.3

0.042

D

1.05VccIO 3.709

1.05VccASW 0.903

1

C220

C220
1U_0402_6 .3V6K

1U_0402_6 .3V6K

2

R258

R258

2

0_0603_5%

0_0603_5%

+V1.05S_VC CP

1

3.3VccSPI 0.01

3.3VccDSW 0.001

1.8 0.002VccDFTERM

C

3.3VccRTC 6 uA

3.3VccSus3_3

3.3 / 1.5VccSu sHDA

0.065

0.01

VccVRM 1.8 / 1.5 0.167

1.05VccCLKDMI

0.075

VccSSC 1 .05 0.095

VccDIFFCLKN 1.05 0. 055

VccALVDS 3.3

1.8VccTX_LVDS 0.04

0.001

B

+1.5VS

1

2

R265 0_0603_5%

R265 0_0603_5%

R02

Intel recommand
stuff R265 and unstuff R266

+VCCAFD I_VRM

+VCCAFD I_VRM

VCCVRM==>1.5V FOR MOBILE
VCCVRM==>1.8V FOR DESKTOP

VCCVRM = 160mA detal waiting for newest spec

A

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

3

2011/06/15 2012/07/11

2011/06/15 2012/07/11

2011/06/15 2012/07/11

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

PCH (7/9) PWR

PCH (7/9) PWR

PCH (7/9) PWR

LA-7987P

LA-7987P

LA-7987P

1

of

19 50Tuesday, October 30, 2012

of

19 50Tuesday, October 30, 2012

of

19 50Tuesday, October 30, 2012

A

1.0

1.0

1.0

5

+3VS

10U

R303

R303

1

2

0_0603_5%

0_0603_5%

D

On-Die PLL Voltage Regulator

H：On-Die PLL volta ge regulator en able

VCCFDIPLL,VCCAPLLEXP,VCCAPLLDMI2
,VCCAPLLSATA

C

+1.05VS

L5

@

L5

@

1

10UH_LB2 012T100MR_20%

10UH_LB2 012T100MR_20%

L6

L6

1

10UH_LB2 012T100MR_20%

10UH_LB2 012T100MR_20%

B

+1.05VS

+1.05VS

+1.05VS

+1.05VS

A

R274

R274

2

0_0603_5%

0_0603_5%

R280

R280

2

0_0603_5%

0_0603_5%

R284

R284

2

0_0603_5%

0_0603_5%

R290

@

R290

@

0_0603_5%

0_0603_5%

2

1

1

1

1

1

2

2

2

1

C256

C256
1U_0402_6 .3V6K

1U_0402_6 .3V6K

2

1

C259

C259
1U_0402_6 .3V6K

1U_0402_6 .3V6K

2

1

C262

C262
1U_0402_6 .3V6K

1U_0402_6 .3V6K

2

+1.05VM_V CCSUS

1

C264

@

C264

@

1U_0402_6 .3V6K

1U_0402_6 .3V6K

2

+3VS_VCC _CLKF33

C231

10U_0603_6.3V6M

C231

10U_0603_6.3V6M

C250

220U_B2_2.5VM_R35

C250

220U_B2_2.5VM_R35

22U_0805_6.3V6M

22U_0805_6.3V6M

1

1

+

+

@

@

2

2

+1.05VS_VC CDIFFCLKN

C232

1U_0402_6.3V6K

C232

1U_0402_6.3V6K

1

2

+1.05VS

+1.05VS

+1.05VS_VC CA_A_DPL

+1.05VS_VC CA_B_DPL

C186

C186

1U_0402_6.3V6K

1U_0402_6.3V6K

1

2

C251

C251

+1.05VS

+3V_PCH

R277

R277

1

0_0805_5%

0_0805_5%

C252

220U_B2_2.5VM_R35

C252

220U_B2_2.5VM_R35

1

1

+

+

2

2

0.1U_0402_1 0V7K

0.1U_0402_1 0V7K

+V1.05S_VC CP

C187

22U_0805_6.3V6M

C187

22U_0805_6.3V6M

@

@

0.1U_0402_1 0V7K

0.1U_0402_1 0V7K

2

0_0603_5%

0_0603_5%

4

Have internal VRM

R268

@

R268

@

0_0603_5%

0_0603_5%

2

R269

R269

2

0_0603_5%

0_0603_5%

1

2

C235

@

C235

@

0.1U_0402_1 0V7K

0.1U_0402_1 0V7K

R271

R271

1

2

0_0603_5%

0_0603_5%

2

C244

1U_0402_6.3V6K

C244

1U_0402_6.3V6K

1

2

1

R300

R300

0_0603_5%

0_0603_5%

2

C253

1U_0402_6.3V6K

C253

1U_0402_6.3V6K

1

2

1

C258

C258

2

1

C263

C263

2

R286

R286

1

1

C265

4.7U_0603_6.3V6K

C265

4.7U_0603_6.3V6K

1

2

2

+VCCAC LK

1

1

1

C234

C234

0.1U_0402_1 0V7K

0.1U_0402_1 0V7K

2

+PCH_VC CDSW

+3VS_VCC _CLKF33

T101

T101

+VCCAPL L_CPY_PCH

+VCCDP LL_CPY

+VCCSU S1

1

C239

@

C239

@
1U_0402_6 .3V6K

1U_0402_6 .3V6K

2

+1.05VM_V CCASW

C241

22U_0805_6.3V6M

C241

22U_0805_6.3V6M

1

2

C245

1U_0402_6.3V6K

C245

1U_0402_6.3V6K

1

2

+VCCRTC EXT

+VCCAFD I_VRM

+1.05VS_VC CA_A_DPL

+1.05VS_VC CA_B_DPL

+VCCDIFF CLK

+1.05VS_VC CDIFFCLKN

+1.05VS_SS CVCC

+VCCSST

+1.05VM_V CCSUS

C266

0.1U_0402_10V7K

C266

0.1U_0402_10V7K

C267

0.1U_0402_10V7K

C267

0.1U_0402_10V7K

1

2

@

@

+VCCPD SW

22U_0805_6.3V6M

22U_0805_6.3V6M

1

2

C246

1U_0402_6.3V6K

C246

1U_0402_6.3V6K

1

2

+V_CPU_ IO

+RTCVCC

1U_0402_6.3V6K

1U_0402_6.3V6K

1

2

3

POWER

U4J

U4J

AD49

VCCACL K

T16

VCCDSW 3_3

V12

DCPSUS BYP

T38

VCC3_3[5]

BH23

VCCAPLL DMI2

AL29

VCCIO[14]

AL24

DCPSUS [3]

AA19

VCCASW [1]

AA21

VCCASW [2]

AA24

C242

C242

C268

C268

0.1U_0402_10V7K

0.1U_0402_10V7K

1

2

AA26

AA27

AA29

AA31

AC26

AC27

AC29

AC31

AD29

AD31

W21

W23

W24

W26

W29

W31

W33

N16

Y49

BD47

BF47

AF17

AF33

AF34

AG34

AG33

V16

T17

V19

BJ8

A22

C270

0.1U_0402_10V7K

C270

0.1U_0402_10V7K

C269

C269

1

@

@

2

VCCASW [3]

VCCASW [4]

VCCASW [5]

VCCASW [6]

VCCASW [7]

VCCASW [8]

VCCASW [9]

VCCASW [10]

VCCASW [11]

VCCASW [12]

VCCASW [13]

VCCASW [14]

VCCASW [15]

VCCASW [16]

VCCASW [17]

VCCASW [18]

VCCASW [19]

VCCASW [20]

DCPRTC

VCCVRM [4]

VCCADP LLA

VCCADP LLB

VCCIO[7]

VCCDIFFC LKN[1]

VCCDIFFC LKN[2]

VCCDIFFC LKN[3]

VCCSSC

DCPSST

DCPSUS [1]

DCPSUS [2]

V_PROC_IO

VCCRTC

PANTHE R-POINT_FCBGA98 9

PANTHE R-POINT_FCBGA98 9

POWER

VCCIO[29]

3mA

119mA

1010mA

Clock and Miscellaneous

Clock and Miscellaneous

80mA

80mA

55mA

95mA

1mA

CPURTC

CPURTC

VCCIO[30]

VCCIO[31]

VCCIO[32]

VCCIO[33]

VCCSUS 3_3[7]

VCCSUS 3_3[8]

VCCSUS 3_3[9]

VCCSUS 3_3[10]

VCCSUS 3_3[6]

VCCIO[34]

1mA

V5REF_S US

DCPSUS [4]

VCCSUS 3_3[1]

1mA

VCCSUS 3_3[2]

VCCSUS 3_3[3]

VCCSUS 3_3[4]

VCCSUS 3_3[5]

VCC3_3[1]

VCC3_3[8]

PCI/GPIO/LPC

PCI/GPIO/LPC

VCC3_3[4]

VCC3_3[2]

VCCIO[12]

VCCIO[13]

VCCAPLL SATA

SATA USB

SATA USB

VCCVRM [1]

VCCASW [22]

VCCASW [23]

MISC

MISC

VCCASW [21]

10mA

VCCSUS HDA

HDA

HDA

V5REF

VCCIO[5]

VCCIO[6]

VCCIO[2]

VCCIO[3]

VCCIO[4]

N26

P26

P28

T27

T29

T23

T24

V23

V24

P24

T26

M26

AN23

AN24

P34

N20

N22

P20

P22

AA16

W16

T34

AJ2

AF13

AH13

AH14

AF14

AK1

AF11

AC16

AC17

AD17

T21

V21

T19

P32

+VCCSAT APLL

+1.05VS

+VCCSU SHDA

+1.05VS_VC CAUPLL

+PCH_V5 REF_SUS

+VCCA_U SBSUS

+3V_VCC PSUS

+PCH_V5 REF_RUN

+3V_VCC PSUS

+VCCAFD I_VRM

+1.05VS_VC C_SATA

+1.05VS_VC CUSBCORE

1

C233

C233
1U_0402_6 .3V6K

1U_0402_6 .3V6K

2

+3V_VCC PUSB

+3VS_VCC PCORE

+3VS_VCC PPCI

+VCC3_3_ 2

C236

0.1U_0402_10V7K

C236

0.1U_0402_10V7K

1

+3V_VCC AUBG

2

+VCCAFD I_VRM

+1.05VS_VC C_SATA

1

C271

C271

0.1U_0402_1 6V4Z

0.1U_0402_1 6V4Z

2

1

C238

C238

0.1U_0402_1 0V7K

0.1U_0402_1 0V7K

2

C243 1U_0402_6 .3V6K@

C243 1U_0402_6 .3V6K@

C316 0.1U_0402 _10V7K@

C316 0.1U_0402 _10V7K@

R283

R283

2

1

0_0603_5%

0_0603_5%

C255

C255

2

0.1U_0402_1 0V7K

0.1U_0402_1 0V7K

+1.05VS_SA TA3

R287

R287

2

0_0603_5%

0_0603_5%

R270

R270

2

0_0603_5%

0_0603_5%

R272

R272

2

0_0603_5%

0_0603_5%

2

0_0603_5%

0_0603_5%

2

0_0603_5%

0_0603_5%

1

1

+3VS

1

T100

T100

1

C261

C261
1U_0402_6 .3V6K

1U_0402_6 .3V6K

2

1

2

+1.05VS

1

+3V_PCH

1

+3V_PCH

R273

R273

1

+1.05VS

R276

R276

1

2

2

1

2

+1.05VS_SA TA3

+1.05VS

R288

R288

2

0_0603_5%

0_0603_5%

+3V_PCH

1

C247

C247
1U_0402_6 .3V

1U_0402_6 .3V

2

1

C249

C249

0.1U_0402_1 0V7K

0.1U_0402_1 0V7K

2

C254

C254

0.1U_0402_1 0V7K

0.1U_0402_1 0V7K

2

0_0603_5%

0_0603_5%

1

C257

C257
1U_0402_6 .3V6K

1U_0402_6 .3V6K

2

1

+5VALW

2

0_0603_5%

0_0603_5%

+5VALW _PCH

R275

R275
10_0402_5%

10_0402_5%

+3V_PCH

R278

R278

1

2

0_0603_5%

0_0603_5%

+3VS

R281

R281

1

2

0_0603_5%

0_0603_5%

+3VS

R282

R282

1

2

0_0603_5%

0_0603_5%

+1.05VS

R285

R285

1

On-Die PLL Voltage Regulator

H：On-Die PLL volta ge regulator en able

VCCFDIPLL,VCCAPLLEXP,VCCAPLLDMI2
,VCCAPLLSATA

R279

R279

10_0402_5%

10_0402_5%

+5VALW _PCH

R289

R289

+5VS

1

1

2

1

2

1

+3V_PCH

2

D1

D1
CH751H-40 PT_SOD323-2

CH751H-40 PT_SOD323-2

1

+PCH_V5 REF_SUS

1

C240

C240

0.1U_0603_2 5V7K

0.1U_0603_2 5V7K

2

+3VS

2

D2

D2
CH751H-40 PT_SOD323-2

CH751H-40 PT_SOD323-2

+PCH_V5 REF_RUN

1

1

C248

C248
1U_0603_1 0V6K

1U_0603_1 0V6K

2

D

C

B

A

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

3

2011/06/15 2012/07/11

2011/06/15 2012/07/11

2011/06/15 2012/07/11

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Title

Title

Title

Size Document Number R ev

Size Document Number R ev

Size Document Number R ev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

PCH (8/9) PWR

PCH (8/9) PWR

PCH (8/9) PWR

LA-7987P

LA-7987P

LA-7987P

1

1.0

1.0

1.0

of

20 50Tuesday, October 30, 2012

of

20 50Tuesday, October 30, 2012

of

20 50Tuesday, October 30, 2012

5

D

C

B

A

U4H

U4H

H5

VSS[0]

AA17

VSS[1]

AA2

VSS[2]

AA3

VSS[3]

AA33

VSS[4]

AA34

VSS[5]

AB11

VSS[6]

AB14

VSS[7]

AB39

VSS[8]

AB4

VSS[9]

AB43

VSS[10]

AB5

VSS[11]

AB7

VSS[12]

AC19

VSS[13]

AC2

VSS[14]

AC21

VSS[15]

AC24

VSS[16]

AC33

VSS[17]

AC34

VSS[18]

AC48

VSS[19]

AD10

VSS[20]

AD11

VSS[21]

AD12

VSS[22]

AD13

VSS[23]

AD19

VSS[24]

AD24

VSS[25]

AD26

VSS[26]

AD27

VSS[27]

AD33

VSS[28]

AD34

VSS[29]

AD36

VSS[30]

AD37

VSS[31]

AD38

VSS[32]

AD39

VSS[33]

AD4

VSS[34]

AD40

VSS[35]

AD42

VSS[36]

AD43

VSS[37]

AD45

VSS[38]

AD46

VSS[39]

AD8

VSS[40]

AE2

VSS[41]

AE3

VSS[42]

AF10

VSS[43]

AF12

VSS[44]

AD14

VSS[45]

AD16

VSS[46]

AF16

VSS[47]

AF19

VSS[48]

AF24

VSS[49]

AF26

VSS[50]

AF27

VSS[51]

AF29

VSS[52]

AF31

VSS[53]

AF38

VSS[54]

AF4

VSS[55]

AF42

VSS[56]

AF46

VSS[57]

AF5

VSS[58]

AF7

VSS[59]

AF8

VSS[60]

AG19

VSS[61]

AG2

VSS[62]

AG31

VSS[63]

AG48

VSS[64]

AH11

VSS[65]

AH3

VSS[66]

AH36

VSS[67]

AH39

VSS[68]

AH40

VSS[69]

AH42

VSS[70]

AH46

VSS[71]

AH7

VSS[72]

AJ19

VSS[73]

AJ21

VSS[74]

AJ24

VSS[75]

AJ33

VSS[76]

AJ34

VSS[77]

AK12

VSS[78]

AK3

VSS[79]

PANTHE R-POINT_FCBGA98 9

PANTHE R-POINT_FCBGA98 9

4

AK38

VSS[80]

AK4

VSS[81]

AK42

VSS[82]

AK46

VSS[83]

AK8

VSS[84]

AL16

VSS[85]

AL17

VSS[86]

AL19

VSS[87]

AL2

VSS[88]

AL21

VSS[89]

AL23

VSS[90]

AL26

VSS[91]

AL27

VSS[92]

AL31

VSS[93]

AL33

VSS[94]

AL34

VSS[95]

AL48

VSS[96]

AM11

VSS[97]

AM14

VSS[98]

AM36

VSS[99]

AM39

VSS[100]

AM43

VSS[101]

AM45

VSS[102]

AM46

VSS[103]

AM7

VSS[104]

AN2

VSS[105]

AN29

VSS[106]

AN3

VSS[107]

AN31

VSS[108]

AP12

VSS[109]

AP19

VSS[110]

AP28

VSS[111]

AP30

VSS[112]

AP32

VSS[113]

AP38

VSS[114]

AP4

VSS[115]

AP42

VSS[116]

AP46

VSS[117]

AP8

VSS[118]

AR2

VSS[119]

AR48

VSS[120]

AT11

VSS[121]

AT13

VSS[122]

AT18

VSS[123]

AT22

VSS[124]

AT26

VSS[125]

AT28

VSS[126]

AT30

VSS[127]

AT32

VSS[128]

AT34

VSS[129]

AT39

VSS[130]

AT42

VSS[131]

AT46

VSS[132]

AT7

VSS[133]

AU24

VSS[134]

AU30

VSS[135]

AV16

VSS[136]

AV20

VSS[137]

AV24

VSS[138]

AV30

VSS[139]

AV38

VSS[140]

AV4

VSS[141]

AV43

VSS[142]

AV8

VSS[143]

AW14

VSS[144]

AW18

VSS[145]

AW2

VSS[146]

AW22

VSS[147]

AW26

VSS[148]

AW28

VSS[149]

AW32

VSS[150]

AW34

VSS[151]

AW36

VSS[152]

AW40

VSS[153]

AW48

VSS[154]

AV11

VSS[155]

AY12

VSS[156]

AY22

VSS[157]

AY28

VSS[158]

3

U4I

U4I

AY4

VSS[159]

AY42

VSS[160]

AY46

VSS[161]

AY8

VSS[162]

B11

VSS[163]

B15

VSS[164]

B19

VSS[165]

B23

VSS[166]

B27

VSS[167]

B31

VSS[168]

B35

VSS[169]

B39

VSS[170]

B7

VSS[171]

F45

VSS[172]

BB12

VSS[173]

BB16

VSS[174]

BB20

VSS[175]

BB22

VSS[176]

BB24

VSS[177]

BB28

VSS[178]

BB30

VSS[179]

BB38

VSS[180]

BB4

VSS[181]

BB46

VSS[182]

BC14

VSS[183]

BC18

VSS[184]

BC2

VSS[185]

BC22

VSS[186]

BC26

VSS[187]

BC32

VSS[188]

BC34

VSS[189]

BC36

VSS[190]

BC40

VSS[191]

BC42

VSS[192]

BC48

VSS[193]

BD46

VSS[194]

BD5

VSS[195]

BE22

VSS[196]

BE26

VSS[197]

BE40

VSS[198]

BF10

VSS[199]

BF12

VSS[200]

BF16

VSS[201]

BF20

VSS[202]

BF22

VSS[203]

BF24

VSS[204]

BF26

VSS[205]

BF28

VSS[206]

BD3

VSS[207]

BF30

VSS[208]

BF38

VSS[209]

BF40

VSS[210]

BF8

VSS[211]

BG17

VSS[212]

BG21

VSS[213]

BG33

VSS[214]

BG44

VSS[215]

BG8

VSS[216]

BH11

VSS[217]

BH15

VSS[218]

BH17

VSS[219]

BH19

VSS[220]

H10

BH27

VSS[221]

VSS[222]

BH31

VSS[223]

BH33

VSS[224]

BH35

VSS[225]

BH39

VSS[226]

BH43

VSS[227]

BH7

VSS[228]

D3

VSS[229]

D12

VSS[230]

D16

VSS[231]

D18

VSS[232]

D22

VSS[233]

D24

VSS[234]

D26

VSS[235]

D30

VSS[236]

D32

VSS[237]

D34

VSS[238]

D38

VSS[239]

D42

VSS[240]

D8

VSS[241]

E18

VSS[242]

E26

VSS[243]

G18

VSS[244]

G20

VSS[245]

G26

VSS[246]

G28

VSS[247]

G36

VSS[248]

G48

VSS[249]

H12

VSS[250]

H18

VSS[251]

H22

VSS[252]

H24

VSS[253]

H26

VSS[254]

H30

VSS[255]

H32

VSS[256]

H34

VSS[257]

F3

VSS[258]

PANTHE R-POINT_FCBGA98 9

PANTHE R-POINT_FCBGA98 9

VSS[259]
VSS[260]

VSS[261]

VSS[262]

VSS[263]

VSS[264]

VSS[265]
VSS[266]
VSS[267]

VSS[268]
VSS[269]

VSS[270]
VSS[271]

VSS[272]
VSS[273]
VSS[274]

VSS[275]
VSS[276]

VSS[277]
VSS[278]
VSS[279]

VSS[280]
VSS[281]

VSS[282]
VSS[283]

VSS[284]
VSS[285]
VSS[286]

VSS[287]

VSS[288]
VSS[289]

VSS[290]
VSS[291]
VSS[292]

VSS[293]
VSS[294]

VSS[295]
VSS[296]

VSS[297]
VSS[298]
VSS[299]

VSS[300]
VSS[301]

VSS[302]
VSS[303]

VSS[304]
VSS[305]
VSS[306]

VSS[307]
VSS[308]

VSS[309]
VSS[310]
VSS[311]

VSS[312]
VSS[313]

VSS[314]
VSS[315]

VSS[316]

VSS[317]
VSS[318]

VSS[319]
VSS[320]
VSS[321]

VSS[322]
VSS[323]

VSS[324]
VSS[325]

VSS[328]

VSS[329]
VSS[330]

VSS[331]

VSS[333]
VSS[334]

VSS[335]
VSS[337]
VSS[338]

VSS[340]
VSS[342]

VSS[343]
VSS[344]
VSS[345]

VSS[346]
VSS[347]

VSS[348]
VSS[349]
VSS[350]

VSS[351]
VSS[352]

2

H46
K18

K26

K39

K46

K7

L18
L2
L20

L26
L28

L36
L48

M12
P16
M18

M22
M24

M30
M32
M34

M38
M4

M42
M46

M8
N18
P30

N47

P11
P18

T33
P40
P43

P47
P7

R2
R48

T12
T31
T37

T4
W34

T46
T47

T8
V11
V17

V26
V27

V29
V31
V36

V39
V43

V7
W17

W19

W2
W27

W48
Y12
Y38

Y4
Y42

Y46
Y8

BG29
N24
AJ3

AD47

B43
BE10

BG41
G14
H16

T36
BG22

BG24
C22
AP13

M14
AP3

AP1
BE16
BC16

BG28
BJ28

1

D

C

B

A

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

3

2011/06/15 2012/07/11

2011/06/15 2012/07/11

2011/06/15 2012/07/11

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

PCH (9/9) VSS

PCH (9/9) VSS

PCH (9/9) VSS

LA-7987P

LA-7987P

LA-7987P

1

1.0

1.0

1.0

of

21 50Tu esday, October 30, 2012

of

21 50Tuesday, October 30, 201 2

of

21 50Tuesday, October 30, 201 2

5

4

3

2

1

LCD POWER CIRCUIT

+LCDVDD

R400

D

Q79

Q79

2N7002_SOT23

2N7002_SOT23

PCH_ENVDD<16>

R400
150_0603_1%

150_0603_1%

1

D

D

S

S

3

R408

@

R408

@

100K_0402_5%

100K_0402_5%

+5VALW

1

R401

R401
100K_0402_5%

100K_0402_5%

R403

2

G

G

1

2

2

1

2

OUT

IN

GND

3

R403

220K_0402_5%

220K_0402_5%

1

2

C515

0.1U_0402_16V4Z

0.1U_0402_16V4Z

Q81

Q81

DTC124EKAT146_SC59-3

DTC124EKAT146_SC59-3

C515

DTC124EK

+3VS

W=60mils

1

C513

C513

4.7U_0805_10V4Z

4.7U_0805_10V4Z

2

S

S

3

G

G

2

1

2

FBMA-L11-201209-221 LMA30T_0805

FBMA-L11-201209-221 LMA30T_0805

Q80

Q80
PMV65XP_SOT23-3~D

PMV65XP_SOT23-3~D

D

D

1

+LCDVDD

1

+LCDVDD_C ONN

L29

L29

2

C516

C516

4.7U_0805_10V4Z

4.7U_0805_10V4Z

W=60mils

1

1

C517

C517

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

2

+3VS

(20 MIL)

Q83

Q83
PMV65XP_SOT23-3~D

@

@

CMOS@

CMOS@

PMV65XP_SOT23-3~D

S

S

3

G

G

+3VALW

1

C542

C542

0.1U_0402_16V4Z

R435

CMOS@

R435

CMOS@

150K_0402_5%

CMOS_ON#<31>

150K_0402_5%

0.1U_0402_16V4Z

2

4.7V

1

C520

C520

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

CMOS Camera

CMOS@

CMOS@

D

D

1

2

+3VS_CMOS

CMOS@

CMOS@

(20 MIL)

1

2

R296

1

CMOS@

CMOS@

C518

C518

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

R296 for CMOS shake issue reserve

R296

0_0603_5%

0_0603_5%

R02

10U

1

C519

C519
10U_0603_6.3V6M

10U_0603_6.3V6M

2

D

@

@

VGA LCD/PANEL BD. Conn.

C

+3VS

0511 Add to protect DISPOFF# damage

1

2

@

@

0_0402_5%

BKOFF#< 31>

B

PCH_ENBKL<16>

BKOFF#

1

2

@

@

1

R538 0_0402_5%

R538 0_0402_5%

R02

1

R716

R716
10K_0402_5%

10K_0402_5%

2

R438

R438

100K_0402_1%

100K_0402_1%

0_0402_5%

2

D4

@

D4

@

CH751H-40PT_SOD 323-2

CH751H-40PT_SOD 323-2

2

1

R717

R717

1

R433

R433

4.7K_0402_5%

4.7K_0402_5%

2

@

@

DISPOFF#

ENBKL < 31>

1

R430 0_0402_5%

PCH_PW M<16>

EC_INVT_PW M<31>

R430 0_0402_5%

R431 0_0402_5%@

R431 0_0402_5%@

2

1

2

+3VS

680P_0402_50V7K

680P_0402_50V7K

C540

@

C540

@

CMOS

0_0402_5%

0_0402_5%

1

R309

R309

LVDS_ACLK<16>
LVDS_ACLK#<16>

LVDS_A2<16>
LVDS_A2#<16>

LVDS_A1<16>
LVDS_A1#<16>

LVDS_A0<16>

LVDS_A0#<16>

EDID_DATA<16>

EDID_CLK<16>

+LCDVDD_C ONN

1

2

+3VS_CMOS

USB20_P3<17>
USB20_N3<17>

2

+3VS

+LEDVDD

DISPOFF#

INVT_PWM

(60 MIL)

USB20_P3

USB20_N3

C539

C539

680P_0402_50V7K

680P_0402_50V7K

@

@

1
2
3

4
5

6
7

8
9

10

11
12

13
14

15

16
17

18
19

20
21
22

23
24

25
26

27
28
29

30

ACES_88341-3001 ME@

ACES_88341-3001 ME@

JLVDS1

JLVDS1

1
2
3

4
5

6
7

8
9
10

11
12

13

14

15
16
17

18
19

20
21
22

23
24

25
26

27
28
29

30

1

2

1

1

C541

C541

4.7U_0805_25V6-K

4.7U_0805_25V6-K

2

31

G1

32

G2

33

G3

34

G4

R813

R813
0_0805_5%

0_0805_5%

B+

2

C

B

A

Security Classification

Security Classification

Security Classification

2011/06/15 2012/07/11

2011/06/15 2012/07/11

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4

2011/06/15 2012/07/11

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

3

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size D ocument Num ber Rev

Size D ocument Num ber Rev

Size D ocument Num ber Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

LVDS/CAMERA

LVDS/CAMERA

LVDS/CAMERA

LA-7987P

LA-7987P

LA-7987P

1

of

22 50Tuesday, October 30, 2012

of

22 50Tuesday, October 30, 2012

of

22 50Tuesday, October 30, 2012

A

1.0

1.0

1.0

A

B

+5VS

3

2

BLUE

1

@

@
D5

D5
BAT54S-7 -F_SOT23-3

BAT54S-7 -F_SOT23-3

+5VS

3

2

GREEN

1

@

@

D6

D6

BAT54S-7 -F_SOT23-3

BAT54S-7 -F_SOT23-3

C

+5VS

3

2

RED

1

@

@
D7

D7
BAT54S-7 -F_SOT23-3

BAT54S-7 -F_SOT23-3

D

E

1

+5VS

FCM1608 CF-121T03 0603

FCM1608 CF-121T03 0603

1

DAC_RED<16>

DAC_GRN< 16>

DAC_BLU<16>

1

2

R445

R445

150_040 2_1%

150_040 2_1%

1

2

CLOSE TO CONN

2

0.1U_040 2_16V4Z

0.1U_040 2_16V4Z

CRT_HSYNC<16>

0.1U_040 2_16V4Z

0.1U_040 2_16V4Z

3

CRT_VSYNC<16>

R443

R443
150_040 2_1%

150_040 2_1%

C529

C529

C531

C531

1

R446

R446
150_040 2_1%

150_040 2_1%

2

+CRT_VC C

1

2

2

+CRT_VC C

1

2

2

1

C522

C522

2

10P_0402_50V8J

10P_0402_50V8J

R448

R448

1

1K_0402 _5%

1K_0402 _5%

1

5

P

4

OE#

A

Y

G

U23

U23
SN74AHC T1G125DCKR_S C70-5

SN74AHC T1G125DCKR_S C70-5

3

R451

R451

1

1K_0402 _5%

1K_0402 _5%

1

5

P

4

OE#

A

Y

G

U24

U24
SN74AHC T1G125DCKR_S C70-5

SN74AHC T1G125DCKR_S C70-5

3

10P_0402_50V8J

10P_0402_50V8J

2

2

1

C523

C523

2

10P_0402_50V8J

10P_0402_50V8J

CRT_HSYNC _1

CRT_VSYNC _1

FCM1608 CF-121T03 0603

FCM1608 CF-121T03 0603

1

FCM1608 CF-121T03 0603

FCM1608 CF-121T03 0603

1

C524

C524

2

2

L30

L30

2

L31

L31

1

2

L32

L32

FCM1608 CF-121T03 0603

FCM1608 CF-121T03 0603

FCM1608 CF-121T03 0603

FCM1608 CF-121T03 0603

1

C525

C525

2

10P_0402_50V8J

10P_0402_50V8J

10P_0402_50V8J

10P_0402_50V8J

1

2

L33

L33

1

2

L34

L34

RED

GREEN

BLUE

1

C527

C527

1

C526

C526

2

2

10P_0402_50V8J

10P_0402_50V8J

JVGA_HS

1

@

@

C530

C530

10P_040 2_50V8J

10P_040 2_50V8J

2

JVGA_VS

1

C532

@

C532

@

10P_040 2_50V8J

10P_040 2_50V8J

2

T66PAD

T66PAD

NC11

RED

CRT_DDC _DAT_CONN

GREEN

JVGA_HS

BLUE

JVGA_VS

CRT_DDC _CLK_CONN

+CRT_VC C

D10

D10

2

1

RB491D_ SC59-3

RB491D_ SC59-3

100P_04 02_50V8J

100P_04 02_50V8J

JVGA_VS

CRT_DDC _CLK_CONN

CRT Connector

F1

F1

2

1

1.1A_6V_ SMD1812P110T F

1.1A_6V_ SMD1812P110T F

W=40mils

1

C528

C528

2

D8

D8

3

I/O2

2

GND

1

I/O1

AZC099-0 4S.R7G_SOT23-6

AZC099-0 4S.R7G_SOT23-6

1

2

6

11

1

7

12

2

8

13

3
9

14

4

10

15

5

@

@

I/O4

VDD

I/O3

+CRT_VC C_F

C521

C521

0.1U_040 2_16V4Z

0.1U_040 2_16V4Z

CONTE_8 0431-5K1-152

CONTE_8 0431-5K1-152

JCRT1

ME@

JCRT1

ME@

16

G

G

17

G

G

1

R437

R437

0_0402_5%

0_0402_5%

2

EMI Request

JVGA_HS

6

5

+5VS

CRT_DDC _DAT_CONN

4

R02

1

1

R436

R436

0_0402_5%

0_0402_5%

2

1

R434

R434

R432

R432

0_0402_5%

0_0402_5%

0_0402_5%

0_0402_5%

2

2

1

2

3

R456

R456

2.2K_040 2_5%

2.2K_040 2_5%

3

100P_04 02_50V8J

100P_04 02_50V8J

+CRT_VC C

1

2

C533

C533

1

R457

R457

2.2K_040 2_5%

2.2K_040 2_5%

2

CRT_DDC _DAT_CONN

CRT_DDC _CLK_CONN

1

1

@

@

@

@

C534

C534
68P_040 2_50V8K

68P_040 2_50V8K

2

2

Compal Secret Data

Compal Secret Data

2011/06/ 15 2012/07/ 11

2011/06/ 15 2012/07/ 11

2011/06/ 15 2012/07 /11

Compal Secret Data

C

Deciphered Date

Deciphered Date

Deciphered Date

4

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Do cument Number Rev

Size Do cument Number Rev

Size Do cument Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

D

Date: Sheet

Compal Electronics, Inc.

CRT Connector

CRT Connector

CRT Connector

LA-7987P

LA-7987P

LA-7987P

23 50Tuesday, October 30 , 2012

23 50Tuesday, October 30, 2 012

23 50Tuesday, October 30, 2 012

E

1.0

1.0

of

of

of

1.0

+3VS

Pull high at chipset/VGA side

CRT_DDC _DATA<16 >

2N7002D W-T/R7_SOT3 63-6

2N7002D W-T/R7_SOT3 63-6

CRT_DDC _CLK<16>

4

A

2N7002D W-T/R7_SOT3 63-6

2N7002D W-T/R7_SOT3 63-6

B

5

4

2

Q62B

Q62B

1

6

Q62A

Q62A

Security Class ification

Security Class ification

Security Class ification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

3

2

1

+5VS

+3VS

D

TMDS_B_HPD#<16>

C

Pull up R for PCH OR VGA SIDE

HDMICLK_NB<16>

B

A

HDMIDAT_NB<16>

5

+3VS

2

R783

R783
0_0402_5%

0_0402_5%
@

@

1

2

1

5

4

3

Q63B

Q63B

HDMI@

HDMI@

2N7002DW-T /R7_SOT363-6

2N7002DW-T /R7_SOT363-6

HDMIDAT_R

HDMICLK_R

2

3

D11

D11

PJDLC05_SOT23-3

PJDLC05_SOT23-3

1

Q63A

Q63A
HDMI@

HDMI@
2N7002DW-T /R7_SOT363-6

2N7002DW-T /R7_SOT363-6

HDMICLK_R

6

HDMIDAT_R

@

@

4

1M_0402_5%

1M_0402_5%

HDMI@

HDMI@

TMDS_B_HPD#

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2

R485

R485

1

HDMI_CLK+_CK

HDMI_CLK-_CK

HDMI_TX0+_CK

HDMI_TX0-_CK

HDMI_TX1+_CK

HDMI_TX1-_CK

HDMI_TX2+_CK

HDMI_TX2-_CK

Q93

Q93

HDMI@

HDMI@

G

G

2

2N7002H_SOT23-3

2N7002H_SOT23-3

3

S

S

1

4

1

4

1

4

1

4

1

D

D

HDMI_CLK-_CK<16>

HDMI_CLK+_CK<16>

HDMI_TX0-_CK<16>

HDMI_TX0+_CK<16>

HDMI_TX1-_CK<16 >
HDMI_TX1+_CK<16>

HDMI_TX2-_CK<16>

HDMI_TX2+_CK<16>

L35

@

L35

@

1

4

WCM-2012HS-900T

WCM-2012HS-900T

L36

@

L36

@

1

4

WCM-2012HS-900T

WCM-2012HS-900T

L37

@

L37

@

1

4

WCM-2012HS-900T

WCM-2012HS-900T

L38

@

L38

@

1

4

WCM-2012HS-900T

WCM-2012HS-900T

2011/06/15 2012/07/11

2011/06/15 2012/07/11

2011/06/15 2012/07/11

HDMI_CLK+_CONN

2

1

2

C982 0.1U _0402_16V4Z @

C982 0.1U _0402_16V4Z @

3

3

2

2

3

3

C985 0.1U_0402_16V4Z @

C985 0.1U_0402_16V4Z @

2

2

C986 0.1U_0402_16V4Z @

C986 0.1U_0402_16V4Z @

3

3

C987 0 .1U_0402_16V4Z @

C987 0 .1U_0402_16V4Z @

2

2

C988 0 .1U_0402_16V4Z @

C988 0 .1U_0402_16V4Z @

3

3

C989 0 .1U_0402_16V4Z @

C989 0 .1U_0402_16V4Z @

3

2

HDMI_CLK-_CONN

1

C983 0.1U_0402_16V4Z @

C983 0.1U_0402_16V4Z @

HDMI_TX0+_CONN

1

C984 0.1U_0402_16V4Z @

C984 0.1U_0402_16V4Z @

HDMI_TX0-_CONN

1

HDMI_TX1+_CONN

1

2

HDMI_TX1-_CONN

1

2

HDMI_TX2+_CONN

1

2

HDMI_TX2-_CONN

1

2

Compal Secret Data

Compal Secret Data

Compal Secret Data

+5VS

2

R488

R488

20K_0402_5%

20K_0402_5%

HDMI@

HDMI@

1

2

2

2

Deciphered Date

Deciphered Date

Deciphered Date

2

3

D14

D14
BAT54S-7-F_SOT23-3

BAT54S-7-F_SOT23-3

1

HDMI_CLK-_CK

HDMI_CLK+_CK

HDMI_TX0-_CK

HDMI_TX0+_CK

HDMI_TX1-_CK

HDMI_TX1+_CK

HDMI_TX2-_CK

HDMI_TX2+_CK

@

@

R465 0_0402_5%@

R465 0_0402_5%@

R464 0_0402_5%@

R464 0_0402_5%@

R467 0_0402_5%@

R467 0_0402_5%@

R466 0_0402_5%@

R466 0_0402_5%@

R469 0_0402_5%@

R469 0_0402_5%@

R468 0_0402_5%@

R468 0_0402_5%@

R471 0_0402_5%@

R471 0_0402_5%@

R470 0_0402_5%@

R470 0_0402_5%@

HDMI_CLK-_CONN

HDMI_CLK+_CONN

HDMI_TX1-_CONN

HDMI_TX1+_CONN

HDMI_TX0-_CONN

HDMI_TX0+_CONN

HDMI_TX2-_CONN

HDMI_TX2+_CONN

1

1

1

1

1

1

1

1

2

RB491D_SC59-3

RB491D_SC59-3

D13

HDMI@

D13

HDMI@

2

R482

R482

0_0805_5%

0_0805_5%

R483

HDMI@

R483

HDMI@

2.2K_0402_5%

2.2K_0402_5%

2

2

2

2

2

2

2

2

680 +-5% 8P4R

680 +-5% 8P4R

5

6

7

8

RP5

RP5

680 +-5% 8P4R

680 +-5% 8P4R

5
6

7

8

RP6

RP6

+HDMI_5V

1

@

@

2

1

4
3

2

1

HDMI@

HDMI@

4

3

2

1

HDMI@

HDMI@

Title

Title

Title

Size Doc ument Number Rev

Size Doc ument Number Rev

Size Doc ument Number Rev

B

B

B

Date: Sheet

Date: Sheet

Date: Sheet

W=40mils

F2

HDMI@

F2

HDMI@

1.1A_6VDC_FUSE

1.1A_6VDC_FUSE

1

2

R484

HDMI@

R484

HDMI@

2.2K_0402_5%

2.2K_0402_5%

1

HDMI_DET

+5VS_HDMI

HDMIDAT_R
HDMICLK_R

HDMI_CLK-_CONN

HDMI_CLK+_CONN
HDMI_TX0-_CONN

HDMI_TX0+_CONN
HDMI_TX1-_CONN

HDMI_TX1+_CONN

HDMI_TX2-_CONN

HDMI_TX2+_CONN

SD309680080
S ROW RES 1/16W 680 +-5% 8P4R

1

D

D

S

S

3

Compal Electronics,Ltd.

Compal Electronics,Ltd.

Compal Electronics,Ltd.

+5VS_HDMI

+5VS_HDMI

2

C543

C543

HDMI@

HDMI@

0.1U_0402_16V4Z

0.1U_0402_16V4Z

JHDMI1

JHDMI1

19

18
17

16
15
14

13
12

11
10

9
8
7

6
5

4
3
2

1

SUYIN_100042GR019M23DZL

SUYIN_100042GR019M23DZL

+3VS

2

G

G

Q95

Q95

HDMI@

HDMI@

2N7002H_SOT23-3

2N7002H_SOT23-3

HDMI CONN

HDMI CONN

HDMI CONN

LA-7987P

LA-7987P

LA-7987P

1

2

ME@

ME@

HP_DET

+5V
DDC/CEC_GND

SDA
SCL
Reserved

CEC
CK-

CK_shield
CK+

D0­D0_shield
D0+

D1­D1_shield

D1+
D2­D2_shield

D2+

1

D

20

G1

21

G2

22

G3

23

G4

of

24 50Tuesday, October 30, 2012

of

24 50Tuesday, October 30, 2012

of

24 50Tuesday, October 30, 2012

C

B

A

1.0

1.0

1.0

A

B

C

D

E

Mini-Express Card for WLAN/WiMAX(Half)

1

+3VS_WLAN

+3VS

Mini-Express Card(WLAN/WiMAX)

JWLN1

0_0402_5%

100_0402_1%

100_0402_1%

R505

R505

1

1

R506

R506

100_0402_1%

100_0402_1%

0_0402_5%

1

@

@

1

R497 0_ 0402_5%@

R497 0_ 0402_5%@

PCI_RST#_R
CLK_PCI_DB

+3VS_WLAN

2

2

2

R514

R514

2

2

R507

R507

100K_0402_5%

100K_0402_5%

1

R02

1

@

PCH_BT_ON#<18,29>

BT_DISABLE<18>

2

3

@

R892 0_0402_5%

R892 0_0402_5%

1

R897 0_0402_5%

R897 0_0402_5%

PCIE_WAKE#<15,26,34>

BT_ACTIVE<29>

2

CLKREQ_WLAN#<14>

2

CLK_PCIE_WLAN1#<14>

CLK_PCIE_WLAN1<14>

PCIE_PRX_DTX_N2<14>
PCIE_PRX_DTX_P2<14>

PCIE_PTX_C_DRX_N2<14>
PCIE_PTX_C_DRX_P2<14>

EC_TX<31,32>
EC_RX<31,32>

PCIE_WAKE#
BT_ACTIVE

BT_DISABLE_R

For EC to detect

ebug card insert.

d

JWLN1

1

WAKE#

3

NC

5

NC

7

CLKREQ#

9

GND

11

REFCLK-

13

REFCLK+

15

GND

17

NC

19

NC

21

GND

23

PERn0

25

PERp0

27

GND

29

GND

31

PETn0

33

PETp0

35

GND

37

NC

39

NC

41

NC

43

45
47
49

51

53

LED_WWAN#

NC

LED_WLAN#

NC

LED_WPAN#

NC
NC

NC

GND

TAITW_PFPET0-AFGLBG1ZZ4N 0

TAITW_PFPET0-AFGLBG1ZZ4N 0
ME@

ME@

3.3V

GND

1.5V

GND

PERST#

+3.3Vaux

GND

+1.5V

SMB_CLK

SMB_DATA

GND

USB_D-

USB_D+

GND

+1.5V

GND

+3.3V

GND

1

2
4
6

8

NC

10

NC

12

NC

14

NC

16

NC

18
20

NC

22
24

26
28

30
32
34

36
38

40
42
44

46
48

50
52

54

80mil

J6

J6

@

@

1

2

JUMP_43X79

JUMP_43X79

+3VS_WLAN

2

+1.5VS_CONN

R503 0_0402_5%@

R503 0_0402_5%@

R504 0_0402_5%@

R504 0_0402_5%@

2

2

1

1

+1.5VS

R498 0_0 402_5%@

R498 0_0 402_5%@

1

R500 0_0 402_5%@

R500 0_ 0402_5%@

1

1

4.7U_0603_6.3V6K

4.7U_0603_6.3V6K

R02

2

2

R499 0_0402_5%@

R499 0_0402_5%@

2

R02

2

R501 0_0402_5%@

R501 0_0402_5%@

2

R502 0_0402_5%@

R502 0_0402_5%@

USB20_N10 <17>
USB20_P10 <17>

1

1

C548

C548

LPC_FRAME#_R
LPC_AD3_R

LPC_AD2_R
LPC_AD1_R
LPC_AD0_R

WLAN_LED#

1

1

@

@

C547

C547

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

2

PCH_WL_OFF# <17>
PLT_RST# <17,26,31,34>

+3VALW
+3VS

SMB_CLK_S3 <11,12,14>
SMB_DATA_S3 <11,12,14>

NC

+3VALW

1

2

C544

C544

0.1U_0402_16V4Z

0.1U_0402_16V4Z

@

@

+1.5VS_CONN

1

C545

C545

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

@

@

1

2

3

Reserve for SW mini-pcie debug card.
Series resistors closed to KBC side.

C

LPC_FRAME#

LPC_AD3
LPC_AD2

LPC_AD1
LPC_AD0

Compal Secret Data

Compal Secret Data

Compal Secret Data

LPC_FRAME# <13,31>

LPC_AD3 <13,31>

LPC_AD2 <13,31>

LPC_AD1 <13,31>

LPC_AD0 <13,31>

CLK_PCI_DB <17 >

Deciphered Date

Deciphered Date

Deciphered Date

PLT_RST#

4

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Doc ument Number Rev

Size Doc ument Number Rev

Size Doc ument Number Rev

Date: Sheet

Date: Sheet

D

Date: Sheet

Compal Electronics, Inc.

Mini-Card/NEW Card/SIM

Mini-Card/NEW Card/SIM

Mini-Card/NEW Card/SIM

LA-7987P

LA-7987P

LA-7987P

E

of

25 50Tuesday, October 30, 2012

of

25 50Tuesday, October 30, 2012

of

25 50Tuesday, October 30, 2012

1.0

1.0

1.0

LPC_FRAME#_R

LPC_AD3_R
LPC_AD2_R

LPC_AD1_R
LPC_AD0_R
PCI_RST#_R

CLK_PCI_DB

4

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

1

R508 0_0402_5%@

R508 0_0402_5%@

1

R509 0_0402_5%@

R509 0_0402_5%@

1

R510 0_0402_5%@

R510 0_0402_5%@

1

R511 0_0402_5%@

R511 0_0402_5%@

1

R512 0_0402_5%@

R512 0_0402_5%@

1

R513 0_0402_5%@

R513 0_0402_5%@

2

2

2

2

2

2

2011/06/15 2012/07/11

2011/06/15 2012/07/11

2011/06/15 2012/07/11

5

4

3

2

1

+3VALW

Layout Notice : Place as close
chip as possible.

D

R176

LAN_PW R_ON#<31>

C

LAN_PW R_ON#

+3V_LAN

PLT_RST#<17,25,31,34 >

R176

1

2

@

@

10K_0402_5 %

10K_0402_5 %

Vendor recommand reseve the
PU resistor close LAN chip

R525 4 .7K_0402_5%

R525 4 .7K_0402_5%

1

@

@

2

C976

C976

0.1U_0402_1 6V7K

0.1U_0402_1 6V7K

1

2

@

@

J18

J18

1

1

JUMP_43X 79

JUMP_43X 79

S

S

3

G

G

2

Place Close to Chip

1

2

C946 0.1U _0402_16V7K

PCIE_PRX _DTX_N1<14>

PCIE_PRX _DTX_P1<14 >

PCIE_PTX _C_DRX_N1<14>

PCIE_PTX _C_DRX_P1<14>

CLK_PCIE _LAN#<14>
CLK_PCIE _LAN<14>

PCIE_W AKE#<15,25,34>

LAN_W AKE#<31>

+3V_LAN

Vendor recommand reseve the
PU resistor close LAN chip

B

+3V_LAN

CLKREQ_L AN#<14>

Near
Pin13

C946 0.1U _0402_16V7K

C947 0.1U _0402_16V7K

C947 0.1U _0402_16V7K

1

R1369 0_0402_5%

R1369 0_0402_5%

1

R1370 0_0402_5%

R1370 0_0402_5%

1

R521 4 .7K_0402_5%

R521 4 .7K_0402_5%

1

R520 4.7K_0402_5%

R520 4.7K_0402_5%

1

1

C957

C957

C956

C956

2

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

Near
Pin19

1

2

@

@

Near
Pin31

2

2

2

@

@

@

@

2

1

C958

C958

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

+3V_LAN

2

2

@

@

D

D

1

Q105

Q105
PMV65XP _SOT23-3~D

PMV65XP _SOT23-3~D

PLT_RST#

PCIE_PRX _C_DTX_N1

PCIE_PRX _C_DTX_P1

PLT_RST#

PCIE_W AKE#_R

LAN_XTA LO
LAN_XTA LI

+1.1_AVDD L
+1.1_AVDD L

+1.1_AVDD L

+1.1_AVDD L_L
+1.1_AVDD L

1

1

C959

C959

C960

C960

2

2

1U_0402_6.3V4Z

1U_0402_6.3V4Z

Near
Pin6

+LX

2

R02

R02

1

R65

R65

10K_0402_5 %LDO@

10K_0402_5 %LDO@

MDI0- <27>
MDI0+ <27>
MDI1- <27>

MDI1+ <27>

MDI2- <27>
MDI2+ <27>

MDI3- <27>
MDI3+ <27>

2

Near
Pin37

+LX

ACTIVITY <27>

LAN_LINK# <27 >

+3VS

1

1

C964

C964

C965

C965

2

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

Place Close to PIN1

1

2

C951

C951

C950

C950

@

@

2

1

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1000P_0402_50V7K

1000P_0402_50V7K

1U_0402_6.3V4Z

1U_0402_6.3V4Z

L77

+1.1_AVDD L_L

FBMA-L11 160808601LMA10T _2P

FBMA-L11 160808601LMA10T _2P

1

1

C980

C980

C967

C967

2

2

1U_0402_6.3V4Z

1U_0402_6.3V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

L77

2

+1.1_AVDD L

1

1

C317

C317

2

4.7U_0603_6.3V6K

4.7U_0603_6.3V6K

L78

SWR@

L78

FBMA-L11 160808601LMA10T _2P

FBMA-L11 160808601LMA10T _2P

SWR@

2

+1.1_DVDD L

1

D

Place close to Pin34

+3V_LAN

R1367

+AVDDH _AVDD3.3

1

C948

C948

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

R1367

1

2

0_0402_5%

0_0402_5%

1

C949

C949

2

1U_0402_6.3V4Z

1U_0402_6.3V4Z

C

Place close to Pin16

+3V_LAN

1

1

C953

C953

C952

C952

2

1U_0402_6.3V4Z

1U_0402_6.3V4Z

1

C954

C954

@

@

2

2

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U

B

Close together

R1357

U41

U41

+1.1_DVDD L

8162@

8162@

R1357

1

2

0_0402_5%

0_0402_5%

+LX_R

1

C935

C935

C936

C936

@

@

2

1000P_0402_50V7K

1000P_0402_50V7K

Close to

in40

P

L74

SWR@

L74

SWR@

1

4.7UH_SIA4 012-4R7M_20%

4.7UH_SIA4 012-4R7M_20%

1

Note: Place Close to LAN chip
L39 DCR< 0.15 ohm

2

Rate current > 1A

C937

C937

0.1U_0402_16V4Z

0.1U_0402_16V4Z

10U_0603_6.3V6M

10U_0603_6.3V6M

10U

SA000050E20_S IC AR8161-BL3A-R QFN 40P E-LAN CTRL
SA000052J20_S IC AR8162-BL3A-R QFN 40P E-LAN CTRL

AR8162-BL3A-R

AR8162-BL3A-R

U41

GIGA@

U41

GIGA@

29

TX_N

Atheros

30

36

35

32

33

2

3

25
26

28

27

7

8

4

13

19

31
34

6

41

0.1U_0402_16V4Z

0.1U_0402_16V4Z

Atheros

TX_P

AR8151/AR8161

AR8151/AR8161

RX_N

RX_P

REFCLK_N

REFCLK_P

PERST#

WAKE#

SMCLK
SMDATA

NC

TESTMODE

XTLO

XTLI

CLKREQ#

AVDDL

AVDDL

AVDDL
AVDDL

AVDDL_REG/AVDD L

GND

AR8161-BL 3A-R_QFN40_5X5

AR8161-BL 3A-R_QFN40_5X5

VDDCT/ISOLAN

DVDDL/PPS

DVDDL_REG/DVDD L

AVDDH/AVDD33

AVDDH_REG

LED_0

LED_1

LED_2

TRXN0
TRXP0

TRXN1
TRXP1

TRXN2

TRXP2

TRXN3

TRXP3

RBIAS

VDD33

AVDDH

LX

ACTIVITY

38

LAN_LINK#

39

23

MDI0-

12

MDI0+

11

MDI1-

15

MDI1+

14

MDI2-

18

MDI2+

17

MDI3-

21

MDI3+

20

LAN_RBIA S

10

+3V_LAN

1

+LX

40

+1.7_VDDC T

5

24

+1.1_DVDD L

37

+AVDDH _AVDD3.3

16

+2.7_AVDD H

22

+2.7_AVDD H

9

Near
Pin9

H --> Overclocking mode
L --> Not overclocking mode

2

1

2

R1371 2.37K_0402_1%

R1371 2.37K_0402_1%

Place Close to P IN1

+LX

R1372 30K _0402_5%

R1372 30K _0402_5%

1

+2.7_AVDD H

1

1

C961

C961

2

1

C962

C962

C963

C963

2

2

1U_0402_6.3V4Z

1U_0402_6.3V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

Near
Pin22

0.1U_0402_16V4Z

0.1U_0402_16V4Z

A

3.3V : Enable switching regulator
0V : Disable switching regulator

LAN_XTA LI

Y6

Y6

4

NC

OSC

1

OSC

1

25MHZ_20 PF_FSX3M-25.M 20FDO

25MHZ_20 PF_FSX3M-25.M 20FDO

R02

C968

C968

2

15P_0402_50V8J

15P_0402_50V8J

5

4

LAN_XTA LO

3

2

NC

1

Security Classification

Security Classification

C969

C969

Security Classification

Issued Date

Issued Date

2

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

15P_0402_50V8J

15P_0402_50V8J

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

3

2011/06/15 2012/07/11

2011/06/15 2012/07/11

2011/06/15 2012/07/11

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Nu mber Rev

Size Document Nu mber Rev

Size Document Nu mber Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

LAN-AR8151/8161

LAN-AR8151/8161

LAN-AR8151/8161

LA-7987P

LA-7987P

Tuesday, October 30, 2012

Tuesday, October 30, 2012

Tuesday, October 30, 2012

LA-7987P

1

of

26 50

of

26 50

of

26 50

A

1.0

1.0

1.0

5

4

3

2

1

MDI3+

MDI3-

6

7

8

9

D

11

Place Close to T2

C

6

6

11

GND

5

5

Place Close to T1

B

10

6

7

8

9

10

GND

5

7

8

7

4

3

4

RCLAMP3304N.TCT_SLP262 6P10-10

RCLAMP3304N.TCT_SLP262 6P10-10

1

2

3

4

5

D69

D69

1

2

3

4

MDI2-

MDI2+

MDI1-

MDI1+

9

10

8

9

10

RCLAMP3304N.TCT_SLP262 6P10-10

RCLAMP3304N.TCT_SLP262 6P10-10

1

2

3

D68

D68

@

@

1

2

MDI0-

MDI0+

@

@

LAN_LINK#<26>

C978

C978

470P_0402_50V7K

470P_0402_50V7K

ACTIVITY<26>

ACTIVITY

2

C970

@

C970

@

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

1

C972

C972

0.1U_0402_16V4Z@

0.1U_0402_16V4Z@

2

2

C974

C974

0.1U_0402_16V4Z@

0.1U_0402_16V4Z@

1

1

C975

@

C975

@

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

MDI3+<26>
MDI3-<26>

MDI2+<26>
MDI2-<26>

MDI3+

MDI3-

MDI2+
MDI2-

MDI0+<26>

MDI0-<26>

MDI1+<26>

MDI1-<26>

LDO Mode: pop R1380;R596

WR Mode: pop R1449;R1378

S

1

2

R1449 510_0402_5%SWR@

R1449 510_0402_5%SWR@

1

2

R1380 510_0402_5%LDO@

R1380 510_0402_5%LDO@

1

2

R1378 0_0402_5%SWR@

R1378 0_0402_5%SWR@

+3V_LAN

1

@

@

2

1

2

R1448 510_0402_5%

R1448 510_0402_5%

R596

LDO@

R596

LDO@

0_0402_5%

0_0402_5%

MDI0+

MDI0-

MDI1+

MDI1-

1

2

Overclocking mode stick

1

@

@

C979

C979

470P_0402_50V7K

470P_0402_50V7K

+3V_LAN

2

T2

T2

1

TD+

2

3

4
5

6
7

8

1
2
3

4
5

6
7

8

MDO0+

MDO0-

MDO1+

MDO2+

MDO2-

MDO1-

MDO3+

MDO3-

TX+

TD-

TX-

CT

CT

NC

NC

NC

NC

CT

CT

RD+

RX+

RD-

RX-

S X'FORM_ HD-081-A LAN

S X'FORM_ HD-081-A LAN
GIGA@

GIGA@

R02

T1

T1

TD+

TX+

TD-

TX-

CT

CT

NC

NC

NC

NC

CT

CT

RD+

RX+

RD-

RX-

S X'FORM_ HD-081-A LAN

S X'FORM_ HD-081-A LAN

JRJ1

JRJ1

9

Green LED-

10

Green LED+

1

PR1+

2

PR1-

3

PR2+

4

PR3+

5

PR3-

6

PR2-

7

PR4+

8

PR4-

11

Yellow LED-

12

Yellow LED+

SANTA_130452-D ME@

SANTA_130452-D ME@

16

MDO3-

15

MCT3

14

13
12

MCT2

11

MDO2+

10

MDO2-

9

MDO0+

16

MDO0-

15

MCT0

14

13

12

MCT1

11

MDO1+

10

MDO1-

9

0_0402_5%

0_0402_5%

0_0402_5%

0_0402_5%

G2

G1

1

1

2

R304 0 _0402_5%

R304 0 _0402_5%

2

R305 0_04 02_5%

R305 0_04 02_5%

8162@

8162@

8162@

8162@

1

2

R306

R306

1

2

R307

R307

8162@

8162@

8162@

8162@

14

13

1

R1374 75_0603_5%

R1374 75_0603_5%

2

1

R1376

R1376

75_0603_5%

75_0603_5%

1

R1377

R1377

75_0603_5%

75_0603_5%

2

DL1

DL1

@

@

1

2

2

2

R1375 75_0603_5%

R1375 75_0603_5%

1

MCT3

MCT2

MCT1

MCT0

R308

R308

0_0603_5%

0_0603_5%

2

For GDTx1
DL1- Mount
DL2/DL3/DL4- NC
R308- 75 ohm
R1374/R1375/R1376/R1377- 0 ohm

2

DL2

DL2

@

@

1

LSE-200NX3216TRLF_1206-2

LSE-200NX3216TRLF_1206-2

2

DL3

DL3

@

@

1

LSE-200NX3216TRLF_1206-2

LSE-200NX3216TRLF_1206-2

Reserve for EMI go rural solution

C973

C973

1

1

LSE-200NX3216TRLF_1206-2

LSE-200NX3216TRLF_1206-2

2

10P_0603_50V

10P_0603_50V

2

DL4

DL4

@

@

1

D

C

B

LSE-200NX3216TRLF_1206-2

LSE-200NX3216TRLF_1206-2

MDO3+

R02

A

Security Classification

Security Classification

Security Classification

2011/06/15 2012/07/11

2011/06/15 2012/07/11

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2011/06/15 2012/07/11

3

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Doc ument Number Rev

Size Doc ument Number Rev

Size Doc ument Number Rev

B

B

B

Date: Sheet

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

LAN_Transformer

LAN_Transformer

LAN_Transformer

LA-7987P

LA-7987P

LA-7987P

27 50Tuesday, October 30, 2012

27 50Tuesday, October 30, 2012

27 50Tuesday, October 30, 2012

1

of

of

of

A

1.0

1.0

1.0

5

4

3

2

1

SMSC thermal sensor
placed near by VRAM

D

C

Close U27

C587

@

C587

C588

C588

@

@

@

2200P_0402_50V7K

2200P_0402_50V7K

2200P_0402_50V7K

2200P_0402_50V7K

1

2

1

2

REMOTE1+

REMOTE1-

REMOTE2+

REMOTE2-

C590

@

C590

@

0.1U_0402_16V4Z

0.1U_0402_16V4Z

+3VS

U27

@

U27

@

1

REMOTE1+

2

REMOTE1-

REMOTE2+

1

REMOTE2-

VDD

2

DP1

3

DN1

4

DP2

5

DN2

EMC1403-2-AIZL-TR_MSOP10

EMC1403-2-AIZL-TR_MSOP10

SMCLK

SMDATA

ALERT#

THERM#

GND

Address 1001_101xb

+3VS

1

R540

R540

10K_0402_5%

10K_0402_5%

@

@

2

10

9

8

7

6

EC_SMB_CK2

EC_SMB_DA2

EC_SMB_CK2 <14 ,31>

EC_SMB_DA2 <14 ,31>

REMOTE1+

C586

@

C586

@

100P_0402_50V8J

100P_0402_50V8J

REMOTE1-

REMOTE2+

C589

@

C589

@

100P_0402_50V8J

100P_0402_50V8J

REMOTE2-

REMOTE1,2+/-:
T

race width/space:10/10 mil

Trace length:<8"

CPU

H1

H1

H2

H2

H3

HOLEA

HOLEA

1

H_3P8

H_3P8

H3
HOLEA

HOLEA

1

H_3P8

H_3P8

FD1

FD1

FD4

FD4

FD3

FD3

FD2

FD2

1

1

1

1

HOLEA

HOLEA

1

H_3P8

H_3P8

A

Close to DDR

1

1

C

C

2

Q97

Q97

B

B

2

E

E

3

1

1

C

C

2

B

B

2

E

E

3

@

@

MMST3904-7-F_SOT323-3

MMST3904-7-F_SOT323-3

Under WWAN

Q98

@

Q98

@

MMST3904-7-F_SOT323-3

MMST3904-7-F_SOT323-3

D

C

B

+5VS

R581

R581

1

2

0_0603_5%

0_0603_5%

@

@

2

C591

C591
10U_0603_6.3V6M

10U_0603_6.3V6M

1

10U

A

5

EC_TACH<31 >

EC_FAN_PWM<3 1>

FAN1 Conn

JFAN1

JFAN1

1

1

2

2

3

3

4

4

5

G5

6

G6

ACES_85205-04001

ACES_85205-04001

ME@

ME@

4

橢橢橢

M/B

H6

H6

HOLEA

HOLEA

1

H_2P8

H_2P8

H7

H7
HOLEA

HOLEA

1

H_2P8

H_2P8

H8

H8
HOLEA

HOLEA

1

H_2P8

H_2P8

H9

H9

HOLEA

HOLEA

1

H_2P8

H_2P8

H10

H10
HOLEA

HOLEA

1

H_2P8

H_2P8

H11

H11

HOLEA

HOLEA

1

H_2P8

H_2P8

H12

H12

HOLEA

HOLEA

1

H_2P8

H_2P8

H13

H13
HOLEA

HOLEA

1

H_2P8

H_2P8

H14

H14
HOLEA

HOLEA

1

H_2P8

H_2P8

L R

H15

H15
HOLEA

HOLEA

1

H_3P0X4P0N

H_3P0X4P0N

D

2P8 * 9 pcd

Security Classification

Security Classification

Security Classification

2011/06/15 2012/07/11

2011/06/15 2012/07/11

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2011/06/15 2012/07/11

3

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

E

M/B

橢橢

H17

H17
HOLEA

H16

H16
HOLEA

HOLEA

1

H_3P0X4P0N

H_3P0X4P0N

Compal Electronics,Ltd.

Compal Electronics,Ltd.

Compal Electronics,Ltd.

Title

Title

Title

Fintek-Thermal IC/FAN/screw

Fintek-Thermal IC/FAN/screw

Fintek-Thermal IC/FAN/screw

Size Doc ument Number Rev

Size Doc ument Number Rev

Size Doc ument Number Rev

B

B

B

Date: Sheet

Date: Sheet

Date: Sheet

HOLEA

1

H_3P0N

H_3P0N

LA-7987P

LA-7987P

LA-7987P

of

28 50Tuesday, October 30, 2012

of

28 50Tuesday, October 30, 2012

of

28 50Tuesday, October 30, 2012

1

B

A

1.0

1.0

1.0

A

1

PCH_BT_ON#<18,25>

B

BT MODULE CONN

+3VALW

1

C710

@

C710

@

0.1U_0402_16V4Z

0.1U_0402_16V4Z

R632

R632

100K_0402_5%

100K_0402_5%

1

BT@

BT@

2

C709

BT@

C709

BT@

0.1U_0402_16V4Z

2

0.1U_0402_16V4Z

1

2

+3VS

S

S

3

USB20_P8<17>
USB20_N8<17>

BT_ACTIVE<25>

D

D

1

2

Q104

Q104

G

G

PMV65XP_SOT23-3~D

PMV65XP_SOT23-3~D

2

USB20_P8

USB20_N8

BT_ACTIVE

C

R02

R583

R583
0_0603_5%

0_0603_5%

1

BTON_LED:NC

+3VS_BT

30mils

1

0.1U_0402_16V4Z

0.1U_0402_16V4Z

C712

C712

BT@

BT@

2

JBT1

JBT1

1

1

2

2

3

3

4

4

5

5

G1

6

6

G2

ACES_87213-0600G

ACES_87213-0600G
ME@

ME@

D

E

F

G

H

SATA HDD Conn.

JHDD1

JHDD1

1

SATA_ITX_DRX_P0<13>

SATA_DTX_C_IRX_N0<13>

SATA_DTX_C_IRX_P0<13>

+5V_HDD

R02

1

C598

7

8

C598
1000P_0402_50V7K

1000P_0402_50V7K

2

SATA_DTX_C_IRX_N0

SATA_DTX_C_IRX_P0

1

C599

C599

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

1

C600

C600

1U_0603_10V4Z

1U_0603_10V4Z

2

SATA_ITX_DRX_N0<13>

1

2

C596 0.01U_0402_25V7K

C596 0.01U_0402_25V7K

1

2

C597 0.01U_0402_25V7K

C597 0.01U_0402_25V7K

+5VS

R02

@

@

10U

SATA_ITX_DRX_P0

SATA_ITX_DRX_N0

SATA_DTX_IRX_N0

SATA_DTX_IRX_P0

R550 0_0805_5%

R550 0_0805_5%

1

@

@

1

C602

C602

10U_0603_6.3V6M

10U_0603_6.3V6M

2

+3VS

+5V_HDD

2

+3VS

1

@

@
C603

C603

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

GND

2

RX+

3

RX-

4

GND

5

TX-

6

TX+

7

GND

8

3.3V

9

3.3V

10

3.3V

11

GND

12

GND

13

GND

14

5V

15

5V

16

5V

17

GND

18

Reserved

19

GND

20

12V

12V
12V

GND
GND

21
22

SUYIN_127043FB022G278ZR

SUYIN_127043FB022G278ZR

1

23
24

2

2

FOR 15"

SATA ODD FFC Conn.

JP2

JP2

1

1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

9

9

10

10

11

GND

12

GND

ACES_87056-01001-001

ACES_87056-01001-001

ME@

ME@

JODD1

JODD1

1

GND

2

RX+

3

RX-

4

GND

5

TX-

6

TX+

7

GND

8

DP

9

+5V

10

+5V

11

MD

12

GND

13

GND

TYCO_2-1759838-8~D

TYCO_2-1759838-8~D

GND1

GND2

ME@

ME@

3

14

15

4

R710 0_0402_5%@

R710 0_0402_5%@

check

2

1

1

0_0402_5%

0_0402_5%

SATA_ITX_DRX_P2_15
SATA_ITX_DRX_N2_15

SATA_DTX_IRX_N2_15

SATA_DTX_IRX_P2_15

2

2

R554

R554

@

@

SATA_ITX_DRX_P2_14

SATA_ITX_DRX_N2_14

SATA_DTX_IRX_N2_14

SATA_DTX_IRX_P2_14

ODD_DETECT#

+5V_ODD

R_ODD_DA#

ODD_DETECT#

+5V_ODD

R_ODD_DA#

R02

Co-lay

FOR 14"

SATA ODD Conn.

R02

SATA_ITX_C_DRX_P2<13>
SATA_ITX_C_DRX_N2<13>

SATA_DTX_C_IRX_N2<13>
SATA_DTX_C_IRX_P2<13>

SATA_ITX_C_DRX_P2

SATA_ITX_C_DRX_N2

SATA_DTX_C_IRX_N2

SATA_DTX_C_IRX_P2

ODD_DA#<17,31>

ODD Power Control

J9

@

J9

@

1

2

1

+5VS

3

10K_0402_5%

10K_0402_5%

ODD_EN<18>

4

+5VALW

1

1

R568

@

R568

@

2

2

IN

R552

@

R552

@

10K_0402_5%

10K_0402_5%

2

1

3

1

OUT

GND

Q100

@

Q100

@

DTC124EKAT146_SC59-3

DTC124EKAT146_SC59-3

R675

@

R675

@

100K_0402_5%

100K_0402_5%

2

JUMP_43X79

JUMP_43X79

S

S

3

G

G

2

1

2

2

D

D

1

Q99

@

Q99

@

PMV65XP_SOT23-3~D

PMV65XP_SOT23-3~D

C607

@

C607

@

0.01U_0402_25V7K

0.01U_0402_25V7K

+5V_ODD

1

2

10U

1

C604

C604

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

C608

C608
10U_0603_6.3V6M

10U_0603_6.3V6M

SATA_ITX_C_DRX_P2
SATA_ITX_C_DRX_N2

SATA_DTX_C_IRX_N2

SATA_DTX_C_IRX_P2

1

2

C605 0.01U_0402_25V7K15@

C605 0.01U_0402_25V7K15@

1

2

C606 0.01U_0402_25V7K15@

C606 0.01U_0402_25V7K15@

1

2

C618 0.01U_0402_25V7K15@

C618 0.01U_0402_25V7K15@

1

2

C617 0.01U_0402_25V7K15@

C617 0.01U_0402_25V7K15@

ODD_DA#

1

R555

1

1

10K_0402_5%

10K_0402_5%

2

2

2

2

R555

+3VS

C616 0.01U_0402_25V7K14@

C616 0.01U_0402_25V7K14@

1

C615 0.01U_0402_25V7K14@

C615 0.01U_0402_25V7K14@

C614 0.01U_0402_25V7K14@

C614 0.01U_0402_25V7K14@

1

C613 0.01U_0402_25V7K14@

C613 0.01U_0402_25V7K14@

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

C

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2011/06/15 2012/07/11

2011/06/15 2012/07/11

2011/06/15 2012/07/11

D

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

E

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

F

Date: Sheet

Compal Electronics, Inc.

HDD/ODD/BT Connector

HDD/ODD/BT Connector

HDD/ODD/BT Connector

LA-7987P

LA-7987P

G

LA-7987P

29 50Tuesday, October 30, 2012

29 50Tuesday, October 30, 2012

29 50Tuesday, October 30, 2012

H

1.0

1.0

1.0

of

of

of

5

CX20671
High Definition Audio Codec SoC
With Integrated Class-D Stereo
Amplifier.
An integrated 5 V to 3.3 V Low-dropout
voltage regulator (LDO).

An integrated 3.3 V to 1.8V Low-dropout
voltage regulator (LDO).

D

+3VS

+3VS

+3VALW

C

HDA_SYNC_A UDIO<1 3>

HDA_SDOUT_A UDIO<13>

Short GND and GNDA on

B

GND1 & GND2 on layout

R516

@

R516

@

1

2

0_0402 _5%

0_0402 _5%

GND GNDA

PC Beep

EC Beep

ICH Beep

A

BEEP#<31>

HDA_SPKR<13>

5

1

1

R528 0_ 0402_5%@

R528 0_ 0402_5%@

HDA_SDIN0<13>

C619 0. 1U_0402_1 6V4Z

C619 0. 1U_0402_1 6V4Z

C612 0. 1U_0402_1 6V4Z

C612 0. 1U_0402_1 6V4Z

R527 0_0 402_5%

R527 0_0 402_5%

2

2

CX_GPIO0<32>

EC_MUTE#<31>

EAPD active low
0=power down ex AMP
1=power up ex AMP

1

2

PC_BEEP 1

1

2

+3VS

C582

C582

@

@

HDA_RST_AUD IO#<13>

HDA_BITCLK _AUDIO<13>

1

R495 33_ 0402_5%

R495 33_ 0402_5%

EAPD< 31>

Internal SPEAKER

R492

R492

1

33_040 2_5%

33_040 2_5%

1

@

@

R480

R480

10K_04 02_5%

10K_04 02_5%

2

1

1

C583

C583

2

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

4.7U_0603_6.3V6K

4.7U_0603_6.3V6K

1

1

C623

C623

C593

C593

2

2

@

@

1U_0603_10V4Z

1U_0603_10V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

1

2

R496 0_040 2_5%

R496 0_040 2_5%

PC_BEEP

2

4

1

C579

C579

C580

C580

2

4.7U_0603_6.3V6K

4.7U_0603_6.3V6K

C626

C626

HDA_RST_AUD IO#

HDA_BITCLK_ AUDIO

HDA_SYNC_A UDIO

HDA_SDOUT_A UDIO

PC_BEEP

2

R5190_0402_5% BBH@

R5190_0402_5% BBH@

1

SPK_L2+

SPK_L1-

SPK_R2+

SPK_R1-

WM-64PC Y_2P

WM-64PC Y_2P

4

1

2

1

2

MIC1

MIC1

45@

45@

C581

C581

@

@

0.1U_0402_16V4Z

0.1U_0402_16V4Z

C634

C634

4.7U_0603_6.3V6K

4.7U_0603_6.3V6K

CX_GPIO0

1

2

1

2

1

GNDA

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

10 mils

0.1U_0402_16V4Z

0.1U_0402_16V4Z

9

5

8

6

4

10

38

37

40

1

11

13

16

14

1

2

@

@

1

1

C584

C584

C585

C585

2

2

1U_0603_10V4Z

1U_0603_10V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

7

2

18

27

29

3

U25

U25

VDD_IO

FILT_1.8

FILT_1.65

VAUX_3.3

AVDD_3.3

PC_BEEP

GPIO0/EAPD#

LEFT+

41

GND

DVDD_3.3

CX20671 -21Z_QFN40_ 6X6

CX20671 -21Z_QFN40_ 6X6

RESET#

BIT_CLK

SYNC

SDATA_IN

SDATA_OUT

GPIO1/SPK_MUTE#

DMIC_CLK

DMIC_1/2

LEFT-

RIGHT+

RIGHT-

Place colose to Codec chip

+MICBIASC

1

R518

R518

2.2K_04 02_5%

2.2K_04 02_5%

2

1

C633 2. 2U_0603_6 .3V4Z

C633 2. 2U_0603_6 .3V4Z

1

2

C636

C636

C640

C640

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

@

@

1

C625

C625

2

28

26

AVDD_5V

AVDD_HP

CLASS-D_REF

2

C592

C592

4.7U_0603_6.3V6K

4.7U_0603_6.3V6K

C638

C638

@

@

LPWR_5.0

RPWR_5.0

SENSE_A

PORTB_R

PORTB_L

B_BIAS

C_BIAS

PORTC_R

PORTC_L

PORTA_R
PORTA_L

AVEE

FLY_P

FLY_N

1

2

1

2

NC

NC
NC

AVDD_3.3 pinis output of
internal LDO. NOT connect
to external supply.

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

C631

C631

2

4.7U_0603_6.3V6K

4.7U_0603_6.3V6K

0.1U_0402_16V4Z

0.1U_0402_16V4Z

12

15

17

SENSE_A

36

35

34

+MICBIASB

33

+MICBIASC

32

31

30

23
22

24

25
39

21

19

1

2

20

C635 1U_ 0603_10V4 Z

C635 1U_ 0603_10V4 Z

MIC_INR

MIC_INL

3

+LDO_OUT_3 .3V

Layout Note:Path from +5VS to LPW R_5.0
RPWR_5.0 must be very low
resistance (<0.01 ohms)

+5VS

1

C632

C632

2

1

C620

C620

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

R526 0_0402_5%

R526 0_0402_5%

1

MIC_INR

MIC_INL

1

C629

C629

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

SPK_R1­SPK_R2+
SPK_L1-

SPK_L2+

wide 30MIL

3

2

HDA_RST_AUD IO#

HDA_SYNC_A UDIO

HDA_SDOUT_A UDIO

1

1

1

C577

C577

C576

C576

C575

1

1

1

C628

C628

C595

C595

C594

C594

@

@

2

2

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

Please bypass caps very close to device.

2

2.2U_060 3_6.3V4Z

2.2U_060 3_6.3V4Z

1

C621

C621

1

C622

C622

2.2U_060 3_6.3V4Z

2.2U_060 3_6.3V4Z

4.7U_0603_6.3V6K

4.7U_0603_6.3V6K

0.1U_0402_16V4Z

0.1U_0402_16V4Z

4.7U_0603_6.3V6K

4.7U_0603_6.3V6K

2

2

@

@

+5VS

R517 1 00_0402_ 1%

R517 1 00_0402_ 1%

SENSE_A

EXT_MIC

C575

2

@

@

@

@

22P_0402_50V8J

22P_0402_50V8J

22P_0402_50V8J

22P_0402_50V8J

1

R458 5.11 K_0402_1 %

R458 5.11 K_0402_1 %

1

2

R491 20 K_0402_1%

R491 20 K_0402_1%

1

R494 39.2K_ 0402_1%

R494 39.2K_ 0402_1%

R490 2K _0402_5%

R490 2K _0402_5%

2

2

+MICBIASB

1

R490 & R700 for App & Nokia combo ear phone un-pop

EXT_MIC <32>

External MIC

C578

C578

2

2

@

@

@

@

22P_0402_50V8J

22P_0402_50V8J

22P_0402_50V8J

22P_0402_50V8J

2

R700 4.7 K_0402_5%

R700 4.7 K_0402_5%

2

Internal MIC

1

R481 39_0402_5 %

R481 39_0402_5 %

R493 39_0402_ 5%

R493 39_0402_ 5%

Changed from 5.1ohm to 15ohm
for "zi zi"noise.

1

C609

C609

2

4.7U_0603_6.3V6K

4.7U_0603_6.3V6K

L41 FBMA-L 11-160808-1 21LMT_0603

L41 FBMA-L 11-160808-1 21LMT_0603

L42 FBMA-L1 1-160808-1 21LMT_0603

L42 FBMA-L1 1-160808-1 21LMT_0603

L43 FBMA-L1 1-160808-1 21LMT_0603

L43 FBMA-L1 1-160808-1 21LMT_0603

L46 FBMA-L 11-160808-1 21LMT_0603

L46 FBMA-L 11-160808-1 21LMT_0603

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTR ONICS, INC. AND CONTAINS CON FIDENTIAL

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTR ONICS, INC. AND CONTAINS CON FIDENTIAL

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTR ONICS, INC. AND CONTAINS CON FIDENTIAL

AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D

AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D

AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

LBSS13 8LT1G_SOT-23-3

LBSS13 8LT1G_SOT-23-3

1

1

1

1

MIC_JD

PLUG_IN_ R

2

2

2

2

2

1

2

Combo Jack detect (normal close)

1

D

D

Q75

Q75

2

G

G

S

S

3

CX_GPIO0

SPK_R1-_ CONN

SPK_R2+_ CONN
SPK_L1-_ CONN
SPK_L2+ _CONN

R02

C610

C610

2011/06/15 2012/07/11

2011/06/15 2012/07/11

2011/06/15 2012/07/11

HP_OUTR <32>
HP_OUTL <32>

R693

R693

1

C787

C787

1U_0402 _6.3V6K

1U_0402 _6.3V6K

2

R182 47 K_0402_5 %

R182 47 K_0402_5 %

1

1

C630

C630

@

@

0.1U_040 2_16V4Z

0.1U_040 2_16V4Z

2

1

2

1

1

C624

C624

C627

C627

2

2

220P_0402_50V7K

220P_0402_50V7K

220P_0402_50V7K

220P_0402_50V7K

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

33K_04 02_5%

33K_04 02_5%

1

@

@

1

C611

C611

2

220P_0402_50V7K

220P_0402_50V7K

Headphone

EXT_MICEXT_MIC

EXT_MICEXT_MIC

2

PLUG_IN<32>

2

TVNST52302 AB0 C/C SOT52 3

TVNST52302 AB0 C/C SOT52 3

220P_0402_50V7K

220P_0402_50V7K

+5VS

D70

@

D70

@

1

EMI

HDA_BITCLK_ AUDIO

1

2

R515

R515

0_0402 _5%

0_0402 _5%

@

@

1

2

Sense resistors must be
connected same power
that is used for VAUX_3.3

+3VS

MIC_JD

PLUG_IN_ R

1

R02

1

R724

R724
10K_040 2_5%

10K_040 2_5%

2

2

3

1

2

R723

R723

G

G

20K_04 02_5%

20K_04 02_5%

2

3

D71

@

D71

@

1

TVNST52302 AB0 C/C SOT52 3

TVNST52302 AB0 C/C SOT52 3

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size D ocument Numb er Rev

Size D ocument Numb er Rev

Size D ocument Numb er Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

HDA_RST_AUD IO#

Port B
Port A

PLUG_IN_ R

1

D

D

Q85

Q85
2N7002_ SOT23

2N7002_ SOT23

S

S

3

CX20671 Codec

CX20671 Codec

CX20671 Codec

LA-7987P

LA-7987P

LA-7987P

1

C641

C641

100P_04 02_50V8J

100P_04 02_50V8J

ESD Reserve

JSPK1

JSPK1

1

1

2

2

3

3

4

4

5

GND1

6

GND2

ACES_88 231-04001

ACES_88 231-04001

+3VS

R351

@

R351

@

4.7K_04 02_5%

4.7K_04 02_5%

@

@

ME@

ME@

30 50Tuesday, October 30 , 2012

30 50Tuesday, October 30 , 2012

30 50Tuesday, October 30 , 2012

D

1

2

1

2

C

B

A

1.0

1.0

1.0

of

of

of

+3VALW

+3VALW

+3VALW

+3VS

R601

R601

2.2K_0402_5%

2.2K_0402_5%

1

@

@
C665

C665
100P_0402_50V8J

100P_0402_50V8J

2

R605

R605

10K_0402_5%

10K_0402_5%

1

1

C660 22P_0402_50V8J@

C660 22P_0402_50V8J@

1

R590 47K_0402_5%

R590 47K_0402_5%

0.1U_0402_16V4Z

0.1U_0402_16V4Z

KSO[0..15]<32>

KSI[0..7]<32>

R595 47K_ 0402_5%@

R595 47K_ 0402_5%@

1

R597 47K_0402_5%@

R597 47K_0402_5%@

1

1

2

+3VS

1

EC_TACH

2

1

R120

R120
10M_0402_5%

10M_0402_5%

18P_0402_50V8J

18P_0402_50V8J

1

1

OSC

C347

C347
@

@

NC

2

2

check

L44

L44

FBM-11-160808- 601-T_0603

FBM-11-160808- 601-T_0603

2

C656

C656

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

L45

L45

FBM-11-160808-6 01-T_0603

FBM-11-160808-6 01-T_0603

1

2

2

R602

R602

2.2K_0402_5%

2.2K_0402_5%

EC_SMB_CK2
EC_SMB_DA2

@

@
C666

C666
100P_0402_50V8J

100P_0402_50V8J

4

OSC

NC

3

PCH_PWROK<15>

@

@

2

2

2

Y5

Y5

@

@

C661

C661

KSO[0..15]

KSI[0..7]

32.768KHZ_12.5PF_9H03200 413

32.768KHZ_12.5PF_9H03200 413

2

2

1

+3VALW

2

@

@

10K_0402_5%

10K_0402_5%

1

C367

C367

18P_0402_50V8J

18P_0402_50V8J

2

1

ECAGND

2

R589 10_0402_5%@

R589 10_0402_5%@

KSO1

KSO2

1

1

CMOS_ON#<22>

R608

R608

EC_RTCX1

SUSCLK_R

@

@

1

R600

R600

R604

R604

1

+EC_VCCA

1

C659

C659

1000P_0402_50V7K

1000P_0402_50V7K

2

EC_SMB_CK1

2

2.2K_0402_5%

2.2K_0402_5%

EC_SMB_DA1

2

2.2K_0402_5%

2.2K_0402_5%

SUSCLK<15>

+3VLP

1

C535

C535

100P_0402_50V8J

+3VALW

C655

0.1U_0402_16V4Z

C655

C662

0.1U_0402_16V4Z

C662

0.1U_0402_16V4Z

LPC_AD3

LPC_AD2

LPC_AD1

LPC_AD0

EC_RST#

EC_SCI#

BATT_LEN#

KSI0

KSI1

KSI2

KSI3

KSI4

KSI5

KSI6

KSI7

KSO0

KSO1

KSO2

KSO3

KSO4

KSO5

KSO6

KSO7

KSO8

KSO9

KSO10

KSO11

KSO12

KSO13

KSO14

KSO15

KSO16

KSO17

EC_SMB_CK1

EC_SMB_DA1

EC_SMB_CK2

EC_SMB_DA2

EC_SMI#

ODD_DA#

EC_INVT_PWM

EC_TACH

EC_PME#

EC_TX

EC_RX
PCH_PWROK

EC_FAN_PWM

EC_RTCX1
SUSCLK_R

SUSCLK_R

R740

R740

1

2

1

2

0.1U_0402_16V4Z

1

2

1

2

10

12
13

37

20

38

55

56
57
58

59
60

61
62

39

40
41

42
43
44

45
46

47
48

49
50
51

52
53

54

81

82

77

78
79

80

14
15

16
17
18

19

25

28
29

30
31
32

34

36

122
123

C93

C93
20P_0402_50V8

20P_0402_50V8

C654

0.1U_0402_16V4Z

C654

0.1U_0402_16V4Z

C653

0.1U_0402_16V4Z

C653

0.1U_0402_16V4Z

LPC_FRAME#<13,25>

CLK_PCI_EC<17>

PLT_RST#<17,25,26,34>

EC_SCI#<18>

BATT_LEN#<37>

EC_SMB_CK1<37,38>

EC_SMB_DA1<37,38>
EC_SMB_CK2<14,28>

EC_SMB_DA2<14,28>

PM_SLP_S3#<15>
PM_SLP_S5#<15>

EC_SMI#<18>

ODD_DA#<17,29>

EC_INVT_PWM<22>

EC_TACH<28>

EC_TX<25,32>

EC_RX<25,32>

EC_FAN_PWM<28>

1

2

GATEA20<18>

KBRST#< 18>

SERIRQ<13>

LPC_AD3<13,25>

LPC_AD2<13,25>
LPC_AD1<13,25>

LPC_AD0<13,25>

KSO16<32>

KSO17<32>

NUM_LED#: NC

R611

R611

2

0_0402_5%

0_0402_5%

100K_0402_5%

100K_0402_5%

1

2

1

C658

1000P_0402_50V7K

C658

1000P_0402_50V7K

C657

1000P_0402_50V7K

C657

1000P_0402_50V7K

1

2

1

GATEA20/GPIO00

2

KBRST#/GPIO01

3

SERIRQ

4

LPC_FRAME#

5

LPC_AD3

7

LPC_AD2

8

LPC_AD1

LPC & MISC

LPC & MISC

LPC_AD0

CLK_PCI_EC
PCIRST#/GPIO05

EC_RST#

EC_SCII#/GPIO0E

GPIO1D

KSI0/GPIO30

KSI1/GPIO31
KSI2/GPIO32
KSI3/GPIO33

KSI4/GPIO34
KSI5/GPIO35

KSI6/GPIO36
KSI7/GPIO37

KSO0/GPIO20

KSO1/GPIO21
KSO2/GPIO22

KSO3/GPIO23
KSO4/GPIO24
KSO5/GPIO25

KSO6/GPIO26
KSO7/GPIO27

KSO8/GPIO28

KSO9/GPIO29

KSO10/GPIO2A
KSO11/GPIO2B
KSO12/GPIO2C

KSO13/GPIO2D
KSO14/GPIO2E

KSO15/GPIO2F

KSO16/GPIO48

KSO17/GPIO49

EC_SMB_CK1/GPIO44

EC_SMB_DA1/GPIO45
EC_SMB_CK2/GPIO46

EC_SMB_DA2/GPIO47

6

PM_SLP_S3#/GPIO04

PM_SLP_S5#/GPIO07
EC_SMI#/GPIO08

GPIO0A
GPIO0B
GPIO0C

GPIO0D

EC_INVT_PWM/GPIO11

FAN_SPEED1/GPIO14
EC_PME#/GPIO15

EC_TX/GPIO16
EC_RX/GPIO17
PCH_PWROK/GPIO18

SUSP_LED#/GPIO19

NUM_LED#/GPIO1A

XCLKI/GPIO5D
XCLKO/GPIO5E

1

2

Int. K/B

Int. K/B
Matrix

Matrix

SM Bus

SM Bus

9

EC_VDD/VCC

PS2 Interface

PS2 Interface

PN : SA00004OB20 S IC KB9012QF A3 LQFP 128P KB CONTROLLER

ACES_50521-0084N-P01

ACES_50521-0084N-P01

EC_SMB_DA2
EC_SMB_CK2

+5VS

RST

INT#

+3VS

R02

Capsensor Board For best buy use

100P_0402_50V8J

2

+3VALW

+EC_VCCA

22

33

67

96

111

125

EC_VDD0

EC_VDD/VCC

EC_VDD/VCC

EC_VDD/VCC

EC_VDD/VCC

PWM Output

PWM Output

AD Input

AD Input

DA Output

DA Output

CPU1.5V_S3_GATE/GPXIOA00

SPI Device Interface

SPI Device Interface

SPI Flash ROM

SPI Flash ROM

BATT_CHG_LED#/GPIO52

GPIO

GPIO

BATT_LOW_LED#/GPIO55

EC_RSMRST#/GPXIOA03

EC_LID_OUT#/GPXIOA04

H_PROCHOT#_EC/GPXIOA06

GPO

GPO

GPIO

GPIO

PCH_APWROK/GPXIOA10

GPI

GPI

GND/GND

GND/GND

GND/GND

GND/GND

GND0

11

24

35

69

94

113

ECAGND

JCAP1

ME@

JCAP1

ME@

1

1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

9

GND1

10

GND2

U31

U31

GPIO0F

BEEP#/GPIO10

EC_VDD/AVCC

GPIO12

ACOFF/GPIO13

BATT_TEMP/GPIO38

GPIO39

ADP_I/GPIO3A

GPIO3B

GPIO42

IMON/GPIO43

DAC_BRIG/GPIO3C
EN_DFAN1/GPIO3D

IREF/GPIO3E

CHGVADJ/GPIO3F

EC_MUTE#/GPIO4A

USB_EN#/GPIO4B

CAP_INT#/GPIO4C

EAPD/GPIO4D

TP_CLK/GPIO4E

TP_DATA/GPIO4F

WOL_EN/GPXIOA01

HDA_SDO/GPXIOA02

VCIN0_PH/GPXIOD00

SPIDI/GPIO5B

SPIDO/GPIO5C

SPICLK/GPIO58

SPICS#/GPIO5A

ENBKL/GPIO40

PECI_KB930/GPIO41

FSTCHG/GPIO50

CAPS_LED#/GPIO53

PWR_LED#/GPIO54

SYSON/GPIO56

VR_ON/GPIO57

PM_SLP_S4#/GPIO59

PROCHOT_IN/GPXIOA05

VCOUT0_PH/GPXIOA07

BKOFF#/GPXIOA08

PBTN_OUT#/GPXIOA09

SA_PGOOD/GPXIOA11

AC_IN/GPXIOD01

EC_ON/GPXIOD02

ON/OFF/GPXIOD03

LID_SW#/GPXIOD04

SUSP#/GPXIOD05

GPXIOD06

PECI_KB9012/GPXIOD07

AGND/AGND

V18R

KB9012QF A3 LQFP 128P_ 14X14

KB9012QF A3 LQFP 128P_ 14X14

3.3V +/- 5%

Vcc

100K +/- 5%

R694

Board ID

8.2K +/- 5%

18K +/- 5%

33K +/- 5%

1

R588

R588

10K_0402_5%

10K_0402_5%

@

@

2

+3VALW

USB_ON#

PCH_PWR_EN

+3VLP

KB9012A2 work around

@

@

1

R4945

R4945

47K_0402_5%

47K_0402_5%

2

SYSON

0

1

Turbo_V <37>

PROCHOT < 37>

MAINPWON <37,39>

C492

C492

1

@

@

2

0.1U_0402_10V6K

0.1U_0402_10V6K

0
1
2

21

BEEP#

23

NOVO#

26

ACOFF

27

BATT_TEMP

63

64
65

66

BRDID

75
76

68
70

71
72

83

USB_ON#

84

INT#

85
86

TP_CLK

87

TP_DATA

88

CPU1.5V_S3_GATE

97
98

99

NTC_V_R

109

PCH_PWR_EN

119

120

126

128

73

RST

74

BATT_CHG_LED#

89

CAPS_LED#

90
91

BATT_LOW_LED#

92

SYSON

93

95

121

127

EC_LID_OUT#

100

Turbo_V

101

H_PROCHOT#_EC

102

MAINPWON_R

103

BKOFF#

104

PBTN_OUT#

105

106
107

108

ACIN
EC_ON

110

112

LID_SW#

114

SUSP#

115

PCH_HOT#_R

116

PECI_KB9012

117

118

+V18R

124

1

2

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

R792 0_0402_5%@

R792 0_0402_5%@

C667

C667

4.7U_0805_10V4Z

4.7U_0805_10V4Z

BEEP# < 30>

NOVO# <32>

ACOFF <38>

ADP_I <37,38>

IMVP_IMON <43>

EC_MUTE#

R750 0_0402_5%

R750 0_0402_5%

2

CAPS_LED# <32>

PWR_LED# <32>
BATT_LOW_LED# <32>

SYSON <34,35,40>

VR_ON <43>

PM_SLP_S4# <15>

EC_RSMRST# <15>

EC_LID_OUT# <18>

BKOFF# <22 >

PBTN_OUT# <15>

PCH_APWROK <15>
SA_PGOOD <41 >

1

2

1

2

R669 43_04 02_1%

R669 43_04 02_1%

BATT_TEMP <37>

EC_MUTE# <30>

USB_ON# <33 ,34>

EAPD <30 >

TP_CLK <32>

TP_DATA < 32>

1

R757 0_0402_5%@

R757 0_0402_5%@

R738 0_0402_5%@

R738 0_0402_5%@

2011/06/15 2012/07/11

2011/06/15 2012/07/11

2011/06/15 2012/07/11

3

+3VS

EC_FAN_PWM

R593 10K_0402_5%

R593 10K_0402_5%

1

2

CPU1.5V_S3_GATE <9 ,35,42>

ME_FLASH <13 >

NTC_V <37>

PCH_PWR_EN <35,37>

ENBKL <22>

LAN_PWR_ON# < 26>

BATT_CHG_LED# <32>

1

2

1

2

ACIN <15,38>
EC_ON <32,39>

ON/OFF <32>

LID_SW# <32>

SUSP# <9,35 ,40,41,42>

PCH_HOT# <14>

H_PECI <5,18>

EMC Request

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

VR695

AD_BID

0 V

0.436 V

0.712 V

+5VALW

R594

R594

10K_0402_5%

10K_0402_5%

2

EC_PME#

2

R599 100K_0402_1%@

R599 100K_0402_1%@

VR_HOT#<43>

min

+3VALW

1

typ

V

AD_BID

V

AD_BID

0 V0 V

0.289 V0.250 V0.216 V

0.503 V

0.819 V

VR_HOT#

H_PROCHOT#_EC

+3VALW

2

R606

R606

10K_0402_5%

10K_0402_5%

1

R609

R609

Q102

Q102

2N7002_SOT23

2N7002_SOT23

0.538 V

0.875 V

+3VALW

BRDID

R603 4.7 K_0402_5%

R603 4.7 K_0402_5%

TP_CLK

TP_DATA

BATT_TEMP

ACIN

R737

R737

1

0_0402_5%

0_0402_5%

Q37

Q37

2N7002H_SOT23-3

2N7002H_SOT23-3

1

2

@

@

0_0402_5%

0_0402_5%

R610

R610

1

2

0_0402_5% @

0_0402_5% @

D

S

D

S

1

3

@

@

G

G

2

+3VALW

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

max

MP
PVT
DVT
EVT

2

R694

R694
100K_0402_1%

100K_0402_1%

1

R02

2

R695

R695

8.2K_0402_5%

8.2K_0402_5%

1

1

2

1

R591 4.7K_0402_5%BBH@

R591 4.7K_0402_5%BBH@

1

R598 4.7K_0402_5%

R598 4.7K_0402_5%

R592 4.7K_0402_5%BBH@

R592 4.7K_0402_5%BBH@

1

1

2

C663 100P_0402_50V8 J

C663 100P_0402_50V8 J

1

2

C664 100P_0402_50V8J

C664 100P_0402_50V8J

1

2

R522 4.7K_0402_5%@

R522 4.7K_0402_5%@

2

1

D

D

2

G

G

S

S

3

LAN_WAKE# <26>

PCI_PME# <17>

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

BIOS & EC I/O Port

BIOS & EC I/O Port

BIOS & EC I/O Port

+5VS

2

2

2

1

C493

C493

47P_0402_50V8J

47P_0402_50V8J

2

LA-7987P

LA-7987P

LA-7987P

+3VS

+5VS

H_PROCHOT# <5,37>

31 50Tuesday, October 30, 2012

31 50Tuesday, October 30, 2012

31 50Tuesday, October 30, 2012

+3VS

of

of

of

1.0

1.0

1.0

KSI[0..7]

KSO[0..17]

KSO2

KSO15

KSO6

KSO8

KSO13

KSO12

KSO11

KSO10

KSO3

KSO4

KSI0

KSO0

JP3

+3VALW

EC_TX<25,31>
EC_RX<25,31>

JP3

1

1

2

2

3

3

4

4

ACES_85205-0400

ACES_85205-0400

ME@

ME@

1

C668 100P_0402_50V8J@

C668 100P_0402_50V8J@

1

C670 100P_0402_50V8J@

C670 100P_0402_50V8J@

1

C672 100P_0402_50V8J@

C672 100P_0402_50V8J@

1

C674 100P_0402_50V8J@

C674 100P_0402_50V8J@

1

C676 100P_0402_50V8J@

C676 100P_0402_50V8J@

1

C678 100P_0402_50V8J@

C678 100P_0402_50V8J@

1

C680 100P_0402_50V8J@

C680 100P_0402_50V8J@

1

C682 100P_0402_50V8J@

C682 100P_0402_50V8J@

1

C684 100P_0402_50V8J@

C684 100P_0402_50V8J@

1

C686 100P_0402_50V8J@

C686 100P_0402_50V8J@

1

2

C688 100P_0402_50V8J@

C688 100P_0402_50V8J@

1

2

C690 100P_0402_50V8J@

C690 100P_0402_50V8J@

KSI[0..7] <31>

KSO[0..17] <31>

2

2

2

2

2

2

2

2

2

2

KSO16

KSO17

KSO1

KSO7

KSI2

KSO5

KSI3

KSO14

KSI7

KSI6

KSI5

KSI4

KSO9

KSI1

1

C693 100P_0402_50V8J@

C693 100P_0402_50V8J@

1

C692 100P_0402_50V8J@

C692 100P_0402_50V8J@

1

C669 100P_0402_50V8J@

C669 100P_0402_50V8J@

1

C671 100P_0402_50V8J@

C671 100P_0402_50V8J@

1

C673 100P_0402_50V8J@

C673 100P_0402_50V8J@

1

C675 100P_0402_50V8J@

C675 100P_0402_50V8J@

1

C677 100P_0402_50V8J@

C677 100P_0402_50V8J@

1

C679 100P_0402_50V8J@

C679 100P_0402_50V8J@

1

C681 100P_0402_50V8J@

C681 100P_0402_50V8J@

1

C683 100P_0402_50V8J@

C683 100P_0402_50V8J@

1

C685 100P_0402_50V8J@

C685 100P_0402_50V8J@

1

C687 100P_0402_50V8J@

C687 100P_0402_50V8J@

1

C689 100P_0402_50V8J@

C689 100P_0402_50V8J@

1

2

C691 100P_0402_50V8J@

C691 100P_0402_50V8J@

JKB1

ME@

JKB1

1

1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

9

9

10

10

11

11

12

12

13

13

14

14

15

15

16

16

17

17

18

18

19

19

20

20

21

21

22

22

23

23

24

24

25

25

26

26

27

27

28

28

29

29

30

30

ACES_88514-3001

ACES_88514-3001

ME@

KSI1

KSI7

KSI6

KSO9

KSI4

KSI5

KSO0
KSI2
KSI3

KSO5
KSO1

KSI0

KSO2

KSO4

KSO7
KSO8

KSO6

KSO3

KSO12

KSO13
KSO14
KSO11

KSO10

31

GND

32

GND

KSO15

JKB2

ME@

JKB2

ME@

26

GND2

25

GND1

24

24

23

23

22

22

21

21

20

20

19

19

18

18

17

17

16

16

15

15

14

14

13

13

12

12

11

11

10

10

9

9

8

8

7

7

6

6

5

5

4

4

3

3

2

2

1

1

ACES_88514-2401

ACES_88514-2401

2

2

2

2

2

2

2

2

2

2

2

2

2

KSI1
KSI7

KSI6
KSO9

KSI4
KSI5
KSO0

KSI2

KSI3
KSO5
KSO1

KSI0

KSO2
KSO4

KSO7
KSO8

KSO6

KSO3

KSO12

KSO13
KSO14
KSO11

KSO10

KSO15

KSO16

KSO16<31>

KSO17

KSO17<31>

4

3

+5VS

+3VS

TP_CLK<31>

TP_DATA<31>

5

2

R889 0_0402_5%

R889 0_0402_5%
nonBBH@

nonBBH@

2

R890 0_0402_5%

R890 0_0402_5%

BBH@

BBH@

@

@

100P_0402_50V8J

100P_0402_50V8J

SW4

SW4
SMT1-05_4P

SMT1-05_4P

6

2

1

14@

14@

EC_ON<31,39>

C697

C697

SW_L

1

1

SW3SMT1-05_4P @

SW3SMT1-05_4P @

1

2

1

ON/OFFBTN#

EC_ON

1

1

C698

C698
100P_0402_50V8J

100P_0402_50V8J

2

2

@

@

PSOT24C_SOT23-3

PSOT24C_SOT23-3

R621

R621
0_0402_5%

0_0402_5%

2

R622

14@

R622

14@

0_0402_5%

0_0402_5%

2

5

6

J11

J11

2

SHORT PADS

SHORT PADS

@

@

D15

D15

15_nonBBH@

15_nonBBH@

TP_2

1

TP_3

1

3

4

R720

R720

1

0_0402_5%

0_0402_5%

1

D23

D23

DAN202UT106_SC70-3

DAN202UT106_SC70-3

2N7002_SOT23-3

2N7002_SOT23-3

2

R639

@

R639

@

10K_0402_5%

10K_0402_5%

1

C696

C696

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

3

1

4

3

JPWRB1

JPWRB1

ME@

ME@

1
2

5

3

G1

6

4

G2

LID_SW# <31>

+5VS

2

R689 0_0402_5%@

R689 0_0402_5%@

2

R690 0_0402_5%

R690 0_0402_5%

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

HP_OUTR
HP_OUTL

EXT_MIC

PLUG_IN

2

R687 0_0402_5%

R687 0_0402_5%

2

2

R533 0_0402_5%

R533 0_0402_5%

@

@

2

2

R688 0_0402_5%

R688 0_0402_5%

2

R686 0_0402_5%

R686 0_0402_5%

Title

Title

Title

ROM/KBD/PWR/CR/LED/TP Conn.

ROM/KBD/PWR/CR/LED/TP Conn.

ROM/KBD/PWR/CR/LED/TP Conn.

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

C

C

C

Date: Sheet

Date: Sheet

Date: Sheet

USB20_N11_C

1

USB20_P11_C

1

2

R683 0_0402_5%

R683 0_0402_5%

CR_GND

USB20_N2_C

@

@

USB20_P2_C

1

R534 0_0402_5%

R534 0_0402_5%

1

1

R684 0_0402_5%@

R684 0_0402_5%@

1

1

2

R685 0_0402_5%@

R685 0_0402_5%@

1

USB20_N11

USB20_P11

L57

L57

1

4

WCM-2012-900T_4P

WCM-2012-900T_4P

JLED1

ME@

JLED1

ME@

1

1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

9

9

10

10

11

11

12

12

13

GND

14

GND

ACES_88058-120N

ACES_88058-120N

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

+3VS

@

@

L47

L47

1

4

WCM-2012-900T_4P

WCM-2012-900T_4P

HP_OUTR<30>

HP_OUTL<30>

EXT_MIC<30>

PLUG_IN<30>

USB20_N11<17>
USB20_P11<17>

USB20_N2<17>

USB20_P2<17>

CX_GPIO0<30>

+MICBIASB

1

C733

C733
470P_0402_50V7K

470P_0402_50V7K

2

@

@

1

4

+5VALW
+3VALW

USB20_N2_C

2

USB20_P2_C

3

+5VS

2

3

LID_SW#

PWR_LED#
BATT_LOW_LED#

BATT_CHG_LED#

CAPS_LED#

SW_R

SW_L

CR_GND

1

1

+USB_VCCB

1

C734

C734

+

+

220U_6.3V_M

220U_6.3V_M

SF000002Y00

SF000002Y00

2

@

@

USB20_N2

USB20_P2

+3VALW

2

1

15@

15@

14@

14@

SW_R

2

1

R701

R701
100K_0402_5%

100K_0402_5%

1

D

D

S

S

3

TP_3

1

TP_1

1

14@

14@

+3VALW

R624

R624
0_0402_5%

0_0402_5%

2

R625

R625

0_0402_5%

0_0402_5%

2

2

R535

R535

100K_0402_5%

100K_0402_5%

1

ON/OFF

51_ON#

TP_CLK

TP_DATA

TP_3

TP_2

TP_1

1

14@

14@

1

@

@

1

C490

C490

@

@

2

0.1U_0402_10V6K

0.1U_0402_10V6K

TP_1

15_nonBBH@

15_nonBBH@

TP_2

1

C491

C491

@

@

2

0.1U_0402_10V6K

0.1U_0402_10V6K

ON/OFF <31>

51_ON# <36>

JTP1

ME@

JTP1

ME@

8

GND

7

GND

6

6

5

5

4

4

3

3

2

2

1

1

ACES_88058-060N

ACES_88058-060N

NOVO#<31>

ON/OFF

51_ON#

+3VLP

2

@

@

3

2

@

@

2

G

G

Q106

@

Q106

@

2

R627

R627

0_0402_5%

0_0402_5%

2

R619

R619

0_0402_5%

0_0402_5%

SW5

SW5

SMT1-05_4P

SMT1-05_4P

5

6

R532

@

R532

@

100K_0402_5%

100K_0402_5%

NOVO#

R725

R725

1

@

@

0_0402_5%

0_0402_5%

1

R722

R722
0_0402_5%

0_0402_5%

+3VLP

2

@

@

2

2

R642

R642
100K_0402_5%

100K_0402_5%

1

1

2

BATT_LOW_LED#<31>

BATT_CHG_LED#<31>

+3VALW

PWR_LED#<31>

CAPS_LED#<31>

1

R614 0_0402_5%

R614 0_0402_5%

D26

D26

2

1

3

DAN202UT106_SC70-3

DAN202UT106_SC70-3

PWR_LED#

BATT_LOW_LED#

BATT_CHG_LED#

CAPS_LED#

@

@

2

C702

14@

C702

14@

0.1U_0402_16V4Z

0.1U_0402_16V4Z

NOVO_BTN#

1

1

1

+VCC_LID

1

2

S-5711ACDL-M3T1S_SOT23-3

S-5711ACDL-M3T1S_SOT23-3

14@

14@

LED1

LED1

19-213A-T1D-CP2Q2HY-3T_WHITE

19-213A-T1D-CP2Q2HY-3T_WHITE

LED2

14@

LED2

14@

HT-191UD5_AMBER

HT-191UD5_AMBER

LED5

14@

LED5

14@

1

19-213A-T1D-CP2Q2HY-3T_WHITE

19-213A-T1D-CP2Q2HY-3T_WHITE

14@

14@

LED6

LED6

19-213A-T1D-CP2Q2HY-3T_WHITE

19-213A-T1D-CP2Q2HY-3T_WHITE

1

R615

R615
100K_0402_5%

100K_0402_5%

2

VDD

OUTPUT

GND

1

U34

U34

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTR ONICS, INC. AND CONTAINS CON FIDENTIAL

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTR ONICS, INC. AND CONTAINS CON FIDENTIAL

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTR ONICS, INC. AND CONTAINS CON FIDENTIAL

AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D

AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D

AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

2

2

2

2

3

14@

14@

3

1

2

2

2

R765

R765
300_0402_5%

300_0402_5%

2

2

NOVO_BTN#
ON/OFFBTN#

2

R623

R623

300_0402_5%

300_0402_5%

R764

R764
470_0402_5%

470_0402_5%

300_0402_5%

300_0402_5%

+5VALW

1
2

3
4

E-T_7182K-F04N-00R

E-T_7182K-F04N-00R

D24

@

D24

@

PJSOT24C 3P C/A SOT-23

PJSOT24C 3P C/A SOT-23

+5VALW

1

14@

14@

+3VALW

1

14@

14@

1

14@

14@

+5VALW

+5VS

1

R2

14@

R2

14@

LID_SW#

2

C703

14@

C703

14@

10P_0402_50V8J

10P_0402_50V8J

1

2011/06/15 2012/07/11

2011/06/15 2012/07/11

2011/06/15 2012/07/11

ACES_51524-0160N-001

ACES_51524-0160N-001

@

@

1

4

LA-7987P

LA-7987P

LA-7987P

JCR1

JCR1

1

1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

9

9

10

10

11

11

12

12

13

13

14

14

15

15

16

16

17

GND

18

GND

USB20_N11_C

2

USB20_P11_C

3

ME@

ME@

2

3

1.0

1.0

1.0

of

32 50Tuesday, October 30, 2012

of

32 50Tuesday, October 30, 2012

of

32 50Tuesday, October 30, 2012

A

B

C

D

E

1

2

+5VALW

R02

U36

U36

1

C713 0.1U_0402_16V4Z

C713 0.1U_0402_16V4Z

3

1

2

USB_ON#<31,34>

GND

2

VIN

3

VIN

4

EN

G547I2P81U_MSOP8

G547I2P81U_MSOP8

VOUT

VOUT

VOUT

FLG

+USB_VCCB

8

7

6

5

RIGHT USB PORT X1

USB_OC1# <17>

1

C716

C716

1000P_0402_50V7K@

1000P_0402_50V7K@

2

C714

C714

220U_6.3V_M

220U_6.3V_M

6.3Φ * 5.9
SF000001500

+USB_VCCB

+USB_VCCB

1

+

+

2

1

C715

C715
470P_0402_50V7K

470P_0402_50V7K

2

USB20_N9

USB20_P9

W=80mils

Right Ext.USB Conn.

USB20_N9<17>

USB20_P9<17>

4

4

1

1

L66

L66

USB20_N9

USB20_P9

USB20_N9_C

3

3

USB20_P9_C

2

2

WCM-2012-900T_ 4P

WCM-2012-900T_ 4P

R869 0_0402_5%@

R869 0_0402_5%@

2

R868 0_0402_5%@

R868 0_0402_5%@

2

JUSB3

ME@

JUSB3

ME@

8

GND

7

GND

6

6

5

1

1

USB20_N9_C

USB20_P9_C

2

3

D25

@

D25

@

1

PJDLC05_SOT23-3

PJDLC05_SOT23-3

5

4

4

3

3

2

2

1

1

ACES_88058-060N

ACES_88058-060N

1

2

3

4

Security Classification

Security Classification

Security Classification

2011/06/15 2012/07/11

2011/06/15 2012/07/11

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2011/06/15 2012/07/11

C

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Doc ument Number Rev

Size Doc ument Number Rev

Size Doc ument Number Rev

B

B

B

Date: Sheet

Date: Sheet

D

Date: Sheet

Compal Electronics, Inc.

USB ext. ports

USB ext. ports

USB ext. ports

LA-7987P

LA-7987P

LA-7987P

E

of

33 50Tuesday, October 30, 2012

of

33 50Tuesday, October 30, 2012

of

33 50Tuesday, October 30, 2012

4

1.0

1.0

1.0

+5VALW

10U_0603_6.3V6M

10U_0603_6.3V6M

1U_0603_10V6K

1U_0603_10V6K

C863

EU3@

C863

EU3@

1

1

2

2

D

Vout=0.8(1+10K/3 2.4K)

1.042 ~ 1 .0469 ~ 1.0519V
Spec: 0.9975 ~ 1 .05 ~ 1.1025

C864

C864

+5VALW

+5VALW

+1.5V

SYSON

2

R1150 5.1K_0402_ 1%

R1150 5.1K_0402_ 1%

EU3@

EU3@

EU3@

EU3@

+1.5V

+3VALW to +3V Transfer

+3VALW

SYSON<31,35,40>

C

PCIE_W AKE#<15,25,26>

R02

SSM3K70 02FU_SC70-3

SSM3K70 02FU_SC70-3

PLT_RST#<17,2 5,26,31>

B

CLKREQ_U SB30#<14>

A

R02

SSM3K70 02FU_SC70-3

SSM3K70 02FU_SC70-3

5

+1.5V to +1.05V Transfer

U52

U52
EU3@

EU3@

6

VCNTL

1

1

430K_0 402_5%

430K_0 402_5%

5

VIN

9

VIN

8

EN

7

POK

APL593 0KAI-TRG_SO8

APL593 0KAI-TRG_SO8

U30

EU3@

U30

EU3@

3

VIN

4

VIN/CE

2

GND

RT9701-PB_ SOT23-5

RT9701-PB_ SOT23-5

+3V

1

D

D

Q125

@

Q125

@

EU3@

EU3@

R747

R747

+3V

VOUT

VOUT

2

G

G

2

VOUT
VOUT

FB

GND

1

0.2A

1

5

+3V

2

1

PCIE_W AKE#_USB3

3

S

S

1

2

PLT_RST#_US B3

1

2

+3V

3
4

2

1

R1151

R1151

32.4K_0 402_1%

32.4K_0 402_1%
EU3@

EU3@

2

+3V

R1187

R1187

10K_04 02_5%

10K_04 02_5%

EU3@

EU3@

C837

EU3@

C837

EU3@

1000P_ 0402_50V7 K

1000P_ 0402_50V7 K

C832

1U_0402_6.3V6K

C832

1U_0402_6.3V6K

EU3@

EU3@

1

R1149

R1149

10K_04 02_1%

10K_04 02_1%

EU3@

EU3@

R03

2

R745

EU3@

R745

EU3@

10K_04 02_5%

10K_04 02_5%

2

CLKREQ_U SB3

G

G

3

D

S

D

S

Q121

Q121

+3V

R1177

10K_0402_5%

R1177

10K_0402_5%

1

1

C836

C836
1000P_ 0402_50V7 K

1000P_ 0402_50V7 K

2

EU3@

EU3@

1

C895

EU3@

C895

EU3@

.1U_040 2_16V K

.1U_040 2_16V K

2

8

7
6

5

AT25F512A N-10SU-2.7_S O8~D

AT25F512A N-10SU-2.7_S O8~D

U53

U53

VCC

HOLD#
SCK

SI

EU3@

EU3@

10K_04 02_5%

10K_04 02_5%

CS#

SO

WP#

GND

EU3@

EU3@

R1175

R1175

1
2
3

4

EU3@

EU3@

1

EU3@

EU3@

+3V

2

1

SPI_CLK_ USB
USB_SO_ SPI_SI

5

2

+1.05V

1

2

PCIE_PTX_ C_DRX_P4<1 4>
PCIE_PTX_ C_DRX_N4<14>

SMIB_R

+3V

2

2

1

USB_SI_S PI_SO

1

10U_0603_6.3V6M

10U_0603_6.3V6M

C886

C886

EU3@

EU3@

+3V

C887

C887

CLK_PCIE _USB30<14>

CLK_PCIE _USB30#<1 4>

PCIE_PRX _DTX_P4<14>
PCIE_PRX _DTX_N4<14>

SMIB<17>

1

10K_04 02_5%

10K_04 02_5%

EU3@

EU3@

R1176

R1176

47K_04 02_5%

47K_04 02_5%

SPI_CS_U SB#

1

2

EU3@

EU3@

R267

R267

EU3@

EU3@

10U_0603_6.3V6M

10U_0603_6.3V6M

C816

C816

1

2

EU3@

EU3@

0.1U_0402_16V7K

0.1U_0402_16V7K

2

C817

C817

+3V

12P_04 02_50V8J

12P_04 02_50V8J

4

+1.05VDD

22U_0603_6.3V6M

22U_0603_6.3V6M

C794

C794

C796

C796

1

2

EU3@

EU3@

C810

C810

0.1U_0402_16V7K

0.1U_0402_16V7K

C809

0.01U_0402_25V7K

C809

0.01U_0402_25V7K

1

1

2

2

EU3@

EU3@

EU3@

EU3@

.1U_040 2_16V7K @

.1U_040 2_16V7K @

1

2

R770

@

R770

@

0_0402 _5%

0_0402 _5%

1

R1172 300K_0402 _5%EU3@

R1172 300K_0402 _5%EU3@

1

1

D67

D67

1SS355TE -17_SOD323 -2

1SS355TE -17_SOD323 -2

EU3@

EU3@

+3V

C897

C897

24MHZ_12 PF_X5H0240 00DC1H

24MHZ_12 PF_X5H0240 00DC1H

EU3@

EU3@

4

22U_0603_6.3V6M

22U_0603_6.3V6M

1

2

EU3@

EU3@

0.01U_0402_25V7K

0.01U_0402_25V7K

1

2

EU3@

EU3@

2

2

2

1

2

C802

C802

C799

0.1U_0402_16V7K

C799

0.1U_0402_16V7K

1

2

EU3@

EU3@

C811

0.01U_0402_25V7K

C811

0.01U_0402_25V7K

1

2

EU3@

EU3@

PCIE_PRX _C_DTX_P4

@

@

PCIE_PRX _C_DTX_N4

1

C834.1U_0402_1 6V7K

C834.1U_0402_1 6V7K

1

C835

C835

PLT_RST#_US B3

PCIE_W AKE#_USB3

CLKREQ_U SB3

2

1U_0603_10V6K

1U_0603_10V6K

2

1

2

EU3@

EU3@

R1180

R1180

100_04 02_5%

100_04 02_5%

Y7

Y7

1

EU3@

EU3@

0.1U_0402_16V7K

0.1U_0402_16V7K

1

2

EU3@

EU3@

C812

C812

1

2

EU3@

EU3@

C894

C894

SPI_CLK_USB

SPI_CS_U SB#

USB_SO_ SPI_SI

EU3@

EU3@

USB_SI_S PI_SO

1

2

2

1

C898

C898
15P_04 02_50V8J

15P_04 02_50V8J
EU3@

EU3@

2

C805

0.1U_0402_16V7K

C805

0.1U_0402_16V7K

1

2

EU3@

EU3@

C813

C813

0.01U_0402_25V7K

0.01U_0402_25V7K

1

2

EU3@

EU3@

SMIB_R

USB3_XT1

USB3_XT2

C798

0.01U_0402_25V7K

C798

0.01U_0402_25V7K

1

2

EU3@

EU3@

0.01U_0402_25V7K

0.01U_0402_25V7K

U32

U32
EU3@

EU3@

47
48
10

11

24

23

USB_ON#<31,33>

C800

0.01U_0402_25V7K

C800

0.01U_0402_25V7K

C797

0.01U_0402_25V7K

C797

0.01U_0402_25V7K

C803

0.01U_0402_25V7K

C803

0.01U_0402_25V7K

1

1

2

EU3@

EU3@

+3V

1

FBMA-L11-2 01209-221 LMA30T_0805

FBMA-L11-2 01209-221 LMA30T_0805

+3V

1

PECLKP

2

PECLKN

4

PETXP

5

PETXN

7

PERXP

8

PERXN

PERSTB
PEWAKEB
PECREQB

46

SMIB

1

2

2

EU3@

EU3@

EU3@

EU3@

L60

EU3@

L60

EU3@

2

+1.05V

22

12

43

34

VDD33

VDD33

VDD33

VDD33

UPD72020 2K8-701-BA A_QFN48_7X 7

UPD72020 2K8-701-BA A_QFN48_7X 7

PONRSTB

15

SPISCK

14

SPICSB

16

SPISI

13

SPISO

XT1

XT2

27

IC(L)

C704

C704

.1U_040 2_16V7K

.1U_040 2_16V7K

1

C808

0.01U_0402_25V7K

C808

0.01U_0402_25V7K

C806

0.01U_0402_25V7K

C806

0.01U_0402_25V7K

1

1

2

2

EU3@

EU3@

EU3@

EU3@

Close to U32.3

+3AVDD

C888

10U_0603_6.3V6M

C888

10U_0603_6.3V6M

1

2

EU3@

EU3@

2

R766

R766
0_0603 _5%

0_0603 _5%
EU3@

EU3@

1

21

9

6

VDD10

VDD10

VDD10

GND

49

+5VALW

2

1

@

@

R566 0_0402_ 5%

R566 0_0402_ 5%

3

C821

0.1U_0402_16V7K

C821

0.1U_0402_16V7K

C825

C825

1

1

2

2

EU3@

EU3@

EU3@

EU3@

+1.05VDD

39

33

30

42

VDD10

VDD10

VDD10

2A/Active Low

1

2

3

4

2

3

Close to U32.25

C827

C827

0.01U_0402_25V7K

0.01U_0402_25V7K

C823

0.1U_0402_16V7K

C823

0.1U_0402_16V7K

1

2

EU3@

EU3@

+3AVDD

25

3

VDD10

AVDD33

AVDD33

U3TXDP2

U3TXDN2

U2DM2

U2DP2

U3RXDP2

U3RXDN2

OCI2B

OCI1B

PPON2

PPON1

U3TXDP1

U3TXDN1

U2DM1

U2DP1

U3RXDP1

U3RXDN1

RREF

U35

U35

GND

VOUT

VOUT

VIN

VIN

VOUT

FLG

EN

G547I2P 81U_MSOP8

G547I2P 81U_MSOP8

2

D27

D27
@

@

9

10

10

8

9

9

7

7

7

6

6 5

6 5

U3RXDN1

1

1

U3RXDP1

2

2

U3TXDN1

4

4

U3TXDP1

3

3

8

8

U3RXDN1

U3RXDP1

U3TXDN1

U3TXDP1

0.01U_0402_25V7K

0.01U_0402_25V7K

YSCLAMP05 24P_SLP2 510P8-10-9

YSCLAMP05 24P_SLP2 510P8-10-9

1

2

EU3@

EU3@

U3RXDN2

1

U3RXDP2

2

U3TXDN2

4

U3TXDP2

5

3

YSCLAMP05 24P_SLP2 510P8-10-9

YSCLAMP05 24P_SLP2 510P8-10-9

Intel_PCH_USB2.0

Intel_PCH_USB3.0

U3TXDP2_R

37

U3TXDN2_R

38

U2DN2_R

45

U2DP2_R

U3RXDP2_ R

44

40

U3RXDN2_R

41

OCI2B
OCI1B

17

19

18

20

U3TXDP1_R

28

U3TXDN1_R

U2DN1_R

29

36

U2DP1_R

U3RXDP1_ R

35

31

U3RXDN1_R

32

R1152

R1152

1

26

1.6K_04 02_1%

1.6K_04 02_1%

+USB3_VCC A

8

7

6

5

C736

C736

220U_6. 3V_M

220U_6. 3V_M
SF00000 2Y00

SF00000 2Y00

Security Classification

Security Classification

Security Classification

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTR ONICS, INC. AND CONTAINS CON FIDENTIAL

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTR ONICS, INC. AND CONTAINS CON FIDENTIAL

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTR ONICS, INC. AND CONTAINS CON FIDENTIAL

AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D

AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D

AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

C846 .1 U_0402_16 V7K@

C846 .1 U_0402_16 V7K@

R1161

EU3@

R1161

EU3@

1

1

R1162

R1162

EU3@

EU3@

2

W=80mils

1

+

+

2

Issued Date

Issued Date

Issued Date

1

2

C844 .1U_0402_16V7 K@

C844 .1U_0402_16V7 K@

1

2

2

R774 0_0402_5%@

R774 0_0402_5%@

2

R776 0_0402_5%@

R776 0_0402_5%@

2

R772 0_0402_ 5%@

R772 0_0402_ 5%@

2

R763 0_0402_5%@

R763 0_0402_5%@

2

10K_04 02_5%

10K_04 02_5%

2

10K_04 02_5%

10K_04 02_5%

EU3@

EU3@

C843 .1 U_0402_16 V7K@

C843 .1 U_0402_16 V7K@

C845 . 1U_0402_1 6V7K@

C845 . 1U_0402_1 6V7K@

2

R759 0_0402_5%@

R759 0_0402_5%@

2

R754 0_0402_5%@

R754 0_0402_5%@

2

R760 0_0402_5%@

R760 0_0402_5%@

2

R762 0_0402_5 %@

R762 0_0402_5 %@

R570

R570

1

0_0402 _5%

0_0402 _5%

1

C735

C735

470P_0 402_50V7K

470P_0 402_50V7K

2

U3TXDP2_L

U3TXDN2_L

U2DN2_L

1

U2DP2_L

1

U3RXDP2_ L

1

U3RXDN2_L

1

+3V

Intel_PCH_USB2.0

1

1

1

U3TXDP1_L

2

U3TXDN1_L

U2DN1_L

2

U2DP1_L

U3RXDP1_ L

1

1

U3RXDN1_L

1

Intel_PCH_USB3.0

USB_OC0# <17>

2

@

@

Place TX AC coup ling Cap (C843~ C850). Close to connector

Compal Secret Data

Compal Secret Data

2011/06/15 201 2/07/11

2011/06/15 201 2/07/11

2011/06/15 201 2/07/11

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

@

@

9

10

10

8

9

9

7

7

7

6

6 5

6 5

USB20_N1<17>

USB20_P 1<17>

USB3_RX2 _N<17 >

USB3_RX2 _P<17>

USB3_TX2_ N<17>

USB3_TX2_ P<17 >

USB20_N0<17>

USB20_P 0<17>

USB3_RX1 _N<17>

USB3_RX1 _P<17>

USB3_TX1_ N<17>

USB3_TX1_ P<17>

D30

D30

U3RXDN2

1

1

1

U3RXDP2

2

2

2

U3TXDN2

4

4

4

U3TXDP2

5

3

3

3

8

8

For EMI request

2

R709

R709

2

IU3@

IU3@

0_0402 _5%

0_0402 _5%

1

2

0_0402 _5%

0_0402 _5%

R773

R773

2

IU3@

IU3@

0_0402 _5%

0_0402 _5%

U2DN1

R730

R730

IU3@

IU3@

0_0402 _5%

0_0402 _5%

2

0_0402 _5%

0_0402 _5%

2

0_0402 _5%

0_0402 _5%

1

C848

C848

2

R741

R741

IU3@

IU3@

2

1

1

3

2

1

U2DN2_L

1

R640

R640

U2DP2_LU2DP2_L

1

IU3@

IU3@

U3RXDN2_L

1

U3RXDP2_ L

R714

R714

1

IU3@

IU3@

U3TXDN2_L

C850

IU3@

C850

IU3@

2

.1U_040 2_16V7K

.1U_040 2_16V7K

U3TXDP2_L

2

.1U_0402 _16V7K

.1U_0402 _16V7K

IU3@

IU3@

U2DN1_L

0_0402 _5%

0_0402 _5%

1

IU3@

IU3@
R755

U2DP1_L

R755

1

U3RXDN1_L

1

U3RXDP1_ L

R739

R739

1

IU3@

IU3@

0_0402 _5%

0_0402 _5%

U3TXDN1_L

.1U_040 2_16V7K

.1U_040 2_16V7K
C849

IU3@

C849

IU3@

2

U3TXDP1_L

2

C847

IU3@

C847

IU3@

.1U_040 2_16V7K

.1U_040 2_16V7K

1

D22

D22

@

@

6

I/O4

I/O2

5

VDD

GND

4

I/O3

I/O1

AZC099-04 S.R7G_SOT23 -6

AZC099-04 S.R7G_SOT23 -6

WCM-201 2-900T_4P

WCM-201 2-900T_4P

1

1

4

4

L55

L55

1

R721

R721
0_0402 _5%

0_0402 _5%

1

0_0402 _5%

0_0402 _5%

WCM-201 2-900T_4P

WCM-201 2-900T_4P

1

1

4

4

L54

L54

1

1

WCM-201 2-900T_4P

WCM-201 2-900T_4P

1

1

4

4

L53

L53

1

R638

R638
0_0402 _5%

0_0402 _5%

1

0_0402 _5%

0_0402 _5%

WCM-201 2-900T_4P

WCM-201 2-900T_4P

1

1

4

4

L51

L51

1

R562

R562

0_0402 _5%

0_0402 _5%

1

R564

R564
0_0402 _5%

0_0402 _5%

WCM-201 2-900T_4P

WCM-201 2-900T_4P

1

1

4

4

L50

L50

1

WCM-201 2-900T_4P

WCM-201 2-900T_4P

1

1

4

4

1

R546

@

R546

@

0_0402 _5%

0_0402 _5%

L49

L49

Title

Title

Title

Size D ocument Numb er Rev

Size D ocument Numb er Rev

Size D ocument Numb er Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

U2DP2

+5VALW

U2DP1

1

2

R728

@

R728

@

0_0402 _5%

0_0402 _5%

U2DN2

2

2

U2DP2

3

3

2

@

@

2

R742

@

R742

@

2

3

R743

R743

0_0402 _5%

0_0402 _5%

R636

@

R636

@

0_0402 _5%

0_0402 _5%

2

3

2

@

@

R563

@

R563

@

2

@

@

@

@

R561

R561

0_0402 _5%

0_0402 _5%

1

R565

R565
0_0402 _5%

0_0402 _5%

2

2

3

@

@

U3TXDN2

2

2

3

@

@

U3RXDN2

U3RXDP2

2

2

2

U3TXDP2

3

2

U2DN1

2

U2DP1

3

U3RXDN1

2

U3RXDP1

3

2

2

@

@

U3TXDN1

U3TXDP1

3

+USB3_VCC A

W=80mils

U3TXDP2

U3TXDN2

U2DP2

U2DN2
U3RXDP2

U3RXDN2

2

3

+USB3_VCC A

W=80mils

U3TXDP1

U3TXDN1

U2DP1

U2DN1
U3RXDP1

U3RXDN1

2

2

3

Compal Electronics, Inc.

USB3.0/Left USB Ports

USB3.0/Left USB Ports

USB3.0/Left USB Ports

1

LA-7987P

LA-7987P

LA-7987P

D31

D31

@

@

VDD

I/O4

I/O3

U2DN2

6

5

+5VALW

4

3

I/O2

2

GND

1

I/O1

AZC099-04 S.R7G_SOT23 -6

AZC099-04 S.R7G_SOT23 -6

LP2

JUSB2

JUSB2

9

SSTX+

1

VBUS

8

SSTX-

3

D+

7

GND

2

D-

6

SSRX+

4

GND

5

SSRX-

TAITW_PUB AU1-09FNLSCNN 4H0

TAITW_PUB AU1-09FNLSCNN 4H0

ME@

ME@

LP1

JUSB1

JUSB1

9

SSTX+

1

VBUS

8

SSTX-

3

D+

7

GND

2

D-

6

SSRX+

4

GND

5

SSRX-

TAITW_PUB AU1-09FNLSCNN 4H0

TAITW_PUB AU1-09FNLSCNN 4H0

ME@

ME@

10

GND

11

GND

12

GND

13

GND

of

34 50Tuesday, October 30 , 2012

of

34 50Tuesday, October 30 , 2012

of

34 50Tuesday, October 30 , 2012

GND

GND

GND

GND

D

C

B

A

1.0

1.0

1.0

A

B

C

D

E

+5VALW TO +5VS

+5VALW

1

C720

1

+1.8VS

1

2

R655

R655
470_0603_5%

470_0603_5%
@

@

2

1

D

D

SUSP

2

G

G

Q113

Q113

S

S

3

2N7002_SOT23

2N7002_SOT23
@

@

Check

220K_0402_5%

220K_0402_5%

SUSP<9,42>

DTC124EKAT146_SC59-3

3

DTC124EKAT146_SC59-3

SUSP#< 9,31,40,41,42>

10U_0603_6.3V6M

10U_0603_6.3V6M

SUSP

+1.5V

1

R656

R656

470_0603_5%

470_0603_5%

@

@

2

1

D

D

G

G

Q114

Q114

S

S

3

2N7002_SOT23

2N7002_SOT23

@

@

+RTCVCC

R652

R652

SUSP

1

R1110

R1110

100K_0402_5%

100K_0402_5%

2

2

C720

2

G

G

SYSON#

2

1

Q117

Q117

2

@

@

IN

+VSB

1

2

2

R646

R646
150K_0402_5%

150K_0402_5%

5VS_GATE

1

D

D

Q110

Q110

2N7002_SOT23

2N7002_SOT23

S

S

3

+5VALW

1

2

1

3

@

@

R653

R653

100K_0402_5%

100K_0402_5%

OUT

GND

U38

U38

DMN3030LSS-13_SOP8L-8

DMN3030LSS-13_SOP8L-8

8

7

6

5

R649

R649

2

82K_0402_5%

82K_0402_5%

+1.05VS

1

R659

R659

470_0603_5%

470_0603_5%

@

@

2

1

D

D

2

G

G

Q116

Q116

S

S

3

2N7002_SOT23

2N7002_SOT23
@

@

SYSON<31,34,40>

+5VS

1

2

4

5VS_GATE_R

1

1

3

2

1

C726

C726

0.01U_0603_50V7K

0.01U_0603_50V7K

2

+0.75VS

C721

C721

10U_0603_6.3V6M

10U_0603_6.3V6M

R02

1

C722

C722
1U_0603_10V4Z

1U_0603_10V4Z

2

1

R658

R658

22_0603_5%

SUSP

2

1

D

D

S

S

3

22_0603_5%

2

G

G

Q115

Q115
2N7002_SOT23

2N7002_SOT23

2

SUSP

R91 0_0402_5%@

R91 0_0402_5%@

For Intel S3 Power Reduction.

+5VALW

1

@

@

R654

R654

100K_0402_5%

100K_0402_5%

SYSON#

@

DTC124EKAT146_SC59-3

DTC124EKAT146_SC59-3

@

SYSON

Q119

Q119

2

1

OUT

2

IN

GND

3

1

1

2

1

D

D

S

S

3

R644

R644
470_0603_5%

470_0603_5%
@

@

SUSP

2

G

G

Q107

Q107
2N7002_SOT23

2N7002_SOT23
@

@

CPU1.5V_S3_GATE <9,31 ,42>

10U_0603_6.3V6M

10U_0603_6.3V6M

SUSP

SUSP#

2N7002_SOT23

2N7002_SOT23

+1.5V

Q112

Q112

2

G

G

C723

C723

2

G

G

+3VALW

+VSB

1

2

1

2

+3VALW

1

2

1

R647

R647
470K_0402_1%

470K_0402_1%

2

1

D

D

S

S

3

C717

C717
10U_0603_6.3V6M

10U_0603_6.3V6M

100K_0402_5%

100K_0402_5%

R648

R648

1

D

D

S

S

3

+3VALW TO +3VS

U39

U39

DMN3030LSS-13_SOP8L-8

DMN3030LSS-13_SOP8L-8

8

7

6

5

4

2

R650

1

R650
0_0402_5%

0_0402_5%

@

@

Q111

Q111

2N7002_SOT23

2N7002_SOT23

+1.5V to +1.5VS

Q8

Q8

PMV65XP_SOT23-3~D

PMV65XP_SOT23-3~D

D

S

D

S

1

3

G

G

2

1.5VS_GATE

R651

R651

1

2

0_0402_5%

0_0402_5%

1

C728

C728

2

0.1U_0603_25V7K

0.1U_0603_25V7K

+3VS

1

2

3

1

C727

C727

0.01U_0603_50V7K

0.01U_0603_50V7K

2

+1.5VS

1

C729

C729

0.1U_0603_25V7K

0.1U_0603_25V7K

2

1

C724

C724
10U_0603_6.3V6M

10U_0603_6.3V6M

2

1

C718

C718
10U_0603_6.3V6M

10U_0603_6.3V6M

2

1

C725

C725

1U_0603_10V4Z

1U_0603_10V4Z

2

1

C719

C719
1U_0603_10V4Z

1U_0603_10V4Z

2

1

2

1

D

D

S

S

3

1

2

1

D

D

S

S

3

R645

R645

470_0603_5%

470_0603_5%

@

@

SUSP

2

G

G

Q108

Q108
2N7002_SOT23

2N7002_SOT23
@

@

R643

R643
470_0603_5%

470_0603_5%
@

@

SUSP

2

G

G

Q109

Q109

2N7002_SOT23

2N7002_SOT23

@

@

+3VALW TO +3VALW (PCH AUX Power)

10U_0603_6.3V6M

10U_0603_6.3V6M

PCH_PWR_EN#

PCH_PWR_EN<3 1,37>

+3VALW

C782

C782

@

@

+VSB

1

R778

R778
47K_0402_5%@

47K_0402_5%@

2

1

D

D

2

G

G

S

S

3

@

@

PCH_PWR_EN#

PCH_PWR_EN

R781

R781

100K_0402_5%

100K_0402_5%

2

DMN3030LSS-13_SOP8L-8

DMN3030LSS-13_SOP8L-8

8
7

1

6
5

2

Q120

Q120
2N7002_SOT23

2N7002_SOT23

100K_0402_5%

100K_0402_5%

1

2N7002_SOT23

2N7002_SOT23

2

PJ1

PJ1

JUMP_43X118

JUMP_43X118

2

1

+5VALW

R780

R780

2

G

G

Q124

Q124

@

@

U40

U40

4

R779

R779
0_0402_5%

0_0402_5%

1

D

D

S

S

3

1

1

2

+3V_PCH

@

@

1
2

3

@

@

1

C781

C781

0.1U_0603_25V7K

0.1U_0603_25V7K

2

@

@

R02

1

C780

C780

1U_0603_10V4Z

1U_0603_10V4Z

2

1

@

@

C783

C783

10U_0603_6.3V6M

10U_0603_6.3V6M

2

1

R777

R777

470_0603_5%

470_0603_5%

2

1

D

D

S

S

3

@

@

PCH_PWR_EN#

2

G

G

Q118

@

Q118

@

2N7002_SOT23

2N7002_SOT23

1

2

3

4

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2011/06/15 2012/07/11

2011/06/15 2012/07/11

2011/06/15 2012/07/11

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

D

Date: Sheet

Compal Electronics, Inc.

DC Interface

DC Interface

DC Interface

LA-7987P

LA-7987P

LA-7987P

E

35 50Tuesday, October 30, 2012

35 50Tuesday, October 30, 2012

35 50Tuesday, October 30, 2012

of

of

of

4

1.0

1.0

1.0

5

4

3

2

1

DC030006J00

PF101

PF101

7A_24VDC _429007.WRM L

7A_24VDC _429007.WRM L

APDIN

4

4

3

3

2

4602-Q04C-09 R 4P P2.5@

4602-Q04C-09 R 4P P2.5@

JDCIN1

JDCIN1

2

1

1

D

1

APDIN1

2

1

2

PC101

PC101

SMB30255 00YA_2P

SMB30255 00YA_2P

1

2

1000P_0402_50V7K

1000P_0402_50V7K

PL101

PL101

1

2

100P_0402_50V8J

100P_0402_50V8J

PC102

PC102

VIN

1

1

2

2

100P_0402_50V8J

100P_0402_50V8J

PC104

PC104

PC103

PC103

1000P_0402_50V7K

1000P_0402_50V7K

D

VIN

Unpop for KB9012

PJ101

PU102

PU102

VOUT

51ON-2

2

1

@

@

GND

PJ101

JUMP_43X 39@

JUMP_43X 39@

1

2

1

2

PQ104

PQ104

TP0610K-T1 -E3_SOT23-3

TP0610K-T1 -E3_SOT23-3

3

PC112

PC112

0.22U_0603_25V7K

0.22U_0603_25V7K

51ON-3

@

@

CHGRTCIN

2

VIN

1

2

1

PR128

PR128

200_0603_5 %

200_0603_5 %

2

@

@

1

PC115

PC115
1U_0805_2 5V6K

1U_0805_2 5V6K

2

@

@

PD104

@

PD104

@

LL4148_LL3 4-2

CHGRTCP

LL4148_LL3 4-2

2

PR120

PR120

200_0603_5 %

200_0603_5 %

1

@

@

100K_0402_ 1%

100K_0402_ 1%

PR124

PR124

22K_0402_1 %

22K_0402_1 %

1

@

@

RTCVREF

3.3V

1

@

@

PC114

PC114
10U_0603_ 6.3V6M

10U_0603_ 6.3V6M

2

1

2

1

PR123

PR123

2

2

@

@

@

@

APL5156-33 DI-TRL_SOT89-3

APL5156-33 DI-TRL_SOT89-3

3

C

+3VLP

2

PR127

PR127

0_0402_5%

0_0402_5%

1

B

BATT+

51_ON#<32>

PR118

PR118

68_1206_5%

68_1206_5%

1

2

@

@
PD103

PD103

LL4148_LL3 4-2

LL4148_LL3 4-2

1

51ON-1

1

2

@

@

1

PC113

PC113

0.1U_0603_2 5V7K

0.1U_0603_2 5V7K

2

@

@

1

2

@

@

PR119

PR119
68_1206_5%

68_1206_5%

C

VS

B

+CHGRTC

JRTC2

JRTC2

- +

2

PR131

PR131

560_0603_5 %

560_0603_5 %

1

1

2

PR132

PR132

560_0603_5 %

560_0603_5 %

1

2

PD109

PD109

RB751V-40 _SOD323-2

RB751V-40 _SOD323-2

1

2

+RTCBAT T

MAXEL_M L1220T10@

MAXEL_M L1220T10@

RTC Battery

A

5

1

2

PD108

PD108

RB751V-40 _SOD323-2

RB751V-40 _SOD323-2

4

RTCVREF

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

3

2010/01/25 2012/07/11

2010/01/25 2012/07/11

2010/01/25 2012/07/11

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Custom

Custom

Custom

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

Title

Title

Title

PWR DCIN / Vin Detector /Pre-charge

PWR DCIN / Vin Detector /Pre-charge

PWR DCIN / Vin Detector /Pre-charge

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

LA-7987P

LA-7987P

LA-7987P

1

of

36 50Tuesday, October 30, 201 2

of

36 50Tuesday, October 30, 2012

of

36 50Tuesday, October 30, 2012

A

1.0

1.0

1.0

5

4

3

2

1

VMB2

JBATT1

JBATT1

1

1

2

2

3

D

C

4
5

6

7

GND

GND

TYCO_1775789-1

TYCO_1775789-1

@

@

JBATT2

JBATT2

GND
GND

TYCO_1775789-1

TYCO_1775789-1
@

@

EC_SMC A

3

EC_SMD A

4
5

6

7

8

9

1

1

2

2

3

3

4

4

5

5

6

6

7

7

8
9

1

1

2

2

PR201

100_0402_1%

PR201

100_0402_1%

PR202

100_0402_1%

PR202

100_0402_1%

1

1

PR203

PR203

6.49K_0402_ 1%

6.49K_0402_ 1%

1

PR204

PR204

10K_0402_5 %

10K_0402_5 %

PF201

PF201
12A_65V_4 51012MRL

12A_65V_4 51012MRL

2

2

2

VMB

SMB30255 00YA_2P

SMB30255 00YA_2P

1

PC201

PC201

1000P_0402 _50V7K

1000P_0402 _50V7K

2

EC_SMB _CK1 <31,38>

EC_SMB _DA1 <31,38>

+3VALW

BATT_TEM P <31>

PL201

PL201

1

2

BATT+

1

PC202

PC202

0.01U_0402_ 25V7K

0.01U_0402_ 25V7K

2

ADP_I need to write Charge Options Register (0x12H)=> bit6=1

D

0: IOUT is the 20x current amplifier output <default @ POR>
1: IOUT is the 40x current amplifier output

For KB930 --> Keep PU201 circuit
(Vth =1.25V)

For KB9012 (Red square) --> Remove PU201 circuit, but keep PR206
PH201, PR205, PR211,PQ201,PR208,PR212

@

@

PR231

PR231

NTC_V_2

2

1

NTC_V

+3VLP

1

@

@

PR206

PR206

2

+3VALW

PR230

PR230

2

PR233

PR233

47K_0402_1 %

47K_0402_1 %

@

@

12.7K_0402_1%

12.7K_0402_1%

2

1

1

<31>

OTP_N_002

ADP_OCP _2

ADP_I<31,38>

PR210

PR210

1

5.11K_0402_ 1%

5.11K_0402_ 1%

Turbo_V_2

2

PR232

PR232

2

0_0402_5%

0_0402_5%

PR205

PR205

402_0402_1%

402_0402_1%

PR227

PR227

0_0402_5%

0_0402_5%

1

2

1

0_0402_5%

2

@

@

1

Turbo_V

0_0402_5%

2

PR211

PR211

1

10K_0402_1%

10K_0402_1%

<31>

+3VLP

1

PR207

PR207

2

21.5K_0402_1%

21.5K_0402_1%

1

2

PR209

PR209

10K_0402_1 %

10K_0402_1 %

1

PH201

PH201

2

47K_0402_1%

47K_0402_1%

100K_0402_1%_NCP15WF104F03RC

100K_0402_1%_NCP15WF104F03RC

C

A/D

PH1 under CPU botten side :
CPU thermal protection at 93 +-3 degree C
Recovery at 56 +-3 degree C

VL

1

PC203

PC203

+3VS

2

2

PR208

PR208

1

PQ201

PQ201

1

D

D

ADP_OCP _1

2

G

G

SSM3K70 02FU_SC70-3

SSM3K70 02FU_SC70-3

S

S

3

PR212

PR212

0_0402_5%@

0_0402_5%@

1

PU201

PU201

1

VCC

2

GND

3

OT1

4

OTP_N_003

2

PR213 0_0402 _5%

PR213 0_0402 _5%

OT2

G718TM1U _SOT23-8

G718TM1U _SOT23-8

100K_0402_1%

100K_0402_1%

2

H_PROCHOT#<5,31>

PROCHOT<31 >

0.1U_0603_1 6V7K

0.1U_0603_1 6V7K

90W(DIS) : PR205=4.42K
PR210=27.4K
65W(UMA) : PR205=402(SD034020080)
PR210=5.11K

TMSNS1

RHYST1

TMSNS2

RHYST2

1

8

7

6

5

MAINPWON <31,39>

B

VMB2

PR217

PR217

2

768K_0402_ 1%

768K_0402_ 1%

PR219

PR219

10K_0402_1 %

10K_0402_1 %

1

1

PR221

PR221

2

221K_0402_ 1%

221K_0402_ 1%

1

A

2

5

1

PC204

PC204

2

3

2

2

PR223

PR223
10K_0402_1 %

10K_0402_1 %

2

P2

0.01U_0402_25V7K

0.01U_0402_25V7K

8

P

+

-

G

4

PR225

PR225

10K_0402_1 %

10K_0402_1 %

@

@

PR218

PR218

10M_0402_ 5%

10M_0402_ 5%

1

1

O

PU202A

PU202A

LM393DG_S O8

LM393DG_S O8

1

2VREF_8205

1

RTCVRE F

BATT_LEN #<31>

2

100K_0402_ 1%

100K_0402_ 1%

+3VLP

2

PR214

PR214
100K_0402_ 1%

100K_0402_ 1%
<BOM Structure>

<BOM Structure>

1

+3VLP

PR226

PR226

PQ205

+3VALW

2

PR215

PR215
100K_0402_ 1%

100K_0402_ 1%

1

PQ202

PQ202

1

D

D

2N7002KW _SOT323-3

2N7002KW _SOT323-3

2

G

G

S

S

3

2

2

G

G

1

4

BATT_OUT <38>

PQ203

PQ203

1

D

D

2N7002KW _SOT323-3

2N7002KW _SOT323-3

S

S

3

VL

2

PR222

@

PR222

@

100K_0402_ 1%

100K_0402_ 1%

1

PR224

PR224

1K_0402_5%

SPOK<39>

PCH_PW R_EN<31,35>

2

@

@

0_0402_5%

0_0402_5%

2

0_0402_5%

0_0402_5%

PR229

PR229

PR228

PR228

1K_0402_5%

1

1

2

1

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

3

B+

1

1

2

PR216

PR216

2

100K_0402_1%

PR220

PR220

22K_0402_1 %

22K_0402_1 %

1

1

D

D

2

PQ204

PQ204

G

2N7002W -T/R7_SOT323-3

2N7002W -T/R7_SOT323-3

G

S

1

2

S

3

PC207

PC207

1U_0402_6.3V6K

1U_0402_6.3V6K

2010/01/25 2012/07/11

2010/01/25 2012/07/11

2010/01/25 2012/07/11

100K_0402_1%

2

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

TP0610K-T 1-E3_SOT23-3

TP0610K-T 1-E3_SOT23-3

3

PC205

PC205

0.22U_0603_25V7K

0.22U_0603_25V7K

PQ205

2

1

2

1

PC206

PC206

0.1U_0603_2 5V7K

0.1U_0603_2 5V7K

2

+VSBP

+VSBP

PJ201

PJ201
JUMP_43X 39@

JUMP_43X 39@

1

2

1

2

Compal Electronics, Inc.

Title

Title

Title

PWR-BATTERY CONN/OTP

PWR-BATTERY CONN/OTP

PWR-BATTERY CONN/OTP

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

+VSB

LA-7987P

LA-7987P

LA-7987P

1

of

37 50Tuesday, October 30, 2012

of

37 50Tuesday, October 30, 2012

of

37 50Tuesday, October 30, 2012

B

A

1.0

1.0

1.0

VIN

D

2

C

PACIN

ACON

ACOFF<31>

BATT_OUT<37>

B

HGVADJ=(Vcell-4)/0.10627

C

Vcell

4V

4.2V

4.35V

CC=0.25A~3A

IREF=1.016*Icharge

IREF=0.254V~3.048V

VCHLIM need over 95mV

A

5

8
7

6
5

1

DTA144EUA_SC70-3

DTA144EUA_SC70-3

PR301

PR301

47K_0402_5%

47K_0402_5%

2

6

2N7002KDW -2N_SOT363-6

2N7002KDW -2N_SOT363-6

1

2

PQ307A

PQ307A

PACIN

DTC115EUA_SC70-3

DTC115EUA_SC70-3

PR321

PR321

1

10K_0402_5%

10K_0402_5%

1

3

PQ311

PQ311

2

ACOFF-1

2

PQ313

PQ313

2

G

G

CHGVADJ

0V

1.882V

3.2935V

5

PQ301

PQ301
AO4407A_SO8

AO4407A_SO8

4

PQ304

PQ304

3

1

PQ305

PQ305

DTC115EUA_SC70-3

DTC115EUA_SC70-3

PR318

PR318

47K_0402_1%

47K_0402_1%

1

2

2

1

PR325

PR325

0_0402_5%

0_0402_5%

2

1

D

D

S

S

3

2N7002KW_SOT323-3

2N7002KW_SOT323-3

1
2

3

1

PC301

PC301

2

PQ307B

PQ307B

5

1

3

ACPRN <39>

P2

1

PR303

PR303

2

0.1U_0603_25V7K

0.1U_0603_25V7K

P2-1

1

2

P2-2

3

4

2N7002KDW-2N_SOT363-6

2N7002KDW-2N_SOT363-6

47K_0402_1%

47K_0402_1%

200K_0402_1%

200K_0402_1%

PR308

PR308

PR335

PR335

150K_0402_1%

150K_0402_1%

PQ302

PQ302

AO4423L_SO8

AO4423L_SO8

1

2

3

4

1

PR307

PR307
20K_0402_1%

20K_0402_1%

2

PQ308

PQ308

1

D

D

2N7002KW_ SOT323-3

2N7002KW_ SOT323-3

2

G

G

S

S

3

PR317

PR317

1

64.9K_0603_1%

64.9K_0603_1%

1

2

8

7
6
5

1

PC304

PC304

5600P_0402_25V7K

5600P_0402_25V7K

BATT_OUT <37>

VIN

1

PR314

PR314

2

390K_0603_1%

390K_0603_1%

2

1

PC323

PC323

0.1U_0603_25V7K

0.1U_0603_25V7K

2

EC_SMB_DA1<31,37>

EC_SMB_CK1<31,37>

BQ24727VDD

1

PR336

PR336
10K_0402_1%

10K_0402_1%

2

PQ316

PQ316

1

D

D

2

G

G

S

S

3

4

P3

SH00000AA00

1

2

PL301

2

1

+3VALW

2

PR316

PR316

1

@

@

10K_0402_1%

10K_0402_1%

1

PACIN

1

12K_0402_1%

12K_0402_1%

2

PL301

PC302

PC302

10U_0805_25V6K@

10U_0805_25V6K@

2

ADP_I<31, 37>

10K_0402_5%

10K_0402_5%

1

@

@

100P_0603_50V8

100P_0603_50V8

PR323

PR323

1

316K_0402_1%

316K_0402_1%

PR337

PR337

2

PR339

PR339

PC312

PC312

1

2

ACPRN<39>

2

1

2

2

1

PR312

@

PR312

@

2

39.2K_0402_1%

39.2K_0402_1%

6

ACDET

7

IOUT

8

SDA

9

SCL

10

ILIM

PR326

PR326
100K_0402_1%

100K_0402_1%

ACIN <15,31>

1UH_PCMB061H-1R0M S_7A_20%

1UH_PCMB061H-1R0M S_7A_20%

2

PR315

PR315

10K_0402_5%

10K_0402_5%

+3VALW

2N7002KW_SOT323-3

2N7002KW_SOT323-3

For disable pre- charge circuit.

4

B+

PR302

PR302

0.01_1206_1%

0.01_1206_1%

1

2

PC315

PC315

10U_0805_25V6K@

10U_0805_25V6K@

4

3

ACP

+3VALW

1

2

PR309

PR309

PR310

PR310

100K_0402_1%

100K_0402_1%

@

@

1

BQ24727RGRR_VQFN20 _3P5X3P5

BQ24727RGRR_VQFN20 _3P5X3P5

PR313

PR313

1

@

@

1

4.7M_0603_1%

4.7M_0603_1%

5

4

ACOK

PU301

PU301

2

@

@

2

3

CMPIN

CMPOUT

SA000051W00

SRN

BM

SRP

12

11

13

1

1

PR327

PR327

2

6.8_0603_5%

6.8_0603_5%

2

PC320

PC320

0.1U_0603_25V7K

0.1U_0603_25V7K

1

2

1

PC321

PC321

0.1U_0603_25V7K

0.1U_0603_25V7K

2

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZE D BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZE D BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZE D BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

ACN

PC308

PC308

1

2

PC310

PC310

0.1U_0603_25V7K

0.1U_0603_25V7K

2

10K_0603_1%

10K_0603_1%

2

ACP

GND

14

PR328

PR328

10_0603_5%

10_0603_5%

3

PC309

PC309

2

0.1U_0603_25V7K

0.1U_0603_25V7K

0.1U_0603_25V7K

0.1U_0603_25V7K

1

1

ACN

TP

VCC

PHASE

HIDRV

BTST

REGN

LODRV

15

3

1

<BOM Struct ure>

<BOM Struct ure>

21

20

19

18

17

16

1

@

@

PC322

PC322

0.1U_0603_25V7K

0.1U_0603_25V7K

2

BQ24727VCC

BST_CHG

PD303

PD303

2

RB751V-40_SOD323-2

RB751V-40_SOD323-2

1

PC318

PC318

1U_0603_25V6K

1U_0603_25V6K

2

DL_CHG

P2

2

PR319

PR319

10_1206_5%

10_1206_5%

1

PC313

PC313

1

1U_0603_25V6K

1U_0603_25V6K

DH_CHG

2.2_0603_5%

2.2_0603_5%
1

1

Compal Secret Data

Compal Secret Data

Compal Secret Data

2

LX_CHG

PR324

PR324

2

BQ24727VDD

Deciphered Date

Deciphered Date

Deciphered Date

2

2

1

1

PC305

PC305

PC303

PC303

4.7U_0805_25V6-K

4.7U_0805_25V6-K

PC314

PC314

0.047U_0603_16V7M

0.047U_0603_16V7M
1

2

2

B+

PQ303

PQ303

AO4407A_SO8

AO4407A_SO8

1

2

3

2

2

1

1

PC306

PC306

4.7U_0805_25V6-K

4.7U_0805_25V6-K

4.7U_0805_25V6-K

4.7U_0805_25V6-K

4

2012/07/112010/01/13

2012/07/112010/01/13

2012/07/112010/01/13

2

DISCHG_G

PC307

PC307

2200P_0402_50V7K

2200P_0402_50V7K

DISCHG_G-1

6

5

7

8

4

1

2

3

6

5

7

8

PQ312

PQ312

1

2

3

PR304

PR304

47K_0402_1%

47K_0402_1%

1

2

2

PR305

PR305
10K_0402_1%

10K_0402_1%

1

PQ306

PQ306

1

DTC115EUA_SC70-3

DTC115EUA_SC70-3

2

3

PQ310

PQ310

AO4466L_SO8

AO4466L_SO8

10UH_PCMB104E-100M S_5.5A_20%

10UH_PCMB104E-100M S_5.5A_20%

1

1

PR322

PR322

2

AO4466L_SO8

AO4466L_SO8

4.7_1206_5%

4.7_1206_5%

6251_SN

1

2

PC319

PC319

680P_0603_50V7K

680P_0603_50V7K

Title

Title

Title

Size Document Number R ev

Size Document Number R ev

Size Document Number R ev

Date: Sheet

Date: Sheet

Date: Sheet

4

ACOFF-1

2

PD301

PD301

1SS355_SOD323-2

1SS355_SOD323-2

1

1

PL302

PL302

0.01_1206_1%

0.01_1206_1%

CHGCHG

1

2

2

SRP

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

CHARGER

1

8
7

6
5

2

1

PD302

PD302
1SS355_SOD323-2

1SS355_SOD323-2

2

1

PC311

PC311

2

0.1U_0603_25V7K

0.1U_0603_25V7K

PR320

PR320

4

3

SRN

LA-7987P

LA-7987P

LA-7987P

1

VIN

PR306

PR306
200K_0402_1%

200K_0402_1%

PQ309

PQ309

2N7002W- T/R7_SOT323-3

2N7002W- T/R7_SOT323-3

1

D

D

PACIN

2

G

G

S

S

3

1

PC316

PC316

PC317

PC317

2

10U_0805_25V6K

10U_0805_25V6K

of

38 50Tuesday, October 30, 2012

of

38 50Tuesday, October 30, 2012

of

38 50Tuesday, October 30, 2012

BATT+

1

2

10U_0805_25V6K

10U_0805_25V6K

D

C

B

A

1.0

1.0

1.0

5

Note:
Use TPS51125 IC can remove RTC refernece LDO
Use TPS51427 IC must keep RTC refernece LDO

4

3

2

1

2VREF_8205

+3VALW P

D

PR401

PR401

13K_040 2_1%

13K_040 2_1%

1

PR403

RT8205_B+

PJ401

B+

PC405

PC405

C

B

PJ401

2

1

2

0.1U_0603_25V7K

0.1U_0603_25V7K

EC_ON<31,32>

MAINPWON<31,37>

1

1

2

JUMP_43 X118@

JUMP_43 X118@

1

PC402

PC402

2

0.1U_0603_25V7K

0.1U_0603_25V7K

For KB9012

PR418

PR418

2.2K_040 2_5%

2.2K_040 2_5%

2

2

1

PC403

PC403

2

4.7U_0805_25V6-K

4.7U_0805_25V6-K

+3VALWP

PR413

PR413

0_0402_ 5%

0_0402_ 5%

1

PC404

PC404

PC406

PC406

2

4.7U_0805_25V6-K

4.7U_0805_25V6-K

1

2N7002K DW-2N_SOT3 63-6

2N7002K DW-2N_SOT3 63-6

1

1

2

2200P_0402_50V7K

2200P_0402_50V7K

4.7UH +-20 % PCMC063T-4R7M N 5.5A

4.7UH +-20 % PCMC063T-4R7M N 5.5A

1

1

+

+

PC415

PC415

150U_B2 _6.3VM_R45M

150U_B2 _6.3VM_R45M

2

PQ405A

PQ405A

VL

AO4466L _SO8

AO4466L _SO8

PL401

PL401

6

1

PQ401

PQ401

2

PR409

PR409

4.7_1206_5%

4.7_1206_5%

PC418

PC418

100K_04 02_1%

100K_04 02_1%

2

6

5

7

8

4

1

2

3

6

5

7

8

1

2

1

2

680P_0603_50V7K

680P_0603_50V7K

2

1

PR414

PR414

2

1

3

ENTRIP1

PQ403

PQ403
AO4712_ SO8

AO4712_ SO8

4

Typ: 175mA

3

5

4

+3VLP

1

PC411

PC411

4.7U_0805_10V6K

4.7U_0805_10V6K

2

1

2

1

2.2_0603 _5%

2.2_0603 _5%

PC412

PC412

0.1U_060 3_25V7K

0.1U_060 3_25V7K

PR411

PR411

499K_04 02_1%

499K_04 02_1%

1

B+

ENTRIP2

PQ405B

PQ405B

2N7002K DW-2N_SOT3 63-6

2N7002K DW-2N_SOT3 63-6

PR412

PR412

PR407

PR407

2

100K_0402_1%

100K_0402_1%

2

1

2

20K_040 2_1%

20K_040 2_1%

1

PR405

PR405

130K_04 02_1%

130K_04 02_1%

1

25

7

8

BST_3V

9

UG_3V

10

LX_3V

11

LG_3V

12

1

PC420

PC420

2

1U_0603_10V6K

1U_0603_10V6K

2VREF_8205

PR403

PU401

PU401

P PAD

VO2

VREG3

BOOT2

UGATE2

PHASE2

LGATE2

PC401

PC401

1U_0603_10V6K

1U_0603_10V6K

2

2

ENTRIP2

2

6

ENTRIP2

VFB=2.0V

EN

13

RT8205_ B+

1

2

PR402

PR402

30K_040 2_1%

30K_040 2_1%

1

2

PR404

PR404

19.6K_04 02_1%

19.6K_04 02_1%

1

2

PR406

PR406

66.5K_04 02_1%

66.5K_04 02_1%

ENTRIP1

1

2

2

3

4

5

FB2

SKIPSEL

14

15

1

FB1

REF

TONSEL

GND

ENTRIP1

24

VO1

23

PGOOD

BOOT1

UGATE1

PHASE1

LGATE1

NC

VREG5

VIN

18

17

16

1

PC421

PC421

2

1

4.7U_0805_10V6K

4.7U_0805_10V6K

2

PC422

PC422

0.1U_0603_25V7K

0.1U_0603_25V7K

BST_5V

22

UG_5V

21

LX_5V

20

LG_5V

19

RT8205E GQW_W QFN24_4X4

RT8205E GQW_W QFN24_4X4

VL

Typ: 175mA

RT8205_ B+

PC407

PC407

4.7U_0805_25V6-K

4.7U_0805_25V6-K

PR408

PR408

2.2_0603 _5%

2.2_0603 _5%

1

1

1

PC408

PC408

PC409

PC409

2

2

4.7U_0805_25V6-K

4.7U_0805_25V6-K

SPOK <37>

PC413

PC413

0.1U_060 3_25V7K

0.1U_060 3_25V7K

2

1

2

1

2

2200P_0402_50V7K

2200P_0402_50V7K

+5VALW P

1

PC410

PC410

2

0.1U_0603_25V7K

0.1U_0603_25V7K

5

4

PQ402

PQ402

6

5

PQ404TPC8A03-H_SO8

PQ404TPC8A03-H_SO8

4

3

+3.3VALWP OCP(min)=5.81A
+5VALWP OCP(min)=8.44A

PJ402

PJ402

2

1

2

JUMP_43 X118@

JUMP_43 X118@

PJ403

PJ403

2

1

2

JUMP_43 X118@

JUMP_43 X118@

6

7

8

TPC8065-H_SO8

TPC8065-H_SO8

3

2

1

4.7UH_PC MB104E-4R7MS_ 5.5A_20%

4.7UH_PC MB104E-4R7MS_ 5.5A_20%

1

1

7

8

PR410

PR410

2

4.7_1206_5%

4.7_1206_5%

1

2

1

2

PC419

PC419

680P_0603_50V7K

680P_0603_50V7K

1

1

PL402

PL402

+3VALW

D

+5VALW

C

2

+5VALWP

1

+

+

PC417

PC417

150U_B2 _6.3VM_R45M

150U_B2 _6.3VM_R45M

2

B

1

PR415

PR415

200K_04 02_1%

ACPRN<38>

A

200K_04 02_1%

2

EC_ON<31,32>

1

@

@

2

@

@

5

2

G

G

1

3

1

D

D

VS

PQ407

PQ407

S

S

3

2N7002W-T/R7_SOT323-3

2N7002W-T/R7_SOT323-3

PQ408

PQ408

DTC115E UA_SC70-3

DTC115E UA_SC70-3

@

@

1

PR416

PR416

100K_04 02_1%

100K_04 02_1%

@

@

2

1

1

PR417

PR417

2

2

40.2K_0402_1%

40.2K_0402_1%

@

@

For KB9012

2

PC423

PC423

4.7U_0603_6.3V6M

4.7U_0603_6.3V6M

4

PQ406

PQ406
DTC115E UA_SC70-3

DTC115E UA_SC70-3

3

Security Class ification

Security Class ification

Security Class ification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2010/01/ 25 2012/07/1 1

2010/01/ 25 2012/07/ 11

2010/01/ 25 2012/07/ 11

3

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

Compal Electronics, Inc.

Title

Title

Title

3VALWP/5VALWP

3VALWP/5VALWP

3VALWP/5VALWP

Size Do cument Number Rev

Size Do cument Number Rev

Size Do cument Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

LA-7987P

LA-7987P

LA-7987P

1

of

39 50Tuesday, October 30 , 2012

of

39 50Tuesday, October 30, 2 012

of

39 50Tuesday, October 30, 2 012

A

1.0

1.0

1.0

A

1

PR501

PR501

0_0402_5%

0_0402_5%

1

SYSON<31,34,35>

2

2

@

@

PR502

PR502

1

PC501

PC501

2

1

47K_0402_5%

47K_0402_5%

.1U_0402_16V7K

.1U_0402_16V7K

1

2

PR507

PR507

1

11.5K_0402_1%

11.5K_0402_1%

PR508

PR508

10K_0402_1%

10K_0402_1%

100K_0402_1%

100K_0402_1%

PR505

PR505

2

1

470K_0402_1%

470K_0402_1%

2

1

PR506

PR506

2

B

PU501

PU501

1

VBST

PGOOD

2

TRIP

DRVH

3

EN

4

5

SW

V5IN

VFB

DRVL

RF

TPS51212DSCR_SON10_3X 3

TPS51212DSCR_SON10_3X 3

TP

VFB=0.7V

C

6

7

3

2

7

6

2

3

1.5V_B+

8

PQ501

PQ501
TPC8065-H_SO8

TPC8065-H_SO8

1

8

PQ502

PQ502

TPC8A03-H_SO8

TPC8A03-H_SO8

1

1

1

PC503

PC503

PC502

PC502

1UH_PCMC063T-1R0M N_11A_20%

1UH_PCMC063T-1R0M N_11A_20%

1

PR504

PR504

4.7_1206_5%

4.7_1206_5%

2

1

PC509

PC509

2

1000P_0603_50V7K

1000P_0603_50V7K

2

2

10U_0805_25V6K

10U_0805_25V6K

10U_0805_25V6K

10U_0805_25V6K

PL501

PL501

1

2

1

PC504

PC504

2

0.1U_0402_25V6

0.1U_0402_25V6

5

4

PC506

PR503

PR503

2.2_0603_5%

BST_1.5V

10

DH_1.5V

9

LX_1.5V

8

7

DL_1.5V

6

11

2.2_0603_5%

1

1

2

0.22U_0603_16V7K

0.22U_0603_16V7K

BST_1.5V-1

2

+5VALW

PC508

PC508

1U_0603_10V6K

1U_0603_10V6K

PC506

1

2

5

4

PJ501

PJ501

2

2

JUMP_43X118@

JUMP_43X118@

1

PC505

PC505

2

2200P_0402_50V7K

2200P_0402_50V7K

1

+

+

PC507

PC507
220U_6.3V_M

220U_6.3V_M

2

+1.5VP

D

1

B+

1

+1.5VP

+1.5VP OCP(min)= 15.6A

PJ502

PJ502

2

2

JUMP_43X118@

JUMP_43X118@

PJ503

PJ503

2

JUMP_43X118@

JUMP_43X118@

1

1

1

1

1

2

+1.5V

2

3

PU502

PU502

PJ505

PJ505

1

+5VALW

2

1

2

JUMP_43X118@

JUMP_43X118@

SUSP#<9,31,35,41,42>

4

1

2

PR511

PR511

1

0_0402_5%

0_0402_5%

1.8VSP_VIN

PC510

PC510
22U_0805_6.3VAM

22U_0805_6.3VAM

EN_1.8VSP

2

PR512

PR512
1M_0402_5%

1M_0402_5%

@

@

2

1

PC515

PC515

2

1

4

10

PVIN

PG

9

PVIN

8

SVIN

5

EN

TP

7

11

SY8033BDBC_DFN10_3X3

SY8033BDBC_DFN10_3X3

0.1U_0402_10V7K

0.1U_0402_10V7K

1.8VSP_LX

2

LX

3

LX

6

FB

NC

NC

1

FB=0.6Volt

1

2

1

2

PL503

PL503

1UH_PH041H-1R0MS_3. 8A_20%

1UH_PH041H-1R0MS_3. 8A_20%

1

2

PR510

PR510

20K_0402_1%

20K_0402_1%

PR509

PR509

4.7_1206_5%

4.7_1206_5%

PC512

PC512

680P_0603_50V7K

680P_0603_50V7K

1.8VSP_FB

PR513

PR513

10K_0402_1%

10K_0402_1%

1

+1.8VSP

1

PC511

PC511

2

2

68P_0402_50V8J

68P_0402_50V8J

1

2

1

1

2

2

PC514

PC514

PC513

PC513

22U_0805_6.3VAM

22U_0805_6.3VAM

22U_0805_6.3VAM

22U_0805_6.3VAM

+1.8VSP

1.8VSP max current=4A

PJ504

PJ504

1

2

1

2

JUMP_43X118@

JUMP_43X118@

+1.8VS

2

3

4

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZE D BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZE D BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZE D BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

2010/01/25 2012/07/11

2010/01/25 2012/07/11

2010/01/25 2012/07/11

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

C

Compal Electronics, Inc.

Title

Title

Title

PWR-+1.5VP/+1.8VSP

PWR-+1.5VP/+1.8VSP

PWR-+1.5VP/+1.8VSP

Size D ocument Number Rev

Size D ocument Number Rev

Size D ocument Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

D

LA-7987P

LA-7987P

LA-7987P

of

40 50Tuesday, October 30, 2012

of

40 50Tuesday, October 30, 2012

of

40 50Tuesday, October 30, 2012

1.0

1.0

1.0

5

VID [0] VID[1] VCCSA Vout
0 0 0.9V
0 1 0.8V
1 0 0.725V
1 1 0.675V

output voltage adjustable ne twork

D

PJ601

C

B

A

+3VALW

PJ601

2

2

JUMP_43X118@

JUMP_43X118@

PR615

PR615

0_0402_5%

SUSP#<9,31,35,40,42>

0_0402_5%

1

@

@

0.1U_0402_16V7K

0.1U_0402_16V7K

5

4

+3VS

1

PR602

PR602

100K_0402_5%

100K_0402_5%

+VCCSA_PWRGD

2

SA_PGOOD<31>

+5VALW

PR604

PR604

10_0402_1%

10_0402_1%

2

PC618

PC618

2

PU601

PU601

19

PGND

20

PGND

21

PGND

22

VIN

23

VIN

24

VIN

1

PC602

PC602

2.2U_0603_10V7K

2.2U_0603_10V7K

1

2

1

2

PC614

PC614

PC613

PC613

1

2

2200P_0402_50V7K

2200P_0402_50V7K

0.1U_0603_25V7K

0.1U_0603_25V7K

+VCCSA_PWR_SRC

1

1

2

2

PC616

PC616

PC615

PC615

1

1

10U_0805_6.3V6M

10U_0805_6.3V6M

10U_0805_6.3V6M

10U_0805_6.3V6M

+VCCSA_PWR_SRC

PC617

PC617

2

0.22U_0402_10V6K

0.22U_0402_10V6K

1

3300P_0402_50V7K

3300P_0402_50V7K

+3VS

2

PR612

PR612
100K_0402_5%

100K_0402_5%

PR616

PR616

1

@

@

PR619

PR619

4.32K_0402_1%

4.32K_0402_1%

2

@

@

71.5K_0402_1%

71.5K_0402_1%

PU602

PU602

1

VBST

PGOOD

2

TRIP

DRVH

3

EN

SW

4

V5IN

VFB

5

DRVL

RF

TP

TPS51212DSCR_SON10_3X3

TPS51212DSCR_SON10_3X3

@

@

PC629

PC629

@

@

1

2

1000P_0402_50V7K

1000P_0402_50V7K

1

1

PR622

PR622

2

1

D

D

@

@

2

PQ603

PQ603

G

G

S

S

3

SSM3K7002FU_SC70-3

SSM3K7002FU_SC70-3

@

@

10

9

8

7

6

11

2

1

2

@

@

BST_+V1.05S_VCCPP

UG_+V1.05S_VCCPP

SW_+V1.05S_VCCPP

+V1.05S_VCCPP_5V

LG_+V1.05S_VCCPP

PR618

PR618

@

@

1

1.2K_0402_1%

1.2K_0402_1%

+3VS

2

PR623

PR623

100K_0402_5%

100K_0402_5%

1

@

@

2

PR625

PR625
100K_0402_5%

100K_0402_5%

.01U_0402_16V7K

.01U_0402_16V7K

PC630

PC630

1

@

@

4

+V1.05S_VCCP_PWRGOOD<42>

TRIP_+V1.05S_VCCPP

PR614

PR614

1

2

EN_+V1.05S_VCCPP

66.5K_0402_1%

66.5K_0402_1%

2

@

@

PC625

PC625

FB_+V1.05S_VCCPP

@

@

RF_+V1.05S_VCCPP

1

1

2

470K_0402_1%

470K_0402_1%

2

@

@

2

PR621

PR621
10K_0402_1%

10K_0402_1%

1

@

@

PR624

PR624

0_0402_5%

0_0402_5%

2

@

@

PR613

PR613

1

0_0603_5%

0_0603_5%

@

@

1

+VCCSA_PWRGD

2

1

1

18

17

V5FILT

V5DRV

TPS51461RGER_QFN24_4X4

TPS51461RGER_QFN24_4X4

GND

VREF

1

2

1

2

PR610

PR610

5.1K_0402_1%

5.1K_0402_1%

PC624

PC624

0.22U_0603_16V7K

0.22U_0603_16V7K

1

2

+VCCSA_VID0

+VCCSA_VID1

PC601

PC601

1U_0603_10V6K

1U_0603_10V6K

16

14

15

VID0

VID1

PGOOD

VOUT

COMP

SLEW

5

3

4

2

1

PC619

PC619

0.01U_0402_25V7K

0.01U_0402_25V7K

2

@

@

+5VALW

1

PC626

PC626

1U_0603_6.3V6M

1U_0603_6.3V6M

2

@

@

VCCP_PWRCTRL = "High" , Vo = 1.05V (SNB)
VCCP_PWRCTRL = "Low" , Vo = 1V (IVB)

VCCP_PWRCTRL <9>

4

13

EN

BST

MODE

6

4

@

@

5

@

@

PR601

PR601

1K_0402_5%

1K_0402_5%

2

PR603

PR603

1K_0402_5%

1K_0402_5%

2

+VCCSA_EN

12

11

SW

10

SW

9

SW

8

SW

7

SW

25

TP

5

6

7

3

2

7

8

6

1

2

3

3

1

H_VCCSA_VID1 <9>

H_VCCSA_VID0 <9>

1

PR605

PR605

0_0402_5%

0_0402_5%

1

2

+V1.05S_VCCP_PWRGOOD <42>

PR606

PR606
0_0603_5%

0_0603_5%

+VCCSA_BT

+VCCSA_PHASE

@

@

2

33K_0402_5%

33K_0402_5%

8

PQ601

PQ601

TPC8037-H_SO8

TPC8037-H_SO8

1

PQ602

PQ602

TPC8A03-H_SO8

TPC8A03-H_SO8

3

+VCCSA_BT_1

1

2

PR608

PR608

1

+V1.05S_VCCPP_B+

PC620

PC620

1UH_PCMC063T-1R0MN_11A_20%

1UH_PCMC063T-1R0MN_11A_20%

1

@

@

PR617

PR617

4.7_1206_5%

4.7_1206_5%

2

@

@

1

PC628

PC628

1000P_0603_50V7K

1000P_0603_50V7K

2

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTR ONICS, INC. AND CONTAINS CONF IDENTIAL

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTR ONICS, INC. AND CONTAINS CONF IDENTIAL

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTR ONICS, INC. AND CONTAINS CON FIDENTIAL

AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D

AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D

AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

1

PR607

PR607

4.7_1206_5%

4.7_1206_5%

2

1

PC604

PC604

1000P_0603_50V7K

1000P_0603_50V7K

2

1

2

PC621

PC621

0.1U_0402_25V6

0.1U_0402_25V6

@

@

PL602

PL602

1

@

@

PC603

PC603

0.22U_0603_16V7K

0.22U_0603_16V7K
1

2

1

1

2

2

2200P_0402_50V7K

2200P_0402_50V7K

@

@

@

@

2

2

1

@

@

2010/01/25 2012/07/11

2010/01/25 2012/07/11

2010/01/25 2012/07/11

+VCC_SAP
TDC 4.2A
Peak Current 6A
OCP current 7.2A

The 1k PD on the VCCSA VIDs are empty.
These should be stuffed to ensure that
VCCSA VID is 00 prior to VCCIO stability.

PL601

PL601

0.47UH_FDVE0630-H-R47M=P3_17.7A_20%

0.47UH_FDVE0630-H-R47M=P3_17.7A_20%
1

1

2

PC623

PC623

PC622

PC622

4.7U_0805_25V6-K

4.7U_0805_25V6-K

4.7U_0805_25V6-K

4.7U_0805_25V6-K

@

@

PC627

PC627

0.1U_0402_10V7K

0.1U_0402_10V7K

Compal Secret Data

Compal Secret Data

Compal Secret Data

2

PJ603

PJ603

2

1

2

JUMP_43X118@

JUMP_43X118@

PR620

PR620

0_0402_5%

0_0402_5%

2

@

@

Deciphered Date

Deciphered Date

Deciphered Date

2

@

@

2

2

PC606

PC606

1

PC605

PC605

1

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

1

+V1.05S_VCCPP

1

2

PC607

PC607

0.1U_0402_10V7K

0.1U_0402_10V7K

100_0402_5%

100_0402_5%

2

0_0402_5%

0_0402_5%

2

B+

+V1.05S_VCCPP

VCCIO_SENSE <8,42>

@

@

1

2

PR609

PR609

PR611

PR611

1

PJ602

PJ602

1

+VCCSAP

2

1

2

JUMP_43X118@

JUMP_43X118@

+VCCSA

D

+VCCSAP

@

2

PC611

PC611

1

22U_0805_6.3V6M

22U_0805_6.3V6M

+V1.05S_VCCP

1

+

+

PC631

PC631
150U_B2_6.3VM_R45M

150U_B2_6.3VM_R45M

2

@

@

@

2

PC612

PC612

1

22U_0805_6.3V6M

22U_0805_6.3V6M

C

B

A

1.0

1.0

LA-7987P

LA-7987P

LA-7987P

1

41 50Tuesday, Oc tober 30, 2012

41 50Tuesday, Oct ober 30, 2012

41 50Tuesday, Oct ober 30, 2012

1.0

of

of

of

@

2

PC608

PC608

PC609

PC609

1

22U_0805_6.3V6M

22U_0805_6.3V6M

1

1

@

2

1

1

2

PC610

PC610

22U_0805_6.3V6M

22U_0805_6.3V6M

2200P_0402_50V7K

2200P_0402_50V7K

+VCCSA_SENSE <9>

PJ604

PJ604

1

2

1

2

JUMP_43X118@

JUMP_43X118@

Compal Electronics, Inc.

Title

Title

Title

PWR +VCCSAP/1.0

PWR +VCCSAP/1.0

PWR +VCCSAP/1.0

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

C

C

C

Date: Sheet

Date: Sheet

Date: Sheet

D

C

B

VSSIO_SEN SE_L

VCCIO_SEN SE<8,41>

A

SUSP#

PR717

PR717

1

0_0402_ 5%

0_0402_ 5%

5

4

3

2

1

+1.5V

1

PJ701

PJ701

1

JUMP_43 X118

JUMP_43 X118
@

@

2

2

PC702

PC702

2

4.7U_080 5_6.3V6K

4.7U_080 5_6.3V6K

PR719

PR719
0_0402_ 5%@

0_0402_ 5%@

1

CPU1.5V_S3_GATE<9,31,35>

SUSP<9,35>

PR710

PR710

60.4K_04 02_1%

60.4K_04 02_1%

1

2

2

1

PR709

PR709

2

PC707

PC707

10K_0402_1%@

10K_0402_1%@

1

+V1.05S_ VCCP_PWRG OOD<41>

2

10.7K_0402_1%

10.7K_0402_1%

PR707

PR707

1

1

2

PC708

PC708

2

2

0.1U_0402_25V6

0.1U_0402_25V6

1

PR714

PR714

10_0402 _1%

10_0402 _1%

5

2

PC720

2

12K_0402_1%

12K_0402_1%

1

2

1

PC720

0.01UF_0 402_25V7K

0.01UF_0 402_25V7K

PC716

PC716

1000P_0 402_50V7K

1000P_0 402_50V7K

PR708

PR708

1

PR716

PR716

@

@

1

10_0402 _5%

10_0402 _5%

.1U_0402_16V7K

.1U_0402_16V7K

PR715

PR715

0_0402_ 5%

0_0402_ 5%

1

2

0.01UF_0 402_25V7K

0.01UF_0 402_25V7K

2

PC721

PC721
1000P_0 402_50V7K

1000P_0 402_50V7K

1

2

1

2

3

4

PC712

PC712

1

PU702

PU702

VREF

REFIN

GSNS

VSNS

2

1

2

PR703

PR703

49.9K_04 02_1%

49.9K_04 02_1%

1

2

1

2

PC701

PC701

0.1U_0402_10V7K

0.1U_0402_10V7K

+3VS

2

2

PR705

PR705

100K_0402_1%

100K_0402_1%

PR706

PR706

100K_0402_1%

100K_0402_1%

1

1

16

17

5

PR718

PR718

10_0402 _1%

10_0402 _1%

15

PAD

TPS5121 9RTER_QFN16_ 3X3

TPS5121 9RTER_QFN16_ 3X3

COMP

MODE

PGOOD

TRIP

6

7

1

75K_0402_1%

75K_0402_1%

2

PR711

PR711

2

4

PQ701

PQ701

2N7002W -T/R7_SOT32 3-3

2N7002W -T/R7_SOT32 3-3

1

D

D

2

G

G

S

S

3

BST_1.05 VS_VCCP

13

14

EN

BST

SW

DH

DL

V5

PGND

GND

8

PR713

PR713

2.2_0603 _5%

2.2_0603 _5%

1

12

11

10

9

1

PC710

PC710

0.1U_060 3_25V7K

0.1U_060 3_25V7K

1

2

LX_1.05V S_VCCP

DH_1.05V S_VCCP

DL_1.05V S_VCCP

Security Class ification

Security Class ification

Security Class ification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

PR702

PR702

1K_0402 _1%

1K_0402 _1%

PR704

PR704

2

+5VALW

1

PC713

PC713

1U_0603 _10V6K

1U_0603 _10V6K

2

1

2

1

2

1

2

PC704

PC704

PC705

PC705

.1U_0402_16V7K

.1U_0402_16V7K

1K_0402_1%

1K_0402_1%

TPCA806 5-H_PPAK56-8-5

TPCA806 5-H_PPAK56-8-5

PQ702

PQ702

4

PQ703

PQ703

4

TPCA8057-H_PPAK56-8-5

TPCA8057-H_PPAK56-8-5

2010/01/ 25 2 012/07/1 1

2010/01/ 25 2 012/07/ 11

2010/01/ 25 2012/07/1 1

3

PU701

PU701

1

VIN

2

GND

3

VREF

4

VOUT

APL5336 KAI-TRL_SOP8P8

APL5336 KAI-TRL_SOP8P8

+0.75VSP

1

1

2

2

10U_0603_6.3V6M

10U_0603_6.3V6M

1.05VS_B +

5

1

2

3

5

1

2

3

<BOM Struc ture>

<BOM Struc ture>

Compal Secret Data

Compal Secret Data

Compal Secret Data

8

NC

7

NC

6

VCNTL

5

NC

9

TP

PC706

PC706

10U_0603_6.3V6M

10U_0603_6.3V6M

1

2

PC714

PC714

0.1U_0402_25V6

0.1U_0402_25V6

1.0UH +-20 % PCMC104T-1R0M N 20A

1.0UH +-20 % PCMC104T-1R0M N 20A

1

PR712

PR712

2

4.7_1206_5%

4.7_1206_5%

1

2

PC715

PC715

1000P_0603_50V7K

1000P_0603_50V7K

Deciphered Date

Deciphered Date

Deciphered Date

1

2

+3VALW

PC703

PC703

1U_0603 _10V6K

1U_0603 _10V6K

+0.75VSP

+1.05VS_ VCCPP

+1.05VS

Ivy Bridge CPU ES2 Using

PJ702

PJ702

2

2

JUMP_43 X118@

JUMP_43 X118@

PJ703

PJ703

2

2

JUMP_43 X118@

JUMP_43 X118@

PJ704

PJ704

2

2

JUMP_43 X118@

JUMP_43 X118@

PJ605

PJ605

2

JUMP_43 X118

JUMP_43 X118

PJ606

PJ606

2

JUMP_43 X118

JUMP_43 X118

1

1

1

1

1

1

@

@

1

1

2

@

@

1

1

2

+0.75VS

+1.05VS

+V1.05S_ VCCP

+1.05VS_VCCPP OCP(min)=20.75A

PJ705

PJ705

1

2

1

2

JUMP_43 X118@

1

1

PC719

PC719

2

2200P_0402_50V7K

2200P_0402_50V7K

PL701

PL701

2

4.7U_0805_25V6-K

4.7U_0805_25V6-K

1

PC718

PC718

2

JUMP_43 X118@

1

PC717

PC717

2

4.7U_0805_25V6-K

4.7U_0805_25V6-K

1

+

+

2

PC709

PC709

330U_X_2VM_R9M

330U_X_2VM_R9M

2

B+

+1.05VS_VCCPP

Compal Electronics, Inc.

Title

Title

Title

PWR +1.05VS_VCCPP/+0.75VSP

PWR +1.05VS_VCCPP/+0.75VSP

PWR +1.05VS_VCCPP/+0.75VSP

Size Do cument Number Rev

Size Do cument Number Rev

Size Do cument Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

LA-7987P

LA-7987P

LA-7987P

1

of

42 50Tuesday, October 30 , 2012

of

42 50Tuesday, October 30 , 2012

of

42 50Tuesday, October 30 , 2012

D

C

B

A

1.0

1.0

1.0

5

FBA3

PR901

PR901

1

D

TRBSTA#

VCC_AXG_SENSE<9>

VSS_AXG_SENSE<9>

10_0402_1%

10_0402_1%

1

1.21K_0402_1%

1.21K_0402_1%

2

2

PR902

PR902

4700P_0402_25V7K

4700P_0402_25V7K

PC901

PC901

1

2

680P_0402_50V7K

680P_0402_50V7K

1

PC905

PC905

2

FBA1

PR903

PR903

1

10.7K_0402_1%

10.7K_0402_1%

+V1.05S_VCCP

C

PR923

PR923

CSCOMP

2

1

PC917

PC917

54.9_0402_1%

54.9_0402_1%

1

PR926

PR926

1

2

.1U_0402_16V7K

.1U_0402_16V7K

0_0402_5%

0_0402_5%

VR_SVID_DAT1

2

PR944

PR944

1

10_0402_1%

10_0402_1%

3P: 348
2P: 1.21K

3P: 806
2P: 1K

+3VS

1

2

3P: 330p
2P: 1000p

FB_CPU3

2

PR947

PR947

1

8.06K_0402_1%

8.06K_0402_1%

PR955

PR955

1

1K_0402_1%

1K_0402_1%
<BOM Structure>

<BOM Structure>

CPU_B+

PR933

PR933

10K_0402_5%

10K_0402_5%

1

0_0402_5%

0_0402_5%

1

0_0402_5%

0_0402_5%

PC930

PC930

1

0.033U_0402_16V7K

0.033U_0402_16V7K

FB_CPU2

2

DROOP

2

PR936

PR936

PR938

PR938

2

VR_ON<31>

PC933

PC933

1

2

PC916

PC916

2

.1U_0402_16V7K

.1U_0402_16V7K

PR922

PR922

130_0402_1%

VR_SVID_DAT<8>

VR_SVID_ALRT#<8>

VR_SVID_CLK<8>

130_0402_1%

1

+V1.05S_VCCP

1

PR932

@

PR932

@

75_0402_1%

VR_HOT#<31>

VSSSENSE<8>

VCCSENSE<8>

B

A

2

75_0402_1%

VGATE<15>

TRBST#

2

PR908

PR908

1

2

10_0402_1%

10_0402_1%

PR909

PR909

1

1K_0402_1%

1K_0402_1%

+5VS

PR927

PR927

95.3K_0402_1%

95.3K_0402_1%

1

1

PR929 1K_0402_1%

PR929 1K_0402_1%

PC921

PC921

VSN

2

1

VSP

2

2

FB_CPU1

PR942

PR942

1

49.9_0402_1%

49.9_0402_1%

1

2

0.033U_0402_16V7K

0.033U_0402_16V7K

PC937

PC937

1

1000P_0402_50V7K

1000P_0402_50V7K

4

FBA2

1

680P_0402_50V7K

680P_0402_50V7K

2

PR937

PR937

1

2

0_0402_5%

0_0402_5%

PR954

PR954

1

2

0_0402_5%

0_0402_5%

PR919

PR919

1

2_0603_5%

2_0603_5%

PC915

PC915

1

2.2U_0603_10V7K

2.2U_0603_10V7K

PR920

PR920

1

0_0402_5%

0_0402_5%

1

2

2

1

2

PC923

PC923
1000P_0402_50V7K

1000P_0402_50V7K

PR940

PR940

1

2

1K_0402_1%

1K_0402_1%

PC928

PC928

2

1

680P_0402_50V7K

680P_0402_50V7K

PR948

PR948

1

2

806_0402_1%

806_0402_1%

3P: 3.65K
2P: 9.53K

CSREF

2

IMVP_IMON<31>

PC907

PC907

2

2

6132_VCC

2

VR_ON_CPU

2

VBOOT

PR925

PR925

2

10K_0402_1%

10K_0402_1%

DIFF_CPU

0.01U_0402_25V7K

0.01U_0402_25V7K

2

3P: 6.04K
2P: 4.32K

2P: 24K
1P: 24.9K

PR910

PR910

1

6.04K_0402_1%

6.04K_0402_1%

2P: 21.5K
1P: 15.8K

1000P_0402_50V7K

1000P_0402_50V7K

VR_SVID_DAT1

VR_SVID_ALRT#
VR_SVID_CLK

ROSC_CPU

VRMP

VR_HOT#

VGATE

3P: 22p
2P: 10p

COMP_CPU1

PR943

PR943

2

6.04K_0402_1%

6.04K_0402_1%

3P: 2200p
2P: 3300p

3P: 23.7K
2P: 24.9K

PC908

PC908

1

2

10P_0402_50V8J

10P_0402_50V8J

COMPA1

2

2200P_0402_50V7K

2200P_0402_50V7K

2

PC912

PC912

1

PU901

PU901

1

VCC

2

VDDBP

3

VRDYA

4

EN

5

SDIO

6

ALERT#

7

SCLK

8

VBOOT

9

ROSC

10

VRMP

11

VRHOT#

12

VRDY

13

VSN

14

VSP

15

DIFF

PC926

PC926

2

22P_0402_50V8J

22P_0402_50V8J

1

PUT COLSE
TO VCORE
Phase 1
Inductor

PC902

PC902

1

2

.1U_0402_16V7K

.1U_0402_16V7K

1

PR904

PR904

24.9K_0402_1%

24.9K_0402_1%

PC909

PC909

1

2

FBA

DIFFA

TRBSTA#

57

59

58

56

60

61

PAD

VSPA

VSNA

DIFFA

TRBSTA#

NCP6132AMNR2G_QFN60_7X7

NCP6132AMNR2G_QFN60_7X7

COMP

FB

IOUT

TRBST#

18

17

19

20

16

FB_CPU

TRBST#

COMP_CPU

ILIM_CPU

IMON

1

IMVP_IMON IMON

PC929

PC929

1

2

1500P_0402_50V7K

1500P_0402_50V7K

2

2

1

PC935

PC935

PR950

PR950

1

24.9K_0402_1%

24.9K_0402_1%

FBA

COMPA

55

ILIM

21

DROOP

2

1

2

ILIMA

IMONAIMONA

54

IOUTA

COMPA

CSCOMP

DROOP

22

PR939 12.4 K_0402_1%

PR939 12.4 K_0402_1%

CSCOMPCSCOMPCSCOMPCSCOMPCSCOMPCSCOMP

.1U_0402_16V7K

.1U_0402_16V7K

2

CSCOMPA

PR914

PR914

1

15.8K_0402_1%

15.8K_0402_1%

DROOPA

52

53

51

ILIMA

DROOPA

CSREF

CSSUM

25

24

23

2

1

1

75K_0402_1%

75K_0402_1%

2

PC903

PC903

CSSUMA

CSCOMPA

CSP3

3

2

2

1

1

PC904

PC904

1200P_0402_50V7K

1200P_0402_50V7K

2

1000P_0402_50V7K

1000P_0402_50V7K

165K_0402_1%

165K_0402_1%

SWN1A

1

2

PR912

PR912

63.4K_0603_1%

63.4K_0603_1%

2

PC911

PC911
1000P_0402_50V7K

1000P_0402_50V7K

1

PC914

PC914

1

CSP1A

CSP2A

.1U_0402_16V7K

.1U_0402_16V7K

TSENSEA

46

49

50

48

47

TSNSA

CSP2A

CSP1A

CSREFA

CSSUMA

PWMA

BSTA

HGA

SWA

LGA

BST2

HG2

SW2

LG2

PVCC

PGND

LG1

SW1

HG1

BST1

CSP1

DRVEN

CSP2

TSNS

PWM

27

29

26

28

30

TSENSETSENSE

PC924

PC924

1

2

.1U_0402_16V7K

.1U_0402_16V7K

CSP1

CSP2

CSP3

3P: 21K
2P: 12.4K

PC932

PC932
1000P_0402_50V7K

1000P_0402_50V7K

CSSUM

PC934

PC934

1

2

1000P_0402_50V7K

1000P_0402_50V7K

1

2

PC936

PC936

680P_0402_50V7K

680P_0402_50V7K

NTC_PH201

2

PR952

PR952

PH903

PH903

1

220K_0402_5%_ERTJ0EV224J

220K_0402_5%_ERTJ0EV224J

<BOM Structure>

<BOM Structure>

PR907

PR907

2

45

44

43

42

41

40
39

38

37

6132P_VCCP

36

35

34
33

32

31

1

1

165K_0402_1%

165K_0402_1%

2

PR905

PR905

75K_0402_1%

75K_0402_1%

1

NTC_PH203

1

CSREFA <44>

BSTA1

BST2

BST1

PR934

PR934

2

41.2K_0402_1%

41.2K_0402_1%

6132_PWM

CSREF <44>

3P: 1500p
2P: 1200p

2

PR953

PR953

1

PH901

PH901

220K_0402_5%_ERTJ0EV224J

220K_0402_5%_ERTJ0EV224J

2

CSREFA

CSP1A

PR918

PR918

1

2

26.1K_0402_1%

26.1K_0402_1%

1

HG1A <44>

LG1A <44>

1

HG2 <44>

2.2_0603_5%

2.2_0603_5%

LG2 <44>

1

0_0402_5%

0_0402_5%

LG1 <44>

HG1 <44>

1

3P: 73.2K
2P: 41.2K

0.047U_0402_16V7K

0.047U_0402_16V7K

CSREF

0.047U_0402_16V7K

0.047U_0402_16V7K

PUT COLSE
TO GT
Inductor

PC910

PC910

2

0.047U_0402_16V7K

0.047U_0402_16V7K

1

2P: 36K
1P: 26.1K

PR921

PR921

BSTA1_1

2

2.2_0603_5%

2.2_0603_5%

BST2_1

2

PR924

PR924

2

PR930

PR930

BST1_1

2

PR931

PR931

2.2_0603_5%

2.2_0603_5%

CSP2

PC927

PC927

CSREF

CSP1

PC931

PC931

PR949

PR949

1

130K_0603_1%

130K_0603_1%

1

PR951

PR951

130K_0603_1%

130K_0603_1%

2

PR913 6.98K_0402_1%

PR913 6.98K_0402_1%

1

6132_PWMA

PC918

PC918

1

2

0.22U_0603_25V7K

0.22U_0603_25V7K

PC919

PC919

1

0.22U_0603_25V7K

0.22U_0603_25V7K

PC920

PC920

1

PC922

PC922

1

0.22U_0603_25V7K

0.22U_0603_25V7K

1

2

6.98K_0402_1%

6.98K_0402_1%

1

@

@
PR960

PR960

6.98K_0402_1%

6.98K_0402_1%

2

1

1

2

1

PR961

@

PR961

@

6.98K_0402_1%

6.98K_0402_1%

2

1

SWN1

2

SWN2

2

CSCOMPA

SWN1A <44>

2

2

2

2.2U_0603_10V7K

2.2U_0603_10V7K

2

PR941

PR941

2

2

PR945

PR945

6.98K_0402_1%

6.98K_0402_1%

+5VS

PR915,PR946=200K (setting 113 de greeC)
PR915,PR946=8.25 K(setting 93 de greeC)

PC906

PC906

1

1000P_0402_50V7K

1000P_0402_50V7K

TSENSEA

1

PR915

PR915

2

PUT COLSE
TO V_GT
HOT SPOT

CSP2A

200K_0402_1%

200K_0402_1%

+5VS

2P: 1.65K
1P: 1K

SW1A <44>

SW2 <44>

SW1 <44>

PR906

PR906

1

1K_0402_1%

1K_0402_1%

DROOPA

2

Option for
1 phase GFX

+5VS

SWN2 <44>

SWN1 <44>

Option for
2 phase CPU

CSP3

TSENSE

1

PR946

PR946

2

200K_0402_1%

200K_0402_1%

PUT COLSE
TO VCORE
HOT SPOT

1

2

1

CSREFA

2

2

PH904

PH904

100K_0402_1%_TSM0B104F4251RZ

100K_0402_1%_TSM0B104F4251RZ

1

2Phase: @
1Phase: install

1

PR928

PR928
0_0402_5%

0_0402_5%

2

3Phase: @
2Phase: install

PR935

PR935

0_0402_5%

0_0402_5%

2

PH902

PH902

100K_0402_1%_TSM0B104F4251RZ

100K_0402_1%_TSM0B104F4251RZ

1

D

C

B

A

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2009/12/01 2012/07/11

2009/12/01 2012/07/11

2009/12/01 2012/07/11

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

PWR-CPU_CORE

PWR-CPU_CORE

PWR-CPU_CORE

LA-7987P

LA-7987P

LA-7987P

1

of

43 50Tuesday, October 30, 2012

of

43 50Tuesday, October 30, 2012

of

43 50Tuesday, October 30, 2012

1.0

1.0

1.0

5

4

3

2

1

CPU_B+

+VCC_CORE

PR958

PR958

2

10_0402_1%

10_0402_1%

B+

PC947

PC947

220U_25V_M

220U_25V_M

1

CSREF <43>

SWN1 <43>

PL901

PL901

HCB4532KF-800T90_1812

HCB4532KF-800T90_1812

1

1

+

+

2

2

CPU_B+

HG2<43>

SW2<43>

LG2<43>

QC 45W CPU
VID1=0.9V
IccMax=94A
Icc_Dyn=66A
Icc_TDC=52A
R_LL=1.9m ohm
OCP~110A

5

PQ901

PQ901

HG1<43>

D

SW1<43>

LG1<43>

C

4

4

TPCA8065-H_PPAK56-8-5

TPCA8065-H_PPAK56-8-5

1

2

3

5

PQ903

PQ903

1

2

3

TPCA8057-H_PPAK56-8-5

TPCA8057-H_PPAK56-8-5

1

2

SNUB_CPU1

1

680P_0603_50V7K

680P_0603_50V7K

2

1

1

PC939

PC939

PC938

PC938

2

2

10U_0805_25V6K

10U_0805_25V6K

10U_0805_25V6K

10U_0805_25V6K

0.36UH_VMPI1004AR-R36M-Z03_30A_20%

0.36UH_VMPI1004AR-R36M-Z03_30A_20%

PR956

PR956

4.7_1206_5%

4.7_1206_5%

PC948

PC948

1

1

PC941

PC941

PC940

PC940

2

2

0.1U_0402_25V6

0.1U_0402_25V6

2200P_0402_25V7K

2200P_0402_25V7K

PL902

PL902

1

4

3

2

V1N_CPU

PQ902

PQ902

4

4

5

TPCA8065-H_PPAK56-8-5

TPCA8065-H_PPAK56-8-5

1

2

3

5

PQ904

PQ904

TPCA8057-H_PPAK56-8-5

TPCA8057-H_PPAK56-8-5

1

2

3

DC 35W CPU
VID1=1.05V
IccMax=53A
Icc_Dyn=43A
Icc_TDC=36A
R_LL=1.9m ohm
OCP~65A

1

PC942

PC942

2

10U_0805_25V6K

10U_0805_25V6K

PL903

PL903

0.36UH_VMPI1004AR-R36M-Z03_30A_20%

0.36UH_VMPI1004AR-R36M-Z03_30A_20%

PR957

PR957

4.7_1206_5%

4.7_1206_5%

PC949

PC949

680P_0603_50V7K

680P_0603_50V7K

1

2

1

2

SNUB_CPU2

1

2

PC943

PC943

<BOM Structure>

<BOM Structure>

CPU_B+

1

1

1

PC944

PC944

PC946

PC946

2

2

2

10U_0805_25V6K

10U_0805_25V6K

0.1U_0402_25V6

0.1U_0402_25V6

2200P_0402_25V7K

2200P_0402_25V7K

+VCC_CORE

4

3

V2N_CPU

2

PR959

PR959

10_0402_1%

10_0402_1%

1

CSREF

SWN2 <43>

D

C

CPU_B+

B

5

PQ907

PQ907

HG1A<43>

SW1A<43>

LG1A<43>

A

PQ909

PQ909

5

4

4

TPCA8065-H_PPAK56-8-5

TPCA8065-H_PPAK56-8-5

1

2

3

5

TPCA8057-H_PPAK56-8-5

TPCA8057-H_PPAK56-8-5

1

2

3

<BOM Structure>

<BOM Structure>

1

1

PC958

PC958

PC957

PC957

2

10U_0805_25V6K

10U_0805_25V6K

2

10U_0805_25V6K

10U_0805_25V6K

1

PC959

PC959

2

0.1U_0402_25V6

0.1U_0402_25V6

1

PR967

PR967

4.7_1206_5%

4.7_1206_5%

2

SNUB_GFX1

1

PC968

PC968

680P_0603_50V7K

680P_0603_50V7K

2

1

PC960

PC960

2

2200P_0402_25V7K

2200P_0402_25V7K

PL905

PL905

0.36UH_VMPI1004AR-R36M-Z03_30A_20%

0.36UH_VMPI1004AR-R36M-Z03_30A_20%

1

<BOM Structure>

<BOM Structure>

2

+VCC_GFXCORE_AXG

4

3

V1N_GFX

1

2

PR971

4

PR971

10_0402_1%

10_0402_1%

CSREFA <43>

SWN1A <43>

QC 45W GT2
VID1=1.23V
IccMax=46A
Icc_Dyn=37A
Icc_TDC=38A
R_LL=3.9m ohm
OCP~55A

DC 35W GT2
VID1=1.23V
IccMax=33A
Icc_Dyn=20.2A
Icc_TDC=21.5A
R_LL=3.9m ohm
OCP~40A

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTR ONICS, INC. AND CONTAINS CONF IDENTIAL

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTR ONICS, INC. AND CONTAINS CONF IDENTIAL

THIS SHEET OF ENGINEERING DRAWI NG IS THE PROPRIETARY PROPERTY OF COMPAL ELECTR ONICS, INC. AND CONTAINS CONF IDENTIAL

AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D

AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D

AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

3

2009/12/01 2012/07/11

2009/12/01 2012/07/11

2009/12/01 2012/07/11

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

Compal Electronics, Inc.

Title

Title

Title

PWR-CPU_CORE

PWR-CPU_CORE

PWR-CPU_CORE

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

C

C

C

Date: Sheet

Date: Sheet

Date: Sheet

1

LA-7987P

LA-7987P

LA-7987P

of

44 50Tuesday, October 30, 2012

of

44 50Tuesday, October 30, 2012

of

44 50Tuesday, Oc tober 30, 2012

B

A

1.0

1.0

1.0

5

4

3

2

1

D

C

+VCC_CORE

1

PC1

PC1

10U_080 5_6.3VAM

10U_080 5_6.3VAM

2

1

PC6

PC6

10U_080 5_6.3VAM

10U_080 5_6.3VAM

2

+VCC_CORE

1

PC20

PC20
22U_080 5_6.3V6M

22U_080 5_6.3V6M

2

1

PC44

PC44
22U_080 5_6.3V6M

22U_080 5_6.3V6M

2

1

PC61

PC61

22U_080 5_6.3V6M

22U_080 5_6.3V6M

2

1

@

@
PC69

PC69
22U_080 5_6.3V6M

22U_080 5_6.3V6M

2

+VCC_CORE

1

PC2

PC2

10U_080 5_6.3VAM

10U_080 5_6.3VAM

2

1

PC7

PC7
10U_080 5_6.3VAM

10U_080 5_6.3VAM

2

1

PC21

PC21
22U_080 5_6.3V6M

22U_080 5_6.3V6M

2

1

PC45

PC45

22U_080 5_6.3V6M

22U_080 5_6.3V6M

2

1

PC62

PC62
22U_080 5_6.3V6M

22U_080 5_6.3V6M

2

1

@

@

PC70

PC70

22U_080 5_6.3V6M

22U_080 5_6.3V6M

2

1

PC3

PC3
10U_080 5_6.3VAM

10U_080 5_6.3VAM

2

1

PC8

PC8
10U_080 5_6.3VAM

10U_080 5_6.3VAM

2

1

PC22

PC22

22U_080 5_6.3V6M

22U_080 5_6.3V6M

2

1

PC46

PC46
22U_080 5_6.3V6M

22U_080 5_6.3V6M

2

1

PC63

PC63

22U_080 5_6.3V6M

22U_080 5_6.3V6M

2

1

<BOM Struc ture>

<BOM Struc ture>
PC71

PC71
22U_080 5_6.3V6M

22U_080 5_6.3V6M

2

1

PC4

PC4
10U_080 5_6.3VAM

10U_080 5_6.3VAM

2

1

PC9

PC9

10U_080 5_6.3VAM

10U_080 5_6.3VAM

2

1

PC23

PC23
22U_080 5_6.3V6M

22U_080 5_6.3V6M

2

1

PC47

PC47

22U_080 5_6.3V6M

22U_080 5_6.3V6M

2

1

PC64

PC64

22U_080 5_6.3V6M

22U_080 5_6.3V6M

2

1

<BOM Struc ture>

<BOM Struc ture>
PC72

PC72
22U_080 5_6.3V6M

22U_080 5_6.3V6M

2

+VCC_CORE +VCC_GFXCORE_AXG

1

PC5

PC5
10U_080 5_6.3VAM

10U_080 5_6.3VAM

2

1

PC10

PC10
10U_080 5_6.3VAM

10U_080 5_6.3VAM

2

1

PC24

PC24
22U_080 5_6.3V6M

22U_080 5_6.3V6M

2

1

PC48

PC48
22U_080 5_6.3V6M

22U_080 5_6.3V6M

2

1

@

@

PC65

PC65
22U_080 5_6.3V6M

22U_080 5_6.3V6M

2

1

@

@

PC11

PC11

10U_080 5_6.3VAM

10U_080 5_6.3VAM

2

+VCC_GFXCORE_AXG

@

@

22U_0805_6.3V6M

22U_0805_6.3V6M

PC12

PC12

1

1

2

2

22U_0805_6.3V6M

22U_0805_6.3V6M

PC36

PC36

1

1

2

2

470U_D2_2VM_R4.5M

470U_D2_2VM_R4.5M

1

@

@

PC57

PC57

+

+

2

3

@

@

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

PC13

PC13

PC14

PC14

1

1

2

2

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

@

@

PC37

PC37

1

+

+

2

1

PC38

PC38

1

2

2

1

470U_D2_2VM_R4.5M

470U_D2_2VM_R4.5M

@

@

PC58

PC58

+

+

2

3

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

PC15

PC15

22U_0805_6.3V6M

22U_0805_6.3V6M

1

PC39

PC39

2

470U_D2_2VM_R4.5M

470U_D2_2VM_R4.5M

PC59

PC59

3

22U_0805_6.3V6M

@

@

PC16

PC16

PC17

1

2

PC17

1

2

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

PC40

PC40

PC41

PC41

1

2

330U_D2_2VM_R9M

330U_D2_2VM_R9M

1

PC60

PC60

+

+

2

3

Below is 458544_CRV_PDDG_0.5 Table 5-8.

5 x 22 µF (0805)

Socket Bottom

5 x (0805) no-stuff
sites

7 x 22 µF (0805)

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

PC19

PC19

1

PC18

PC18

1

2

2

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

PC42

PC42

PC43

1

2

PC43

1

2

Socket Top

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

1

1

@

@

PC26

PC26

@

@

PC25

PC25

2

2

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

1

1

PC27

PC27

2

2

22U_0805_6.3V6M

22U_0805_6.3V6M

1

2

2 x (0805) no-stuff
sites

+V1.05S_ VCCP

1

PC28

PC28

2

1

@

@

PC49

PC49

2

22U_0805_6.3V6M

22U_0805_6.3V6M

PC29

PC29

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

1

1

PC30

PC30

2

2

22U_0805_6.3V6M

22U_0805_6.3V6M

1

1

PC51

PC51

PC50

PC50

2

2

1

+

+

2

+V1.05S_VCCP

22U_0805_6.3V6M

22U_0805_6.3V6M

1

PC31

PC31

PC32

PC32

2

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

1

PC53

PC53

PC52

PC52

2

330U_D2_2VM_R9M

330U_D2_2VM_R9M

PC66

PC66

3

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

1

2

22U_0805_6.3V6M

22U_0805_6.3V6M

1

@

@

PC54

PC54

2

1

+

+

2

3

1

1

@

@

PC34

PC34

PC33

PC33

2

2

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

1

1

@

@

PC55

PC55

2

2

1

330U_D2_2VM_R9M

330U_D2_2VM_R9M

@

@

PC67

PC67

+

+

2

3

D

22U_0805_6.3V6M

22U_0805_6.3V6M

@

@

PC35

PC35

PC56

PC56

C

330U_D2_2VM_R9M

330U_D2_2VM_R9M

@

@

PC68

PC68

1

+

+

PC73

B

A

PC73

330U_D2 _2VM_R9M

330U_D2 _2VM_R9M

2

3

1

+

+

PC77

PC77

330U_D2 _2VM_R9M

330U_D2 _2VM_R9M

2

3

1

+

+

330U_D2 _2VM_R9M

330U_D2 _2VM_R9M

2

3

5

PC74

PC74

1

+

+

PC78

PC78

330U_D2 _2VM_R9M

330U_D2 _2VM_R9M

2

3

1

+

+

PC75

PC75

330U_D2 _2VM_R6M

330U_D2 _2VM_R6M

2

3

@

@

1

+

+

PC76

PC76

330U_D2 _2VM_R9M

330U_D2 _2VM_R9M

2

3

B

A

Security Class ification

Security Class ification

Security Class ification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2008/09/ 15 20 12/07/1 1

2008/09/ 15 2 012/07/1 1

2008/09/ 15 2 012/07/1 1

3

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Do cument Number Rev

Size Do cument Number Rev

Size Do cument Number Rev

Date: Sheet

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

PWR - PROCESSOR DECOUPLING

PWR - PROCESSOR DECOUPLING

PWR - PROCESSOR DECOUPLING

LA-7987P

LA-7987P

LA-7987P

1

of

45 50Tuesday, October 3 0, 2012

of

45 50Tuesday, October 3 0, 2012

of

45 50Tuesday, October 3 0, 2012

1.0

1.0

1.0

5

4

3

2

1

Version change list (P.I.R. List) Page 1 of 1

for PWR

Reason for change PG# Modify List Date PhaseItem

unpop PR315,PR316 for SMBus SPEC.

1

D

2

3

4

5

6

7

8

unpop PR315,PR316

P38

D

C

9

C

10

11

12

13

14

B

B

15

16

17

A

A

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELEC TRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRAN SFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZE D BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

2009/01/06 2012/07/11

2009/01/06 2012/07/11

2009/01/06 2012/07/11

3

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size D ocument Number R ev

Size D ocument Number R ev

Size D ocument Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

PIR (PWR)

PIR (PWR)

PIR (PWR)

LA-7987P

LA-7987P

LA-7987P

46 50Tuesday, October 30, 2012

46 50Tuesday, October 30, 2012

46 50Tuesday, October 30, 2012

1

1.0

1.0

1.0

of

of

of

5

4

COMPAL CONFIDENTIAL

3

2

1

MODEL NAME:
PCB NAME:

D

REVISION:
DATE:

AC

ODE

M

BATT
M

ODE

C

A1

VIN

BATT

B1

V

PU301

V

Power Sequence Block Diagram
LA-7981P

2011/07/13

A2

PU401

V

B+

B2

B+

V

B4

A3

+3VALW

+5VALW

B5

V

A5

B7 3

V

PQ2

EC

VV

A5

A4

ON/OFF

B7

6

B

V

1ON#

5

B3

EC_ON

D

10

PCH_PWROK

+3V_PCH

3

V

V

PCH_RSMRST#_R

PBTN_OUT#

PM_SLP_S3#
PM_SLP_S4#
PM_SLP_S5#
PM_SLP_SUS#

V

SYSON

SUSP#,SUSP

+5V_PCH

4

5

6

7 SYSON#

8

V V

+1.5V

V

P

U501

3

V

PCH

10

PCH_PWROK

V

PM_DRAM_PWRGD

H_CPUPWRGD

PLT_RST#

SYS_PWROK

11

12

16

DGPU_PWR_EN

15

V

CPU

V

V

DGPU_PWROK

VGATE

14

SVID

13

C

DIS)

PU601

B

V

+VCC_SA

PU702

V

+V1.05S

PU602

V

+V1.05S_VCCP

U38

V

+5VS

U39

V

+3VS

Q8

VV

+1.5VS

(DIS)

8a

(

8b

V

B

DGPU

PU701
+0.75VS

13 SVID

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

A

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

2

Date: Sheet

Power sequence

Power sequence

Power sequence

LA-7987P

LA-7987P

LA-7987P

1

47 50Tuesday, October 30, 201 2

1.0

1.0

1.0

of

47 50Tu esday, October 30, 2012

of

47 50Tuesday, October 30, 201 2

of

PU901
+VCC_CORE

V

3

8a

2011/06/15 2012/07/11

2011/06/15 2012/07/11

2011/06/15 2012/07/11

SA_PGOOD

VR_ON

A

5

4

9

VGATE

14

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

5

4

3

2

1

Version change list (P.I.R. List) Page 1 of 2 for HW PIR

Reason for change PG# Modify List Date PhaseItem

D

1

2

HDD no function

10/100 lan no function & change to overclocking mode 26

29 Add R550

ADD R1372 ; DEL R31

DVT

DVT

D

3

For DGPU_PWROK leakage issue.(Let timing +5VS > +3VS)

For S3 can't wake up 9

4

PCH 25Mhz for vender crystal test report change CL to 12pF 14 C196;C197

5

EC_LID_OUT# internal PD 20K, follow ORB change R230 from 10k to 1K 18 R230

6

For GPIO70;GPIO71 voltage level issue ( internal Pull High 20k ) 18 R705;R706 Change from 10K to 200K

7

for DVT board ID Change R695 from 33k to 18k 31 R695

8

C

10

11

12

13

14

15

B

16

17

18

LAN Surge test fail change P/N from SP050006E00 to SP050006W00 27 T1;T2

9

Del ODD Power Control function component 29 R568;Q100;R675;C607;Q99

Del (PCH AUX Power) Reserve component no use 35 C780;C781;C782;C783;R778;Q120

PCH(U4) P/N Change from SA00004NQ30 to SA00004NQ80 13 U4

For ESD test fail add C549 100p 5 C549

EXT USB 3.0 IC PCIE_WAKE# ; CLKREQ_USB30# leakage on S4 34 Swap Q125;Q121 pin1 & pin3

No function DEL R76934

add LAN LDO mode function

USB_OC0# Share with USB_OC4# due to same power switch

Add Capsensor B/D Conn. For best buy use

35 Change C726 from 0.1uF to 0.01uF

Change R56 from 15K to 4.7K
change R885 from 0 ohm to 15K

26;27 ADD R65;R596;R1449;R1380

17 short USB_OC0#;USB_OC4# ; del R267

ADD JCAP1 Conn.

31

DVT

DVT

DVT

DVT

DVT

DVT

DVT

DVT

DVT

DVT

DVT

DVT

DVT

DVT

DVT

DVT

C

B

L1 change to 1 ohm R 19 L1 change to R footprint

19

Reserve 0 ohm for CMOS Camera shake 22 add R296 0 ohm

20

21

22

23

A

For HDD +5VS Power plant del C601;
change C598 pin1 power name for good power plant

For Audio jack support APPLE and NOKIA function Reserve 32

For standard part cost down change 10uF 0805 type to 0603 type

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

29 change from +5VS to +5V_HDD ;DEL C601

add R684;R685;R688;R686 0ohm R

9,19
20,22
26,28
29,35

3

C124;C125;C126;C127;C130;C221;C215;C395;
C231;C519;C937;C953;C954;C591;C608;C602;
C720;C721;C723;C724;C782;C783;C717;C718;

Compal Secret Data

Compal Secret Data

2011/06/15 2012/07/11

2011/06/15 2012/07/11

2011/06/15 2012/07/11

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

<Title>

<Title>

<Title>

DVT

DVT

DVT

DVT

DVT

LA-7987P

LA-7987P

LA-7987P

1

A

1.0

1.0

1.0

of

48 50Tu esday, October 30, 2012

of

48 50Tuesday, October 30, 201 2

of

48 50Tuesday, October 30, 201 2

5

4

3

2

Version change list (P.I.R. List) Page 2 of 2 for HW PIR

Reason for change PG# Modify List Date PhaseItem

1

24

D

change Crystal foot print follow standard parts from 5032 to 3225 package 14;26 Y2;Y6

25

26

change 0ohm to short-pad (R0402_0ohm)

Reserve BT_DISABLE (GPI022) for combo card(BT+WLAN) 18 ADD R892;R897

6;7;
9;14;
15;19;
22;25;
29;32

R40;R60;R77;R190;R193;R198;R181;R185;R265
;R538;R498;R500;R583;R614

DVT

DVT

DVT

D

DVT

27

U35;U36 Change footprint without thermal PAD type 33;34 U35;U36

DVT

DVT

LED5

和

28

C

29

LED2 Location sawp ; Location name D9 change to LED6

For Lan surge fail add 0 ohm on MDO2-;MDO2+;MDO3-;MDO3+

32

27 R304;R305;R306;R307

LED2;LED5;LED6

DVT

DVT

C

DVT

30

31

32

33

B

34

35

For ESD fail issue del TDI & TDO net ,but keep R21 &R23 for debug use 5 R20 pin2 & R23 pin2 NC add T102;T103

Change 2M BIOS ROM from SA00003FO00 to SA00003FO10 13 U6 DVT

Correct PCIE_PRX_DTX_P4/N4 of U32 (SWAP)

Reserve +5VS to JCR1, add R689 ,R690

Update Power sheet of 1003 version

34 U32 10/03

32 R689 (@),R690 10/03

47~58

09/29

10/04

DVT

DVT

DVT

DVT

DVT

B

36

37

A

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

3

2011/06/15 2012/07/11

2011/06/15 2012/07/11

2011/06/15 2012/07/11

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

<Title>

<Title>

<Title>

DVT

DVT

LA-7987P

LA-7987P

LA-7987P

1

A

1.0

1.0

1.0

of

49 50Tu esday, October 30, 2012

of

49 50Tuesday, October 30, 201 2

of

49 50Tuesday, October 30, 201 2

5

4

3

2

1

Version change list (P.I.R. List) Page 3 of 3 for HW PIR

Reason for change PG# Modify List Date PhaseItem

D

44

45

CPU Symbol Update Location : Jcpu1

Change 10P 50V Cap from 1206 to 0603 38 Location : C973

5,6,7,

8,9,10,11

PVT

PVT

D

46

47

48

49

C

S3 Reduction 53 Reserve PR719 for 0.75V

LAN CO-lay x1 GDT & 75ohm

R750 for Power request 42

JUSB3 From 4PIN TO 6 PIN FOR VOLTAGE DROP

38 Location : R308,R304,R305,R306,R307,DL1,DL2,DL3,DL4

Location :R750 PVT

44

Location : JUSB3

50

51

52

53

B

FOR TP POWER SOLUTION 42

FOR POWER REQUEST

FOR PCH HM70 SOLUTION 18 Location : R718,R719,R726,R727,R729,R731,R732,R733

Location :R598.R603

Location : R73842

PVT

PVT

PVT

C

PVTLocation : C53542Add C535 100pF on +3VLP for ESD request - Pony

B

A

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

3

2011/06/15 2012/07/11

2011/06/15 2012/07/11

2011/06/15 2012/07/11

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

HW-PIR2

HW-PIR2

HW-PIR2

LA-7987P

LA-7987P

LA-7987P

1

of

50 50Tu esday, October 30, 2012

of

50 50Tuesday, October 30, 201 2

of

50 50Tuesday, October 30, 201 2

A

1.0

1.0

1.0