Lenovo G530 N500 Schematics

A

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ZZZ3

ZZZ2

ZZZ1

PCB

1 1

ZZZ2

PCB

DAZ@

ZZZ3

Power Switch

DAZ@

ZZZ4

Left LED

DAZ@

B

ZZZ5

Right LED

DAZ@

ZZZ6

Touch Sensor

DAZ@

C

D

E

2 2

Schematics Document

Compal confidential

Mobile Penryn uFCPGA

3 3

Intel Cantiga_GM/PM+ICH9-M

Wednesday, May 14, 2008

REV:1.0

JIWA3/A4

4 4

Security Classification

A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2007/10/15 2008/10/15

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

D

Date: Sheet

Compal Electronics, Inc.

Cover Sheet

JIWA3/A4_LA4212P

E

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Compal confidential

File Name :

ZZZ1

15W_PCB_LA4212P

B

C

Right LED Board

D

Swithch & CAP SENSE LEDs Board

E

Left LED Board

1 1

VRAM 16*16 VRAM 32*16

page20,21

PCI-E X16

nVIDIA NB9M

page16,19

CONN

page23

PS8101T

page23

CRT & TV OUT

page25

2 2

LVDS Connector

page24

PCI-EHDMI Level Shifter

Intel Cantiga GMCH

LVDS I/F

Mobile Penryn

uFCPGA-478 CPU

H_A#(3..35) H_D#(0..63)

PCBGA 1329

page 8,9,10,11,12,13

DMI

page5,6,7

FSB

667/800/1066MHz

C-Line

DDR2 -667 (1.8V) DDR2 -800 (1.8V)

Dual Channel

Clock Gen. SLG8SP556VTR

ICS9LPRS387AKLFT

DDR2-SO-DIMM X2

BANK 0, 1, 2, 3

page22

page 14,15

AMP&Audio Jack

AZALIA

PCI Express Mini card Slot 1

page32

6*PCI-E BUS

Intel ICH9-M

mBGA-676

page26,27,28,29

BCM5906 10/100/LAN

3 3

RJ45 CONN

page33

page34

Card Reader

JMB 385

page36

New Card

page40

LPC BUS

EC ENE KB926

C version

page35

12*USB2.0

Audio Codec

AMOM_CX20561

4*SATA serial

Camera Conn

BlueTooth Conn

USB conn X4

page24

page30

page40

page32

page43

MODEM_CX20548

Card reader(XD/SD MMC/MS/MS-Pro

HD SD)

page36

Int.KBD

page37

SATA HDD

SUB Board

*Right LED

page32,36

Touch Pad

page37

BIOS

page38

*Left LED

4 4

*SWITCH & CAP sensor

Connector SATA CDROM

Connector

page39

A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2007/10/15 2008/10/15

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

D

Date: Sheet

Compal Electronics, Inc.

MB Block Diagram

JIWA3/A4_LA-4212P

253Monday, May 12, 2008

E

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B

C

D

E

1 1

2 2

Voltage Rails

Power Plane

VIN B+ +CPU_CORE +0.9VS +1.05VS

+1.5VS +1.8V +1.8VS +2.5VS +3VALW +3VS +5VALW +5VS +VSB +RTCVCC

STATE

Full ON

S1(Power On Suspend)

S3 (Suspend to RAM)

S4 (Suspend to Disk)

S5 (Soft OFF)

SIGNAL

Description

Adapter power supply (19V) AC or battery power rail for power circuit. Core voltage for CPU

0.9V switched power rail for DDR terminator

1.05V switched power rail

1.5V switched power rail

1.8V power rail for DDR

1.8V switched power rail

2.5V switched power rail

3.3V always on power rail

3.3V switched power rail 5V always on power rail 5V switched power rail VSB always on power rail RTC power

SLP_S3#SLP_S1#

SLP_S4#

SLP_S5#

HIGHHIGHHIGHHIGH

HIGH HIGH HIGH

LOW

HIGH

LOW

LOW LOW LOW

HIGH

LOW

LOWLOWLOW

S3S1

N/A N/A N/A

OFF

ON

OFF

ON ON

ON

OFF

ON ON

OFF

ON

OFF

ON ON

ON OFF

ON

ONONON

+VALW

+V +VS Clock

ON

OFF

ON

OFF

S5

N/AN/AN/A

OFF OFF OFFOFF

OFFOFF OFF OFF OFF ON*ON OFF ON* OFF ON*ON ON

ON

OFF

ONON

LOW

OFF

SMBUS Control Table

SOURCE

SMB_EC_CK1 SMB_EC_DA1

SMB_EC_CK2 SMB_EC_DA2

SMB_CK_CLK1 SMB_CK_DAT1 ICH9

LCD_CLK LCD_DAT

KB926

Cantiga

INVERTER BATT EEPROM

X X

X XX

SERIAL SENSOR

VV

XX X

X XX

THERMAL (CPU)

SODIMM CLK CHIP

XX

V

X

VVV

XX

X X

MINI CARD

LCD

XX X

X X

X

V

CAP BRD

X

V

X X

3 3

PM@ GM@ X76@ CARD@ WLAN@ HDMI@ HDMI_PM@ HDMI_GM@ BT@

4 4

Security Classification

A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2007/10/15 2008/10/15

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

B

Date: Sheet

D

Date: Sheet

Compal Electronics, Inc.

MB Notes List

JIWA3/A4_LA4212P

353Monday, May 12, 2008

E

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Voltage Rails

Power Plane

VIN

1 1

B+ +VGA_CORE +1.1VS +1.8V +1.8VS +3VALW +3VS +5VALW +5VS +VSB +RTCVCC

Description

Adapter power supply (19V) AC or battery power rail for power circuit. Core voltage for GPU

1.1V switched power rail

1.8V power rail for DDR

1.8V switched power rail

3.3V always on power rail

3.3V switched power rail 5V always on power rail 5V switched power rail VSB always on power rail RTC power

B

S1 S3 S5

N/A N/A N/A

ON ON ON ON ON ON ON ON ON ON

N/AN/AN/A

OFF

OFF OFF

OFF ON

OFF OFF

OFF ON ON* OFF

OFF

ON

ON*

OFF

ON ON*

ONON

C

STATE

SIGNAL

Full ON

S1(Power On Suspend)

S3 (Suspend to RAM)

S4 (Suspend to Disk)

S5 (Soft OFF)

The ramp time for any rail must be more than 40us

SLP_S1# SLP_S3#

SLP_S4# SLP_S5# +VALW +V +VS Clock

HIGH HIGH HIGH HIGH

LOW

HIGH

LOW

LOWLOWLOW

LOW LOW LOW LOW

POWER SQUENCE

D

HIGHHIGHHIGH

HIGH

E

ON

OFF

ON ON

ON

OFF

LOW

OFF

ON

EDP at Tj = 97C*

Power Supply Rail

NVVDD

2 2

3 3

FB_DLLAVDD FB_PLLAVDD IFPC_IOVDD IFPD_IOVDD IFPE_IOVDD IFPF_IOVDD PEX_IOVDD/Q PEX_PLLVDD PLLVDD SP_PLLVDD VID_PLLVDD

TOTAL

FBVDD/Q IFPA_IOVDD IFPB_IOVDD IFPAB_PLLVDD IFPCD_PLLVDD IFPEF_PLLVDD

TOTAL

DACA_VDD DACB_VDD DACC_VDD MIOA_VDDQ MIOB_VDDQ VDD33

TOTAL

(V)

Variable

1.1

1.8

3.3

3.3 0.645A

NB9M-GS

GDDR3

12.68A 11.57A

3080mA

3.6A 3.53A 2.2A

DDR2

25mA 10mA 385mA 385mA 385mA 385mA 1400mA 110mA 65mA 25mA 50mA

3.225A

1720mA 3010mA 1680mA

50mA 50mA 100mA 160mA 160mA

2.24A

130mA 255mA 130mA 10mA 10mA 110mA

NB9M-GE

GDDR3

10.52A 9.59A

DDR2

(+3VS)

(1.1VS)

(+VGA_CORE)

(1.8VS)

VDD33

PEX_VDD

NVVDD

FBVDDQ

PEX_VDD can ramp up any time

tNVVDD>=0

tNV-FB

tFBVDDQ>=0

4 4

Security Classification

A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2007/10/15 2008/10/15

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

B

Date: Sheet

D

Date: Sheet

Compal Electronics, Inc.

VGA Notes List

JIWA3/A4_LA4212P

453Monday, May 12, 2008

E

1.0

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5

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4

3

2

1

XDP Reserve

XDP_DBRESET#

XDP_TDI

D D

H_A#[3..16]<8>

H_ADSTB#0<8>

H_REQ#0<8> H_REQ#1<8> H_REQ#2<8> H_REQ#3<8> H_REQ#4<8>

H_A#[17..35]<8>

C C

H_ADSTB#1<8>

H_A20M#<27>

H_FERR#<27>

H_IGNNE#<27> H_STPCLK#<27>

H_INTR<27>

H_NMI<27> H_SMI#<27>

B B

RSVD pins on the CPU should be left as NO CONNECT

A A

H_ADSTB#0 H_REQ#0

H_REQ#1 H_REQ#2 H_REQ#3 H_REQ#4

5

H_A#3 H_A#4 H_A#5 H_A#6 H_A#7 H_A#8 H_A#9 H_A#10 H_A#11 H_A#12 H_A#13 H_A#14 H_A#15 H_A#16

H_A#17 H_A#18 H_A#19 H_A#20 H_A#21 H_A#22 H_A#23 H_A#24 H_A#25 H_A#26 H_A#27 H_A#28 H_A#29 H_A#30 H_A#31 H_A#32 H_A#33 H_A#34 H_A#35 H_ADSTB#1

H_A20M# H_FERR# H_IGNNE#

H_STPCLK# H_INTR H_NMI H_SMI#

AA4 AB2 AA3

D22

K5 M3 N2

N3 P5 P2

P4 P1 R1 M1

K3 H2 K2

Y2 U5 R3

W6

U4 Y5 U1 R4 T5

T3 W2 W5

Y4

U2

V4 W3

V1

A6

A5

C4

D5

C6

B4

A3

M4

N5

T2

V3

B2

D2

D3

F6

J4 L5 L4

J1

L2

J3 L1

ME@

JCPUA

A[3]# A[4]# A[5]# A[6]# A[7]# A[8]# A[9]# A[10]# A[11]# A[12]# A[13]# A[14]# A[15]# A[16]# ADSTB[0]#

REQ[0]# REQ[1]# REQ[2]# REQ[3]# REQ[4]#

A[17]# A[18]# A[19]# A[20]# A[21]# A[22]# A[23]# A[24]# A[25]# A[26]# A[27]# A[28]# A[29]# A[30]# A[31]# A[32]# A[33]# A[34]# A[35]# ADSTB[1]#

A20M# FERR# IGNNE#

STPCLK# LINT0 LINT1 SMI#

RSVD[01] RSVD[02] RSVD[03] RSVD[04] RSVD[05] RSVD[06] RSVD[07] RSVD[08] RSVD[09]

Penryn

ADDR GROUP_0

ADS# BNR#

BPRI#

DEFER#

DRDY# DBSY#

BR0#

IERR#

INIT#

LOCK#

CONTROL

RESET#

RS[0]# RS[1]# RS[2]#

TRDY#

HIT#

HITM#

ADDR GROUP_1

BPM[0]# BPM[1]# BPM[2]# BPM[3]#

PRDY# PREQ#

TCK

TDI TDO TMS

TRST#

DBR#

XDP/ITP SIGNALS

THERMAL

PROCHOT#

THERMDA

THERMDC

ICH

THERMTRIP#

H CLK

BCLK[0] BCLK[1]

RESERVED

H1 E2 G5

H5 F21 E1

F1 D20

B3 H4 C1

F3 F4 G3 G2

G6 E4

AD4 AD3 AD1 AC4 AC2 AC1 AC5 AA6 AB3 AB5 AB6 C20

D21 A24 B25

C7

A22 A21

H_ADS# H_BNR# H_BPRI#

H_DEFER#

H_DRDY#

H_DBSY# H_BR0# H_IERR#

H_INIT# H_LOCK# H_RESET#

H_RS#0 H_RS#1 H_RS#2 H_TRDY#

H_HIT# H_HITM#

XDP_BPM#0 XDP_BPM#1 XDP_BPM#2 XDP_BPM#3 XDP_BPM#4 XDP_BPM#5 XDP_TCK XDP_TDI XDP_TDO XDP_TMS XDP_TRST#

XDP_DBRESET#

H_PROCHOT# H_THERMDA

H_THERMDC H_THERMTRIP#

CLK_CPU_BCLK CLK_CPU_BCLK#

H_ADS# <8> H_BNR# <8>

H_BPRI# <8>

H_DEFER# <8>

H_DRDY# <8> H_DBSY# <8>

H_BR0# <8>

XDP_BPM#5 reserve a via for debuging

H_THERMDA, H_THERMDC routing together, Trace width / Spacing = 10 / 10 mil

4

+VCCP

12

R83

R83 56_0402_5%

56_0402_5%

H_INIT# <27>

H_LOCK# <8>

H_RESET# <8> H_RS#0 <8> H_RS#1 <8> H_RS#2 <8> H_TRDY# <8>

H_HIT# <8> H_HITM# <8>

XDP_DBRESET# <28>

12

R84 68_0402_5%R84 68_0402_5%

H_THERMTRIP# <8,27>

CLK_CPU_BCLK <22> CLK_CPU_BCLK# <22>

+3VS

1

C89

2

0.1U_0402_16V4Z

+VCC_FAN1 EN_FAN1

R726

H_THERMDA H_THERMDC THERM#

1 2

FAN_SPEED1<35>

2

Address:100_1100

+5VS

1K_0402_5%

1

2

C95

1 2

2200P_0402_50V7K

R94

1 2

+3VS

10K_0402_5%

+VCCP

H_PROCHOT#

Security Classification

2007/10/15 2008/10/15

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2007/10/15 2008/10/15

3

Compal Secret Data

Deciphered Date

10K_0402_5%

EN_FAN1<35>

reserved by XDP_BPM#5

U5

1

VDD

2

D+

3

ALERT/THERM2

D-

4

THERM

S IC EMC1402-1-ACZL-TR MSOP 8P

U24

1 2 3 4

G990P11U_SO8

C808

0.1U_0402_16V4Z

+3VS

XDP_TMS XDP_TDO

XDP_TRST# XDP_TCK

+3VS

8

SCLK

7

SDATA

6 5

GND

FAN1 Conn

C594 10U_0805_10V4ZC594 10U_0805_10V4Z

1 2

VEN VIN VO VSET

12

R469

R469 10K_0402_5%

10K_0402_5%

1

C596

C596 1000P_0402_50V7K

1000P_0402_50V7K

2

8

GND

7

GND

6

GND

5

GND

+VCC_FAN1

Title

Size Document Number Rev

B

Date: Sheet

1 2

R43

R11 54.9_0402_1%R11 54.9_0402_1%

1 2

R14 54.9_0402_1%R14 54.9_0402_1%

1 2

R12 54.9_0402_1%@R12 54.9_0402_1%@

1 2

R13 54.9_0402_1%

1 2

@

R16 54.9_0402_1%R16 54.9_0402_1%

1 2

R15 54.9_0402_1%R15 54.9_0402_1%

1 2

R95

R95 10K_0402_5%

10K_0402_5%

1 2

EC_SMB_CK2 EC_SMB_DA2

+5VS

12

D17

D17 1SS355TE-17_SOD323-2@

1SS355TE-17_SOD323-2@

D16

1 2

C595

1U_0603_10V4Z

1 2

C597

0.1U_0402_16V4Z

1 2

40mil

Compal Electronics, Inc.

Penryn (1/3)

JIWA3/A4_LA4212P

+3VS

1K_0402_5%@

+VCCP

EC_SMB_CK2 <16,35,41>

EC_SMB_DA2 <16,35,41>

BAS16_SOT23-3@

JP13

1

2

3

4

GND

5

GND

E&T_3801-F03N-01R

ME@

of

553Wednesday, May 14, 2008

of

553Wednesday, May 14, 2008

of

553Wednesday, May 14, 2008

1

1.0

5

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4

3

2

1

+CPU_CORE +CPU_CORE

ME@

H_D#[0..15]<8>

D D

H_DSTBN#0<8> H_DSTBP#0<8>

H_DINV#0<8>

H_D#[16..31]<8>

C C

H_DSTBN#1<8> H_DSTBP#1<8>

H_DINV#1<8>

R45 1K_0402_5%@R45 1K_0402_5%@

1 2

R46 1K_0402_5%@R46 1K_0402_5%@

1 2

Trace Close CPU < 0.5'

Width=4 mil , Spacing: 15mil (55Ohm)

B B

T16T16 T15T15 T14T14 T17T17 T10T10

CPU_BSEL0<22> CPU_BSEL1<22> CPU_BSEL2<22>

H_D#0 H_D#1 H_D#2 H_D#3 H_D#4 H_D#5 H_D#6 H_D#7 H_D#8 H_D#9 H_D#10 H_D#11 H_D#12 H_D#13 H_D#14 H_D#15 H_DSTBN#0 H_DSTBP#0 H_DINV#0

H_D#16 H_D#17 H_D#18 H_D#19 H_D#20 H_D#21 H_D#22 H_D#23 H_D#24 H_D#25 H_D#26 H_D#27 H_D#28 H_D#29 H_D#30 H_D#31 H_DSTBN#1 H_DSTBP#1 H_DINV#1

+CPU_GTLREF

TEST1 TEST2 TEST3 TEST4 TEST5 TEST6

TEST7 CPU_BSEL0 CPU_BSEL1 CPU_BSEL2

E22 F24 E26

G22

F23

G25

E25 E23 K24

G24

H22 F26 K22 H23

H26 H25

N22 K25 P26 R23 L23

M24

L22

M23

P25 P23 P22 T24

R24

L25 T25

N25

L26 M26 N24

AD26

C23 D25 C24

AF26

AF1

A26

B22

B23 C21

J24 J23

J26

C3

ME@

JCPUB

D[0]# D[1]# D[2]# D[3]# D[4]# D[5]# D[6]# D[7]# D[8]# D[9]# D[10]# D[11]# D[12]# D[13]# D[14]# D[15]# DSTBN[0]# DSTBP[0]# DINV[0]#

D[16]# D[17]# D[18]# D[19]# D[20]# D[21]# D[22]# D[23]# D[24]# D[25]# D[26]# D[27]# D[28]# D[29]# D[30]# D[31]# DSTBN[1]# DSTBP[1]# DINV[1]#

GTLREF TEST1 TEST2 TEST3 TEST4 TEST5 TEST6 TEST7 BSEL[0] BSEL[1] BSEL[2]

Penryn

DATA GRP 0

DATA GRP 1

MISC

PWRGOOD

H_D#[32..47] <8>

H_DSTBN#2 <8> H_DSTBP#2 <8> H_DINV#2 <8> H_D#[48..63] <8>

H_DSTBN#3 <8> H_DSTBP#3 <8> H_DINV#3 <8>

H_DPRSTP# <8,27,51> H_DPSLP# <27> H_DPWR# <8> H_PWRGOOD <27> H_CPUSLP# <8>

H_PSI# <51>

D[32]# D[33]# D[34]# D[35]# D[36]# D[37]# D[38]# D[39]# D[40]#

DATA GRP 2DATA GRP 3

D[41]# D[42]# D[43]# D[44]# D[45]# D[46]#

D[47]# DSTBN[2]# DSTBP[2]#

DINV[2]#

D[48]#

D[49]#

D[50]#

D[51]#

D[52]#

D[53]#

D[54]#

D[55]#

D[56]#

D[57]#

D[58]#

D[59]#

D[60]#

D[61]#

D[62]#

D[63]# DSTBN[3]# DSTBP[3]#

DINV[3]# COMP[0]

COMP[1] COMP[2] COMP[3]

DPRSTP#

DPSLP#

DPWR#

SLP#

PSI#

Y22 AB24 V24 V26 V23 T22 U25 U23 Y25 W22 Y23 W24 W25 AA23 AA24 AB25 Y26 AA26 U22

AE24 AD24 AA21 AB22 AB21 AC26 AD20 AE22 AF23 AC25 AE21 AD21 AC22 AD23 AF22 AC23 AE25 AF24 AC20

R26 U26 AA1 Y1

E5 B5 D24 D6 D7 AE6

COMP0 COMP1 COMP2 COMP3

H_D#32 H_D#33 H_D#34 H_D#35 H_D#36 H_D#37 H_D#38 H_D#39 H_D#40 H_D#41 H_D#42 H_D#43 H_D#44 H_D#45 H_D#46 H_D#47 H_DSTBN#2 H_DSTBP#2 H_DINV#2

H_D#48 H_D#49 H_D#50 H_D#51 H_D#52 H_D#53 H_D#54 H_D#55 H_D#56 H_D#57 H_D#58 H_D#59 H_D#60 H_D#61 H_D#62 H_D#63 H_DSTBN#3 H_DSTBP#3 H_DINV#3

R63 27.4_0402_1%R63 27.4_0402_1%

1 2

R64 54.9_0402_1%R64 54.9_0402_1%

1 2

R10 27.4_0402_1%R10 27.4_0402_1%

1 2

R9 54.9_0402_1%R9 54.9_0402_1%

H_DPRSTP# H_DPSLP# H_DPWR# H_PWRGOOD H_CPUSLP# H_PSI#

1 2

TRACE CLOSELY CPU < 0.5'

COMP0, COMP2 layout : Width 18mils and Space 25mils (27.4Ohms) COMP1, COMP3 layout : Width 4mils and Space 25mils (55Ohms)

layout note: Route TEST3 & TEST5 traces on ground referenced layer to the TPs

+VCCP

12

R471

R471 1K_0402_1%

1K_0402_1%

Layout note: Z0=55 ohm

0.5" max for GTLREF.

A A

+CPU_GTLREF

12

R470

R470 2K_0402_1%

2K_0402_1%

FSB

BCLK BSEL2 BSEL1 BSEL0 533 667 800

133

166

200

001

100

1067 266 0 0 0

110

Close to CPU pin AD26 within 500mils.

5

4

Security Classification

2007/10/15 2008/10/15

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2007/10/15 2008/10/15

3

Compal Secret Data

Deciphered Date

ME@

JCPUC

AA10 AA12 AA13 AA15 AA17 AA18 AA20

AC10 AB10 AB12 AB14 AB15 AB17 AB18

A10 A12 A13 A15 A17 A18 A20

B10 B12 B14 B15 B17 B18 B20

C10 C12 C13 C15 C17 C18

D10 D12 D14 D15 D17 D18

E10 E12 E13 E15 E17 E18 E20

F10 F12 F14 F15 F17 F18 F20 AA7 AA9

AB9

A7

VCC[001]

A9

VCC[002] VCC[003] VCC[004] VCC[005] VCC[006] VCC[007] VCC[008] VCC[009]

B7

VCC[010]

B9

VCC[011] VCC[012] VCC[013] VCC[014] VCC[015] VCC[016] VCC[017] VCC[018]

C9

VCC[019] VCC[020] VCC[021] VCC[022] VCC[023] VCC[024] VCC[025]

D9

VCC[026] VCC[027] VCC[028] VCC[029] VCC[030] VCC[031] VCC[032]

E7

VCC[033]

E9

VCC[034] VCC[035] VCC[036] VCC[037] VCC[038] VCC[039] VCC[040] VCC[041]

F7

VCC[042]

F9

VCC[043] VCC[044] VCC[045] VCC[046] VCC[047] VCC[048] VCC[049] VCC[050] VCC[051] VCC[052] VCC[053] VCC[054] VCC[055] VCC[056] VCC[057] VCC[058] VCC[059] VCC[060] VCC[061] VCC[062] VCC[063] VCC[064]

VCCSENSE VCC[065] VCC[066] VCC[067]

VSSSENSE

Penryn

VCC[068] VCC[069] VCC[070] VCC[071] VCC[072] VCC[073] VCC[074] VCC[075] VCC[076] VCC[077] VCC[078] VCC[079] VCC[080] VCC[081] VCC[082] VCC[083] VCC[084] VCC[085] VCC[086] VCC[087] VCC[088] VCC[089] VCC[090] VCC[091] VCC[092] VCC[093] VCC[094] VCC[095] VCC[096] VCC[097] VCC[098] VCC[099] VCC[100]

VCCP[01] VCCP[02] VCCP[03] VCCP[04] VCCP[05] VCCP[06] VCCP[07] VCCP[08] VCCP[09] VCCP[10] VCCP[11] VCCP[12] VCCP[13] VCCP[14] VCCP[15] VCCP[16]

VCCA[01] VCCA[02]

VID[0] VID[1] VID[2] VID[3] VID[4] VID[5] VID[6]

AB20 AB7 AC7 AC9 AC12 AC13 AC15 AC17 AC18 AD7 AD9 AD10 AD12 AD14 AD15 AD17 AD18 AE9 AE10 AE12 AE13 AE15 AE17 AE18 AE20 AF9 AF10 AF12 AF14 AF15 AF17 AF18 AF20

R47 0_0402_5%R47 0_0402_5%

G21 V6

R8 0_0402_5%R8 0_0402_5%

J6 K6 M6 J21 K21 M21 N21 N6 R21 R6 T21 T6 V21 W21

B26 C26

AD6 AF5 AE5 AF4 AE3 AF3 AE2

AF7

AE7

.

For testing purpose only

12 12

VCCSENSE

VSSSENSE

Length match within 25 mils. The trace width/space/other is 16/7/25.

Layout Note: Route VCCSENSE and VSSSENSE traces at

27.4 Ohms with 50 mil spacing. Place PU and PD within 1 inch of CPU. Length matched to within 25 mils.

Title

Size Document Number Rev

B

Date: Sheet

2

Date: Sheet

+VCCP

Near pin B26

20mils

CPU_VID0 <51> CPU_VID1 <51> CPU_VID2 <51> CPU_VID3 <51> CPU_VID4 <51> CPU_VID5 <51> CPU_VID6 <51>

VCCSENSE <51>

VSSSENSE <51>

+CPU_CORE

1

C599

2

R23

R23 100_0402_1%

100_0402_1%

1 2

R24

R24 100_0402_1%

100_0402_1%

1 2

1

C598

2

10U_0805_10V4Z

0.01U_0402_16V7K

VCCSENSE

VSSSENSE

Close to CPU pin within 500mils.

Compal Electronics, Inc.

Penryn (2/3)

JIWA3/A4_LA4212P

653Monday, May 12, 2008

1

+1.5VS

of

1.0

5

hexainf@hotmail.com gratuito - free of charge.

ME@

JCPUD

A4

VSS[001]

A8

VSS[002]

A11

VSS[003]

A14

VSS[004]

A16

VSS[005]

A19

VSS[006]

A23

VSS[007]

D D

C C

B B

AF2

VSS[008]

B6

VSS[009]

B8

VSS[010]

B11

VSS[011]

B13

VSS[012]

B16

VSS[013]

B19

VSS[014]

B21

VSS[015]

B24

VSS[016]

C5

VSS[017]

C8

VSS[018]

C11

VSS[019]

C14

VSS[020]

C16

VSS[021]

C19

VSS[022]

C2

VSS[023]

C22

VSS[024]

C25

VSS[025]

D1

VSS[026]

D4

VSS[027]

D8

VSS[028]

D11

VSS[029]

D13

VSS[030]

D16

VSS[031]

D19

VSS[032]

D23

VSS[033]

D26

VSS[034]

E3

VSS[035]

E6

VSS[036]

E8

VSS[037]

E11

VSS[038]

E14

VSS[039]

E16

VSS[040]

E19

VSS[041]

E21

VSS[042]

E24

VSS[043]

F5

VSS[044]

F8

VSS[045]

F11

VSS[046]

F13

VSS[047]

F16

VSS[048]

F19

VSS[049]

F2

VSS[050]

F22

VSS[051]

F25

VSS[052]

G4

VSS[053]

G1

VSS[054]

G23

VSS[055]

G26

VSS[056]

H3

VSS[057]

H6

VSS[058]

H21

VSS[059]

H24

VSS[060]

J2

VSS[061]

J5

VSS[062]

J22

VSS[063]

J25

VSS[064]

K1

VSS[065]

K4

VSS[066]

K23

VSS[067]

K26

VSS[068]

L3

VSS[069]

L6

VSS[070]

L21

VSS[071]

L24

VSS[072]

M2

VSS[073]

M5

VSS[074]

M22

VSS[075]

M25

VSS[076]

N1

VSS[077]

N4

VSS[078]

N23

VSS[079]

N26

VSS[080] VSS[081]P3VSS[162]

Penryn

VSS[082] VSS[083] VSS[084] VSS[085] VSS[086] VSS[087] VSS[088] VSS[089] VSS[090] VSS[091] VSS[092] VSS[093] VSS[094] VSS[095] VSS[096] VSS[097] VSS[098] VSS[099] VSS[100] VSS[101] VSS[102] VSS[103] VSS[104] VSS[105] VSS[106] VSS[107] VSS[108] VSS[109] VSS[110] VSS[111] VSS[112] VSS[113] VSS[114] VSS[115] VSS[116] VSS[117] VSS[118] VSS[119] VSS[120] VSS[121] VSS[122] VSS[123] VSS[124] VSS[125] VSS[126] VSS[127] VSS[128] VSS[129] VSS[130] VSS[131] VSS[132] VSS[133] VSS[134] VSS[135] VSS[136] VSS[137] VSS[138] VSS[139] VSS[140] VSS[141] VSS[142] VSS[143] VSS[144] VSS[145] VSS[146] VSS[147] VSS[148] VSS[149] VSS[150] VSS[151] VSS[152] VSS[153] VSS[154] VSS[155] VSS[156] VSS[157] VSS[158] VSS[159] VSS[160] VSS[161]

VSS[163]

.

P6 P21 P24 R2 R5 R22 R25 T1 T4 T23 T26 U3 U6 U21 U24 V2 V5 V22 V25 W1 W4 W23 W26 Y3 Y6 Y21 Y24 AA2 AA5 AA8 AA11 AA14 AA16 AA19 AA22 AA25 AB1 AB4 AB8 AB11 AB13 AB16 AB19 AB23 AB26 AC3 AC6 AC8 AC11 AC14 AC16 AC19 AC21 AC24 AD2 AD5 AD8 AD11 AD13 AD16 AD19 AD22 AD25 AE1 AE4 AE8 AE11 AE14 AE16 AE19 AE23 AE26 A2 AF6 AF8 AF11 AF13 AF16 AF19 AF21 A25 AF25

220U_D2_4VM

4

Place these capacitors on L8 (North side,Secondary Layer)

Place these capacitors on L8 (Sorth side,Secondary Layer)

+VCCP

1

+

C8

2

1

2

+CPU_CORE

South Side Secondary

C11

0.1U_0402_16V4Z

1

C13

C13 10U_0805_6.3V6M

10U_0805_6.3V6M

2

1

C28

C28 10U_0805_6.3V6M

10U_0805_6.3V6M

2

1

C583

C583 10U_0805_6.3V6M

10U_0805_6.3V6M

2

1

C588

C588 10U_0805_6.3V6M

10U_0805_6.3V6M

2

1

C10

0.1U_0402_16V4Z

2

1

C39

C39 10U_0805_6.3V6M

10U_0805_6.3V6M

2

1

C24

C24 10U_0805_6.3V6M

10U_0805_6.3V6M

2

1

C585

C585 10U_0805_6.3V6M

10U_0805_6.3V6M

2

1

C587

C587 10U_0805_6.3V6M

10U_0805_6.3V6M

2

+CPU_CORE

C47

330U_V_2.5VK_R9

1

2

3

1

+

2

C51

0.1U_0402_16V4Z

1

C36

C36 10U_0805_6.3V6M

10U_0805_6.3V6M

2

1

C40

C40 10U_0805_6.3V6M

10U_0805_6.3V6M

2

1

C586

C586 10U_0805_6.3V6M

10U_0805_6.3V6M

2

1

C590

C590 10U_0805_6.3V6M

10U_0805_6.3V6M

2

1

+

C17

2

330U_V_2.5VK_R9

1

2

1

+

C41

2

@

330U_V_2.5VK_R9

C50

0.1U_0402_16V4Z

1

C30

C30 10U_0805_6.3V6M

10U_0805_6.3V6M

2

1

C37

C37 10U_0805_6.3V6M

10U_0805_6.3V6M

2

1

C589

C589 10U_0805_6.3V6M

10U_0805_6.3V6M

2

1

C592

C592 10U_0805_6.3V6M

10U_0805_6.3V6M

2

1

C16

2

330U_V_2.5VK_R9

1

2

+

C48

0.1U_0402_16V4Z

2

1

C27

C27 10U_0805_6.3V6M

10U_0805_6.3V6M

2

1

C31

C31 10U_0805_6.3V6M

10U_0805_6.3V6M

2

1

C591

C591 10U_0805_6.3V6M

10U_0805_6.3V6M

2

1

C35

C35 10U_0805_6.3V6M

10U_0805_6.3V6M

2

North Side Secondary

1

C9

0.1U_0402_16V4Z

2

1

C19

C19 10U_0805_6.3V6M

10U_0805_6.3V6M

2

1

C26

C26 10U_0805_6.3V6M

10U_0805_6.3V6M

2

1

C593

C593 10U_0805_6.3V6M

10U_0805_6.3V6M

2

1

C29

C29 10U_0805_6.3V6M

10U_0805_6.3V6M

2

Place these inside socket cavity on L8 (North side Secondary)

1

C14

C14 10U_0805_6.3V6M

10U_0805_6.3V6M

2

1

C20

C20 10U_0805_6.3V6M

10U_0805_6.3V6M

2

1

C582

C582 10U_0805_6.3V6M

10U_0805_6.3V6M

2

1

C25

C25 10U_0805_6.3V6M

10U_0805_6.3V6M

2

1

C12

C12 10U_0805_6.3V6M

10U_0805_6.3V6M

2

1

C15

C15 10U_0805_6.3V6M

10U_0805_6.3V6M

2

1

C584

C584 10U_0805_6.3V6M

10U_0805_6.3V6M

2

1

C33

C33 10U_0805_6.3V6M

10U_0805_6.3V6M

2

Mid Frequence Decoupling

ESR <= 1.5m ohm Capacitor > 1980uF

1

A A

Security Classification

5

Security Classification

2007/10/15 2008/10/15

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2007/10/15 2008/10/15

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

B

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

Penryn (3/3)

JIWA3/A4_LA4212P

1

of

753Monday, May 12, 2008

of

753Monday, May 12, 2008

of

753Monday, May 12, 2008

1.0

5

hexainf@hotmail.com gratuito - free of charge.

H_D#[0..63]<6>

D D

C C

H_SWNG H_RCOMP

H_RESET#<5> H_CPUSLP#<6>

layout note: Route H_SCOMP and H_SCOMP# with trace width

spacing and impedance (55 ohm) same as FSB data traces

B B

+VCCP

12

R493

12

R488

H_RESET# H_CPUSLP#

H_VREF

Layout Note: H_RCOMP / H_VREF / H_SWNG

trace width and spacing is 10/20

1K_0402_1%

0.1U_0402_16V4Z

1

C623

2

2K_0402_1%

within 100 mils from NB

H_D#0 H_D#1 H_D#2 H_D#3 H_D#4 H_D#5 H_D#6 H_D#7 H_D#8 H_D#9 H_D#10 H_D#11 H_D#12 H_D#13 H_D#14 H_D#15 H_D#16 H_D#17 H_D#18 H_D#19 H_D#20 H_D#21 H_D#22 H_D#23 H_D#24 H_D#25 H_D#26 H_D#27 H_D#28 H_D#29 H_D#30 H_D#31 H_D#32 H_D#33 H_D#34 H_D#35 H_D#36 H_D#37 H_D#38 H_D#39 H_D#40 H_D#41 H_D#42 H_D#43 H_D#44 H_D#45 H_D#46 H_D#47 H_D#48 H_D#49 H_D#50 H_D#51 H_D#52 H_D#53 H_D#54 H_D#55 H_D#56 H_D#57 H_D#58 H_D#59 H_D#60 H_D#61 H_D#62 H_D#63

12

R89

24.9_0402_1%

AD14

AA13 AA11

AD11 AD10 AD13 AE12

AE14

AE11

AG2

M11

N12

P13

N10

Y10 Y12 Y14

W2

AA8

AA9

AE9 AA2 AD8 AA3 AD3 AD7

AF3 AC1 AE3 AC3

AE8 AD6

C12 E11

A11 B11

F2 G8 F8 E6 G2 H6 H2 F6 D4 H3 M9

J1 J2

J6 P2 L2 R2 N9 L6 M5

J3 N2 R1 N5 N6

N8 L7

M3 Y3

Y6

Y7

Y9

C5 E3

H_RCOMP H_SWNGH_VREF

U26A

H_D#_0 H_D#_1 H_D#_2 H_D#_3 H_D#_4 H_D#_5 H_D#_6 H_D#_7 H_D#_8 H_D#_9 H_D#_10 H_D#_11 H_D#_12 H_D#_13 H_D#_14 H_D#_15 H_D#_16 H_D#_17 H_D#_18 H_D#_19 H_D#_20 H_D#_21 H_D#_22 H_D#_23 H_D#_24 H_D#_25 H_D#_26 H_D#_27 H_D#_28 H_D#_29 H_D#_30 H_D#_31 H_D#_32 H_D#_33 H_D#_34 H_D#_35 H_D#_36 H_D#_37 H_D#_38 H_D#_39 H_D#_40 H_D#_41 H_D#_42 H_D#_43 H_D#_44 H_D#_45 H_D#_46 H_D#_47 H_D#_48 H_D#_49 H_D#_50 H_D#_51 H_D#_52 H_D#_53 H_D#_54 H_D#_55 H_D#_56 H_D#_57 H_D#_58 H_D#_59 H_D#_60 H_D#_61 H_D#_62 H_D#_63

H_SWING H_RCOMP

H_CPURST# H_CPUSLP#

H_AVREF H_DVREF

GM@

H_A#_3 H_A#_4 H_A#_5 H_A#_6 H_A#_7 H_A#_8

H_A#_9 H_A#_10 H_A#_11 H_A#_12 H_A#_13 H_A#_14 H_A#_15 H_A#_16 H_A#_17 H_A#_18 H_A#_19 H_A#_20 H_A#_21 H_A#_22 H_A#_23 H_A#_24 H_A#_25 H_A#_26 H_A#_27 H_A#_28 H_A#_29 H_A#_30 H_A#_31 H_A#_32 H_A#_33 H_A#_34 H_A#_35

H_ADS#

H_ADSTB#_0 H_ADSTB#_1

H_BNR#

H_BPRI#

H_BREQ#

H_DEFER#

HOST

H_DBSY#

HPLL_CLK

HPLL_CLK#

H_DPWR#

H_DRDY#

H_HIT#

H_HITM#

H_LOCK# H_TRDY#

H_DINV#_0 H_DINV#_1 H_DINV#_2 H_DINV#_3

H_DSTBN#_0 H_DSTBN#_1 H_DSTBN#_2 H_DSTBN#_3

H_DSTBP#_0 H_DSTBP#_1 H_DSTBP#_2 H_DSTBP#_3

H_REQ#_0 H_REQ#_1 H_REQ#_2 H_REQ#_3 H_REQ#_4

H_RS#_0 H_RS#_1 H_RS#_2

CANTIGA ES_FCBGA1329

+VCCP

12

R482

221_0603_1%

12

1

R484

2

100_0402_1%

0.1U_0402_16V4Z

Near B3 pin

A14 C15 F16 H13 C18 M16 J13 P16 R16 N17 M13 E17 P17 F17 G20 B19 J16 E20 H16 J20 L17 A17 B17 L16 C21 J17 H20 B18 K17 B20 F21 K21 L20

H12 B16 G17 A9 F11 G12 E9 B10 AH7 AH6 J11 F9 H9 E12 H11 C9

J8 L3 Y13 Y1

L10 M7 AA5 AE6

L9 M8 AA6 AE5

B15 K13 F13 B13 B14

B6 F12 C8

C616

H_A#3 H_A#4 H_A#5 H_A#6 H_A#7 H_A#8 H_A#9 H_A#10 H_A#11 H_A#12 H_A#13 H_A#14 H_A#15 H_A#16 H_A#17 H_A#18 H_A#19 H_A#20 H_A#21 H_A#22 H_A#23 H_A#24 H_A#25 H_A#26 H_A#27 H_A#28 H_A#29 H_A#30 H_A#31 H_A#32 H_A#33 H_A#34 H_A#35

H_ADS# H_ADSTB#0 H_ADSTB#1 H_BNR# H_BPRI# H_BR0# H_DEFER# H_DBSY# CLK_MCH_BCLK CLK_MCH_BCLK# H_DPWR# H_DRDY# H_HIT# H_HITM# H_LOCK# H_TRDY#

H_DINV#0 H_DINV#1 H_DINV#2 H_DINV#3

H_DSTBN#0 H_DSTBN#1 H_DSTBN#2 H_DSTBN#3

H_DSTBP#0 H_DSTBP#1 H_DSTBP#2 H_DSTBP#3

H_REQ#0 H_REQ#1 H_REQ#2 H_REQ#3 H_REQ#4

H_RS#0 H_RS#1 H_RS#2

4

H_A#[3..35] <5>

H_ADS# <5> H_ADSTB#0 <5> H_ADSTB#1 <5> H_BNR# <5> H_BPRI# <5> H_BR0# <5> H_DEFER# <5> H_DBSY# <5> CLK_MCH_BCLK <22> CLK_MCH_BCLK# <22> H_DPWR# <6> H_DRDY# <5> H_HIT# <5> H_HITM# <5> H_LOCK# <5> H_TRDY# <5>

H_DINV#0 <6> H_DINV#1 <6> H_DINV#2 <6> H_DINV#3 <6>

H_DSTBN#0 <6> H_DSTBN#1 <6> H_DSTBN#2 <6> H_DSTBN#3 <6>

H_DSTBP#0 <6> H_DSTBP#1 <6> H_DSTBP#2 <6> H_DSTBP#3 <6>

H_REQ#0 <5> H_REQ#1 <5> H_REQ#2 <5> H_REQ#3 <5> H_REQ#4 <5>

H_RS#0 <5> H_RS#1 <5> H_RS#2 <5>

ICH_POK<28,35>

VGATE<28,51>

PLT_RST#<16,26,32,33,36,40>

+DDR_MCH_REF

SMRCOMP_VOH

SMRCOMP_VOL

+3VS

12

R206

10K_0402_5%

R177 0_0402_5%R177 0_0402_5% R178 0_0402_5%@R178 0_0402_5%@

Layout Note: V_DDR_MCH_REF trace width and spacing is 20/20.

2

C641

1

C640

2.2U_0603_6.3V4Z

1

C635

2

C636

2.2U_0603_6.3V4Z

12

R217

R217 10K_0402_5%

10K_0402_5%

PM_EXTTS#0 PM_EXTTS#1

12 12

1 2

R103 100_0402_5%R103 100_0402_5%

R160

10K_0402_5%

+DDR_MCH_REF

R162

1

10K_0402_5%

C273

2

0.1U_0402_16V4Z

2

1

2

+1.8V

12

R502

R502 1K_0402_1%

1K_0402_1%

0.01U_0402_25V7K

12

R501

3.01K_0402_1%

NA lead free

12

R500

R500 1K_0402_1%

1K_0402_1%

0.01U_0402_25V7K

PM_POK_R

0309 add

PLT_RST#_R

12

3

MCH_CLKSEL0<22> MCH_CLKSEL1<22> MCH_CLKSEL2<22>

CFG5

PM_BMBUSY#<28>

H_DPRSTP#<6,27,51> PM_EXTTS#0<14> PM_EXTTS#1<15>

H_THERMTRIP#<5,27>

DPRSLPVR<28,51>

MCH_CLKSEL0 MCH_CLKSEL1 MCH_CLKSEL2

CFG5 CFG6

T48T48

CFG7

T47T47

CFG8

T45T45

CFG9

T41T41

CFG10

T50T50

CFG11

T49T49

CFG12

T39T39

CFG13

T43T43

CFG14

T38T38

CFG15

T37T37

CFG16

T46T46

CFG17

T42T42

CFG18

T55T55

CFG19

T53T53

CFG20

T54T54

PM_BMBUSY# H_DPRSTP# PM_EXTTS#0 PM_EXTTS#1 PM_POK_R PLT_RST#_R H_THERMTRIP# DPRSLPVR

U26B

M36

T69T69

RSVD1

N36

T70T70

RSVD2

R33

T58T58

RSVD3

T33

T66T66

RSVD4

AH9

T23T23

RSVD5

AH10

T25T25

RSVD6

AH12

T27T27

RSVD7

AH13

T30T30

RSVD8

K12

T26T26

RSVD9

AL34

T62T62

RSVD10

AK34

T61T61

RSVD11

AN35

T67T67

RSVD12

AM35

T68T68

RSVD13

T24

T44T44

RSVD14

B31

T56T56

RSVD15

B2

T84T84

RSVD16

M1

T83T83

RSVD17

AY21

T40T40

RSVD20

BG23

T87T87

RSVD22

BF23

T88T88

RSVD23

BH18

T34T34

RSVD24

BF18

T35T35

RSVD25

T25

CFG_0

R25

CFG_1

P25

CFG_2

P20

CFG_3

P24

CFG_4

C25

CFG_5

N24

CFG_6

M24

CFG_7

E21

CFG_8

C23

CFG_9

C24

CFG_10

N21

CFG_11

P21

CFG_12

T21

CFG_13

R20

CFG_14

M20

CFG_15

L21

CFG_16

H21

CFG_17

P29

CFG_18

R28

CFG_19

T28

CFG_20

R29

PM_SYNC#

B7

PM_DPRSTP#

N33

PM_EXT_TS#_0

P32

PM_EXT_TS#_1

AT40

PWROK

AT11

RSTIN#

T20

THERMTRIP#

R32

DPRSLPVR

BG48

NC_1

BF48

NC_2

BD48

NC_3

BC48

NC_4

BH47

NC_5

BG47

NC_6

BE47

NC_7

BH46

NC_8

BF46

NC_9

BG45

NC_10

BH44

NC_11

BH43

NC_12

BH6

NC_13

BH5

NC_14

BG4

NC_15

BH3

NC_16

BF3

NC_17

BH2

NC_18

BG2

NC_19

BE2

NC_20

BG1

NC_21

BF1

NC_22

BD1

NC_23

BC1

NC_24

F1

NC_25

A47

NC_26

GM@

RSVD CFG PM NC

DDR CLK/ CONTROL/ COMPENSATIONHDA

CLKDMI

GRAPHICS VID

MEMISC

SM_RCOMP_VOH SM_RCOMP_VOL

DPLL_REF_CLK#

DPLL_REF_SSCLK

DPLL_REF_SSCLK#

DDPC_CTRLCLK

DDPC_CTRLDATA

SDVO_CTRLCLK

SDVO_CTRLDATA

CANTIGA ES_FCBGA1329

SA_CK_0 SA_CK_1 SB_CK_0 SB_CK_1

SA_CK#_0 SA_CK#_1 SB_CK#_0 SB_CK#_1

SA_CKE_0 SA_CKE_1 SB_CKE_0 SB_CKE_1

SA_CS#_0 SA_CS#_1 SB_CS#_0 SB_CS#_1

SA_ODT_0 SA_ODT_1

SB_ODT_O

SB_ODT_1

SM_RCOMP

SM_RCOMP#

SM_VREF

SM_PWROK

SM_REXT

SM_DRAMRST#

DPLL_REF_CLK

PEG_CLK

PEG_CLK#

DMI_RXN_0 DMI_RXN_1 DMI_RXN_2 DMI_RXN_3

DMI_RXP_0 DMI_RXP_1 DMI_RXP_2 DMI_RXP_3

DMI_TXN_0 DMI_TXN_1 DMI_TXN_2 DMI_TXN_3

DMI_TXP_0 DMI_TXP_1 DMI_TXP_2 DMI_TXP_3

GFX_VID_0 GFX_VID_1 GFX_VID_2 GFX_VID_3 GFX_VID_4

GFX_VR_EN

CL_CLK

CL_DATA

CL_PWROK

CL_RST# CL_VREF

CLKREQ#

ICH_SYNC#

TSATN#

HDA_BCLK HDA_RST#

HDA_SDI

HDA_SDO

HDA_SYNC

2

M_CLK_DDR0

AP24

M_CLK_DDR1

AT21

M_CLK_DDR2

AV24

M_CLK_DDR3

AU20

M_CLK_DDR#0

AR24

M_CLK_DDR#1

AR21

M_CLK_DDR#2

AU24

M_CLK_DDR#3

AV20

DDR_CKE0_DIMMA

BC28

DDR_CKE1_DIMMA

AY28

DDR_CKE2_DIMMB

AY36

DDR_CKE3_DIMMB

BB36

DDR_CS0_DIMMA#

BA17

DDR_CS1_DIMMA#

AY16

DDR_CS2_DIMMB#

AV16

DDR_CS3_DIMMB#

AR13

M_ODT0

BD17

M_ODT1

AY17

M_ODT2

BF15

M_ODT3

AY13

SMRCOMP

BG22

SMRCOMP#

BH21

SMRCOMP_VOH

BF28

SMRCOMP_VOL

BH28

+DDR_MCH_REF

AV42

SM_PWROK

AR36

SM_REXT

BF17 BC36

CLK_MCH_DREFCLK

B38

CLK_MCH_DREFCLK#

A38

MCH_SSCDREFCLK

E41

MCH_SSCDREFCLK#

F41

CLK_MCH_3GPLL

F43

CLK_MCH_3GPLL#

E43

DMI_TXN0

AE41

DMI_TXN1

AE37

DMI_TXN2

AE47

DMI_TXN3

AH39

DMI_TXP0

AE40

DMI_TXP1

AE38

DMI_TXP2

AE48

DMI_TXP3

AH40

DMI_RXN0

AE35

DMI_RXN1

AE43

DMI_RXN2

AE46

DMI_RXN3

AH42

DMI_RXP0

AD35

DMI_RXP1

AE44

DMI_RXP2

AF46

DMI_RXP3

AH43

B33

T90 PADT90 PAD

B32

T89 PADT89 PAD

G33

T65 PADT65 PAD

F33

T64 PADT64 PAD

E33

T63 PADT63 PAD

C34

T91T91

For AMT function

CL_CLK0

AH37

CL_DATA0

AH36 AN36

CL_RST#

AJ35

CL_VREF

AH34

N28 M28

HDMICLK_NB

G36

HDMIDAT_NB

E36

MCH_CLKREQ#

K36

MCH_ICH_SYNC#

H36

B12

MCH_HDA_BCLK

B28

MCH_HDA_RST#

B30

MCH_HDA_SDIN

B29

MCH_HDA_SDOUT

C29

MCH_HDA_SYNC

A28

M_CLK_DDR0 <14> M_CLK_DDR1 <14> M_CLK_DDR2 <15> M_CLK_DDR3 <15>

M_CLK_DDR#0 <14> M_CLK_DDR#1 <14> M_CLK_DDR#2 <15> M_CLK_DDR#3 <15>

DDR_CKE0_DIMMA <14> DDR_CKE1_DIMMA <14> DDR_CKE2_DIMMB <15> DDR_CKE3_DIMMB <15>

DDR_CS0_DIMMA# <14> DDR_CS1_DIMMA# <14> DDR_CS2_DIMMB# <15> DDR_CS3_DIMMB# <15>

M_ODT0 <14> M_ODT1 <14> M_ODT2 <15> M_ODT3 <15>

R497 80.6_0402_1%R497 80.6_0402_1%

1 2

DDR3

CLK_MCH_DREFCLK <22>

CLK_MCH_DREFCLK# <22>

MCH_SSCDREFCLK <22>

MCH_SSCDREFCLK# <22>

CLK_MCH_3GPLL <22> CLK_MCH_3GPLL# <22>

DMI_TXN0 <28> DMI_TXN1 <28> DMI_TXN2 <28> DMI_TXN3 <28>

DMI_TXP0 <28> DMI_TXP1 <28> DMI_TXP2 <28> DMI_TXP3 <28>

DMI_RXN0 <28> DMI_RXN1 <28> DMI_RXN2 <28> DMI_RXN3 <28>

DMI_RXP0 <28> DMI_RXP1 <28> DMI_RXP2 <28> DMI_RXP3 <28>

connect to power CPU_CORE

CL_CLK0 <28> CL_DATA0 <28>

M_PWROK <28> CL_RST# <28>

T52T52 T51T51

1 2

56_0402_5%

R105

R80 33_0402_5%GM@R80 33_0402_5%GM@

1 2

R82 33_0402_5%GM@R82 33_0402_5%GM@

1 2

R79 33_0402_5%GM@R79 33_0402_5%GM@

1 2

R85 33_0402_5%GM@R85 33_0402_5%GM@

1 2

R81 33_0402_5%GM@R81 33_0402_5%GM@

1 2

Notice: Please check HDA power rail to select HDA controller.

+1.8V

R498

80.6_0402_1%

1 2

20mil

R148 10K_0402_5%R148 10K_0402_5%

1 2 1 2

R111 499_0402_1%R111 499_0402_1%

0.1U_0402_16V4Z

0.1U_0402_16V4Z C238

HDMICLK_NB <23> HDMIDAT_NB <23>

C238

MCH_CLKREQ# <22> MCH_ICH_SYNC# <28>

TSATN# <35>

+VCCP

1

For Crestline: 20ohm For Calero: 80.6ohm For Cantiga: 80.6ohm

MCH_HDA_BCLK

10P_0402_50V8J

+VCCP

12

R143

R143 1K_0402_1%

1K_0402_1%

12

1

R147

R147 499_0402_1%

499_0402_1%

2

check list 511ohm 1% ISPD only 510ohm 5%

HDA_BITCLK_CODEC <16,27,30>

HDA_RST_CODEC# <16,27,30> HDA_SDIN0 <27> HDA_SDOUT_CODEC <16,27,30>

HDA_SYNC_CODEC <16,27,30>

C646

@

1

2

A A

Security Classification

5

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2007/10/15 2008/10/15

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Document Number Rev

C

Date: Sheet

Compal Electronics, Inc.

Cantiga GMCH(1/6)-GTL

JIWA3/A4_LA4212P

1

of

853Wednesday, May 14, 2008

1.0

5

hexainf@hotmail.com gratuito - free of charge.

D D

4

3

2

1

DDR_A_D[0..63]<14> DDR_B_D[0..63]<15>

C C

B B

DDR_A_D0 DDR_A_D1 DDR_A_D2 DDR_A_D3 DDR_A_D4 DDR_A_D5 DDR_A_D6 DDR_A_D7 DDR_A_D8

DDR_A_D9 DDR_A_D10 DDR_A_D11 DDR_A_D12 DDR_A_D13 DDR_A_D14 DDR_A_D15 DDR_A_D16 DDR_A_D17 DDR_A_D18 DDR_A_D19 DDR_A_D20 DDR_A_D21 DDR_A_D22 DDR_A_D23 DDR_A_D24 DDR_A_D25 DDR_A_D26 DDR_A_D27 DDR_A_D28 DDR_A_D29 DDR_A_D30 DDR_A_D31 DDR_A_D32 DDR_A_D33 DDR_A_D34 DDR_A_D35 DDR_A_D36 DDR_A_D37 DDR_A_D38 DDR_A_D39 DDR_A_D40 DDR_A_D41 DDR_A_D42 DDR_A_D43 DDR_A_D44 DDR_A_D45 DDR_A_D46 DDR_A_D47 DDR_A_D48 DDR_A_D49 DDR_A_D50 DDR_A_D51 DDR_A_D52 DDR_A_D53 DDR_A_D54 DDR_A_D55 DDR_A_D56 DDR_A_D57 DDR_A_D58 DDR_A_D59 DDR_A_D60 DDR_A_D61 DDR_A_D62 DDR_A_D63

AJ38 AJ41

AN38

AM38

AJ36

AJ40 AM44 AM42

AN43 AN44 AU40 AT38 AN41 AN39 AU44 AU42 AV39 AY44 BA40 BD43 AV41 AY43 BB41 BC40 AY37 BD38 AV37 AT36 AY38 BB38 AV36

AW36

BD13 AU11 BC11 BA12 AU13 AV13 BD12 BC12

AU10 BA11

BD9 AY8 BA6 AV5 AV7 AT9 AN8 AU5 AU6 AT5

AN10

AM11

AM5

AN12

AM13

AJ11

AJ12

BB9 BA9

AV9

AJ9 AJ8

U26D

SA_DQ_0 SA_DQ_1 SA_DQ_2 SA_DQ_3 SA_DQ_4 SA_DQ_5 SA_DQ_6 SA_DQ_7 SA_DQ_8 SA_DQ_9 SA_DQ_10 SA_DQ_11 SA_DQ_12 SA_DQ_13 SA_DQ_14 SA_DQ_15 SA_DQ_16 SA_DQ_17 SA_DQ_18 SA_DQ_19 SA_DQ_20 SA_DQ_21 SA_DQ_22 SA_DQ_23 SA_DQ_24 SA_DQ_25 SA_DQ_26 SA_DQ_27 SA_DQ_28 SA_DQ_29 SA_DQ_30 SA_DQ_31 SA_DQ_32 SA_DQ_33 SA_DQ_34 SA_DQ_35 SA_DQ_36 SA_DQ_37 SA_DQ_38 SA_DQ_39 SA_DQ_40 SA_DQ_41 SA_DQ_42 SA_DQ_43 SA_DQ_44 SA_DQ_45 SA_DQ_46 SA_DQ_47 SA_DQ_48 SA_DQ_49 SA_DQ_50 SA_DQ_51 SA_DQ_52 SA_DQ_53 SA_DQ_54 SA_DQ_55 SA_DQ_56 SA_DQ_57 SA_DQ_58 SA_DQ_59 SA_DQ_60 SA_DQ_61 SA_DQ_62 SA_DQ_63

GM@

SA_BS_0 SA_BS_1 SA_BS_2

SA_RAS# SA_CAS#

SA_WE#

SA_DM_0 SA_DM_1 SA_DM_2 SA_DM_3 SA_DM_4 SA_DM_5 SA_DM_6 SA_DM_7

SA_DQS_0 SA_DQS_1 SA_DQS_2 SA_DQS_3 SA_DQS_4 SA_DQS_5 SA_DQS_6 SA_DQS_7

SA_DQS#_0 SA_DQS#_1 SA_DQS#_2 SA_DQS#_3 SA_DQS#_4 SA_DQS#_5 SA_DQS#_6 SA_DQS#_7

SA_MA_0 SA_MA_1 SA_MA_2 SA_MA_3

DDR SYSTEM MEMORY A

SA_MA_4 SA_MA_5 SA_MA_6 SA_MA_7 SA_MA_8

SA_MA_9 SA_MA_10 SA_MA_11 SA_MA_12 SA_MA_13 SA_MA_14

CANTIGA ES_FCBGA1329

DDR_A_BS#1

BG18

DDR_A_BS#2

AT25

DDR_A_RAS#

BB20

DDR_A_CAS#

BD20

DDR_A_WE# DDR_B_CAS#

AY20

DDR_A_DM0

AM37

DDR_A_DM1

AT41

DDR_A_DM2

AY41

DDR_A_DM3

AU39

DDR_A_DM4

BB12

DDR_A_DM5

AY6

DDR_A_DM6

AT7

DDR_A_DM7

AJ5

DDR_A_DQS0

AJ44

DDR_A_DQS1

AT44

DDR_A_DQS2

BA43

DDR_A_DQS3

BC37

DDR_A_DQS4

AW12

DDR_A_DQS5

BC8

DDR_A_DQS6

AU8

DDR_A_DQS7

AM7

DDR_A_DQS#0

AJ43

DDR_A_DQS#1

AT43

DDR_A_DQS#2

BA44

DDR_A_DQS#3

BD37

DDR_A_DQS#4

AY12

DDR_A_DQS#5

BD8

DDR_A_DQS#6

AU9

DDR_A_DQS#7

AM8

DDR_A_MA0

BA21

DDR_A_MA1

BC24

DDR_A_MA2

BG24

DDR_A_MA3

BH24

DDR_A_MA4

BG25

DDR_A_MA5

BA24

DDR_A_MA6

BD24

DDR_A_MA7

BG27

DDR_A_MA8

BF25

DDR_A_MA9

AW24

DDR_A_MA10

BC21

DDR_A_MA11

BG26

DDR_A_MA12

BH26

DDR_A_MA13

BH17

DDR_A_MA14

AY25

DDR_A_BS#0

BD21

DDR_A_BS#0 <14> DDR_A_BS#1 <14> DDR_A_BS#2 <14>

DDR_A_RAS# <14> DDR_A_CAS# <14> DDR_A_WE# <14>

DDR_A_DM[0..7] <14>

DDR_A_DQS[0..7] <14>

DDR_A_DQS#[0..7] <14>

DDR_A_MA[0..14] <14>

DDR_B_D0 DDR_B_D1 DDR_B_D2 DDR_B_D3 DDR_B_D4 DDR_B_D5 DDR_B_D6 DDR_B_D7 DDR_B_D8

DDR_B_D9 DDR_B_D10 DDR_B_D11 DDR_B_D12 DDR_B_D13 DDR_B_D14 DDR_B_D15 DDR_B_D16 DDR_B_D17 DDR_B_D18 DDR_B_D19 DDR_B_D20 DDR_B_D21 DDR_B_D22 DDR_B_D23 DDR_B_D24 DDR_B_D25 DDR_B_D26 DDR_B_D27 DDR_B_D28 DDR_B_D29 DDR_B_D30 DDR_B_D31 DDR_B_D32 DDR_B_D33 DDR_B_D34 DDR_B_D35 DDR_B_D36 DDR_B_D37 DDR_B_D38 DDR_B_D39 DDR_B_D40 DDR_B_D41 DDR_B_D42 DDR_B_D43 DDR_B_D44 DDR_B_D45 DDR_B_D46 DDR_B_D47 DDR_B_D48 DDR_B_D49 DDR_B_D50 DDR_B_D51 DDR_B_D52 DDR_B_D53 DDR_B_D54 DDR_B_D55 DDR_B_D56 DDR_B_D57 DDR_B_D58 DDR_B_D59 DDR_B_D60 DDR_B_D61 DDR_B_D62 DDR_B_D63

AK47 AH46 AP47 AP46

AJ46

AJ48 AM48 AP48 AU47 AU46 BA48 AY48 AT47 AR47 BA47 BC47 BC46 BC44 BG43

BF43 BE45 BC41

BF40

BF41 BG38

BF38 BH35 BG35 BH40 BG39 BG34 BH34 BH14 BG12 BH11

BG8

BH12

BF11

BF8 BG7 BC5 BC6 AY3 AY1

BF6

BF5 BA1 BD3 AV2 AU3 AR3 AN2 AY2 AV1 AP3 AR1

AL1

AL2

AJ1 AH1 AM2 AM3 AH3

AJ3

U26E

SB_DQ_0 SB_DQ_1 SB_DQ_2 SB_DQ_3 SB_DQ_4 SB_DQ_5 SB_DQ_6 SB_DQ_7 SB_DQ_8 SB_DQ_9 SB_DQ_10 SB_DQ_11 SB_DQ_12 SB_DQ_13 SB_DQ_14 SB_DQ_15 SB_DQ_16 SB_DQ_17 SB_DQ_18 SB_DQ_19 SB_DQ_20 SB_DQ_21 SB_DQ_22 SB_DQ_23 SB_DQ_24 SB_DQ_25 SB_DQ_26 SB_DQ_27 SB_DQ_28 SB_DQ_29 SB_DQ_30 SB_DQ_31 SB_DQ_32 SB_DQ_33 SB_DQ_34 SB_DQ_35 SB_DQ_36 SB_DQ_37 SB_DQ_38 SB_DQ_39 SB_DQ_40 SB_DQ_41 SB_DQ_42 SB_DQ_43 SB_DQ_44 SB_DQ_45 SB_DQ_46 SB_DQ_47 SB_DQ_48 SB_DQ_49 SB_DQ_50 SB_DQ_51 SB_DQ_52 SB_DQ_53 SB_DQ_54 SB_DQ_55 SB_DQ_56 SB_DQ_57 SB_DQ_58 SB_DQ_59 SB_DQ_60 SB_DQ_61 SB_DQ_62 SB_DQ_63

GM@

SB_BS_0 SB_BS_1 SB_BS_2

SB_RAS# SB_CAS#

SB_WE#

SB_DM_0 SB_DM_1 SB_DM_2 SB_DM_3 SB_DM_4 SB_DM_5 SB_DM_6 SB_DM_7

SB_DQS_0 SB_DQS_1 SB_DQS_2 SB_DQS_3 SB_DQS_4 SB_DQS_5 SB_DQS_6 SB_DQS_7

SB_DQS#_0 SB_DQS#_1 SB_DQS#_2 SB_DQS#_3 SB_DQS#_4 SB_DQS#_5 SB_DQS#_6 SB_DQS#_7

SB_MA_0 SB_MA_1 SB_MA_2

DDR SYSTEM MEMORY B

SB_MA_3 SB_MA_4 SB_MA_5 SB_MA_6 SB_MA_7 SB_MA_8

SB_MA_9 SB_MA_10 SB_MA_11 SB_MA_12 SB_MA_13 SB_MA_14

CANTIGA ES_FCBGA1329

BB17 BB33

AU17 BG16 BF14

AM47 AY47 BD40 BF35 BG11 BA3 AP1 AK2

AL47 AV48 BG41 BG37 BH9 BB2 AU1 AN6

AL46 AV47 BH41 BH37 BG9 BC2 AT2 AN5

AV17 BA25 BC25 AU25 AW25 BB28 AU28 AW28 AT33 BD33 BB16 AW33 AY33 BH15 AU33

DDR_B_BS#1 DDR_B_BS#2

DDR_B_RAS# DDR_B_WE#

DDR_B_DM0 DDR_B_DM1 DDR_B_DM2 DDR_B_DM3 DDR_B_DM4 DDR_B_DM5 DDR_B_DM6 DDR_B_DM7

DDR_B_DQS0 DDR_B_DQS1 DDR_B_DQS2 DDR_B_DQS3 DDR_B_DQS4 DDR_B_DQS5 DDR_B_DQS6 DDR_B_DQS7

DDR_B_DQS#0 DDR_B_DQS#1 DDR_B_DQS#2 DDR_B_DQS#3 DDR_B_DQS#4 DDR_B_DQS#5 DDR_B_DQS#6 DDR_B_DQS#7

DDR_B_MA0 DDR_B_MA1 DDR_B_MA2 DDR_B_MA3 DDR_B_MA4 DDR_B_MA5 DDR_B_MA6 DDR_B_MA7 DDR_B_MA8

DDR_B_MA9 DDR_B_MA10 DDR_B_MA11 DDR_B_MA12 DDR_B_MA13 DDR_B_MA14

DDR_B_BS#0

BC16

DDR_B_BS#0 <15> DDR_B_BS#1 <15> DDR_B_BS#2 <15>

DDR_B_RAS# <15> DDR_B_CAS# <15> DDR_B_WE# <15>

DDR_B_DM[0..7] <15>

DDR_B_DQS[0..7] <15>

DDR_B_DQS#[0..7] <15>

DDR_B_MA[0..14] <15>

A A

Security Classification

5

Security Classification

2007/10/15 2008/10/15

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2007/10/15 2008/10/15

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

B

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

Cantiga GMCH (2/6)-DDRII

JIWA3/A4_LA4212P

1

of

953Wednesday, May 14, 2008

of

953Wednesday, May 14, 2008

of

953Wednesday, May 14, 2008

1.0

5

hexainf@hotmail.com gratuito - free of charge.

4

3

2

1

Strap Pin Table

CFG[2:0] FSB Freq select

PCIE_MTX_C_GRX_N[0..15] PCIE_MTX_C_GRX_P[0..15]

D D

U26C

L32

GMCH_ENBKL<24>

+3VS

LVDS_SCL<24> LVDS_SDA<24> GM_ENVDD<24>

For Cantiga:2.37kohm For Crestline:2.4kohm For Calero: 1.5Kohm

Note: All LVDS data

C C

B B

A A

signals/and it's compliments should be routed Differentially

Layout Note: Place 150 Ohmtermination resistors close to GMCH

GM@

R127 75_0402_5%

R127 75_0402_5% R121 75_0402_5%GM@R121 75_0402_5%GM@ R122 75_0402_5%

R122 75_0402_5%

R132 150_0402_1%

R132 150_0402_1% R124 150_0402_1%

R124 150_0402_1% R123 150_0402_1%

R123 150_0402_1%

GMCH_CRT_HSYNC<25>

GMCH_CRT_VSYNC<25>

GM@

1 2

GM@

1 2

GM@

1 2

12 12 12

GMCH_CRT_R GMCH_CRT_G GMCH_CRT_B

1 2

R203 30_0402_1%

GM@

1 2

R204 30_0402_1%

GM@

For Cantiga:1.02kohm For Crestline:1.3kohm For Calero: 255ohm

R213 10K_0402_5%R213 10K_0402_5% R159 10K_0402_5%R159 10K_0402_5%

LVDS_SCL LVDS_SDA

GM_ENVDD

R167 2.37K_0402_1%R167 2.37K_0402_1%

LVDS_ACLK#<24> LVDS_ACLK<24>

LVDS_A0#<24> LVDS_A1#<24> LVDS_A2#<24>

LVDS_A0<24> LVDS_A1<24> LVDS_A2<24>

TVA_DAC TVB_DAC TVC_DAC

GMCH_CRT_B<25> GMCH_CRT_G<25> GMCH_CRT_R<25>

GMCH_CRT_CLK<25> GMCH_CRT_DATA<25>

R139

0_0402_5%

PM@

1 2 1 2

12

LVDS_ACLK# LVDS_ACLK

LVDS_A0# LVDS_A1# LVDS_A2#

LVDS_A0 LVDS_A1 LVDS_A2

R140

0_0402_5%

PM@

GMCH_ENBKL

T93T93

T94T94

T72T72

T73T73

TVA_DAC TVB_DAC TVC_DAC

GMCH_CRT_B GMCH_CRT_G GMCH_CRT_R

GMCH_CRT_CLK GMCH_CRT_DATA

T1T1

20mil

12

R138

1.02K_0402_1%

L_BKLT_CTRL

G32

L_BKLT_EN

M32

L_CTRL_CLK

M33

L_CTRL_DATA

K33

L_DDC_CLK

J33

L_DDC_DATA

M29

L_VDD_EN

C44

LVDS_IBG

B43

LVDS_VBG

E37

LVDS_VREFH

E38

LVDS_VREFL

C41

LVDSA_CLK#

C40

LVDSA_CLK

B37

LVDSB_CLK#

A37

LVDSB_CLK

H47

LVDSA_DATA#_0

E46

LVDSA_DATA#_1

G40

LVDSA_DATA#_2

A40

LVDSA_DATA#_3

H48

LVDSA_DATA_0

D45

LVDSA_DATA_1

F40

LVDSA_DATA_2

B40

LVDSA_DATA_3

A41

LVDSB_DATA#_0

H38

LVDSB_DATA#_1

G37

LVDSB_DATA#_2

J37

LVDSB_DATA#_3

B42

LVDSB_DATA_0

G38

LVDSB_DATA_1

F37

LVDSB_DATA_2

K37

LVDSB_DATA_3

F25

TVA_DAC

H25

TVB_DAC

K25

TVC_DAC

H24

TV_RTN

C31

TV_DCONSEL_0

E32

TV_DCONSEL_1

E28

CRT_BLUE

G28

CRT_GREEN

J28

CRT_RED

G29

CRT_IRTN

H32

CRT_DDC_CLK

J32

CRT_DDC_DATA

J29

CRT_HSYNC

E29

CRT_TVO_IREF

L29

CRT_VSYNC

CANTIGA ES_FCBGA1329

GM@

PEG_COMPI

PEG_COMPO

PEG_RX#_0 PEG_RX#_1 PEG_RX#_2 PEG_RX#_3 PEG_RX#_4 PEG_RX#_5 PEG_RX#_6 PEG_RX#_7 PEG_RX#_8 PEG_RX#_9

LVDS TV VGA

PEG_RX#_10 PEG_RX#_11 PEG_RX#_12 PEG_RX#_13 PEG_RX#_14 PEG_RX#_15

PEG_RX_0 PEG_RX_1 PEG_RX_2 PEG_RX_3 PEG_RX_4 PEG_RX_5 PEG_RX_6 PEG_RX_7 PEG_RX_8

PEG_RX_9 PEG_RX_10 PEG_RX_11 PEG_RX_12 PEG_RX_13 PEG_RX_14 PEG_RX_15

PEG_TX#_0 PEG_TX#_1 PEG_TX#_2 PEG_TX#_3 PEG_TX#_4 PEG_TX#_5 PEG_TX#_6 PEG_TX#_7 PEG_TX#_8

PCI-EXPRESS GRAPHICS

PEG_TX#_9

PEG_TX#_10 PEG_TX#_11 PEG_TX#_12 PEG_TX#_13 PEG_TX#_14 PEG_TX#_15

PEG_TX_0

PEG_TX_1

PEG_TX_2

PEG_TX_3

PEG_TX_4

PEG_TX_5

PEG_TX_6

PEG_TX_7

PEG_TX_8

PEG_TX_9 PEG_TX_10 PEG_TX_11 PEG_TX_12 PEG_TX_13 PEG_TX_14 PEG_TX_15

5

4

PCIE_GTX_C_MRX_N[0..15] PCIE_GTX_C_MRX_P[0..15]

Place the resistor within 500mils (1.27mm)of the (G)MCH

PEGCOMP trace width and spacing is 20/25 mils.

T37

PEGCOMP

R163

T36

PCIE_GTX_C_MRX_N0

H44

PCIE_GTX_C_MRX_N1

J46

PCIE_GTX_C_MRX_N2

L44

PCIE_GTX_C_MRX_N3

L40

PCIE_GTX_C_MRX_N4

N41

PCIE_GTX_C_MRX_N5

P48

PCIE_GTX_C_MRX_N6

N44

PCIE_GTX_C_MRX_N7

T43

PCIE_GTX_C_MRX_N8

U43

PCIE_GTX_C_MRX_N9

Y43

PCIE_GTX_C_MRX_N10

Y48

PCIE_GTX_C_MRX_N11

Y36

PCIE_GTX_C_MRX_N12

AA43

PCIE_GTX_C_MRX_N13

AD37

PCIE_GTX_C_MRX_N14

AC47

PCIE_GTX_C_MRX_N15

AD39

PCIE_GTX_C_MRX_P0

H43

PCIE_GTX_C_MRX_P1

J44

PCIE_GTX_C_MRX_P2

L43

PCIE_GTX_C_MRX_P3

L41

PCIE_GTX_C_MRX_P4

N40

PCIE_GTX_C_MRX_P5

P47

PCIE_GTX_C_MRX_P6

N43

PCIE_GTX_C_MRX_P7

T42

PCIE_GTX_C_MRX_P8

U42

PCIE_GTX_C_MRX_P9

Y42

PCIE_GTX_C_MRX_P10

W47

PCIE_GTX_C_MRX_P11

Y37

PCIE_GTX_C_MRX_P12

AA42

PCIE_GTX_C_MRX_P13

AD36

PCIE_GTX_C_MRX_P14

AC48

PCIE_GTX_C_MRX_P15

AD40

PCIE_MTX_GRX_N0

J41

PCIE_MTX_GRX_N1

M46

PCIE_MTX_GRX_N2

M47

PCIE_MTX_GRX_N3

M40

PCIE_MTX_GRX_N4

M42

PCIE_MTX_GRX_N5

R48

PCIE_MTX_GRX_N6

N38

PCIE_MTX_GRX_N7

T40

PCIE_MTX_GRX_N8

U37

PCIE_MTX_GRX_N9

U40

PCIE_MTX_GRX_N10

Y40

PCIE_MTX_GRX_N11

AA46

PCIE_MTX_GRX_N12

AA37

PCIE_MTX_GRX_N13

AA40

PCIE_MTX_GRX_N14

AD43

PCIE_MTX_GRX_N15

AC46

PCIE_MTX_GRX_P0

J42

PCIE_MTX_GRX_P1

L46

PCIE_MTX_GRX_P2

M48

PCIE_MTX_GRX_P3

M39

PCIE_MTX_GRX_P4

M43

PCIE_MTX_GRX_P5

R47

PCIE_MTX_GRX_P6

N37

PCIE_MTX_GRX_P7

T39

PCIE_MTX_GRX_P8

U36

PCIE_MTX_GRX_P9

U39

PCIE_MTX_GRX_P10

Y39

PCIE_MTX_GRX_P11

Y46

PCIE_MTX_GRX_P12

AA36

PCIE_MTX_GRX_P13

AA39

PCIE_MTX_GRX_P14

AD42

PCIE_MTX_GRX_P15

AD46

PCIE_MTX_GRX_P3 PCIE_MTX_GRX_N3 PCIE_MTX_GRX_P2 PCIE_MTX_GRX_N2 PCIE_MTX_GRX_P1 PCIE_MTX_GRX_N1 PCIE_MTX_GRX_P0 PCIE_MTX_GRX_N0

PCIE_GTX_C_MRX_P3

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

R163

3

PCIE_MTX_C_GRX_N[0..15] <16> PCIE_MTX_C_GRX_P[0..15] <16>

PCIE_GTX_C_MRX_N[0..15] <16> PCIE_GTX_C_MRX_P[0..15] <16>

+VCC_PEG

49.9_0402_1%

1 2

Please check Power source if want support IAMT

C277 0.1U_0402_10V7KPM@C277 0.1U_0402_10V7KPM@

1 2

C303 0.1U_0402_10V7KPM@C303 0.1U_0402_10V7KPM@

1 2

C317 0.1U_0402_10V7KPM@C317 0.1U_0402_10V7KPM@

1 2

C315 0.1U_0402_10V7KPM@C315 0.1U_0402_10V7KPM@

1 2

C325 0.1U_0402_10V7KPM@C325 0.1U_0402_10V7KPM@

1 2

C343 0.1U_0402_10V7KPM@C343 0.1U_0402_10V7KPM@

1 2

C358 0.1U_0402_10V7KPM@C358 0.1U_0402_10V7KPM@

1 2

C349 0.1U_0402_10V7KPM@C349 0.1U_0402_10V7KPM@

1 2

C368 0.1U_0402_10V7KPM@C368 0.1U_0402_10V7KPM@

1 2

C354 0.1U_0402_10V7KPM@C354 0.1U_0402_10V7KPM@

1 2

C371 0.1U_0402_10V7KPM@C371 0.1U_0402_10V7KPM@

1 2

C356 0.1U_0402_10V7KPM@C356 0.1U_0402_10V7KPM@

1 2

C372 0.1U_0402_10V7KPM@C372 0.1U_0402_10V7KPM@

1 2

C364 0.1U_0402_10V7KPM@C364 0.1U_0402_10V7KPM@

1 2

C375 0.1U_0402_10V7KPM@C375 0.1U_0402_10V7KPM@

1 2

C348 0.1U_0402_10V7KPM@C348 0.1U_0402_10V7KPM@

1 2

C271 0.1U_0402_10V7KPM@C271 0.1U_0402_10V7KPM@

1 2

C296 0.1U_0402_10V7KPM@C296 0.1U_0402_10V7KPM@

1 2

C314 0.1U_0402_10V7KPM@C314 0.1U_0402_10V7KPM@

1 2

C311 0.1U_0402_10V7KPM@C311 0.1U_0402_10V7KPM@

1 2

C322 0.1U_0402_10V7KPM@C322 0.1U_0402_10V7KPM@

1 2

C336 0.1U_0402_10V7KPM@C336 0.1U_0402_10V7KPM@

1 2

C352 0.1U_0402_10V7KPM@C352 0.1U_0402_10V7KPM@

1 2

C344 0.1U_0402_10V7KPM@C344 0.1U_0402_10V7KPM@

1 2

C363 0.1U_0402_10V7KPM@C363 0.1U_0402_10V7KPM@

1 2

C346 0.1U_0402_10V7KPM@C346 0.1U_0402_10V7KPM@

1 2

C366 0.1U_0402_10V7KPM@C366 0.1U_0402_10V7KPM@

1 2

C351 0.1U_0402_10V7KPM@C351 0.1U_0402_10V7KPM@

1 2

C367 0.1U_0402_10V7KPM@C367 0.1U_0402_10V7KPM@

1 2

C359 0.1U_0402_10V7KPM@C359 0.1U_0402_10V7KPM@

1 2

C373 0.1U_0402_10V7KPM@C373 0.1U_0402_10V7KPM@

1 2

C347 0.1U_0402_10V7KPM@C347 0.1U_0402_10V7KPM@

1 2

C670 0.1U_0402_10V7KHDMI_GM@C670 0.1U_0402_10V7KHDMI_GM@

1 2

C674 0.1U_0402_10V7KHDMI_GM@C674 0.1U_0402_10V7KHDMI_GM@

1 2

C669 0.1U_0402_10V7KHDMI_GM@C669 0.1U_0402_10V7KHDMI_GM@

1 2

C673 0.1U_0402_10V7KHDMI_GM@C673 0.1U_0402_10V7KHDMI_GM@

1 2

C662 0.1U_0402_10V7KHDMI_GM@C662 0.1U_0402_10V7KHDMI_GM@

1 2

C663 0.1U_0402_10V7KHDMI_GM@C663 0.1U_0402_10V7KHDMI_GM@

1 2

C658 0.1U_0402_10V7KHDMI_GM@C658 0.1U_0402_10V7KHDMI_GM@

1 2

C661 0.1U_0402_10V7KHDMI_GM@C661 0.1U_0402_10V7KHDMI_GM@

1 2

C306 0_0402_5%HDMI_GM@C306 0_0402_5%HDMI_GM@

1 2

R

2007/10/15 2008/10/15

PCIE_MTX_C_GRX_N0 PCIE_MTX_C_GRX_N1 PCIE_MTX_C_GRX_N2 PCIE_MTX_C_GRX_N3 PCIE_MTX_C_GRX_N4 PCIE_MTX_C_GRX_N5 PCIE_MTX_C_GRX_N6 PCIE_MTX_C_GRX_N7 PCIE_MTX_C_GRX_N8

PCIE_MTX_C_GRX_N9 PCIE_MTX_C_GRX_N10 PCIE_MTX_C_GRX_N11 PCIE_MTX_C_GRX_N12 PCIE_MTX_C_GRX_N13 PCIE_MTX_C_GRX_N14 PCIE_MTX_C_GRX_N15

PCIE_MTX_C_GRX_P0

PCIE_MTX_C_GRX_P1

PCIE_MTX_C_GRX_P2

PCIE_MTX_C_GRX_P3

PCIE_MTX_C_GRX_P4

PCIE_MTX_C_GRX_P5

PCIE_MTX_C_GRX_P6

PCIE_MTX_C_GRX_P7

PCIE_MTX_C_GRX_P8

PCIE_MTX_C_GRX_P9 PCIE_MTX_C_GRX_P10 PCIE_MTX_C_GRX_P11 PCIE_MTX_C_GRX_P12 PCIE_MTX_C_GRX_P13 PCIE_MTX_C_GRX_P14 PCIE_MTX_C_GRX_P15

Compal Secret Data

Deciphered Date

TMDS_B_CLK <23> TMDS_B_CLK# <23> TMDS_B_DATA0 <23> TMDS_B_DATA0# <23> TMDS_B_DATA1 <23> TMDS_B_DATA1# <23> TMDS_B_DATA2 <23> TMDS_B_DATA2# <23>

TMDS_B_HPD# <23>

2

CFG[4:3]

CFG5 (DMI select)

CFG6

CFG7 (Intel Management Engine Crypto strap)

CFG8

CFG9 (PCIE Graphics Lane Reversal)

CFG10 (PCIE Lookback enable)

CFG11 CFG[13:12] (XOR/ALLZ)

CFG16 (FSB Dynamic ODT)

CFG19 (DMI Lane Reversal)

CFG20 (PCIE/SDVO concurrent)

Title

Size Document Number Rev

Custom

Date: Sheet

000 = FSB 1066MHz 010 = FSB 800MHz 011 = FSB 667MHz Others = Reserved

Reserved

0 = DMI x 2 1 = DMI x 4 0 = The iTPM Host Interface is enable

1 = The iTPM Host Interface is disable 0 =(TLS)chiper suite with no confidentiality

*

1 =(TLS)chiper suite with confidentiality

Reserved

0 = Reverse Lane,15->0, 14->1 1 = Normal Operation,Lane Number in order

0 = Enable 1 = Disable Reserved 00 = Reserved

01 = XOR Mode Enabled 10 = All Z Mode Enabled

*

ReservedCFG[15:14]

(Default)11 = Normal Operation

*

0 = Disabled 1 = Enabled

*

ReservedCFG[18:17]

0 = Normal Operation

(Lane number in Order)

*

1 = Reverse Lane

0 = Only PCIE or SDVO is operational.

*

1 = PCIE/SDVO are operating simu.

Compal Electronics, Inc.

Cantiga GMCH (3/6)-VGA/LVDS/TV

JIWA3/A4_LA4212P

10 53Wednesday, May 14, 2008

of

1

of

1.0

5

hexainf@hotmail.com gratuito - free of charge.

GM@

+3VS_DAC_CRT

0.1U_0402_16V4Z

1

2

C206

GM@

0.022U_0402_16V7K

0.022U_0402_16V7K 10U_0805_10V4Z

10U_0805_10V4Z

C681

1

C213

GM@

2

VCCA_CRT_DAC: 73mA (0.1UF*1, 0.01UF*1)

+3VS

R120

1 2

0_0603_5%

GM@

VCCA_DAC_BG: 2.68mA (0.1UF*1, 0.01UF*1)

0.1U_0402_16V4Z

1

GM@

2

GM@

R117

1 2

0_0603_5%

0.022U_0402_16V7K

C181

0_0402_5%

PM@

+3VS_DAC_BG

1

C638

C637

2

1

C181

2

0.022U_0402_16V7K

GM@

C639

C206

0_0402_5%

PM@

+VCCP

+3VS_TVDAC

1

2

GM@

10U_0805_10V4Z

1

GM@

2

C605

150U_D_6.3VM

C171

0.1U_0402_16V4Z

GM@

+1.5VS_PEG_BG: 0.414mA (0.1UF*1)

+1.5VS

0_0603_5%

R108

1 2

0_0805_5%

1

+

2

10U_0805_10V4Z

R134

0_0603_5%

C87

12

C194

R166

1

2

+1.05VS_A_SM_CK

1U_0402_6.3V4Z

1

2

+1.5VS_PEG_BG

12

4.7U_0805_10V4Z

4.7U_0805_10V4Z C96

C96

10U_0805_10V4Z

1

C211

2

+3VS

D D

C C

B B

R115

1 2

0_0603_5%

GM@

C637

0_0402_5%

PM@

VCCA_SM:720mA (22UF*2, 4.7UF*1, 1UF*1)

VCCA_SM_CK: 220mA (22UF*1, 2.2UF*1, 0.1UF*1)

+3VS

4

+3VS_DAC_CRT

+3VS_DAC_BG

+1.05VS_DPLLA +1.05VS_DPLLB

+1.05VS_HPLL +1.05VS_MPLL

+1.8V_TXLVDS

1000P_0402_50V7K

1

C301

0.1U_0402_16V4Z

2

C214

1

2

+3VS_TVDAC: 40mA (0.1UF*1, 0.01UF*1 for each DAC)

VCC_HDA: 50mA (0.1UF*1)

+1.05VS_PEGPLL

+1.05VS_A_SM

1

1U_0603_10V4Z

2

1U_0603_10V4Z

C210

+3VS_TVDAC

1

2

0.1U_0402_16V4Z

1

2

+1.5VS_TVDAC +1.5VS_QDAC

+1.05VS_HPLL

+1.05VS_PEGPLL

+1.8V_LVDS

C300

GM@

+1.5VS

20 mils

1

C102

2

U26H

B27

VCCA_CRT_DAC_1

A26

VCCA_CRT_DAC_2

A25

VCCA_DAC_BG

B25

VSSA_DAC_BG

F47

VCCA_DPLLA

L48

VCCA_DPLLB

AD1

VCCA_HPLL

AE1

VCCA_MPLL

J48

VCCA_LVDS

J47

VSSA_LVDS

AD48

VCCA_PEG_BG

AA48

VCCA_PEG_PLL

AR20

VCCA_SM_1

AP20

VCCA_SM_2

AN20

VCCA_SM_3

AR17

VCCA_SM_4

AP17

VCCA_SM_5

AN17

VCCA_SM_6

AT16

VCCA_SM_7

AR16

VCCA_SM_8

AP16

VCCA_SM_9

AP28

VCCA_SM_CK_1

AN28

VCCA_SM_CK_2

AP25

VCCA_SM_CK_3

AN25

VCCA_SM_CK_4

AN24

VCCA_SM_CK_5

AM28

VCCA_SM_CK_NCTF_1

AM26

VCCA_SM_CK_NCTF_2

AM25

VCCA_SM_CK_NCTF_3

AL25

VCCA_SM_CK_NCTF_4

AM24

VCCA_SM_CK_NCTF_5

AL24

VCCA_SM_CK_NCTF_6

AM23

VCCA_SM_CK_NCTF_7

AL23

VCCA_SM_CK_NCTF_8

B24

VCCA_TV_DAC_1

A24

VCCA_TV_DAC_2

A32

VCC_HDA

M25

VCCD_TVDAC

L28

VCCD_QDAC

AF1

VCCD_HPLL

AA47

VCCD_PEG_PLL

M38

VCCD_LVDS_1

L37

VCCD_LVDS_2

GM@

CRTPLLA LVDSA PEG

POWER

A SM

TV

HDA

LVDS D TV/CRT

U26

VTT_1 VTT_2 VTT_3 VTT_4 VTT_5 VTT_6 VTT_7 VTT_8

VTT_9 VTT_10 VTT_11 VTT_12 VTT_13 VTT_14

VTT

VTT_15 VTT_16 VTT_17 VTT_18 VTT_19 VTT_20 VTT_21 VTT_22 VTT_23 VTT_24 VTT_25

VCC_AXF_1 VCC_AXF_2 VCC_AXF_3

AXF

VCC_SM_CK_1 VCC_SM_CK_2 VCC_SM_CK_3 VCC_SM_CK_4

SM CK

VCC_TX_LVDS

A CK

VCC_HV_1 VCC_HV_2 VCC_HV_3

HV

VCC_PEG_1 VCC_PEG_2 VCC_PEG_3 VCC_PEG_4 VCC_PEG_5

VCC_DMI_1 VCC_DMI_2 VCC_DMI_3 VCC_DMI_4

DMI PEG

VTTLF1 VTTLF2 VTTLF3

VTTLF

CANTIGA ES_FCBGA1329

U13 T13 U12 T12 U11 T11 U10 T10 U9 T9 U8 T8 U7 T7 U6 T6 U5 T5 V3 U3 V2 U2 T2 V1 U1

B22 B21 A21

BF21 BH20 BG20 BF20

K47

C35 B35 A35

V48 U48 V47 U47 U46

AH48 AF48 AH47 AG47

A8 L1 AB2

3

+VCCP

+1.8V_TXLVDS

+VCC_PEG

+VCC_DMI

VCC_DMI: 456mA (0.1UF*1)

20mils

C94 0.47U_0402_6.3V6KC94 0.47U_0402_6.3V6K

1

2

220U_D2_4VM

1

+

C606

2

0.47U_0402_6.3V6K

1

C126

2

+V1.05VS_AXF

+1.8V_SM_CK

C611 0.47U_0402_6.3V6KC611 0.47U_0402_6.3V6K

1

2

C265

C136

+3VS_HV

C649

C618 0.47U_0402_6.3V6KC618 0.47U_0402_6.3V6K

1

2

C278

0_0402_5%

PM@

C312

0_0402_5%

PM@

0.1U_0402_16V4Z

+VCCP

+3VS

+1.05VS_DPLLA

0.1U_0402_16V4Z

C278

1

2 GM@

GM@

+1.05VS_DPLLB

0.1U_0402_16V4Z

C312

1

2 GM@

GM@

+1.05VS_HPLL

1

C609

2

+1.05VS_MPLL

1

C608

2

+1.05VS_PEGPLL

0.1U_0402_16V4Z

0.1U_0402_16V4Z C342

C342

1

2

+VCCP_D

@

D1

2 1

CH751H-40PT_SOD323-2

10U_0805_10V4Z

1

C275

2

GM@

+1.05VS_DPLLA +1.05VS_DPLLB: 64.8mA (470UF*1, 0.1UF*1)

10U_0805_10V4Z

1

C310

2

GM@

R474

MBK2012121YZF_0805

1

C604

2.2U_0603_6.3V4Z

2

R473

MBK2012121YZF_0805

1

C603

2.2U_0603_6.3V4Z

2

BLM18PG121SN1D_0603

1

C355

2.2U_0603_6.3V4Z

2

@

R158

10_0402_5%

4.7U_0805_10V4Z

1

2

4.7U_0805_10V4Z

1

2

0.1U_0402_16V4Z

1

2

R151

1 2

10U_FLC-453232-100K_0.25A_10%

GM@

R191

1 2

10U_FLC-453232-100K_0.25A_10%

GM@

+1.05VS_HPLL: 24mA (4.7UF*1, 0.1UF*1)

12

+VCCP

1.05VS_MPLL: 139.2mA (22UF*1, 0.1UF*1)

12

+VCCP

+1.5VS_PEG_PLL: 50mA (0.1UF*1)

L17

12

R157

12

0_0402_5%

12

+VCCP

+3VS_HV

+VCCP

+V1.05VS_AXF

+1.5VS_TVDAC

40 mils

1000P_0402_50V7K

1

C299

GM@

2

+VCC_PEG

1

C339

+

2

0316 add

+VCC_DMI

C337

1

2

0316 add

10U_0805_10V4Z

1

2

1

C180

2

GM@

+1.8V_TXLVDS

220U_D2_4VM

1U_0603_10V4Z

C629

0.022U_0402_16V7K

C370

C323

C353

1U_0603_10V4Z

C631

1

2

+1.8V_SM_CK

10U_0805_10V4Z

C627

1

2

0.1U_0402_16V4Z

C198

1

C195

2

GM@

R208

0_0603_5%

10U_0805_10V4Z

GM@

1

GM@

2

R186

0_0805_5%

10U_0805_10V4Z

change to 0805 size 1/04

1

2

10U_0805_10V4Z

C787

1

2

1

VCC_AXF: 321.35mA (10UF*1, 1UF*1)

+VCCP

1 2

R495

0_0603_5%

VCC_SM_CK: 119.85mA (10UF*1, 0.1UF*1)

R496

1 2

0.1U_0402_16V4Z

0.1U_0402_16V4Z 0_0805_5%

0_0805_5%

C628

1

2

R136

0_0603_5%

10U_0805_10V4Z

GM@

VCCD_TVDAC: 58.696mA

GM@

(0.1UF*1, 0.01UF*1)

12

+1.8V

+1.8V_TXLVDS: 118.8mA (22UF*1, 1000PF*1)

+VCCP

12

R202

0_0805_5%

10U_0805_10V4Z

add one more cap 1/2

12

C180

0_0402_5%

PM@

C299

0_0402_5%

PM@

+VCCP

12

+1.8V

+1.5VS

PM

PM@

0.1U_0402_16V4Z

1

C207

2

VCCD_QDAC: 48.363mA (0.1UF*1, 0.01UF*1)

R142

12

0_0603_5%

10U_0805_10V4Z

1

C221

2

GM@

+1.5VS

+1.8V_LVDS

10U_0805_10V4Z

C226

GM@

1

2

+1.5VS_QDAC

1U_0402_6.3V4Z

C208

GM@

C208

A A

5

1.8V_LVDS: 60.311111mA (1UF*1)

R137

0_0603_5%

1U_0603_10V4Z

GM@

C237

1

2

GM@

12

C237

0_0603_5%

PM@

4

+1.8V

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2007/10/15 2008/10/15

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

Crestline GMCH (4/6)-VCC

JIWA3/A4_LA4212P

1

11 53Wednesday, May 14, 2008

of

1.0

5

hexainf@hotmail.com gratuito - free of charge.

C175

+VCCP

0.1U_0402_16V4Z

C220

1

2

D D

0.22U_0402_10V4Z

10U_0805_10V4Z

C C

B B

A A

0.22U_0402_10V4Z

C193

1

C178

2

1

2

AG34 AC34 AB34 AA34

AM33

AK33

AJ33 AG33 AF33

AE33 AC33 AA33

W33

AH28 AF28 AC28 AA28

AJ26 AG26 AE26 AC26 AH25 AG25 AF25 AG24

AJ23 AH23 AF23

U26G

VCC_1 VCC_2 VCC_3 VCC_4

Y34

VCC_5

V34

VCC_6

U34

VCC_7 VCC_8 VCC_9 VCC_10 VCC_11 VCC_12

VCC_13 VCC_14 VCC_15

Y33

VCC_16 VCC_17

V33

VCC_18

U33

VCC_19 VCC_20 VCC_21 VCC_22 VCC_23 VCC_24 VCC_25 VCC_26 VCC_27 VCC_28 VCC_29 VCC_30 VCC_31 VCC_32 VCC_33 VCC_34

T32

VCC_35

GM@

VCC CORE

POWER

VCC NCTF

CANTIGA ES_FCBGA1329

4

VCC_NCTF_1 VCC_NCTF_2 VCC_NCTF_3 VCC_NCTF_4 VCC_NCTF_5 VCC_NCTF_6 VCC_NCTF_7 VCC_NCTF_8

VCC_NCTF_9 VCC_NCTF_10 VCC_NCTF_11 VCC_NCTF_12 VCC_NCTF_13 VCC_NCTF_14 VCC_NCTF_15 VCC_NCTF_16 VCC_NCTF_17 VCC_NCTF_18 VCC_NCTF_19 VCC_NCTF_20 VCC_NCTF_21 VCC_NCTF_22 VCC_NCTF_23 VCC_NCTF_24 VCC_NCTF_25 VCC_NCTF_26 VCC_NCTF_27 VCC_NCTF_28 VCC_NCTF_29 VCC_NCTF_30 VCC_NCTF_31 VCC_NCTF_32 VCC_NCTF_33 VCC_NCTF_34 VCC_NCTF_35 VCC_NCTF_36 VCC_NCTF_37 VCC_NCTF_38 VCC_NCTF_39 VCC_NCTF_40 VCC_NCTF_41 VCC_NCTF_42 VCC_NCTF_43 VCC_NCTF_44

AM32 AL32 AK32 AJ32 AH32 AG32 AE32 AC32 AA32 Y32 W32 U32 AM30 AL30 AK30 AH30 AG30 AF30 AE30 AC30 AB30 AA30 Y30 W30 V30 U30 AL29 AK29 AJ29 AH29 AG29 AE29 AC29 AA29 Y29 W29 V29 AL28 AK28 AL26 AK26 AK25 AK24 AK23

+VCCP

3

+1.8V

220U_D2_4VM_R15

C177

+VCCP +AXG_CORE

C149

1U_0603_10V4Z

J4

JUMP_43X118

+AXG_CORE

1

2

220U_D2_4VM_R15

GM@

C104

0_0805_5%

PM@

112

C84

@

2

1

+

2

GM@

C157

0_0805_5%

PM@

10U_0805_10V4Z

C104

1

+

2

1

2

GM@

10U_0805_10V4Z

C643

1

2

1

C157

2

10U_0805_10V4Z

GM@

0.01U_0402_16V7K

C645

2

1

0.1U_0402_16V4Z

1

C167

2

GM@

2

U26F

VCCSM_LF1 VCCSM_LF2 VCCSM_LF3 VCCSM_LF4 VCCSM_LF5 VCCSM_LF6 VCCSM_LF7

Check : power

0.1U_0402_16V4Z

0.1U_0402_16V4Z C197

C197

1

2

GM@

C114 0.1U_0402_16V4ZC114 0.1U_0402_16V4Z

C121 0.1U_0402_16V4ZC121 0.1U_0402_16V4Z

1

2

AP33

VCC_SM_1

AN33

VCC_SM_2

BH32

VCC_SM_3

BG32

VCC_SM_4

BF32

VCC_SM_5

BD32

VCC_SM_6

BC32

VCC_SM_7

BB32

VCC_SM_8

BA32

VCC_SM_9

AY32

VCC_SM_10

AW32

VCC_SM_11

AV32

VCC_SM_12

AU32

VCC_SM_13

AT32

VCC_SM_14

AR32

VCC_SM_15

AP32

VCC_SM_16

AN32

VCC_SM_17

BH31

VCC_SM_18

BG31

VCC_SM_19

BF31

VCC_SM_20

BG30

VCC_SM_21

BH29

VCC_SM_22

BG29

VCC_SM_23

BF29

VCC_SM_24

BD29

VCC_SM_25

BC29

VCC_SM_26

BB29

VCC_SM_27

BA29

VCC_SM_28

AY29

VCC_SM_29

AW29

VCC_SM_30

AV29

VCC_SM_31

AU29

VCC_SM_32

AT29

VCC_SM_33

AR29

VCC_SM_34

AP29

VCC_SM_35

BA36

VCC_SM_36/NC

BB24

VCC_SM_37/NC

BD16

VCC_SM_38/NC

BB21

VCC_SM_39/NC

AW16

VCC_SM_40/NC

AW13

VCC_SM_41/NC

AT13

VCC_SM_42/NC

Y26

VCC_AXG_1

AE25

VCC_AXG_2

AB25

VCC_AXG_3

AA25

VCC_AXG_4

AE24

VCC_AXG_5

AC24

VCC_AXG_6

AA24

VCC_AXG_7

Y24

VCC_AXG_8

AE23

VCC_AXG_9

AC23

VCC_AXG_10

AB23

VCC_AXG_11

AA23

VCC_AXG_12

AJ21

VCC_AXG_13

AG21

VCC_AXG_14

AE21

VCC_AXG_15

AC21

VCC_AXG_16

AA21

VCC_AXG_17

Y21

VCC_AXG_18

AH20

VCC_AXG_19

AF20

VCC_AXG_20

AE20

VCC_AXG_21

AC20

VCC_AXG_22

AB20

VCC_AXG_23

AA20

VCC_AXG_24

T17

VCC_AXG_25

T16

VCC_AXG_26

AM15

VCC_AXG_27

AL15

VCC_AXG_28

AE15

VCC_AXG_29

AJ15

VCC_AXG_30

AH15

VCC_AXG_31

AG15

VCC_AXG_32

AF15

VCC_AXG_33

AB15

VCC_AXG_34

AA15

VCC_AXG_35

Y15

VCC_AXG_36

V15

VCC_AXG_37

U15

VCC_AXG_38

AN14

VCC_AXG_39

AM14

VCC_AXG_40

U14

VCC_AXG_41

T14

VCC_AXG_42

AJ14

T32T32 T31T31

AH14

VCC_AXG_SENSE VSS_AXG_SENSE

GM@

VCC_AXG_NTCF_1 VCC_AXG_NCTF_2 VCC_AXG_NCTF_3 VCC_AXG_NCTF_4 VCC_AXG_NCTF_5 VCC_AXG_NCTF_6 VCC_AXG_NCTF_7 VCC_AXG_NCTF_8

VCC SM

VCC_AXG_NCTF_9 VCC_AXG_NCTF_10 VCC_AXG_NCTF_11 VCC_AXG_NCTF_12 VCC_AXG_NCTF_13 VCC_AXG_NCTF_14 VCC_AXG_NCTF_15 VCC_AXG_NCTF_16 VCC_AXG_NCTF_17 VCC_AXG_NCTF_18 VCC_AXG_NCTF_19 VCC_AXG_NCTF_20 VCC_AXG_NCTF_21 VCC_AXG_NCTF_22 VCC_AXG_NCTF_23 VCC_AXG_NCTF_24 VCC_AXG_NCTF_25 VCC_AXG_NCTF_26 VCC_AXG_NCTF_27 VCC_AXG_NCTF_28 VCC_AXG_NCTF_29 VCC_AXG_NCTF_30 VCC_AXG_NCTF_31 VCC_AXG_NCTF_32 VCC_AXG_NCTF_33 VCC_AXG_NCTF_34 VCC_AXG_NCTF_35 VCC_AXG_NCTF_36 VCC_AXG_NCTF_37 VCC_AXG_NCTF_38 VCC_AXG_NCTF_39 VCC_AXG_NCTF_40 VCC_AXG_NCTF_41 VCC_AXG_NCTF_42 VCC_AXG_NCTF_43

VCC GFX NCTF

VCC_AXG_NCTF_44 VCC_AXG_NCTF_45 VCC_AXG_NCTF_46 VCC_AXG_NCTF_47 VCC_AXG_NCTF_48 VCC_AXG_NCTF_49 VCC_AXG_NCTF_50 VCC_AXG_NCTF_51 VCC_AXG_NCTF_52

POWER

VCC_AXG_NCTF_53 VCC_AXG_NCTF_54 VCC_AXG_NCTF_55 VCC_AXG_NCTF_56 VCC_AXG_NCTF_57 VCC_AXG_NCTF_58 VCC_AXG_NCTF_59 VCC_AXG_NCTF_60

VCC GFX

VCC_SM_LF1 VCC_SM_LF2 VCC_SM_LF3 VCC_SM_LF4 VCC_SM_LF5 VCC_SM_LF6 VCC_SM_LF7

VCC SM LF

CANTIGA ES_FCBGA1329

W28 V28 W26 V26 W25 V25 W24 V24 W23 V23 AM21 AL21 AK21 W21 V21 U21 AM20 AK20 W20 U20 AM19 AL19 AK19 AJ19 AH19 AG19 AF19 AE19 AB19 AA19 Y19 W19 V19 U19 AM17 AK17 AH17 AG17 AF17 AE17 AC17 AB17 Y17 W17 V17 AM16 AL16 AK16 AJ16 AH16 AG16 AF16 AE16 AC16 AB16 AA16 Y16 W16 V16 U16

AV44 BA37 AM40 AV21 AY5 AM10 BB13

1

C129

1

2

0.22U_0402_10V4Z

GM@

C159 0.22U_0402_10V4ZC159 0.22U_0402_10V4Z

C101 0.22U_0402_10V4ZC101 0.22U_0402_10V4Z

1

2

+AXG_CORE

4.7U_0603_6.3V6K

1

C99

2

GM@

C264 0.47U_0402_6.3V6KC264 0.47U_0402_6.3V6K

C243 1U_0402_6.3V4ZC243 1U_0402_6.3V4Z

1

2

C99

0_0603_5%

PM@

C297 1U_0402_6.3V4ZC297 1U_0402_6.3V4Z

5

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2007/10/15 2008/10/15

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

Crestline GMCH (5/6)-VCC

JIWA3/A4_LA4212P

12 53Wednesday, May 14, 2008

1

1.0

of

5

hexainf@hotmail.com gratuito - free of charge.

U26I

AU48

VSS_1

AR48

VSS_2

AL48

VSS_3

BB47

VSS_4

AW47

VSS_5

AN47

VSS_6

AJ47

VSS_7

AF47

VSS_8

AD47

VSS_9

AB47

VSS_10

Y47

VSS_11

T47

BD46 BA46 AY46 AV46 AR46

AM46

BF44 AH44 AD44 AA44

BC43 AV43 AU43

AM43

BG42 AY42 AT42 AN42

AJ42

AE42

BD41 AU41

AM41

AH41 AD41 AA41

BG40 BB40 AV40 AN40

AT39

AM39

AJ39

AE39

BH38 BC38 BA38 AU38 AH38 AD38 AA38

BF37 BB37

AW37

AT37 AN37

AJ37

BG36 BD36 AK15 AU36

VSS_12

N47

VSS_13

L47

VSS_14

G47

VSS_15 VSS_16 VSS_17 VSS_18 VSS_19 VSS_20 VSS_21

V46

VSS_22

R46

VSS_23

P46

VSS_24

H46

VSS_25

F46

VSS_26 VSS_27 VSS_28 VSS_29 VSS_30

Y44

VSS_31

U44

VSS_32

T44

VSS_33

M44

VSS_34

F44

VSS_35 VSS_36 VSS_37 VSS_38 VSS_39

J43

VSS_40

C43

VSS_41 VSS_42 VSS_43 VSS_44 VSS_45 VSS_46 VSS_47

N42

VSS_48

L42

VSS_49 VSS_50 VSS_51 VSS_52 VSS_53 VSS_54 VSS_55

Y41

VSS_56

U41

VSS_57

T41

VSS_58

M41

VSS_59

G41

VSS_60

B41

VSS_61 VSS_62 VSS_63 VSS_64 VSS_65

H40

VSS_66

E40

VSS_67 VSS_68 VSS_69 VSS_70 VSS_71

N39

VSS_72

L39

VSS_73

B39

VSS_74 VSS_75 VSS_76 VSS_77 VSS_78 VSS_79 VSS_80 VSS_81

Y38

VSS_82

U38

VSS_83

T38

VSS_84

J38

VSS_85

F38

VSS_86

C38

VSS_87 VSS_88 VSS_89 VSS_90 VSS_91 VSS_92 VSS_93

H37

VSS_94

C37

VSS_95 VSS_96 VSS_97 VSS_98 VSS_99

GM@

VSS

D D

C C

B B

A A

VSS_100 VSS_101 VSS_102 VSS_103 VSS_104 VSS_105 VSS_106 VSS_107 VSS_108 VSS_109 VSS_110 VSS_111 VSS_112 VSS_113 VSS_114 VSS_115 VSS_116 VSS_117 VSS_118 VSS_119 VSS_120 VSS_121 VSS_122 VSS_123 VSS_124 VSS_125 VSS_126 VSS_127 VSS_128 VSS_129 VSS_130 VSS_131 VSS_132 VSS_133 VSS_134 VSS_135 VSS_136 VSS_137 VSS_138 VSS_139 VSS_140 VSS_141 VSS_142 VSS_143 VSS_144 VSS_145 VSS_146 VSS_147 VSS_148 VSS_149 VSS_150 VSS_151 VSS_152 VSS_153 VSS_154 VSS_155 VSS_156 VSS_157 VSS_158 VSS_159 VSS_160 VSS_161 VSS_162 VSS_163 VSS_164 VSS_165 VSS_166 VSS_167 VSS_168 VSS_169 VSS_170 VSS_171 VSS_172 VSS_173 VSS_174 VSS_175 VSS_176 VSS_177 VSS_178 VSS_179 VSS_180 VSS_181 VSS_182 VSS_183 VSS_184 VSS_185 VSS_186 VSS_187 VSS_188 VSS_189 VSS_190 VSS_191 VSS_192 VSS_193 VSS_194 VSS_195 VSS_196 VSS_197 VSS_198 VSS_199

CANTIGA ES_FCBGA1329

AM36 AE36 P36 L36 J36 F36 B36 AH35 AA35 Y35 U35 T35 BF34 AM34 AJ34 AF34 AE34 W34 B34 A34 BG33 BC33 BA33 AV33 AR33 AL33 AH33 AB33 P33 L33 H33 N32 K32 F32 C32 A31 AN29 T29 N29 K29 H29 F29 A29 BG28 BD28 BA28 AV28 AT28 AR28 AJ28 AG28 AE28 AB28 Y28 P28 K28 H28 F28 C28 BF26 AH26 AF26 AB26 AA26 C26 B26 BH25 BD25 BB25 AV25 AR25 AJ25 AC25 Y25 N25 L25 J25 G25 E25 BF24 AD12 AY24 AT24 AJ24 AH24 AF24 AB24 R24 L24 K24 J24 G24 F24 E24 BH23 AG23 Y23 B23 A23 AJ6

4

U26J

BG21

VSS_199

L12

VSS_200

AW21

VSS_201

AU21

VSS_202

AP21

VSS_203

AN21

VSS_204

AH21

VSS_205

AF21

VSS_206

AB21

VSS_207

R21

VSS_208

M21

VSS_209

J21

VSS_210

G21

VSS_211

BC20

VSS_212

BA20

VSS_213

AW20

VSS_214

AT20

VSS_215

AJ20

VSS_216

AG20

VSS_217

Y20

VSS_218

N20

VSS_219

K20

VSS_220

F20

VSS_221

C20

VSS_222

A20

VSS_223

BG19

VSS_224

A18

VSS_225

BG17

VSS_226

BC17

VSS_227

AW17

VSS_228

AT17

VSS_229

R17

VSS_230

M17

VSS_231

H17

VSS_232

C17

VSS_233

BA16

VSS_235

AU16

VSS_237

AN16

VSS_238

N16

VSS_239

K16

VSS_240

G16

VSS_241

E16

VSS_242

BG15

VSS_243

AC15

VSS_244

W15

VSS_245

A15

VSS_246

BG14

VSS_247

AA14

VSS_248

C14

VSS_249

BG13

VSS_250

BC13

VSS_251

BA13

VSS_252

AN13

VSS_255

AJ13

VSS_256

AE13

VSS_257

N13

VSS_258

L13

VSS_259

G13

VSS_260

E13

VSS_261

BF12

VSS_262

AV12

VSS_263

AT12

VSS_264

AM12

VSS_265

AA12

VSS_266

J12

VSS_267

A12

VSS_268

BD11

VSS_269

BB11

VSS_270

AY11

VSS_271

AN11

VSS_272

AH11

VSS_273

Y11

VSS_275

N11

VSS_276

G11

VSS_277

C11

VSS_278

BG10

VSS_279

AV10

VSS_280

AT10

VSS_281

AJ10

VSS_282

AE10

VSS_283

AA10

VSS_284

M10

VSS_285

BF9

VSS_286

BC9

VSS_287

AN9

VSS_288

AM9

VSS_289

AD9

VSS_290

G9

VSS_291

B9

VSS_292

BH8

VSS_293

BB8

VSS_294

AV8

VSS_295

AT8

VSS_296

GM@

VSS

3

VSS_297 VSS_298 VSS_299 VSS_300 VSS_301 VSS_302 VSS_303 VSS_304 VSS_305 VSS_306 VSS_307 VSS_308 VSS_309 VSS_310 VSS_311 VSS_312 VSS_313 VSS_314 VSS_315 VSS_316 VSS_317 VSS_318 VSS_319 VSS_320 VSS_321 VSS_322 VSS_323 VSS_324 VSS_325

VSS_327 VSS_328 VSS_329 VSS_330 VSS_331 VSS_332 VSS_333 VSS_334 VSS_335 VSS_336 VSS_337 VSS_338 VSS_339 VSS_340 VSS_341 VSS_342 VSS_343 VSS_344 VSS_345 VSS_346 VSS_347 VSS_348 VSS_349 VSS_350

VSS_351 VSS_352 VSS_353 VSS_354

VSS_NCTF_1 VSS_NCTF_2 VSS_NCTF_3 VSS_NCTF_4 VSS_NCTF_5 VSS_NCTF_6 VSS_NCTF_7 VSS_NCTF_8 VSS_NCTF_9

VSS_NCTF_10

VSS NCTF

VSS_NCTF_11 VSS_NCTF_12 VSS_NCTF_13 VSS_NCTF_14 VSS_NCTF_15 VSS_NCTF_16

VSS_SCB_1 VSS_SCB_2 VSS_SCB_3 VSS_SCB_4 VSS_SCB_5

VSS SCB

NC_26 NC_27 NC_28 NC_29 NC_30 NC_31 NC_32 NC_33 NC_34

NC

NC_35 NC_36 NC_37 NC_38 NC_39 NC_40 NC_41 NC_42

CANTIGA ES_FCBGA1329

AH8 Y8 L8 E8 B8 AY7 AU7 AN7 AJ7 AE7 AA7 N7 J7 BG6 BD6 AV6 AT6 AM6 M6 C6 BA5 AH5 AD5 Y5 L5 J5 H5 F5 BE4

BC3 AV3 AL3 R3 P3 F3 BA2 AW2 AU2 AR2 AP2 AJ2 AH2 AF2 AE2 AD2 AC2 Y2 M2 K2 AM1 AA1 P1 H1

U24 U28 U25 U29

AF32 AB32 V32 AJ30 AM29 AF29 AB29 U26 U23 AL20 V20 AC19 AL17 AJ17 AA17 U17

BH48 BH1 A48 C1 A3

E1 D2 C3 B4 A5 A6 A43 A44 B45 C46 D47 B47 A46 F48 E48 C48 B48

2

1

5

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2007/10/15 2008/10/15

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

Cantiga GMCH (6/6)-GND

JIWA3/A4_LA4212P

13 53Wednesday, May 14, 2008

1

1.0

of

5

hexainf@hotmail.com gratuito - free of charge.

DDR_A_DQS#[0..7]<9>

DDR_A_D[0..63]<9>

DDR_A_DM[0..7]<9> DDR_A_DQS[0..7]<9> DDR_A_MA[0..13]<9>

D D

Layout Note: Place near JP41

+1.8V

2.2U_0805_16V4Z

2.2U_0805_16V4Z C235

C235

1

2

C C

Layout Note: Place one cap close to every 2 pullup resistors terminated to +0.9VS

+0.9VS

0.1U_0402_16V4Z

1

2

C170

B B

A A

DDR_A_WE# DDR_A_CAS# M_ODT1 DDR_CS1_DIMMA#

DDR_A_BS#0 DDR_A_MA10 DDR_A_MA14

DDR_A_MA1 DDR_A_MA3 DDR_A_MA5 DDR_A_MA8

DDR_A_MA9 DDR_A_MA12 DDR_A_BS#2 DDR_CKE0_DIMMA

C152

1

2

0.1U_0402_16V4Z

1

2

C179

1 8 2 7 3 6 4 5

56_0804_8P4R_5%

R128

1 2

R133

1 2

R146

1 2

4 5 3 6 2 7 1 8

56_0804_8P4R_5%

4 5 3 6 2 7 1 8

56_0804_8P4R_5%

5

2.2U_0805_16V4Z

1

2

0.1U_0402_16V4Z

1

2

C209

RP1

56_0402_5%

56_0402_5% 56_0402_5%

56_0402_5%

RP6

RP10

C644

2.2U_0805_16V4Z

1

2

0.1U_0402_16V4Z

1

2

C228

+0.9VS

56_0804_8P4R_5%

1

2

RP2

RP5

C268

C236

RP9

2.2U_0805_16V4Z

2.2U_0805_16V4Z C151

C151

1

2

0.1U_0402_16V4Z

1

2

C161

DDR_A_RAS#

18

M_ODT0

27

DDR_A_MA13

36

DDR_CS0_DIMMA#

45

DDR_A_BS#1

45

DDR_A_MA0

36

DDR_A_MA2

27

DDR_A_MA4

18

DDR_A_MA6

45

DDR_A_MA7

36

DDR_A_MA11

27

DDR_CKE1_DIMMA

18

0.1U_0402_16V4Z

1

2

C230

C219

C218

1

2

0.1U_0402_16V4Z

1

2

C162

1

2

C223

0.1U_0402_16V4Z

1

2

0.1U_0402_16V4Z

4

+DDR_MCH_REF1<15>

0.1U_0402_16V4Z

0.1U_0402_16V4Z C650

C650

C653

1

2

0.1U_0402_16V4Z

1

2

C163

C217

Layout Note: Place these resistor closely JP41,all trace length Max=1.5"

4

1

+

C215

C215 470U_D2_2.5VM_R15

470U_D2_2.5VM_R15

@

2

0.1U_0402_16V4Z

1

2

C242

Layout Note: +DDR_MCH_REF trace width and spacing is 20/20.

+DDR_MCH_REF1

1

C404

2

0.1U_0402_16V4Z

C164

3

+1.8V

JP17

1

VREF

3

+1.8V

12

R225

100_0402_1%

12

R232

100_0402_1%

EC_TX_P80_DATA<15,35,37>

DDR_CKE0_DIMMA<8>

EC_RX_P80_CLK<15,35,37>

DDR_A_BS#2<9>

DDR_A_BS#0<9>

DDR_A_WE#<9>

DDR_A_CAS#<9>

DDR_CS1_DIMMA#<8>

M_ODT1<8>

EC_RX_P80_CLK_R<15>

CLK_SMBDATA<15,22>

CLK_SMBCLK<15,22>

DDR_A_D4 DDR_A_D1

DDR_A_DQS#0 DDR_A_DQS0

DDR_A_D2 DDR_A_D3

DDR_A_D8 DDR_A_D14

DDR_A_DQS#1 DDR_A_DQS1

DDR_A_D9 DDR_A_D11 DDR_A_D15 DDR_A_D10

DDR_A_D16 DDR_A_D17

DDR_A_DQS#2 DDR_A_DQS2

DDR_A_D18 DDR_A_D19

DDR_A_DM3

DDR_A_D26 DDR_A_D27

DDR_CKE0_DIMMA

DDR_A_BS#2 DDR_A_MA12

DDR_A_MA9 DDR_A_MA7 DDR_A_MA8

DDR_A_MA5 DDR_A_MA3 DDR_A_MA1

DDR_A_MA10 DDR_A_BS#0 DDR_A_WE#

DDR_A_CAS# DDR_CS1_DIMMA#

M_ODT1

DDR_A_D37 DDR_A_D36

DDR_A_DQS#4 DDR_A_DQS4

DDR_A_D38 DDR_A_D34 DDR_A_D32

DDR_A_D40 DDR_A_D44

DDR_A_DM5 DDR_A_D41

DDR_A_D46 DDR_A_D49

DDR_A_D48 EC_RX_P80_CLK_R DDR_A_DQS#6

DDR_A_DQS6

DDR_A_D50 DDR_A_D61 DDR_A_D57

DDR_A_D60 DDR_A_DM7 DDR_A_D59

DDR_A_D58 CLK_SMBDATA

CLK_SMBCLK

+3VS

1

C83

0.1U_0402_16V4Z

2

VSS

5

DQ0

7

DQ1

9

VSS

11

DQS0#

13

DQS0

15

VSS

17

DQ2

19

DQ3

21

VSS

23

DQ8

25

DQ9

27

VSS

29

DQS1#

31

DQS1

33

VSS

35

DQ10

37

DQ11

39

VSS

41

VSS

43

DQ16

45

DQ17

47

VSS

49

DQS2#

51

DQS2

53

VSS

55

DQ18

57

DQ19

59

VSS

61

DQ24

63

DQ25

65

VSS

67

DM3

69

NC

71

VSS

73

DQ26

75

DQ27

77

VSS

79

CKE0

81

VDD

83

NC

85

BA2

87

VDD

89

A12

91

A9

93

A8

95

VDD

97

A5

99

A3

101

A1

103

VDD

105

A10/AP

107

BA0

109

WE#

111

VDD

113

CAS#

115

NC/S1#

117

VDD

119

NC/ODT1

121

VSS

123

DQ32

125

DQ33

127

VSS

129

DQS4#

131

DQS4

133

VSS

135

DQ34

137

DQ35

139

VSS

141

DQ40

143

DQ41

145

VSS

147

DM5

149

VSS

151

DQ42

153

DQ43

155

VSS

157

DQ48

159

DQ49

161

VSS

163

NC,TEST

165

VSS

167

DQS6#

169

DQS6

171

VSS

173

DQ50

175

DQ51

177

VSS

179

DQ56

181

DQ57

183

VSS

185

DM7

187

VSS

189

DQ58

191

DQ59

193

VSS

195

SDA

197

SCL

199

VDDSPD

FOX_ASOA426-M2RN-7F

ME@

SO-DIMM A

Top side

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2007/10/15 2008/10/15

Compal Secret Data

Deciphered Date

VSS DQ4 DQ5 VSS

DM0

VSS DQ6 DQ7

VSS DQ12 DQ13

VSS

DM1

VSS

CK0

CK0#

VSS DQ14 DQ15

VSS

VSS DQ20 DQ21

VSS

DM2

VSS DQ22 DQ23

VSS DQ28 DQ29

VSS

DQS3#

DQS3

VSS DQ30 DQ31

VSS

NC/CKE1

VDD

NC/A15 NC/A14

VDD

BA1

RAS#

VDD ODT0

NC/A13

VDD

VSS DQ36 DQ37

VSS

DM4

VSS DQ38 DQ39

VSS DQ44 DQ45

VSS

DQS5#

DQS5

VSS DQ46 DQ47

VSS DQ52 DQ53

VSS

CK1

CK1#

VSS

DM6

VSS DQ54 DQ55

VSS DQ60 DQ61

VSS

DQS7#

DQS7

VSS DQ62 DQ63

VSS

SA0

SA1

2

+1.8V

+DDR_MCH_REF1

2

DDR_A_D6

4

DDR_A_D0

6 8

DDR_A_DM0

10 12

DDR_A_D5

14

DDR_A_D7

16 18

DDR_A_D13

20

DDR_A_D12

22 24

DDR_A_DM1

26 28

M_CLK_DDR0

30

M_CLK_DDR#0

32 34 36 38 40

42

DDR_A_D20

44

DDR_A_D21

46 48 50

NC

A11

A7 A6

A4 A2 A0

S0#

NC

2

52 54 56 58 60 62 64 66 68 70 72 74 76 78 80 82 84 86 88 90 92 94 96 98 100 102 104 106 108 110 112 114 116 118 120 122 124 126 128 130 132 134 136 138 140 142 144 146 148 150 152 154 156 158 160 162 164 166 168 170 172 174 176 178 180 182 184 186 188 190 192 194 196 198 200

DDR_A_DM2 DDR_A_D23

DDR_A_D22 DDR_A_D28DDR_A_D29

DDR_A_D25DDR_A_D24 DDR_A_DQS#3

DDR_A_DQS3 DDR_A_D31

DDR_A_D30 DDR_CKE1_DIMMA

DDR_A_MA14 DDR_A_MA11 DDR_A_MA6 DDR_A_MA4

DDR_A_MA2 DDR_A_MA0

DDR_A_BS#1 DDR_A_RAS# DDR_CS0_DIMMA#

M_ODT0 DDR_A_MA13

DDR_A_D33 DDR_A_D39

DDR_A_DM4 DDR_A_D35

DDR_A_D45 DDR_A_D43

DDR_A_DQS#5 DDR_A_DQS5

DDR_A_D47 DDR_A_D42

DDR_A_D52 DDR_A_D53

M_CLK_DDR1 M_CLK_DDR#1

DDR_A_DM6 DDR_A_D51DDR_A_D54

DDR_A_D55

DDR_A_D56 DDR_A_DQS#7

DDR_A_DQS7 DDR_A_D62

DDR_A_D63

12

R73

R77

10K_0402_5%

12

2.2U_0805_16V4Z

2.2U_0805_16V4Z C388

C388

1

2

M_CLK_DDR0 <8> M_CLK_DDR#0 <8>

PM_EXTTS#0 <8>

DDR_CKE1_DIMMA <8>

DDR_A_MA14 <9>

DDR_A_BS#1 <9> DDR_A_RAS# <9> DDR_CS0_DIMMA# <8>

M_ODT0 <8>

M_CLK_DDR1 <8> M_CLK_DDR#1 <8>

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

Compal Electronics, Inc.

DDRII-SODIMM SLOT1

JIWA3/A4_LA4212P

1

C402

+DDR_MCH_REF1 <15>

14 53Monday, May 12, 2008

1

1.0

of

0.1U_0402_16V4Z

1

2

5

hexainf@hotmail.com gratuito - free of charge.

DDR_B_DQS#[0..7]<9>

DDR_B_D[0..63]<9>

DDR_B_DM[0..7]<9> DDR_B_DQS[0..7]<9> DDR_B_MA[0..13]<9>

D D

C C

B B

A A

Layout Note: Place near JP42

+1.8V

2.2U_0805_16V4Z

Layout Note: Place one cap close to every 2 pullup resistors terminated to +0.9VS

+0.9VS

0.1U_0402_16V4Z

DDR_B_CAS# DDR_B_WE#

M_ODT3

DDR_B_BS#0 DDR_B_MA10 DDR_B_MA14

DDR_B_MA1 DDR_B_MA3 DDR_B_MA5 DDR_B_MA9

DDR_CKE2_DIMMB DDR_B_BS#2 DDR_B_MA12 DDR_B_MA8

1

2

1

2

C244

C232

1

2

0.1U_0402_16V4Z

1

2

C240

56_0804_8P4R_5%

R135

R135 R131

R131 R152

R152

56_0804_8P4R_5%

C150

0.1U_0402_16V4Z

1 2 1 2 1 2

5

1

2

0.1U_0402_16V4Z

1

2

C227

RP3

56_0402_5%

56_0402_5% 56_0402_5%

56_0402_5%

RP8

RP12

C387

1

2

C216

+0.9VS

18 27 36 45

45 36 27 18

18 27 36 45

2.2U_0805_16V4Z C156

C156

1

2

0.1U_0402_16V4Z

1

2

C196

RP4

4 5 3 6 2 7 1 8

56_0804_8P4R_5%

RP7

4 5 3 6 2 7 1 8

56_0804_8P4R_5%

RP11

4 5 3 6 2 7 1 8

56_0804_8P4R_5%

2.2U_0805_16V4Z

0.1U_0402_16V4Z

C241

1

2

0.1U_0402_16V4Z

1

2

C187

DDR_B_MA13 M_ODT2 DDR_CS2_DIMMB#DDR_CS3_DIMMB# DDR_B_RAS#

DDR_B_BS#1 DDR_B_MA0 DDR_B_MA2 DDR_B_MA4

DDR_B_MA7 DDR_B_MA6 DDR_B_MA11 DDR_CKE3_DIMMB

0.1U_0402_16V4Z

0.1U_0402_16V4Z C192

C192

1

2

0.1U_0402_16V4Z

1

2

C247

0.1U_0402_16V4Z

C188

1

2

0.1U_0402_16V4Z

1

2

C246

C229

4

0.1U_0402_16V4Z

0.1U_0402_16V4Z C191

C191

C199

1

2

0.1U_0402_16V4Z

1

2

C222

C204

Layout Note: Place these resistor closely JP42,all trace length Max=1.5"

4

0.1U_0402_16V4Z

1

2

C185

1

+

C155

C155 470U_D2_2.5VM_R15

470U_D2_2.5VM_R15

@

2

0.1U_0402_16V4Z

1

2

C176

3

+1.8V

JP16

1

VREF

3

DDR_B_D0 DDR_B_D1

DDR_B_DQS#0 DDR_B_DQS0

DDR_B_D2 DDR_B_D3

DDR_B_D8 DDR_B_D9

DDR_B_DQS#1 DDR_B_DQS1

DDR_B_D10 DDR_B_D11

DDR_B_D17 DDR_B_D20

DDR_B_DQS#2 DDR_B_DQS2

DDR_B_D18 DDR_B_D19

DDR_B_D25

T80T80

EC_TX_P80_DATA<14,35,37>

DDR_CKE2_DIMMB<8>

EC_RX_P80_CLK<14,35,37>

DDR_B_BS#2<9>

DDR_B_BS#0<9> DDR_B_WE#<9>

DDR_B_CAS#<9>

DDR_CS3_DIMMB#<8>

M_ODT3<8>

T22T22

EC_RX_P80_CLK_R<14>

CLK_SMBDATA<14,22>

CLK_SMBCLK<14,22>

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

DDR_B_D28 DDR_B_DM3

DDR_B_D30 DDR_B_D31

DDR_CKE2_DIMMB

DDR_B_BS#2 DDR_B_MA12

DDR_B_MA9 DDR_B_MA8

DDR_B_MA5 DDR_B_MA3 DDR_B_MA1

DDR_B_MA10 DDR_B_BS#0 DDR_B_WE#

DDR_B_CAS# DDR_CS3_DIMMB#

M_ODT3 DDR_B_D32

DDR_B_D33 DDR_B_DQS#4

DDR_B_DQS4 DDR_B_D34

DDR_B_D35 DDR_B_D40

DDR_B_D41 DDR_B_DM5 DDR_B_D42

DDR_B_D43 DDR_B_D48

DDR_B_D49 EC_RX_P80_CLK_R DDR_B_DQS#6

DDR_B_DQS6

DDR_B_D50 DDR_B_D56

DDR_B_D61 DDR_B_DM7 DDR_B_D58

DDR_B_D59 CLK_SMBDATA

CLK_SMBCLK

+3VS

1

C82

0.1U_0402_16V4Z

2007/10/15 2008/10/15

2

Compal Secret Data

VSS

5

DQ0

7

DQ1

9

VSS

11

DQS0#

13

DQS0

15

VSS

17

DQ2

19

DQ3

21

VSS

23

DQ8

25

DQ9

27

VSS

29

DQS1#

31

DQS1

33

VSS

35

DQ10

37

DQ11

39

VSS

41

VSS

43

DQ16

45

DQ17

47

VSS

49

DQS2#

51

DQS2

53

VSS

55

DQ18

57

DQ19

59

VSS

61

DQ24

63

DQ25

65

VSS

67

DM3

69

NC

71

VSS

73

DQ26

75

DQ27

77

VSS

79

CKE0

81

VDD

83

NC

85

BA2

87

VDD

89

A12

91

A9

93

A8

95

VDD

97

A5

99

A3

101

A1

103

VDD

105

A10/AP

107

BA0

109

WE#

111

VDD

113

CAS#

115

NC/S1#

117

VDD

119

NC/ODT1

121

VSS

123

DQ32

125

DQ33

127

VSS

129

DQS4#

131

DQS4

133

VSS

135

DQ34

137

DQ35

139

VSS

141

DQ40

143

DQ41

145

VSS

147

DM5

149

VSS

151

DQ42

153

DQ43

155

VSS

157

DQ48

159

DQ49

161

VSS

163

NC,TEST

165

VSS

167

DQS6#

169

DQS6

171

VSS

173

DQ50

175

DQ51

177

VSS

179

DQ56

181

DQ57

183

VSS

185

DM7

187

VSS

189

DQ58

191

DQ59

193

VSS

195

SDA

197

SCL

199

VDDSPD

FOX_AS0A426-NARN-7F~N

ME@

SO-DIMM B

Deciphered Date

DQS3#

NC/CKE1

NC/A15 NC/A14

NC/A13

DQS5#

DQS7#

DM0

DQ12 DQ13

DM1

CK0#

DQ14 DQ15

DQ20 DQ21

DM2

DQ22 DQ23

DQ28 DQ29

DQS3 DQ30

DQ31

VDD

RAS#

VDD

ODT0

VDD

DQ36 DQ37

DM4

DQ38 DQ39

DQ44 DQ45

DQS5 DQ46

DQ47 DQ52

DQ53

CK1#

DM6

DQ54 DQ55

DQ60 DQ61

DQS7 DQ62

DQ63

SAO

VSS DQ4 DQ5 VSS

VSS DQ6 DQ7 VSS

VSS VSS

CK0 VSS

VSS

A11

BA1 S0#

VSS

VSS VSS

VSS

VSS CK1

VSS VSS

VSS

VSS SA1

2

+1.8V

+DDR_MCH_REF1

2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40

42 44 46 48 50

NC

52 54 56 58 60 62 64 66 68 70 72 74 76 78 80 82 84 86 88 90 92

A7

94

A6

96 98

A4

100

A2

102

A0

104 106 108 110 112 114 116 118 120

NC

122 124 126 128 130 132 134 136 138 140 142 144 146 148 150 152 154 156 158 160 162 164 166 168 170 172 174 176 178 180 182 184 186 188 190 192 194 196 198 200

2

DDR_B_D4 DDR_B_D5

DDR_B_DM0 DDR_B_D6

DDR_B_D7 DDR_B_D12

DDR_B_D13 DDR_B_DM1 M_CLK_DDR2

M_CLK_DDR#2 DDR_B_D14

DDR_B_D15

DDR_B_D21 DDR_B_D16

DDR_B_DM2 DDR_B_D22

DDR_B_D23 DDR_B_D26

DDR_B_D24 DDR_B_DQS#3

DDR_B_DQS3 DDR_B_D29

DDR_B_D27 DDR_CKE3_DIMMB

DDR_B_MA14 DDR_B_MA11

DDR_B_MA7 DDR_B_MA6

DDR_B_MA4 DDR_B_MA2 DDR_B_MA0

DDR_B_BS#1 DDR_B_RAS# DDR_CS2_DIMMB#

M_ODT2 DDR_B_MA13

DDR_B_D36 DDR_B_D37

DDR_B_DM4 DDR_B_D39

DDR_B_D38 DDR_B_D44

DDR_B_D45 DDR_B_DQS#5

DDR_B_DQS5 DDR_B_D46

DDR_B_D47 DDR_B_D52

DDR_B_D53 M_CLK_DDR3

M_CLK_DDR#3 DDR_B_DM6 DDR_B_D54DDR_B_D51

DDR_B_D55 DDR_B_D60

DDR_B_D57 DDR_B_DQS#7

DDR_B_DQS7 DDR_B_D62

DDR_B_D63

10K_0402_5%

12

R78

2.2U_0805_16V4Z

0.1U_0402_16V4Z

1

C403

2

M_CLK_DDR2 <8> M_CLK_DDR#2 <8>

PM_EXTTS#1 <8>

DDR_CKE3_DIMMB <8>

DDR_B_MA14 <9>

DDR_B_BS#1 <9> DDR_B_RAS# <9> DDR_CS2_DIMMB# <8>

M_ODT2 <8>

M_CLK_DDR3 <8> M_CLK_DDR#3 <8>

R74

1 2

10K_0402_5%

Title

Size Document Number Rev

Date: Sheet

+3VS

Compal Electronics, Inc.

DDRII-SODIMM SLOT2

JIWA3/A4_LA4212P

1

+DDR_MCH_REF1 <14>

C407

1

1.0

of

15 53Monday, May 12, 2008

of

15 53Monday, May 12, 2008

of

15 53Monday, May 12, 2008

5

hexainf@hotmail.com gratuito - free of charge.

PCIE_MTX_C_GRX_P0

PCIE_MTX_C_GRX_N[0..15]<10> PCIE_MTX_C_GRX_P[0..15]<10> PCIE_GTX_C_MRX_N[0..15]<10> PCIE_GTX_C_MRX_P[0..15]<10>

D D

PCIE_GTX_C_MRX_P0 PCIE_GTX_C_MRX_N0 PCIE_GTX_C_MRX_P1 PCIE_GTX_C_MRX_N1 PCIE_GTX_C_MRX_P2 PCIE_GTX_C_MRX_N2 PCIE_GTX_C_MRX_P3 PCIE_GTX_C_MRX_N3 PCIE_GTX_C_MRX_P4

C C

PCIE_GTX_C_MRX_N4 PCIE_GTX_MRX_N4 PCIE_GTX_C_MRX_P5 PCIE_GTX_C_MRX_N5 PCIE_GTX_C_MRX_P6 PCIE_GTX_C_MRX_N6 PCIE_GTX_C_MRX_P7 PCIE_GTX_C_MRX_N7 PCIE_GTX_C_MRX_P8 PCIE_GTX_C_MRX_N8 PCIE_GTX_C_MRX_P9 PCIE_GTX_C_MRX_N9 PCIE_GTX_C_MRX_P10 PCIE_GTX_C_MRX_N10 PCIE_GTX_C_MRX_P11 PCIE_GTX_C_MRX_N11 PCIE_GTX_C_MRX_P12 PCIE_GTX_C_MRX_N12 PCIE_GTX_C_MRX_P13 PCIE_GTX_C_MRX_N13 PCIE_GTX_C_MRX_P14 PCIE_GTX_C_MRX_N14 PCIE_GTX_C_MRX_P15 PCIE_GTX_C_MRX_N15

B B

OSC_SPREAD

R99

10K_0402_5%

PM@

If External Spread Spectrum not stuff than stuff resistor

PCIE_MTX_C_GRX_N[0..15] PCIE_MTX_C_GRX_P[0..15] PCIE_GTX_C_MRX_N[0..15] PCIE_GTX_C_MRX_P[0..15]

C261 0.1U_0402_10V7KPM@C261 0.1U_0402_10V7KPM@ C260 0.1U_0402_10V7KPM@C260 0.1U_0402_10V7KPM@ C294 0.1U_0402_10V7KPM@C294 0.1U_0402_10V7KPM@ C293 0.1U_0402_10V7KPM@C293 0.1U_0402_10V7KPM@ C259 0.1U_0402_10V7KPM@C259 0.1U_0402_10V7KPM@ C258 0.1U_0402_10V7KPM@C258 0.1U_0402_10V7KPM@ C292 0.1U_0402_10V7KPM@C292 0.1U_0402_10V7KPM@ C291 0.1U_0402_10V7KPM@C291 0.1U_0402_10V7KPM@ C257 0.1U_0402_10V7KPM@C257 0.1U_0402_10V7KPM@ C256 0.1U_0402_10V7KPM@C256 0.1U_0402_10V7KPM@ C290 0.1U_0402_10V7KPM@C290 0.1U_0402_10V7KPM@ C289 0.1U_0402_10V7KPM@C289 0.1U_0402_10V7KPM@ C255 0.1U_0402_10V7KPM@C255 0.1U_0402_10V7KPM@ C254 0.1U_0402_10V7KPM@C254 0.1U_0402_10V7KPM@ C287 0.1U_0402_10V7KPM@C287 0.1U_0402_10V7KPM@ C288 0.1U_0402_10V7KPM@C288 0.1U_0402_10V7KPM@ C253 0.1U_0402_10V7KPM@C253 0.1U_0402_10V7KPM@ C252 0.1U_0402_10V7KPM@C252 0.1U_0402_10V7KPM@ C285 0.1U_0402_10V7KPM@C285 0.1U_0402_10V7KPM@ C286 0.1U_0402_10V7KPM@C286 0.1U_0402_10V7KPM@ C251 0.1U_0402_10V7KPM@C251 0.1U_0402_10V7KPM@ C250 0.1U_0402_10V7KPM@C250 0.1U_0402_10V7KPM@ C284 0.1U_0402_10V7KPM@C284 0.1U_0402_10V7KPM@ C283 0.1U_0402_10V7KPM@C283 0.1U_0402_10V7KPM@ C249 0.1U_0402_10V7K

C249 0.1U_0402_10V7K C248 0.1U_0402_10V7K

C248 0.1U_0402_10V7K C282 0.1U_0402_10V7KPM@C282 0.1U_0402_10V7KPM@ C281 0.1U_0402_10V7KPM@C281 0.1U_0402_10V7KPM@ C267 0.1U_0402_10V7KPM@C267 0.1U_0402_10V7KPM@ C266 0.1U_0402_10V7KPM@C266 0.1U_0402_10V7KPM@ C280 0.1U_0402_10V7KPM@C280 0.1U_0402_10V7KPM@ C279 0.1U_0402_10V7KPM@C279 0.1U_0402_10V7KPM@

12

PM@

PM@ PM@

PM@

1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2

12

R100

R100 10K_0402_5%

10K_0402_5%

PM@

CLK_PCIE_VGA<22> CLK_PCIE_VGA#<22>

PLT_RST#<8,26,32,33,36,40>

PCIE_MTX_C_GRX_N0 PCIE_MTX_C_GRX_P1 PCIE_MTX_C_GRX_N1 PCIE_MTX_C_GRX_P2 PCIE_MTX_C_GRX_N2 PCIE_MTX_C_GRX_P3 PCIE_MTX_C_GRX_N3 PCIE_MTX_C_GRX_P4 PCIE_MTX_C_GRX_N4 PCIE_MTX_C_GRX_P5 PCIE_MTX_C_GRX_N5 PCIE_MTX_C_GRX_P6 PCIE_MTX_C_GRX_N6 PCIE_MTX_C_GRX_P7 PCIE_MTX_C_GRX_N7 PCIE_MTX_C_GRX_P8 PCIE_MTX_C_GRX_N8 PCIE_MTX_C_GRX_P9 PCIE_MTX_C_GRX_N9 PCIE_MTX_C_GRX_P10 PCIE_MTX_C_GRX_N10 PCIE_MTX_C_GRX_P11 PCIE_MTX_C_GRX_N11 PCIE_MTX_C_GRX_P12 PCIE_MTX_C_GRX_N12 PCIE_MTX_C_GRX_P13 PCIE_MTX_C_GRX_N13 PCIE_MTX_C_GRX_P14 PCIE_MTX_C_GRX_N14 PCIE_MTX_C_GRX_P15 PCIE_MTX_C_GRX_N15

CLK_PCIE_VGA CLK_PCIE_VGA#

1 2

R183 200_0402_5% @R183 200_0402_5% @ R504 2.4K_0402_1% PM@R504 2.4K_0402_1% PM@

PLT_RST#

10K_0402_5%

1 2

R173

@R173

@

XTALOUT XTALIN

PCIE_GTX_MRX_P0 PCIE_GTX_MRX_N0 PCIE_GTX_MRX_P1 PCIE_GTX_MRX_N1 PCIE_GTX_MRX_P2 PCIE_GTX_MRX_N2 PCIE_GTX_MRX_P3 PCIE_GTX_MRX_N3 PCIE_GTX_MRX_P4

PCIE_GTX_MRX_P5 PCIE_GTX_MRX_N5 PCIE_GTX_MRX_P6 PCIE_GTX_MRX_N6 PCIE_GTX_MRX_P7 PCIE_GTX_MRX_N7 PCIE_GTX_MRX_P8 PCIE_GTX_MRX_N8 PCIE_GTX_MRX_P9 PCIE_GTX_MRX_N9 PCIE_GTX_MRX_P10 PCIE_GTX_MRX_N10 PCIE_GTX_MRX_P11 PCIE_GTX_MRX_N11 PCIE_GTX_MRX_P12 PCIE_GTX_MRX_N12 PCIE_GTX_MRX_P13 PCIE_GTX_MRX_N13 PCIE_GTX_MRX_P14 PCIE_GTX_MRX_N14 PCIE_GTX_MRX_P15 PCIE_GTX_MRX_N15

12

4

U27A

AE12

PEX_RX0

AF12

PEX_RX0_N

AG12

PEX_RX1

AG13

PEX_RX1_N

AF13

PEX_RX2

AE13

PEX_RX2_N

AE15

PEX_RX3

AF15

PEX_RX3_N

AG15

PEX_RX4

AG16

PEX_RX4_N

AF16

PEX_RX5

AE16

PEX_RX5_N

AE18

PEX_RX6

AF18

PEX_RX6_N

AG18

PEX_RX7

AG19

PEX_RX7_N

AF19

PEX_RX8

AE19

PEX_RX8_N

AE21

PEX_RX9

AF21

PEX_RX9_N

AG21

PEX_RX10

AG22

PEX_RX10_N

AF22

PEX_RX11

AE22

PEX_RX11_N

AE24

PEX_RX12

AF24

PEX_RX12_N

AG24

PEX_RX13

AF25

PEX_RX13_N

AG25

PEX_RX14

AG26

PEX_RX14_N

AF27

PEX_RX15

AE27

PEX_RX15_N

AD10

PEX_TX0

AD11

PEX_TX0_N

AD12

PEX_TX1

AC12

PEX_TX1_N

AB11

PEX_TX2

AB12

PEX_TX2_N

AD13

PEX_TX3

AD14

PEX_TX3_N

AD15

PEX_TX4

AC15

PEX_TX4_N

AB14

PEX_TX5

AB15

PEX_TX5_N

AC16

PEX_TX6

AD16

PEX_TX6_N

AD17

PEX_TX7

AD18

PEX_TX7_N

AC18

PEX_TX8

AB18

PEX_TX8_N

AB19

PEX_TX9

AB20

PEX_TX9_N

AD19

PEX_TX10

AD20

PEX_TX10_N

AD21

PEX_TX11

AC21

PEX_TX11_N

AB21

PEX_TX12

AB22

PEX_TX12_N

AC22

PEX_TX13

AD22

PEX_TX13_N

AD23

PEX_TX14

AD24

PEX_TX14_N

AE25

PEX_TX15

AE26

PEX_TX15_N

AB10

PEX_REFCLK

AC10

PEX_REFCLK_N

AF10

PEX_TSTCLK_OUT

AE10

PEX_TSTCLK_OUT_N

AG10

PEX_TERMP

AD9

PEX_RST_N

D11

XTAL_SSIN

E9

XTAL_OUTBUFF

E10

XTAL_OUT

D10

XTAL_IN

PM@

NB9M-GS_BGA533

External Spread Spectrum

Part 1 of 5

GPIO

DACA_HSYNC DACA_VSYNC

DACA_RED

DACA_BLUE

DACA_GREEN

DACA_VREF DACA_RSET

DACB_CSYNC

DACB_RED

DACB_BLUE

DACB_GREEN

DACBI2CHDA DACADACC

DACB_VREF DACB_RSET

DACC_HSYNC DACC_VSYNC

DACC_RED

DACC_BLUE

DACC_GREEN

DACC_VREF DACC_RSET

I2CA_SCL I2CA_SDA I2CB_SCL

PCI EXPRESS

I2CB_SDA I2CC_SCL

I2CC_SDA

I2CD_SCL

I2CD_SDA

I2CE_SCL I2CE_SDA I2CH_SCL

I2CH_SDA

I2CS_SCL I2CS_SDA

JTAG_TCK

JTAG_TDI JTAG_TDO JTAG_TMS

JTAG_TRST_N

TEST

TESTMODE

VDD_SENSE

HDA_RST_N

HDA_SDI

CLK

HDA_SDO HDA_SYNC HDA_BCLK

GPIO0 GPIO1 GPIO2 GPIO3 GPIO4 GPIO5 GPIO6 GPIO7 GPIO8

GPIO9 GPIO10 GPIO11 GPIO12 GPIO13 GPIO14 GPIO15 GPIO16 GPIO17 GPIO18 GPIO19

SPDIF

3

N1 G1 C1 M2 M3 K3 K2 J2 C2 M1 D2 D1 J3 J1 K1 F3 G3 G2 F1 F2

AD2 AD1

AE2 AD3 AE3

AF1 AE1

D6 F7

E6 E7

G6 F8

U6 U4

T5 R4 T4

R6 V6

R1 T3 R2 R3 A2 B1 N2 N3 Y6 W6 A3 A4 T1 T2

AF3 AG4 AE4 AF4 AG3 AD25

F9 W15

C6 A6 B6 B7 A7

NV_INVTPWM VGA_ENVDD VGA_ENBKL

VGA_HSYNC VGA_VSYNC

VGA_CRT_R VGA_CRT_B VGA_CRT_G

DACA_VREF DACA_RSET

R116 2.2K_0402_5% PM@R116 2.2K_0402_5% PM@ R119 2.2K_0402_5% PM@R119 2.2K_0402_5% PM@

R196 2.2K_0402_5% PM@R196 2.2K_0402_5% PM@ R193 2.2K_0402_5% PM@R193 2.2K_0402_5% PM@

SPDIF_IN +VGASENSE

HDA_RST_CODEC#_R HDA_SDIN1_R HDA_SDOUT_CODEC_R HDA_SYNC_CODEC_R HDA_BITCLK_CODEC_R

R503 124_0402_1%PM@R503 124_0402_1%PM@

VGA_DDCCLK_C VGA_DDCDATA_C

1 2

VGA_LVDS_SCL_C VGA_LVDS_SDA_C

1 2

VGA_HDMI_SCL VGA_HDMI_SDA

HDCP_SMB_CK1 HDCP_SMB_DAI EC_SMB_CK2 EC_SMB_DA2

JTAG_TCK JTAG_TDO JTAG_TRST_N

TESTMODE

2

12

R69

2.2K_0402_5%

HDMI_PM@

12

R71

R71 10K_0402_5%

10K_0402_5%

@

JTAG_TRST_N TESTMODE

L39 MBK1608121YZF_0603PM@L39 MBK1608121YZF_0603PM@

1 2 1 2

L40 MBK1608121YZF_0603PM@L40 MBK1608121YZF_0603PM@ L41

L41

1 2 1 2

L42 MBK1608121YZF_0603PM@L42 MBK1608121YZF_0603PM@

12P_0402_50V8J

VGA_CRT_R VGA_CRT_G VGA_CRT_B

VGA_HDMI_SDA VGA_HDMI_SCL VGA_DDCCLK VGA_DDCDATA

MBK1608121YZF_0603PM@

12P_0402_50V8J

12

R65

R65 10K_0402_5%

10K_0402_5%

@

12

R66

R66 10K_0402_5%

10K_0402_5%

@

PM@

1 2 1 2

PM@

R492 2.2K_0402_5%@R492 2.2K_0402_5%@ R490 2.2K_0402_5%@R490 2.2K_0402_5%@ R489 2.2K_0402_5%@R489 2.2K_0402_5%@ R491 2.2K_0402_5%@R491 2.2K_0402_5%@

PM@

R164 150_0402_1%PM@R164 150_0402_1%PM@ R168 150_0402_1%PM@R168 150_0402_1%PM@ R180 150_0402_1%PM@R180 150_0402_1%PM@

R645

R645 10K_0402_5%

10K_0402_5% R646

R646 10K_0402_5%

10K_0402_5%

1 2 1 2 1 2 1 2

VGA_DDCCLK_C

R75

2.2K_0402_5%

HDMI_PM@

VGA_DDCDATA_C

VGA_LVDS_SCL_C VGA_LVDS_SDA_C

+3VS

12

HDMI_DETECT_VGA <23> VGA_DDCDATA <25>

PAD

T86

VGA_ENVDD <24> VGA_ENBKL <24>

PAD

T29

VGA_HSYNC <25> VGA_VSYNC <25>

VGA_CRT_R <25> VGA_CRT_B <25> VGA_CRT_G <25>

PM@

12

C648 0.1U_0402_16V4Z

EC_SMB_CK2 <5,35,41> EC_SMB_DA2 <5,35,41>

PAD

T28

R650 22_0402_5%PM@R650 22_0402_5%PM@

1 2

R86 10_0402_5%PM@R86 10_0402_5%PM@

1 2

R651 22_0402_5%PM@R651 22_0402_5%PM@

1 2

R652 22_0402_5%PM@R652 22_0402_5%PM@

1 2

R653 22_0402_5%PM@R653 22_0402_5%PM@

1 2

12

R647

R647 10K_0402_5%

10K_0402_5%

@

VGA_HDMI_SCL <23> VGA_HDMI_SDA <23>

T60

T60 T59

T59 T92

T92 T57

T57

+VGASENSE

CRT OUT

+3VS

HDA_RST_CODEC# <8,27,30> HDA_SDIN1 <27> HDA_SDOUT_CODEC <8,27,30> HDA_SYNC_CODEC <8,27,30> HDA_BITCLK_CODEC <8,27,30>

HDCP_SMB_CK1 HDCP_SMB_DAI

1

C770

C773

C772

C771

12P_0402_50V8J

2

PM@

1 2 1 2 1 2

HDMI_PM@

C79

0.1U_0402_16V4Z

1 2

U4

8

VCC

7

WP

6

SCL

5

SDA

AT24C16AN-10SU-2.7_SO8

HDMI_PM@

VGA_DDCCLK <25>

VGA_LVDS_SCL <24> VGA_LVDS_SDA <24>

A0 A1 A2

GND

100K_0402_1% HDMI_PM@

1 2 3 4

12

R70

+3VS

U3

Y3

OUT GND

PM@

Y3

4

GND

1

IN

18P_0402_50V8J

PM@

C614

1

2

3 2

27MHZ_16PF_X7S027000BG1H-U

1

C612

A A

18P_0402_50V8J

PM@

C612

2

5

U3

1 2 3

ASM3P2872AF-06OR_TSOT-23-6

@

4

REFOUT XOUT XIN/CLKIN

VSS

MODOUT

VDD

6 5 4

@

OSC_SPREAD

1 2

R55 22_0402_5%

+3VS

2

C66

0.1U_0402_16V4Z

1

@

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2007/10/15 2008/10/15

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Document Number Rev

B

Date: Sheet

Compal Electronics, Inc.

NB9M-GS PCIE,LVDS,GPIO,CLK

JIWA3/A4_LA4212P

16 53Wednesday, May 14, 2008

of

1

of

1.0

5

hexainf@hotmail.com gratuito - free of charge.

4

3

2

1

FBAD[0..63]

FBAA[0..12]

FBBA[2..5]

FBADQS[0..7]

D D

FBAD0

D21

FBAD1

C22

FBAD2

B22

FBAD3

A22

FBAD4

C24

FBAD5

B25

FBAD6

A25

FBAD7

A26

FBAD8

D22

FBAD9

E22

FBAD10

E24

FBAD11

D24

FBAD12

D26

FBAD13

D27

FBAD14

C27

FBAD15

B27

FBAD16

D16

FBAD17

E16

FBAD18

D17

FBAD19

F18

FBAD20

D20

FBAD21

C C

B B

FBAD22 FBAD23 FBAD24 FBAD25 FBAD26 FBAD27 FBAD28 FBAD29 FBAD30 FBAD31 FBAD32 FBAD33 FBAD34 FBAD35 FBAD36 FBAD37 FBAD38 FBAD39 FBAD40 FBAD41 FBAD42 FBAD43 FBAD44 FBAD45 FBAD46 FBAD47 FBAD48 FBAD49 FBAD50 FBAD51 FBAD52 FBAD53 FBAD54 FBAD55 FBAD56 FBAD57 FBAD58 FBAD59 FBAD60 FBAD61 FBAD62 FBAD63

W22 W23

W24 AA22 AB23 AB24 AC24

W25

W26

W27 AA25 AB25 AB26 AD26 AD27

F20 E21 F21 C16 B18 C18 D18 C19 C21 B21 A21 P22 P24 R23 R24 T23 U24 V23 V24 N25 N26 R25 R26 T25 V26 V25 V27 V22

U27B

FBA_D0

Part 2 of 5

FBA_D1 FBA_D2 FBA_D3 FBA_D4 FBA_D5 FBA_D6 FBA_D7 FBA_D8 FBA_D9 FBA_D10 FBA_D11 FBA_D12 FBA_D13 FBA_D14 FBA_D15 FBA_D16 FBA_D17 FBA_D18 FBA_D19 FBA_D20 FBA_D21 FBA_D22 FBA_D23 FBA_D24 FBA_D25 FBA_D26 FBA_D27 FBA_D28 FBA_D29 FBA_D30 FBA_D31 FBA_D32 FBA_D33 FBA_D34 FBA_D35 FBA_D36 FBA_D37 FBA_D38 FBA_D39 FBA_D40 FBA_D41 FBA_D42 FBA_D43 FBA_D44 FBA_D45 FBA_D46 FBA_D47 FBA_D48 FBA_D49 FBA_D50 FBA_D51 FBA_D52 FBA_D53 FBA_D54 FBA_D55 FBA_D56 FBA_D57 FBA_D58 FBA_D59 FBA_D60 FBA_D61 FBA_D62 FBA_D63

NB9M-GS_BGA533

PM@

FBADQS#[0..7]

FBADQM#[0..7]

FBA_CMD0 FBA_CMD1 FBA_CMD2 FBA_CMD3 FBA_CMD4 FBA_CMD5 FBA_CMD6 FBA_CMD7 FBA_CMD8

FBA_CMD9 FBA_CMD10 FBA_CMD11 FBA_CMD12 FBA_CMD13 FBA_CMD14 FBA_CMD15 FBA_CMD16 FBA_CMD17 FBA_CMD18 FBA_CMD19 FBA_CMD20 FBA_CMD21 FBA_CMD22 FBA_CMD23 FBA_CMD24 FBA_CMD25 FBA_CMD26 FBA_CMD27 FBA_CMD28

FBA_DQM0

FBA_DQM1

FBA_DQM2

FBA_DQM3

FBA_DQM4

FBA_DQM5

FBA_DQM6

FBA_DQM7

FBA_DQS_RN0 FBA_DQS_RN1

MEMORY INTERFACE

FBA_DQS_RN2 FBA_DQS_RN3 FBA_DQS_RN4 FBA_DQS_RN5 FBA_DQS_RN6 FBA_DQS_RN7

FBA_DQS_WP0 FBA_DQS_WP1 FBA_DQS_WP2 FBA_DQS_WP3 FBA_DQS_WP4 FBA_DQS_WP5 FBA_DQS_WP6 FBA_DQS_WP7

FBA_CLK0_N

FBA_CLK1_N FBA_DEBUG

FB_VREF

FBA_CLK0

FBA_CLK1

FBAD[0..63] <20,21>

FBAA[0..12] <20,21>

FBBA[2..5] <21>

FBADQS[0..7] <20,21>

FBADQS#[0..7] <20,21>

FBADQM#[0..7] <20,21>

FBAA3

F26

FBAA0

J24

FBAA2

F25

FBAA1

M23

FBBA3

N27

FBBA4

M27

FBBA5

K26

FBACS1#

J25

FBACS0#

J27

FBAWE#

G23

FBA_BA0

G26

FBA_CKE

J23

AODT0 FBAODT0

R494

M25 K27 G25 L24 K23 K24 G22 K25 H22 M26 H24 F27 J26 G24 G27 M24 K22

D23 C26 D19 B19 T24 T26 AA23 AB27

B24 D25 E18 A18 R22 R27 Y24 AA27

A24 C25 E19 A19 T22 T27 AA24 AA26

A16 F24

F23 N24

N23 M22

1 2

FBBA2 FBAA12 FBARAS# FBAA11 FBAA10 FBA_BA1 FBAA8 FBAA9 FBAA6 FBAA5 FBAA7 FBAA4 FBACAS#

FBABA2

FBADQM#0 FBADQM#1 FBADQM#2 FBADQM#3 FBADQM#4 FBADQM#5 FBADQM#6 FBADQM#7

FBADQS#0 FBADQS#1 FBADQS#2 FBADQS#3 FBADQS#4 FBADQS#5 FBADQS#6 FBADQS#7

FBADQS0 FBADQS1 FBADQS2 FBADQS3 FBADQS4 FBADQS5 FBADQS6 FBADQS7

FB_VREF1

FBA_DEBUG

1 2

R113 10K_0402_5%

PM@

PAD

T33

FBACS0# <20,21> FBAWE# <20,21> FBA_BA0 <20,21>

0_0402_5%PM@

FBARAS# <20,21>

FBA_BA1 <20,21>

FBACAS# <20,21> FBABA2 <20,21>

15mil

FBACLK0 <20> FBACLK0# <20>

FBACLK1 <21> FBACLK1# <21>

FBAODT0

12

R129

R129 10K_0402_5%

10K_0402_5%

PM@

VGA_LVDS_ACLK<24> VGA_LVDS_ACLK#<24> VGA_LVDS_A0<24> VGA_LVDS_A0#<24> VGA_LVDS_A1<24> VGA_LVDS_A1#<24> VGA_LVDS_A2<24> VGA_LVDS_A2#<24>

VGA_HDMI_TX2+<23> VGA_HDMI_TX2-<23> VGA_HDMI_TX1+<23> VGA_HDMI_TX1-<23> VGA_HDMI_TX0+<23> VGA_HDMI_TX0-<23> VGA_HDMI_CLK+<23> VGA_HDMI_CLK-<23>

FBAODT0 <20,21>

12

R499

R499 10K_0402_5%

10K_0402_5%

@

FBA_CKE<20,21>

12

R118

R118 10K_0402_5%

10K_0402_5%

PM@

C269~C276 NEAR CONNECT

R186~R195 NEAR CONNECT PULL DOWN

TMDS pull down (500ohm) resistors G9x only

+1.8VS

12

R87

R87 1K_0402_1%

1K_0402_1%

@

12

@

0.1U_0402_16V4Z

+1.8VS

1

C90

2

R90

R90 1K_0402_1%

1K_0402_1%

@

VGA_LVDS_ACLK VGA_LVDS_ACLK# VGA_LVDS_A0 VGA_LVDS_A0# VGA_LVDS_A1 VGA_LVDS_A1# VGA_LVDS_A2 VGA_LVDS_A2#

VGA_HDMI_TX2+ VGA_HDMI_TX2VGA_HDMI_TX1+ VGA_HDMI_TX1VGA_HDMI_TX0+ VGA_HDMI_TX0VGA_HDMI_CLK+ VGA_HDMI_CLK-

R182 1K_0402_5%@R182 1K_0402_5%@

1 2

R98 1K_0402_5%@R98 1K_0402_5%@

1 2

R102 1K_0402_5%

1 2

PM@

U27C

AC4

IFPA_TXC

AD4

IFPA_TXC_N

V5

IFPA_TXD0

V4

IFPA_TXD0_N

AA5

IFPA_TXD1

AA4

IFPA_TXD1_N

W4

IFPA_TXD2

Y4

IFPA_TXD2_N

AB4

IFPA_TXD3

AB5

IFPA_TXD3_N

AB3

IFPB_TXC

AB2

IFPB_TXC_N

W1

IFPB_TXD4

V1

IFPB_TXD4_N

W3

IFPB_TXD5

W2

IFPB_TXD5_N

AA2

IFPB_TXD6

AA3

IFPB_TXD6_N

AB1

IFPB_TXD7

AA1

IFPB_TXD7_N

P4

IFPC_L0

N4

IFPC_L0_N

M5

IFPC_L1

M4

IFPC_L1_N

L4

IFPC_L2

K4

IFPC_L2_N

H4

IFPC_L3

J4

IFPC_L3_N

F5

IFPE_L0

F4

IFPE_L0_N

E4

IFPE_L1

D5

IFPE_L1_N

C3

IFPE_L2

C4

IFPE_L2_N

B3

IFPE_L3

B4

IFPE_L3_N

AB6

IFPAB_RSET

M6

IFPE_RSET

R5

IFPC_RSET

NB9M-GS_BGA533

PM@

Part 3 of 5

NC

STARP_REF_MIOB

STARP_REF_3V3

BUFRST_N

GENERAL STRAP

ROM_CS_N ROM_SCLK

L V D S / T M D S

SERIAL

IFPE_AUX_N IFPC_AUX_N

STRAP0 STRAP1 STRAP2

THERMDN THERMDP

ROM_SI

ROM_SO

IFPE_AUX

IFPC_AUX

C15

NC

D15

NC

E15

NC

F6

NC

J5

NC

J22

NC

L22

NC

T6

NC

AA6

NC

AC19

NC

AE9

NC

AG9

NC

STRAP0

C7

STRAP1

B9

STRAP2

A9

F10 F11

N5

PAD

T36

PAD

PAD PAD

PAD

ROM_SCLK ROM_SI ROM_SO

T36 T24

T24 T85

T85

D8 D9

B10 C9 A10 C10

D4 D3 G5 G4

STRAP0 <19> STRAP1 <19> STRAP2 <19>

12

R88

40.2K_0402_1%

PM@

ROM_SCLK <19>

ROM_SI <19>

ROM_SO <19>

12

R91

40.2K_0402_1%

PM@

A A

Security Classification

5

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2007/10/15 2008/10/15

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

B

Date: Sheet

2

Date: Sheet

NB9M-GS Memory

JIWA3/A4_LA4212P

1

1.0

17 53Monday, May 12, 2008

1.0

of

5

hexainf@hotmail.com gratuito - free of charge.

4

3

2

1

+VGA_CORE

11.57A NEAR BALL

0.1U_0402_16V4Z

1

C148

PM@

2

0.1U_0402_16V4Z

1

C165

PM@

2

0.47U_0402_6.3V6K

1

2

12~16mil

C777

PM@

0.1U_0402_16V4Z

1

C146

PM@

2

1

C147

PM@

2

0.1U_0402_16V4Z

1

C186

PM@

2

0.47U_0402_6.3V6K

4

1

2

+IFPAB_IOVDD +IFPC_IOVDD

+IFPAB_PLLVDD

R10910K_0402_5%

R18110K_0402_5%

+PEX_PLLVDD

NEAR BALL

0.1U_0402_16V4Z

220U_D2_4VM

PM@

C680

220U_D2_4VM

D D

C C

110mA

+1.8VS

B B

+1.8VS

+1.1VS

A A

L32

MBK1608121YZF_0603

1 2

PM@

NEAR BGA

110mA

4.7U 6.3V K X5R 0603

L15

MBK1608121YZF_0603

1 2

NEAR BGA NEAR BALL 260mA

PM@

4.7U 6.3V K X5R 0603

MBK1608121YZF_0603

1 2

PM@

L9

MBK1608121YZF_0603

PM@

1 2

NEAR BGA

1

2

1

2

L13

4.7U 6.3V K X5R 0603

4700P_0402_25V7K

C634

PM@

4700P_0402_25V7K

C309

PM@

1

C231

PM@

2

1

C115

PM@

2

5

0.1U_0402_16V4Z

1

+

C182

PM@

2

0.1U_0402_16V4Z

0.47U_0402_6.3V6K

1

C144

PM@

2

0.47U_0402_6.3V6K

+3VS

2

C93

PM@

1

4700P_0402_25V7K

1

C776

C633

PM@

2

470P_0402_50V8J

1

C302

PM@

2

4700P_0402_25V7K

1

2

4700P_0402_25V7K

1

2

C135

PM@

C153

PM@

1U_0603_10V4Z

NEAR BALL

+IFPAB_PLLVDD

C778

PM@

C173

PM@

C112

PM@

470P_0402_50V7K

0.1U_0402_16V4Z

1

2

1

2

0.47U_0402_6.3V6K

1

2

4.7U 6.3V K X5R 0603

0.1U_0402_16V4Z

470P_0402_50V8J

C141

PM@

0.47U_0402_6.3V6K

1

C166

C160

PM@

2

4.7U 6.3V K X5R 0603

1

C133

C169

PM@

2

1

C105

PM@

2

470P_0402_50V8J

1

C632

PM@

2

1

C779

PM@

2

+IFPC_IOVDD

1

C117

PM@

2

NEAR BALL

NEAR BGA

NEAR BALLNEAR BGA

C120

PM@

0.1U_0402_16V4Z

1

2

+IFPC_PLLVDD

PM@

12

PM@

12

U27D

J9

VDD

J10

VDD

J12

VDD

J13

VDD

L9

VDD

M9

VDD

M11

VDD

M17

VDD

N9

VDD

N11

VDD

N12

VDD

N13

VDD

N14

VDD

N15

VDD

N16

VDD

N17

VDD

N19

VDD

P11

VDD

P12

VDD

P13

VDD

P14

VDD

P15

VDD

P16

VDD

P17

VDD

R9

VDD

R11

VDD

R12

VDD

R13

VDD

R14

VDD

R15

VDD

R16

VDD

R17

VDD

T9

VDD

T11

VDD

T17

VDD

U9

VDD

U19

VDD

W9

VDD

W10

VDD

W12

VDD

W13

VDD

W18

VDD

W19

VDD

A12

VDD33

B12

VDD33

C12

VDD33

D12

VDD33

E12

VDD33

F12

VDD33

V3

IFPA_IOVDO

V2

IFPB_IOVDD

J6

IFPC_IOVDD

H6

IFPE_IOVDD

AD5

IFPAB_PLLVDD

P6

IFPC_PLLVDD

N6

IFPE_PLLVDD

NB9M-GS_BGA533

PM@

0.1U_0402_16V4Z

1

C657

PM@

2

0.01U_0402_16V7K

Part 4 of 5

POWER

FB_CAL_PD_VDDQ

1

C660

PM@

2

A13

FBVDDQ

B13

FBVDDQ

C13

FBVDDQ

D13

FBVDDQ

D14

FBVDDQ

E13

FBVDDQ

F13

FBVDDQ

F14

FBVDDQ

F15

FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ

PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ

PEX_IOVDD PEX_IOVDD PEX_IOVDD PEX_IOVDD PEX_IOVDD PEX_IOVDD

PEX_PLLVDD

VID_PLLVDD

SP_PLLVDD

PLLVDD

FB_PLLAVDD

FB_DLLAVDD

DACA_VDD DACB_VDD DACC_VDD

4.7U 6.3V K X5R 0603

F16 F17 F19 F22 H23 H26 J15 J16 J18 J19 L19 L23 L26 M19 N22 U22 Y22

AG6 AF6 AE6 AD6 AC13 AC7 AB17 AB16 AB13 AB9 AB8 AB7 AG7 AF7 AE7 AD8 AD7 AC9

AF9 K6 L6 K5

R19 T19 AG2

D7 W5

B15

10U_0603_6.3V6M

1

C788

PM@

2

+PEX_PLLVDD

12~16mil

+FB_PLLAVDD +FB_DLLAVDD +DACA_VDD

+DACB_VDD +DACC_VDD+IFPC_PLLVDD

PM@

1 2

C671

PM@

4700P_0402_25V7K

MBK1608121YZF_0603

NEAR BGA

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

0.022U_0402_16V7K

1

C128

PM@

2

0.022U_0402_16V7K

C134

PM@

1

2

1

C125

PM@

2

0.1U_0402_16V4Z

1

C124

PM@

2

4.7U 6.3V K X5R 0603

PLACE BELOW GPU

4700P_0402_25V7K

1

C111

PM@

2

1

C140

PM@

2

PM@

0.1U_0402_16V4Z

PM@

1 2

R101 10K_0402_5%

1 2

R130 10K_0402_5%PM@R130 10K_0402_5%PM@ R93

R93

30_0402_1%

L38

1 2

PM@

2007/10/15 2008/10/15

4700P_0402_25V7K

1

C108

PM@

2

4700P_0402_25V7K

0.022U_0402_16V7K

1

C139

PM@

2

4700P_0402_25V7K

0.1U_0402_16V4Z

1

C212

PM@

2

1U_0402_6.3V4Z

1

C200

PM@

2

0.1U_0402_16V4Z

1

C132

PM@

2

0.1U_0402_16V4Z

+1.8VS

+1.1VS

C127

PM@

C119

PM@

1

C203

2

1

C123

PM@

2

Compal Secret Data

1

C109

PM@

2

0.022U_0402_16V7K

1

2

0.47U_0402_6.3V6K

1

C138

PM@

2

1U_0402_6.3V6K

Deciphered Date

1

2

1

C202

PM@

2

0.47U_0402_6.3V6K

NEAR BALL

1U_0402_6.3V6K

1

C145

PM@

2

+FB_PLLAVDD

+FB_DLLAVDD

4.7U 6.3V K X5R 0603

4.7U 6.3V K X5R 0603 C131

C131

PM@

1

2

1

C107

@

2

FBAVDDQ=1.72A

1U_0603_10V4Z

1

C142

C118

PM@

2

0.1U_0402_16V4Z

PM@

1U_0402_6.3V6K

1U_0603_10V4Z

1

C106

C97

PM@

2

1

C201

2

1

C262

PM@

2

4.7U 6.3V K X5R 0603

MBK1608121YZF_0603

L10

1

NEAR BALL

C122

PM@

2

1

C154

PM@

2

0.01U_0402_16V7K

1

C189

PM@

2

0.01U_0402_16V7K

150mA

2

PLACE NEAR BGA

+1.8VS

1

2

+1.8VS

1

2

PEX_IOVDDQ=1.6A PEX_IOVDD=500mA PEX_PLLVDD=100mA

10U_0805_10V4Z

1

C270

PM@

2

PLLVDD=65mA

PM@L10

PM@

C295

PM@

10U_0805_10V4Z

+1.1VS

12

SP_PLLVDD=25mA VID_PLLVDD=50mA

0.1U_0402_16V4Z

1

C172

PM@

2

0.1U_0402_16V4Z

1

C190

PM@

2

+DACA_VDD

4.7U 6.3V K X5R 0603

470P_0402_50V7K

Title

Size Document Number Rev

Custom

Date: Sheet of

Date: Sheet

MBK1608121YZF_0603

1

C174

PM@

2

MBK1608121YZF_0603

1

C205

PM@

2

4700P_0402_25V7K

1

C652

PM@

2

Compal Electronics, Inc.

+1.1VS

1

2

L11

1 2

PM@

L14

1 2

PM@

MBK1608121YZF_0603

4.7U 6.3V K X5R 0603

1

C651

PM@

2

NB9M-GS Power

JIWA3/A4_LA4212P

1

+1.1VS

L37

+3VS

PM@

1

C664

PM@

2

12

1.0

of

18 53Monday, May 12, 2008

5

hexainf@hotmail.com gratuito - free of charge.

4

3

2

1

A total of 8 signals are required for GB1 strapping this includes

2 reference signals 6 physical strapping pins

U27E

B2

GND

Part 5 of 5

B5

GND

B8

GND

B11

GND

B14

GND

B17

D D

C C

GND

B20

GND

B23

GND

B26

GND

E2

GND

E5

GND

E8

GND

E11

GND

E14

GND

E17

GND

E20

GND

E23

GND

E26

GND

H2

GND

H5

GND

J11

GND

J14

GND

J17

GND

K9

GND

K19

GND

L2

GND

L5

GND

L11

GND

L12

GND

L13

GND

L14

GND

L15

GND

L16

GND

L17

GND

M12

GND

M13

GND

M14

GND

M15

GND

M16

GND

P2

GND

P5

GND

P9

GND

P19

GND

P23

GND

P26

GND

T12

GND

T13

GND

NB9M-GS_BGA533

PM@

FB_CAL_PU_GND

FB_CAL_TERM_GND

GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND

GND

GND GND GND GND GND GND GND GND GND GND GND GND

GND_SENSE

U2 U5 U11 U12 U13 U14 U15 U16 U17 U23 U26 V9 V19 W11 W14 W17 Y2 Y5 Y23 Y26 AC2 AC5 AC6 AC8 AC11 AC14 AC17 AC20 AC23 AC26 AF2 AF5 AF8 AF11 AF14 AF17 AF20 AF23 AF26 T16 T15 T14

W16

R97 30_0402_1%PM@R97 30_0402_1%PM@

A15

R96 40.2_0402_1%

B16

R700

1 2

0_0402_5%PM@

1 2 1 2

@

4 logical strapping bits

A total of 24 logical strapping bits are available

+3VS

12

X76@

STRAP2<17> STRAP1<17> STRAP0<17> ROM_SCLK<17>

ROM_SI<17>

ROM_SO<17>

STRAP2 STRAP1 STRAP0 ROM_SCLK ROM_SI ROM_SO

12

R62

10K_0402_1%

R59

@

10K_0402_5%

12

R60

@

R57

PM@

10K_0402_1%

10K_0402_5%

GB1 Family GPU Strap Qptions

GPU

NB9M-GS (0x06E9)

Samsung

Hynix

Qimonda

FB Memory

32Mx16(5)

32Mx16(7)

32Mx16(6)

ROM_SO ROM_SCLK ROM_SI STRAP2 STRAP1 STRAP0

PU 5K

PU 5K PU 10KPD 15K64Mx16 PD 10K PU 45KPD 10K

PU 5K

12

R485

45.3K_0402_1%~D

12

R481

@

PD 15K

PM@

10K_0402_5%

12

R61

@

10K_0402_5%

R58

PM@

15K_0402_1%

PD 30K

PD 45K

PD 35K

12

R54

@

2K_0402_5%

R51

X76@

20K_0402_1%

12

@

PU 10K

PU 10KPD 15K PD 10K PU 45KPD 5K64Mx16 PU 5K

PU 10K

R53

PM@

R50

2K_0402_5%

4.99K_0402_1%

PD 10K

PU 45K

B B

Component

DDR2 VRAM (32M*16)

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Manufacturer Compal PN

Hynix Qimonda Samsung

2007/10/15 2008/10/15

3

SA00000FF30 SA00000S820 SA00001VX10

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

B

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

NB9M-GE GND & STRAP

JIWA3/A4_LA4212P

19 53Monday, May 12, 2008

of

1

of

1.0

5

hexainf@hotmail.com gratuito - free of charge.

FBA_BA0 FBA_BA1

FBAA12 FBAA11 FBAA10 FBAA9 FBAA8 FBAA7 FBAA6 FBAA5 FBAA4 FBAA3

D D

+1.8VS

12

R480

+VRAM_VREFA +VRAM_VREFA

C C

R479

1K_0402_1%

PM@

R480

1K_0402_1%

PM@

12

1

C613

0.047U_0402_16V4Z

PM@

2

Close to U6 Close to U4

FBABA2<17,21> FBABA2<17,21>

FBAA2 FBAA1 FBAA0

FBACLK0# FBACLK0

FBA_CKE

FBACS0# FBAWE# FBARAS# FBACAS# FBADQM#1

FBADQM#0

FBAODT0

FBADQS1 FBADQS#1

FBADQS0 FBADQS#0

(SSTL-1.8) VREF = .5*VDDQ

FBABA2 FBABA2

U6

L2

BA0

L3

BA1

R2

A12

P7

A11

M2

A10/AP

P3

A9

P8

A8

P2

A7

N7

A6

N3

A5

N8

A4

N2

A3

M7

A2

M3

A1

M8

A0

K8

CK

J8

CK

K2

CKE

L8

CS

K3

WE

K7

RAS

L7

CAS

F3

LDM

B3

UDM

K9

ODT

F7

LDQS

E8

LDQS

B7

UDQS

A8

UDQS

J2

VREF

A2

NC#A2

E2

NC#E2

L1

NC#L1

R3

NC#R3

R7

NC#R7

R8

NC#R8

HY5PS561621F-25X76@U6HY5PS561621F-25X76@

DQ15 DQ14 DQ13 DQ12 DQ11 DQ10

DQ9 DQ8 DQ7 DQ6 DQ5 DQ4 DQ3 DQ2 DQ1 DQ0

VDDQ1 VDDQ2 VDDQ3 VDDQ4 VDDQ5 VDDQ6 VDDQ7 VDDQ8 VDDQ9

VDDQ10

VDD1 VDD2 VDD3 VDD4 VDD5

VDDL

VSSDL

VSSQ1 VSSQ2 VSSQ3 VSSQ4 VSSQ5 VSSQ6 VSSQ7 VSSQ8 VSSQ9

VSSQ10

VSS1 VSS2 VSS3 VSS4 VSS5

DDR2 BGA MEMORY

+1.8VS

0.1U_0402_16V4Z

0.01U_0402_16V7K

1

C621

PM@

2

1000P_0402_50V7K

B B

1000P_0402_50V7K

1

C624

C622

PM@

2

0.01U_0402_16V7K

0.1U_0402_16V4Z

1

C626

PM@

2

1U_0402_6.3V4Z

0.1U_0402_16V4Z

1

C625

PM@

2

1

C619

PM@

2

0.1U_0402_16V4Z

4

FBAD7

B9

FBAD3

B1

FBAD4

D9

FBAD0

D1

FBAD1

D3

FBAD6

D7

FBAD2

C2

FBAD5

C8

FBAD10

F9

FBAD15

F1

FBAD8

H9

FBAD13

H1

FBAD12

H3

FBAD9

H7

FBAD14

G2

FBAD11

G8

A9 C1 C3 C7 C9 E9 G1 G3 G7 G9

A1 E1 J9 M9 R1

J1 J7

A7 B2 B8 D2 D8 E7 F2 F8 H2 H8

A3 E3 J3 N1 P9

1

C620

PM@

2

+1.8VS +1.8VS

1

+

C184

PM@

C184

PM@

220U_D2_4VM_R15

2

1

C630

0.1U_0402_16V4Z

PM@

2

1

C615

PM@

2

0.01U_0402_16V7K

1

C617

C617 1U_0402_6.3V4Z

1U_0402_6.3V4Z

PM@

2

(SSTL-1.8) VREF = .5*VDDQ

1

C91

0.047U_0402_16V4Z

PM@

2

+1.8VS

0.01U_0402_16V7K

1

C110

PM@

2

1000P_0402_50V7K

FBA_BA0 FBA_BA1

FBAA12 FBAA11 FBAA10 FBAA9 FBAA8 FBAA7 FBAA6 FBAA5 FBAA4 FBAA3 FBAA2 FBAA1 FBAA0

FBACLK0# FBACLK0

FBA_CKE

FBACS0# FBAWE# FBARAS# FBACAS# FBADQM#2

FBADQM#3

FBAODT0

FBADQS2 FBADQS#2

FBADQS3

1

C113

PM@

2

0.01U_0402_16V7K

3

0.1U_0402_16V4Z

1

C130

PM@

2

L2 L3

R2 P7 M2 P3 P8 P2 N7 N3 N8 N2 M7 M3 M8

K8

J8

K2

L8 K3 K7

L7 F3

B3

K9

F7 E8

B7 A8

J2 A2

E2

L1 R3 R7 R8

1

2

U28

BA0 BA1

A12 A11 A10/AP A9 A8 A7 A6 A5 A4 A3 A2 A1 A0

CK CK

CKE

CS WE RAS CAS LDM

UDM

ODT

LDQS LDQS

UDQS UDQS

VREF NC#A2

NC#E2 NC#L1 NC#R3 NC#R7 NC#R8

HY5PS561621F-25X76@

DQ15 DQ14 DQ13 DQ12 DQ11 DQ10

DQ9 DQ8 DQ7 DQ6 DQ5 DQ4 DQ3 DQ2 DQ1 DQ0

VDDQ1 VDDQ2 VDDQ3 VDDQ4 VDDQ5 VDDQ6 VDDQ7 VDDQ8 VDDQ9

VDDQ10

VDD1 VDD2 VDD3 VDD4 VDD5

VDDL

VSSDL

VSSQ1 VSSQ2 VSSQ3 VSSQ4 VSSQ5 VSSQ6 VSSQ7 VSSQ8 VSSQ9

VSSQ10

VSS1 VSS2 VSS3 VSS4 VSS5

DDR2 BGA MEMORY

0.1U_0402_16V4Z

1

C103

C137

PM@

1U_0402_6.3V4Z

C103

C143

PM@

2

0.1U_0402_16V4Z

2

FBAD25

B9

FBAD29

B1

FBAD24

D9

FBAD31

D1

FBAD28

D3

FBAD27

D7

FBAD30

C2

FBAD26

C8

FBAD18

F9

FBAD23

F1

FBAD17

H9

FBAD21

H1

FBAD19

H3

FBAD16

H7

FBAD22

G2

FBAD20

G8

A9 C1 C3 C7 C9 E9 G1 G3 G7 G9

A1 E1 J9 M9 R1

J1 J7

1

C92

0.1U_0402_16V4Z

PM@

2

A7 B2 B8 D2 D8 E7 F2 F8 H2 H8

A3 E3 J3 N1 P9

1

C158

C100

PM@

2

0.01U_0402_16V7K

1

C98

C98 1U_0402_6.3V4Z

1U_0402_6.3V4Z

PM@

2

FBACLK0<17>

FBACLK0#<17>

FBBA[2..5]<17,21>

FBAD[0..63]<17,21>

FBAA[0..12]<17,21>

FBADQS[0..7]<17,21>

FBADQS#[0..7]<17,21>

FBADQM#[0..7]<17,21>

FBA_BA0<17,21>

FBA_BA1<17,21> FBAODT0<17,21> FBA_CKE<17,21> FBARAS#<17,21> FBACAS#<17,21> FBAWE#<17,21> FBACS0#<17,21>

Close to U5

12

R104

R104 475_0402_1%

475_0402_1%

PM@

FBBA[2..5]

FBAD[0..63]

FBAA[0..12]

FBADQS[0..7]

FBADQS#[0..7]

FBADQM#[0..7]

FBA_BA0 FBA_BA1

FBAODT0

FBA_CKE FBARAS# FBACAS#

FBAWE#

FBACS0#FBADQS#3

FBACLK0

FBACLK0#

1

A A

Security Classification

5

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2007/10/15 2008/10/15

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

VRAM DDRA

JIWA3/A4_LA4212P

20 53Monday, May 12, 2008

of

1

of

1.0

5

hexainf@hotmail.com gratuito - free of charge.

FBA_BA0 FBA_BA1

FBAA12 FBAA11 FBAA10 FBAA9 FBAA8 FBAA7 FBAA6 FBBA5 FBBA4 FBBA3

D D

+1.8VS

12

R184

+VRAM_VREFB

C C

R190

1K_0402_1%

PM@

R184

1K_0402_1%

PM@

12

1

C319

0.047U_0402_16V4Z

PM@

2

Close to U3 Close to U7

FBABA2<17,20> FBABA2<17,20>

FBBA2 FBAA1 FBAA0

FBACLK1# FBACLK1

FBA_CKE

FBACS0# FBAWE# FBARAS# FBACAS# FBADQM#7

FBADQM#5

FBAODT0

FBADQS7 FBADQS#7

FBADQS5 FBADQS#5

(SSTL-1.8) VREF = .5*VDDQ

FBABA2 FBABA2

U29

L2

BA0

L3

BA1

R2

A12

P7

A11

M2

A10/AP

P3

A9

P8

A8

P2

A7

N7

A6

N3

A5

N8

A4

N2

A3

M7

A2

M3

A1

M8

A0

K8

CK

J8

CK

K2

CKE

L8

CS

K3

WE

K7

RAS

L7

CAS

F3

LDM

B3

UDM

K9

ODT

F7

LDQS

E8

LDQS

B7

UDQS

A8

UDQS

J2

VREF

A2

NC#A2

E2

NC#E2

L1

NC#L1

R3

NC#R3

R7

NC#R7

R8

NC#R8

HY5PS561621F-25X76@

DQ15 DQ14 DQ13 DQ12 DQ11 DQ10

DQ9 DQ8 DQ7 DQ6 DQ5 DQ4 DQ3 DQ2 DQ1 DQ0

VDDQ1 VDDQ2 VDDQ3 VDDQ4 VDDQ5 VDDQ6 VDDQ7 VDDQ8 VDDQ9

VDDQ10

VDD1 VDD2 VDD3 VDD4 VDD5

VDDL

VSSDL

VSSQ1 VSSQ2 VSSQ3 VSSQ4 VSSQ5 VSSQ6 VSSQ7 VSSQ8 VSSQ9

VSSQ10

VSS1 VSS2 VSS3 VSS4 VSS5

DDR2 BGA MEMORY

+1.8VS

0.01U_0402_16V7K

1

C272

PM@

2

B B

1000P_0402_50V7K

2

1

C225

C234

PM@

2

0.01U_0402_16V7K

0.1U_0402_16V4Z

1

C304

PM@

2

1U_0402_6.3V4Z

0.1U_0402_16V4Z

1

C269

PM@

2

1

C263

PM@

2

0.1U_0402_16V4Z

4

FBAD40

B9

FBAD45

B1

FBAD41

D9

FBAD46

D1

FBAD47

D3

FBAD43

D7

FBAD44

C2

FBAD42

C8

FBAD61

F9

FBAD62

F1

FBAD58

H9

FBAD56

H1

FBAD59

H3

FBAD57

H7

FBAD63

G2

FBAD60

G8

A9 C1 C3 C7 C9 E9 G1 G3 G7 G9

A1 E1 J9 M9 R1

J1 J7

1

C305

0.1U_0402_16V4Z

PM@

2

A7 B2 B8 D2 D8 E7 F2 F8 H2 H8

A3 E3 J3 N1 P9

1

C224

C224 1U_0402_6.3V4Z

1U_0402_6.3V4Z

PM@

2

+VRAM_VREFB

1

2

(SSTL-1.8) VREF = .5*VDDQ

C672

0.047U_0402_16V4Z

PM@

FBA_BA0 FBA_BA1

FBAA12 FBAA11 FBAA10 FBAA9 FBAA8 FBAA7 FBAA6 FBBA5 FBBA4 FBBA3 FBBA2 FBAA1 FBAA0

FBACLK1# FBACLK1

FBA_CKE

FBACS0# FBAWE# FBARAS# FBACAS# FBADQM#6

FBADQM#4

FBAODT0

FBADQS6 FBADQS#6

FBADQS4 FBADQS#4

3

U7

L2

BA0

L3

BA1

R2

A12

P7

A11

M2

A10/AP

P3

A9

P8

A8

P2

A7

N7

A6

N3

A5

N8

A4

N2

A3

M7

A2

M3

A1

M8

A0

K8

CK

J8

CK

K2

CKE

L8

CS

K3

WE

K7

RAS

L7

CAS

F3

LDM

B3

UDM

K9

ODT

F7

LDQS

E8

LDQS

B7

UDQS

A8

UDQS

J2

VREF

A2

NC#A2

E2

NC#E2

L1

NC#L1

R3

NC#R3

R7

NC#R7

R8

NC#R8

HY5PS561621F-25X76@U7HY5PS561621F-25X76@

DQ15 DQ14 DQ13 DQ12 DQ11 DQ10

DQ9 DQ8 DQ7 DQ6 DQ5 DQ4 DQ3 DQ2 DQ1 DQ0

VDDQ1 VDDQ2 VDDQ3 VDDQ4 VDDQ5 VDDQ6 VDDQ7 VDDQ8 VDDQ9

VDDQ10

VDD1 VDD2 VDD3 VDD4 VDD5

VDDL

VSSDL

VSSQ1 VSSQ2 VSSQ3 VSSQ4 VSSQ5 VSSQ6 VSSQ7 VSSQ8 VSSQ9

VSSQ10

VSS1 VSS2 VSS3 VSS4 VSS5

FBAD39

B9

FBAD34

B1

FBAD38

D9

FBAD35

D1

FBAD32

D3

FBAD36

D7

FBAD33

C2

FBAD37

C8

FBAD55

F9

FBAD51

F1

FBAD52

H9

FBAD50

H1

FBAD49

H3

FBAD54

H7

FBAD48

G2

FBAD53

G8

A9 C1 C3 C7 C9 E9 G1 G3 G7 G9

A1 E1 J9 M9 R1

J1 J7

1

C654

0.1U_0402_16V4Z

PM@

2

A7 B2 B8 D2 D8 E7 F2 F8 H2 H8

A3 E3 J3 N1 P9

2

FBAD[0..63]<17,20>

FBAA[0..12]<17,20>

FBBA[2..5]<17>

FBADQS[0..7]<17,20>

+1.8VS+1.8VS

1

C655

C655 1U_0402_6.3V4Z

1U_0402_6.3V4Z

PM@

2

FBADQS#[0..7]<17,20>

FBADQM#[0..7]<17,20>

FBA_BA0<17,20> FBA_BA1<17,20>

FBAODT0<17,20> FBA_CKE<17,20> FBARAS#<17,20> FBACAS#<17,20> FBAWE#<17,20> FBACS0#<17,20>

1

FBAD[0..63]

FBAA[0..12]

FBBA[2..5]

FBADQS[0..7]

FBADQS#[0..7]

FBADQM#[0..7]

FBA_BA0

FBA_BA1 FBAODT0 FBA_CKE

FBARAS# FBACAS#

FBAWE#

FBACS0#

DDR2 BGA MEMORY

1

2

C239

PM@

1

C233

PM@

2

0.01U_0402_16V7K

+1.8VS

0.01U_0402_16V7K

1

C668

PM@

2

1000P_0402_50V7K

1

C666

PM@

2

0.01U_0402_16V7K

0.1U_0402_16V4Z

1

C665

PM@

2

1

C659

PM@

2

1U_0402_6.3V4Z

0.1U_0402_16V4Z

1

C656

PM@

2

1

C647

PM@

2

0.1U_0402_16V4Z

1

2

C642

PM@

1

C667

PM@

2

0.01U_0402_16V7K

FBACLK1<17>

12

R154

R154 475_0402_1%

475_0402_1%

PM@

FBACLK1#<17>

Close to U7

FBACLK1

FBACLK1#

A A

Security Classification

5

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2007/10/15 2008/10/15

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

VRAM DDRB

JIWA3/A4_LA4212P

21 53Monday, May 12, 2008

of

1

of

1.0

5

hexainf@hotmail.com gratuito - free of charge.

PCI

SRC

CPU

CLKSEL1

0

FSA

CLKSEL0

MHz

266

MHz

1000

MHz

33.30

14.318 96.0 48.0

DOT_96 MHz

USB MHz

FSC FSB REF

CLKSEL2

0 1000 133 33.31 14.318 96.0 48.0

0 1001 200 33.30 14.318 96.0 48.0

0 1001 166 33.31 14.318 96.0 48.0

D D

1 1000 333 33.30 14.318 96.0 48.0

1 1000 100 33.31 14.318 96.0 48.0

1 1001 400 33.30 14.318 96.0 48.0

111

Reserved

4

+3VM_CK505

1 2

+3VS

+1.5VS

+VCCP

R364 0_0805_5%R364 0_0805_5%

1 2

R306 0_0805_5%

1 2

R389 0_0805_5%R389 0_0805_5%

1

C419

C419 10U_0805_10V4Z

10U_0805_10V4Z

2

@

+1.5VM_CK505

1

C421

C421 10U_0805_10V4Z

10U_0805_10V4Z

2

1

C422

0.1U_0402_16V4Z

2

1

C423

0.1U_0402_16V4Z

2

3

C472

0.1U_0402_16V4Z

1

C438

0.1U_0402_16V4Z

2

1

2

1

C420

0.1U_0402_16V4Z

2

1

2

C425

0.1U_0402_16V4Z

1

C457

0.1U_0402_16V4Z

2

1

C463

0.1U_0402_16V4Z

2

1

C474

0.1U_0402_16V4Z

2

1

C471

0.1U_0402_16V4Z

2

1

+3VS

1

C473

0.1U_0402_16V4Z

2

1

C444

0.1U_0402_16V4Z

2

ICH_SMBDATA<28,32,40>

ICH_SMBCLK<28,32,40>

2N7002DW-T/R7_SOT363-6

+3VS

2N7002DW-T/R7_SOT363-6

2.2K_0402_5%

Q27A

6 1

2 5

3

Q27B

R278

4

R263

2.2K_0402_5%

CLK_SMBDATA

CLK_SMBCLK

SA000020K00 (Silego : SLG8SP556VTR ) SA000020H00 (ICS : ICS9LPRS387AKLFT)

+3VM_CK505

C C

FSA

CPU_BSEL0<6>

CPU_BSEL1<6>

B B

A A

FSC

CPU_BSEL2<6>

+VCCP

R261

R267

2.2K_0402_5%

1 2

R257

R257 0_0402_5%

0_0402_5%

1 2

R367

R367 0_0402_5%

0_0402_5%

R311

R311 10K_0402_5%

10K_0402_5%

1 2

R296

R296 0_0402_5%

0_0402_5%

14.31818MHZ_16PF_DSX840GA

R261 56_0402_5%

56_0402_5%

@

1 2

12

1 2

R262

R262 1K_0402_5%

FSB

1K_0402_5%

12

R268

R268 1K_0402_5%

1K_0402_5%

@

+VCCP

R376

R376 1K_0402_5%

1K_0402_5%

@

1 2

R366

R366 1K_0402_5%

1K_0402_5%

12

R375

R375 0_0402_5%

0_0402_5%

@

+VCCP

R312

R312 1K_0402_5%

1K_0402_5%

@

1 2

12

1 2

R303

R303 1K_0402_5%

1K_0402_5%

12

R302

R302 0_0402_5%

0_0402_5%

@

C464 22P_0402_50V8JC464 22P_0402_50V8J

C476 22P_0402_50V8JC476 22P_0402_50V8J

12

Y2

Routing the trace at least 10mil

MCH_CLKSEL0 <8>

CLK_48M_ICH<28>

CLK_14M_ICH<28> CLK_14M_SIO<37>

CK_PWRGD<28>

MCH_CLKSEL1 <8>

MCH_CLKSEL2 <8>

H_STP_CPU#<28>

H_STP_PCI#<28>

CLK_PCI_DB<37>

CLK_PCI_LPC<35> CLK_PCI_ICH<26>

For ITP_EN, 0 =SRC8/SRC8#; 1 = ITP/ITP#

For PCI4_SEL, 0 = Pin24/25 : DOT96 / DOT96# Pin28/29 : LCDCLK / LCDCLK#

CLK_XTAL_IN

CLK_XTAL_OUT

1 = Pin24/25 : SRC_0 / SRC_0# Pin28/29 : 27M/27M_SS

R285

R285 10K_0402_5%

10K_0402_5%

@

1 2

ITP_EN PCI4_SEL PCI2_TME

R275

R275 10K_0402_5%

10K_0402_5%

1 2

+3VS+3VS +3VS

R287

R287 10K_0402_5%

10K_0402_5%

PM@

1 2

R277

R277 10K_0402_5%

10K_0402_5%

GM@

1 2

+1.5VM_CK505

1 2

1 2 1 2

1 2

1 2 1 2

R286

R286 10K_0402_5%

10K_0402_5%

1 2

R276

R276 10K_0402_5%

10K_0402_5%

@

1 2

R27033_0402_5%

R31633_0402_5%

R31033_0402_5%

@

R29033_0402_5% @ R29033_0402_5% @

R28933_0402_5% R28933_0402_5% R28833_0402_5%

R28833_0402_5%

CK_PWRGD

PM_STP_CPU# PM_STP_PCI#

CLK_XTAL_IN CLK_XTAL_OUT

5

4

FSA FSB FSC

PCI2_TME

PCI4_SEL ITP_EN

U14

55

VDD_SRC

6

VDD_REF

12

VDD_PCI

72

VDD_CPU

19

VDD_48

27

VDD_PLL3

66

VDD_CPU_IO

31

VDD_PLL3_IO

62

VDD_SRC_IO

52

VDD_SRC_IO

23

VDD_IO

38

VDD_SRC_IO

20

USB_0/FS_A

2

FS_B/TEST_MODE

7

REF_0/FS_C/TEST_

8

REF_1

1

CKPWRGD/PD#

11

NC

53

CPU_STOP#

54

PCI_STOP#

5

XTAL_IN

4

XTAL_OUT

13

PCI_1

14

PCI_2

15

PCI_3

16

PCI_4/SEL_LCDCL

17

PCIF_5/ITP_EN

18

VSS_PCI

3

VSS_REF

22

VSS_48

26

VSS_IO

69

VSS_CPU

30

VSS_PLL3

34

VSS_SRC

59

VSS_SRC

42

VSS_SRC

73

VSS

SLG8SP556VTR_QFN72_10X10

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

CPU_0#

CPU_1#

SRC_0/DOT_96

SRC_0#/DOT_96#

LCDCLK/27M

LCDCLK#/27M_SS

SRC_2#

SRC_3#

SRC_4#

SRC_6#

SRC_7#

SRC_8/CPU_ITP

SRC_8#/CPU_ITP#

SRC_9#

SRC_10

SRC_10#

SRC_11

SRC_11#

CLKREQ_3# CLKREQ_4# CLKREQ_6# CLKREQ_7#

CLKREQ_9# SLKREQ_10# CLKREQ_11#

USB_1/CLKREQ_A#

2007/10/15 2008/10/15

CPU_0

CPU_1

SRC_2

SRC_3

SRC_4

SRC_6

SRC_7

SRC_9

9

SDA

10

SCL

71 70 68 67

24 25

28 29

32 33

35 36

39 40

57 56

61 60

64 63

44 45

50 51

48 47

37 41 58 65 43 49 46 21

CLK_SMBDATA CLK_SMBCLK

CLK_CPU_BCLK CLK_CPU_BCLK# CLK_MCH_BCLK CLK_MCH_BCLK#

R_CLK_DOT

R251 0_0402_5%GM@R251 0_0402_5%GM@

1 2

R255 0_0402_5%PM@R255 0_0402_5%PM@

1 2

R_CLK_DOT#

R250 0_0402_5%GM@R250 0_0402_5%GM@

1 2

R254 0_0402_5%PM@R254 0_0402_5%PM@

1 2

CLK_MCH_3GPLL CLK_MCH_3GPLL#

CLK_PCIE_EXP CLK_PCIE_EXP#

CLK_PCIE_CARD CLK_PCIE_CARD#

CLK_PCIE_WLAN CLK_PCIE_WLAN#

CLK_PCIE_LAN CLK_PCIE_LAN#

CLK_PCIE_ICH CLK_PCIE_ICH#

CLK_PCIE_SATA CLK_PCIE_SATA#

EXP_CLKREQ#

WLAN_CLKREQ#

CLKREQ_LAN#

SATA_CLKREQ#_R MCH_CLKREQ#_R

Compal Secret Data

Deciphered Date

R307 0_0402_5%R307 0_0402_5%

1 2

R260 0_0402_5%R260 0_0402_5%

1 2

2

CLK_SMBDATA <14,15> CLK_SMBCLK <14,15>

CLK_CPU_BCLK <5> CLK_CPU_BCLK# <5> CLK_MCH_BCLK <8> CLK_MCH_BCLK# <8>

CLK_MCH_DREFCLK <8>

CLK_PCIE_VGA <16>

CLK_MCH_DREFCLK# <8>

CLK_PCIE_VGA# <16> MCH_SSCDREFCLK <8> MCH_SSCDREFCLK# <8>

CLK_MCH_3GPLL <8> CLK_MCH_3GPLL# <8>

CLK_PCIE_EXP <40> CLK_PCIE_EXP# <40>

CLK_PCIE_CARD <36> CLK_PCIE_CARD# <36>

CLK_PCIE_WLAN <32> CLK_PCIE_WLAN# <32>

CLK_PCIE_LAN <33> CLK_PCIE_LAN# <33>

CLK_PCIE_ICH <28> CLK_PCIE_ICH# <28>

CLK_PCIE_SATA <27> CLK_PCIE_SATA# <27>

EXP_CLKREQ# <40>

WLAN_CLKREQ# <32>

CLKREQ_LAN# <33>

SATA_CLKREQ# <28> MCH_CLKREQ# <8>

Title

Size Document Number Rev

Date: Sheet of

Date: Sheet

SRC PORT LIST

DEVICEPORT

SRC0 SRC2 SRC3

MCH_DREFCLK MCH_3GPLL

PCIE_EXP# SRC4 SRC6 SRC7

PCIE_WLAN

PCIE_WLAN1 SRC8 SRC9 SRC10 SRC11

PCIE_LAN

PCIE_ICH

PCIE_SATA

SATA_CLKREQ#_R EXP_CLKREQ# MCH_CLKREQ#_R CLKREQ_LAN# WLAN_CLKREQ#

R315 10K_0402_5%R315 10K_0402_5% R295 10K_0402_5%R295 10K_0402_5% R256 10K_0402_5%R256 10K_0402_5% R304 10K_0402_5%R304 10K_0402_5% R372 10K_0402_5%R372 10K_0402_5%

12 12 12 12 12

REQ PORT LIST

DEVICEPORT

REQ_3# REQ_4# REQ_6# REQ_7# REQ_9# REQ_10# REQ_11# REQ_A#

Compal Electronics, Inc.

Clock generator

JIWA3/A4_LA4212P

PCIE_EXP#

PCIE_WLAN PCIE_WLAN1 PCIE_LAN

PCIE_SATA MCH_3GPLL

1

22 53Monday, May 12, 2008

+3VS

1.0

of

5

hexainf@hotmail.com gratuito - free of charge.

+3VS

1 2 1 2

09/13 change pull high enable

D D

C C

+3VS

1 2 1 2

09/13 change pull low enable

@

R2124.7K_0402_5%

R2124.7K_0402_5% R2110_0402_5%

R2110_0402_5%

@

HDMICLK HDMIDAT

HDMI_GM@

HDMI_DETECT

R2094.7K_0402_5%

R2094.7K_0402_5% R2100_0402_5%

R2100_0402_5%

@

TMDS_B_DATA2<10> TMDS_B_DATA2#<10>

TMDS_B_DATA1<10>

TMDS_B_DATA1#<10>

TMDS_B_DATA0<10>

TMDS_B_DATA0#<10>

TMDS_B_CLK<10> TMDS_B_CLK#<10>

R6974.7K_0402_5%@ R6974.7K_0402_5%@

12

R6964.7K_0402_5%@ R6964.7K_0402_5%@

12

default : pull low

25

28 29

30 32

34 35

48 47

45 44

42 41

39 38

OE#

SCL_SINK SDA_SINK

HPD_SINK DDC_EN

CFG0 CFG1

IN_D4+ IN_D4-

IN_D3+ IN_D3-

IN_D2+ IN_D2-

IN_D1+ IN_D1-

TMDS pull down (500ohm) resistors G9x only

HDMI_CLK+_CONN HDMI_CLK-_CONN HDMI_TX0+_CONN HDMI_TX0-_CONN HDMI_TX1+_CONN HDMI_TX1-_CONN HDMI_TX2+_CONN HDMI_TX2-_CONN

R155 499_0402_1%HDMI_PM@R155 499_0402_1%HDMI_PM@

1 2

R156 499_0402_1%HDMI_PM@R156 499_0402_1%HDMI_PM@

1 2

R150 499_0402_1%HDMI_PM@R150 499_0402_1%HDMI_PM@

1 2

R153 499_0402_1%HDMI_PM@R153 499_0402_1%HDMI_PM@

1 2

R145 499_0402_1%HDMI_PM@R145 499_0402_1%HDMI_PM@

1 2

R149 499_0402_1%HDMI_PM@R149 499_0402_1%HDMI_PM@

1 2

R141 499_0402_1%HDMI_PM@R141 499_0402_1%HDMI_PM@

1 2

R144 499_0402_1%HDMI_PM@R144 499_0402_1%HDMI_PM@

1 2

4

+3VS

C357

default : pull low

R189 499_0402_1%HDMI_GM@R189 499_0402_1%HDMI_GM@

HDP

R665 0_0402_5%

VCC VCC VCC VCC VCC VCC VCC VCC

PC1 PC0

REXT HPD#

SDA SCL

RT_EN#

OUT_D4+

OUT_D4-

OUT_D3+

OUT_D3-

OUT_D2+

OUT_D2-

OUT_D1+

OUT_D1-

GND GND GND GND GND GND GND GND GND GND

PS8101TQFN48G_QFN48_7X7

PAD

HDMI_GM@

U8

2 11 15 21 26 33 40 46

4 3

6 7 8 9

10

13 14

16 17

19 20

22 23

1 5 12 18 24 27 31 36 37 43 49

1

HDMI_GM@

2

0.1U_0402_16V4Z

1 2

HDMI_GM@

1 2

C318

3

1

2

1

C374

HDMI_GM@

2

0.1U_0402_16V4Z

R6954.7K_0402_5%HDMI_GM@ R6954.7K_0402_5%HDMI_GM@

12

R6644.7K_0402_5%@ R6644.7K_0402_5%@

12

1

C335

HDMI_GM@

2

0.1U_0402_16V4Z

+3VS

TMDS_B_HPD# <10>

HDMI_GM@

10U_0805_10V4Z

2.2K_0402_5%

HDMI_GM@

+3VS

R187

R188

2.2K_0402_5%

HDMI_GM@

1 2

9/14 Change from 4.7K to 2.2K base on Design Guide P.274

HDMIDAT_NB <8> HDMICLK_NB <8>

VGA_HDMI_CLK-<17> VGA_HDMI_CLK+<17> VGA_HDMI_TX0-<17> VGA_HDMI_TX0+<17> VGA_HDMI_TX1-<17> VGA_HDMI_TX1+<17> VGA_HDMI_TX2-<17> VGA_HDMI_TX2+<17>

VGA_HDMI_SDA<16>

VGA_HDMI_SCL<16>

2

HDMI_TX2+ HDMI_TX2-

HDMI_TX1+ HDMI_TX1-

HDMI_TX0+ HDMI_TX0-

HDMI_CLK+ HDMI_CLK-

C369 0.1U_0402_10V7KHDMI_PM@C369 0.1U_0402_10V7KHDMI_PM@

1 2

C362 0.1U_0402_10V7KHDMI_PM@C362 0.1U_0402_10V7KHDMI_PM@

1 2

C350 0.1U_0402_10V7KHDMI_PM@C350 0.1U_0402_10V7KHDMI_PM@

1 2

C341 0.1U_0402_10V7KHDMI_PM@C341 0.1U_0402_10V7KHDMI_PM@

1 2

C324 0.1U_0402_10V7KHDMI_PM@C324 0.1U_0402_10V7KHDMI_PM@

1 2

C321 0.1U_0402_10V7KHDMI_PM@C321 0.1U_0402_10V7KHDMI_PM@

1 2

C313 0.1U_0402_10V7KHDMI_PM@C313 0.1U_0402_10V7KHDMI_PM@

1 2

C308 0.1U_0402_10V7KHDMI_PM@C308 0.1U_0402_10V7KHDMI_PM@

1 2

R228 0_0402_5%HDMI_PM@R228 0_0402_5%HDMI_PM@ R227 0_0402_5%HDMI_PM@R227 0_0402_5%HDMI_PM@

12 12

HDMI_CLKHDMI_CLK+ HDMI_TX0HDMI_TX0+ HDMI_TX1HDMI_TX1+ HDMI_TX2HDMI_TX2+

HDMIDAT HDMICLK

1

9/13 Add inverting lavel shift circuit base on Design Guide P.277

NEAR CONNECT

13

D

Q4

1 2

L36

1

HDMI@

HDMI@ 4

4

WCM-2012-900T_4P

1 2

L35

1

HDMI@

HDMI@ 4

4

WCM-2012-900T_4P

1 2

L34

1

HDMI@

HDMI@ 4

4

WCM-2012-900T_4P

1 2

L33

1

HDMI@

HDMI@ 4

4

WCM-2012-900T_4P

1 2

2

G

HDMI_PM@

2

3

2

3

2

3

2

3

2N7002_SOT23

S

R6870_0402_5% @ R6870_0402_5% @

HDMI_CLK+_CONNHDMI_CLK+_CONN

2

HDMI_CLK-_CONN

3

R6880_0402_5% @ R6880_0402_5% @

R6890_0402_5% @ R6890_0402_5% @

HDMI_TX0+_CONN

2

HDMI_TX0-_CONN

3

R6900_0402_5% @ R6900_0402_5% @

R6910_0402_5% @ R6910_0402_5% @

HDMI_TX1+_CONN

2

HDMI_TX1-_CONN

3

R6920_0402_5% @ R6920_0402_5% @

R6930_0402_5% @ R6930_0402_5% @

HDMI_TX2+_CONN

2

HDMI_TX2-_CONN

3

R6940_0402_5% @ R6940_0402_5% @

+5VS

HDMI@

R194

2.2K_0402_5%

L43 MBK1608121YZF_0603HDMI_PM@L43 MBK1608121YZF_0603HDMI_PM@

1 2 1 2

L44 MBK1608121YZF_0603HDMI_PM@L44 MBK1608121YZF_0603HDMI_PM@

12P_0402_50V8J

+5VS

3

C774

HDMI_PM@

2

D4

BAT54S-7-F_SOT23-3

1

C775

HDMI_PM@

2

12P_0402_50V8J

12

R725

R725 0_0805_5%

0_0805_5%

@

HDMI_GM@D4

HDMI_GM@

HDMI_CLK-_CONN HDMI_CLK+_CONN

HDMI_TX0-_CONN HDMI_TX0+_CONN

HDMI_TX1-_CONN HDMI_TX1+_CONN

HDMI_TX2-_CONN HDMI_TX2+_CONN

Size Document Number Rev

Date: Sheet

@

C806

0.1U_0402_16V4Z

Compal Electronics, Inc.

Title

Level shiftter-CH7318

12

21

D2

HDMI@D2

HDMI@

RB411DT146_SOT23-3

+5VS_HDMI

1

C276

0.1U_0402_16V4Z

2

@

JHDMI1

19

HP_DET

18

+5V

17

DDC/CEC_GND

16

SDA

15

SCL

14

Reserved

13

CEC

12

CK-

11

CK_shield

10

CK+

9

D0-

8

D0_shield

7

D0+

6

D1-

5

D1_shield

4

D1+

3

D2-

2

D2_shield

1

D2+

TYCO_16-004-6131

ME@

JIWA3/A4_LA-4212P

1

HDMI@

C792

1800P_0402_50V7K

HDMI@C276

HDMI@

GND GND GND GND

20 21 22 23

of

23 53Thursday, May 22, 2008

of

23 53Thursday, May 22, 2008

of

23 53Thursday, May 22, 2008

1.0

HDMI_DETECT

9/14 Reserve for VGA used;check pin name

HDMI_DETECT_VGA<16>

4

HDMI_DETECT_VGA

@

2 1

D3

D3 RB751V_SOD323

RB751V_SOD323

D25

3

2

BAT54S-7-F_SOT23-3

@

R200

1 2

1K_0402_1%

12

R199

R199 10K_0402_1%

10K_0402_1%

HDMI_PM@

HDMIDAT HDMICLK

1

HDMI_PM@

+5VS+5VS

L16

HDMI_PM@L16

HDMI_PM@

1 2

FBML10160808121LMT_0603

C338

330P_0402_50V7K

D26

3

1

2

BAT54S-7-F_SOT23-3

@

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

R216

HDMI_GM@R216

HDMI_GM@

1 2

0_0402_5%

R215

HDMI_PM@R215

HDMI_PM@

1 2

0_0402_5%

1

2

HDMI_PM@

0_0402_5%

HDMI@

R198

2.2K_0402_5%

HDMIDAT HDMICLK

L43

L44

0_0603_5%

HDMI_GM@

Compal Secret Data

2007/10/15 2008/10/15

Compal Secret Data

Deciphered Date

1 2

2

+3VS

B B

HDMI_CLK+

HDMI_CLK-

HDMI_TX0+

HDMI_TX0-

HDMI_TX1+

HDMI_TX1-

A A

HDMI_TX2+

HDMI_TX2-

5

hexainf@hotmail.com gratuito - free of charge.

4

3

2

1

INVERTER Conn.

INVT_PWM

1

C21

2

For EMI

DAC_BRIG

DISPOFF#

1

C23

C22

2

470P_0402_50V7K

LCD POWER CIRCUIT

JP2

1

2

ACES_87213-0700G

1

ME@

C789

470P_0603_50V8J

2

+3VS

12

R377

4.7K_0402_5%

ENBKL

R368

R368 10K_0402_5%

10K_0402_5%

1 2

2

3

4

5

6

G8

7

G9

+3VS

R21

2.2K_0402_5%

PM@

470P_0402_50V7K

8 9

ENBKL <35>

VGA_LVDS_SDA <16> VGA_LVDS_SCL <16>

470P_0402_50V7K

Q2

2N7002_SOT23

10K_0402_5%

+LCDVDD

12

13

D

S

R1

D D

GM@

R2 0_0402_5%

GM_ENVDD<10>

VGA_ENVDD<16>

C C

1 2

R3 0_0402_5%

1 2

PM@

LCD/PANEL BD. Conn.

JLVDS2

22

GND

21

GND

20

19

18

17

16

15

14

13

12

11

10

B B

10

9 8 7 6 5 4 3 2 1

ME@

ACES_87212-2000L

9 8 7 6 5 4 3 2 1

+5VALW

R4

R4 150_0603_1%

150_0603_1%

G

12

R5

R5 100K_0402_5%

100K_0402_5%

R6 220K_0402_5%R6 220K_0402_5%

1

OUT

IN

GND

3

+LCDVDD_CONN

LVDS_ACLK

LVDS_ACLK#

LVDS_A1 LVDS_A1#

LVDS_A0 LVDS_A0#

LVDS_A2 LVDS_A2#

1 2

Q1

Q1 DTC124EKAT146_SC59-3

DTC124EKAT146_SC59-3

L1

FBMA-L11-201209-221LMA30T_0805

+3VS

C2 0.47U_0402_6.3V6KC2 0.47U_0402_6.3V6K

1

2

12

2

DTC124EK

2

(60 MIL) (60 MIL)

+3VS

G

2

Q3

4.7U_0805_10V4Z

R18

2.2K_0402_5%

GM@

+LCDVDD

LVDS_ACLK <10>

LVDS_ACLK# <10>

LVDS_A1 <10>

LVDS_A1# <10>

LVDS_A0 <10>

LVDS_A0# <10>

LVDS_A2 <10>

LVDS_A2# <10>

W=60mils

S

SI2301BDS-T1-E3_SOT23-3

D

1 3

+LCDVDD

1

C1

2

+3VS

R17

2.2K_0402_5%

GM@

1

C4

4.7U_0805_10V4Z

2

W=60mils

1

C3

0.1U_0402_16V4Z

2

LVDS_SDA <10> LVDS_SCL <10>

B+

L2

FBMA-L11-201209-221LMA30T_0805

12

BKOFF#<35>

GMCH_ENBKL<10> VGA_ENBKL<16>

LCD/PANEL BD. Conn.

JLVDS1

22

GND

21

GND

20

19

18

17

16

15

14

13

12

11

10

9

8

7

6

5

4

3

2

1

ME@

ACES_87212-2000L

INVT_PWM<35> DAC_BRIG<35>

BKOFF# DISPOFF#

+LCDVDD_CONN

VGA_LVDS_SDA VGA_LVDS_SCL VGA_LVDS_ACLK

VGA_LVDS_ACLK#

VGA_LVDS_A1 VGA_LVDS_A1#

VGA_LVDS_A0 VGA_LVDS_A0#

VGA_LVDS_A2 VGA_LVDS_A2#

DISPOFF#

+INVPWR_B+

0.1U_0603_25V7K

D13

21

CH751H-40PT_SOD323-2

R358 0_0402_5%GM@R358 0_0402_5%GM@ R351 0_0402_5%PM@R351 0_0402_5%PM@

+3VS

12 12

2.2K_0402_5%

C18

R22

PM@

VGA_LVDS_ACLK <17>

VGA_LVDS_ACLK# <17>

VGA_LVDS_A1 <17>

VGA_LVDS_A1# <17>

VGA_LVDS_A0 <17>

VGA_LVDS_A0# <17>

VGA_LVDS_A2 <17>

VGA_LVDS_A2# <17>

A A

Security Classification

5

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2007/10/15 2008/10/15

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

B

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

LVDS & DVI Connector

JIWA3/A4_LA4212P

24 53Monday, May 12, 2008

1

1.0

of

A

hexainf@hotmail.com gratuito - free of charge.

B

C

D

E

CRT Connector

Place closed to chipset

VGA_CRT_R<16>

GMCH_CRT_R<10>

1 1

VGA_CRT_G<16>

GMCH_CRT_G<10>

VGA_CRT_B<16>

GMCH_CRT_B<10>

VGA_HSYNC<16>

2 2

3 3

4 4

GMCH_CRT_HSYNC<10>

VGA_DDCDATA<16>

GMCH_CRT_DATA<10>

GMCH_CRT_CLK<10>

VGA_DDCCLK<16>

1 2

R229 0_0402_5%PM@R229 0_0402_5%PM@

1 2

R231 0_0402_5%GM@R231 0_0402_5%GM@

1 2

R221 0_0402_5%PM@R221 0_0402_5%PM@

1 2

R224 0_0402_5%GM@R224 0_0402_5%GM@

1 2

R214 0_0402_5%PM@R214 0_0402_5%PM@

1 2

R218 0_0402_5%GM@R218 0_0402_5%GM@

Place closed to chipset

VGA_VSYNC<16> GMCH_CRT_VSYNC<10>

R230

150_0402_1%

1 2

R241 0_0402_5%PM@R241 0_0402_5%PM@

1 2

R240 0_0402_5%GM@R240 0_0402_5%GM@

R247

2.2K_0402_5%

12

R223

150_0402_1%

1 2

C413 0.1U_0402_16V4Z

1 2

R233 0_0402_5%PM@R233 0_0402_5%PM@

1 2

R235 0_0402_5%GM@R235 0_0402_5%GM@

+3VS

12

2.2K_0402_5%

2.2K_0402_5% R269

R269

R2520_0402_5% PM@ R2520_0402_5% PM@

R6430_0402_5% GM@ R6430_0402_5% GM@

R6440_0402_5% GM@ R6440_0402_5% GM@

R2640_0402_5% PM@ R2640_0402_5% PM@

12

R219

150_0402_1%

+CRT_VCC

5

P

A2Y

G

SN74AHCT1G125DCKR_SC70-5

3

1 2

C410 0.1U_0402_16V4Z

+3VS

R266

2.2K_0402_5%

5

4

2

Q23B

Q23B 2N7002DW-T/R7_SOT363-6

2N7002DW-T/R7_SOT363-6

61

Q23A

Q23A 2N7002DW-T/R7_SOT363-6

2N7002DW-T/R7_SOT363-6

100P_0402_50V8J

1

OE#

3

U11

4

+CRT_VCC

5

P

A2Y

G

SN74AHCT1G125DCKR_SC70-5

3

+CRT_VCC

2.2K2.2K

12

R253

2.2K_0402_5%

C414

@

10P_0402_50V8J

12

R239 1K_0402_5%

CRT_HSYNC_1

1

U10

4

OE#

1

2

CRT_VSYNC_1

1

C417

@

2

68P_0402_50V8K

CRT_DDC_DAT

CRT_DDC_CLK

CRT_R_1

CRT_G_1

CRT_B_1

1

C391

C406

10P_0402_50V8J

2

+5VS +5VS +5VS

D27

3

2

BAT54S-7-F_SOT23-3

@

1 2

L20 FCM1608C-121T_0603

<BOM Structure> 1 2

L19 FCM1608C-121T_0603

1 2

L18 FCM1608C-121T_0603

1

C385

10P_0402_50V8J

2

1 2

L22 FCM1608C-121T_0603

1 2

L21 FCM1608C-121T_0603

1

10P_0402_50V8J

@C412

@

10P_0402_50V8J

C412

C405

3

2

1

C390

10P_0402_50V8J

2

1

C408

@C408

@

10P_0402_50V8J

2

D28

1

BAT54S-7-F_SOT23-3

@

1

2

GREEN REDBLUE

1

2

JVGA_HS

JVGA_VS

RED

GREEN

BLUE

C384

10P_0402_50V8J

D29

3

1

2

BAT54S-7-F_SOT23-3

@

+5VS

D18

2 1

RB491D_SC59-3

W=40mils

RED CRT_DDC_DAT

GREEN JVGA_HS

BLUE JVGA_VS

CRT_DDC_CLK

+CRT_VCC

0.1U_0402_16V4Z

0.1U_0402_16V4Z C679

C679

1 2

JCRT1

6

11

1 7

12

2 8

13

3 9

14

4 10 15

5

ALLTO_C10534-91507

ME@

16 17

PIN ASSIGMENT

D-SUB FUNCTION

5,

+CRT_VCC

RED GND

GREEN

GND

BLUE

GND

VSYNC

9 1 6 2

7

3

8 14 10 GND 13 11 12 15

4

HSYNC

SENSE SM_DAT SM_CLK

PIN4

A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2007/10/15 2008/10/15

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

D

Date: Sheet

Compal Electronics, Inc.

CRT & TV-OUT Connector

Custom

JIWA3/A4_LA4212P

E

25 53Monday, May 12, 2008

1.0

of

25 53Monday, May 12, 2008

5

hexainf@hotmail.com gratuito - free of charge.

4

3

2

1

D D

C C

+3VS

1 2

R425 8.2K_0402_5%R425 8.2K_0402_5%

1 2

R420 8.2K_0402_5%R420 8.2K_0402_5%

1 2

R430 8.2K_0402_5%R430 8.2K_0402_5%

1 2

R415 8.2K_0402_5%R415 8.2K_0402_5%

1 2

R464 8.2K_0402_5%R464 8.2K_0402_5%

1 2

R453 8.2K_0402_5%R453 8.2K_0402_5%

1 2

R449 8.2K_0402_5%R449 8.2K_0402_5%

1 2

R438 8.2K_0402_5%R438 8.2K_0402_5%

+3VS

1 2

R428 8.2K_0402_5%R428 8.2K_0402_5%

1 2

R580 8.2K_0402_5%R580 8.2K_0402_5%

1 2

R402 8.2K_0402_5%R402 8.2K_0402_5%

1 2

R563 8.2K_0402_5%R563 8.2K_0402_5%

1 2

R448 8.2K_0402_5%R448 8.2K_0402_5%

1 2

R427 8.2K_0402_5%R427 8.2K_0402_5%

1 2

R457 8.2K_0402_5%R457 8.2K_0402_5%

1 2

R456 8.2K_0402_5%R456 8.2K_0402_5%

1 2

R463 8.2K_0402_5%R463 8.2K_0402_5%

1 2

R419 8.2K_0402_5%R419 8.2K_0402_5%

1 2

R396 8.2K_0402_5%R396 8.2K_0402_5%

1 2

R426 8.2K_0402_5%R426 8.2K_0402_5%

1 2

R433

1K_0402_5%@

PCI_DEVSEL# PCI_STOP# PCI_TRDY# PCI_FRAME# PCI_PLOCK# PCI_IRDY# PCI_SERR# PCI_PERR#

PCI_PIRQA# PCI_PIRQB# PCI_PIRQC# PCI_PIRQD# PCI_PIRQE# PCI_PIRQF# PCI_PIRQG# PCI_PIRQH# PCI_REQ0# PCI_REQ1# PCI_REQ2# PCI_REQ3#

PCI_GNT3#

PCI_GNT0#

PCI_AD[0..31]

12

R434

1K_0402_5%@

SB_SPI_CS#1<28>

PCI_AD0 PCI_AD1 PCI_AD2 PCI_AD3 PCI_AD4 PCI_AD5 PCI_AD6 PCI_AD7 PCI_AD8 PCI_AD9 PCI_AD10 PCI_AD11 PCI_AD12 PCI_AD13 PCI_AD14 PCI_AD15 PCI_AD16 PCI_AD17 PCI_AD18 PCI_AD19 PCI_AD20 PCI_AD21 PCI_AD22 PCI_AD23 PCI_AD24 PCI_AD25 PCI_AD26 PCI_AD27 PCI_AD28 PCI_AD29 PCI_AD30 PCI_AD31

PCI_PIRQA# PCI_PIRQB# PCI_PIRQC# PCI_PIRQD#

U34B

D11

AD0

C8

AD1

D9

AD2

E12

AD3

E9

AD4

C9

AD5

E10

AD6

B7

AD7

C7

AD8

C5

AD9

G11

AD10

F8

AD11

F11

AD12

E7

AD13

A3

AD14

D2

AD15

F10

AD16

D5

AD17

D10

AD18

B3

AD19

F7

AD20

C3

AD21

F3

AD22

F4

AD23

C1

AD24

G7

AD25

H7

AD26

D1

AD27

G5

AD28

H6

AD29

G1

AD30

H3

AD31

Interrupt I/F

J5

PIRQA#

E1

PIRQB#

J6

PIRQC#

C4

PIRQD#

ICH9-M ES_FCBGA676

SB_SPI_CS#1

PCI_REQ0#

F1

REQ0#

PCI

12

R326

1K_0402_5%@

GNT0#

REQ1#/GPIO50

GNT1#/GPIO51

REQ2#/GPIO52

GNT2#/GPIO53

REQ3#/GPIO54

GNT3#/GPIO55

C/BE0# C/BE1# C/BE2# C/BE3#

IRDY#

PAR PCIRST# DEVSEL#

PERR#

PLOCK#

SERR# STOP# TRDY#

FRAME#

PLTRST#

PCICLK

PME#

PIRQE#/GPIO2 PIRQF#/GPIO3 PIRQG#/GPIO4 PIRQH#/GPIO5

PCI_GNT0#

G4

PCI_REQ1#

B6

PCI_GNT1#

A7

PCI_REQ2#

F13

PCI_GNT2#

F12

PCI_REQ3#

E6

PCI_GNT3#

F6

PCI_CBE#0

D8

PCI_CBE#1

B4

PCI_CBE#2

D6

PCI_CBE#3

A5

PCI_IRDY#

D3

PCI_PAR

E3

PCI_RST#

R1

PCI_DEVSEL#

C6

PCI_PERR#

E4

PCI_PLOCK#

C2

PCI_SERR#

J4

PCI_STOP#

A4

PCI_TRDY#

F5

PCI_FRAME#

D7

PLT_RST#

C14

CLK_PCI_ICH

D4

PCI_PME#

R2

PCI_PIRQE#

H4

PCI_PIRQF#

K6

PCI_PIRQG#

F2

PCI_PIRQH#

G2

Pull high?

1 2

R575 10K_0402_5%@R575 10K_0402_5%@

PCI_REQ0# PCI_GNT0#

PCI_CBE#0 PCI_CBE#1 PCI_CBE#2 PCI_CBE#3 <33>

PCI_IRDY# PCI_PAR

PCI_DEVSEL#

PCI_STOP# PCI_TRDY# PCI_FRAME#

CLK_PCI_ICH <22> PCI_PME# <35>

+3VALW

PCI_PIRQG#

Place closely pin D4

CLK_PCI_ICH

R444

10_0402_5%@

1 2

1

C567

8.2P_0402_50V@

2

B B

Boot BIOS Strap

A16 Swap Override Strap

PCI_GNT#3

A A

Low= A16 swap override Enable High= Default*

5

PCI_GNT#0 SPI_CS#1 Boot BIOS Loaction

0

11

4

1 SPI 01

PCI LPC*

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Compal Secret Data

2007/10/15 2008/10/15

3

Compal Secret Data

Deciphered Date

2

PCI_RST#

PLT_RST#

12

Title

Size Document Number Rev

Date: Sheet

PCI_RST# <35,37>

R576

R576 100K_0402_5%

100K_0402_5%

PLT_RST# <8,16,32,33,36,40>

R390

R390 100K_0402_5%

100K_0402_5%

Compal Electronics, Inc.

ICH9M(1/4)-PCI

JIWA3/A4_LA4212P

1

1.0

of

26 53Wednesday, May 14, 2008

of

26 53Wednesday, May 14, 2008

of

26 53Wednesday, May 14, 2008

5

hexainf@hotmail.com gratuito - free of charge.

+RTCVCC

R520 330K_0402_1%R520 330K_0402_1%

LAN100_SLP

1 2

R513 1M_0402_5%R513 1M_0402_5%

SM_INTRUDER#

1 2

R517 330K_0402_1%R517 330K_0402_1%

D D

C C

1 2

ICH_INTVRMEN

+RTCVCC

2

C451

0.1U_0402_16V4Z

1

SATA_DTX_C_IRX_N0<39> SATA_DTX_C_IRX_P0<39>

SATA_ITX_DRX_N0<39> SATA_ITX_DRX_P0<39>

SATA_DTX_C_IRX_N1<39> SATA_DTX_C_IRX_P1<39>

SATA_ITX_DRX_N1<39> SATA_ITX_DRX_P1<39>

R322

1 2

100_0402_1%

32.768KHZ_12.5P_1TJS125BJ2A251

+RTCBATT

SATA_DTX_C_IRX_N0 SATA_DTX_C_IRX_P0 SATA_ITX_DRX_N0

SATA_DTX_C_IRX_N1 SATA_DTX_C_IRX_P1 SATA_ITX_DRX_N1 SATA_ITX_DRX_P1

+RTCVCC

HDA_BITCLK_CODEC<8,16,30>

HDA_SDOUT_CODEC<8,16,30>

C721 0.01U_0402_16V7KC721 0.01U_0402_16V7K C719 0.01U_0402_16V7KC719 0.01U_0402_16V7K

C677 0.01U_0402_16V7KC677 0.01U_0402_16V7K C678 0.01U_0402_16V7KC678 0.01U_0402_16V7K

HDA_SYNC_CODEC<8,16,30>

HDA_RST_CODEC#<8,16,30>

HDA_SDIN0<8> HDA_SDIN1<16> HDA_SDIN2<30>

SATA_LED#<39>

1 2 1 2

1 2

R324 20K_0402_5%R324 20K_0402_5%

+3VS

4

C707

12P_0402_50V8J

Y4

NC

OUT

NC

C706

CLRP1

2 1

2MM

C470

1 2

1U_0603_10V4Z

+1.5VS

R305

10K_0402_5%

1

IN

4

24.9_0402_1%

1 2

R554

1 2

R559

1 2

R550

1 2

R557

1 2

R549

12

2 3

12P_0402_50V8J

1 2

close to RAM door

ICH_RTCX1

10M_0402_5%

ICH_RTCX2

33_0402_5%

33_0402_5% 0_0402_5%

0_0402_5% 0_0402_5%

0_0402_5%

SATA_LED#

12

R515

ICH_RTCRST# ICH_SRTCRST# SM_INTRUDER#

ICH_INTVRMEN

LAN100_SLP

GLAN_COMP

HDA_BITCLK_R

HDA_SYNC_R HDA_RST_R#

HDA_SDOUT_R

SATA_ITX_C_DRX_N0 SATA_ITX_C_DRX_P0SATA_ITX_DRX_P0

SATA_ITX_C_DRX_N1 SATA_ITX_C_DRX_P1

U34A

C23

RTCX1

C24

RTCX2

A25

RTCRST#

F20

SRTCRST#

C22

INTRUDER#

B22

INTVRMEN

A22

LAN100_SLP

E25

GLAN_CLK

C13

LAN_RSTSYNC

F14

LAN_RXD0

G13

LAN_RXD1

D14

LAN_RXD2

D13

LAN_TXD_0

D12

LAN_TXD_1

E13

LAN_TXD_2

B10

GPIO56

B28

GLAN_COMPI

B27

GLAN_COMPO

AF6

HDA_BIT_CLK

AH4

HDA_SYNC

AE7

HDA_RST#

AF4

HDA_SDIN0

AG4

HDA_SDIN1

AH3

HDA_SDIN2

AE5

HDA_SDIN3

AG5

HDA_SDOUT

AG7

HDA_DOCK_EN#/GPIO33

AE8

HDA_DOCK_RST#/GPIO34

AG8

SATALED#

AJ16

SATA0RXN

AH16

SATA0RXP

AF17

SATA0TXN

AG17

SATA0TXP

AH13

SATA1RXN

AJ13

SATA1RXP

AG14

SATA1TXN

AF14

SATA1TXP

ICH9-M ES_FCBGA676

3

RTC

LAN / GLAN

IHDA

LPCCPU

SATA

FWH0/LAD0 FWH1/LAD1 FWH2/LAD2 FWH3/LAD3

FWH4/LFRAME#

LDRQ0#

LDRQ1#/GPIO23

A20GATE

A20M#

DPRSTP#

DPSLP#

FERR#

CPUPWRGD

IGNNE#

INIT# INTR

RCIN#

SMI#

STPCLK#

THRMTRIP#

TP12

SATA4RXN

SATA4RXP SATA4TXN SATA4TXP

SATA5RXN

SATA5RXP SATA5TXN SATA5TXP

SATA_CLKN SATA_CLKP

SATARBIAS#

SATARBIAS

LPC_AD0

K5

LPC_AD1

K4

LPC_AD2

L6

LPC_AD3

K2

LPC_FRAME#

K3

LPC_DRQ0#

J3 J1

GATEA20

N7

H_A20M#

AJ27 AJ25

AE23 AJ26 AD22 AF25 AE22

AG25 L3

AF23

NMI

AF24 AH27 AG26 AG27

AH11 AJ11 AG12 AF12

AH9 AJ9 AE10 AF10

AH18 AJ18 AJ7 AH7

10mils width less than 500mils

R511 0_0402_5%R511 0_0402_5%

H_DPSLP# H_DPSLP#

H_FERR#_S H_PWRGOOD H_IGNNE# H_INIT#

H_INTR KB_RST#

H_NMI H_SMI#

H_STPCLK# THRMTRIP_ICH#

R541 1K_0402_5%@R541 1K_0402_5%@ R540 1K_0402_5%@R540 1K_0402_5%@

R544 1K_0402_5%@R544 1K_0402_5%@ R547 1K_0402_5%@R547 1K_0402_5%@

CLK_PCIE_SATA# CLK_PCIE_SATA

SATARBIAS

R553

2

LPC_AD[0..3] <35,37>

LPC_FRAME# <35,37> LPC_DRQ0# <37>

GATEA20 <35> H_A20M# <5>

12

H_PWRGOOD <6> H_IGNNE# <5> H_INIT# <5>

H_INTR <5>

KB_RST# <35>

H_NMI <5> H_SMI# <5>

H_STPCLK# <5>

R112 54.9_0402_1%R112 54.9_0402_1%

1 2

12 12

CLK_PCIE_SATA# <22> CLK_PCIE_SATA <22>

12

24.9_0402_1%

1

GATEA20

KB_RST#

H_DPRSTP#

H_DPSLP#

H_DPRSTP#H_DPRSTP_R#

R2056_0402_5% R2056_0402_5%

12

H_DPRSTP# <6,8,51> H_DPSLP# <6>

H_THERMTRIP#

R114 56_0402_5%R114 56_0402_5%

12

H_THERMTRIP# <5,8>

R329 need to place within 2" of ICH9M R328 must be place within 2" of R258 w/o stub.

+VCCP

10K_0402_5%

56_0402_5%

R509

56_0402_5%

R407

R462

R510

R514

12

+3VS

12

+VCCP

@R510

@

12

@R514

@

12

+VCCP

H_FERR# <5>

B B

HDA_SDOUT_R

A A

5

4

Need check

+3VS

R556

R556 1K_0402_5%

1K_0402_5%

@

1 2

XOR Chain Entrance Strap

HDA_SDOUTICH_TP3 Description 0 0 1

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2007/10/15 2008/10/15

RSVD

0

Enter XOR Chain

1

Normal Operation

0

Set PCIE port config bit 1

11

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

Compal Electronics, Inc.

ICH9M(2/4)-LAN,IDELPC,RTC

JIWA3/A4_LA4212P

27 53Wednesday, May 14, 2008

of

1

of

1.0

5

hexainf@hotmail.com gratuito - free of charge.

10K_0402_5%

H_STP_PCI#<22> H_STP_CPU#<22>

GPIO7 GPIO13 GPIO17 GPIO18 GPIO20 GPIO22

TV TUNER

NEW CARD

VRMPWRGD

+3VALW

R361

+3VS

@R332

@

10K_0402_5%

WLAN

LAN

1 2

R332

VGATE<8,51>

R371

R371 10K_0402_5%

10K_0402_5%

1 2

10K_0402_5%

1 2

PCIE_RXN1<36> PCIE_RXP1<36> PCIE_TXN1<36>

PCIE_TXP1<36>

PCIE_RXN3<32> PCIE_RXP3<32> PCIE_TXN3<32>

PCIE_TXP3<32>

PCIE_RXN4<40> PCIE_RXP4<40> PCIE_TXN4<40>

PCIE_TXP4<40>

PCIE_RXN6<33> PCIE_RXP6<33>

PCIE_TXN6<33>

PCIE_TXP6<33>

SB_SPI_CS#1<26>

ICH_SMBCLK<22,32,40>

ICH_SMBDATA<22,32,40>

R538

@R538

@

R348 0_0402_5%R348 0_0402_5%

low-->default High -->No boot

SERIRQ

+3VS

D D

+3VALW

C C

+3VS

B B

CLK_ENABLE#<51>

+3VALW

A A

1 2

R406 10K_0402_5%R406 10K_0402_5%

R461 8.2K_0402_5%R461 8.2K_0402_5%

R352 10K_0402_5%R352 10K_0402_5%

@

1 2

R519 8.2K_0402_5%

1 2

R579 10K_0402_5%R579 10K_0402_5%

R355 10K_0402_5%R355 10K_0402_5%

R410 8.2K_0402_5%

R336 10K_0402_5%R336 10K_0402_5%

R345 10K_0402_5%R345 10K_0402_5%

R370 10K_0402_5%R370 10K_0402_5%

R338 10K_0402_5%

R374 10K_0402_5%R374 10K_0402_5%

R360 10K_0402_5%R360 10K_0402_5%

R350 1K_0402_5%R350 1K_0402_5%

R546 8.2K_0402_5%R546 8.2K_0402_5%

R539 10K_0402_5%R539 10K_0402_5%

R524 100K_0402_5%R524 100K_0402_5%

12/14 changed from +3VS to +3VALW

1 2

R349 10K_0402_5%R349 10K_0402_5%

1 2

R365 10K_0402_5%R365 10K_0402_5%

1 2

R363 10K_0402_5%@ R363 10K_0402_5%@

1 2

R578 10K_0402_5%@ R578 10K_0402_5%@

1 2

R548 10K_0402_5%R548 10K_0402_5%

1 2

R521 10K_0402_5%R521 10K_0402_5%

R411 100K_0402_5%@R411 100K_0402_5%@ R573 100K_0402_5%@R573 100K_0402_5%@

R522 1K_0402_5%@R522 1K_0402_5%@

R512 1K_0402_5%

1 2

+3VS

R408 10K_0402_5%@R408 10K_0402_5%@

10K_1206_8P4R_5%

PCI_CLKRUN#

1 2

1 2 1 2

RP15

RP14

RP13

GPIO38

EC_THERM#

SATA_CLKREQ#

OCP#

PM_BMBUSY# LID_OUT#

@

12

GPIO39

GPIO48

LINKALERT#

CL_RST#

@

XDP_DBRESET#

ICH_RI#

ICH_PCIE_WAKE#

ICH_LOW_BAT#

12

WOL_EN

GPIO57 DPRSLPVR

ICH_RSVD

12

GPIO49

@

12

SB_SPKR

+3VS

R319

1 2 13

D

2

G

S

USB_OC#6

45 36

USB_OC#2

27

USB_OC#4

18

USB_OC#5

45

USB_OC#7

36

USB_OC#9

27

USB_OC#0

18

USB_OC#8

45

USB_OC#3

36

USB_OC#10

27

USB_OC#11

18

5

V

LID_OUT#

330_0402_5%@

R328

1 2

0_0402_5%@

Q29

RHU002N06_SOT323@

SPI not used, Left NC

4

R378

2.2K_0402_5%

XDP_DBRESET#<5> PM_BMBUSY#<8>

EC_LID_OUT#<35>

12

PCI_CLKRUN#

ICH_PCIE_WAKE#<32,33,40>

SERIRQ<35,37>

EC_THERM#<35>

1 2

R334 0_0402_5%R334 0_0402_5%

OCP#

CPUSB#<40>

EC_SMI#<35> EC_SCI#<35>

SATA_CLKREQ#<22>

SB_SPKR<30>

MCH_ICH_SYNC#<8>

SPI_CLK_SB<38>

FSEL#SPICS#_SB<38>

FWR#SPI_SI_SB<38>

FRD#SPI_SO_SB<38>

USB_OC#0<43> USB_OC#1<43>

USB_OC#11<43>

Within 500 mils

4

+3VALW

12

R543

12

2.2K_0402_5%

1 2

R532 0_0402_5%R532 0_0402_5%

T98T98

T76T76

MCH_ICH_SYNC#

T96T96 T97T97 T95T95

C4350.1U_0402_10V7K C4350.1U_0402_10V7K C4360.1U_0402_10V7K C4360.1U_0402_10V7K

C4540.1U_0402_10V7K C4540.1U_0402_10V7K C4530.1U_0402_10V7K C4530.1U_0402_10V7K

C4390.1U_0402_10V7K C4390.1U_0402_10V7K C4400.1U_0402_10V7K C4400.1U_0402_10V7K

C4490.1U_0402_10V7K C4490.1U_0402_10V7K C4500.1U_0402_10V7K C4500.1U_0402_10V7K

SB_SPI_CS#1

12

LINKALERT# ME__EC_CLK1 ME__EC_DATA1

ICH_RI#

XDP_DBRESET# PM_BMBUSY#

H_STP_PCI# R_STP_CPU#

PCI_CLKRUN# ICH_PCIE_WAKE#

SERIRQ EC_THERM#

VRMPWRGD SST_CTL OCP# GPIO7

EC_SMI# EC_SCI# GPIO13 GPIO17 GPIO18 GPIO20 GPIO22 GPIO27

SATA_CLKREQ# GPIO38 GPIO39 GPIO48 GPIO49 GPIO57

SB_SPKR ICH_RSVD

PCIE_RXN1 PCIE_RXP1 PCIE_C_TXN1 PCIE_C_TXP1

PCIE_RXN3 PCIE_RXP3 PCIE_C_TXN3 PCIE_C_TXP3

PCIE_RXN4 PCIE_RXP4 PCIE_C_TXN4 PCIE_C_TXP4

PCIE_RXN6 PCIE_RXP6 PCIE_C_TXN6 PCIE_C_TXP6

USB_OC#0 USB_OC#1USB_OC#1 USB_OC#2 USB_OC#3 USB_OC#4 USB_OC#5 USB_OC#6 USB_OC#7 USB_OC#8 USB_OC#9 USB_OC#10 USB_OC#11

USBRBIAS

R44722.6_0402_1% R44722.6_0402_1%

U34C

G16

SMBCLK

A13

SMBDATA

E17

LINKALERT#/GPIO60/CLGPIO4

C17

SMLINK0

B18

SMLINK1

F19

RI#

R4

SUS_STAT#/LPCPD#

G19

SYS_RESET#

M6

PMSYNC#/GPIO0

A17

SMBALERT#/GPIO11

A14

STP_PCI#

E19

STP_CPU#

L4

CLKRUN#

E20

WAKE#

M5

SERIRQ

AJ23

THRM#

D21

VRMPWRGD

A20

TP11

AG19

GPIO1

AH21

GPIO6

AG21

GPIO7

A21

GPIO8

C12

GPIO12

C21

GPIO13

AE18

GPIO17

K1

GPIO18

AF8

GPIO20

AJ22

SCLOCK/GPIO22

A9

GPIO27

D19

GPIO28

L1

SATACLKREQ#/GPIO35

AE19

SLOAD/GPIO38

AG22

SDATAOUT0/GPIO39

AF21

SDATAOUT1/GPIO48

AH24

GPIO49

A8

GPIO57/CLGPIO5

M7

SPKR

AJ24

MCH_SYNC#

B21

TP3

AH20

TP8

AJ20

TP9

AJ21

TP10

ICH9-M ES_FCBGA676

ICH9-M ES_FCBGA676 U34D

U34D

N29

PERN1

N28

PERP1

P27

PETN1

P26

PETP1

L29

PERN2

L28

PERP2

M27

PETN2

M26

PETP2

J29

PERN3

J28

PERP3

K27

PETN3

K26

PETP3

G29

PERN4

G28

PERP4

H27

PETN4

H26

PETP4

E29

PERN5

E28

PERP5

F27

PETN5

F26

PETP5

C29

PERN6/GLAN_RXN

C28

PERP6/GLAN_RXP

D27

PETN6/GLAN_TXN

D26

PETP6/GLAN_TXP

D23

SPI_CLK

D24

SPI_CS0#

F23

SPI_CS1#GPIO58/CLGPIO6

D25

SPI_MOSI

E23

SPI_MISO

N4

OC0#/GPIO59

N5

OC1#/GPIO40

N6

OC2#/GPIO41

P6

OC3#/GPIO42

M1

OC4#/GPIO43

N2

OC5#/GPIO29

M4

OC6#/GPIO30

M3

OC7#/GPIO31

N3

OC8#/GPIO44

N1

OC9#/GPIO45

P5

OC10#/GPIO46

P3

OC11#/GPIO47

AG2

USBRBIAS

AG1

USBRBIAS#

ICH9-M ES_FCBGA676

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

SMB

PCI - Express

SPI

USB

Issued Date

3

CLK14 CLK48

SUSCLK

SLP_S3# SLP_S4# SLP_S5#

PWROK

BATLOW# PWRBTN# LAN_RST#

RSMRST#

CK_PWRGD

CLPWROK

SLP_M#

CL_CLK0 CL_CLK1

CL_DATA0 CL_DATA1

CL_VREF0 CL_VREF1

CL_RST0# CL_RST1#

DMI_RXN0 DMI_RXP0 DMI_TXN0 DMI_TXP0

DMI_RXN1 DMI_RXP1 DMI_TXN1 DMI_TXP1

DMI_RXN2 DMI_RXP2 DMI_TXN2 DMI_TXP2

DMI_RXN3 DMI_RXP3 DMI_TXN3 DMI_TXP3

CLK_PCIE_ICH# CLK_PCIE_ICH

AH23 AF19 AE21 AD20

H1 AF3

P1 C16

E16 G17

C10 G20 M2 B13 R3 D20 D22 R5 R6 B16 F24

B19 F22

C19 C25

A19 F21

D18 A16

C18 C11 C20

DMI_IRCOMP USB20_N0

USB20_P0 USB20_N1 USB20_P1 USB20_N2 USB20_P2 USB20_N3 USB20_P3 USB20_N4 USB20_P4 USB20_N5 USB20_P5 USB20_N6 USB20_P6 USB20_N7 USB20_P7 USB20_N8 USB20_P8 USB20_N9 USB20_P9 USB20_N10 USB20_P10 USB20_N11 USB20_P11

Compal Secret Data

SATA0GP/GPIO21 SATA1GP/GPIO19 SATA4GP/GPIO36 SATA5GP/GPIO37

SATA

GPIO

SATA

GPIO

clocks

S4_STATE#/GPIO26

DPRSLPVR/GPIO16

SYS / GPIOGPIOMISC

Power MGT

MEM_LED/GPIO24

GPIO10/SUS_PWR_ACK

GPIO14/AC_PRESENT

WOL_EN/GPIO9

Controller Link

V27

DMI0RXN

V26

DMI0RXP

U29

DMI0TXN

U28

DMI0TXP

Y27

DMI1RXN

Y26

DMI1RXP

W29

DMI1TXN

W28

DMI1TXP

AB27

DMI2RXN

AB26

DMI2RXP

AA29

DMI2TXN

AA28

DMI2TXP

AD27

DMI3RXN

AD26

DMI3RXP

AC29

DMI3TXN

AC28

DMI3TXP

T26

DMI_CLKN

T25

DMI_CLKP

DMI_ZCOMP

DMI_IRCOMP

3

AF29

Direct Media Interface

AF28 AC5

USBP0N

AC4

USBP0P

AD3

USBP1N

AD2

USBP1P

AC1

USBP2N

AC2

USBP2P

AA5

USBP3N

AA4

USBP3P

AB2

USBP4N

AB3

USBP4P

AA1

USBP5N

AA2

USBP5P

W5

USBP6N

W4

USBP6P

Y3

USBP7N

Y2

USBP7P

W1

USBP8N

W2

USBP8P

V2

USBP9N

V3

USBP9P

U5

USBP10N

U4

USBP10P

U1

USBP11N

U2

USBP11P

2007/10/15 2008/10/15

+3VS

R344

8.2K_0402_5%

1 2

CLK_14M_ICH CLK_48M_ICH

ICH_SUSCLK SLP_S3#

SLP_S4# SLP_S5#

S4_STATE# ICH_POK

ICH_LOW_BAT# PBTN_OUT#

CK_PWRGD_R CK_PWRGD M_PWROK

CL_VREF0_ICH CL_VREF1_ICH

CL_RST#

GPIO24 GPIO14

WOL_EN

R574

1 2

499_0402_1%

R423 0_0402_5%R423 0_0402_5%

T78T78

T2T2

T3T3

T4T4

+3VALW

DMI_RXN0 <8>

DMI_RXP0 <8> DMI_TXN0 <8> DMI_TXP0 <8>

DMI_RXN1 <8>

DMI_RXP1 <8> DMI_TXN1 <8> DMI_TXP1 <8>

DMI_RXN2 <8>

DMI_RXP2 <8> DMI_TXN2 <8> DMI_TXP2 <8>

DMI_RXN3 <8>

DMI_RXP3 <8> DMI_TXN3 <8> DMI_TXP3 <8>

CLK_PCIE_ICH# <22> CLK_PCIE_ICH <22>

R297 24.9_0402_1%R297 24.9_0402_1%

1 2

USB20_N0 <43> USB20_P0 <43> USB20_N1 <43> USB20_P1 <43> USB20_N2 <40> USB20_P2 <40>

USB20_N4 <43> USB20_P4 <43>

USB20_N6 <32> USB20_P6 <32>

USB20_N8 <32> USB20_P8 <32>

USB20_N10 <40> USB20_P10 <40> USB20_N11 <43> USB20_P11 <43>

Deciphered Date

2

CLK_14M_ICH <22> CLK_48M_ICH <22>

T101T101

SLP_S3# <35> SLP_S4# <35> SLP_S5# <35>

DPRSLPVR

PBTN_OUT# <35>

1 2

M_PWROK <8>

1 2

R707 100_0402_5%R707 100_0402_5%

CL_CLK0 <8>

CL_DATA0 <8>

CL_RST# <8>

12

R356

100K_0402_5%

Within 500 mils

+1.5VS

LEFT USB LEFT USB

RIGHT USB

BT

WLAN

New Card RIGHT USB

2

EC_RSMRST#<35>

+3VALW

R551

R551 10K_0402_5%

10K_0402_5%

1 2

@

EC_RSMRST#REC_RSMRST#R

VGATE

D14 RB751V_SOD323D14 RB751V_SOD323

R357 0_0402_5%

2 1

@

R272

2.2K_0402_5%@

ACIN

12

BAV99DW-7_SOT363

1 2

1

Place closely pin B2 Place closely pin AC1

R362

12

R301

R301 453_0402_1%

453_0402_1%

12

R528

R528 453_0402_1%

453_0402_1%

1 2

12

1

2

R320 3.24K_0402_1%R320 3.24K_0402_1%

1 2

R383 3.24K_0402_1%R383 3.24K_0402_1%

1 2

0_0402_5%

+3VALW

12

1

2

R170 100_0402_5%@ R170 100_0402_5%@

1 2

ACIN <35,44>

ICH_POK <8,35>

0.1U_0402_16V4Z

DPRSLPVR <8,51>

R335 10K_0402_5%R335 10K_0402_5%

CK_PWRGD <22>

RSMRST circuit

@

1 2

3

E

2

4

5

D8B

R274

3

1 2

2.2K_0402_5%

R566

R566 10_0402_5%

10_0402_5%

C733

C733 10P_0402_50V8J

10P_0402_50V8J

1 2

10K_0402_5%@

1

2

1

2

R271

0_0402_5%

Q26

C

EC_RSMRST#R

1

MMBT3906_SOT23-3

B

1 2

2

R279 4.7K_0402_5%R279 4.7K_0402_5%

1

D8A

D8A BAV99DW-7_SOT363

BAV99DW-7_SOT363

6

M_PWROK

C441

C717

USB PORT LIST

DEVICEPORT

0

LEFT SIDE CMOS

2 3

3G RIGHT SIDE

4

BT

6

WIRELESS

8

NEW CARD

10

RIGHT SIDE

11

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

Compal Electronics, Inc.

ICH9M(3/4)-USB,GPIO,PCIE

JIWA3/A4_LA4212P

1

CLK_14M_ICHCLK_48M_ICH

R460

R460 33_0402_5%

33_0402_5%

C576

C576 22P_0402_50V8J

22P_0402_50V8J

R714

28 53Wednesday, May 14, 2008

of

+3VS

+3VALW

POK <45,47>

1.0

5

hexainf@hotmail.com gratuito - free of charge.

+RTCVCC

0.1U_0402_16V4Z

D D

C C

+1.5VS

B B

0.1U_0402_16V4Z

A A

+1.5VS

R558

100_0402_5%

R582

100_0402_5%

+1.5VS

220U_D2_4VM

R518

1 2

CHB1608U301_0603

+1.5VS

C510

0.1U_0402_16V4Z

C529

1 2

CHB1608U301_0603

+5VS +3VS

12

R309

1 2

0_0805_5%

+3VS

1

2

R281

1

C460

2

21

D21

D21 CH751H-40PT_SOD323-2

CH751H-40PT_SOD323-2

ICH_V5REF_RUN

1

C728

C728 1U_0603_10V4Z

1U_0603_10V4Z

2

+3VALW+5VALW

21

D22

D22 CH751H-40PT_SOD323-2

CH751H-40PT_SOD323-2

ICH_V5REF_SUS

1

C738

C738 1U_0603_10V4Z

1U_0603_10V4Z

2

C460

0.1U_0402_16V4Z

20 mils

C459

40 mils

1

+

C445

C455

2

10U_0805_10V4Z

1

C710

C712

2

1U_0603_10V4Z

+1.5VS

1

0.1U_0402_16V4Z

2

close to AC7

+1.5VS

(10UF*1, 2.2UF*1)

4.7U_0805_10V4Z

1

C430

2

5

10U_0805_10V4Z

1

C446

2

1

2

10U_0805_10V4Z

1

C493

2

CHB1608U301_0603

1 2

R282

C431

20 mils

ICH_V5REF_RUN

ICH_V5REF_SUS

1

C447

2

2.2U_0603_6.3V4Z

+1.5VS

1

C542

1U_0603_10V4Z

+1.5VS

1U_0603_10V4Z

T100T100 T99T99

2.2U_0603_6.3V4Z

1

C434

2

10U_0805_10V4Z

2

+1.5VS

1

C492

2

1

C528

2

VCC_LAN1_05_INT_ICH_1 VCC_LAN1_05_INT_ICH_2 VCCCL1_05_ICH

1

2

+3VS

4

U34F

A23

VCCRTC

A6

V5REF

AE1

V5REF_SUS

AA24

VCC1_5_B[01]

AA25

VCC1_5_B[02]

AB24

VCC1_5_B[03]

AB25

VCC1_5_B[04]

AC24

VCC1_5_B[05]

AC25

VCC1_5_B[06]

AD24

VCC1_5_B[07]

AD25

VCC1_5_B[08]

AE25

VCC1_5_B[09]

AE26

VCC1_5_B[10]

AE27

VCC1_5_B[11]

AE28

VCC1_5_B[12]

AE29

VCC1_5_B[13]

F25

VCC1_5_B[14]

G25

VCC1_5_B[15]

H24

VCC1_5_B[16]

H25

VCC1_5_B[17]

J24

VCC1_5_B[18]

J25

VCC1_5_B[19]

K24

VCC1_5_B[20]

K25

VCC1_5_B[21]

L23

VCC1_5_B[22]

L24

VCC1_5_B[23]

L25

VCC1_5_B[24]

M24

VCC1_5_B[25]

M25

VCC1_5_B[26]

N23

VCC1_5_B[27]

N24

VCC1_5_B[28]

N25

VCC1_5_B[29]

P24

VCC1_5_B[30]

P25

VCC1_5_B[31]

R24

VCC1_5_B[32]

R25

VCC1_5_B[33]

R26

VCC1_5_B[34]

R27

VCC1_5_B[35]

T24

VCC1_5_B[36]

T27

VCC1_5_B[37]

T28

VCC1_5_B[38]

T29

VCC1_5_B[39]

U24

VCC1_5_B[40]

U25

VCC1_5_B[41]

V24

VCC1_5_B[42]

V25

VCC1_5_B[43]

U23

VCC1_5_B[44]

W24

VCC1_5_B[45]

W25

VCC1_5_B[46]

K23

VCC1_5_B[47]

Y24

VCC1_5_B[48]

Y25

VCC1_5_B[49]

AJ19

VCCSATAPLL

AC16

VCC1_5_A[01]

AD15

VCC1_5_A[02]

AD16

VCC1_5_A[03]

AE15

VCC1_5_A[04]

AF15

VCC1_5_A[05]

AG15

VCC1_5_A[06]

AH15

VCC1_5_A[07]

AJ15

VCC1_5_A[08]

AC11

VCC1_5_A[09]

AD11

VCC1_5_A[10]

AE11

VCC1_5_A[11]

AF11

VCC1_5_A[12]

AG10

VCC1_5_A[13]

AG11

VCC1_5_A[14]

AH10

VCC1_5_A[15]

AJ10

VCC1_5_A[16]

AC9

VCC1_5_A[17]

AC18

VCC1_5_A[18]

AC19

VCC1_5_A[19]

AC21

VCC1_5_A[20]

G10

VCC1_5_A[21]

G9

VCC1_5_A[22]

AC12

VCC1_5_A[23]

AC13

VCC1_5_A[24]

AC14

VCC1_5_A[25]

AJ5

VCCUSBPLL

AA7

VCC1_5_A[26]

AB6

VCC1_5_A[27]

AB7

VCC1_5_A[28]

AC6

VCC1_5_A[29]

AC7

VCC1_5_A[30]

A10

VCCLAN1_05[1]

A11

VCCLAN1_05[2]

A12

VCCLAN3_3[1]

B12

VCCLAN3_3[2]

A27

VCCGLANPLL

D28

VCCGLAN1_5[1]

D29

VCCGLAN1_5[2]

E26

VCCGLAN1_5[3]

E27

VCCGLAN1_5[4]

A26

VCCGLAN3_3

ICH9-M ES_FCBGA676

4

VCCA3GP

ARX

ATX

USB CORE

GLAN POWER

VCC1_05[01] VCC1_05[02] VCC1_05[03] VCC1_05[04] VCC1_05[05] VCC1_05[06] VCC1_05[07] VCC1_05[08] VCC1_05[09] VCC1_05[10] VCC1_05[11] VCC1_05[12] VCC1_05[13] VCC1_05[14] VCC1_05[15] VCC1_05[16]

CORE

VCC1_05[17] VCC1_05[18] VCC1_05[19] VCC1_05[20] VCC1_05[21] VCC1_05[22] VCC1_05[23] VCC1_05[24] VCC1_05[25] VCC1_05[26]

V_CPU_IO[1] V_CPU_IO[2]

VCCP_CORE

PCI

VCCSUSHDA

VCCSUS1_05[1] VCCSUS1_05[2]

VCCSUS1_5[1] VCCSUS1_5[2]

VCCSUS3_3[01] VCCSUS3_3[02] VCCSUS3_3[03] VCCSUS3_3[04]

VCCPSUS

VCCSUS3_3[05]

VCCSUS3_3[06] VCCSUS3_3[07] VCCSUS3_3[08] VCCSUS3_3[09] VCCSUS3_3[10] VCCSUS3_3[11] VCCSUS3_3[12] VCCSUS3_3[13] VCCSUS3_3[14] VCCSUS3_3[15] VCCSUS3_3[16]

VCCPUSB

VCCSUS3_3[17] VCCSUS3_3[18] VCCSUS3_3[19] VCCSUS3_3[20]

VCCCL3_3[1] VCCCL3_3[2]

VCCDMIPLL VCC_DMI[1]

VCC_DMI[2]

VCC3_3[01] VCC3_3[02] VCC3_3[07]

VCC3_3[03] VCC3_3[04] VCC3_3[05] VCC3_3[06]

VCC3_3[08] VCC3_3[09] VCC3_3[10] VCC3_3[11] VCC3_3[12] VCC3_3[13] VCC3_3[14]

VCCHDA

VCCCL1_05

VCCCL1_5

1

C521

2

+3VS

1

C486

0.1U_0402_16V4Z

2

0.1U_0402_16V4Z

+3VALW

+3VS

3

1

C515 0.1U_0402_16V4ZC515 0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

0.01U_0402_16V7K

1

C426

C429 10U_0805_6.3V6MC429 10U_0805_6.3V6M

2

C504 10U_0805_10V4ZC504 10U_0805_10V4Z

1

C545

0.1U_0402_16V4Z

2

0.1U_0402_16V4Z

T82T82 T79T79

R715

GM@ R715

GM@

1 2

0_0402_5%

+3VALW

1

C551

C546

0.1U_0402_16V4Z

2

1

C560

4.7U_0603_6.3V6K

2

T75T75

1

C498

C498 1U_0603_10V4Z@

1U_0603_10V4Z@

2

2007/10/15 2008/10/15

3

1 2

CHB1608U301_0603

1

2

+VCCP

1

2

1

C549

0.1U_0402_16V4Z

2

C552

R280

+3VS

(SATA)

1

2

1

C532

0.1U_0402_16V4Z

2

+1.5VS

+3VS

(DMI)

1

C433

0.1U_0402_16V4Z

2

+3VS

1

0.1U_0402_16V4Z

0.1U_0402_16V4Z C534

C534

2

+3VALW

R615

R615 549_0402_1%

549_0402_1%

@

1 2

R614

R614 453_0402_1%

453_0402_1%

@

Compal Secret Data

Deciphered Date

1

2

+VCCP

A15 B15 C15 D15 E15 F15 L11 L12 L14 L16 L17 L18 M11 M18 P11 P18 T11 T18 U11 U18 V11 V12 V14 V16 V17 V18

R29 W23

Y23 AB23

AC23 AG29

AJ6 AC10

AD19 AF20 AG24 AC20

B9 F9 G3 G6 J2 J7 K7

AJ4 AJ3

AC8 F17

VCCSUS1_5_ICH_1

AD8

VCCSUS1_5_ICH_2

F18

A18 D16 D17 E22

AF1

T1 T2 T3 T4 T5 T6 U6 U7 V6 V7 W6 W7 Y6 Y7 T7

G22 G23

A24 B24

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

+VCCP

4.7U_0603_6.3V6M

4.7U_0603_6.3V6M C502

C502

1

2

C519

0.1U_0402_16V4Z

R615

0_0402_5%

PM@

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z C484

C484

1

2

R613

PM@

1 2

0_0402_5%

check HDMI

2

1

U34E

AA26

VSS[001]

AA27

VSS[002]

AA3

VSS[003]

AA6

VSS[004]

AB1

VSS[005]

AA23

VSS[006]

AB28

VSS[007]

AB29

VSS[008]

AB4

VSS[009]

AB5

VSS[010]

AC17

VSS[011]

AC26

VSS[012]

AC27

VSS[013]

AC3

VSS[014]

AD1

VSS[015]

AD10

VSS[016]

AD12

VSS[017]

AD13

VSS[018]

AD14

VSS[019]

AD17

VSS[020]

AD18

VSS[021]

AD21

VSS[022]

AD28

VSS[023]

AD29

VSS[024]

AD4

VSS[025]

AD5

VSS[026]

AD6

VSS[027]

AD7

VSS[028]

AD9

VSS[029]

AE12

VSS[030]

AE13

VSS[031]

AE14

VSS[032]

AE16

VSS[033]

AE17

VSS[034]

AE2

VSS[035]

0.1U_0402_16V4Z

0.1U_0402_16V4Z C466

C466

1

2

+1.5VS+3VS

R612

R612 0_0402_5%

0_0402_5%

GM@

1 2

AE20

VSS[036]

AE24

VSS[037]

AE3

VSS[038]

AE4

VSS[039]

AE6

VSS[040]

AE9

VSS[041]

AF13

VSS[042]

AF16

VSS[043]

AF18

VSS[044]

AF22

VSS[045]

AH26

VSS[046]

AF26

VSS[047]

AF27

VSS[048]

AF5

VSS[049]

AF7

VSS[050]

AF9

VSS[051]

AG13

VSS[052]

AG16

VSS[053]

AG18

VSS[054]

AG20

VSS[055]

AG23

VSS[056]

AG3

VSS[057]

AG6

VSS[058]

AG9

VSS[059]

AH12

VSS[060]

AH14

VSS[061]

AH17

VSS[062]

AH19

VSS[063]

AH2

VSS[064]

AH22

VSS[065]

AH25

VSS[066]

AH28

VSS[067]

AH5

VSS[068]

AH8

VSS[069]

AJ12

VSS[070]

AJ14

VSS[071]

AJ17

VSS[072]

AJ8

VSS[073]

B11

VSS[074]

B14

VSS[075]

B17

VSS[076]

B2

VSS[077]

B20

VSS[078]

B23

VSS[079]

B5

VSS[080]

B8

VSS[081]

C26

VSS[082]

C27

VSS[083]

E11

VSS[084]

E14

VSS[085]

E18

VSS[086]

E2

VSS[087]

E21

VSS[088]

E24

VSS[089]

E5

VSS[090]

E8

VSS[091]

F16

VSS[092]

F28

VSS[093]

F29

VSS[094]

G12

VSS[095]

G14

VSS[096]

G18

VSS[097]

G21

VSS[098]

G24

VSS[099]

G26

VSS[100]

G27

VSS[101]

G8

VSS[102]

H2

VSS[103]

H23

VSS[104]

H28

VSS[105]

H29

VSS[106]

ICH9-M ES_FCBGA676

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

Compal Electronics, Inc.

ICH9M(4/4)-POWER&GND

VSS_NCTF[01] VSS_NCTF[02] VSS_NCTF[03] VSS_NCTF[04] VSS_NCTF[05] VSS_NCTF[06] VSS_NCTF[07] VSS_NCTF[08] VSS_NCTF[09] VSS_NCTF[10] VSS_NCTF[11] VSS_NCTF[12]

JIWA3/A4_LA4212P

VSS[107] VSS[108] VSS[109] VSS[110] VSS[111] VSS[112] VSS[113] VSS[114] VSS[115] VSS[116] VSS[117] VSS[118] VSS[119] VSS[120] VSS[121] VSS[122] VSS[123] VSS[124] VSS[125] VSS[126] VSS[127] VSS[128] VSS[129] VSS[130] VSS[131] VSS[132] VSS[133] VSS[134] VSS[135] VSS[136] VSS[137] VSS[138] VSS[139] VSS[140] VSS[141] VSS[142] VSS[143] VSS[144] VSS[145] VSS[146] VSS[147] VSS[148] VSS[149] VSS[150] VSS[151] VSS[152] VSS[153] VSS[154] VSS[155] VSS[156] VSS[157] VSS[158] VSS[159] VSS[160] VSS[161] VSS[162] VSS[163] VSS[164] VSS[165] VSS[166] VSS[167] VSS[168] VSS[169] VSS[170] VSS[171] VSS[172] VSS[173] VSS[174] VSS[175] VSS[176] VSS[177] VSS[178] VSS[179] VSS[180] VSS[181] VSS[182] VSS[183] VSS[184] VSS[185] VSS[186] VSS[187] VSS[188] VSS[189] VSS[190] VSS[191] VSS[192] VSS[193] VSS[194] VSS[195] VSS[196] VSS[197] VSS[198]

1

H5 J23 J26 J27 AC22 K28 K29 L13 L15 L2 L26 L27 L5 L7 M12 M13 M14 M15 M16 M17 M23 M28 M29 N11 N12 N13 N14 N15 N16 N17 N18 N26 N27 P12 P13 P14 P15 P16 P17 P2 P23 P28 P29 P4 P7 R11 R12 R13 R14 R15 R16 R17 R18 R28 T12 T13 T14 T15 T16 T17 T23 B26 U12 U13 U14 U15 U16 U17 AD23 U26 U27 U3 V1 V13 V15 V23 V28 V29 V4 V5 W26 W27 W3 Y1 Y28 Y29 Y4 Y5 AG28 AH6 AF2 B25

A1 A2 A28 A29 AH1 AH29 AJ1 AJ2 AJ28 AJ29 B1 B29

1.0

29 53Wednesday, May 14, 2008

1.0

of

A

hexainf@hotmail.com gratuito - free of charge.

B

C

D

E

0308_Change R294 and R295 from 0 ohm to bead, C363 from 10uF to 680pF, C365 and C368 from 0.1uF to 680p

In order for the modem wake on ring feature to function, the CODEC must be powered by a rail that is not removed when the system is in standby.

R333

1 1

CX20548

2 2

+3VS

+3VALW

+3VDD_CODEC

12

R611

4.7K_0603_5%

@

12

R723

3.9K_0603_1%

@

AMOM DAA

1 2

MBV2012301YZF_0805

R722

1 2

MBV2012301YZF_0805

@

R611

0_0603_5%

PM@

HDA_RST_CODEC#<8,16,27>

HDA_BITCLK_CODEC<8,16,27>

HDA_SYNC_CODEC<8,16,27>

HDA_SDIN2<27> HDA_SDOUT_CODEC<8,16,27>

DIBP_HS DIBN_HS

1

2

C478

+1.5VS

R387 0_0402_5%R387 0_0402_5%

1 2

R394 0_0402_5%R394 0_0402_5%

1 2

2

C475

1U_0603_10V4Z

680P_0402_50V7K

1

C477

2

1 2

R610 0_0402_5%GM@R610 0_0402_5%GM@

R666 33_0402_5%R666 33_0402_5%

1 2

R659 33_0402_5%R659 33_0402_5%

1 2

R667 33_0402_5%R667 33_0402_5%

1 2

R323 33_0402_5%R323 33_0402_5%

1 2

R668 33_0402_5%R668 33_0402_5%

1 2

C497

0.1U_0402_16V4Z

DIBP_C DIBN_C

PC_BEEP

680P_0402_50V7K

C481

1

2

1

2

PC_BEEP dB control

1 2

R369 10K_0402_5%R369 10K_0402_5%

1 2

R359 10K_0402_5%R359 10K_0402_5%

HDA_BITCLK_CODEC

12

R327

47_0402_5%

1

C458

33P_0402_50V8K

3 3

0216_Change value.

2

EAPD<35>

DIGITAL ANALOG

C553

1 2

0.1U_0402_16V4Z

C565

1 2

0.1U_0402_16V4Z

C490

1 2

0.1U_0402_16V4Z

C480

1 2

0.1U_0402_16V4Z

R443

1 2

0_0402_5%

R446

1 2

0_0402_5%

4 4

Place these C and R around AGND and DGND, then choose the one which is close to Codec to populate

R454

1 2

A

0_0402_5%

GNDAGND

AUDIO CODEC

1

2

C479

C491

0.1U_0402_16V4Z

@ C479

@

10U_0805_10V4Z

U15

11

RESET#

6

BIT_CLK

10

SYNC

8

SDATA_IN

5

SDATA_OUT

43

DIB_P

42

DIB_N

12

PC_BEEP

48

S/PDIF

45

GPIO2

46

GPIO1

47

EAPD/GPIO0

1

DMIC_CLOCK

2

DMIC_1/2

BEEP#<35>

C452

0.1U_0402_16V4Z@

SB_SPKR<28>

For Layout:

Place decoupling caps near the power pins of SmartAMC device.

+3VAMP_CODEC+3VDD_CODEC

1

680P_0402_50V7K

MIC_L

MIC_R MONO

VREF

FLY_P FLY_N

1

2

R313

C537

34 35

19 14 15

18 16 17

27 28

20 21

29 30 31

13 24 39

37 22

23 32 33

12

0.1U_0402_16V4Z

C536

2

B

1

2

1

2

1U_0603_10V4Z

C540

1

C541

2

10U_0805_10V4Z

0.1U_0402_16V4Z

MIC_C_BIAS

MIC_EXTL MIC_EXTR

MIC_INL MIC_INR

SENSE VC_REFA VREF_HI

VREF_LO

1 2

C533 1U_0603_10V4ZC533 1U_0603_10V4Z

+3VS

12

R347

R347 10K_0402_1%

10K_0402_1%

C465

12

1U_0603_10V4Z

R346

R346 10K_0402_1%

10K_0402_1%

1 2

R354 20K_0402_5%R354 20K_0402_5%

1

C

Q28

Q28 2SC2411KT146_SOT23-3

2SC2411KT146_SOT23-3

E

3

D10

@D10

@

RB751V_SOD323

2 1

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

1

2

0.1U_0402_16V4Z

9

4

3

44

VDD_IO

DVDD_44

DVDD_1-8

DVDD_3-3

DVSS_7

7

41

25

C456

1

1U_0603_10V4Z

2

1U_0603_10V4Z

B

C512

26

36

40

AVEE

PORTA_L

AVDD_26

AVDD_40

PORTA_R MICBIASB

PORTB_L

PORTB_R MICBIASC

PORTC_L

PORTC_R

PORTD_L

PORTD_R

STEREO_L

STEREO_R

SENSEA

VREF_LO

VREF_HI RESERVED_32 RESERVED_33

AVSS_3838DVSS_41

AVSS_25

CX20561-12Z_LQFP48_7X7

R318

1 2

12

560_0402_5%

C443

R317

1 2

12

560_0402_5%

10K_0402_5%

R395

12

MBV2012301YZF_0805

1 2

C524 4.7U_0805_10V4ZC524 4.7U_0805_10V4Z

R424

12

MBV2012301YZF_0805

@

1

2

1U_0603_10V4Z

C526

PC_BEEP1 PC_BEEP

Issued Date

+VDDA_CODEC

C496 2.2U_0603_16V6KC496 2.2U_0603_16V6K

1 2

C505 2.2U_0603_16V6K

1 2

@

C516 2.2U_0603_16V6KC516 2.2U_0603_16V6K

1 2

C525 2.2U_0603_16V6K

1 2

@

For Vista

1

C535

2

0.1U_0402_16V4Z

C485 1U_0603_10V4ZC485 1U_0603_10V4Z

12

R353

R353 20K_0402_5%

20K_0402_5%

1 2

2007/10/15 2008/10/15

C517

1

2

1U_0603_10V4Z

@

C

+3VS

HP_L <41> HP_R <41>

LINE_OUTL <31> LINE_OUTR <31>

1

C548

2

10U_0805_10V4Z

2.2kohm for MICL + MICR

4.7kohm for MICL or MICR

MIC_C_BIAS

12

R3854.7K_0402_5% R3854.7K_0402_5%

Compal Secret Data

Deciphered Date

W=40Mil

+3VAMP_CODEC

1K_0402_5%

R3802.2K_0402_5%@R3802.2K_0402_5%

@

1 2

@

12 12

@

1 2

R701 100_0402_5%R701 100_0402_5% R702 100_0402_5%

R702 100_0402_5%

R392 5.1K_0402_1%R392 5.1K_0402_1%

R391 5.1K_0402_1%R391 5.1K_0402_1%

R386 20K_0402_5%R386 20K_0402_5%

CX20548 AMOM DAA

330P 3KV J NPO 1808 X2Y3

D

+5VALW

@

1 2

C571 0.1U_0402_16V4Z

SUSP#<35,40,41,42,46,48,49,50>

R656

1 2

R5882.2K_0402_5%@R5882.2K_0402_5%

R4054.7K_0402_5% R4054.7K_0402_5%

1 2

C783

1 2

RING_1

C797

1

2

U21

1

VIN

2

GND SHDN#3BP

APE8805A-33Y5P_SOT23-5

@

1

2

10U_0805_10V4Z

EXT_MIC_L <41> EXT_MIC_R <41>

INT_MICL <31> INT_MICR

OUT

0.1U_0402_16V4Z

external MIC

Internal MIC / Array MIC

5

4

C558

@

+VDDA_CODEC

1

C555

0.1U_0402_16V4Z

2

1

2

Internal WOOFER

Internal SPKR.

+3VAMP_CODEC

JACK_PLUG_HP <41>

JACK_PLUG_MIC <41>

port A : 5.11K ohm port B : 10.0K ohm port C : 20.0K ohm port D : 39.2K ohm

330P 3KV J NPO 1808 X2Y3

TIP_1

C798

Title

Size Document Number Rev

Custom

Date: Sheet

Port A

Port C

JRJ11

RING_1 TIP_1

JRJ11

1

2

3

GND1

4

GND2

FOX_JM74613-P2002-7F

ME@

Compal Electronics, Inc.

CX20561-AMOM Codec

JIWA3/A4_LA4212P

CODEC POWER

(3.33V) 250mW

1

C562

4.7U_0805_10V4Z

@

2

@

1.0

30 53Monday, May 12, 2008

E

1.0

of

A

hexainf@hotmail.com gratuito - free of charge.

B

C

D

E

+5VAMP +5VS

2

1

C689

0.1U_0402_16V4Z

1 1

Speaker Amplifier

1nd = APA2031 (SA00001RZ00)

+5VAMP +5VAMP

0.1U_0402_16V4Z

2nd = G1431F2U (SA000012Y00)

R401

100K_0402_1%

1 2

R398

100K_0402_1%

@

1 2

+3VALW

GAIN1GAIN0

+5VAMP

R397

@ R397

@

100K_0402_1%

1 2

R400

100K_0402_1%

1 2

1

2

GAIN0 GAIN1 0 0 6dB 0 1 10dB 1 0 15.6dB 1 1 21.6dB

W=40mil

R439

10K_0402_5%

SHUTDOWN#

LOUTROUTLOUT+

ROUT+

GND GND GND GND GND

BYPASS

10K_0402_5%

12

NC

19 8 14 4 18 1

11 13 20 21 10

@

1 2

R441

1

C523

4.7U_0805_10V4Z

2

1 2

0_0402_5%

EC_MUTE#AMP_OFF# SPKL-O SPKR-O SPKL+O

SPKR+O

20mil

1

C569

2

@

C569

4.7U_0805_10V4Z

2

12

R417

10K_0402_5%

@

C550

C550 C570

C570

12

R451

10K_0402_5%

0.1U_0603_25V7K

1 2

0.1U_0603_25V7K

1 2

0.1U_0603_25V7K

2

C506

1

GAIN0 GAIN1

LIN RIN

C507

C527

0.1U_0402_16V4Z

2 2

0.1U_0402_16V4Z

R409 0_0402_5%R409 0_0402_5%

LINE_OUTL<30> LINE_OUTR<30>

R455

1 2 1 2

0_0402_5%

0.1U_0603_25V7K

2

1

U18

16

VDD

6

PVDD

15

PVDD

2

GAIN0

3

GAIN1

5

LIN-

17

RIN-

9

LIN+

7

RIN+

APA2031RI-TRL_TSSOP20

L27

1 2

FBMA-L11-160808-700LMT_0603

C686

C686 10U_0805_10V4Z

10U_0805_10V4Z

EC_MUTE# <35>

INT MIC

SPKL+O SPKL-O SPKR+O SPKR-O

R413 0_0402_5%R413 0_0402_5%

1 2

R412 0_0402_5%R412 0_0402_5%

1 2

R435 0_0402_5%R435 0_0402_5%

1 2

R436 0_0402_5%R436 0_0402_5%

20mil

1 2

Speaker Conn.

JMIC2

MOLEX_53780-0270

ME@

GND GND

JP10

C557 22P_0402_50V8J@C557 22P_0402_50V8J@

R414

R414 0_0402_5%

0_0402_5%

@

JP10

4

3

2

1

ACES_85204-0400N

ME@

INT_MICL <30>

SPK_L1+ SPK_L1SPK_R1+ SPK_R1-

C556 22P_0402_50V8J@C556 22P_0402_50V8J@

C543 22P_0402_50V8J@C543 22P_0402_50V8J@

C544 22P_0402_50V8J@C544 22P_0402_50V8J@

1

2

GNDA

INT_MICL

1

C742

C742 47P_0402_50V8J

47P_0402_50V8J

2

GNDA

INT_MICL

D30

2 3

PJMBZ6V8_SOT23-3

1

2

3 4

1

2

12

1

3 3

4 4

Security Classification

A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

2008/10/152007/10/15

D

Title

Size Document Number Rev

Custom

Date: Sheet

Compal Electronics, Inc.

AMP/VR/Audio Jack/MIC

JIWA3/A4_LA4212P

E

of

31 53Monday, May 12, 2008

1.0

A

hexainf@hotmail.com gratuito - free of charge.

Mini-Express Card for 3G Or TV Tuner

Mini-Express Card for WLAN

+3VS

1

C734

4.7U_0805_10V4Z

1 1

2

WLAN@

1

C704

0.1U_0402_16V4Z

2

WLAN@

Mini-Express Card(Slot 1-WLAN)

ICH_PCIE_WAKE#<28,33,40>

WLAN_CLKREQ#<22>

CR#_G

2 2

+3VS

+3VALW

R711 0_0402_5%

R711 0_0402_5% R712 0_0402_5%

R712 0_0402_5%

ICH_PCIE_WAKE# WLAN_ACTIVE

WLAN_CLKREQ#

SRC9

WLAN@

1 2

@

1 2

2005/09/27 modified. Base on OPTION GTM351E Datasheet Rev0.1

Vcc 3.3V +/- 8% Peak Icc 2750mA with max supply droop 50mA Average Icc 1000mA

R569 0_0402_5%@ R569 0_0402_5%@

1 2

R565 0_0402_5%@ R565 0_0402_5%@

1 2

CLK_PCIE_WLAN#<22>

CLK_PCIE_WLAN<22>

PCIE_RXN3<28> PCIE_RXP3<28>

PCIE_TXN3<28> PCIE_TXP3<28>

R710 0_0402_5%

WLAN@

R713 0_0402_5%

WLAN@

1 2

+1.5VS

1

C729

4.7U_0805_10V4Z

2

WLAN@

11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51

53

B

1

2

WLAN@

JP22

1

3

5

7

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

28

29

30

31

32

33

34

35

36

37

38

39

40

41

42

43

44

45

46

47

48

49

50

51

52

GND1

GND2

FOX_AS0B226-S56N-7F

ME@

C732

0.1U_0402_16V4Z

2

4

6

8

10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42

(WWAN_LED#)

44 46 48 50 52

54

1

C709

0.1U_0402_16V4Z

2

WLAN@

R596 0_0402_5%@R596 0_0402_5%@

R592

R537 0_0402_5%@R537 0_0402_5%@

1 2

R534 0_0402_5%@R534 0_0402_5%@

1 2

@ R523

@

R708

R708 R709

1 2

0_0402_5%WLAN@

1 2

R523

1 2

100K_0402_5%

C

@

1 2

0_0402_5%

1 2

0_0402_5%

WLAN@R709

WLAN@

12

J3 JOPENJ3 JOPEN

WL_OFF#

PLT_RST# <8,16,26,33,36,40>

R552

R552 R555

USB20_N8 <28> USB20_P8 <28>

1 2

R525 0_0402_5%

WLAN@

+5VS

+3VALW

1

C725

WLAN@C725

WLAN@

0.1U_0402_16V4Z

2

+3VALW +3VS +1.5VS

2Watt

3G_OFF#

WL_OFF# <35>

@

1 2

0_0402_5%

1 2

0_0402_5%

@R555

@

ICH_SMBCLK <22,28,40> ICH_SMBDATA <22,28,40>

WLAN_LED# <38>

+3VALW +3VS

D

+5VS

12

R246

R246 10K_0402_1%

10K_0402_1%

BT@

1

OUT

BT_OFF#<35>

2

BT_LED#<38>

DTC124EKAT146_SC59-3

BT@

IN

Q17

Q17 DTC124EKAT146_SC59-3

DTC124EKAT146_SC59-3

GND

3

1

Q16

BT@

3

OUT

GND

2

IN

12

BT MODULE CONN

SI2301BDS-T1-E3_SOT23-3

+3VS

USB20_N6<28> USB20_P6<28>

R245

R245 10K_0402_5%

10K_0402_5%

@

Q18

S

G

2

USB20_N6

USB20_P6 BTON_LEDBT_ACTIVE BT_ACTIVE WLAN_ACTIVE

BT@

D

13

E

+3VS_BT

C409

0.1U_0402_16V4Z

BT@

10

MOLEX_53780-0870

12

JP7

1

2

3

4

5

6

7

8

9

GND1 GND2

ME@

3 3

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2007/10/15 2008/10/15

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

D

Date: Sheet

Compal Electronics, Inc.

Mini-Card/3G/FeliCa/BT

JIWA3/A4_LA4212P

E

32 53Tuesday, May 20, 2008

1.0

of

5

hexainf@hotmail.com gratuito - free of charge.

Layout Notice : Filter place as close chip as possible.

+2.5V_LAN

D D

C C

B B

A A

L4

FBM-L11-160808-601LMT_0603

+1.2V_LAN

L30 FBM-L11-160808-601LMT_0603L30 FBM-L11-160808-601LMT_0603

L6 FBM-L11-160808-601LMT_0603L6 FBM-L11-160808-601LMT_0603

L31 FBM-L11-160808-601LMT_0603L31 FBM-L11-160808-601LMT_0603

L5 FBM-L11-160808-601LMT_0603L5 FBM-L11-160808-601LMT_0603

Layout Notice : Place as close chip as possible.

0.1U_0402_16V4Z

0.1U_0402_16V4Z C52

C52

12

0.1U_0402_16V4Z

L7

12

0.047U_0402_16V4Z

L8

12

1U_0603_10V4Z

4.7U_0805_10V4Z

C64

4.7U_0805_10V4Z

1U_0603_10V4Z

+2.5V_LAN

2

C54

1

10U_0805_10V4Z

C56

C68

0.047U_0402_16V4Z

12

1

C73

2

12

2

C72

1

12

2

1

12

1

C69

2

C44

2

1

2

1

21.5

2

1

+LAN_BIASVDD

1

2

0.1U_0402_16V4Z

+XTALVDD

2

C76

1

C71

0.1U_0402_16V4Z

+AVDDL

2

C75

0.1U_0402_16V4Z

1

+GPHY_PLLVDD

2

C70

0.1U_0402_16V4Z

1

+PCIE_PLLVDD

2

C63

0.1U_0402_16V4Z

1

+PCIE_VDD

2

C60

0.1U_0402_16V4Z

1

+LAN_AVDD

1

C74

0.01U_0402_16V7K

2

EN_WOL<35>

(CLKREQ#) and (ENERGY_DET) are only supported in BCM5787M

2

C42

1

27P_0402_50V8J

R39

Y1

1 2

25MHZ_20P

2N7002_SOT23

200_0402_1%

12

EN_WOL

4

L3

@L3

@

FBM-L11-321611-260-LMT_1206

1 2

R25

R25 33K_0402_5%

33K_0402_5%

+3V_LAN

PCI_CBE#3<26>

PCIE_TXN6<28> PCIE_TXP6<28>

PCIE_RXN6<28>

PCIE_RXP6<28>

PLT_RST#<8,16,26,32,36,40>

1 2

R33 4.7K_0402_5%@R33 4.7K_0402_5%@

1 2

R32 4.7K_0402_5%@R32 4.7K_0402_5%@

+3VALW

+3VS +3VS

2

C34

0.1U_0402_16V4Z

1

0.1U_0402_16V7K

+3V_LAN +3V_LAN

+3V_LAN

+5VALW

12

13

D

2

Q8

G

S

CLK_PCIE_LAN#<22>

CLK_PCIE_LAN<22> CLKREQ_LAN#<22>

ICH_PCIE_WAKE#<28,32,40> LAN_WAKE#<35>

XTALO

XTALI

2

C43

1

27P_0402_50V8J

D

S

D

S

Q7

1 3

AO3414_SOT23-3

G

2

1 2

R35 0_0402_5%@R35 0_0402_5%@

1 2

R52 1K_0402_5%R52 1K_0402_5%

1 2

R49 1K_0402_5%R49 1K_0402_5%

R40

1 2

0_0402_5%@

+GPHY_PLLVDD

PCIE_MRX_C_LTX_N6

C57

PCIE_MRX_C_LTX_P6

C59

@

1 2

R31 0_0402_5%

1 2

R42 47K_0402_5%@R42 47K_0402_5%@

1 2

R44 47K_0402_5%@R44 47K_0402_5%@

1 2

R34 0_0402_5%R34 0_0402_5%

LAN_WP GPIO2

1 2

R41 0_0402_5%@R41 0_0402_5%@

XTALI XTALO

3

Layout Notice : Place as close chip as possible.

+3V_LAN

2

C32

1

10U_0805_10V4Z

U1U1

28 29 11

3 53 54

59 35 32 31 25 26

10 12

58 57

4

7

8

9

21 22

16 24

2

C62

C55

1

0.1U_0402_16V4Z

PCIE_REFCLK_N PCIE_REFCLK_P CLKREQ

LOW PWR VMAIN_PRSNT VAUX_PRSNT

ENERGY_DET GPHY_PLLVDD PCIE_RXD_N PCIE_RXD_P PCIE_TXD_N PCIE_TXD_P

PERST WAKE

SMB_CLK SMB_DATA

GPIO_0(SERIAL_DO) GPIO_1(SERIAL_DI) GPIO_2 UART_MODE

XTALI XTALO

REG_GND PCIE_GND

SPD100LED SPD1000LED TRAFFICLED

SCLK(EECLK)

SO(EEDATA)

REGCTL12 REGCTL25

PCIE_PLLVDD

GND

69

1

C81

C81 1U_0603_10V4Z

1U_0603_10V4Z

2

TRD0_N TRD0_P TRD1_N TRD1_P TRD2_N TRD2_P TRD3_N TRD3_P

LINKLED

RDAC

XTALVDD

VDDIO VDDIO VDDIO VDDIO VDDIO

VDDP VDDP

VDDC VDDC VDDC VDDC VDDC VDDC

BIASVDD

PCIE_VDD PCIE_VDD

AVDD AVDD AVDD

AVDDL AVDDL AVDDL AVDDL

LAN_TX0-

41

LAN_TX0+

40

LAN_RX1-

42

LAN_RX1+

43 48

T20T20

47

T18T18

49

T21T21

50

T19T19

R36 0_0402_5%R36 0_0402_5%

1 2

2

R37 0_0402_5%R37 0_0402_5%

1

1 2

R38 0_0402_5%@R38 0_0402_5%@

67

1 2

66

LAN_CLK

65

SI

63

SI

CS

4.7K_0402_5%

LAN_DATA

64

CS#

62

CTL12

14

CTL25

18 37

1 2

R56 1K_0402_5%R56 1K_0402_5%

23

+XTALVDD

6 15 19 56 61

17

+2.5V_LAN

68 5

+1.2V_LAN

13 20 34 55 60

+LAN_BIASVDD

36 30

+PCIE_PLLVDD

27

+PCIE_VDD

33 38

+LAN_AVDD

45 52

39

+AVDDL

44 46 51

12

R28

LAN_WP LAN_CLK LAN_DATA

LAN_TX0- <34> LAN_TX0+ <34> LAN_RX1- <34> LAN_RX1+ <34>

+3V_LAN

12

R27

4.7K_0402_5%

LAN_CLK

1 2

R30 4.7K_0402_5%R30 4.7K_0402_5%

2

1 2

C38

0.1U_0402_16V4Z

U2

8

VCC

7

WP

6

SCL

5

SDA

AT24C02_SO8

Layout Notice : 1.2V filter. Place as close chip as possible.

+1.2V_LAN

2

C77

4.7U_0805_10V4Z

LINKLED# <34>

ACTIVITY# <34>

2

1

2

C67

C49

1

0.1U_0402_16V4Z

CTL12

Notice : 4.7u 6.3V capactor Thickness 1.25mm

Layout Notice : Filter place as close chip as possible.

1

A0

2

A1

3

NC

4

GND

C46

CTL25

0.1U_0402_16V4Z

2

1

Q6

+2.5V_LAN

C58

+3V_LAN

2

C45

C65

1

0.1U_0402_16V4Z

C53 0.1U_0402_16V4ZC53 0.1U_0402_16V4Z

MMJT9435T1G_SOT223

2 3

4

Q9

MBT35200MT1G_TSOP6

3

2

1

0.1U_0402_16V4Z

1 2

+3V_LAN

1

+1.2V_LAN

41

256

1

C61

C61 10U_0805_10V4Z

10U_0805_10V4Z

2

5

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2007/10/15 2008/10/15

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

2

Date: Sheet

BCM5787MKML

JIWA3/A4_LA4212P

1

1.0

33 53Monday, May 12, 2008

1.0

of

5

hexainf@hotmail.com gratuito - free of charge.

4

3

2

1

+2.5V_LAN

EMI request

C602 0.1U_0402_16V4ZC602 0.1U_0402_16V4Z

1 2

D D

C607 0.1U_0402_16V4ZC607 0.1U_0402_16V4Z

1 2

C601 0.1U_0402_16V4Z

1 2

@

Change C468,C470,C473,C474,C475,C476 from 0.01uF to 0.1uF

C C

12

R476

R476 0_0402_5%

0_0402_5%

LAN_RX1+<33>

LAN_RX1-<33>

LAN_TX0+<33>

LAN_TX0-<33>

LAN_RX1-

R475 49.9_0402_1%R475 49.9_0402_1%

LAN_RX1+

R472 49.9_0402_1%R472 49.9_0402_1%

LAN_TX0-

R478 49.9_0402_1%R478 49.9_0402_1%

LAN_TX0+

R477 49.9_0402_1%R477 49.9_0402_1%

U25

LAN_RX1+

LAN_RX1-

LAN_TX0+ LAN_TX0- MDO0-

12 12

C600

1 2

C610

1 2

TCT

0.1U_0402_16V4Z

U25

1

RD+

2

RD-

3

CT

4

NC

5

NC

6

CT

7

TD+ TD-8TX-

350uH_NS0013LF

RX+

TX+

+3V_LAN

220P_0402_25V8J

RX-

CT NC NC CT

MCT0

14 13 12

MCT1

11

MDO0+

10 9

R72 75_0402_5%R72 75_0402_5%

R76 75_0402_5%R76 75_0402_5%

12

MDO1+

16

MDO1-

15

220P_0402_25V8J

+3V_LAN

220P_0402_25V8J

C88

ACTIVITY#<33>

2

C80

1

LINKLED#<33>

1

2

RJ45 CONN

R67

330_0402_5%

12

MDO1-RJ45_PR

MDO1+ MDO0MDO0+

R92

330_0402_5%

12

RJ45_PR

1 2

C85

1000P_1206_2KV7K

JRJ45

12

Amber LED-

11

Amber LED+

8

PR4-

7

PR4+

6

PR2-

5

PR3-

4

PR3+

3

PR2+

2

PR1-

1

PR1+

10

Green LED-

9

Green LED+

FOX_JM36113-P2221-7F

ME@

R669

R669 0_0402_5%

0_0402_5%

1 2

SHLD4 SHLD3

SHLD2

SHLD1

16 15

14

13

near LAN controller

B B

A A

Security Classification

5

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2007/10/15 2008/10/15

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

LAN CONTROLLER

JIWA3/A4_LA4212P

34 53Monday, May 12, 2008

1

1.0

of

L23

hexainf@hotmail.com gratuito - free of charge.

L23

+3VALW +EC_AVCC

+3VALW

100_0402_5%

4.7K_0402_5%

0.1U_0402_16V4Z

LAN_WAKE#<33>

PCI_PME#<26>

+3VALW

+5VALW

+3VS

1 2

FBM-11-160808-601-T_0603

0.1U_0402_16V4Z

1 2

L24 FBM-11-160808-601-T_0603L24 FBM-11-160808-601-T_0603

12

C538 22P_0402_50V8J@C538 22P_0402_50V8J@

1 2

R388 47K_0402_5%R388 47K_0402_5%

0.1U_0402_16V4Z

+3VS

R716

ENE@

R609

C790

@

1 2

R379 100K_0402_1%@R379 100K_0402_1%@

1 2

R399 100K_0402_1%@R399 100K_0402_1%@

1 2

R292 10K_0402_5%@R292 10K_0402_5%@

1 2

R294 6.8K_0402_5%R294 6.8K_0402_5%

1 2

R293 6.8K_0402_5%R293 6.8K_0402_5%

1 2

R258 4.7K_0402_5%R258 4.7K_0402_5%

1 2

R259 4.7K_0402_5%R259 4.7K_0402_5%

1 2

@

1 2

2

1

+3VALW

R717

R717 100_0402_5%

100_0402_5%

ENE@

1 2

ESB_CK ESB_DA

R608

4.7K_0402_5%

@

1 2

0.1U_0402_16V4Z

2

C791

0.1U_0402_16V4Z

1

@

1 2

R421 0_0402_5%R421 0_0402_5%

1 2

R422 0_0402_5%@R422 0_0402_5%@

S

FRD#SPI_SO FSEL#SPICS#

KSO17

EC_SMB_CK1 EC_SMB_DA1

EC_SMB_CK2 EC_SMB_DA2

100P_0402_50V8J@

2

C432

1

KB_RST#<27>

C509

4.7K_0402_5%

D

13

@

G

2N7002_SOT23

2

C416

ECAGND

2

1

R718

C793

@

Q31

@

+3VALW

1

2

1 2

2

1

1 2

1

1000P_0402_50V7K

2

12

R40310_0402_5%@R40310_0402_5%@

KSO[0..15]<37>

EC_SMB_CK1

1 2 2

0.1U_0402_16V4Z

1

R404

R404 10K_0402_5%

10K_0402_5%

1

C415

2

C437

D23

2 1

RB751V_SOD323

KSI[0..7]<37>

EC_SMB_DA1

R719

4.7K_0402_5%

@

C794

@

EC_SMB_CK1<45> EC_SMB_DA1<45>

EC_PME#

100P_0402_50V8J@

C513

0.1U_0402_16V4Z

C513

0.1U_0402_16V4Z

1

2

GATEA20<27>

LPC_FRAME#<27,37>

CLK_PCI_LPC<22>

PCI_RST#<26,37>

EC_SCI#<28>

PWR_LED_SC#

KSO[0..15] KSI[0..7]

EC_SMB_CK1 EC_SMB_DA1

EC_SMB_CK2<5,16,41> EC_SMB_DA2<5,16,41>

SLP_S3#<28> SLP_S5#<28>

EC_SMI#<28> LID_SW#<41> ESB_CK<41> ESB_DA<41>

KILL_SW#<43>

FAN_SPEED1<5>

EC_TX_P80_DATA<14,15,37> EC_RX_P80_CLK<14,15,37>

ON/OFF#<41>

NUM_LED#<38>

C514

15P_0402_50V8J

C531

0.1U_0402_16V4Z

C531

0.1U_0402_16V4Z

C530

0.1U_0402_16V4Z

C530

0.1U_0402_16V4Z

1

2

SERIRQ<28,37>

LPC_AD3<27,37> LPC_AD2<27,37> LPC_AD1<27,37> LPC_AD0<27,37>

KSI0<37>

KSI3<37> KSI4<37>

KSO14<37>

KSO15<37>

KB_RST#_EC

LPC_AD3 LPC_AD2 LPC_AD1 BATT_TEMP LPC_AD0

EC_RST# EC_SCI#

KSI0 KSI1 KSI2 KSI3 KSI4 KSI5 KSI6 KSI7 KSO0 KSO1 KSO2 KSO3 KSO4 KSO5 KSO6 KSO7 KSO8 KSO9 KSO10 KSO11 KSO12 KSO13 KSO14 KSO15 KSO16

KSO17

L47 MBC1608121YZF_0603L47 MBC1608121YZF_0603 L48 MBC1608121YZF_0603L48 MBC1608121YZF_0603

1 2 1 2

EC_SMB_CK2 EC_SMB_DA2

EC_SMI#

LID_SW#

ESB_CK

ESB_DA

FAN_SPEED1

EC_TX_P80_DATA EC_RX_P80_CLK

XCLKI XCLKO

XCLKO XCLKI

R393

1 2

20M_0603_5%@

2

1

IN

1

2

X1

32.768KHZ_12.5P_1TJS125BJ2A251

X1

0.1U_0402_16V4Z

4

OUT

NC3NC

C520

C448

1000P_0402_50V7K

C448

1000P_0402_50V7K

1

2

U17

1

GA20/GPIO00

2

KBRST#/GPIO01

3

SERIRQ#

4

LFRAME#

5

LAD3

7

LAD2

8

LAD1

10

LAD0

12

PCICLK

13

PCIRST#/GPIO05

37

ECRST#

20

SCI#/GPIO0E

38

CLKRUN#/GPIO1D

55

KSI0/GPIO30

56

KSI1/GPIO31

57

KSI2/GPIO32

58

KSI3/GPIO33

59

KSI4/GPIO34

60

KSI5/GPIO35

61

KSI6/GPIO36

62

KSI7/GPIO37

39

KSO0/GPIO20

40

KSO1/GPIO21

41

KSO2/GPIO22

42

KSO3/GPIO23

43

KSO4/GPIO24

44

KSO5/GPIO25

45

KSO6/GPIO26

46

KSO7/GPIO27

47

KSO8/GPIO28

48

KSO9/GPIO29

49

KSO10/GPIO2A

50

KSO11/GPIO2B

51

KSO12/GPIO2C

52

KSO13/GPIO2D

53

KSO14/GPIO2E

54

KSO15/GPIO2F

81

KSO16/GPIO48

82

KSO17/GPIO49

77

SCL1/GPIO44

78

SDA1/GPIO45

79

SCL2/GPIO46

80

SDA2/GPIO47

6

PM_SLP_S3#/GPIO04

14

PM_SLP_S5#/GPIO07

15

EC_SMI#/GPIO08

16

LID_SW#/GPIO0A

17

SUSP#/GPIO0B

18

PBTN_OUT#/GPIO0C

19

EC_PME#/GPIO0D

25

EC_THERM#/GPIO11

28

FAN_SPEED1/FANFB1/GPIO14

29

FANFB2/GPIO15

30

EC_TX/GPIO16

31

EC_RX/GPIO17

32

ON_OFF/GPIO18

34

PWR_LED#/GPIO19

36

NUMLED#/GPIO1A

122

XCLK1

123

XCLK0

KB926QFA1_LQFP128

2

C501

C501 15P_0402_50V8J

15P_0402_50V8J

1

1000P_0402_50V7K

1

2

LPC & MISC

C487

+3VALW

1

2

Int. K/B

Int. K/B Matrix

Matrix

SM Bus

+EC_AVCC

9

22

33

96

111

125

VCC

PWM Output

AD Input

DA Output

PS2 Interface

SPI Device Interface

SPI Flash ROM

GPIO

GPO

GPIO

GPI

GND

11

24

35

94

113

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

67

AVCC

INVT_PWM/PWM1/GPIO0F

BEEP#/PWM2/GPIO10

FANPWM1/GPIO12

ACOFF/FANPWM2/GPIO13

BATT_TEMP/AD0/GPIO38

BATT_OVP/AD1/GPIO39

ADP_I/AD2/GPIO3A

AD3/GPIO3B

AD4/GPIO42

SELIO2#/AD5/GPIO43

DAC_BRIG/DA0/GPIO3C

EN_DFAN1/DA1/GPIO3D

IREF/DA2/GPIO3E

DA3/GPIO3F

PSCLK1/GPIO4A PSDAT1/GPIO4B PSCLK2/GPIO4C PSDAT2/GPIO4D

TP_CLK/PSCLK3/GPIO4E

TP_DATA/PSDAT3/GPIO4F

SDICS#/GPXOA00 SDICLK/GPXOA01

SDIDO/GPXOA02

SDIDI/GPXID0

SPIDI/RD#

SPIDO/WR#

SPICLK/GPIO58

SPICS#

CIR_RX/GPIO40

CIR_RLC_TX/GPIO41

FSTCHG/SELIO#/GPIO50

BATT_CHGI_LED#/GPIO52

CAPS_LED#/GPIO53

BATT_LOW_LED#/GPIO54

SUSP_LED#/GPIO55

SYSON/GPIO56

VR_ON/XCLK32K/GPIO57

AC_IN/GPIO59

EC_RSMRST#/GPXO03 EC_LID_OUT#/GPXO04

EC_ON/GPXO05

EC_SWI#/GPXO06

ICH_PWROK/GPXO06

BKOFF#/GPXO08

WL_OFF#/GPXO09

GPXO10 GPXO11

PM_SLP_S4#/GPXID1

ENBKL/GPXID2

GPXID3 GPXID4 GPXID5 GPXID6 GPXID7

V18R

AGND

69

ECAGND

Issued Date

INVT_PWM

21

BEEP#

23 26

ACOFF

27

63

BATT_OVP

64 65

BRD_ID

66

TSATN#_EC

75 76

DAC_BRIG

68

EN_FAN1

70

IREF

71 72

83

USB_ON

84 85 86

TP_CLK

87

TP_DATA

88

97 98

UMA_DIS

99 109

FRD#SPI_SO

119

FWR#SPI_SI

120

SPI_CLK

126

FSEL#SPICS#

128

73 74 89 90 91 92 93 95 121 127

100 101 102 103 104 105 106 107 108

110 112 114 115 116 117 118

124

I2C_INTE

CHARGE_LED0#

CAPS_LED#

CHARGE_LED1#

SYSON

ACIN

EC_LID_OUT#

EC_ON MODULE_ID ICH_POK_EC ICH_POK

BKOFF#

EC_THERM#

SUSP#

PBTN_OUT#

no used at B-test

1

4.7U_0805_10V4Z

2

2007/10/15 2008/10/15

INVT_PWM <24> BEEP# <30> NOVO# <41> ACOFF <44,46>

BATT_TEMPA <45>

BATT_OVP <46> ADP_I <46>

@

1 2

R382 0_0603_5%

DAC_BRIG <24> EN_FAN1 <5> IREF <46> BT_OFF# <32>

EC_MUTE# <31>

USB_ON <43> TP_LED# <38>

TP_CLK <37>

TP_DATA <37>

R325 4.7K_0402_5%

EN_WOL <33> CMOS_OFF# <40>

FRD#SPI_SO <38>

FWR#SPI_SI <38>

SPI_CLK <38>

FSEL#SPICS# <38>

I2C_INT <41>

FSTCHG <46>

CHARGE_LED0# <38>

CAPS_LED# <38>

CHARGE_LED1# <38>

PWR_LED# <38>

SYSON <40,42,48> VR_ON <51> ACIN <28,44>

EC_RSMRST# <28> EC_LID_OUT# <28> EC_ON <41,46>

BKOFF# <24> WL_OFF# <32>

SCROLL_LED# <38>

SLP_S4# <28> ENBKL <24> EAPD <30> EC_THERM# <28>

SUSP# <30,40,41,42,46,48,49,50>

PBTN_OUT# <28>

C511

ENE suggesttion at C0 revision

Compal Secret Data

TSATN# <8>

for G sensor

EC_MUTE#

1 2

R300 10K_0402_5%@R300 10K_0402_5%@

USB_ON

@

1 2

+3VALW +3VS

D12 RB751V_SOD323D12 RB751V_SOD323

1 2

R340 0_0402_5%

Deciphered Date

R583

R583 10K_0402_5%

10K_0402_5%

1 2

I2C_INTE

21

@

BATT_OVP

C744 100P_0402_50V8JC744 100P_0402_50V8J

BATT_TEMP

ACIN

R339 10K_0402_5%R339 10K_0402_5%

1 2

C745 100P_0402_50V8JC745 100P_0402_50V8J

1 2

C746 100P_0402_50V8JC746 100P_0402_50V8J

1 2

+3VALW

12

R29110K_0402_5% R29110K_0402_5%

KB925 SPI STRAP PIN unpoped for C0 version 11/16

Analog Board ID definition, Please see page 3.

R616

R616 10K_0402_5%

10K_0402_5%

1 2

ICH_POK <8,28>

1 2

+3VS

Module ID

+3VALW +3VALW

UMA VGA

1 2 3 4

+3VALW

Vab

0

8.2K 18K 33K 56K

100K 200K

NC

12

R308

100K_0402_1%

1 2

R321

100K_0402_1%@

1 2

0.25V

0.50V

0.82V

1.19V

1.65V

2.20V

3.30V

C418

0.1U_0402_16V4Z

1 2

@

U12

Vab

EC_SMB_CK1 EC_SMB_DA1

TP_CLK TP_DATA

@ R342

@

10K_0402_1%

1 2

MODULE_ID

0_0402_5%

1 2

R342

R341

8 7 6 5

AT24C16AN-10SU-2.7_SO8

1 2

R299 4.7K_0402_5%R299 4.7K_0402_5%

1 2

R298 4.7K_0402_5%R298 4.7K_0402_5%

+3VALW+3VALW

Vab

VCC WP SCL SDA

@

GM@ R330

GM@

10K_0402_1%

1 2

UMA_DIS

PM@ R329

PM@

0_0402_5%

1 2

+5VS

R330

R329

GND

A0 A1 A2

UMA_DIS

H

L

ID

021

J

0

I

W

T

1

R

A

1

2

R

A 2

3

J

4

I W

5

A 3

6

A 4

BRD ID

R01 (EVT) R02 (DVT) R03 (PVT) R10A (MP) R01 (EVT) R02 (DVT) R03 (PVT) R10A (MP)7

R54/42(Rb) Vab

R537/541(Ra)=100K Ohm

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

Compal Electronics, Inc.

BIOS & EC I/O Port

JIWA3/A4_LA4212P

35 53Tuesday, May 20, 2008

of

R265

R265 100K_0402_1%

100K_0402_1%

@

R273

R273 100K_0402_1%

100K_0402_1%

@

BRD_ID

1

C442

2

0.1U_0402_16V4Z

0V

1.0

5

hexainf@hotmail.com gratuito - free of charge.

4

3

2

1

CARD@

R670

1 2

0_0805_5%

S

Q34

Q34 AO3413_SOT23-3

AO3413_SOT23-3

D

@

1 3

CR1_CD0N CR1_CD1N

+CR1_POWER

Need check CLK GEN & SB select pin & page

CLK_PCIE_CARD#<22>

CLK_PCIE_CARD<22>

PCIE_TXN1<28>

PCIE_TXP1<28>

PCIE_RXN1<28> PCIE_RXP1<28>

PLT_RST#<8,16,26,32,33,40>

CLK_PCIE_CARD# CLK_PCIE_CARD

PCIE_TXN1 PCIE_TXP1

PCIE_RXN1 PCIE_RXP1

+3VS_CARD

PLT_RST#

D D

CR1_PCTLN

Reserve circuit for new version not ready & debugging

+3VS_CARD

C C

JMB385 Operation Modes

+3VS_CARD +3VS_CARD

12

1K_0402_1%

1K_0402_1% R627

R627

1

C755

@

2

0.1U_0402_16V4Z

CARD@

R629 4.7K_0402_5%

1 2

CARD@

R630 4.7K_0402_5%

1 2

Normal

@

G

2

0XTEST

CR1_CD0NXX

+3VS_CARD+3VS

CARD@

C756 0.1U_0402_10V7K

12

C757 0.1U_0402_10V7K

12

CARD@

R633 1K_0402_5%

1 2

CARD@

R628

1 2

8.2K_0402_5%CARD@

1

C762

@

2

0.1U_0402_16V4Z

CR1_CD1N

CR1_CD0N

CR1_PCTLN

CR1_CD1N

+CR1_POWER

CARD@

R631 10K_0402_5%

1 2

CARD@

R632 10K_0402_5%

1 2

B B

+3VS_CARD

CARD@

R634 10K_0402_1%

1 2

CARD@

R635 200K_0402_1%

1 2

CARD@

R636 200K_0402_1%

1 2

CARD@

CR1_PCTLN CR1_POWER

A A

Use 0805 type and over 20 mils trace width on both side

CARD@

R637

1 2

0_0805_5%

CARD@

10U_0805_10V4Z

C764

MDIO6 MDIO13

+1.8VS_CARD

CARD@

1

2

C766

1

2

1

2

@

CARD@

0.1U_0402_16V4Z

0.1U_0402_16V4Z C760

C760

1

CARD@

C761

1000P_0402_50V7K

2

+1.8VS_CARD

1

C767

0.1U_0402_16V4Z

2

@

1

C759

MDIO7 MDIO12 MDIO14

+CR1_POWER

1

CARD@

C765

0.1U_0402_16V4Z

2

C759

CARD@

10U_0805_10V4Z

0.1U_0402_16V4Z

CARD@

2

C763

0.1U_0402_16V4Z

Card Reader power circuit

5

4

+1.8VS +1.8VS_CARD

U39

3 4

9 8

PCIE_C_RXN1

11

PCIE_C_RXP1

12

PREXT

7

38

T102T102

39

1

GND MDIO10

2

T103T103

13

T104T104

14

15 16

17

T105T105

21

JMB385-LGEZ0A_LQFP48_7X7

CARD@

APCLKN APCLKP

APRXN APRXP

APTXN APTXP

APREXT

PCIES_EN PCIES

XRSTN XTEST

SEEDAT SEECLK

CR1_CD1N CR1_CD0N

CR1_PCTLN

CR1_LEDN

R642

0_0603_5%

@

JMB385

12

APVDD

APV18

TAV33

DV33 DV33 DV33 DV18 DV18

MDIO0 MDIO1 MDIO2 MDIO3 MDIO4 MDIO5 MDIO6 MDIO7 MDIO8

MDIO9 MDIO10 MDIO11 MDIO12 MDIO13 MDIO14

APGND

GND GND GND GND

5 10 30

19 20 44 18 37

MDIO0

48

MDIO1

47

MDIO2

46

MDIO3

45

MDIO4

43

MDIO5_C MDIO5

42

MDIO6

41

MDIO7

40

MDIO8

29

MDIO9

28 27

MDIO11

26

MDIO12

25

MDIO13

23

MDIO14

22 34

NC

35

NC

36

NC

GND

6 24

31 32 33

Close to PIN5

+3VS_CARD

1

C768

CARD@

0.1U_0402_16V4Z

1

C769

CARD@

0.1U_0402_16V4Z

2

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

+1.8VS_CARD +3VS_CARD +3VS_CARD

+1.8VS_CARD

R705 22_0402_5%

1 2

CARD@

1

C782

CARD@

2

0.1U_0402_16V4Z

R626 0_0402_5%

1 2

@

4 IN 1 CONN

1

@

XD Card PIN Name XD_DAT0

XD_DAT2

XD_WE# XD_CE# XD_WP# XD_CLE

XD_DAT5

XD_RE# XD_R/B# XD_ALE

JREAD1

33

CR1_CD1N

XD-VCC

8

XD-D0

9

XD-D1

26

XD-D2

27

XD-D3

28

XD-D4

30

XD-D5

31

XD-D6

32

XD-D7

6

XD-WE

7

XD-WP

5

XD-ALE

34

XD-CD-SW

1

XD-R/B

2

XD-RE

3

XD-CE

4

XD-CLE

13

4IN1-GND

22

4IN1-GND

T-SOL_144-3000000900_NR

D24

2 3

DAN202UT106_SC70-3

@

MS Card PIN Name MS_DAT0

MS_DAT2 MS_DAT3 XD_DAT3 MS_BS MSCCLK

MDIO0

R671 0_0402_5%@ R671 0_0402_5%@

1 2

MDIO1

R672 0_0402_5%@ R672 0_0402_5%@

1 2

MDIO2

R673 0_0402_5%@ R673 0_0402_5%@

1 2

MDIO3

R675 0_0402_5%@ R675 0_0402_5%@

1 2

MDIO8

R676 0_0402_5%@ R676 0_0402_5%@

1 2

MDIO9

R677 0_0402_5%@ R677 0_0402_5%@

1 2

MDIO10

R678 0_0402_5%@ R678 0_0402_5%@

1 2

MDIO11

R674 0_0402_5%@ R674 0_0402_5%@

1 2

MDIO4

R679 0_0402_5%@ R679 0_0402_5%@

1 2

MDIO6

R680 0_0402_5%@ R680 0_0402_5%@

1 2

MDIO14

R681 0_0402_5%@ R681 0_0402_5%@

1 2

XDCD#

R682 0_0402_5%@ R682 0_0402_5%@

1 2

MDIO13

R683 0_0402_5%@ R683 0_0402_5%@

1 2

MDIO12

R684 0_0402_5%@ R684 0_0402_5%@

1 2

MDIO5

R685 0_0402_5%@ R685 0_0402_5%@

1 2

MDIO7

R686 0_0402_5%@ R686 0_0402_5%@

1 2

CR1_CD0N

SD,MMC,MS,XD muti-function pin define

MDIO PIN Name MDIO00

MDIO01 MDIO02 MDIO03 MDIO04 MDIO05 MDIO06

SD Card PIN Name SD_DAT0

SD_DAT1 MMC_DAT1 MS_DAT1 XD_DAT1 SD_DAT2 MMC_DAT2 SD_DAT3 SD_CMD SDCLK1 SD_WP#

MMC Card PIN Name MMC_DAT0

MMC_DAT3 MMC_CMD MMCCLK

MMC_WP# MDIO07 MDIO08 MDIO09 MDIO10 MDIO11

MMC_DAT4

MMC_DAT5

MMC_DAT6

MMC_DAT7 MS_DAT7 XD_DAT7

MS_DAT4 XD_DAT4 MS_DAT5 MS_DAT6 XD_DAT6

MDIO12 MDIO13 MDIO14

Cardreader contactor not support MMC & MS Bit 4~7

Compal Secret Data

2007/10/15 2006/10/06

Compal Secret Data

Deciphered Date

2

+CR1_POWER

23

SD-VCC

24

SD-CLK SD-DAT0 SD-DAT1 SD-DAT2 SD-DAT3

SD-CMD

SD-CD-SW

SD-WP-SW

MS-VCC

MS-SCLK MS-DATA0 MS-DATA1 MS-DATA2 MS-DATA3

MS-INS

MS-BS

GROUND

ME@

XDCD#

1

C758

270P_0402_50V7K@

2

Title

Size Document Number Rev

Custom

Date: Sheet

MDIO0

25

MDIO1

29

MDIO2

10

MDIO3

11

MDIO4

12

CR1_CD0N

36

MDIO6

35 14

15

MDIO0

19

MDIO1

20

MDIO2

18

MDIO3

16

CR1_CD1N

17

MDIO4

21

37 38

close to JREAD1.24

Compal Electronics, Inc.

4 in 1 Card

JIWA3/A4_LA4212P

1

MDIO5

12

1K_0402_1%

1K_0402_1% R654

R654

@

1

C780

@

2

0.1U_0402_16V4Z

12

1K_0402_1%

1K_0402_1% R655

R655

@

1

C781

@

2

0.1U_0402_16V4Z

close to JREAD1.15

36 53Monday, May 12, 2008

of

1.0

5

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4

3

2

1

D D

C C

B B

KSI[0..7] KSO[0..15]

KSO2

C396 100P_0402_50V8J@C396 100P_0402_50V8J@

KSO15

C334 100P_0402_50V8J@C334 100P_0402_50V8J@

KSO6

C400 100P_0402_50V8J@C400 100P_0402_50V8J@

KSO8

C399 100P_0402_50V8J@C399 100P_0402_50V8J@

KSO13

C330 100P_0402_50V8J@C330 100P_0402_50V8J@

KSO12

C329 100P_0402_50V8J@C329 100P_0402_50V8J@

KSO11

C332 100P_0402_50V8J@C332 100P_0402_50V8J@

KSO10

C333 100P_0402_50V8J@C333 100P_0402_50V8J@

KSO3

C328 100P_0402_50V8J@C328 100P_0402_50V8J@

KSO4

C397 100P_0402_50V8J@C397 100P_0402_50V8J@

KSI0

C395 100P_0402_50V8J@C395 100P_0402_50V8J@

KSO0

C382 100P_0402_50V8J@C382 100P_0402_50V8J@

FOR LPC SIO DEBUG PORT

JP11

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

ACES_85201-2005

ME@

1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2

LPC_AD0 LPC_AD1 LPC_AD2 LPC_AD3 LPC_FRAME# LPC_DRQ0# PCI_RST#

CLK_PCI_DB SERIRQ

KSI[0..7] <35> KSO[0..15] <35>

+5VS

+3VS

CLK_14M_SIO <22> LPC_AD0 <27,35> LPC_AD1 <27,35> LPC_AD2 <27,35> LPC_AD3 <27,35>

LPC_FRAME# <27,35> LPC_DRQ0# <27> PCI_RST# <26,35>

CLK_PCI_DB <22>

SERIRQ <28,35>

KSO1

C401 100P_0402_50V8J@C401 100P_0402_50V8J@

1 2

KSO7

C398 100P_0402_50V8J@C398 100P_0402_50V8J@

1 2

KSI2

C392 100P_0402_50V8J@C392 100P_0402_50V8J@

1 2

KSO5

C394 100P_0402_50V8J@C394 100P_0402_50V8J@

1 2

KSI3

C393 100P_0402_50V8J@C393 100P_0402_50V8J@

1 2

KSO14

C331 100P_0402_50V8J@C331 100P_0402_50V8J@

1 2

KSI7

C377 100P_0402_50V8J@C377 100P_0402_50V8J@

1 2

KSI6

C378 100P_0402_50V8J@C378 100P_0402_50V8J@

1 2

KSI5

C381 100P_0402_50V8J@C381 100P_0402_50V8J@

1 2

KSI4

C380 100P_0402_50V8J@C380 100P_0402_50V8J@

1 2

KSO9

C379 100P_0402_50V8J@C379 100P_0402_50V8J@

1 2

KSI1

C376 100P_0402_50V8J@C376 100P_0402_50V8J@

1 2

R458 10K_0402_5%

12

@

INT_KBD Conn.

JP6

KSI1 KSI7 KSI6 KSO9 KSI4 KSI5 KSO0 KSI2 KSI3 KSO5 KSO1 KSI0 KSO2 KSO4 KSO7 KSO8 KSO6 KSO3 KSO12 KSO13 KSO14 KSO11 KSO10 KSO15

JP6

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

ACES_85202-2405

SW/L

SW/R

TP_CLK<35> TP_DATA<35>

+5VS

C245

0.1U_0402_16V4Z

To TP/B Conn.

TP_CLK TP_DATA SW/L SW/R

TP_DATA

C327 100P_0402_50V8J@C327 100P_0402_50V8J@ C326 100P_0402_50V8J@C326 100P_0402_50V8J@

2

3

1

5

6

5

6

1 2 1 2

D31

D31 PJDLC05_SOT23-3

PJDLC05_SOT23-3

4 3

TP_CLK

TP_CLK TP_DATA

2 1

SW3

SW3 EVQPLHA15_4P

EVQPLHA15_4P

2 1

SW4

SW4 EVQPLHA15_4P

EVQPLHA15_4P

JP5

1

2

3

4

5

6

7

GND

8

GND

ACES_85201-06051

ME@

EC_TX_P80_DATA<14,15,35> EC_RX_P80_CLK<14,15,35>

EC DEBUG PORT

+3VALW

EC_TX_P80_DATA EC_RX_P80_CLK

JP4

1

2

3

4

ACES_85205-0400

ME@

A A

Security Classification

5

Security Classification

2007/10/15 2008/10/15

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2007/10/15 2008/10/15

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

B

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

KB /SW /LPC Debug Conn.

JIWA3/A4_LA4212P

1

of

37 53Monday, May 12, 2008

of

37 53Monday, May 12, 2008

of

37 53Monday, May 12, 2008

1.0

FSEL#SPICS#<35>

hexainf@hotmail.com gratuito - free of charge.

FRD#SPI_SO<35>

+3VALW

FOR EC 8M SPI ROM

C566

0.1U_0402_16V4Z

R437 15_0402_5%R437 15_0402_5%

FRD#SPI_SO SPI_SO

SPI_CS# SPI_SO

+5VS

1 2

JP12

112 334 556 778

E&T_2941-G08N-00E~D

ME@

1 2

R585 1.27K_0402_1%R585 1.27K_0402_1%

+3VALW

1

2

12

R43115_0402_5% R43115_0402_5%

2 4 6

SPI_SI

8

LED

2 1

20mils

U22

SPI_CS#FSEL#SPICS#

1

CS#

2

SO

HOLD#

3

WP#

SCLK

4

GND

MX25L1605AM2C-12G SO8 ROM

+3VALW

SPI_CLK

R466

12

15_0402_5%

@

LED1

19-215SUBC/S280/TR8 0603 BLUE

VCC

8 7 6

SPI_SI FWR#SPI_SI

5

SI

TP_LED# <35>

1 2 1 2

C573

R46533_0402_5% R46533_0402_5%

SPI_CLKSPI_CLK_R

R46733_0402_5% R46733_0402_5%

12

R106

R106 33_0402_5%

33_0402_5%

1

22P_0402_50V8J

2

FWR#SPI_SI <35>

SPI_CLK_R

SPI_CLK <35>

+3VS

1

C743

@C743

0.1U_0402_16V4Z

FSEL#SPICS#_SB<28>

FRD#SPI_SO_SB<28>

R603 15_0402_5%@R603 15_0402_5%@

1 2

@

2

U35

SPI_CS#_SB

@

12

SPI_SO_SB

R60515_0402_5%@R60515_0402_5%

U35

1

CS#

2 3 4

1

VCC

SO

HOLD#

WP#

SCLK

GND

MX25L512AMC-12G_SO8

@

FD6FD6

FD4FD4

1

H3

H1

HOLEAH3HOLEA

HOLEAH1HOLEA

1

H24

H23

HOLEA

1

8 7

SPI_CLK_SB

6

SPI_SI_SB

5

SI

FD5FD5

1

H21

H21 HOLEA

HOLEA

1

H20

H20 HOLEA

HOLEA

1

@

1 2

R60615_0402_5%

FD2FD2

H22

H22 HOLEA

HOLEA

1

H7 HOLEAH7HOLEA

1

FD3FD3

H10

H10 HOLEA

HOLEA

1

FD1FD1

1

H18

H18 HOLEA

HOLEA

1

SPI_CLK_SB <28>

FWR#SPI_SI_SB <28>

H19

H16

HOLEA

1

H13

H14

HOLEA

1

JP24

+5VALW

BT_LED#<32>

WLAN_LED#<32>

CHARGE_LED1#<35> CHARGE_LED0#<35>

PWR_LED#<35>

+5VS

SCROLL_LED#<35>

CAPS_LED#<35> NUM_LED#<35> DRIVE_LED#<39>

BT_LED# WLAN_LED#

CHARGE_LED1# CHARGE_LED0# PWR_LED#

SCROLL_LED# CAPS_LED# NUM_LED# DRIVE_LED#

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

1

2

3

4

5

6

7

8

9

GND

10

GND

ACES_85201-08051~N

JP25

1

2

3

4

5

6

7

GND

8

GND

ACES_85201-06051

Compal Secret Data

2007/10/15 2008/10/15

Compal Secret Data

Deciphered Date

H2 HOLEAH2HOLEA

1

H12

H12 HOLEA

HOLEA

1

H4 HOLEAH4HOLEA

1

H8 HOLEAH8HOLEA

1

H6 HOLEAH6HOLEA

1

Size Document Number Rev

Date: Sheet

H9

H27

H5 HOLEAH5HOLEA

1

H26

H26 HOLEA

HOLEA

1

Title

B

H27

H28

HOLEAH9HOLEA

1

H25

H25 HOLEA

HOLEA

1

Compal Electronics, Inc.

H28

HOLEA

1

LED/EC SPI ROM

JIWA3/A4_LA4212P

38 53Wednesday, May 14, 2008

1.0

of

A

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B

C

D

E

+5VS +3VS

F

G

H

1 1

1000P_0402_50V7K

C274

1

2

C462

0.1U_0402_16V4Z

1

2

1

C298

1U_0603_10V4Z

2

1

C461

10U_0805_10V4Z

2

1

C469

10U_0805_10V4Z

2

1

C316

0.1U_0402_16V4Z

2

@

SATA HDD Conn. SATA ODD Conn.

JP15

JP18

1

SATA_ITX_DRX_P0<27>

2 2

SATA_DTX_C_IRX_N0<27> SATA_DTX_C_IRX_P0<27>

SATA_DTX_C_IRX_N0 SATA_DTX_C_IRX_P0

SATA_ITX_DRX_N0<27>

1 2

C684 0.01U_0402_16V7KC684 0.01U_0402_16V7K

1 2

C685 0.01U_0402_16V7KC685 0.01U_0402_16V7K

SATA_ITX_DRX_P0 SATA_ITX_DRX_N0

SATA_DTX_IRX_N0 SATA_DTX_IRX_P0

+3VS

+5VS

GND

2

A+

3

A-

4

GND

5

B-

6

B+

7

GND

8

VCC3.3

9

VCC3.3

10

VCC3.3

11

GND

12

GND

13

GND

14

VCC5

15

VCC5

16

VCC5

17

GND

18

RESERVED

19

GND

20

VCC12

21

VCC12

22

VCC12

23

G1

24

G2

OCTEK_SAT-22SB1G_RV

ME@

SATA_ITX_DRX_P1<27>

SATA_DTX_C_IRX_N1<27>

SATA_DTX_C_IRX_P1<27>

SATA_DTX_C_IRX_N1 SATA_DTX_C_IRX_P1

SATA_ITX_DRX_N1<27>

1 2

C676 0.01U_0402_16V7KC676 0.01U_0402_16V7K

1 2

C675 0.01U_0402_16V7KC675 0.01U_0402_16V7K

SATA_ITX_DRX_P1 SATA_ITX_DRX_N1

SATA_DTX_IRX_N1 SATA_DTX_IRX_P1

+5VS

JP15

1

GND

2

A+

3

A-

4

GND

5

B-

6

B+

7

GND

8

DP

9

+5V

10

+5V

11

MD

12

GND

13

GND

OCTEK_SLS-13SB1G

ME@

3 3

SATA_LED#<27>

4 4

A

B

C

D20 RB751V_SOD323D20 RB751V_SOD323

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

D

21

DRIVE_LED#

DRIVE_LED# <38>

Compal Secret Data

2007/10/15 2008/10/15

E

Compal Secret Data

Deciphered Date

F

Compal Electronics, Inc.

Title

Size Document Number Rev

B

Date: Sheet

Compal Electronics, Inc.

HDD & ODD Connector

JIWA3/A4_LA4212P

G

39 53Monday, May 12, 2008

of

H

1.0

A

hexainf@hotmail.com gratuito - free of charge.

Express Card Power Switch

+1.5VS

1 1

PLT_RST#<8,16,26,32,33,36>

+3VALW

CPUSB#<28>

2 2

12

C482 0.1U_0402_16V4ZC482 0.1U_0402_16V4Z

12

C483 0.1U_0402_16V4ZC483 0.1U_0402_16V4Z

C500 0.1U_0402_16V4ZC500 0.1U_0402_16V4Z

SYSON<35,42,48> SUSP#<30,35,41,42,46,48,49,50>

12

R337 100K_0402_5%@R337 100K_0402_5%@

12

CPUSB#

+3VALW

+3VS

PLT_RST# SYSON SUSP#

U16

12

1.5Vin

14

1.5Vin

2

3.3Vin

4

3.3Vin AUX_IN17AUX_OUT

6

SYSRST#

20

SHDN#

1

STBY#

10

CPPE#

9

CPUSB#

18

RCLKEN

R5538_QFN20

1.5Vout

3.3Vout

OC#

PERST#

GND

NC

11 13

3 5

15 19 8 16 7

B

+1.5VS_CARD1

+3VS_CARD1

+3VALW_CARD1

PERST#

40mil

60mils 40mil

+1.5VS_CARD1

C467

10U_0805_10V4Z

+3VS_CARD1

C468

10U_0805_10V4Z

+3VALW_CARD1

C495

10U_0805_10V4Z

@

Imax = 0.75A

1

0.1U_0402_16V4Z

2

Imax = 1.35A

1

0.1U_0402_16V4Z

2

Imax = 0.275A

1

0.1U_0402_16V4Z

2

C489

C488

C499

C

D

E

New Card Socket (Left/TOP)

1

2

1

2

1

2

USB20_N10<28> USB20_P10<28>

ICH_SMBCLK<22,28,32>

ICH_SMBDATA<22,28,32>

+1.5VS_CARD1

ICH_PCIE_WAKE#<28,32,33>

+3VALW_CARD1

+3VS_CARD1

EXP_CLKREQ#<22>

CLK_PCIE_EXP#<22> CLK_PCIE_EXP<22>

PCIE_RXN4<28> PCIE_RXP4<28>

PCIE_TXN4<28> PCIE_TXP4<28>

CPUSB#

PERST#

CPUSB#

JEXP1

1

GND

2

USB_D-

3

USB_D+

4

CPUSB#

5

RSV

6

RSV

7

SMB_CLK

8

SMB_DATA

9

+1.5V

10

+1.5V

11

WAKE#

12

+3.3VAUX

13

PERST#

14

+3.3V

15

+3.3V

16

CLKREQ#

17

CPPE#

18

REFCLK-

19

REFCLK+

20

GND

21

PERn0

22

PERp0

23

GND

24

PETn0

25

PETp0

26

GND

27

GND

28

GND

FOX_1CH4110C_LT

ME@

(NEW)

CMOS Camera Conn

+5VS

3 3

12

R660

R660 10K_0402_5%

10K_0402_5%

1

OUT

CMOS_OFF#<35>

4 4

A

B

2

IN

GND

3

CMOS1

USB20_N2<28> USB20_P2<28>

Q36

Q36 DTC124EKAT146_SC59-3

DTC124EKAT146_SC59-3

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

SI2301BDS-T1-E3_SOT23-3

USB20_N2 USB20_P2

C

S

D

13

G

Q35

2

R661

R661 0_0603_5%

0_0603_5%

1 2

1

C785

10U_0805_10V4Z

2007/10/15 2008/10/15

2

Compal Secret Data

Deciphered Date

C784

0.1U_0402_16V4Z

1

2

JP1

1

2

3

4

5

6

GND1

7

GND2

ACES_88266-05001

ME@

Compal Electronics, Inc.

Title

Size Document Number Rev

B

Date: Sheet

D

Date: Sheet

Compal Electronics, Inc.

NEW CARD & CMOS Connector

JIWA3/A4_LA4212P

40 53Monday, May 12, 2008

of

E

of

1.0

ON/OFF switch

hexainf@hotmail.com gratuito - free of charge.

EC_ON<35,46>

Power Button

SW1

SMT1-05_4P

5

6

TOP Side

12 12

+3VALW

12

R243

4.7K_0402_5%

1 2

R244 33K_0402_5%R244 33K_0402_5%

13

D

2

G

Q19

S

2N7002_SOT23-3

3 4

J1 JOPEN@J1 JOPEN@ J2 JOPEN@J2 JOPEN@

Bottom Side

ON/OFFBTN#

EC_ON

1 2

@

D5

1

DAN202UT106_SC70-3

2

+3VALW

3 2

IN

R242

R242 100K_0402_5%

100K_0402_5%

1 2

ON/OFF#

51_ON#

1

OUT

GND

3

ON/OFF# <35>

Q24

Q24 DTC124EKAT146_SC59-3

DTC124EKAT146_SC59-3

2

C411

C411 1000P_0402_50V7K

1000P_0402_50V7K

1

51_ON# <44>

12

D6

D6 RLZ20A_LL34

RLZ20A_LL34

C809

0.1U_0402_16V4Z

@

2

C810

0.1U_0402_16V4Z

1

@

ON/OFFBTN#

NOVO_BTN#

I2C_INT_C

2

C811

0.1U_0402_16V4Z

1

@

EC_SMB_CK2<5,16,35> KSI4<35,37> ESB_CK<35> EC_SMB_DA2<5,16,35> KSO14<35,37> ESB_DA<35> I2C_INT<35> KSO15<35,37> KSI0<35,37>

KSI3<35,37>

+3VS

12

R724

R724 0_0603_5%

0_0603_5%

CY@

FB1 FB2

R720

4.7K_0402_5%

@

1 2

2

C795

0.1U_0402_16V4Z

L45 MBC1608121YZF_0603CY@L45 MBC1608121YZF_0603CY@

1 2

L46 MBC1608121YZF_0603CY@L46 MBC1608121YZF_0603CY@

1 2

+3V +3V

1

@

Switch Board Conn.

ON/OFFBTN# NOVO_BTN#

EC_SMB_CK2_C EC_SMB_DA2_C I2C_INT_C

R721

4.7K_0402_5%

@

1 2

2

C796

0.1U_0402_16V4Z

1

@

GNDS

1 2

R620 0_0402_5%CY@R620 0_0402_5%CY@

ENE@

1 2

R638 0_0402_5%

1 2

R622 0_0402_5%CY@R622 0_0402_5%CY@

ENE@

1 2

R639 0_0402_5%

1 2

R624 0_0402_5%R624 0_0402_5%

1 2

10

R662

R662 0_0603_5%

0_0603_5%

JP3

1

2

3

4

5

6

7

8

9

GND GND

ACES_85201-08051

ME@

1 2

EC_SMB_CK2_C

EC_SMB_DA2_C

I2C_INT_C

R663

R663 0_0603_5%

0_0603_5%

FB1 FB2

+3VALW

NOVO#<35> 51_ON#<44>

Lid Switch

1 2

R432 0_0402_5%R432 0_0402_5%

C561

0.1U_0402_16V4Z

NOVO#

+VCC_LID

1

2

R314

100K_0402_5%

51_ON#

R429 100K_0402_5%R429 100K_0402_5%

1 2

2

A3212ELHLT-T_SOT23W-3

VDD

3

OUTPUT

GND

U19

1

+3VALW

1 2

D9

2

1

3

DAN202UT106_SC70-3

2

C547

10P_0402_50V8J

1

NOVO_BTN#

LID_SW# <35>

EXT_MIC_L<30>

EXT_MIC_R<30>

JACK_PLUG_MIC<30>

HP_L<30> HP_R<30>

JACK_PLUG_HP<30>

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

EXT_MIC_L

EXT_MIC_R

@R445

@

1K_0402_5%

2007/10/15 2008/10/15

1 2

L25

FBM-11-160808-700T_0603

1

C503

47P_0402_50V8J

2

GNDA

1 2

L26

FBM-11-160808-700T_0603

1

C508

47P_0402_50V8J@

2

GNDA

JACK_PLUG_MIC

12

R445

GNDA

Compal Secret Data

@

12

R452

@R452

@

1K_0402_5%

L28

FBM-11-160808-700T_0603

L29

FBM-11-160808-700T_0603

Deciphered Date

1

C494

220P_0402_50V8J

2

GNDA

1

C518

@C518

@

220P_0402_50V8J

2

GNDA

220P_0402_50V8J

1 2 1 2

EXT_MIC_L-2

EXT_MIC_R-2

1

C522

2

GNDA

220P_0402_50V8J

1

C564

2

PL-OUT PR-OUT

Audio Jack

MIC IN

JMIC1

1 2 6 3

4

GNDA

5

SINGA_2SJ-S351-012

ME@

220P_0402_50V8J

1

C568

2

Headphone

JHP1

1 2 6 3

4 5

SINGA_2SJ-S351-013

ME@

Compal Electronics, Inc.

Title

Size Document Number Rev

B

Date: Sheet

Compal Electronics, Inc.

Audio Jack & SW connector

JIWA3/A4_LA4212P

1.0

of

41 53Monday, May 12, 2008

A

hexainf@hotmail.com gratuito - free of charge.

B

C

D

E

1 1

1

C575

10U_0805_10V4Z

2

+VSB

R226

R226 20K_0402_5%

20K_0402_5%

SUSP

2N7002_SOT23

2 2

3 3

2N7002_SOT23

+1.5VS +VCCP +1.8V+0.9VS

R283

R283 470_0603_5%

470_0603_5%

1 2 13

D

S

+5VALW TO +5VS

+5VALW

U23

8 7 6 5

1

C577

10U_0805_10V4Z

2

13

D

2

G

Q14

G

Q14

S

SUSP SUSP SUSP SYSON#

2

G

Q25

Q25 2N7002_SOT23

2N7002_SOT23

1

S

D

2

S

D

3

S

D

4

G

D

SI4800BDY-T1-E3_SO8

5VS_GATE

+5VS

1

C580

2

1

C581

0.1U_0603_50V4Z

2

1

C578

2

10U_0805_10V4Z

R68

R68 470_0603_5%

470_0603_5%

1 2 13

D

2

G

Q10

S

2N7002_SOT23

1 2

1U_0603_10V4Z

13

D

S

R468

R468 470_0603_5%

470_0603_5%

SUSP

2

G

Q33

Q33 2N7002_SOT23

2N7002_SOT23

D

S

R165

R165 470_0603_5%

470_0603_5%

1 2 13

2

G

Q12

Q12 2N7002_SOT23

2N7002_SOT23

+VSB

1

C539

2

1 2

R450

R450 47K_0402_5%

47K_0402_5%

SUSP

Q32

2N7002_SOT23

R236

R236 470_0603_5%

470_0603_5%

1 2 13

D

S

+3VALW TO +3VS

+3VALW

1

C559

2

10U_0805_10V4Z

13

D

2

G

S

2

G

Q20

Q20 2N7002_SOT23

2N7002_SOT23

U20

8 7 6 5

1

S

D

2

S

D

3

S

D

4

G

D

SI4800BDY-T1-E3_SO8

1

C563

2

10U_0805_10V4Z

R416 47K_0402_5%

47K_0402_5%

1 2

1

C572

0.1U_0603_50V4Z

2

C554

@R416

@

1

2

1U_0603_10V4Z

+3VS

R418

R418 470_0603_5%

470_0603_5%

1 2 13

D

Q30

S

2N7002_SOT23

SUSP<50>

SUSP

2

G

RTCVREF

SUSP

R249

100K_0402_5%

C365

PM@

+VSB

R234

10K_0402_5%

1 2

2

G

12

1

C383

PM@

2

10U_0805_10V4Z

R220 100K_0402_5%

100K_0402_5%

SUSP

Q15

Q15 2N7002_SOT23

2N7002_SOT23

+5VALW

R238

R238 100K_0402_5%

100K_0402_5%

@

1 2

13

D

Q22

Q22 2N7002_SOT23

2N7002_SOT23

S

+1.8V to +1.8VS

+1.8V

PM@

U9

1

S

D

2

S

D

3

S

D

4

G

D

SI4800BDY-T1-E3_SO8

1.8VS_GATE5VS_GATE 5VS_GATE

1

C389

@

2

0.1U_0603_50V4Z

SYSON#

SYSON<35,40,48>SUSP#<30,35,40,41,46,48,49,50>

1

2

10U_0805_10V4Z

PM@R220

PM@

2

G

PM@

8 7 6 5

13

D

S

+1.8VS

1

C345

PM@

2

10U_0805_10V4Z

R222

R222 100K_0402_5%

100K_0402_5%

C386

0.1U_0603_50V4ZPM@

SYSON

R248

100K_0402_5%

C360

PM@

@

SYSON#

12

1

2

1U_0603_10V4Z

+5VALW

2

G

R207

PM@

470_0603_5%

1 2 13

D

S

R237

R237 100K_0402_5%

100K_0402_5%

1 2

13

D

Q21

Q21 2N7002_SOT23

2N7002_SOT23

S

SUSP

2

G

Q13

PM@

Q13

PM@

2N7002_SOT23

+5VALW

1

C799

0.01U_0402_16V7K

2

4 4

A

1

C800

0.01U_0402_16V7K

2

1

C801

C801 470P_0402_50V7K

470P_0402_50V7K

2

B

1

C802

C802 470P_0402_50V7K

470P_0402_50V7K

2

+5VS

1

C804

0.01U_0402_16V7K

2

1

C805

C805 470P_0402_50V7K

470P_0402_50V7K

2

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2007/10/15 2007/8/18

C

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

D

Date: Sheet

Compal Electronics, Inc.

DC Interface

JIWA3/A4_LA4212P

42 53Monday, May 12, 2008

E

1.0

of

A

hexainf@hotmail.com gratuito - free of charge.

B

C

D

E

+5VALW

C803 470P_0402_50V7KC803 470P_0402_50V7K

C694 0.1U_0402_16V4ZC694 0.1U_0402_16V4Z

1 1

12

USB_ON<35>

USB_ON

U13

1

GND

2

IN

3

IN

4

EN#

G545A1P1U_SO8

+USB_VCCA

OUT OUT OUT OC#

8 7 6 5

1

2

C428

1000P_0402_50V7K@

USB_OC#0 <28> USB_OC#1 <28>

Kill Switch

2 2

+3VS

KILL_SW#<35>

R581

100K_0402_5%

KILL_SW#

LIFT USB CONN. 1

+USB_VCCA

1

+

C691

C691 150U_D2_6.3VM

150U_D2_6.3VM

2

USB20_N0<28>

USB20_P0<28>

+3VALW

R706

R706 100K_0402_5%

100K_0402_5%

SW2

@R581

@

12

1 2

SW2

3

2

1

1BS003-1211L_3P

W=80mils

1

C688

C688 470P_0402_50V7K

470P_0402_50V7K

2

USB20_N0 USB20_P0

JUSB1

1

VCC

2

D-

3

D+

4

GND

5

GND1

6

GND2

7

GND3

8

GND4

SUYIN_020173MR004G579ZR

ME@

USB20_N1<28>

USB20_P1<28>

LIFT USB CONN. 2

+USB_VCCA

W=80mils

1

C754

C754 470P_0402_50V7K

470P_0402_50V7K

2

USB20_N1 USB20_P1

JUSB2

1

VCC

2

D-

3

D+

4

GND

5

GND1

6

GND2

7

GND3

8

GND4

SUYIN_020173MR004G579ZR

ME@

+5VALW

3 3

4.7U_0805_10V4Z

USB_ON<35>

4 4

1

C693

2

@

+USB_VCCC

1

+

150U_D2_6.3VM

2

C711

U31

1

GND

2

IN

3

IN

4

EN#

G545A1P1U_SO8

1

C716

470P_0402_50V7K

2

A

OUT OUT OUT OC#

+USB_VCCC

8 7 6 5

+USB_VCCC

1

C690

0.1U_0402_16V4Z

2

@

+USB_VCCC

1

@

C697

470P_0402_50V7K

2

USB_OC#11 <28> USB_OC#4 <28>

B

RIGHT USB CONN. 3

+USB_VCCC

RIGHT USB CONN.4

W=80mils

1

C726

C726 470P_0402_50V7K

470P_0402_50V7K

2

USB20_N11<28> USB20_P11<28>

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

USB20_N11 USB20_P11

Compal Secret Data

2007/10/15 2007/8/18

Compal Secret Data

C

JUSB3

1

2

3

4

5

GND

6

GND

7

GND

8

GND

SUYIN_020173MR004S558ZL

ME@

Deciphered Date

USB20_N4<28>

USB20_P4<28>

D

+USB_VCCC

W=80mils

1

C786

C786 470P_0402_50V7K

470P_0402_50V7K

2

USB20_N4

USB20_P4

Title

Power OK, Reset and RTC Circuit, TP

Size Document Number Rev

Date: Sheet

Power OK, Reset and RTC Circuit, TP

Custom

JUSB4

1

2

3

4

5

GND

6

GND

7

GND

8

GND

SUYIN_020173MR004S558ZL

ME@

Compal Electronics, Inc.

JIWA3/A4_LA4212P

43 53Wednesday, May 14, 2008

E

1.0

of

A

hexainf@hotmail.com gratuito - free of charge.

B

C

D

12

PC168

0.01U_0402_50V7K

VIN

12

PC52

100P_0402_50V8J

PF1

JDCIN

JDCIN 4602-Q04C-09R 4P P2.5@

4602-Q04C-09R 4P P2.5@

4

3

1 1

3

2

1

DC030006J00

PF1

7A_24VDC_429007.WRML@

21

PJ9

2

112

JUMP_43X118@

12

PC53

1000P_0402_50V7K

12

PC167

SMB3025500YA_2P

1 2

12

PC54

100P_0402_50V8J

0.01U_0402_50V7K

PL6

12

PC50

1000P_0402_50V7K

Vin Detector

High 18.135 17.566 17.011 Low 14.866 14.355 14.063

PC60

PR83

PR83 1M_0402_1%

1M_0402_1%

1 2

VS

8

PU8A

3

P

+

2

-

G

LM393DG_SO8

4

12

PU7

PU7 G920AT24U_SOT89-3

G920AT24U_SOT89-3

3

OUT

PC60

0.01U_0402_25V7K@

1 2

1

O

RTCVREF

TP0610K-T1-E3_SOT23-3

N1

12

PC57

0.22U_0603_25V7K

GND

1

IN

3.3V

2

PQ6

N2

VIN

12

PR88

12

2

12

PR66

PR66 200_0603_5%

200_0603_5%

12

PC47

PC47 1U_0805_25V4Z

1U_0805_25V4Z

10K_0805_5%

PD5

RLZ4.3B_LL34

PR67

68_1206_5%

13

PR87

PR87 10K_0402_5%

10K_0402_5%

1 2

PACIN

12

PR80

10K_0402_1%

VIN

PD2

PD2 RLS4148_LL34-2

RLS4148_LL34-2

1 2 12

12

PC48

0.1U_0603_25V7K

B

12

PR63

PR63 68_1206_5%

68_1206_5%

ACIN <21,33>

PACIN <40>

MAINPWON<41,46>

PRECHG<40>

VS

JRTC

-+

MAXEL_ML1220T10@

SP093MX0000

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

PR85

12

PC113

0.1U_0402_16V7K

PD1

RLS4148_LL34-2

PR65

200_0603_5%

1 2

100K_0402_1%

1 2

PR74

22K_0402_1%

RTCVREF

3.3V

12

PC106

PC106 10U_0805_10V4Z

10U_0805_10V4Z

PR85 10K_0402_1%@

10K_0402_1%@

1 2

PR160

PR160 10K_0402_1%

10K_0402_1%

12

PR75

2 2

VIN

12

PR84

PR86

82.5K_0402_1%

215K_0402_1%

1 2

12

PC59

0.068U_0603_25V7M

3 3

4 4

+CHGRTC

PR113

560_0603_5%

1 2

PR82

24.9K_0402_1%

BATT+

51_ON#<32>

560_0603_5%

CHGRTCP

PR112

1 2

A

VIN

VS

ACON<40>

12

ACIN

Precharge detector

Min. typ. Max. H-->L 13.843V 14.247V 14.636V L-->H 14.936V 15.381V 15.814V

PR69

PR69 1K_1206_5%

1K_1206_5%

1 2

PR70

PR70 1K_1206_5%

1K_1206_5%

ACOFF<33,40>

1 2

PR71

PR71 1K_1206_5%

1K_1206_5%

1 2

PR72

PR72 1K_1206_5%

1K_1206_5%

1 2

12

PD3

PD3 RLS4148_LL34-2

RLS4148_LL34-2

12

PD4

PD4 RLS4148_LL34-2@

RLS4148_LL34-2@

VL

12

PR161

PD15

RB715F_SOT323-3

2 3

PR154

PR154 200K_0402_1%

200K_0402_1%

100K_0402_1%

1

12

PC107

RTCVREF

PU8B

LM393DG_SO8

0.1U_0603_25V7K

7

O

PR153

PR153 10K_0402_5%

10K_0402_5%

RTC Battery

PR114

0_0603_5%

12

Compal Secret Data

Deciphered Date

C

PD6

1 2

RB751V-40TE17_SOD323-2

+RTCBATT

+CHGRTC

2008/06/222007/06/22

2

PR159

2.2M_0402_5%

VS

8

5

P

+

6

-

G

4

12

PR76

100K_0402_5%

13

12

PC109

0.01U_0402_25V7K

12

PC108

1000P_0402_50V7K

12

Title

Size Document Number Rev

Date: Sheet

BATT ONLY

12

PR77

100K_0402_5%

PQ14

PQ14 DTC115EUA_SC70-3

DTC115EUA_SC70-3

2

12

PR156

PRG++

PQ10

PQ10 SSM3K7002F_SC59-3

SSM3K7002F_SC59-3

13

D

S

PR155

66.5K_0402_1%

@

Precharge detector

Min. typ. Max. H-->L 6.138V 6.214V 6.359V L-->H 7.196V 7.349V 7.505V

PQ16

TP0610K-T1-E3_SOT23-3

13

2

12

PR79

100K_0402_5%

13

B+

PQ13

PQ13 DTC115EUA_SC70-3

DTC115EUA_SC70-3

12

PR157

499K_0402_1%

12

PR158

PC111

205K_0402_1%

2

G

13

Compal Electronics, Inc.

DCIN & DETECTOR

D

499K_0402_1%

PR81

PR81 47K_0402_5%

47K_0402_5%

12

2

PQ17

PQ17 DTC115EUA_SC70-3

DTC115EUA_SC70-3

44 53Monday, May 12, 2008

0.01U_0402_25V7K

PACIN <40>

+5VALWP

of

1.0

A

hexainf@hotmail.com gratuito - free of charge.

B

C

D

PH1 under CPU botten side :

CPU thermal protection at 92 degree C Recovery at 56 degree C

1 1

100K_0603_1%_TH11-4H104FT

PF2

PF2 12A_65V_451012MRL@

12A_65V_451012MRL@

21

PJ7

JBATT

TYCO_1775768-1@

2 2

GND GND

BATT_S1

1

2

EC_SMCA

3

EC_SMDA

4

TS

5

6

7

8 9

PJ7

2

JUMP_43X118@

100_0402_1%

12

PR146

PR146 10K_0402_1%

10K_0402_1%

112

PR147

1 2

PR149

6.49K_0402_1%

12

PR148

PR148 100_0402_1%

100_0402_1%

VMB

SMB3025500YA_2P

12

PC101

PC101 1000P_0402_50V7K

1000P_0402_50V7K

+3VALWP

PL3

1 2

A/D

BATT+

12

PC26

0.01U_0402_25V7K

EC_SMB_CK1 <29,34> EC_SMB_DA1 <29,34>

BATT_TEMPA <29,34>

100K_0603_1%_TH11-4H104FT

PH2

12

PC116

0.22U_0603_16V7K

VL

12

PR166

13.7K_0402_1%

PR167

15.4K_0402_1%

1 2

12

TM_REF1

PC115

1000P_0402_50V7K

VL

PC114

0.1U_0603_25V7K

3

+

2

-

PR164

12

100K_0402_1%

PR165

PR165 100K_0402_1%

100K_0402_1%

1 2

8

P

G

4

PR163

PR163 47K_0402_1%

47K_0402_1%

1

O

PU9A

PU9A LM393DG_SO8

LM393DG_SO8

12

VL

PR162

PR162 47K_0402_1%

47K_0402_1%

1 2

5 6

8

P

+

-

G

4

2

7

O

PU9B

LM393DG_SO8

13

PQ39

PQ39 DTC115EUA_SC70-3

DTC115EUA_SC70-3

MAINPWON <4,36,39>

PJ19

2

112

JUMP_43X39@

PQ26

TP0610K-T1-E3_SOT23-3@

B+

3 3

22K_0402_1%@

13

D

2

G

S

PC87

0.1U_0402_16V7K

@

22K_0402_1%@

VL

PR115

100K_0402_1%@

POK<39>

4 4

1 2

PR116

PR116 0_0402_5%@

0_0402_5%@

1 2

12

PR119

1 2

PQ25

PQ25 SSM3K7002F_SC59-3@

SSM3K7002F_SC59-3@

12

PR120

100K_0402_1%

@

12

PC88

@

0.22U_1206_25V7K

13

2

A

B

+VSBP

12

PC89

0.1U_0603_25V7K

@

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

+3VALWP +3VALW

(5A,200mils ,Via NO.= 10)

+5VALWP

(6.0A,240mils ,Via NO.=12)

+VSBP +VSB

(3000mA,120mils ,Via NO.= 6)

+1.1VSP +1.1VS

Compal Secret Data

PJ14

2

JUMP_43X118@

PJ15

2

JUMP_43X118@

PJ13

2

JUMP_43X118@

PJ6

2

JUMP_43X39@

PJ17

112

JUMP_43X79

PJ21

112

JUMP_43X79

Deciphered Date

C

PJ12

112

2

+5VALW

+1.5VS+1.5VSP

+VCCP+VCCPP +VGA_CORE +VCCP

2008/6/222007/6/22

+1.8VP +1.8V

+VGA_COREP +VGA_CORE

2

112

JUMP_43X118@

(8A,320mils ,Via NO.=16)

JUMP_43X118@

PJ3

2

112

JUMP_43X39@

(2A,80mils ,Via NO.= 4)(5A,200mils ,Via NO.= 10)

PJ10

2

112

JUMP_43X79

PJ11

2

112

JUMP_43X79

(15A,600mils ,Via NO.=30)(120mA,40mils ,Via NO.= 2)

PJ18

2

112

JUMP_43X79

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

BATTERY CONN / OTP

+0.9VS+0.9VSP

of

45 53Monday, May 12, 2008

of

45 53Monday, May 12, 2008

of

D

45 53Monday, May 12, 2008

1.0

A

hexainf@hotmail.com gratuito - free of charge.

PQ37

PQ37 FDS4435BZ_SO8

FDS4435BZ_SO8

8

S

D

7

12

47K_0402_5%

2

PC160

0.01U_0603_50V7K

PR132

PR132 3K_0402_1%

3K_0402_1%

1 2

D

6

D

5

D

12

PC162

1800P_0402_50V7K

2

1 3

13

PQ8

PQ8 DTC115EUA_SC70-3

DTC115EUA_SC70-3

2

A

S S

G

PQ9

PQ9 DTA144EUA_SC70-3

DTA144EUA_SC70-3

2

G

13

PQ15

PQ15 DTC115EUA_SC70-3

DTC115EUA_SC70-3

VIN

1 1

12

PR68

13

D

2

2 2

G

S

PQ7

PQ7 SSM3K7002F_SC59-3

SSM3K7002F_SC59-3

PACIN<39>

ACON<39>

3 3

ACOFF<39>

4 4

P2

1 2 3 4

12

PC56

0.1U_0603_25V7K

12

PR78

150K_0402_1%

IREF<33>

13

D

PQ11

S

SSM3K7002F_SC59-3

12

PR73

PQ38

PQ38 FDS4435BZ_SO8

FDS4435BZ_SO8

1 2 3 4

200K_0402_1%

MB39A126

12

PR27

PR27 100K_0402_1%

100K_0402_1%

1 2

FSTCHG<33>

8

S

D

7

S

D

6

S

D

5

G

D

ADP_I<31,33>

A/D

0.22U_0603_16V7K

PR126

10K_0402_1%

1 2

12

PC6

PR12

10K_0402_1%

0.01U_0402_25V7K

12

PR22

100K_0402_1%

PC92

4700P_0402_25V7K

PR1

65W: PR1=49.9K 90W: PR1=31.6K

31.6K_0402_1%

PC9

MB39A126

0.22U_0603_16V7K

12

PC16

0.01U_0402_25V7K

+3VALWP

2

7

B

CP mode 65W: 2.8A

P3

90W: 4.0A

12

PR122

10K_0402_5%

1 2

PR123

PC90

1 2

PR14

PR14 1K_0402_1%

1K_0402_1%

1 2

PR123 100K_0402_1%

100K_0402_1%

PC14

PC14 2200P_0402_50V7K

2200P_0402_50V7K

1 2

IREF=0.4~2.88V

12

PR2

47K_0402_5%

13

PQ2

PQ2 DTC115EUA_SC70-3

DTC115EUA_SC70-3

VS

8

P

+

0

-

G

PU3B

4

LM358DR_SO8

B

13

2

5 6

4 3

PR152

0.015_1206_1%

12

PR18

PR18 10K_0402_1%

10K_0402_1%

12

CS

PQ1

PQ1 DTC115EUA_SC70-3

DTC115EUA_SC70-3

1 2

PR33

0_0402_5%

12

C

D

Fosc=14100/Rt=14100/47=300KHz

B+

12

3

LXCHRG

12

CHG_B+

PC150

0.01U_0402_25V7K

S1S2S

D8D7D6D

PQ5

FDS4435BZ_SO8

10U_LF919AS-100M-P3_4.5A_20%

1 2

12

PD14

PD13

B340A_SMA2

FSTCHG

SUSP#

EC_ON

1 2

13

PL12

1 2

FBMA-L11-321611-121LMA30T_1206

PU1

PU1 MB39A126PFV-ER_SSOP24

MB39A126PFV-ER_SSOP24

1

-INC2

+INC2

2

OUTC2

GND

3

+INE2

CS

4

-INE2

VCC

5

ACOK

OUT

6

VREF

VH

7

ACIN

XACOK

8

-INE1

RT

9

+INE1

-INE3

10

OUTC1

FB123

11

SEL

CTL

12

-INC1

+INC1

24

23

22

21

20

PC13

0.1U_0603_25V7K

19

18

PR19

PR19 47K_0402_1%

47K_0402_1%

17

16

MB39A126

15

14

13

1 2

PR28

PR28 33K_0402_1%

33K_0402_1%

PC21

PC21 10P_0402_50V8J

10P_0402_50V8J

12

CS

1 2

12

PC39

4.7U_1206_25V6K

PR17

0_0402_5%

1 2

PC1

0.22U_0603_16V7K

1 2

PC8

0.1U_0603_25V7K

PC17

PC17 1500P_0402_50V7K

1500P_0402_50V7K

1 2

12

PC38

12

PC37

PC36

0.1U_0603_25V7K

4.7U_1206_25V6K

ACON

ACON <39>

PR135

@

0_0402_5%

1 2

PD11 RB751V-40TE17_SOD323-2PD11 RB751V-40TE17_SOD323-2

1 2

PD10 RB751V-40TE17_SOD323-2PD10 RB751V-40TE17_SOD323-2

PR137

100K_0402_5%

1 2

PD12 RB751V-40TE17_SOD323-2@PD12 RB751V-40TE17_SOD323-2@

1 2

PC22

PC22 47P_0402_50V8J

47P_0402_50V8J

1 2

2200P_0402_50V7K

4

G

5

12

LI-3S :13.5V----BATT-OVP=1.5V BATT-OVP=0.1112*BATT+

VMB

12

VS

PR34

340K_0402_1%

12

PC5

PR29

PC161

8

1800P_0402_50V7K

PR23

PR23 10K_0402_1%

10K_0402_1%

BATT_OVP<33>

12

1

0

A/D

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2006/08/04 2006/10/06

Compal Secret Data

1800P_0402_50V7K

3

P

+

2

-

G

PU3A

4

LM358DR_SO8

Deciphered Date

PR29

0.01U_0402_25V7K

499K_0402_1%

12

PR35

105K_0402_1%

D

PR121

PR121 47K_0402_1%

47K_0402_1%

1 2

PR125

10K_0402_1%

PQ27

PQ27 DTC115EUA_SC70-3

DTC115EUA_SC70-3

2

0.1U_0603_25V7K

PL5

<32>

12

PC20

PQ32

PQ32 AO4407_SO8

AO4407_SO8

1 2 3 6

VIN

PD8

1SS355TE-17_SOD323-2

1 2

200K_0402_1%

PD9

PD9 1SS355TE-17_SOD323-2

1SS355TE-17_SOD323-2

1 2

12

PC91

4 3

PR150

0.02_1206_1%

0.01U_0402_25V7K

Date: Sheet

E

PJ8

4

PR124

1 2

13

D

PQ28

S

SSM3K7002F_SC59-3

PJ8 JUMP_43X118@

JUMP_43X118@

2

PQ34

AO4407_SO8@

8

7

5

12

PR138

10K_0402_1%

ACOFF

VIN

2

PACIN

G

1 2

10K_0402_1%

@

1 3

12

PC103

10U_1206_25V6M

Charger

112

1 2 36

4

1 2

PR139

PR139 100K_0402_1%@

100K_0402_1%@

PQ30

PQ30 DTA144EUA_SC70-3

DTA144EUA_SC70-3

@

2

13

PQ29

PQ29 DTC115EUA_SC70-3@

DTC115EUA_SC70-3@

PC102

10U_1206_25V6M

BATT+

2

PRECHG<39>

VMB

CC=3.6A (100K/(100K+100K))*2.88V=1.44V

1.44/(20*0.02)=3.6A

Charge voltage 3S CC-CV MODE : 12.6V SEL is L

Adapter 65W CP Point=2.8A 5V*(10K/(49.9K+10K))=0.835V

0.835V/(20*0.015)=2.78A Adapter 90W CP Point=4A 5V*(10K/(31.6K+10K))=1.202V

1.202V/(20*0.015)=4.006A

Compal Electronics, Inc.

Title

Size Document Number Rev

B

Compal Electronics, Inc.

CHARGER

46 53Monday, May 12, 2008

E

of

BATT+

1.0

5

hexainf@hotmail.com gratuito - free of charge.

4

3

2

1

ISL6237_B+

12

PC134

PC129

PC131

4.7U_1206_25V6K

PL10

4.7UH_PCMC063T-4R7MN_5.5A_20%

12

6.8_1206_5%

PR195

12

PC157

680P_0402_50V7K

12

2200P_0402_50V7K

12

PR174

PR172

+5VALWP

61.9K_0402_1%

1 2

10K_0402_1%

12

PC166

1

+

PC135

PC135 220U_6.3V_M

220U_6.3V_M

OS-CON

2

12

PC165

470P_0402_50V7K

0.01U_0402_25V7K

12

PR196

6.8_1206_5%

1 2

0_0402_5%

1 2

PR179

ISL6237_B+

578

3 6

241

578

PQ41

PQ41 AO4712_SO8

AO4712_SO8

3 6

241

PC86

0.22U_0603_25V7K

VL

PR181

1 2

12

PC123

0.047U_0402_16V7K

PQ42

AO4466_SO8

806K_0603_1%

12

PC126

0.1U_0603_25V7K

1 2

PR180

@PR180

@

0_0402_5%

PR182

47K_0402_5%@

1 2

0_0805_5%

1 2

PR183

PR183 0_0603_5%

0_0603_5%

PR168

PC119

0.22U_0603_10V7K

1 2

12

0.1U_0603_25V7K

DH3

BST3A

12

LX3

DL3

FB3

VL

2VREF_ISL6237

1 2

PR178

PR178 0_0402_5%

0_0402_5%

1 2

1U_0402_6.3V6K

2VREF_ISL6237

PC125

0.047U_0402_16V7K@

PC120

33 26 24

25

23

30

32

1

8

20

4

14

27

PC149

1 2

TP UGATE2 BOOT2

PHASE2

LGATE2

OUT2

REFIN2

REF

LDOREFIN

NC

EN_LDO

EN1

EN2

VL

1 2

PC121

3

6

VIN

VCC

TON

NC

2

5

12

PR169

PR169 0_0402_5%

0_0402_5%

1 2

2VREF_ISL6237

12

PC122

1U_0402_6.3V6K

7

19

LDO

PVCC

15

UGATE1

17

BOOT1

16

PHASE1

18

LGATE1

22

PGND

10

OUT1

11

FB1

9

BYP

29

SKIP

28

POK2

13

POK1

12

ILIM1

31

ILIM2

GND

PU10

21

ISL6237IRZ-T_QFN32_5X5

4.7U_0603_6.3V6K

4.7U_0603_6.3V6K 1U_0402_6.3V6K

1U_0402_6.3V6K

1 2

DH5 BST5A

PR184

PR184 0_0603_5%

0_0603_5%

LX5

DL5

FB5

ILM1

ILIM2

PC127

PR175

PR175 0_0402_5%@

0_0402_5%@

1 2

PR177

PR177 0_0402_5%

0_0402_5%

12

1 2

PC124

0.1U_0603_25V7K

12

PR176

PR176 301K_0402_1%

301K_0402_1%

PR170

PR170 301K_0402_1%

301K_0402_1%

578

PQ43

PQ43 AO4466_SO8

AO4466_SO8

3 6

241

578

PQ40

PQ40 AO4712_SO8

AO4712_SO8

3 6

241

VL

POK <38>

12

B+

PL13

1 2

FBMA-L11-321611-121LMA30T_1206

D D

+3VALWP

1

PC133

220U_6.3V_M

OS-CON

C C

B B

2

FBMA-L11-321611-121LMA30T_1206

4.7UH_PCMC063T-4R7MN_5.5A_20%

+

PR171

1 2

PR173

1 2

@

VS

1 2

0_0402_5%

10K_0402_1%

PD7

RLZ5.1B_LL34

1 2

12

PC128

PC130

4.7U_1206_25V6K

PL11

PD16

PD16 RB751V-40TE17_SOD323-2

RB751V-40TE17_SOD323-2

1 2

PR118

100K_0402_1%

1 2

PD17

PD17 RB751V-40TE17_SOD323-2@

RB751V-40TE17_SOD323-2@

1 2

MAINPWON<42,44>

PC132

2200P_0402_50V7K

12

PC156

680P_0402_50V7K

PR117

200K_0402_5%

A A

Security Classification

5

Security Classification

2007/06/22 2008/06/22

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2007/06/22 2008/06/22

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

2

Date: Sheet

+5V/+3V

Monday, May 12, 2008

1

of

47 53

of

47 53

of

47 53

1.0

A

hexainf@hotmail.com gratuito - free of charge.

1 1

PL14

1 2

B+

FBMA-L11-321611-121LMA30T_1206

ISL6228_B+

B

12

PC78

1U_0402_6.3V6K

+5VALW +5VALW

PC80

0.1U_0603_25V7K

ISL6228_B+ ISL6228_B+

PR103

PR103 10_0603_1%

10_0603_1%

PR102

2.2_0603_1%

12

PC77

PC77 1U_0402_6.3V6K

1U_0402_6.3V6K

1 2

PR101

2.2_0603_1%

12

PC67

0.1U_0603_25V7K

PR97

PR97 10_0603_1%

10_0603_1%

12

C

D

12

PC81

1000P_0402_50V7K

+5VALW

PR104

PR104 0_0603_5%

0_0603_5%

1000P_0402_50V7K

PR185

PR185 0_0402_5%@

0_0402_5%@

LX_1.8V

UG_1.8V

BST_1.8V

12

8

FB1

9

VO1

10

OCSET1

11

EN1

12

PHASE1

13

UGATE1

14

BOOT1

PR105

PR111

PC85

1000P_0402_50V7K

1 2

PR107

2 2

+1.8VP

12

PC159

10U_0805_6.3V6M

3 3

10U_0805_6.3V6M

PR107

10.5K_0402_1%

PC84

0.022U_0402_25V7K

1 2

PL8

1 2

1.8UH_SIL104R-1R8PF_9.5A_30%

1

+

PC118

PC118 220U_6.3V_M

220U_6.3V_M

OS-CON

2

SYSON <42,44>

PR110

10.5K_0402_1%

1 2

PC158

PR106

PR106 0_0402_5%

0_0402_5%

PR111

3.3K_0402_5%

1 2

12

1 2

PR109

34.8K_0402_1%

ISL6228_B+

12

PC73

4.7U_1206_25V6K

12

PR197

6.8_1206_5%

12

680P_0402_50V7K

12

PC72

4.7U_1206_25V6K

PC83

0.01U_0402_25V7K@

3 6

241

3 6

241

1.8V_EN

16.5K_0402_1%

578

PQ21

PQ21 AO4466_SO8

AO4466_SO8

578

PQ23

PQ23 AO4712_SO8

AO4712_SO8

0.1U_0402_16V7K

PC82

PR105

1 2

1.8V_EN

12

LG_1.8V

PR108

PR108 22K_0402_1%

22K_0402_1%

1 2

6

7

PGOOD1

PVCC115LGATE116PGND117PGND218LGATE219PVCC220BOOT2

PC76

1 2

1U_0402_6.3V6K

5

VIN1

FSET1

PU6

ISL6228HRTZ-T_QFN28_4X4

4

VCC1

1000P_0402_50V7K

3

VCC2

PC70

2

VIN2

+5VALW+5VALW

PC79

1 2

1U_0402_6.3V6K

12

1

FSET2

PGOOD2

OCSET2

PHASE2

UGATE2

21

BST_1.5V

GND_T

VO2

1 2

FB2

EN2

PR95

18.2K_0402_1%

29

28

27

26

25

24

23

UG_1.5V

22

1 2

PR99

PR99 0_0603_5%

0_0603_5%

PR186

PR186 0_0402_5%@

0_0402_5%@

PR100

47K_0402_5%

1 2

12

PC71

0.1U_0402_16V7K

1 2

PC69

0.1U_0402_16V7K

LG_1.5V

12

LX_1.5V

SUSP# <42,44>

+5VALW

578

3 6

578

3 6

241

PQ24

241

AO4712_SO8

PR96

16.5K_0402_1%

ISL6228_B+

12

PQ22

PQ22 AO4466_SO8

AO4466_SO8

1 2

12

PC75

4.7U_1206_25V6K

12

PC74

4.7U_1206_25V6K

PR193

6.8_1206_5%

PC154

PC154 680P_0402_50V7K

680P_0402_50V7K

PR92

3.3K_0402_5%

1.8UH_SIL104R-1R8PF_9.5A_30%

12

PR93

26.1K_0402_1%

1 2

PR98

10.5K_0402_1%

PC68

0.033U_0402_16V7K

1 2

PR94

10.5K_0402_1%

1 2

PL9

PC66

1000P_0402_50V7K

1 2

12

1

+

PC117

PC117 220U_6.3V_M

220U_6.3V_M

OS-CON

2

+1.5VSP

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Compal Secret Data

Deciphered Date

C

Compal Electronics, Inc.

Title

2008/06/222007/06/22

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

1.8V / 1.5V

48 53Monday, May 12, 2008

D

48 53Monday, May 12, 2008

1.0

of

5

hexainf@hotmail.com gratuito - free of charge.

PL15

B+

D D

C C

1 2

FBMA-L11-321611-121LMA30T_1206

12

PC151

PC151 1000P_0402_50V7K

1000P_0402_50V7K

SUSP#<19,27,29,30,35,40,42>

12

PC164

470P_0603_50V8J

0_0402_5%

1 2

12

PC55

PC163

10U_1206_25V6M

1800P_0402_50V7K

PR64

12

PC58

10U_1206_25V6M

1 2

12

PR62

PR62 0_0603_5%

0_0603_5%

6268_1.05V

PC46

2.2U_0603_6.3V6K

PC44

0.1U_0402_16V7K

@

0.1U_0402_16V7K

@

6268_B+

12

PC51

0.1U_0402_16V7K

@

0.1U_0402_16V7K

@

12

PC45

4

3

4

5

22P_0402_50V8J

PC49

6800P_0402_25V7K

6268_1.05V

PR60

10K_0402_1%

8

GND

VIN

VCC

EN

COMP6FB7FSET

12

PR61

49.9K_0402_1%

12

2

1UG16

PHASE

PGOOD

PR51

37.4K_0402_1%

PHASE_1.05V

9

12

PR54

1 2

1_0603_5%

BOOT_1.05V

15

BOOT

PVCC

LG

PGND

ISEN

VO

PU4

10

ISL6268CAZ-T_SSOP16

12

PC34

0.01U_0402_25V7K

+5VS

12

14

PC33

2.2U_0603_6.3V6K

13

12

ISEN_1.05V

11

PR52

3.9K_0402_1%

3

UG_1.05V

1 2

PC43 0.1U_0603_25V7K

PR49

PR49 0_0603_5%

0_0603_5%

1 2

PR50

4.7_0603_5%

1 2

LG_1.05V

1 2

6268_1.05V

2

578

3 6

241

PQ19

SI4686DY-T1-E3_SO8 PQ19

SI4686DY-T1-E3_SO8

5

D8D7D6D

S1S2S3G

4

PQ18

5

D8D7D6D

S1S2S3G

4

FDS8672S 1N SO8

PQ12

FDS8672S 1N SO8

PL7

1UH_PCMB103E-1R0MS_20A_20%

1 2

12

PR194

6.8_1206_5%

12

PC155

PC155 680P_0402_50V7K

680P_0402_50V7K

PR57

@

0_0402_5%

1 2

PR58

2.8K_0402_1%

1 2

12

PR59

PR59 3K_0402_1%

3K_0402_1%

PR55

PR55 0_0402_5%

0_0402_5%

PR53

PR53 0_0402_5%@

0_0402_5%@

1

+VGA_CORE

1

+

PC112

PC112 220U_6.3V_M

220U_6.3V_M

2

OS-CON

12

+VGASENSE

+VCCP

+VGA_COREP

PC148

PC148 10U_0805_6.3V6M

10U_0805_6.3V6M

B B

A A

Security Classification

5

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

2008/6/222007/6/22

2

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

VGA_CORE

49 53Monday, May 12, 2008

1

1.0

of

5

hexainf@hotmail.com gratuito - free of charge.

4

3

2

1

+VGA_CORE

D D

SUSP#<19,27,29,30,35,40,42>

C C

B B

PR191

0_0402_5%

SUSP<35>

1 2

0.1U_0402_16V7K@

PC141

10U_0805_6.3V6M

PR187

PR187 100K_0402_5%

100K_0402_5%

1 2

0.47U_0402_6.3V6K

PC144

4.7U_0603_6.3V6K

12

PC146

2

G

12

PC110

+1.8VS

1

PJ20

1

JUMP_43X79

2

12

1.91K_0402_1%

13

D

3.16K_0402_1%~D

PQ44

S

SSM3K7002F_SC59-3

+5VS

12

PR190

PR192

PC136

PC136 1U_0402_6.3V6K

1U_0402_6.3V6K

PU11

6 5 9

8 7

12

PC143

0.1U_0402_16V7K

VCNTL VIN VIN

EN POK

1

12

3

VOUT

4

VOUT

2

FB

GND

APL5912-KAC-TRL_SO8

PU12

VIN1VCNTL

2

GND

3

VREF

4

VOUT

APL5331KAC-TRL_SO8

12

PC147

PC147 22U_0805_6.3V6M

22U_0805_6.3V6M

1.27K_0402_1%

+1.1VSP

PR188

NC NC NC

TP

12

PR189

3.65K_0402_1%

6 5 7 8 9

12

PC139

0.01U_0402_25V7K

+5VS

12

PC145

PC145 1U_0402_6.3V6K

1U_0402_6.3V6K

12

PC142

PC142 10U_0805_6.3V6M

10U_0805_6.3V6M

SUSP<35>

+VCCPP

0_0402_5%

1 2

0.1U_0402_16V7K@

4.7U_0603_6.3V6K

PR89

PC61

+1.8V

1

PJ4

1

JUMP_43X39@

2

12

PC64

13

D

2

G

12

PQ20

S

SSM3K7002F_SC59-3

PR91

1K_0402_1%

PR90

1K_0402_1%

12

PC63

0.1U_0402_16V7K

12

PU5

VIN1VCNTL

2

GND

3

VREF

4

VOUT

APL5331KAC-TRL_SO8

+0.9VSP

12

PC62

PC62 10U_0805_6.3V6M

10U_0805_6.3V6M

6 5

NC

7

NC

8

NC

9

TP

+3VALW

12

PC65

PC65 1U_0402_6.3V6K

1U_0402_6.3V6K

A A

Security Classification

5

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

2008/6/222007/6/22

2

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

VCCP/0.9V/1.1V

50 53Monday, May 12, 2008

1

1.0

of

5

hexainf@hotmail.com gratuito - free of charge.

D D

499_0402_1%

VGATE<21,30>

H_PSI#<5>

PGD_IN

C C

B B

A A

VR_TT#

PR127

4.22K_0402_1%@

VCCSENSE<5>

+CPU_CORE

1 2

PC4

0.015U_0402_16V7K@

PR134

97.6K_0402_1%

1 2

PR129

PR129 20_0402_5%

20_0402_5%

1 2

CLK_ENABLE#<21>

+3VS

PR13

1 2

0.022U_0402_16V7K

PR5

1 2

13K_0402_1%

1 2

PC2

PC2 1000P_0402_50V7K

1000P_0402_50V7K

PR133

1 2

6.81K_0402_1%

1 2

PC95

PC95 1000P_0402_50V7K

1000P_0402_50V7K

1 2

PC93

PC93 220P_0402_50V7K

220P_0402_50V7K

1 2

PR11

PR11 255_0402_1%

255_0402_1%

1 2

PR128

PR128 0_0402_5%

0_0402_5%

VSSSENSE<5>

DPRSLPVR<8,21>

H_DPRSTP#<5,8,20>

+3VS

1 2

PR6

PR6 147K_0402_1%

147K_0402_1%

PH3

100K_0603_1%_TH11-4H104FT@

1 2

PC3

12

PC94

PC94 470P_0402_50V7K

470P_0402_50V7K

1 2

PR4

PR4 1K_0402_1%

1K_0402_1%

PR131

20_0402_5%

VCC_PRM

12

1 2

PR20

PR20 0_0402_5%

0_0402_5%

1 2

PR16

PR16 0_0402_5%

0_0402_5%

1 2

PR15

PR15 0_0402_5%

0_0402_5%

1 2

12

PC10

PR8

1.91K_0402_1%

PR7

PR7 0_0402_5%@

0_0402_5%@

@

1 2

PC7

PC7 1000P_0402_50V7K

1000P_0402_50V7K

1 2

PC12

12

0.018U_0603_50V7J

PC11

0.018U_0603_50V7J

1 2

PR130

PR130 0_0402_5%

0_0402_5%

1 2

PR30

PR30 1K_0402_1%

1K_0402_1%

0.22U_0603_10V7K

PR9

PR9 0_0402_5%

0_0402_5%

12

1U_0402_6.3V6K

1

PGOOD

2

PSI#

3

PMON

4

RBIAS

5

VR_TT#

6

NTC

7

SOFT

8

OCSET

9

VW

10

COMP

11

FB

12

FB2

PR10

PR10 0_0402_5%

0_0402_5%

1 2

PC18

48

49

3V3

GND

VDIFF13VSEN14RTN15DROOP16DFB17VO18VSUM19VIN20GND21VDD22ISEN223ISEN1

12

PR3

PR3 1K_0402_1%

1K_0402_1%

PC19

PC19 180P_0402_50V8J

180P_0402_50V8J

1 2

PR24

4.42K_0402_1%

4

<30>

VR_ON

12

PR21 0_0402_5%PR21 0_0402_5%

44

46

47

45

VR_ON

CLK_EN#

DPRSTP#

DPRSLPVR

PU2

PU2 ISL6262ACRZ-T_QFN48_7X7

ISL6262ACRZ-T_QFN48_7X7

12

PC15

0.018U_0603_50V7J

1 2

PC23

0.1U_0402_16V7K

12

PC25

0.22U_0402_6.3V6K

<5>

CPU_VID4

CPU_VID5

12

PR31 0_0402_5%PR31 0_0402_5%

PR26 0_0402_5%PR26 0_0402_5%

12

PC96

0.1U_0603_25V7K

12

PR38

<5>

CPU_VID3

CPU_VID2

12

PR32 0_0402_5%PR32 0_0402_5%

12

PC24

1U_0402_6.3V6K

1 2

12

PR41

2.61K_0402_1%

PH1

PH1 10KB_0603_5%_ERTJ1VR103J

10KB_0603_5%_ERTJ1VR103J

11K_0402_1%

1 2

<5>

CPU_VID6

12

PR25 0_0402_5%PR25 0_0402_5%12PR36 0_0402_5%PR36 0_0402_5%

43

12

<5>

CPU_VID1

CPU_VID0

12

PR39 0_0402_5%PR39 0_0402_5%

PR37 0_0402_5%PR37 0_0402_5%

VID037VID138VID239VID340VID441VID542VID6

BOOT1

UGATE1

PHASE1

PGND1

LGATE1

PVCC

LGATE2

PGND2

PHASE2

UGATE2

BOOT2

24

1 2

PR136

PR136 10_0603_1%

10_0603_1%

VSUM

NC

36 35 34 33 32 31 30 29 28 27 26 25

ISEN1 ISEN2

PR141

PR141 1_0603_5%

1_0603_5%

+CPU_B+

BOOT_CPU1

UGATE_CPU1-1 PHASE_CPU1

LGATE_CPU1

LGATE_CPU2

PHASE_CPU2

BOOT_CPU2

1 2

PR43

1_0603_5%

+5VS

12

PC100

0.022U_0402_16V7K

1_0603_5%

PR42

1 2

PC29

0.22U_0603_10V7K

3

+5VS

PR142

PR142 1_0603_5%

1_0603_5%

1 2

12

PC99

2.2U_0603_6.3V6K

0.22U_0603_10V7K

0.22U_0603_10V7K PC28

PC28

1 2

UGATE_CPU1-2

5

4

UGATE_CPU2-2UGATE_CPU2-1

5

4

2

+CPU_B+

12

PC32

PC153

10U_1206_25V6M

470P_0402_50V7K

PQ4

PQ4 FDMS8692 1N POWER56-8

FDMS8692 1N POWER56-8

3 5

241

5

D8D7D6D

S1S2S3G

PQ35

D8D7D6D

S1S2S3G

FDS8672S 1N SO8

4

3 5

241

5

D8D7D6D

S1S2S3G

4

FDS8672S 1N SO8

PQ33

12

PC104

PC104 680P_0402_50V7K

680P_0402_50V7K

FDS8672S 1N SO8

PQ36

12

PQ3

PQ3 FDMS8692 1N POWER56-8

FDMS8692 1N POWER56-8

12

D8D7D6D

12

S1S2S3G

PQ31

FDS8672S 1N SO8

PC98

PC98 680P_0402_50V7K

680P_0402_50V7K

12

PC35

PC152

10U_1206_25V6M

PR151

6.8_1206_5%

12

PC30

PC31

10U_1206_25V6M

PR145

6.8_1206_5%

12

2200P_0402_50V7K

12

PR48

3.65K_0402_1%

VSUM

+CPU_B+

10U_1206_25V6M

12

PR46

3.65K_0402_1%

VSUM

PC105

0.36UH_MPC1040LR36_24A_20%

12

PL4

PR45

PR40

PR40 0_0603_5%@

0_0603_5%@

10K_0402_1%

1 2

ISEN1

PC27

0.22U_0603_10V7K

0.36UH_MPC1040LR36_24A_20%

PL2

12

PR143

PR140

10K_0402_1%

0_0603_5%@

1 2

PC97

0.22U_0603_10V7K

ISEN2

PL1

HCB4532KF-800T90_1812

1 2

1

+

0.01U_0402_25V7K

2

220U_25V_M

12

PR44

1_0402_5%

VCC_PRM

12

PR144

PR144 1_0402_5%

1_0402_5%

VCC_PRM

PC41

12

+CPU_CORE

1

12

PC42

PC40

680P_0402_50V7K

B+

3300P_0402_50V7K

5

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2007/6/22 2008/6/22

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

2

Date: Sheet

+CPU_CORE

Monday, May 12, 2008

1.0

51 53

1

1.0

of

NO DATE PAGE MODIFICATION LIST PURPOSE

hexainf@hotmail.com gratuito - free of charge.

-------------------------------------------------------------------------------------------------------------

10/12 Add PR185, PR186

P48 Reserve for debug use.

P49 Because HW reserve enough CAP.10/12 Delete PC110

10/17 P49 Add PU11, PC136, PC141, PC142, PC139, PC110,

10/17 P49 HW request change VGA_CORE from 1.1V to 1.16VChange PR58 from 2.7k_0402_1% to 2.8k_0402_1%

PR187, PR188, PR189

PR59 from 3.24k_0402_1% to 3k_0402_1%.

Because need separate +VCCP and +VGA_CORE

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2005/06/01 2006/06/01

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Monday, May 12, 2008

Date: Sheet

Power PIR

JIWA3/A4_LA4212P

51 51

of

1.0

NO DATE PAGE MODIFICATION LIST PURPOSE

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-------------------------------------------------------------------------------------------------------------

1 12/10

12/10

2

3

12/10

4

12/10

5

D D

6 12/10

7 12/10

8 01/02

9 01/02

10 01/02

11 01/02

12 01/02

13 01/02

14 01/02

15 02/27

16 02/27

17 02/27

C C

18 02/27

19 02/27

20 02/27

21 05/08

22 05/08

05/08

23

05/08

24

05/08

25

05/08

26

27

05/08

28

05/08

5

P29 C615 change to R615 and BOM Structure change to PM@

P20、P21 R104 & R154 BOM Structure change to PM@ Reduce cost

P16 R86、R645、R646、R650、R651、R652 & R653 BOM

P29 R614 change from 10K to 45.3ohm

P08 R79 change from 33 to 10ohm

Structure change to PM@

R615 change from 12K to 54.9ohm

R80、R81、R82 & R85 change from 0 to 22 ohm

P30 The C783 links to GND Fix Internal MIC issue

P41 Add L45 & L46 MBC1608121YZF Bead Fix F/B issue

P11 Change C126 package

P28 Add R707 to connect VGATE to M_PWROK Modify power sequence

P16 Add R699 to connect +VGASENSE

P16 Remove U3.P1

P19 Add R700 to connect GND

P11 Add C707 for +VCC_DMI

P16 Add C788

P08 change R147 from 511 ohm 1% to 499 ohm 1%

P23 change D4 location

P23 Add D25 , D26 for ESD

P25

Add D27 , D28 & D29 for ESD

P29 Add R713 connect to 1.5V

P31 change C550 , C570 , C506 & C507 to 0.1uF 0603

P05 Add R726 1k ohm & C808 0.1uF to fix issue.

P16 Remove R48 for EMI request.

P27 Change R554 from 0 ohm to 33 ohm for EMI request.

P28 Add R566 10 ohm & C733 10pF for EMI request.

P30 Add R327 47 ohm & C458 33pF for EMI request.

P35 Change C501 & C514 from 15pF to 12pF

P37 Add D31 (PJDLC05_SOT23-3) for ESD request.

P41 Add C494、C522、C564 & C568 220pF for EMI request

4

3

2

1

Fix DIS Audio issue

Reduce cost

Fix UMA Audio issue

for nvidia request for +PEX_PLLVDD

Fix pop noise issue

B B

A A

Title

<Title>

Size Document Number Rev

JIWA3/A4_LA4212P 1.0

Custom

JIWA3/A4_LA4212P 1.0

Custom

JIWA3/A4_LA4212P 1.0

5

4

3

2

Custom

Date: Sheet

Date: Sheet of

53 53Monday, May 12, 2008

1

of

Lenovo G530 N500 Schematics

Specifications and Main Features

Frequently Asked Questions

User Manual