Page 1
CLK GEN
ICS954226
DDR2
400/533/667Mhz
LCD/BTN
S/P DIF
Line In
MIC In
LineOut
Speaker
PWR SW
30
30
30
30
30
22
Audio DJ
AC'97
CODEC
ALC655
29
OP AMP
GMT1421b
PCI Express
PCI-E Card
22
BlueTooth
W06N Block Diagram
Thermal
G768D
21
T8
MAX6510
21
PCI Express
SDVO
RGB
LVDS
S-Video
PCI BUS
LAN
RTL8100CL
LPC BUS
NS
87381
PATA
22
FIR
34
34
03
11,12
LPC
31
AC-Link
MODEM
MDC Card
23
30
Mobile CPU
Yonah
C1 Stepping
Calistoga
B1 Stepping
ICH7-M
B2 Stepping
SATA
HDD
(master)
USB
4 PORT
HDD
Reserve
USB*6
DB
04.05
533 / 667 MHz HOST BUS
PM
GM
GML
06,07,08,09,10
100MHz DMI I/F
17.18.19.20
ODD
22
(slave)
MXM VGA Card
VRAM*4
M24-P/NV43
DB
CH7307
15
Cardbus/1394/
CardReader
ENE CB810
Mini-PCI
802.11A/B/G
TXFM
27
KBC
ENE
PS2
KB3910
Touch
Pad
32
33 33
DB
XD
INT_KB
24,25
BIOS
4Mb
Switch
28
RJ45
LPC
DEBUG
CONN.
35 35
TMDS
RGB
LVDS
PWR SW
CP2211
DB
S-Video
25
CARDBUS
ONE SLOT
CardReader
7 in 1
1394*1
DVI
CONN
15
CRT
CONN
14
LCD
XGA/SXGA+
16
TV-OUT
DB
SYSTEM DC/DC
MAX1999
INPUTS
DCBATOUT
SYSTEM DC/DC
MAX1845
INPUTS OUTPUTS
DCBATOUT
Maxim 8550
DCBATOUT
OUTPUTS
5V_S5
3V_S5
5V_AUX
3D3V_AUX
1D05V_S0
1D5V_S0
1D8V_S3
0D9V_S0
MAXIM CHARGER
MAX1645B
OUTPUTS INPUTS
BT+
26
26
DCBATOUT
18V 4.0A
5V_AUX
5V 100mA
CPU DC/DC
26
PCB LAYER
L1:
Signal 1
GND
L2:
L3: Signal 2
Signal 3
L4:
VCC L5:
L6:
Signal 4
INPUTS
DCBATOUT
SYSTEM DC/DC
MAX1993
(external VGA Core)
INPUTS
DCBATOUT
SC452
OUTPUTS
VCC_CORE
0.844~1.3V
27A
OUTPUTS
1D2V_S0
FOXCONN ND2
Title
Size Document Number Rev
<Doc>
A3
Date: Sheet of
Block Diagram
W06N
14 4 Saturday, February 19, 2005
40
38
39
DB
37
DB
SA
Page 2
Calistoga Strapping Signals
A
and Configuration
Pin Name Strap Description Configuration
CFG[2:0]
CFG[3:4]
4 4
CFG5
CFG6
CFG7
CFG8
CFG9
CFG10
CFG11
CFG[13:12]
CFG[14:15]
3 3
CFG16
CFG17
CFG18
CFG19
CFG20
SDVO
CRTL_DATA
All strap signals are sampled with respect to the leading
NOTE:
edge of the Alviso GMCH PWORK In signal.
FSB Frequency Select
Reversed
DMI x2 Select
NB strap
CPU Strap
Reversed
PCI Express Graphics
Lane reverse option
for layout convenience
Reversed
Reversed
Reversed
Reversed
Reversed
Reversed
FSB Dynamic ODT 0 = Dynamic ODT Disabled
Reversed
GMCH core VCC
Select
DMI Lane Reversal
0= Only SDVO or PCIEx1 is operational ( default)
1= SDVO and PCIE x1 are operating
simultaneously via the PEG port
SDVO Present
001 = FSB533
011 = FSB667
Others = Reversed
0 = DMI x2
1 = DMI x4
0 = Moby Dick
1 = Calistoga
0= Reserved
1=Mobility
0=Reverse Lanes
1=Normal Operation
1 = Dynamic ODT Enabled
(Default)
0 = 1.05V
1 = 1.5V
0 = Normal
1 = Lanes Reversal
0 = No SDVO device present
1= SDVO device present
(Default)
(Default)
(Default)
(Default)
(Default)
(Default)
(Default)
KBC Hardware Strap
PinNumber PinName Function
2 2
125
128
131
11
A1
A4
A5
GPIO05
High:Enable the internal pull-up resistors on XIOCS [F:0] pins
Low:Disable the internal pull-up resistors on XIOCS [F:0]
High: Diasble DMPP(Recommended)
Low : Enable DMPP
High:Enable EMWB(Recommended for application using shared BIOS
Low:Disable EMWB
High:Test Mode
Low:32KHz clock in normal running(Recommend)
page 7
B
ICS954226 Spread Spectrum
C
Select
Byte 6b7
1
1
1
1
1
1
1
1
Byte 6b6
byte 6b5 Byte 6b4 Spread Mode Spread Amount%
00 0
00
00
1
0
11
00
1
0
11
11
11 1
1
0
Down
Down
Down
Down
Center
Center
Center
Center
PCI Routing
IRQ
CB810
MiniPCI
LAN
25
21
23
1394 19 3 E
E
G
F
REQ/GNT IDSEL
0
1
2
ICH7-M IDE Integrated Series
Termination Resistors
DD[15:0],
DDACK#,
DCS3#,
IORDY,
IDEIRQ
DIOR#, DREQ, DIOW#,
DA[2:0],
DCS1#,
approximately 33 ohm
page 3
0.8
1.25
1.75
2.5
+-0.3
+-0.5
+-0.8
+-1.25
Pin17/18
Mhz
100
100
100
100
100
100
100
100
D
ICH7-M Integrated Pull-up
and Pull-down Resistors
GNT[3:0]
GNT[5]#/GPO[17],
GPIO[25]
LAN_RXD[2:0],
TP[3]
ACZ_RST#, ACZ_SDIN[2:0],
ACZ_SYNC, ACZ_SDOUT,
EE_CS,
DDREQ
DPRSTP#
SPI_ARB, SPI_CLK,
SPKR,
(Default)
EE_DIN,EE_DOUT,
GNT[4]#/GPO[48],
GNT[6]#/GPO[16],
LAD[3:0]#/FB[3:0]#,
LDRQ[0], LDRQ[1]/GPI[41],PME#,
PWRBTN#,
SATALED#
ACZ_BITCLK,
DPRSLPVR,
USB[7:0][P,N]
DD[7],
LAN_CLK
ICH7-M Strapping Options
This signal enables the internal VccSus1_5V suspend
regulator when connected to VccRTC. When connected to
GND, the internal regulator is disabled.
INVTVRMEN
SPKR
Pin Name Strap Description Configuration
GNT3#
LINKALERT#
SPKR
INTVRMEN
GPIO25
EE_CS
GNT5#
/GPIO17#.
GNT4#
/GPIO48.
EE_DOUT
ACZ_SDOUT
ACZ_SYNC
GPIO16/
DPRSLPVR
SATALED# Reversed
REQ[4:1]# XOR Chain Selection
TP3 XOR Chain Entrance
To enable internla VccSus1_5V VRM pull signal to
VccRTC via 330Kohm
The signal has a weak internal pull-down. If the
signal is sampled high, this indicates that the
system is strapped to the "No Reboot" mode (ICH7M
will disable the TCO Timer system reboot feature).
The status of this strap is readable via the NO
REBOOT bit. NOTE: Please refer to ICH7M EDS Rev0.5
(or latest) for all ICH7M Strap details.
Top-Block Swap
Override
Reversed
No Reboot
VccSus1_05 VRM
Enable/Disable.
Reserved
Reversed
Boot BIOS
Destination
Selection
Reversed
XOR Chain Entrance
PCI-E Port CFG Bit 0 Reversed
Reversed
E
ICH7-M EDS 16971 1.0V1
ICH7 internal 20K pull-ups
ICH7 internal 15K pull-ups
ICH7 internal 20K pull-downs
ICH7 internal 15K pull-downs
ICH7 internal 11.5K pull-downs
ICH7 internal 100K pull-downs
Internal Pull-up for
top-block swap mode.
Internal pull-down to indicate system
is strapped to the no reboot more.
0 = Disable
1 = Enable
01 = SPI
10 = PCI
11 = LPC
0 = Allow XOR Testing
1 = Not Allow
Not available in Datasheet Yet
Not available in Datasheet Yet
(Default)
(Default)
(Default)
12
GPIO06
High:Test Mode(KSOUT0~15 become DPLL internal data outputs,
KSO16 becomes internal power-on reset output
1 1
105
GPIO20
Low:Normal operation(Recommended)
High:Normal operation(Recommended)
Low:Enable ISP mode during which the RD#,WR#,MEMSEL#,A[20:0]
andD[7:0}will be controlled by ISP COntriller
Title
Size Document Number Rev
<Doc>
A3
Date: Sheet of
Table of content
W06N
24 4 Saturday, February 19, 2005
SA
FOXCONN ND2
Page 3
3D3V_S0 3D3V_S0 3D3V_S0
0 R0603
+/-5%
R93
*
3D3V_CLKGEN_S0
R515
1K
+/-5%
R0402
R42
1K
+/-5%
R0402
3D3V_APWR_S0 3D3V_CLKGEN_S0 3D3V_48MPWR_S0
C101
4.7uF
C0805
10V, Y5V, +80%/-20%
ITP_EN 0=PCIEX_6 1=CPU_2_ITP
SS_SEL 0=LCDCLK 1=PCIEX/free running
3.3V PCI clock output
C93
0.1uF
*
16V, Y5V, +80%/-20%
C0402
3D3V_S0
FS_A
FS_C
CFG1
FS_B
FS_C
0
0
0
1
1 100M
1
1
R30
10K
+/-5%
R0402
DUMMY
R34
10K
+/-5%
R0402
0
0
1
1
0
0
1
1
CFG1 7
FS_A
0
01200M
1
00333M
1
0
1 200M
R519
10K
+/-5%
R0402
R35
10K
+/-5%
R0402
DUMMY
CPU
266M
133M
166M
400M
0 R0603
+/-5%
R521
ITP_EN
SS_SEL
C415
4.7uF
*
C0805
10V, Y5V, +80%/-20%
CLKEN# 38
(Default)
C90
0.1uF
*
16V, Y5V, +80%/-20%
C0402
3D3V_S0
R39
10K
R0402
+/-5%
DUMMY
PM_STPPCI# 19
R51
0 R0402 +/-5%
C66
C65
CFG1 FS_B
CLK_PCIE_ICH
CLK_PCIE_ICH#
DREFSSCLK#
DREFSSCLK
CLK_PCIE_NEW
CLK_PCIE_NEW#
DREFCLK
DREFCLK#
SATA_CLKP
SATA_CLKN
0 R0603
+/-5%
R77
*
PCLK_FWH 36
PCLK_MINI 29
PCLK_PCM 25
PCLK_KBC 33
CLK33_AUDIODJ 32
PCLK_SIO 35
PCLK_LAN 28
CLK_ICHPCI 19
VTT_PWRGD#
CLK48_ICH 19
CLK48_CARDBUS 25
DREFCLK 7
DREFCLK# 7
SMBC_ICH 12,21,23
SMBD_ICH 12
*
33pF
*
33pF
R517
0
R0402+/-5%
R59 49.9R0402 +/-1%
R60 49.9R0402 +/-1%
R62 49.9R0402 +/-1%
R61 49.9R0402 +/-1%
R63 49.9R0402 +/-1%
R64 49.9R0402 +/-1%
R53 49.9R0402 +/-1%
R55 49.9R0402 +/-1%
R69 49.9R0402 +/-1%
R70 49.9R0402 +/-1%
X2
X-14D318MHz
1 2
CLK_ICH14 19
SIO_14M 35
C97
10uF
6.3V, X5R, +/-10%
C0805
3D3V_APWR_S0
3D3V_CLKGEN_S0
R511 33 R0402 +/-5%
R37 33 R0402 +/-5%
R514 33 R0402 +/-5%
R509 33 R0402 +/-5%
R510 33 R0402 +/-5% DUMMY
R512 33 R0402 +/-5%
R36 33 R0402 +/-5%
R33 33R0402 +/-5%
H/L : CPU_ITP/SRC7
R518 22R0402 +/-5%
R516 22R0402 +/-5%
RN14
1
33
2 3
R46 47R0402 +/-5%
R49 47R0402 +/-5%
C94
0.1uF
*
C0402
16V, Y5V, +80%/-20%
3D3V_S0
R38
10K
R0402
+/-5%
DUMMY
3D3V_48MPWR_S0
SS_SEL
ITP_EN
FS_A
4P2R0402V
4
+/-5%
X2_ICS
X1_ICS
FS_C
FS_B
R58
475 R0402 +/-1%
CLK_CPU_BCLK
CLK_CPU_BCLK#
CLK_MCH_BCLK
CLK_MCH_BCLK#
CLK_PCIE_PEG
CLK_PCIE_PEG#
CLK_MCH_3GPLL
CLK_MCH_3GPLL#
C83
0.1uF
*
C0402
16V, Y5V, +80%/-20%
U3
37
VDDA
1
VDDPCI
7
VDDPCI
21
VDDPCIEX
28
VDDPCIEX
34
VDDPCIEX
42
VDDCPU
48
VDDREF
11
VDD_48
56
PCICLK2/REQ_SEL
3
PCICLK3
4
PCICLK4
5
PCICLK5
9
SELPCIEX_LCDCLK#/PCICLK_F1
55
PCI/SRC_STP#
8
ITP_EN/PCICLK_F0
10
VTT_PWRGD#/PD
12
USB_48/FS_A
14
DOT96T
15
DOT96C
46
SCLK
47
SDATA
49
XOUT
50
XIN
53
REF1/FS_C/TEST_SEL
16
FS_B/TEST_MODE
39
IREF
52
REF0
ICS954226
*internal Pull-Up resistors
**internal Pull-Down resistor
R52 49.9R0402 +/-1%
R54 49.9R0402 +/-1%
R56 49.9R0402 +/-1%
R57 49.9R0402 +/-1%
R67 49.9R0402 +/-1%
R68 49.9R0402 +/-1%
R66 49.9R0402 +/-1%
R65 49.9R0402 +/-1%
C78
0.1uF
*
C0402
16V, Y5V, +80%/-20%
CPUT2_ITP/PCIEXT6
CPUC2_ITP/PCIEXC6
LCDCLK_SS/PCIEX0T
LCDCLK_SS/PCIEX0C
**
H/L: 100/96MHz
**
PEREQ2#/PCIEXC5
*
PEREQ1#/PCIEXT5
*
*
16V, Y5V, +80%/-20%
CPU_STP#
CPUT0
CPUC0
CPUT1
CPUC1
PCIEXT1
PCIEXC1
PCIEXT2
PCIEXC2
PCIEXT3
PCIEXC3
SATACLKT
SATACLKC
PCIEXC4
PCIEXT4
GND
GND
GND
GND
GND
GND
GNDA
C95
0.1uF
C0402
*
16V, Y5V, +80%/-20%
3D3V_S0
54
44
43
41
40
CLK_XDP_CPU
36
CLK_XDP_CPU#
35
17
18
19
20
22
23
24
25
26
27
30
31
32
33
13
51
45
29
2
6
38
C81
0.1uF
C0402
R41
10K
+/-5%
R0402
DUMMY
RN13
33
RN15
33
RN17
33
RN18
33
RN19
33
RN20
33
RN21
33
RN16
33
16V, Y5V, +80%/-20%
1
2 3
1
2 3
1
1
2 3
1
2 3
1
2 3
1
2 3
1
2 3
1
2 3
1
DREFSSCLK
DREFCLK
C92
0.1uF
*
C0402
4P2R0402V
4
+/-5%
4P2R0402V
4
+/-5%
TP8
TP9
4P2R0402V
+/-5%
4
4P2R0402V
+/-5%
4
4P2R0402V
+/-5%
4
4P2R0402V
+/-5%
4
4P2R0402V
+/-5%
4
4P2R0402V
+/-5%
4
NEWCARD_DET#
C91
0.1uF
*
C0402
16V, Y5V, +80%/-20%
PM_STPCPU# 19
CLK_CPU_BCLK 4
CLK_CPU_BCLK# 4
CLK_MCH_BCLK 6
CLK_MCH_BCLK# 6
DREFSSCLK 7
DREFSSCLK# 7
CLK_PCIE_NEW 23
CLK_PCIE_NEW# 23
CLK_MCH_3GPLL 7
CLK_MCH_3GPLL# 7
CLK_PCIE_PEG 14
CLK_PCIE_PEG# 14
SATA_CLKP 18
SATA_CLKN 18
CLK_PCIE_ICH# 19
CLK_PCIE_ICH 19
NEWCARD_DET# 23
R174 0
R0603 +/-5% DUMMY
R513 0
R0603 +/-5% DUMMY
1D5V_S0
1D5V_S0
EMI capacitor
CLK_ICH14
CLK33_AUDIODJ
PCLK_PCM
PCLK_MINI
PCLK_KBC
CLK_ICHPCI
CLK48_ICH
PCLK_SIO
SIO_14M
C80 10pF C0402 50V, NPO, +/-5% DUMMY
*
C405 10pF C0402 50V, NPO, +/-5% DUMMY
*
C413 10pF C0402 50V, NPO, +/-5% DUMMY
*
C77 10pF C0402 50V, NPO, +/-5% DUMMY
*
C404 10pF C0402 50V, NPO, +/-5% DUMMY
*
C64 10pF C0402 50V, NPO, +/-5% DUMMY
*
C414 10pF C0402 50V, NPO, +/-5% DUMMY
*
C411 10pF C0402 50V, NPO, +/-5% DUMMY
*
C82 10pF C0402 50V, NPO, +/-5% DUMMY
*
FOXCONN ND2
Title
Size Document Number Rev
<Doc>
A3
Date: Sheet
Clock Generator
W06N
SA
of
34 4 Saturday, February 19, 2005
Page 4
TP48
H_RS#0
H_RS#1
H_RS#2
XDP_BPM#0
XDP_BPM#1
XDP_BPM#2
XDP_BPM#3
XDP_BPM#4
XDP_BPM#5
XDP_TCK
XDP_TDI
XDP_TDO
XDP_TMS
XDP_TRST#
XDP_DBRESET#
CPU_PROCHOT#
1D05V_S0
3D3V_S0
1
B_H_ADS# 6
B_H_BNR# 6
H_BPRI# 6
H_DEFER# 6
B_H_DRDY# 6
B_H_DBSY# 6
B_H_BREQ#0 6
H_INIT# 18
B_H_LOCK# 6
H_CPURST# 6
H_TRDY# 6
B_H_HIT# 6
B_H_HITM# 6
1
1
1
1
1
1
1
1
1
1
1
1
THERMDP1 22
THERMDN 22
PM_THRMTRIP-A# 7
R186 0 R0402+/-5%
CLK_CPU_BCLK 3
CLK_CPU_BCLK# 3
1
1
1
1
1
1
1
1
1
TP16
TP15
TP17
TP19
TP21
TP25
TP20
TP28
TP24
TP23
TP26
TP61
TP34
TP53
TP51
TP55
TP54
TP12
TP57
TP58
TP62
J4
L4
M3
K5
M1
N2
J1
N3
P5
P2
L1
P4
P1
R1
L2
K3
H2
K2
J3
L5
Y2
U5
R3
W6
U4
Y5
U2
R4
T5
T3
W3
W5
Y4
W2
Y1
V4
A6
A5
C4
D5
C6
B4
A3
1
AA1
1
AA4
1
AB2
1
AA3
1
M4
1
N5
1
T2
1
V3
1
B2
1
C3
1
B25
XDP_TDI
XDP_TMS
XDP_TDO
H_CPURST#
XDP_DBRESET#
XDP_TCK
XDP_TRST#
U40A
A[3]#
A[4]#
A[5]#
ADDR GROUP 0
A[6]#
A[7]#
A[8]#
A[9]#
A[10]#
A[11]#
A[12]#
A[13]#
A[14]#
A[15]#
A[16]#
ADSTB[0]#
REQ[0]#
REQ[1]#
REQ[2]#
REQ[3]#
REQ[4]#
A[17]#
A[18]#
ADDR GROUP 1
A[19]#
A[20]#
A[21]#
A[22]#
A[23]#
A[24]#
A[25]#
A[26]#
A[27]#
A[28]#
A[29]#
A[30]#
A[31]#
ADSTB[1]#
A20M#
FERR#
IGNNE#
STPCLK#
LINT0
LINT1
SMI#
RSVD[01]
RSVD[02]
RSVD[03]
RSVD[04]
RSVD[05]
RSVD[06]
RSVD[07]
RSVD[08]
RSVD[09]
RSVD[10]
RSVD[11]
Yonah Ball-out Rev 1.0
PROCHOT#
THERM
THERMTRIP#
RESERVED
R112 150 R0603 +/-1%
R113 39.2 R 0402 +/-1%
R111 54.9R0402 +/-1%
DUMMY
R147 54.9R0402 +/-1%
DUMMY
R211 150 R0603 +/-1%
R104 27.4R0402 +/-1%
R109 680 R0603 +/-1%
ADS#
BNR#
BPRI#
DEFER#
DRDY#
DBSY#
BR0#
IERR#
INIT#
LOCK#
CONTROL
RESET#
RS[0]#
RS[1]#
RS[2]#
TRDY#
HIT#
HITM#
BPM[0]#
BPM[1]#
BPM[2]#
BPM[3]#
PRDY#
PREQ#
TCK
TDO
TMS
TRST#
DBR#
XDP/ITP SIGNALS H CLK
THERMDA
THERMDC
BCLK[0]
BCLK[1]
RSVD[12]
RSVD[13]
RSVD[14]
RSVD[15]
RSVD[16]
RSVD[17]
RSVD[18]
RSVD[19]
RSVD[20]
H1
E2
G5
H5
F21
E1
F1
D20
B3
H4
B1
F3
F4
G3
G2
G6
E4
AD4
AD3
AD1
AC4
AC2
AC1
AC5
AA6
TDI
AB3
AB5
AB6
C20
D21
A24
A25
C7
A22
A21
T22
D2
F6
D3
C1
AF1
D22
C23
C24
B_H_A#3
B_H_A#4
B_H_A#5
B_H_A#6
B_H_A#7
B_H_A#8
B_H_A#9
B_H_A#10
B_H_REQ#0
B_H_REQ#1
B_H_REQ#2
B_H_REQ#3
B_H_REQ#4
H_STPCLK_R
TP31
TP29
TP27
TP30
TP39
TP38
TP36
TP32
TP67
TP59
TP64
B_H_A#11
B_H_A#12
B_H_A#13
B_H_A#14
B_H_A#15
B_H_A#16
B_H_A#17
B_H_A#18
B_H_A#19
B_H_A#20
B_H_A#21
B_H_A#22
B_H_A#23
B_H_A#24
B_H_A#25
B_H_A#26
B_H_A#27
B_H_A#28
B_H_A#29
B_H_A#30
B_H_A#31
B_H_A#[31..3] 6
B_H_ADSTB#0 6
B_H_REQ#[4..0] 6
B_H_ADSTB#1 6
H_A20M# 18
H_FERR# 18
H_IGNNE# 18
+/-5%
H_STPCLK# 18
R185 0 R0402
H_INTR 18
H_NMI 18
H_SMI# 18
H_IERR#
H_RS#[2..0] 6
1D05V_S0
R173
56
+/-5%
R0402
Place testpoint on
H_IERR# with a GND
0.1" away
Put thes e tw o Caps near the the rmal diode.
THERMDP1
BC34
470pF
*
50V. X7R, +/-10%
C0402
THERMDN
1D05V_S0
R177
56
+/-5%
R0402
TP56
1
PM_THRMTRIP-I# 18
PM_THRMTRIP#
should connect to
ICH6 and Alviso
without T-ing
( No stub)
1D05V_S0
R100
1K
+/-1%
Layout Note:
0.5" max length.
R0603
R102
2K
+/-1%
R0603
R178
1K
+/-5%
R0402
DUMMY
CPU_SEL1 7
B_H_DSTBN#0 6
B_H_DSTBP#0 6
B_H_DSTBN#1 6
B_H_DSTBP#1 6
R210
0
+/-5%
R0402
B_H_DINV#0 6
B_H_DINV#1 6
TEST1
TEST2
R171
1K
+/-5%
R0402
DUMMY
GTLREF0
TP65
TP60
CPU_SEL1_1
BSEL[2:0] Freq.(MHz)
L L L Reserve
L L H 133
L H L Reserve
L H H 166
B_H_D#0
B_H_D#1
B_H_D#2
B_H_D#3
B_H_D#4
B_H_D#5
B_H_D#6
B_H_D#7
B_H_D#8
B_H_D#9
B_H_D#10
B_H_D#11
B_H_D#12
B_H_D#13
B_H_D#14
B_H_D#15
B_H_D#16
B_H_D#17
B_H_D#18
B_H_D#19
B_H_D#20
B_H_D#21
B_H_D#22
B_H_D#23
B_H_D#24
B_H_D#25
B_H_D#26
B_H_D#27
B_H_D#28
B_H_D#29
B_H_D#30
B_H_D#31
1
1
U40B
E22
D[0]#
F24
D[1]#
E26
D[2]#
H22
D[3]#
F23
D[4]#
G25
D[5]#
E25
D[6]#
E23
D[7]#
K24
D[8]#
G24
D[9]#
J24
D[10]#
J23
D[11]#
H26
D[12]#
F26
D[13]#
K22
D[14]#
H25
D[15]#
H23
DSTBN[0]#
G22
DSTBP[0]#
J26
DINV[0]#
N22
D[16]#
K25
D[17]#
P26
D[18]#
R23
D[19]#
L25
D[20]#
L22
D[21]#
L23
D[22]#
M23
D[23]#
P25
D[24]#
P22
D[25]#
P23
D[26]#
T24
D[27]#
R24
D[28]#
L26
D[29]#
T25
D[30]#
N24
D[31]#
M24
DSTBN[1]#
N25
DSTBP[1]#
M26
DINV[1]#
AD26
GTLREF
C26
TEST1
D25
TEST2
B22
BSEL[0]
B23
BSEL[1]
C21
BSEL[2]
Yonah Ball-out Rev 1.0
DATA GRP 0 DATA GRP 1
MISC
D[32]#
D[33]#
D[34]#
D[35]#
D[36]#
D[37]#
D[38]#
D[39]#
D[40]#
D[41]#
DATA GRP 2
D[42]#
D[43]#
D[44]#
D[45]#
D[46]#
D[47]#
DSTBN[2]#
DSTBP[2]#
DINV[2]#
D[48]#
D[49]#
D[50]#
D[51]#
D[52]#
D[53]#
D[54]#
D[55]#
D[56]#
D[57]#
D[58]#
DATA GRP 3
D[59]#
D[60]#
D[61]#
D[62]#
D[63]#
DSTBN[3]#
DSTBP[3]#
DINV[3]#
COMP[0]
COMP[1]
COMP[2]
COMP[3]
DPRSTP#
DPSLP#
DPWR#
PWRGOOD
SLP#
PSI#
B_H_D#[63..0] 6
B_H_D#32
AA23
B_H_D#33
AB24
B_H_D#34
V24
B_H_D#35
V26
B_H_D#36
W25
B_H_D#37
U23
B_H_D#38
U25
B_H_D#39
U22
B_H_D#40
AB25
B_H_D#41
W22
B_H_D#42
Y23
B_H_D#43
AA26
B_H_D#44
Y26
B_H_D#45
Y22
B_H_D#46
AC26
B_H_D#47
AA24
W24
Y25
V23
B_H_D#48
AC22
B_H_D#49
AC23
B_H_D#50
AB22
B_H_D#51
AA21
B_H_D#52
AB21
B_H_D#53
AC25
B_H_D#54
AD20
B_H_D#55
AE22
B_H_D#56
AF23
B_H_D#57
AD24
B_H_D#58
AE21
B_H_D#59
AD21
B_H_D#60
AE25
B_H_D#61
AF25
B_H_D#62
AF22
B_H_D#63
AF26
AD23
AE24
AC20
COMP0
R26
COMP1
U26
COMP2
U1
COMP3
V1
E5
B5
D24
D6
D7
AE6
B_H_DSTBN#2 6
B_H_DSTBP#2 6
B_H_DINV#2 6
Layout Note:
Comp0, 2 connect with Zo=27.4 ohm, make
trace length shorter than 0.5" .
Comp1, 3 connect with Zo=55 ohm, make
trace length shorter than 0.5" .
B_H_DSTBN#3 6
B_H_DSTBP#3 6
B_H_DINV#3 6
R121 27.4R0402 +/-1%
R118 54.9R0402 +/-1%
R119 27.4R0402 +/-1%
R114 54.9R0402 +/-1%
H_DPRSLP# 18
H_DPSLP# 18
H_DPWR# 6
H_CPUSLP# 6,18
R97
0
+/-5%
R0402
DUMMY
PSI# 38
1D05V_S0
R150
200
+/-1%
R0402
DUMMY
H_PWRGD 18
All place within 2" to CPU
Title
Size Document Number Rev
<Doc>
A3
Date: Sheet of
CPU(1/2)
W06N
44 4 Monday, February 21, 2005
SA
FOXCONN ND2
Page 5
VCC_CORE_S0
Layout Note:
U40C
A7
VCC[001]
A9
VCC[002]
A10
VCC[003]
A12
VCC[004]
A13
VCC[005]
A15
VCC[006]
A17
VCC[007]
A18
VCC[008]
A20
VCC[009]
B7
VCC[010]
B9
VCC[011]
B10
VCC[012]
B12
VCC[013]
B14
VCC[014]
B15
VCC[015]
B17
VCC[016]
B18
VCC[017]
B20
VCC[018]
C9
VCC[019]
C10
VCC[020]
C12
VCC[021]
C13
VCC[022]
C15
VCC[023]
C17
VCC[024]
C18
VCC[025]
D9
VCC[026]
D10
VCC[027]
D12
VCC[028]
D14
VCC[029]
D15
VCC[030]
D17
VCC[031]
D18
VCC[032]
E7
VCC[033]
E9
VCC[034]
E10
VCC[035]
E12
VCC[036]
E13
VCC[037]
E15
VCC[038]
E17
VCC[039]
E18
VCC[040]
E20
VCC[041]
F7
VCC[042]
F9
VCC[043]
F10
VCC[044]
F12
VCC[045]
F14
VCC[046]
F15
VCC[047]
F17
VCC[048]
F18
VCC[049]
F20
VCC[050]
AA7
VCC[051]
AA9
VCC[052]
AA10
VCC[053]
AA12
VCC[054]
AA13
VCC[055]
AA15
VCC[056]
AA17
VCC[057]
AA18
VCC[058]
AA20
VCC[059]
AB9
VCC[060]
AC10
VCC[061]
AB10
VCC[062]
AB12
VCC[063]
AB14
VCC[064]
AB15
VCC[065]
AB17
VCC[066]
AB18
VCC[067]
Yonah Ball-out Rev 1.0
VCCSENSE and VSSSENSE lines
should be of equal length.
Layout Note:
Provide a test point (with
no stub) to connect a
differential probe
between VCCSENSE and
VSSSENSE at the location
where the two 54.9ohm
resistors terminate the
55 ohm transmission line.
VCC[068]
VCC[069]
VCC[070]
VCC[071]
VCC[072]
VCC[073]
VCC[074]
VCC[075]
VCC[076]
VCC[077]
VCC[078]
VCC[079]
VCC[080]
VCC[081]
VCC[082]
VCC[083]
VCC[084]
VCC[085]
VCC[086]
VCC[087]
VCC[088]
VCC[089]
VCC[090]
VCC[091]
VCC[092]
VCC[093]
VCC[094]
VCC[095]
VCC[096]
VCC[097]
VCC[098]
VCC[099]
VCC[100]
VCCP[01]
VCCP[02]
VCCP[03]
VCCP[04]
VCCP[05]
VCCP[06]
VCCP[07]
VCCP[08]
VCCP[09]
VCCP[10]
VCCP[11]
VCCP[12]
VCCP[13]
VCCP[14]
VCCP[15]
VCCP[16]
VCCSENSE
VSSSENSE
VCCA
VID[0]
VID[1]
VID[2]
VID[3]
VID[4]
VID[5]
VID[6]
AB20
AB7
AC7
AC9
AC12
AC13
AC15
AC17
AC18
AD7
AD9
AD10
AD12
AD14
AD15
AD17
AD18
AE9
AE10
AE12
AE13
AE15
AE17
AE18
AE20
AF9
AF10
AF12
AF14
AF15
AF17
AF18
AF20
V6
G21
J6
K6
M6
J21
K21
M21
N21
N6
R21
R6
T21
T6
V21
W21
B26
AD6
AF5
AE5
AF4
AE3
AF2
AE2
AF7
AE7
VCC_CORE_S0
1D5V_VCCA_S0
R106
100
R0402
+/-1%
DUMMY
VCC_CORE_S0
*
1D05V_S0
C221
10nF
*
C0402
H_VID0 38
H_VID1 38
H_VID2 38
H_VID3 38
H_VID4 38
H_VID5 38
H_VID6 38
10V, Y5V, +80%/-20%
C113
R105
0 R0402 +/-5%
*
10uF C0805
*
C110
10uF C0805
VCC_CORE_S0
10V, Y5V, +80%/-20%
C194
10uF
*
6.3V, X5R, +/-10%
C0805
R96
100
R0402
+/-1%
DUMMY
FB- 38
*
C109
10uF C0805
3D3V_S0
0 R0402 +/-5%
*
C108
10uF C0805
U40D
A4
VSS[001]
A8
VSS[002]
A11
VSS[003]
A14
VSS[004]
A16
VSS[005]
A19
VSS[006]
A23
VSS[007]
A26
VSS[008]
B6
VSS[009]
B8
VSS[010]
B11
VSS[011]
B13
VSS[012]
B16
VSS[013]
B19
VSS[014]
B21
VSS[015]
B24
VSS[016]
C5
VSS[017]
C8
VSS[018]
C11
VSS[019]
C14
VSS[020]
C16
VSS[021]
C19
VSS[022]
C2
VSS[023]
C22
VSS[024]
Place these
12.7K 1.56V
11K 1.52V
*
C154
C229
10uF C0805
and dummy
12K7R3F for
1D8V_VCCA_S0
*
*
C165
10uF C0805
10uF C0805
C127
10uF C0805
1D5V_VCCA_S0
BC32
I max = 120 mA
U11
1
SHDN#
2
GND
3
FB+ 38
1D05V_S0
*
C115
10uF C0805
IN
G913C
*
C187
C148
*
10uF C0805
BC33
1uF
*
C0603
R95
*
*
C112
C226
10uF C0805
10uF C0805
SET
OUT
10V, X5R, +/-10%
*
*
C184
0.1uF C0402
0.1uF C0402
*
C176
C114
10uF C0805
*
10uF C0805
5
4
BC29
*
C158
0.1uF C0402
C188
*
50V, NPO, +/-5%
1uF
*
C060310V, Y5V, +80%/-20%
*
C142
0.1uF C0402
*
C111
10uF C0805
*
10uF C0805
22pF
C0402
R170
11K
+/-1%
R0402
R176
49.9K
+/-1%
R0603
TC8
150uF
*
*
C182
0.1uF C0402
*
C126
10uF C0805
6.3V, +/-20%
C163
CTX
DUMMY
0.1uF C0402
*
C125
10uF C0805
C25
VSS[025]
D1
VSS[026]
D4
VSS[027]
D8
VSS[028]
D11
VSS[029]
D13
VSS[030]
D16
VSS[031]
D19
VSS[032]
D23
VSS[033]
D26
VSS[034]
E3
VSS[035]
E6
VSS[036]
E8
VSS[037]
E11
VSS[038]
E14
VSS[039]
E16
VSS[040]
E19
VSS[041]
E21
VSS[042]
E24
VSS[043]
F5
VSS[044]
F8
VSS[045]
F11
VSS[046]
F13
VSS[047]
F16
VSS[048]
F19
VSS[049]
F2
VSS[050]
F22
VSS[051]
F25
VSS[052]
G4
VSS[053]
G1
VSS[054]
G23
VSS[055]
G26
VSS[056]
H3
VSS[057]
H6
VSS[058]
H21
VSS[059]
H24
VSS[060]
J2
VSS[061]
J5
VSS[062]
J22
VSS[063]
J25
VSS[064]
K1
VSS[065]
K4
VSS[066]
K23
VSS[067]
K26
VSS[068]
L3
VSS[069]
L6
VSS[070]
L21
VSS[071]
L24
VSS[072]
M2
VSS[073]
M5
VSS[074]
M22
VSS[075]
M25
VSS[076]
N1
VSS[077]
N4
VSS[078]
N23
VSS[079]
N26
VSS[080]
VSS[081]P3VSS[162]
Yonah Ball-out Rev 1.0
VSS[082]
VSS[083]
VSS[084]
VSS[085]
VSS[086]
VSS[087]
VSS[088]
VSS[089]
VSS[090]
VSS[091]
VSS[092]
VSS[093]
VSS[094]
VSS[095]
VSS[096]
VSS[097]
VSS[098]
VSS[099]
VSS[100]
VSS[101]
VSS[102]
VSS[103]
VSS[104]
VSS[105]
VSS[106]
VSS[107]
VSS[108]
VSS[109]
VSS[110]
VSS[111]
VSS[112]
VSS[113]
VSS[114]
VSS[115]
VSS[116]
VSS[117]
VSS[118]
VSS[119]
VSS[120]
VSS[121]
VSS[122]
VSS[123]
VSS[124]
VSS[125]
VSS[126]
VSS[127]
VSS[128]
VSS[129]
VSS[130]
VSS[131]
VSS[132]
VSS[133]
VSS[134]
VSS[135]
VSS[136]
VSS[137]
VSS[138]
VSS[139]
VSS[140]
VSS[141]
VSS[142]
VSS[143]
VSS[144]
VSS[145]
VSS[146]
VSS[147]
VSS[148]
VSS[149]
VSS[150]
VSS[151]
VSS[152]
VSS[153]
VSS[154]
VSS[155]
VSS[156]
VSS[157]
VSS[158]
VSS[159]
VSS[160]
VSS[161]
P6
P21
P24
R2
R5
R22
R25
T1
T4
T23
T26
U3
U6
U21
U24
V2
V5
V22
V25
W1
W4
W23
W26
Y3
Y6
Y21
Y24
AA2
AA5
AA8
AA11
AA14
AA16
AA19
AA22
AA25
AB1
AB4
AB8
AB11
AB13
AB16
AB19
AB23
AB26
AC3
AC6
AC8
AC11
AC14
AC16
AC19
AC21
AC24
AD2
AD5
AD8
AD11
AD13
AD16
AD19
AD22
AD25
AE1
AE4
AE8
AE11
AE14
AE16
AE19
AE23
AE26
AF3
AF6
AF8
AF11
AF13
AF16
AF19
AF21
AF24
VCC_CORE_S0
*
*
*
*
C228
10uF C0805
DUMMY
C175
*
10uF C0805
DUMMY
DUMMY
C225
10uF C0805
DUMMY
C223
10uF C0805
DUMMY
C227
10uF C0805
VCC_CORE_S0
10V, Y5V, +80%/-20%
*
C191
VCC_CORE_S0
*
C130
*
10uF C0805
*
10uF C0805
*
*
C222
C192
10uF C0805
10uF C0805
*
*
C193
C189
10uF C0805
10uF C0805
*
*
C146
C155
10uF C0805
10uF C0805
*
*
C131
10uF C0805
*
*
C145
10uF C0805
C164
C169
10uF C0805
10uF C0805
C230
10uF C0805
FOXCONN ND2
*
*
C129
10uF C0805
*
C128
C107
10uF C0805
10uF C0805
*
*
C170
10uF C0805
C190
C224
10uF C0805
10uF C0805
Title
Size Document Number Rev
<Doc>
A3
Date: Sheet of
CPU(2/2)
W06N
54 4 Saturday, February 19, 2005
SA
Page 6
H_XRCOMP
R543
24.9
+/-1%
R0402
Place them near to the chip
1D05V_S0
R544
54.9
+/-1%
R0402
H_XSCOMP
Place them near to the chip
1D05V_S0
R545
221
+/-1%
R0402
H_XSWING
R546
100
+/-1%
R0603
*
Place them near to the chip
H_YRCOMP
R539
24.9
+/-1%
R0402
Place them near to the chip
1D05V_S0
R542
54.9
+/-1%
R0402
H_YSCOMP
1D05V_S0
Place them near to the chip
R541
221
+/-1%
R0402
H_YSWING
R540
100
+/-1%
R0603
*
C449
0.1uF
10V, X7R, +/-10%
C0402
C438
0.1uF
10V, X7R, +/-10%
C0402
B_H_D#[63..0] 4
CLK_MCH_BCLK 3
CLK_MCH_BCLK# 3
B_H_D#0
B_H_D#1
B_H_D#2
B_H_D#3
B_H_D#4
B_H_D#5
B_H_D#6
B_H_D#7
B_H_D#8
B_H_D#9
B_H_D#10
B_H_D#11
B_H_D#12
B_H_D#13
B_H_D#14
B_H_D#15
B_H_D#16
B_H_D#17
B_H_D#18
B_H_D#19
B_H_D#20
B_H_D#21
B_H_D#22
B_H_D#23
B_H_D#24
B_H_D#25
B_H_D#26
B_H_D#27
B_H_D#28
B_H_D#29
B_H_D#30
B_H_D#31
B_H_D#32
B_H_D#33
B_H_D#34
B_H_D#35
B_H_D#36
B_H_D#37
B_H_D#38
B_H_D#39
B_H_D#40
B_H_D#41
B_H_D#42
B_H_D#43
B_H_D#44
B_H_D#45
B_H_D#46
B_H_D#47
B_H_D#48
B_H_D#49
B_H_D#50
B_H_D#51
B_H_D#52
B_H_D#53
B_H_D#54
B_H_D#55
B_H_D#56
B_H_D#57
B_H_D#58
B_H_D#59
B_H_D#60
B_H_D#61
B_H_D#62
B_H_D#63
H_XRCOMP
H_XSCOMP
H_XSWING
H_YRCOMP
H_YSCOMP
H_YSWING
W11
U11
T11
AB7
AA9
Y10
AB8
AA4
AA7
AA2
AA6
AA10
AA1
AB4
AC9
AB11
AC11
AB3
AC2
AD1
AD9
AC1
AD7
AC6
AB5
AD10
AD4
AC8
AG2
AG1
K11
T10
W9
W7
W6
W4
W3
W5
W2
W1
F1
J1
H1
J6
H3
K2
G1
G2
K9
K1
K7
J8
H4
J3
G4
T3
U7
U9
T1
T8
T4
U5
T9
T5
Y3
Y7
Y8
E1
E2
E4
Y1
U1
U39A
H_D#_0
H_D#_1
H_D#_2
H_D#_3
H_D#_4
H_D#_5
H_D#_6
H_D#_7
H_D#_8
H_D#_9
H_D#_10
H_D#_11
H_D#_12
H_D#_13
H_D#_14
H_D#_15
H_D#_16
H_D#_17
H_D#_18
H_D#_19
H_D#_20
H_D#_21
H_D#_22
H_D#_23
H_D#_24
H_D#_25
H_D#_26
H_D#_27
H_D#_28
H_D#_29
H_D#_30
H_D#_31
H_D#_32
H_D#_33
H_D#_34
H_D#_35
H_D#_36
H_D#_37
H_D#_38
H_D#_39
H_D#_40
H_D#_41
H_D#_42
H_D#_43
H_D#_44
H_D#_45
H_D#_46
H_D#_47
H_D#_48
H_D#_49
H_D#_50
H_D#_51
H_D#_52
H_D#_53
H_D#_54
H_D#_55
H_D#_56
H_D#_57
H_D#_58
H_D#_59
H_D#_60
H_D#_61
H_D#_62
H_D#_63
H_XRCOMP
H_XSCOMP
H_XSWING
H_YRCOMP
H_YSCOMP
H_YSWING
H_CLKIN
H_CLKIN#
CALISTOGA_1p0
H_ADSTB#_0
H_ADSTB#_1
HOST
H_DSTBN#_0
H_DSTBN#_1
H_DSTBN#_2
H_DSTBN#_3
H_DSTBP#_0
H_DSTBP#_1
H_DSTBP#_2
H_DSTBP#_3
H_A#_3
H_A#_4
H_A#_5
H_A#_6
H_A#_7
H_A#_8
H_A#_9
H_A#_10
H_A#_11
H_A#_12
H_A#_13
H_A#_14
H_A#_15
H_A#_16
H_A#_17
H_A#_18
H_A#_19
H_A#_20
H_A#_21
H_A#_22
H_A#_23
H_A#_24
H_A#_25
H_A#_26
H_A#_27
H_A#_28
H_A#_29
H_A#_30
H_A#_31
H_ADS#
H_VREF_0
H_BNR#
H_BPRI#
H_BREQ#0
H_CPURST#
H_DBSY#
H_DEFER#
H_DPWR#
H_DRDY#
H_VREF_1
H_DINV#_0
H_DINV#_1
H_DINV#_2
H_DINV#_3
H_HIT#
H_HITM#
H_LOCK#
H_REQ#_0
H_REQ#_1
H_REQ#_2
H_REQ#_3
H_REQ#_4
H_RS#_0
H_RS#_1
H_RS#_2
H_SLPCPU#
H_TRDY#
H9
C9
E11
G11
F11
G12
F9
H11
J12
G14
D9
J14
H13
J15
F14
D12
A11
C11
A12
A13
E13
G13
F12
B12
B14
C12
A14
C14
D14
E8
B9
C13
J13
C6
F6
C7
B7
A7
C3
J9
H8
K13
J7
W8
U3
AB10
K4
T7
Y5
AC4
K3
T6
AA5
AC5
D3
D4
B3
D8
G8
B8
F8
A8
B4
E6
D6
E3
E7
B_H_A#3
B_H_A#4
B_H_A#5
B_H_A#6
B_H_A#7
B_H_A#8
B_H_A#9
B_H_A#10
B_H_A#11
B_H_A#12
B_H_A#13
B_H_A#14
B_H_A#15
B_H_A#16
B_H_A#17
B_H_A#18
B_H_A#19
B_H_A#20
B_H_A#21
B_H_A#22
B_H_A#23
B_H_A#24
B_H_A#25
B_H_A#26
B_H_A#27
B_H_A#28
B_H_A#29
B_H_A#30
B_H_A#31
H_VREF
B_H_DINV#0
B_H_DINV#1
B_H_DINV#2
B_H_DINV#3
B_H_DSTBN#0
B_H_DSTBN#1
B_H_DSTBN#2
B_H_DSTBN#3
B_H_DSTBP#0
B_H_DSTBP#1
B_H_DSTBP#2
B_H_DSTBP#3
B_H_REQ#0
B_H_REQ#1
B_H_REQ#2
B_H_REQ#3
B_H_REQ#4
H_RS#0
H_RS#1
H_RS#2
B_H_ADS# 4
B_H_ADSTB#0 4
B_H_ADSTB#1 4
B_H_BNR# 4
H_BPRI# 4
B_H_BREQ#0 4
H_CPURST# 4
B_H_DBSY# 4
H_DEFER# 4
H_DPWR# 4
B_H_DRDY# 4
B_H_HIT# 4
B_H_HITM# 4
B_H_LOCK# 4
H_TRDY# 4
B_H_A#[31..3] 4
Place them near to the chip
C171
0.1uF
*
10V, X7R, +/-10%
C0402
B_H_DINV#0 4
B_H_DINV#1 4
B_H_DINV#2 4
B_H_DINV#3 4
B_H_DSTBN#0 4
B_H_DSTBN#1 4
B_H_DSTBN#2 4
B_H_DSTBN#3 4
B_H_DSTBP#0 4
B_H_DSTBP#1 4
B_H_DSTBP#2 4
B_H_DSTBP#3 4
B_H_REQ#[4..0] 4
H_RS#[2..0] 4
R159 0 R0402 +/-5%
R136
200
+/-1%
R0402
1D05V_S0
R131
100
+/-1%
R0603
H_CPUSLP# 4,18
Place them near to the chip
Title
Size Document Number Rev
<Doc>
A3
Date: Sheet of
Calistoga (1 of 6)
W06N
64 4 Monday, February 21, 2005
SA
FOXCONN ND2
Page 7
TP43
1
TP35
1
TP37
1
TP44
1
TP46
1
TP18
1
TP22
1
TP45
1
TP42
1
TP40
1
TP41
1
TP52
1
TP106
1
TP107
1
TP47
1
TP49
1
PM_BMBUSY# 19
PM_THRMTRIP-A# 4
FOR DVI
SDVOB_CTRLCLK 16
SDVOB_CTRLDATA 16
Alviso will provide SDVO_CTRLCLK
and CTRLDATA pulldowns on-die
3D3V_S0
R0402 +/-5%
R160 10K
R0402 +/-5%
R144 10K
1D8V_S3
R89
80.6
+/-1%
R0402
DUMMY
R92
80.6
+/-1%
R0402
DUMMY
PWROK 19,22
PLT_RST1# 14,19,21,23,33,35,36
MCH_SYNC# 19
PM_EXTTS#0
PM_EXTTS#1
M_RCOMPN
M_RCOMPP
CFG[2:0] Freq.(MHz)
011 667
001 533
PM_EXTTS#0
PM_EXTTS#1
SDVOB_CTRLCLK
SDVOB_CTRLDATA
R108
CFG0
CFG1
CFG2
CFG3
CFG4
CFG5
CFG6
CFG7
CFG8
CFG9
CFG10
CFG11
CFG12
CFG13
CFG14
CFG15
CFG16
CFG17
CFG18
CFG19
CFG20
R126
1K
+/-5%
R0402
R125
+/-5%
4.7K
R0402
DUMMY
LCTLA_CLK
LCTLB_DATA
LDDC_NB_CLK
B_LDDC_NB_DATA
LIBG
4.99K
R0402
+/-1%
CRTIREF
R554
0 R0402 +/-5%
HSYNC
VSYNC
SDVOB_CLKN_1
SDVOB_RP_1
SDVOB_GP_1
SDVOB_BP_1 CFG3
SDVOB_CLKP_1
When SDVO no use
SDVOCTRL_DATA PL
U39C
D32
J30
H30
H29
G26
G25
B38
L_LVBG
C35
F32
L_VREFH
C33
L_VREFL
C32
A33
A32
E27
E26
C37
B35
A37
B37
B34
A36
G30
D30
F29
F30
D29
F28
A16
C18
A19
J20
B16
B18
B19
E23
D23
C22
B22
A21
B21
C26
C25
G23
J22
H23
CALISTOGA_1p0
SDVOB_RN_1
C216 0.1uF C0402
SDVOB_GN_1
C196 0.1uF C0402
SDVOB_BN_1
C214 0.1uF C0402
C207 0.1uF C0402
C215 0.1uF C0402
C195 0.1uF C0402
C211 0.1uF C0402
C206 0.1uF C0402
PEG_RXN1
C210 0.1uF C0402
PEG_RXN2
C212 0.1uF C0402
PEG_RXP1
C209 0.1uF C0402
PEG_RXP2
C213 0.1uF C0402
L_BKLTCTL
L_BKLTEN
L_CLKCTLA
L_CLKCTLB
L_DDC_CLK
L_DDC_DATA
L_IBG
L_VBG
L_VDDEN
L_VREFH
L_VREFL
LA_CLK#
LA_CLK
LB_CLK#
LB_CLK
LA_DATA#_0
LA_DATA#_1
LA_DATA#_2
LA_DATA_0
LA_DATA_1
LA_DATA_2
LB_DATA#_0
LB_DATA#_1
LB_DATA#_2
LB_DATA_0
LB_DATA_1
LB_DATA_2
TV_DACA_OUT
TV_DACB_OUT
TV_DACC_OUT
TV_IREF
TV_IRTNA
TV_IRTNB
TV_IRTNC
CRT_BLUE
CRT_BLUE#
CRT_GREEN
CRT_GREEN#
CRT_RED
CRT_RED#
CRT_DDC_CLK
CRT_DDC_DATA
CRT_HSYNC
CRT_IREF
CRT_VSYNC
*
*
*
*
for GM DVI function
*
*
*
*
*
*
*
*
LVDS
TV
VGA
EXP_A_COMPI
EXP_A_COMPO
EXP_A_RXN_0
EXP_A_RXN_1
EXP_A_RXN_2
EXP_A_RXN_3
EXP_A_RXN_4
EXP_A_RXN_5
EXP_A_RXN_6
EXP_A_RXN_7
EXP_A_RXN_8
EXP_A_RXN_9
EXP_A_RXN_10
EXP_A_RXN_11
EXP_A_RXN_12
EXP_A_RXN_13
EXP_A_RXN_14
EXP_A_RXN_15
EXP_A_RXP_0
EXP_A_RXP_1
EXP_A_RXP_2
EXP_A_RXP_3
EXP_A_RXP_4
EXP_A_RXP_5
EXP_A_RXP_6
EXP_A_RXP_7
EXP_A_RXP_8
EXP_A_RXP_9
EXP_A_RXP_10
EXP_A_RXP_11
EXP_A_RXP_12
EXP_A_RXP_13
EXP_A_RXP_14
EXP_A_RXP_15
EXP_A_TXN_0
EXP_A_TXN_1
EXP_A_TXN_2
EXP_A_TXN_3
EXP_A_TXN_4
EXP_A_TXN_5
EXP_A_TXN_6
EXP_A_TXN_7
EXP_A_TXN_8
EXP_A_TXN_9
EXP_A_TXN_10
EXP_A_TXN_11
EXP_A_TXN_12
PCI-EXPRESS GRAPHICS
EXP_A_TXN_13
EXP_A_TXN_14
EXP_A_TXN_15
EXP_A_TXP_0
EXP_A_TXP_1
EXP_A_TXP_2
EXP_A_TXP_3
EXP_A_TXP_4
EXP_A_TXP_5
EXP_A_TXP_6
EXP_A_TXP_7
EXP_A_TXP_8
EXP_A_TXP_9
EXP_A_TXP_10
EXP_A_TXP_11
EXP_A_TXP_12
EXP_A_TXP_13
EXP_A_TXP_14
EXP_A_TXP_15
SDVOB_RN 16
SDVOB_GN 16
SDVOB_BN 16
SDVOB_CLKN 16
SDVOB_RP 16
SDVOB_GP 16
SDVOB_BP 16
SDVOB_CLKP 16
SDVOB_INTN 16
SDVOB_STALLN 16
SDVOB_INTP 16
SDVOB_STALLP 16
1D5V_PCIE_S0
24.9
PEG_COMP
D40
PEG_COMP
D38
PEG_RXN0
F34
PEG_RXN1
G38
PEG_RXN2
H34
PEG_RXN3
J38
PEG_RXN4
L34
PEG_RXN5
M38
PEG_RXN6
N34
PEG_RXN7
P38
PEG_RXN8
R34
PEG_RXN9
T38
PEG_RXN10
V34
PEG_RXN11
W38
PEG_RXN12
Y34
PEG_RXN13
AA38
PEG_RXN14
AB34
PEG_RXN15
AC38
PEG_RXP0
D34
PEG_RXP1
F38
PEG_RXP2
G34
PEG_RXP3
H38
PEG_RXP4
J34
PEG_RXP5
L38
PEG_RXP6
M34
PEG_RXP7
N38
PEG_RXP8
P34
PEG_RXP9
R38
PEG_RXP10
T34
PEG_RXP11
V38
PEG_RXP12
W34
PEG_RXP13
Y38
PEG_RXP14
AA34
PEG_RXP15
AB38
SDVOB_RN_1
F36
G40
H36
J40
L36
M40
N36
P40
R36
T40
V36
W40
Y36
AA40
AB36
AC40
D36
F40
G36
H40
J36
L40
M36
N40
P36
R40
T36
V40
W36
Y40
AA36
AB40
LCTLA_CLK
LCTLB_DATA
GMCH_BL_ON
LBKLT_CRTL
LIBG
C179 0.1uF C0402
SDVOB_GN_1
C448 0.1uF C0402
SDVOB_BN_1
C172 0.1uF C0402
SDVOB_CLKN_1
C446 0.1uF C0402
C167 0.1uF C0402
C444 0.1uF C0402
C159 0.1uF C0402
C442 0.1uF C0402
C151 0.1uF C0402
C440 0.1uF C0402
C144 0.1uF C0402R137
C437 0.1uF C0402
C137 0.1uF C0402
C434 0.1uF C0402
C123 0.1uF C0402
C431 0.1uF C0402
SDVOB_RP_1
C183 0.1uF
SDVOB_GP_1
C450 0.1uF
SDVOB_BP_1
C174 0.1uF C0402
SDVOB_CLKP_1
C447 0.1uF C0402
C168 0.1uF C0402
C445 0.1uF C0402
C166 0.1uF C0402
C443 0.1uF C0402
C157 0.1uF C0402
C441 0.1uF C0402
C147 0.1uF C0402
C439 0.1uF C0402
C141 0.1uF C0402
C436 0.1uF C0402
C132 0.1uF C0402
C433 0.1uF C0402
R143
DUMMY
R142
DUMMY
R146 100KR0402 +/-5%
R156 100KR0402 +/-5%
R175 1.5KR0603 +/-1%
Title
Size Document Number Rev
<Doc>
Custom
Date: Sheet
+/-1%
R161
R0402
PEG_RXN[15..0] 14
PEG_RXP[15..0] 14
16V, Y5V, +80%/-20%
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
C0402
C0402
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
3D3V_S0
2.2KR0402 +/-5%
2.2KR0402 +/-5%
FOXCONN ND2
Calistoga (2 of 6)
W06N
PEG_TXN0
PEG_TXN1
PEG_TXN2
PEG_TXN3
PEG_TXN4
PEG_TXN5
PEG_TXN6
PEG_TXN7
PEG_TXN8
PEG_TXN9
PEG_TXN10
PEG_TXN11
PEG_TXN12
PEG_TXN13
PEG_TXN14
PEG_TXN15
PEG_TXP0
PEG_TXP1
PEG_TXP2
PEG_TXP3
PEG_TXP4
PEG_TXP5
PEG_TXP6
PEG_TXP7
PEG_TXP8
PEG_TXP9
PEG_TXP10
PEG_TXP11
PEG_TXP12
PEG_TXP13
PEG_TXP14
PEG_TXP15
PEG_TXN[15..0] 14
PEG_TXP[15..0] 14
of
74 4 Monday, February 21, 2005
SA
U39B
H32
CLK_REQ#
T32
RSVD_1
R32
RSVD_2
F3
RSVD_3
F7
RSVD_4
AG11
RSVD_5
AF11
RSVD_6
H7
RSVD_7
J19
RSVD_8
K30
TV_DCONSEL0
J29
TV_DCONSEL1
A41
RSVD_11
A35
RSVD_12
A34
RSVD_13
D28
RSVD_14
D27
RSVD_15
K16
CFG_0
K18
CFG_1
J18
CFG_2
F18
CFG_3
E15
CFG_4
F15
CFG_5
E18
CFG_6
D19
CFG_7
D16
CFG_8
G16
CFG_9
E16
CFG_10
D15
CFG_11
G15
CFG_12
K15
CFG_13
C15
CFG_14
H16
CFG_15
G18
CFG_16
H15
CFG_17
J25
CFG_18
K27
CFG_19
J26
CFG_20
G28
PM_BMBUSY#
F25
PM_EXTTS#_0
H26
PM_EXTTS#_1
G6
PM_THRMTRIP#
AH33
PWROK
AH34
RSTIN#
100R0402+/-5%
H28
SDVO_CTRLCLK
H27
SDVO_CTRLDATA
K28
LT_RESET#
D1
NC0
C41
NC1
C1
NC2
BA41
NC3
BA40
NC4
BA39
NC5
BA3
NC6
BA2
NC7
BA1
NC8
B41
NC9
B2
NC10
AY41
NC11
AY1
NC12
AW41
NC13
AW1
NC14
A40
NC15
A4
NC16
A39
NC17
A3
3D3V_S0
NC18
R127
1K
+/-5%
R0402
DUMMY
R128
4.7K
+/-5%
R0402
LDDC_NB_CLK
CALISTOGA_1p0
CFG2
CFG0
SM_OCDCOMP_0
SM_OCDCOMP_1
CFG RSVD
DDR MUXING CLK DMI
D_REFCLKIN#
D_REFSSCLKIN#
PM
D_REFSSCLKIN
MISC
NC
CFG1 3
3D3V_S0 3D3V_S0
R148
R153
2.2K
2.2K
+/-5%
+/-5%
R0402
R0402
AY35
SM_CK_0
AR1
SM_CK_1
AW7
SM_CK_2
AW40
SM_CK_3
AW35
SM_CK#_0
AT1
SM_CK#_1
AY7
SM_CK#_2
AY40
SM_CK#_3
AU20
SM_CKE_0
AT20
SM_CKE_1
BA29
SM_CKE_2
AY29
SM_CKE_3
AW13
SM_CS#_0
AW12
SM_CS#_1
AY21
SM_CS#_2
AW21
SM_CS#_3
AL20
AF10
M_ODT0
BA13
SM_ODT_0
SM_ODT_1
SM_ODT_2
SM_ODT_3
SM_RCOMP#
SM_RCOMP
SM_VREF_0
SM_VREF_1
G_CLKIN#
G_CLKIN
D_REFCLKIN
DMI_RXN_0
DMI_RXN_1
DMI_RXN_2
DMI_RXN_3
DMI_RXP_0
DMI_RXP_1
DMI_RXP_2
DMI_RXP_3
DMI_TXN_0
DMI_TXN_1
DMI_TXN_2
DMI_TXN_3
DMI_TXP_0
DMI_TXP_1
DMI_TXP_2
DMI_TXP_3
FOR CFG2 abnormal output 14.318Mhz
BA12
AY20
AU21
AV9
AT9
AK1
AK41
AF33
AG33
A27
A26
C40
D41
AE35
AF39
AG35
AH39
AC35
AE39
AF35
AG39
AE37
AF41
AG37
AH41
AC37
AE41
AF37
AG41
R548
1K
+/-5%
R0402
CFG1
DUMMY
R181 0 R0402 +/-5%
R166
0
R0402
+/-5%
R165
0
R0402
+/-5%
M_ODT1
M_ODT2
M_ODT3
M_RCOMPN
M_RCOMPP
DMI_TXN0
DMI_TXN1
DMI_TXN2
DMI_TXN3
DMI_TXP0
DMI_TXP1
DMI_TXP2
DMI_TXP3
DMI_RXN0
DMI_RXN1
DMI_RXN2
DMI_RXN3
DMI_RXP0
DMI_RXP1
DMI_RXP2
DMI_RXP3
E C
R488
2.2K
+/-5%
LDDC_CLK
CLK_DDR0 12
CLK_DDR1 12
CLK_DDR2 12
CLK_DDR3 12
CLK_DDR0# 12
CLK_DDR1# 12
CLK_DDR2# 12
CLK_DDR3# 12
M_CKE0_R# 12,13
M_CKE1_R# 12,13
M_CKE2_R# 12,13
M_CKE3_R# 12,13
M_CS0_R# 12,13
M_CS1_R# 12,13
M_CS2_R# 12,13
M_CS3_R# 12,13
M_ODT0 12,13
M_ODT1 12,13
M_ODT2 12,13
M_ODT3 12,13
CLK_MCH_3GPLL# 3
CLK_MCH_3GPLL 3
DREFCLK# 3
DREFCLK 3
DREFSSCLK# 3
DREFSSCLK 3
DMI_TXN0 19
DMI_TXN1 19
DMI_TXN2 19
DMI_TXN3 19
DMI_TXP0 19
DMI_TXP1 19
DMI_TXP2 19
DMI_TXP3 19
DMI_RXN0 19
DMI_RXN1 19
DMI_RXN2 19
DMI_RXN3 19
DMI_RXP0 19
DMI_RXP1 19
DMI_RXP2 19
DMI_RXP3 19
1D05V_S0 2D5V_S0
R204
330
+/-5%
R0402
FWH_INIT_Q
DUMMY
DUMMY
R205 0 R0402 +/-5%
Q14
MMBT3904
DUMMY
B
For pull high 1.05V 11/08
R487
2.2K
+/-5%
R0402
R0402
DUMMY
DUMMY
LDDC_CLK 14,17
LDDC_DATA B_LDDC_NB_DATA
LDDC_DATA 14,17
BC110
*
0.1uF C0402
C426
2.2uFC0805
*
*
0.1uF C0402
BC109
R141
0 R0402 +/-5%
R149
0 R0402 +/-5%
CPU_SEL1 4
DDR_VREF_S3
2.2uFC0805
*
6.3V, X5R, +/-10%
C425
NB_CORE_S0
DUMMY
DUMMY
LBKLT_CRTL 17
GMCH_BL_ON 33
TP50
GMCH_LCDVDD_ON 17
DUMMY
R183
0
R189
R0402
0
R0402
+/-5%
VSYNC
NB_CORE_S0
HSYNC
CFG[19:18] have internal pull-down
CFG[17:3] have internal up
CFG[2:0] have no internal pull-up or pull-down
R151
100K
+/-5%
R0402
GMCH_TV_COM 15
GMCH_TV_LUMA 15
GMCH_TV_CRMA 15
R168 150 R0603 +/-1%
R547 150 R0603 +/-1%
R556 150 R0603 +/-1%
+/-5%
R139 255 R0402 +/-1%
GMCH_DDCCLK 15
B_GMCH_DDCDATA 15
GMCH_HSYNC 15
GMCH_VSYNC 15
When High 1K Ohm
3D3V_S0
R129 2.2K
R135 2.2K
R134 2.2K
R155 2.2K
R549 2.2K
R182 2.2K
R163 2.2K
R169 2.2K
R162 2.2K
R557 2.2K
R202 2.2K
R550 2.2K
R203 2.2K
R132 2.2K
R172 2.2K
R138 2.2K
R213 2.2K
R145 2.2K
DUMMY
R140 0 R0402 +/-5%
R5550R0402 +/-5%
DUMMY
R0402 +/-5%
DUMMY
R0402 +/-5%
DUMMY
R0402 +/-5%
DUMMY
R0402 +/-5%
DUMMY
R0402 +/-5%
DUMMY
R0402 +/-5%
DUMMY
R0402 +/-5%
DUMMY
R0402 +/-5%
DUMMY
R0402 +/-5%
DUMMY
R0402 +/-5%
DUMMY
R0402 +/-5%
DUMMY
R0402 +/-5%
R0402 +/-5%
DUMMY
R0402 +/-5%
DUMMY
R0402 +/-5%
DUMMY
R0402 +/-5%
DUMMY
R0402 +/-5%
DUMMY
R0402 +/-5%
DUMMY
When Low choice
lower than 3.5K
Ohm
1
150
150
+/-1%
+/-1%
R0603
R0603
R561
R553
GMCH_BLUE 15
GMCH_GREEN 15
GMCH_RED 15
R222 39R0402 +/-5%
R224 39R0402 +/-5%
CFG18
CFG19
CFG20
CFG4
CFG5
CFG6
CFG7
CFG8
CFG9
CFG10
CFG11
CFG12
CFG13
CFG14
CFG15
CFG16
CFG17
GMCH_TXAOUT0- 14
GMCH_TXAOUT1- 14
GMCH_TXAOUT2- 14
GMCH_TXAOUT0+ 14
GMCH_TXAOUT1+ 14
GMCH_TXAOUT2+ 14
GMCH_TXBOUT0- 14
GMCH_TXBOUT1- 14
GMCH_TXBOUT2- 14
GMCH_TXBOUT0+ 14
GMCH_TXBOUT1+ 14
GMCH_TXBOUT2+ 14
GMCH_TXACLK- 14
GMCH_TXACLK+ 14
GMCH_TXBCLK- 14
GMCH_TXBCLK+ 14
150
+/-1%
R0603
R552
Page 8
M_A_DQ[63..0] 12
M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ4
M_A_DQ5
M_A_DQ6
M_A_DQ7
M_A_DQ8
M_A_DQ9
M_A_DQ10
M_A_DQ11
M_A_DQ12
M_A_DQ13
M_A_DQ14
M_A_DQ15
M_A_DQ16
M_A_DQ17
M_A_DQ18
M_A_DQ19
M_A_DQ20
M_A_DQ21
M_A_DQ22
M_A_DQ23
M_A_DQ24
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQ28
M_A_DQ29
M_A_DQ30
M_A_DQ31
M_A_DQ32
M_A_DQ33
M_A_DQ34
M_A_DQ35
M_A_DQ36
M_A_DQ37
M_A_DQ38
M_A_DQ39
M_A_DQ40
M_A_DQ41
M_A_DQ42
M_A_DQ43
M_A_DQ44
M_A_DQ45
M_A_DQ46
M_A_DQ47
M_A_DQ48
M_A_DQ49
M_A_DQ50
M_A_DQ51
M_A_DQ52
M_A_DQ53
M_A_DQ54
M_A_DQ55
M_A_DQ56
M_A_DQ57
M_A_DQ58
M_A_DQ59
M_A_DQ60
M_A_DQ61
M_A_DQ62
M_A_DQ63
AJ35
AJ34
AM31
AM33
AJ36
AK35
AJ32
AH31
AN35
AP33
AR31
AP31
AN38
AM36
AM34
AN33
AK26
AL27
AM26
AN24
AK28
AL28
AM24
AP26
AP23
AL22
AP21
AN20
AL23
AP24
AP20
AT21
AR12
AR14
AP13
AP12
AT13
AT12
AL14
AL12
AK9
AN7
AK8
AK7
AP9
AN9
AY2
AW2
AP1
AN2
AV2
AN1
AG7
AG4
AG9
AH6
AT5
AL5
AT3
AL2
AF9
AF6
AF4
AF8
U39D
SA_DQ0
SA_DQ1
SA_DQ2
SA_DQ3
SA_DQ4
SA_DQ5
SA_DQ6
SA_DQ7
SA_DQ8
SA_DQ9
SA_DQ10
SA_DQ11
SA_DQ12
SA_DQ13
SA_DQ14
SA_DQ15
SA_DQ16
SA_DQ17
SA_DQ18
SA_DQ19
SA_DQ20
SA_DQ21
SA_DQ22
SA_DQ23
SA_DQ24
SA_DQ25
SA_DQ26
SA_DQ27
SA_DQ28
SA_DQ29
SA_DQ30
SA_DQ31
SA_DQ32
SA_DQ33
SA_DQ34
SA_DQ35
SA_DQ36
SA_DQ37
SA_DQ38
SA_DQ39
SA_DQ40
SA_DQ41
SA_DQ42
SA_DQ43
SA_DQ44
SA_DQ45
SA_DQ46
SA_DQ47
SA_DQ48
SA_DQ49
SA_DQ50
SA_DQ51
SA_DQ52
SA_DQ53
SA_DQ54
SA_DQ55
SA_DQ56
SA_DQ57
SA_DQ58
SA_DQ59
SA_DQ60
SA_DQ61
SA_DQ62
SA_DQ63
CALISTOGA_1p0
AU12
SA_BS_0
AV14
SA_BS_1
BA20
SA_BS_2
AY13
SA_CAS#
SA_DM_0
SA_DM_1
SA_DM_2
SA_DM_3
SA_DM_4
SA_DM_5
SA_DM_6
SA_DM_7
SA_DQS_0
SA_DQS_1
SA_DQS_2
SA_DQS_3
SA_DQS_4
SA_DQS_5
SA_DQS_6
SA_DQS_7
SA_DQS#_0
SA_DQS#_1
SA_DQS#_2
SA_DQS#_3
SA_DQS#_4
SA_DQS#_5
SA_DQS#_6
SA_DQS#_7
SA_MA_0
SA_MA_1
SA_MA_2
SA_MA_3
SA_MA_4
SA_MA_5
SA_MA_6
SA_MA_7
SA_MA_8
SA_MA_9
SA_MA_10
SA_MA_11
SA_MA_12
SA_MA_13
SA_RAS#
SA_RCVENIN#
SA_RCVENOUT#
DDR SYSTEM MEMORY A
SA_WE#
AJ33
AM35
AL26
AN22
AM14
AL9
AR3
AH4
AK33
AT33
AN28
AM22
AN12
AN8
AP3
AG5
AK32
AU33
AN27
AM21
AM12
AL8
AN3
AH5
AY16
AU14
AW16
BA16
BA17
AU16
AV17
AU17
AW17
AT16
AU13
AT17
AV20
AV12
AW14
AK23
AK24
AY14
M_A_DM0
M_A_DM1
M_A_DM2
M_A_DM3
M_A_DM4
M_A_DM5
M_A_DM6
M_A_DM7
M_A_DQS0
M_A_DQS1
M_A_DQS2
M_A_DQS3
M_A_DQS4
M_A_DQS5
M_A_DQS6
M_A_DQS7
M_A_DQS#0
M_A_DQS#1
M_A_DQS#2
M_A_DQS#3
M_A_DQS#4
M_A_DQS#5
M_A_DQS#6
M_A_DQS#7
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
GMCH_TP48
GMCH_TP49
M_A_BS0# 12,13
M_A_BS1# 12,13
M_A_BS2# 12,13
M_A_CAS# 12,13
M_A_DM[7..0] 12
M_A_DQS[7..0] 12
M_A_DQS#[7..0] 12
M_A_A[13..0] 12,13
M_A_RAS# 12,13
TP14
1
TP13
1
M_A_WE# 12,13
M_B_DQ[63..0] 12
M_B_DQ0
M_B_DQ1
M_B_DQ2
M_B_DQ3
M_B_DQ4
M_B_DQ5
M_B_DQ6
M_B_DQ7
M_B_DQ8
M_B_DQ9
M_B_DQ10
M_B_DQ11
M_B_DQ12
M_B_DQ13
M_B_DQ14
M_B_DQ15
M_B_DQ16
M_B_DQ17
M_B_DQ18
M_B_DQ19
M_B_DQ20
M_B_DQ21
M_B_DQ22
M_B_DQ23
M_B_DQ24
M_B_DQ25
M_B_DQ26
M_B_DQ27
M_B_DQ28
M_B_DQ29
M_B_DQ30
M_B_DQ31
M_B_DQ32
M_B_DQ33
M_B_DQ34
M_B_DQ35
M_B_DQ36
M_B_DQ37
M_B_DQ38
M_B_DQ39
M_B_DQ40
M_B_DQ41
M_B_DQ42
M_B_DQ43
M_B_DQ44
M_B_DQ45
M_B_DQ46
M_B_DQ47
M_B_DQ48
M_B_DQ49
M_B_DQ50
M_B_DQ51
M_B_DQ52
M_B_DQ53
M_B_DQ54
M_B_DQ55
M_B_DQ56
M_B_DQ57
M_B_DQ58
M_B_DQ59
M_B_DQ60
M_B_DQ61
M_B_DQ62
M_B_DQ63
AK39
AJ37
AP39
AR41
AJ38
AK38
AN41
AP41
AT40
AV41
AU38
AV38
AP38
AR40
AW38
AY38
BA38
AV36
AR36
AP36
BA36
AU36
AP35
AP34
AY33
BA33
AT31
AU29
AU31
AW31
AV29
AW29
AM19
AL19
AP14
AN14
AN17
AM16
AP15
AL15
AJ11
AH10
AN10
AK13
AH11
AK10
BA10
AW10
AW4
AY10
AW5
AR5
AK4
AK3
AT4
AK5
AJ9
AJ8
BA4
AY9
AY5
AV4
AJ5
AJ3
U39E
SB_DQ0
SB_DQ1
SB_DQ2
SB_DQ3
SB_DQ4
SB_DQ5
SB_DQ6
SB_DQ7
SB_DQ8
SB_DQ9
SB_DQ10
SB_DQ11
SB_DQ12
SB_DQ13
SB_DQ14
SB_DQ15
SB_DQ16
SB_DQ17
SB_DQ18
SB_DQ19
SB_DQ20
SB_DQ21
SB_DQ22
SB_DQ23
SB_DQ24
SB_DQ25
SB_DQ26
SB_DQ27
SB_DQ28
SB_DQ29
SB_DQ30
SB_DQ31
SB_DQ32
SB_DQ33
SB_DQ34
SB_DQ35
SB_DQ36
SB_DQ37
SB_DQ38
SB_DQ39
SB_DQ40
SB_DQ41
SB_DQ42
SB_DQ43
SB_DQ44
SB_DQ45
SB_DQ46
SB_DQ47
SB_DQ48
SB_DQ49
SB_DQ50
SB_DQ51
SB_DQ52
SB_DQ53
SB_DQ54
SB_DQ55
SB_DQ56
SB_DQ57
SB_DQ58
SB_DQ59
SB_DQ60
SB_DQ61
SB_DQ62
SB_DQ63
CALISTOGA_1p0
AT24
SB_BS_0
AV23
SB_BS_1
AY28
SB_BS_2
AR24
SB_CAS#
SB_DM_0
SB_DM_1
SB_DM_2
SB_DM_3
SB_DM_4
SB_DM_5
SB_DM_6
SB_DM_7
SB_DQS_0
SB_DQS_1
SB_DQS_2
SB_DQS_3
SB_DQS_4
SB_DQS_5
SB_DQS_6
SB_DQS_7
SB_DQS#_0
SB_DQS#_1
SB_DQS#_2
SB_DQS#_3
SB_DQS#_4
SB_DQS#_5
SB_DQS#_6
SB_DQS#_7
SB_MA_0
SB_MA_1
SB_MA_2
SB_MA_3
SB_MA_4
SB_MA_5
SB_MA_6
SB_MA_7
SB_MA_8
SB_MA_9
SB_MA_10
SB_MA_11
SB_MA_12
SB_MA_13
SB_RAS#
SB_RCVENIN#
SB_RCVENOUT#
DDR SYSTEM MEMORY B
SB_WE#
M_B_DM0
AK36
M_B_DM1
AR38
M_B_DM2
AT36
M_B_DM3
BA31
M_B_DM4
AL17
M_B_DM5
AH8
M_B_DM6
BA5
M_B_DM7
AN4
M_B_DQS0
AM39
M_B_DQS1
AT39
M_B_DQS2
AU35
M_B_DQS3
AR29
M_B_DQS4
AR16
M_B_DQS5
AR10
M_B_DQS6
AR7
M_B_DQS7
AN5
M_B_DQS#0
AM40
M_B_DQS#1
AU39
M_B_DQS#2
AT35
M_B_DQS#3
AP29
M_B_DQS#4
AP16
M_B_DQS#5
AT10
M_B_DQS#6
AT7
M_B_DQS#7
AP5
M_B_A0
AY23
M_B_A1
AW24
M_B_A2
AY24
M_B_A3
AR28
M_B_A4
AT27
M_B_A5
AT28
M_B_A6
AU27
M_B_A7
AV28
M_B_A8
AV27
M_B_A9
AW27
M_B_A10
AV24
M_B_A11
BA27
M_B_A12
AY27
M_B_A13
AR23
AU23
AK16
AK18
AR27
Place Test PAD Near to Chip
ascould as possible
M_B_BS0# 12,13
M_B_BS1# 12,13
M_B_BS2# 12,13
M_B_CAS# 12,13
M_B_DM[7..0] 12
M_B_DQS[7..0] 12
M_B_DQS#[7..0] 12
M_B_A[13..0] 12,13
M_B_RAS# 12,13
TP11
1
TP10
1
M_B_WE# 12,13
Title
Size Document Number R ev
<Doc>
Custom
Date: Sheet
Calistoga (3 of 6)
W06N
84 4 Saturday, Febr uary 19, 2005
SA
of
FOXCONN ND2
Page 9
1D5V_S0
1D5V_TVDAC_S0
1D5V_QTVDAC_S0
1D5V_S0
R179
0
R0805
+/-5%
0
C116
*
0.1uF
C0402
10V, X5R, +/-10%
D11
SSM5818
C180
0.1uF
*
10V, X5R, +/-10%
C0402
C173
0.1uF
*
10V, X5R, +/-10%
C0402
R107
2 1
R0402
+/-5%
L5
*
L0805 1uH
L4
*
L0805 1uH
L3
*
L0805 1uH
L2
*
L0805 1uH
+/-5%
R0805
R215
1K
*
*
*
*
0 R0603 +/-5%R154
1D5V_S0 1D5V_NB_S0
3D3V_S0
C208
10uF
10V, Y5V, +80%/-20%
C0805
C197
10uF
10V, Y5V, +80%/-20%
C0805
C120
10uF
10V, Y5V, +80%/-20%
C0805
C432
10uF
10V, Y5V, +80%/-20%
C0805
R191 0 R0603 +/-5%
R192 0 R0603 +/-5%
0 R0603 +/-5%R164
0 R0603 +/-5%R193
0 R0603 +/-5%R194
*
C205
*
C185
*
C119
*
C430
1D5V_S0
C201
0.1uF
*
10V, X5R, +/-10%
C0402
C202
0.1uF
*
10V, X5R, +/-10%
C0402
C203
0.1uF
*
10V, X5R, +/-10%
C0402
C204
0.1uF
*
10V, X5R, +/-10%
C0402
1D5V_HMPLL_S0
1D5V_DPLLA_S0
0.1uFC0402
10V, X5R, +/-10%
1D5V_DPLLB_S0
0.1uFC0402
10V, X5R, +/-10%
1D5V_HPLL_S0
0.1uFC0402
10V, X5R, +/-10%
1D5V_MPLL_S0
0.1uFC0402
10V, X5R, +/-10%
1D5V_S0 1D5V_PCIE_S0
3D3V_TVDACA_S0 VCCA_3GPLL_S0
3D3V_TVDACB_S0
3D3V_TVDACC_S0
3D3V_ATVBG_S0
G6
1 2
Close-Power-Gap-3050
R0805
+/-5%
VSSA_TVBG
R158
0
10uFC0805
10V, Y5V, +80%/-20%
1D5V_S0
*
C122
10V, Y5V, +80%/-20%
0R0603+/-5% R110
2D5V_CRTDAC_S0
*
10uFC0805
*
10uFC0805
C162
C143
10V, Y5V, +80%/-20%
1D5V_3GPLL_S0
*
10uFC0805
C135
10V, Y5V, +80%/-20%
*
C181
Layout Notes: VSSA_CRTDAC
Route caps within 250mil
of Alviso. Route FB
within 3" of Alviso.
0.1uFC0402
10V, X5R, +/-10%
0R0603+/-5% R152
10V, X5R, +/-10%
C199
0.1uF
*
C0402
10V, X5R, +/-10%
1D5V_HMPLL_S0 3D3V_TVDACA_S0
1D5V_S0
*
10uFC0805
10V, Y5V, +80%/-20%
3D3V_S0
*
10uFC0805
10V, Y5V, +80%/-20%
C133
*
0.1uF
C0402
10V, X5R, +/-10%
2D5V_S0
R167 0
R0603+/-5%
Route VSSA_CRTDAC gnd from GMCH to
decoupling cap ground lead and then
connect to the gnd plane.
C186
0.1uF
C0402
10V, X5R, +/-10%
2D5V_3GBG_S0 2D5V_S0
C177
*
0.1uF
C0402
C178
10nF
*
C0402
1 2
Close-Power-Gap-3050
25V, X7R, +/-10%
*
10V, X5R, +/-10%
C233
*
0.1uF
C0402
C234
10V, X5R, +/-10%
C200
*
0.1uF
C0402
C231
10V, X5R, +/-10%
R184
2 1
1K
SSM5818
R0402
+/-5%
2D5V_S0
*
1D5V_PCIE_S0
G7
1 2
Close-Power-Gap-3050
Close-Power-Gap-3050
2D5V_S0
G8
C429
0.1uF
C0402
3D3V_S0
NB_CORE_S0
D12
2D5V_S0
G5
1 2
C428
*
0.1uF
C0402
10V, X5R, +/-10%
1D5V_NB_S0
VCCA_3GPLL_S0
2D5V_CRTDAC_S0
VSSA_CRTDAC
1D5V_DPLLA_S0
1D5V_DPLLB_S0
1D5V_HPLL_S0
1D5V_MPLL_S0
3D3V_ATVBG_S0
VSSA_TVBG
3D3V_TVDACB_S0
3D3V_TVDACC_S0
1D5V_TVDAC_S0
1D5V_QTVDAC_S0
H22
VCCSYNC
C30
VCC_TXLVDS0
B30
VCC_TXLVDS1
A30
VCC_TXLVDS2
AJ41
VCC3G0
AB41
VCC3G1
Y41
VCC3G2
V41
VCC3G3
R41
VCC3G4
N41
VCC3G5
L41
VCC3G6
AC33
VCCA_3GPLL
G41
VCCA_3GBG
H41
VSSA_3GBG
F21
VCCA_CRTDAC0
E21
VCCA_CRTDAC1
G21
VSSA_CRTDAC
B26
VCCA_DPLLA
C39
VCCA_DPLLB
AF1
VCCA_HPLL
A38
VCCA_LVDS
B39
VSSA_LVDS
AF2
VCCA_MPLL
H20
VCCA_TVBG
G20
VSSA_TVBG
E19
VCCA_TVDACA0
F19
VCCA_TVDACA1
C20
VCCA_TVDACB0
D20
VCCA_TVDACB1
E20
VCCA_TVDACC0
F20
VCCA_TVDACC1
AH1
VCCD_HMPLL0
AH2
VCCD_HMPLL1
A28
VCCD_LVDS0
B28
VCCD_LVDS1
C28
VCCD_LVDS2
D21
VCCD_TVDAC
A23
VCC_HV0
B23
VCC_HV1
B25
VCC_HV2
H19
VCCD_QTVDAC
AK31
VCCAUX0
AF31
VCCAUX1
AE31
VCCAUX2
AC31
VCCAUX3
AL30
VCCAUX4
AK30
VCCAUX5
AJ30
VCCAUX6
AH30
VCCAUX7
AG30
VCCAUX8
AF30
VCCAUX9
AE30
VCCAUX10
AD30
VCCAUX11
AC30
VCCAUX12
AG29
VCCAUX13
AF29
VCCAUX14
AE29
VCCAUX15
AD29
VCCAUX16
AC29
VCCAUX17
AG28
VCCAUX18
AF28
VCCAUX19
AE28
VCCAUX20
AH22
VCCAUX21
AJ21
VCCAUX22
AH21
VCCAUX23
AJ20
VCCAUX24
AH20
VCCAUX25
AH19
VCCAUX26
P19
VCCAUX27
P16
VCCAUX28
AH15
VCCAUX29
P15
VCCAUX30
AH14
VCCAUX31
AG14
VCCAUX32
AF14
VCCAUX33
AE14
VCCAUX34
Y14
VCCAUX35
AF13
VCCAUX36
AE13
VCCAUX37
AF12
VCCAUX38
AE12
VCCAUX39
AD12
VCCAUX40
U39H
Route ASSATVBG gnd from GMCH to
decoupling cap groung lead and
then connect to the gnd plane
POWER
CALISTOGA_1p0
AC14
VTT_0
AB14
VTT_1
W14
VTT_2
VTT_3
VTT_4
VTT_5
VTT_6
VTT_7
VTT_8
VTT_9
VTT_10
VTT_11
VTT_12
VTT_13
VTT_14
VTT_15
VTT_16
VTT_17
VTT_18
VTT_19
VTT_20
VTT_21
VTT_22
VTT_23
VTT_24
VTT_25
VTT_26
VTT_27
VTT_28
VTT_29
VTT_30
VTT_31
VTT_32
VTT_33
VTT_34
VTT_35
VTT_36
VTT_37
VTT_38
VTT_39
VTT_40
VTT_41
VTT_42
VTT_43
VTT_44
VTT_45
VTT_46
VTT_47
VTT_48
VTT_49
VTT_50
VTT_51
VTT_52
VTT_53
VTT_54
VTT_55
VTT_56
VTT_57
VTT_58
VTT_59
VTT_60
VTT_61
VTT_62
VTT_63
VTT_64
VTT_65
VTT_66
VTT_67
VTT_68
VTT_69
VTT_70
VTT_71
VTT_72
VTT_73
VTT_74
VTT_75
VTT_76
V14
T14
R14
P14
N14
M14
L14
AD13
AC13
AB13
AA13
Y13
W13
V13
U13
T13
R13
N13
M13
L13
AB12
AA12
Y12
W12
V12
U12
T12
R12
P12
N12
M12
L12
R11
P11
N11
M11
R10
P10
N10
M10
P9
N9
M9
R8
P8
N8
M8
P7
N7
M7
R6
P6
M6
A6
R5
P5
N5
M5
P4
N4
M4
R3
P3
N3
M3
R2
P2
M2
D2
VCCP_GMCH_CAP1
AB1
R1
P1
N1
M1
C150
*
*
4.7uF
C0805
6.3V, X5R, +/-10%
10V, Y5V, +80%/-20%
VCCP_GMCH_CAP3
16V, Y5V, +80%/-20%
VCCP_GMCH_CAP2
*
16V, Y5V, +80%/-20%
C435
0.47uF
C0603
C138
2.2uF
C0805
C1980.47uFC0603
C153
0.22uF
*
C0603
10V, X7R, +/-10%
*
C451
*
0.22uF
C0603
16V, Y5V, +80%/-20%
FOXCONN ND2
Title
Size Document Number R ev
<Doc>
Custom
Date: Sheet
Calistoga (4 of 6)
W06N
1D05V_S0
*
94 4 Monday, February 21, 2005
C235
220uF
2.5V, +/-20%
CTX
of
SA
Page 10
NB_CORE_S0
CALISTOGA_1p0
U39F
1D5V_NB_S0
Follow Demo Circuit.
AD19
V19
U19
T19
AD18
AC18
AB18
AA18
Y18
W18
V18
U18
T18
VCC_NCTF61
VCC_NCTF62
VCC_NCTF63
VCC_NCTF64
VCC_NCTF65
VCC_NCTF66
VCC_NCTF67
VCC_NCTF68
VCC_NCTF69
VCC_NCTF70
VCC_NCTF71
VCC_NCTF72
VCCAUX_NCTF42
VCCAUX_NCTF43
VCCAUX_NCTF44
VCCAUX_NCTF45
VCCAUX_NCTF46
VCCAUX_NCTF47
VCCAUX_NCTF48
VCCAUX_NCTF49
VCCAUX_NCTF50
VCCAUX_NCTF51
VCCAUX_NCTF52
VCCAUX_NCTF53
VCCAUX_NCTF54
VCCAUX_NCTF55
VCCAUX_NCTF56
VCCAUX_NCTF57
R15
T15
Y15
V15
U15
W15
AB15
AA15
AC15
T16
V16
U16
R16
AF15
AE15
AD15
AG15
R20
VCC_NCTF60
VCCAUX_NCTF41
W16
U20
T20
VCC_NCTF58
VCC_NCTF59
VCCAUX_NCTF39
VCCAUX_NCTF40
Y16
AA16
220uF
2.5V, +/-20%
T21
R21
AD20
V20
VCC_NCTF54
VCC_NCTF55
VCC_NCTF56
VCC_NCTF57
VCCAUX_NCTF35
VCCAUX_NCTF36
VCCAUX_NCTF37
VCCAUX_NCTF38
AE16
AB16
AD16
AC16
NB_CORE_S0
C232
*
2.5V, +/-20%
CTX
R22
AD21
V21
U21
VCC_NCTF50
VCC_NCTF51
VCC_NCTF52
VCC_NCTF53
NCTF
VCCAUX_NCTF31
VCCAUX_NCTF32
VCCAUX_NCTF33
VCCAUX_NCTF34
T17
R17
AF16
AG16
C134
220uF
CTX
R23
AD22
V22
U22
T22
VCC_NCTF45
VCC_NCTF46
VCC_NCTF47
VCC_NCTF48
VCC_NCTF49
VCCAUX_NCTF26
VCCAUX_NCTF27
VCCAUX_NCTF28
VCCAUX_NCTF29
VCCAUX_NCTF30
V17
W17
AB17
AA17
AD17
C121
*
*
16V, Y5V, +80%/-20%
T24
R24
AD23
V23
U23
T23
VCC_NCTF39
VCC_NCTF40
VCC_NCTF41
VCC_NCTF42
VCC_NCTF43
VCC_NCTF44
VCCAUX_NCTF20
VCCAUX_NCTF21
VCCAUX_NCTF22
VCCAUX_NCTF23
VCCAUX_NCTF24
VCCAUX_NCTF25
R18
AF18
AF17
AE17
AG18
AG17
0.22uF
C0603
U24
VCC_NCTF38
VCCAUX_NCTF19
R19
C161
*
16V, Y5V, +80%/-20%
AB24
AA24
Y24
W24
V24
VCC_NCTF33
VCC_NCTF34
VCC_NCTF35
VCC_NCTF36
VCC_NCTF37
VCCAUX_NCTF18
VCCAUX_NCTF14
VCCAUX_NCTF15
VCCAUX_NCTF16
VCCAUX_NCTF17
AF21
AF20
AF19
AG20
AG19
VCC_NCTF32
VCCAUX_NCTF13
0.22uF
C0603
AD24
AC24
VCC_NCTF31
VCCAUX_NCTF12
AF22
AG21
VCC_NCTF30
VCCAUX_NCTF11
R25
VCC_NCTF29
VCCAUX_NCTF10
AG22
*
16V, Y5V, +80%/-20%
U25
T25
VCC_NCTF27
VCC_NCTF28
VCCAUX_NCTF8
VCCAUX_NCTF9
AF23
AG23
C156
V25
AF24
0.22uF
C0603
W25
VCC_NCTF26
VCCAUX_NCTF7
AG24
C160
1 2
*
10V, Y5V, +80%/-20%
AD25
AC25
AB25
AA25
Y25
VCC_NCTF21
VCC_NCTF22
VCC_NCTF23
VCC_NCTF24
VCC_NCTF25
VCCAUX_NCTF2
VCCAUX_NCTF3
VCCAUX_NCTF4
VCCAUX_NCTF5
VCCAUX_NCTF6
AF27
AF26
AF25
AG26
AG25
VCC_NCTF20
VCCAUX_NCTF1
1uF
C0402
T26
R26
VCC_NCTF19
VCCAUX_NCTF0
AG27
VCC_NCTF18
U26
VCC_NCTF17
*
10V, Y5V, +80%/-20%
W26
V26
VCC_NCTF15
VCC_NCTF16
C139
Y26
10uF
C0805
AA26
VCC_NCTF14
U17
C152
10uF
*
C0805
10V, Y5V, +80%/-20%
AD26
AC26
AB26
VCC_NCTF13
VSS_NCTF12
Y17
V27
U27
T27
R27
VCC_NCTF7
VCC_NCTF8
VCC_NCTF9
VCC_NCTF10
VCC_NCTF11
VCC_NCTF12
VSS_NCTF6
VSS_NCTF7
VSS_NCTF8
VSS_NCTF9
VSS_NCTF10
VSS_NCTF11
AE22
AE21
AE20
AE19
AE18
AC17
VCC_NCTF6
VSS_NCTF5
W27
AE23
VCC_NCTF5
VSS_NCTF4
AD27
AC27
AB27
AA27
Y27
VCC_NCTF0
VCC_NCTF1
VCC_NCTF2
VCC_NCTF3
VCC_NCTF4
NB_CORE_S0
VSS_NCTF0
VSS_NCTF1
VSS_NCTF2
VSS_NCTF3
AE27
AE26
AE25
AE24
1 2
1 2
1 2
1 2
1D05V_S0
GAP10
OPEN-POWER-GAP-3050
GAP7
OPEN-POWER-GAP-3050
GAP9
OPEN-POWER-GAP-3050
GAP8
OPEN-POWER-GAP-3050
P32
N32
M32
L32
J32
AA31
W31
V31
VCC_12
VCC_13
VCC_SM_8
VCC_SM_9
AT34
VCC_14
VCC_SM_10
AR34
VCC_15
VCC_SM_11
BA30
VCC_16
VCC_SM_12
AY30
VCC_17
VCC_SM_13
AW30
T31
AV30
AA33
W33
P33
N33
L33
J33
AA32
Y32
W32
V32
VCC_0
VCC_1
VCC_2
VCC_3
VCC_4
VCC_5
VCC_6
VCC_7
VCC_8
VCC_9
VCC_10
VCC_11
VCC_SM_0
VCC_SM_1
VCC_SM_2
VCC_SM_3
VCC_SM_4
VCC_SM_5
VCC_SM_6
VCC_SM_7
AT41
BA34
AY34
AU40
AM41
C423
0.47uF
C0805
AV34
AU34
AW34
VCC_SM_P2
C424
0.47uF
*
C0805
AU41
VCC_SM_P1
*
R31
VCC_18
VCC_19
VCC_SM_14
VCC_SM_15
AU30
P31
VCC_20
VCC_SM_16
AT30
N31
VCC_21
VCC_SM_17
AR30
M31
VCC_22
VCC_SM_18
AP30
AA30
VCC_23
VCC_SM_19
AN30
Y30
VCC_24
VCC_SM_20
AM30
W30
VCC_25
VCC_SM_21
AM29
V30
VCC_26
VCC_SM_22
AL29
U30
VCC_27
VCC_SM_23
AK29
T30
VCC_28
VCC_SM_24
AJ29
R30
VCC_29
VCC_SM_25
AH29
P30
VCC_30
VCC_SM_26
AJ28
N30
VCC_31
VCC_SM_27
AH28
M30
VCC_32
VCC_SM_28
AJ27
L30
VCC_33
VCC_SM_29
AH27
AA29
VCC_34
VCC_SM_30
BA26
Y29
VCC_35
VCC_SM_31
AY26
W29
VCC_36
VCC_SM_32
AW26
V29
VCC_37
VCC_SM_33
AV26
U29
VCC_38
VCC_SM_34
AU26
R29
VCC_39
VCC_SM_35
AT26
P29
VCC_40
VCC_SM_36
AR26
M29
VCC_41
VCC_SM_37
AJ26
L29
VCC_42
VCC_SM_38
AH26
AB28
VCC_43
VCC_SM_39
AJ25
AA28
VCC_44
VCC_SM_40
AH25
Y28
VCC_45
VCC_SM_41
AJ24
V28
VCC_46
VCC_SM_42
AH24
*
U28
VCC_47
VCC_SM_43
BA23
T28
R28
VCC_48
VCC_SM_44
AJ23
BA22
C100
0.47uF
C0805
P28
VCC_49
VCC_50
VCC_SM_45
VCC_SM_46
AY22
N28
VCC_51
VCC_SM_47
AW22
M28
VCC_52
VCC_SM_48
AV22
L28
VCC_53
VCC_SM_49
AU22
P27
VCC_54
VCC_SM_50
AT22
N27
AR22
M27
VCC_55
VCC_56
VCC_SM_51
VCC_SM_52
AP22
L27
VCC_57
VCC_SM_53
AK22
P26
VCC_58
VCC_SM_54
AJ22
N26
VCC_59
VCC_SM_55
AK21
L26
VCC_60
VCC_SM_56
AK20
N25
VCC_61
VCC_SM_57
BA19
M25
VCC_62
VCC_SM_58
AY19
L25
VCC_63
VCC_SM_59
AW19
P24
VCC_64
VCC_SM_60
AV19
N24
VCC_65
VCC_SM_61
AU19
M24
VCC_66
VCC_SM_62
AT19
AB23
VCC_67
VCC_SM_63
AR19
AA23
AP19
Y23
P23
VCC_68
VCC_69
VCC_70
VCC
VCC_SM_64
VCC_SM_65
VCC_SM_66
AJ19
AK19
N23
VCC_71
VCC_SM_67
AJ18
M23
VCC_72
VCC_SM_68
AJ17
L23
VCC_73
VCC_SM_69
AH17
AC22
VCC_74
VCC_SM_70
AJ16
AB22
VCC_75
VCC_SM_71
AH16
Y22
VCC_76
VCC_SM_72
BA15
W22
VCC_77
VCC_SM_73
AY15
P22
VCC_78
VCC_SM_74
AW15
N22
VCC_79
VCC_SM_75
AV15
M22
VCC_80
VCC_SM_76
AU15
L22
VCC_81
VCC_SM_77
AT15
AC21
VCC_82
VCC_SM_78
AR15
10uF
C0805
AA21
W21
VCC_83
VCC_84
VCC_SM_79
VCC_SM_80
AJ15
AJ14
1D8V_S3
C103
N21
VCC_85
VCC_SM_81
AJ13
*
M21
VCC_86
VCC_SM_82
AH13
L21
VCC_87
VCC_SM_83
AK12
C0805
AC20
VCC_88
VCC_SM_84
AJ12
C106
10uF
AB20
VCC_89
VCC_SM_85
AH12
Y20
VCC_90
VCC_SM_86
AG12
*
W20
VCC_91
VCC_SM_87
AK11
P20
N20
VCC_92
VCC_SM_88
BA8
AY8
0.47uF
C0805
M20
VCC_93
VCC_94
VCC_SM_89
VCC_SM_90
AW8
C118
L20
VCC_95
VCC_SM_91
AV8
*
AB19
VCC_96
VCC_SM_92
AT8
AA19
VCC_97
VCC_SM_93
AR8
Y19
VCC_98
VCC_SM_94
AP8
N19
VCC_99
VCC_SM_95
BA6
M19
L19
VCC_100
VCC_SM_96
AY6
AW6
N18
M18
VCC_101
VCC_102
VCC_SM_97
VCC_SM_98
AT6
AV6
L18
P17
VCC_103
VCC_104
VCC_SM_99
VCC_SM_100
AP6
AR6
N17
M17
VCC_105
VCC_106
VCC_SM_101
VCC_SM_102
AL6
AN6
0.47uF
C0805
N16
M16
VCC_107
VCC_108
VCC_SM_103
VCC_SM_104
AJ6
AK6
C422
*
L16
VCC_109
VCC_110
VCC_SM_105
VCC_SM_106
AJ1
AV1
VCC_SM_P3
VCC_SM_P4
*
VCC_SM_107
CALISTOGA_1p0
U39G
C427
0.47uF
C0805
Title
Size Document Number Rev
<Doc>
A3
Date: Sheet of
Calistoga (5 of 6)
W06N
10 44 Saturday, February 19, 2005
SA
FOXCONN ND2
Page 11
AC41
AA41
W41
T41
P41
M41
J41
F41
AV40
AP40
AN40
AK40
AJ40
AH40
AG40
AF40
AE40
B40
AY39
AW39
AV39
AR39
AN39
AJ39
AC39
AB39
AA39
Y39
W39
V39
T39
R39
P39
N39
M39
L39
J39
H39
G39
F39
D39
AT38
AM38
AH38
AG38
AF38
AE38
C38
AK37
AH37
AB37
AA37
Y37
W37
V37
T37
R37
P37
N37
M37
L37
J37
H37
G37
F37
D37
AY36
AW36
AN36
AH36
AG36
AF36
AE36
AC36
C36
B36
BA35
AV35
AR35
AH35
AB35
AA35
Y35
W35
V35
T35
R35
P35
N35
M35
L35
J35
H35
G35
F35
D35
AN34
U39I
VSS_0
VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8
VSS_9
VSS_10
VSS_11
VSS_12
VSS_13
VSS_14
VSS_15
VSS_16
VSS_17
VSS_18
VSS_19
VSS_20
VSS_21
VSS_22
VSS_23
VSS_24
VSS_25
VSS_26
VSS_27
VSS_28
VSS_29
VSS_30
VSS_31
VSS_32
VSS_33
VSS_34
VSS_35
VSS_36
VSS_37
VSS_38
VSS_39
VSS_40
VSS_41
VSS_42
VSS_43
VSS_44
VSS_45
VSS_46
VSS_47
VSS_48
VSS_49
VSS_50
VSS_51
VSS_52
VSS_53
VSS_54
VSS_55
VSS_56
VSS_57
VSS_58
VSS_59
VSS_60
VSS_61
VSS_62
VSS_63
VSS_64
VSS_65
VSS_66
VSS_67
VSS_68
VSS_69
VSS_70
VSS_71
VSS_72
VSS_73
VSS_74
VSS_75
VSS_76
VSS_77
VSS_78
VSS_79
VSS_80
VSS_81
VSS_82
VSS_83
VSS_84
VSS_85
VSS_86
VSS_87
VSS_88
VSS_89
VSS_90
VSS_91
VSS_92
VSS_93
VSS_94
VSS_95
VSS_96
CALISTOGA_1p0
VSS
VSS_97
VSS_98
VSS_99
VSS_100
VSS_101
VSS_102
VSS_103
VSS_104
VSS_105
VSS_106
VSS_107
VSS_108
VSS_109
VSS_110
VSS_111
VSS_112
VSS_113
VSS_114
VSS_115
VSS_116
VSS_117
VSS_118
VSS_119
VSS_120
VSS_121
VSS_122
VSS_123
VSS_124
VSS_125
VSS_126
VSS_127
VSS_128
VSS_129
VSS_130
VSS_131
VSS_132
VSS_133
VSS_134
VSS_135
VSS_136
VSS_137
VSS_138
VSS_139
VSS_140
VSS_141
VSS_142
VSS_143
VSS_144
VSS_145
VSS_146
VSS_147
VSS_148
VSS_149
VSS_150
VSS_151
VSS_152
VSS_153
VSS_154
VSS_155
VSS_156
VSS_157
VSS_158
VSS_159
VSS_160
VSS_161
VSS_162
VSS_163
VSS_164
VSS_165
VSS_166
VSS_167
VSS_168
VSS_169
VSS_170
VSS_171
VSS_172
VSS_173
VSS_174
VSS_175
VSS_176
VSS_177
VSS_178
VSS_179
AK34
AG34
AF34
AE34
AC34
C34
AW33
AV33
AR33
AE33
AB33
Y33
V33
T33
R33
M33
H33
G33
F33
D33
B33
AH32
AG32
AF32
AE32
AC32
AB32
G32
B32
AY31
AV31
AN31
AJ31
AG31
AB31
Y31
AB30
E30
AT29
AN29
AB29
T29
N29
K29
G29
E29
C29
B29
A29
BA28
AW28
AU28
AP28
AM28
AD28
AC28
W28
J28
E28
AP27
AM27
AK27
J27
G27
F27
C27
B27
AN26
M26
K26
F26
D26
AK25
P25
K25
H25
E25
D25
A25
BA24
AU24
AL24
AW23
AT23
AN23
AM23
AH23
AC23
W23
K23
C23
AA22
K22
G22
E22
D22
A22
BA21
AV21
AR21
AN21
AL21
AB21
P21
K21
H21
C21
AW20
AR20
AM20
AA20
K20
B20
A20
AN19
AC19
W19
K19
G19
C19
AH18
P18
H18
D18
A18
AY17
AR17
AP17
AM17
AK17
AV16
AN16
AL16
C16
AN15
AM15
AK15
N15
M15
B15
A15
BA14
AT14
AK14
AD14
AA14
U14
K14
H14
E14
AV13
AR13
AN13
AM13
AL13
AG13
P13
D13
B13
AY12
AC12
K12
H12
E12
AD11
AA11
J23
F23
F22
Y21
J21
J16
F16
L15
F13
Y11
U39J
VSS_180
VSS_181
VSS_182
VSS_183
VSS_184
VSS_185
VSS_186
VSS_187
VSS_188
VSS_189
VSS_190
VSS_191
VSS_192
VSS_193
VSS_194
VSS_195
VSS_196
VSS_197
VSS_198
VSS_199
VSS_200
VSS_201
VSS_202
VSS_203
VSS_204
VSS_205
VSS_206
VSS_207
VSS_208
VSS_209
VSS_210
VSS_211
VSS_212
VSS_213
VSS_214
VSS_215
VSS_216
VSS_217
VSS_218
VSS_219
VSS_220
VSS_221
VSS_222
VSS_223
VSS_224
VSS_225
VSS_226
VSS_227
VSS_228
VSS_229
VSS_230
VSS_231
VSS_232
VSS_233
VSS_234
VSS_235
VSS_236
VSS_237
VSS_238
VSS_239
VSS_240
VSS_241
VSS_242
VSS_243
VSS_244
VSS_245
VSS_246
VSS_247
VSS_248
VSS_249
VSS_250
VSS_251
VSS_252
VSS_253
VSS_254
VSS_255
VSS_256
VSS_257
VSS_258
VSS_259
VSS_260
VSS_261
VSS_262
VSS_263
VSS_264
VSS_265
VSS_266
VSS_267
VSS_268
VSS_269
VSS_270
VSS_271
VSS_272
VSS
CALISTOGA_1p0
VSS_273
VSS_274
VSS_275
VSS_276
VSS_277
VSS_278
VSS_279
VSS_280
VSS_281
VSS_282
VSS_283
VSS_284
VSS_285
VSS_286
VSS_287
VSS_288
VSS_289
VSS_290
VSS_291
VSS_292
VSS_293
VSS_294
VSS_295
VSS_296
VSS_297
VSS_298
VSS_299
VSS_300
VSS_301
VSS_302
VSS_303
VSS_304
VSS_305
VSS_306
VSS_307
VSS_308
VSS_309
VSS_310
VSS_311
VSS_312
VSS_313
VSS_314
VSS_315
VSS_316
VSS_317
VSS_318
VSS_319
VSS_320
VSS_321
VSS_322
VSS_323
VSS_324
VSS_325
VSS_326
VSS_327
VSS_328
VSS_329
VSS_330
VSS_331
VSS_332
VSS_333
VSS_334
VSS_335
VSS_336
VSS_337
VSS_338
VSS_339
VSS_340
VSS_341
VSS_342
VSS_343
VSS_344
VSS_345
VSS_346
VSS_347
VSS_348
VSS_349
VSS_350
VSS_351
VSS_352
VSS_353
VSS_354
VSS_355
VSS_356
VSS_357
VSS_358
VSS_359
VSS_360
J11
D11
B11
AV10
AP10
AL10
AJ10
AG10
AC10
W10
U10
BA9
AW9
AR9
AH9
AB9
Y9
R9
G9
E9
A9
AG8
AD8
AA8
U8
K8
C8
BA7
AV7
AP7
AL7
AJ7
AH7
AF7
AC7
R7
G7
D7
AG6
AD6
AB6
Y6
U6
N6
K6
H6
B6
AV5
AF5
AD5
AY4
AR4
AP4
AL4
AJ4
Y4
U4
R4
J4
F4
C4
AY3
AW3
AV3
AL3
AH3
AG3
AF3
AD3
AC3
AA3
G3
AT2
AR2
AP2
AK2
AJ2
AD2
AB2
Y2
U2
T2
N2
J2
H2
F2
C2
AL1
Title
Size Document Number Rev
<Doc>
A3
Date: Sheet of
Calistoga (6 of 6)
W06N
11 44 Saturday, February 19, 2005
SA
FOXCONN ND2
Page 12
MH1
102
101
100
99
98
97
94
92
93
91
105
90
89
116
86
84
85
107
106
5
7
17
19
4
6
14
16
23
25
35
37
20
22
36
38
43
45
55
57
44
46
56
58
61
63
73
75
62
64
74
76
123
125
135
137
124
126
134
136
141
143
151
153
140
142
152
154
157
159
173
175
158
160
174
176
179
181
189
191
180
182
192
194
50
69
83
120
163
110
115
79
80
108
113
109
197
195
114
119
1
C32
0.1uF
C0402
201
*
DDR_VREF_S3
M_B_A[13..0] 8,13
M_B_BS2# 8,13
M_B_BS0# 8,13
M_B_BS1# 8,13
M_B_DQ[63..0] 8
M_CS2_R# 7,13
M_CS3_R# 7,13
M_CKE2_R# 7,13
M_CKE3_R# 7,13
M_B_RAS# 8,13
M_B_CAS# 8,13
M_B_WE# 8,13
SMBC_ICH 3,21,23
SMBD_ICH 3
M_ODT2 7,13
M_ODT3 7,13
C30
1uF
*
C0603
6.3V, X5R, +/-10%
M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_DQ0
M_B_DQ1
M_B_DQ2
M_B_DQ3
M_B_DQ4
M_B_DQ5
M_B_DQ6
M_B_DQ7
M_B_DQ8
M_B_DQ9
M_B_DQ10
M_B_DQ11
M_B_DQ12
M_B_DQ13
M_B_DQ14
M_B_DQ15
M_B_DQ19
M_B_DQ18
M_B_DQ16
M_B_DQ17
M_B_DQ20
M_B_DQ21
M_B_DQ22
M_B_DQ23
M_B_DQ24
M_B_DQ25
M_B_DQ26
M_B_DQ27
M_B_DQ28
M_B_DQ29
M_B_DQ30
M_B_DQ31
M_B_DQ32
M_B_DQ33
M_B_DQ34
M_B_DQ35
M_B_DQ36
M_B_DQ37
M_B_DQ38
M_B_DQ39
M_B_DQ40
M_B_DQ41
M_B_DQ42
M_B_DQ43
M_B_DQ44
M_B_DQ45
M_B_DQ46
M_B_DQ47
M_B_DQ48
M_B_DQ49
M_B_DQ50
M_B_DQ51
M_B_DQ52
M_B_DQ53
M_B_DQ54
M_B_DQ55
M_B_DQ56
M_B_DQ57
M_B_DQ58
M_B_DQ59
M_B_DQ60
M_B_DQ61
M_B_DQ62
M_B_DQ63
C28
1uF
*
C0603
6.3V, X5R, +/-10%
CN6
MH1
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12
A13
A14
A15
A16_BA2
BA0
BA1
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
NC#50
NC#69
NC#83
NC#120
NC#163/TEST
CS0#
CS1#
CKE0
CKE1
RAS#
CAS#
WE#
SCL
SDA
ODT0
ODT1
VREF
GND
DDR_SO-DIMM
Hi 9.2 mm
MH2
DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
DQS0#
DQS1#
DQS2#
DQS3#
DQS4#
DQS5#
DQS6#
DQS7#
DM0
DM1
DM2
DM3
DM4
DM5
DM6
DM7
CK0
CK0#
CK1
CK1#
SA0
SA1
VDD_SPD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
GND
MH2
13
31
51
70
131
148
169
188
11
29
49
68
129
146
167
186
10
26
52
67
130
147
170
185
30
32
164
166
198
200
199
81
82
87
88
95
96
103
104
111
112
117
118
2
3
8
9
12
15
18
21
24
27
28
33
34
39
40
41
42
47
48
53
54
59
60
65
66
71
72
77
78
121
122
127
128
132
133
138
139
144
145
149
150
155
156
161
162
165
168
171
172
177
178
183
184
187
190
193
196
202
M_B_DQS0
M_B_DQS1
M_B_DQS2
M_B_DQS3
M_B_DQS4
M_B_DQS5
M_B_DQS6
M_B_DQS7
M_B_DQS#0
M_B_DQS#1
M_B_DQS#2
M_B_DQS#3
M_B_DQS#4
M_B_DQS#5
M_B_DQS#6
M_B_DQS#7
M_B_DM0
M_B_DM1
M_B_DM2
M_B_DM3
M_B_DM4
M_B_DM5
M_B_DM6
M_B_DM7
CLK_DDR3 7
CLK_DDR3# 7
CLK_DDR2 7
CLK_DDR2# 7
C27
0.1uF
*
C0402
16V, Y5V, +80%/-20%
1D8V_S3
M_B_DQS[7..0] 8
M_B_DQS#[7..0] 8
M_B_DM[7..0] 8
3D3V_S0
C26
*
2.2uF
6.3V, X5R, +/-10%
C0805
DUMMY
Place near DM1
*
*
R10
10K
R0402
+/-5%
CLK_DDR3
C16
10pF
50V, NPO, +/-5%DUMMY
C0402
CLK_DDR3#
CLK_DDR2
C15
10pF
50V, NPO, +/-5%DUMMY
C0402
CLK_DDR2#
R9
10K
R0402
+/-5%
3D3V_S0
DDR_VREF_S3
CN7
MH1
M_A_A[13..0] 8,13
M_A_BS2# 8,13
M_A_BS0# 8,13
M_A_BS1# 8,13
M_A_DQ[63..0] 8
M_CS0_R# 7,13
M_CS1_R# 7,13
M_CKE0_R# 7,13
M_CKE1_R# 7,13
M_A_RAS# 8,13
M_A_CAS# 8,13
M_A_WE# 8,13
M_ODT0 7,13
M_ODT1 7,13
C74
1uF
*
C0603
6.3V, X5R, +/-10%
*
6.3V, X5R, +/-10%
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ4
M_A_DQ5
M_A_DQ6
M_A_DQ7
M_A_DQ8
M_A_DQ9
M_A_DQ10
M_A_DQ11
M_A_DQ12
M_A_DQ13
M_A_DQ14
M_A_DQ15
M_A_DQ16
M_A_DQ17
M_A_DQ18
M_A_DQ19
M_A_DQ20
M_A_DQ21
M_A_DQ22
M_A_DQ23
M_A_DQ24
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQ28
M_A_DQ29
M_A_DQ30
M_A_DQ31
M_A_DQ32
M_A_DQ37
M_A_DQ36
M_A_DQ35
M_A_DQ38
M_A_DQ39
M_A_DQ34
M_A_DQ33
M_A_DQ40
M_A_DQ41
M_A_DQ42
M_A_DQ43
M_A_DQ44
M_A_DQ45
M_A_DQ46
M_A_DQ47
M_A_DQ56
M_A_DQ57
M_A_DQ58
M_A_DQ59
M_A_DQ60
M_A_DQ63
M_A_DQ62
M_A_DQ61
M_A_DQ48
M_A_DQ49
M_A_DQ50
M_A_DQ51
M_A_DQ52
M_A_DQ53
M_A_DQ54
M_A_DQ55
SMBC_ICH
SMBD_ICH
C63
1uF
*
C0603
C76
0.1uF
C0402
102
101
100
99
98
97
94
92
93
91
105
90
89
116
86
84
85
107
106
5
7
17
19
4
6
14
16
23
25
35
37
20
22
36
38
43
45
55
57
44
46
56
58
61
63
73
75
62
64
74
76
123
125
135
137
124
126
134
136
141
143
151
153
140
142
152
154
157
159
173
175
158
160
174
176
179
181
189
191
180
182
192
194
50
69
83
120
163
110
115
79
80
108
113
109
197
195
114
119
1
201
MH1
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12
A13
A14
A15
A16_BA2
BA0
BA1
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
NC#50
NC#69
NC#83
NC#120
NC#163/TEST
CS0#
CS1#
CKE0
CKE1
RAS#
CAS#
WE#
SCL
SDA
ODT0
ODT1
VREF
GND
SO-DIMM_DDR II
Low5.2 mm
MH2
DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
DQS0#
DQS1#
DQS2#
DQS3#
DQS4#
DQS5#
DQS6#
DQS7#
DM0
DM1
DM2
DM3
DM4
DM5
DM6
DM7
CK0
CK0#
CK1
CK1#
VDD_SPD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
GND
MH2
M_A_DQS0
13
M_A_DQS1
31
M_A_DQS2
51
M_A_DQS3
70
M_A_DQS4
131
M_A_DQS5
148
M_A_DQS7
169
M_A_DQS6
188
M_A_DQS#0
11
M_A_DQS#1
29
M_A_DQS#2
49
M_A_DQS#3
68
M_A_DQS#4
129
M_A_DQS#5
146
M_A_DQS#7
167
M_A_DQS#6
186
M_A_DM0
10
M_A_DM1
26
M_A_DM2
52
M_A_DM3
67
M_A_DM4
130
M_A_DM5
147
M_A_DM7
170
M_A_DM6
185
30
32
164
166
198
SA0
200
SA1
199
81
82
87
88
95
96
103
104
111
112
117
118
2
3
8
9
12
15
18
21
24
27
28
33
34
39
40
41
42
47
48
53
54
59
60
65
66
71
72
77
78
121
122
127
128
132
133
138
139
144
145
149
150
155
156
161
162
165
168
171
172
177
178
183
184
187
190
193
196
202
Title
Size Document Number Rev
Date: Sheet
CLK_DDR0 7
CLK_DDR0# 7
CLK_DDR1 7
CLK_DDR1# 7
C67
0.1uF
*
C0402
16V, Y5V, +80%/-20%
1D8V_S3
Custom
M_A_DQS[7..0] 8
M_A_DQS#[7..0] 8
M_A_DM[7..0] 8
C62
*
2.2uF
6.3V, X5R, +/-10%
C0805
DUMMY
<Doc>
3D3V_S0
FOXCONN ND2
DDR SOCKET
W06N
R504
R503
10K
10K
R0402
R0402
+/-5%
+/-5%
Place near DM2
CLK_DDR0
C51
10pF
*
50V, NPO, +/-5%DUMMY
C0402
CLK_DDR0#
CLK_DDR1
C52
10pF
*
50V, NPO, +/-5%DUMMY
C0402
CLK_DDR1#
12 44 Saturday, February 19, 2005
SA
of
Page 13
PARALLEL TERMINATION
0D9V_S0
Put decap near power(0.9V) and pull-up resistor
R21 56R0402 +/-5%
R15 56R0402 +/-5%
R47 56R0402 +/-5%
RN4568P4R0402
1
*
3
5
7 8
RN6568P4R0402
1
*
3
5
7 8
R48 56R0402 +/-5%
RN1568P4R0402
1
*
3
5
7 8
RN2568P4R0402
1
*
3
5
7 8
RN3568P4R0402
1
*
3
5
7 8
RN5568P4R0402
1
*
3
5
7 8
RN7568P4R0402
1
*
3
5
7 8
RN8568P4R0402
1
*
3
5
7 8
RN10568P4R0402
1
*
3
5
7 8
RN12568P4R0402
1
*
3
5
7 8
RN9568P4R0402
1
*
3
5
7 8
RN11568P4R0402
1
*
3
5
7 8
+/-5%
+/-5%
+/-5%
+/-5%
+/-5%
+/-5%
+/-5%
+/-5%
+/-5%
+/-5%
+/-5%
+/-5%
2
4
6
2
4
6
2
4
6
2
4
6
2
4
6
2
4
6
2
4
6
2
4
6
2
4
6
2
4
6
2
4
6
2
4
6
M_B_A13
M_B_A4
M_B_A2
M_B_A0
M_B_A6
M_B_A7
M_B_A11
M_A_A13
M_A_A4
M_A_A2
M_A_A0
M_A_A9
M_A_A12
M_A_A11
M_A_A7
M_A_A6
M_A_A10
M_A_A1
M_A_A3
M_A_A5
M_CKE2_R# 7,12
M_B_BS2# 8,12
M_ODT1 7,12
M_B_WE# 8,12
M_B_CAS# 8,12
M_CS3_R# 7,12
M_ODT3 7,12
M_B_A12
M_B_A9
M_B_A8
M_B_A5
M_A_A8
M_B_RAS# 8,12
M_CS2_R# 7,12
M_ODT2 7,12
M_B_BS1# 8,12
M_CKE3_R# 7,12
M_B_A3
M_B_A1
M_B_A10
M_A_RAS# 8,12
M_CS0_R# 7,12
M_ODT0 7,12
M_A_BS1# 8,12
M_CS1_R# 7,12
M_A_CAS# 8,12
M_A_WE# 8,12
M_A_BS0# 8,12
M_A_BS2# 8,12
M_CKE0_R# 7,12
M_CKE1_R# 7,12
M_B_BS0# 8,12
M_A_A[13..0] 8,12
M_B_A[13..0] 8,12
0D9V_S0
1D8V_S3
1D8V_S3
C19
0.1uF
*
C0402
16V, Y5V, +80%/-20%
C44
0.1uF
*
C0402
16V, Y5V, +80%/-20%
*
*
Put decap near power(0.9V)
and pull-up resistor
C14
0.1uF
*
C0402
DUMMY
C11
0.1uF
*
C0402
DUMMY
*
*
C72
2.2uF
6.3V, X5R, +/-10%
C0805
C36
0.1uF
*
C0402
DUMMY
C13
0.1uF
*
16V, Y5V, +80%/-20%
*
16V, Y5V, +80%/-20%
C0402
C22
0.1uF
C0402
*
16V, Y5V, +80%/-20%
*
16V, Y5V, +80%/-20%
Place these Caps near DM1
C57
2.2uF
6.3V, X5R, +/-10%
C0805
C56
0.1uF
C0402
DUMMY
*
C69
0.1uF
C0402
DUMMY
*
Place these Caps near DM2
C71
2.2uF
*
6.3V, X5R, +/-10%
C0805
C3
0.1uF
C0402
DUMMY
C37
0.1uF
*
C0402
DUMMY
C39
0.1uF
*
C0402
16V, Y5V, +80%/-20%
C88
0.1uF
*
C0402
16V, Y5V, +80%/-20%
C70
2.2uF
6.3V, X5R, +/-10%
C0805
C54
0.1uF
*
C0402
DUMMY
*
C5
0.1uF
*
C0402
DUMMY
Decoupling Capacitor
C40
0.1uF
*
C0402
16V, Y5V, +80%/-20%
C86
0.1uF
*
C0402
16V, Y5V, +80%/-20%
*
C68
0.1uF
*
C0402
DUMMY
C35
2.2uF
6.3V, X5R, +/-10%
C0805
C41
0.1uF
*
C0402
C87
0.1uF
*
C0402
16V, Y5V, +80%/-20%
C34
2.2uF
6.3V, X5R, +/-10%
C0805
C33
2.2uF
*
6.3V, X5R, +/-10%
C0805
C23
0.1uF
C0402
DUMMY
C84
0.1uF
C0402
C9
0.1uF
*
C0402
16V, Y5V, +80%/-20%
C7
0.1uF
*
C0402
DUMMY
C6
2.2uF
*
6.3V, X5R, +/-10%
C0805
*
C12
0.1uF
*
C0402
DUMMY
C10
0.1uF
*
C0402
16V, Y5V, +80%/-20%
16V, Y5V, +80%/-20%
C55
2.2uF
*
6.3V, X5R, +/-10%
C0805
C4
2.2uF
6.3V, X5R, +/-10%
C0805
*
*
C43
0.1uF
C0402
DUMMY
C85
0.1uF
C0402
*
C8
0.1uF
*
C0402
DUMMY
C89
0.1uF
*
C0402
16V, Y5V, +80%/-20%
C53
2.2uF
*
6.3V, X5R, +/-10%
C0805
DUMMY
C2
2.2uF
6.3V, X5R, +/-10%
C0805
DUMMY
C42
0.1uF
*
C0402
DUMMY
C20
0.1uF
*
C0402
16V, Y5V, +80%/-20%
C21
0.1uF
*
C0402
16V, Y5V, +80%/-20%
C18
0.1uF
*
C0402
16V, Y5V, +80%/-20%
FOXCONN ND2
Title
DDR Termination Resistor
Size Document Number Rev
<Doc>
A3
Date: Sheet of
W06N
13 44 Saturday, February 19, 2005
SA
Page 14
5V_S0 2D5V_S0
16V, Y5V, +80%/-20%
GMODULE_RST# 33
PLT_RST1# 7,19,21,23,33,35,36
B_KBC_DAT1 22,33
B_KBC_SCL1 22,33
C244
*
C0402
0.1uF
DUMMY
C245
*
C0402
0.1uF
16V, Y5V, +80%/-20%
DUMMY
C105
*
0.1uF
25V, Y5V, +80%/-20%
C0603
R188 0 R0402
+/-5% DUMMY
R198 0
R0402 +/-5%
TP66
TP68
1
1
C117
*
C0402
16V, Y5V, +80%/-20%
0.1uF
DUMMY
3D3V_S0
C246
*
C0402
0.1uF
16V, Y5V, +80%/-20%
DUMMY
DCBATOUT
C102
*
0.1uF
25V, Y5V, +80%/-20%
C0603
GID1 GID0
X LOW HI
X LOW LOW
NV43M HI LOW
PEG_RXP[15..0] 7
PEG_RXN[15..0] 7
PEG_TXP[15..0] 7
PEG_TXN[15..0] 7
for CRT DDC
GF1
231
1
2
3
4
5
DCBATOUT
PEG_RXN15
PEG_RXP15
PEG_RXN14
PEG_RXP14
PEG_RXN13
PEG_RXP13
PEG_RXN12
PEG_RXP12
PEG_RXN11
PEG_RXP11
PEG_RXN10
PEG_RXP10
PEG_RXN9
PEG_RXP9
PEG_RXN8
PEG_RXP8
PEG_RXN7
PEG_RXP7
PEG_RXN6
PEG_RXP6
PEG_RXN5
PEG_RXP5
PEG_RXN4
PEG_RXP4
PEG_RXN3
PEG_RXP3
PEG_RXN2
PEG_RXP2
PEG_RXN1
PEG_RXP1
PEG_RXN0
PEG_RXP0
CLK_PCIE_PEG# 3
CLK_PCIE_PEG 3
THERM_ALERT#_GPIO8
TP118
1
TP69
THERM_ALERT#_GPIO8 33
THERM_ALERT#
1
ATI_HSYNC 15
ATI_VSYNC 15
ATI_DDCCLK 15
ATI_DDCDATA 15
1D5V_S0
GID1
GID0
GID1 19
GID0 19
S0_EN 21,23,33,37,40,41,42
RESERVE
TMDS_HPD 16
TMDS_TXCTMDS_TXC+
TMDS_TX2-
TMDS_TX2+
TMDS_TX1-
TMDS_TX1+
TMDS_TX0-
TMDS_TX0+
TP63
101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
1
131
133
135
137
139
141
143
145
147
149
151
153
155
157
159
161
163
165
167
169
171
173
175
177
179
181
183
185
187
189
191
193
195
197
199
201
203
205
207
209
211
213
215
217
219
221
223
225
227
229
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
202
204
206
208
210
212
214
216
218
220
222
224
226
228
230
232
MXM230P
change to 1.8V_S0 from 2.5V_S0
3D3V_S0
1D8V_S0
PEG_TXP14
PEG_TXN14
PEG_TXN15
PEG_TXP15
PEG_TXP12
PEG_TXN12
PEG_TXN13
PEG_TXP13
PEG_TXP10
PEG_TXN10
PEG_TXN11
PEG_TXP11
PEG_TXP8
PEG_TXN8
PEG_TXN9
PEG_TXP9
PEG_TXN6
PEG_TXP6
PEG_TXN7
PEG_TXP7
PEG_TXN4
PEG_TXP4
PEG_TXN5
PEG_TXP5
PEG_TXN3
PEG_TXP3
PEG_TXN2
PEG_TXP2
PEG_TXN0
PEG_TXP0
PEG_TXN1
PEG_TXP1
ATI_TV_CRMA 15
ATI_TV_LUMA 15
ATI_TV_COPM 15
ATI_TXBCLK-
ATI_TXBCLK+
ATI_TXBOUT2-
ATI_TXBOUT2+
ATI_TXBOUT1-
ATI_TXBOUT1+
ATI_TXBOUT0-
ATI_TXACLKATI_TXACLK+
ATI_TXAOUT2ATI_TXAOUT2+
ATI_TXAOUT1ATI_TXAOUT1+
ATI_TXAOUT0ATI_TXAOUT0+
ATI_TXBOUT0+
LDDC_DATA 7,17
LDDC_CLK 7,17
ATI_LCDVDD_ON 17
ATI_BL_ON 33
VGA_DAT 16
VGA_CLK 16
TP74
3D3V_S0
R103
10K
+/-5%
R0402
ATI_RED 15
ATI_GREEN 15
ATI_BLUE 15
PANNEL
for DVI I2C
1
5V_S0
2D5V_S0
RN2308P4R0603
TXACLK+
1
+/-5%
RN2508P4R0603
+/-5%
RN3408P4R0603
+/-5%
RN3608P4R0603
+/-5%
TXBCLKTXBCLK+
TXBOUT2TXBOUT2+
+/-5%
TXBOUT1TXBOUT1+
TXBOUT0TXBOUT0+
TXAOUT2TXAOUT2+
TXACLKTXACLK+
TXAOUT0TXAOUT0+
TXAOUT1TXAOUT1+
*
3
5
7 8
1
*
3
5
7 8
1
*
3
5
7 8
1
*
3
5
7 8
RN35 0
1
*
3
5
7 8
RN37 0
1
*
3
5
7 8
RN22 0
1
*
3
5
7 8
RN24 0
1
*
3
5
7 8
RN28 0
1
*
3
5
7 8
RN26 0
1
*
3
5
7 8
TXACLK+ 17
TXACLK- 17
TXAOUT2+ 17
TXAOUT2- 17
TXAOUT1+ 17
TXAOUT1- 17
TXAOUT0+ 17
TXAOUT0- 17
TXBOUT2+ 17
TXBOUT2- 17
TXBCLK+ 17
TXBCLK- 17
TXBOUT0+ 17
TXBOUT0- 17
TXBOUT1+ 17
TXBOUT1- 17
TMDS_TX0- 16
TMDS_TX0+ 16
CH_TMDS_TXC- 16
CH_TMDS_TXC+ 16
CH_TMDS_TX1- 16
CH_TMDS_TX1+ 16
CH_TMDS_TX2- 16
CH_TMDS_TX2+ 16
TXACLKTXAOUT2+
TXAOUT2-
TXAOUT1+
TXAOUT1TXAOUT0+
TXAOUT0-
TXBOUT2+
TXBOUT2TXBCLK+
TXBCLK-
TXBOUT0+
TXBOUT0TXBOUT1+
TXBOUT1-
CH_TMDS_TXCCH_TMDS_TXC+
CH_TMDS_TX1CH_TMDS_TX1+
CH_TMDS_TX2CH_TMDS_TX2+
2
4
6
2
4
6
2
4
6
2
4
6
2
4
6
8P4R0603
2
4
6
8P4R0603+/-5%
2
4
6
8P4R0603+/-5%
2
4
6
8P4R0603+/-5%
2
4
6
8P4R0603+/-5%
2
4
6
8P4R0603+/-5%
CH_TMDS_TX0+ TMDS_TX0+
ATI_TXACLK+
ATI_TXACLKATI_TXAOUT2+
ATI_TXAOUT2-
DUMMY
ATI_TXAOUT1+
ATI_TXAOUT1ATI_TXAOUT0+
ATI_TXAOUT0-
DUMMY
ATI_TXBOUT2+
ATI_TXBOUT2ATI_TXBCLK+
ATI_TXBCLK-
DUMMY
ATI_TXBOUT0+
ATI_TXBOUT0ATI_TXBOUT1+
ATI_TXBOUT1-
DUMMY
GMCH_TXBCLK- 7
GMCH_TXBCLK+ 7
GMCH_TXBOUT2- 7
GMCH_TXBOUT2+ 7
GMCH_TXBOUT1- 7
GMCH_TXBOUT1+ 7
GMCH_TXBOUT0- 7
GMCH_TXBOUT0+ 7
GMCH_TXAOUT2- 7
GMCH_TXAOUT2+ 7
GMCH_TXACLK- 7
GMCH_TXACLK+ 7
GMCH_TXAOUT0- 7
GMCH_TXAOUT0+ 7
GMCH_TXAOUT1- 7
GMCH_TXAOUT1+ 7
CH_TMDS_TX0- TMDS_TX0TMDS_TXC-
TMDS_TXC+
TMDS_TX1TMDS_TX1+
TMDS_TX2TMDS_TX2+
CH_TMDS_TX0- 16
CH_TMDS_TX0+ 16
TMDS_TXC- 16
TMDS_TXC+ 16
TMDS_TX1- 16
TMDS_TX1+ 16
TMDS_TX2- 16
TMDS_TX2+ 16
FOXCONN ND2
Title
Size Document Number Rev
Custom
Date: Sheet
External VGA Conn.
<Doc>
W06N
SA
of
14 44 Saturday, Feb ru ar y 19 , 2005
Page 15
CRT I/F & CONNECTOR
Layout Note:
Place these resistors
close to the CRT-out
connector
ATI_RED 14
GMCH_RED 7
ATI_GREEN 14
GMCH_GREEN 7
ATI_BLUE 14
GMCH_BLUE 7
Layout Note:
* Must be a g ro un d return path between this ground and the ground on
the VGA connector.
Pi-filter & 150 Ohm pull-down resistors should be as close as to CRT
CONN. RGB will hit 75 Ohm first, pi-filter, then CRT CONN.
Hsync & Vsync level shift
ATI_HSYNC 14
GMCH_HSYNC 7
ATI_VSYNC 14
GMCH_VSYNC 7
R559 0
R0402 +/-5% DUMMY
R551 0
R0402 +/-5%
R558 0
R0402 +/-5% DUMMY
R560 0
R0402 +/-5%
R214 0
R0402 +/-5% DUMMY
R157 0
R0402 +/-5%
R221 0
R0402 +/-5% DUMMY
R223 0
R0402 +/-5%
R226 0
R0402 +/-5% DUMMY
R225 0
R0402 +/-5%
R241
150
+/-1%
R0603
14
4
5 6
7
R243
R242
150
150
+/-1%
+/-1%
R0603
R0603
5V_S0
14
2 3
7
U15B
74AHCT125PW
CRT_G_1
*
C251
3.3pF
C0402
DUMMY
50V, NPO, +/-0.25pF
C275
0.1uF
*
16V, Y5V, +80%/-20%
C0402
1
U15A
74AHCT125PW
HSYNC_5
Ferrite bead im pedanc e: 47ohm@100MHz
CRT_R_1 CRT_R
CRT_B_1
50V, NPO, +/-0.25pF
C252
3.3pF
C0402
DUMMY
*
C253
3.3pF
C0402
DUMMY
50V, NPO, +/-0.25pF
R261 0
R0402 +/-5%
R260 0
R0402 +/-5%
*
VSYNC_5
L7
2 1
FB L0603 47 Ohm
L8
2 1
FB L0603 47 Ohm
L9
2 1
FB L0603 47 Ohm
JVGA_HS
JVGA_VS
*
50V, NPO, +/-0.25pF
C247
3.3pF
C0402
DUMMY
CRT_R
CRT_G
CRT_B
*
C248
3.3pF
C0402
DUMMY
50V, NPO, +/-0.25pF
5V_CRT_S0 5V_S0
F2
1 2
CH751H-40
D17
2 1
R220
3.3K
CRT_G
CLK_DDC1_5
CRT_B
*
C249
3.3pF
C0402
DUMMY
50V, NPO, +/-0.25pF
3D3V_S0
2 1
D20
BAV99
3
2 1
D19
BAV99
3
2 1
D18
BAV99
3
B_GMCH_DDCDATA 7
JVGA_VS
CRT_B
JVGA_HS
CRT_G
DAT_DDC1_5
CRT_R
50V, NPO, +/-5%
ATI_DDCDATA 14
ATI_DDCCLK 14
GMCH_DDCCLK 7
+/-5%
R0402
C452
*
100pF
C0402
50V, NPO, +/-5%
R208 0
R0402 +/-5% DUMMY
R207 0
R0402 +/-5%
R206 0
R0402 +/-5% DUMMY
R209 0
R0402 +/-5%
F1210_1.1A
R571
3.3K
+/-5%
R0402
*
C458
100pF
C0402
*
50V, NPO, +/-5%
C454
33pF
C0603
C453
*
33pF
C0603
50V, NPO, +/-5%
DDC_CLK & DATA level shift
R580
2.2K
+/-5%
R0402
R565
2.2K
+/-5%
R0402
DDCDATA
DDCCLK
*
3D3V_S0
G
2N7002
C236
10nF
16V, X7R, +/-10%
C0402
17
5
15
10
4
14
9
3
13
8
2
12
7
1
11
6
16
R562
2.2K
+/-5%
R0402
D S
Q42
G
2N7002
CN11
CRT-15P
Change VCC from
3.3V to 2.5V 10/27
03'
DAT_DDC1_5
CLK_DDC1_5
D S
Q41
5V @ ext. CRT side
TV OUT CONN
ATI_TV_LUMA 14
GMCH_TV_LUMA 7
ATI_TV_COPM 14
GMCH_TV_COM 7
ATI_TV_CRMA 14
GMCH_TV_CRMA 7
Place this 2 resistors
close to the TV-out
connector
R187 0
R0402 +/-5% DUMMY
R190 0
R0402 +/-5%
R199 0
R0402 +/-5% DUMMY
R201 0
R0402 +/-5%
R212 0
R0402 +/-5% DUMMY
R216 0
R0402 +/-5%
TV_LUMA
TV_COMP
TV_CRMA
TV_LUMA 43
TV_COMP 43
Layout Note:
Place this 2 resistors
close to the TV-out
connector
TV_CRMA 43
Title
Size Document Number Rev
<Doc>
A3
Date: Sheet
CRT/TV
W06N
SA
of
15 44 Saturday, February 19, 2005
FOXCONN ND2
Page 16
R568
0
R0805
+/-5%
C455
0.1uF
*
10V, X7R, +/-10%
C0402
C457
0.1uF
*
10V, X7R, +/-10%
C0402
C456
0.1uF
*
10V, X7R, +/-10%
C0402
C459
0.1uF
*
10V, X7R, +/-10%
C0402
2D5V_S0 2D5V_S0
R595
0
R0805
+/-5%
C463
10uF
*
6.3V, Y5V, +80%/-20%
C0805
CH7307_DVDD CH7307_AVDDPLL CH7307_TVDD CH7307_AVDD
C465
10uF
*
6.3V, Y5V, +80%/-20%
C0805
C462
0.1uF
*
10V, X7R, +/-10%
C0402
R594 0
C467
R0805+/-5%
0.1uF
*
C0402
C0402
C469
0.1uF
C0402
C468
0.1uF
*
*
3D3V_S0 3D3V_S0
R574 0
R0805+/-5%
10V, X5R, +/-10%
When use NV, and then dummy
C461
0.1uF
C0402
*
C460
0.1uF
10V, X5R, +/-10%
C0402
*
VENDOR SUGGEST
VENDOR SUGGEST
R245 0 R0402 +/-5%
TMDS_SCL
R247 0 R0402 +/-5%
VGA_CLK
VGA_CLK 14
TMDS_SDA
VGA_DAT
VGA_DAT 14
DUMMY
R244 0 R0402 +/-5%
R246 0 R0402 +/-5%
DUMMY
SDVOB_CTRLCLK 7
SDVOB_CTRLDATA 7
SDVOB_CLKN 7
SDVOB_CLKP 7
SDVOB_BN 7
SDVOB_BP 7
SDVOB_GN 7
SDVOB_GP 7
SDVOB_RN 7
SDVOB_RP 7
TMDSSCL
TMDSSDA
S
R249 0 R0402 +/-5%
3D3V_S0
R270
10K
+/-1%
R0402
DUMMY
G
1
R271
10K
+/-1%
R0402
DUMMY
G
1
S
R250 0 R0402 +/-5%
D
3 2
Q27
AO3400
DUMMY
VENDOR SUGGEST
R584
4.7K
+/-5%
R0402
DUMMY
F1
F1210_1.1A
Q28
AO3400
DUMMY
D
3 2
C255
100pF
50V, NPO, +/-5%
C0402
R581
4.7K
+/-5%
R0402
DUMMY
TMDS_SDA
TMDS_SCL
*
1 2
R115
8.2K
+/-5%
R0402
2D5V_S0
5V_S0 DVI_5V_S0 3D3V_S0
2 1
*
R579
2.2K
+/-5%
R0402
TMDS_HPD
D9
CH751H-40
R117
8.2K
+/-5%
R0402
DVI_SCL
DVI_SDA
C254
100pF
50V, NPO, +/-5%
C0402
R576
2.2K
+/-5%
R0402
CH7307_BSCAN
CH7307_VSWING
R585
R586
10K
1.21K
+/-1%
+/-1%
R0402
R0603
10V, X5R, +/-10%
10V, X5R, +/-10%
CH7307_AVDDPLL
CH7307_DVDD
CH7307_AVDD
36
SPC
SPD
SD_PROM
SC_PROM
SD_DCC
SC_DCC
SDVO_CLKSDVO_CLK+
SDVO_BSDVO_B+
SDVO_GSDVO_G+
SDVO_RSDVO_R+
HPDET
BSCAN
VSWING
TMDS_TX2-
TMDS_TX2+
DVI_SCL
DVI_SDA
TMDS_TX1TMDS_TX1+
GND
49
AVDD
GND
42
AVDD
AGND
45
U42
4
5
8
9
10
11
47
46
44
43
41
40
38
37
29
26
25
TMDS_TX2- 14
TMDS_TX2+ 14
TMDS_TX1- 14
TMDS_TX1+ 14
48
39
AVDD
AGND
28
AGND
31
1
2
3
4
5
6
7
8
9
10
11
12
C1
C2
C3
12
1
DVDD
DVDD
AGND_PLL
6
24
CN9
DATA2DATA2+
DATA2/4
DATA4DATA4+
DDC CLOCK
DDC DATA
AVSYNC
DATA1DATA1+
DATA1/3
DATA3C1
C2
C3
DVI-I-R
CH7307_TVDD
15
21
TVDD
TVDD
AVDD_PLL
RESET#
TDC0#
TDC1#
TDC2#
RESERVED
RESERVED
RESERVED
SDVO_INT+
SDVO_INT-
DGND
TGND
TGND
DGND
7
18
30
3
AS
2
13
TLC#
14
TLC
16
17
TDC0
19
20
TDC1
22
23
TDC2
27
34
35
32
33
CH7307B-DE
25
26
CLOCK-
25
CLOCK+
CLOCK
DATA5+
DATA5-
DATA0/5
DATA0+
DATA0-
HOT PLUG DETECT
+5V POWER
DATA3+
26
GND
R582
10K
+/-5%
R0402
C5
C4
CH7307_AS
CH_TMDS_TXCCH_TMDS_TXC+
CH_TMDS_TX0CH_TMDS_TX0+
CH_TMDS_TX1CH_TMDS_TX1+
CH_TMDS_TX2CH_TMDS_TX2+
24
23
22
21
20
19
18
17
16
15
14
13
C5
C4
TMDS_TXCTMDS_TXC+
GND GND
GND
TMDS_TX0+
TMDS_TX0-
GND
GND
10V, X5R, +/-10%
2D5V_S0
R578
10K
+/-5%
R0402
R577
100K
+/-5%
R0402
DUMMY
PCIRST1# 19 , 25,28,29,32
CH_TMDS_TXC- 14
CH_TMDS_TXC+ 14
CH_TMDS_TX0- 14
CH_TMDS_TX0+ 14
CH_TMDS_TX1- 14
CH_TMDS_TX1+ 14
CH_TMDS_TX2- 14
CH_TMDS_TX2+ 14
SDVOB_STALLP 7
SDVOB_STALLN 7
SDVOB_INTP 7
SDVOB_INTN 7
TMDS_TXC- 14
TMDS_TXC+ 14
TMDS_TX0+ 14
TMDS_TX0- 14
DVI_5V_S0
TMDS_HPD_1
R130
10K
R0402
+/-1%
B
3D3V_S0
R124
1K
R0402
+/-5%
Q13
MMBT3904
E C
R120
1K
R0402
+/-5%
TMDS_HPD
B
Q12
MMBT3904
E C
TMDS_HPD 14
FOXCONN ND2
Title
Size Document Number Rev
<Doc>
A3
Date: Sheet
DVI TRANSMITTER
W06N
SA
of
16 44 Saturday, February 19, 2005
Page 17
WLANONLED#
1 3
2
Q36
DTC144EUA
WLANONLED
4
3D3V_S0
3 5
U33
1
2
NC7SZ32
BRIGHTNESS_PWM 33
DCBATOUT
Layout 40 mil
C389
10uF
802.11_LINK 29
802.11_ACT 29
R495
100K
+/-5%
R0402
LBKLT_CRTL 7
R494
100K
+/-5%
R0402
DUMMY
PWM from Alviso
PWM from KBC
R490 0
R0402+/-5%DUMMY
R489 0
R0402+/-5%
C386
1nF
*
C0402
50V, X7R, +/-10%
25V, Y5V, +80%/-20%
BRIGHTNESS_PWM_1
C1210
EC_BLON
*
INV-CON6-LF
C394
1nF
50V, X7R, +/-10%
C0402
DUMMY
CN1
7
1
7
1
2
2
3
3
4
4
5
5
6
6
8
8
*
C393
*
0.1uF
25V, X7R, +/-10%
C0603
+/-5%
R481
330
+/-5%
R0603
1 2
D35
LED-BLUE-0603
WLANONLED#
C0603
R482
330
+/-5%
R0603
1 2
D36
LED-YG-0603
PWR_LED#
BTONLED#
R497 0
R0402 +/-5% DUMMY
GMCH_LCDVDD_ON 7
R496
1K R 0402
R480
330
+/-5%
R0603
1 2
D34
LED-ORANGE-0603
STBY_LED#
3D3V_S0
R493 100K R0402 +/-5%
LCDVDD_ON_1
BC97
1uF
*
BC100
0.1uF
*
C0402
16V, Y5V, +80%/-20%
10V, Y5V, +80%/-20%
3D3V_S5 3D3V_S0 3D3V_S0 3D3V_S5 3D3V_S0 3D3V_S0 3D3V_S5 3D3V_S0
R475
330
+/-5%
R0603
1 2
D29
LED-ORANGE-0603
MEDIA_LED#
C1 5.6nF
SI3865_R1C1
C0603 50V, X7R, +/-10%
*
U34
Si3865DV
1
R2
2
D2
3
D2
6
5
4
R1/C1
ON/OFF
S2
R476
330
+/-5%
R0603
1 2
SI3865_R2
R498
47K
R0402
+/-5%
D30
LED-YG-0603
CHG_LED#
LCDVDD_S0
*
1uF
C0603
R477
330
+/-5%
R0603
1 2
D31
LED-ORANGE-0603
Layout 40 mil
BC99
3D3V_S0
10V, Y5V, +80%/-20%
R478
330
+/-5%
R0603
1 2
D32
LED-YG-0603
CAPS#
25V, Y5V, +80%/-20%
MEDIA_LED#
C342
1nF
*
C0402
R479
330
+/-5%
R0603
EC_BLON 33
BTONLED# 24
NUM# 33
TXACLK+
TXACLKTXAOUT2+
TXAOUT2TXAOUT1+
TXAOUT1TXAOUT0+
TXAOUT0TXBOUT0+
TXBOUT0TXBOUT1+
TXBOUT1TXBOUT2+
TXBOUT2TXBCLK+
TXBCLK-
CAPS# 33
CHG_LED# 33
STBY_LED# 33
PWR_LED# 33,43
LCDVDD_S0
C391
*
10uF
*
C0805
6.3V, X5R, +/-10%
TXACLK+ 14
TXACLK- 14
TXAOUT2+ 14
TXAOUT2- 14
TXAOUT1+ 14
TXAOUT1- 14
TXAOUT0+ 14
TXAOUT0- 14
TXBOUT0+ 14 ATI_LCDVDD_ON 14
TXBOUT0- 14
TXBOUT1+ 14
TXBOUT1- 14
TXBOUT2+ 14
TXBOUT2- 14
TXBCLK+ 14
TXBCLK- 14
BRIGHTNESS_PWM_1
PWR_LED#
C238
1nF
*
C0402
50V, X7R, +/-10%
C0402
C390
C392
0.1uF
0.1uF
*
C0402
16V, Y5V, +80%/-20%
16V, Y5V, +80%/-20%
C243
1nF
*
C0402
C242
1nF
*
C0402
50V, X7R, +/-10%
Title
Size Document Number Rev
A3
Date: Sheet of
1 2
D33
LED-YG-0603
LED / INVERTER
NUM#
LCD1
MH1
1
3
5
7
9
LDDC_CLK 7,14
LDDC_DATA 7,14
C385
0.1uF
*
C0603
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
MH2
LVDS-CONN40P
50V, X7R, +/-10%
AC
50V, X7R, +/-10%
<Doc>
MEDIA_LED# 23
PWM
C250
1nF
*
C0402
C387
1nF
*
C0402
50V, X7R, +/-10%
C259
1nF
1nF
*
C0402
50V, X7R, +/-10%
50V, X7R, +/-10%
LCD CONN
TOP VIEW
39
LCD CONN
40
FOXCONN ND2
LVDS / Inverter
W06N
1
2
17 44 Saturday, February 19, 2005
*
C0402
C281
C388
1nF
*
C0402
50V, X7R, +/-10%
50V, X7R, +/-10%
SA
Page 18
3D3V_AUX_S5
D2
CH751H-40
2 1
RTC circuitry
D1
BAT_D
R28 1K
BAT
12345
RTC1
HS8203E
3D3V_S0
2 1
CH751H-40
+/-5%
R0402
RTC_AUX_S5
R641
330K
R0402
+/-5%
0
+/-5%
R0402
DUMMY
Use internal 1D05V for default
R625
10K
+/-5%
R0402
SATALED#
SATA
GND5
GND3
B+
B-
GND2
A-
A+
GND1
GND4
CON1
R27
100K
+/-5%
R0402
INTVRMEN
9
7
6
5
4
3
2
1
8
RTC_AUX_S5
C79
1uF
*
10V, X5R, +/-10%
C0603
R650 20K R0402 +/-5%
R640 1M
RTC_SENSE# 33
3D3V_S0
SATA0TXP
SATA0TXN
SATA0RXN
SATA0RXP
R0402 +/-5%
50V, NPO, +/-0.25pF
C544
1 2
1uF
*
C0402
10V, Y5V, +80%/-20%
ACZ_BITCLK 30
ACZ_SYNC 24,32
ACZ_RST# 24,32
ACZ_SDATAOUT 24,32
SATA0RXN
SATA0RXP
SATA0TXN
SATA0TXP
SATA_CLKN 3
SATA_CLKP 3
C330
*
4.7pF
C0402
*
C331
4.7pF
C0402
50V, NPO, +/-0.25pF
R0402
R649 39 R0402 +/-5%R644
C315 10nFC0402
C319 10nFC0402
C312 10nFC0402
C310 10nFC0402
C307 10nFC0402 DUMMY
1
TP95
TP148
TP92
TP96
Place within 500 mils
of ICH7 ball
C524 10nFC0402 DUMMY
1
C311 10nFC0402 DUMMY
1
C309 10nFC0402 DUMMY
1
R373
24.9
+/-1%
R0402
2 3
R409 0
R643 39
R0402 +/-5%
R645 39
R0402 +/-5%
*
*
*
*
*
*
*
*
4 1
X4
XTAL-32.768kHz
R648 10K
R0402 +/-5%
+/-5%
ACZ_SDATAIN0 30,32
ACZ_SDATAIN1 24
TP101
TP147
IDE_IOR# 23
IDE_IOW# 23
IDE_DACK# 23
IDE_IRQ14 23
IDE_IORDY 23
IDE_DREQ 23
R408
10M
+/-5%
R0603
X1_RCT
X2_RCT
RCT_RST#
INTRUDER#
INTVRMEN
DUMMY
ACZ_SYNC_R
ACZ_RST#_R
1
ACZ_SDATAOUT_R
SATALED#
1
SATA_RBIAS_PN
U20A
AB1
RTXC1
AB2
RTCX2
AA3
RTCRST#
Y5
INTRUDER#
W4
INTVRMEN
W1
EE_CS
Y1
EE_SHCLK
Y2
EE_DOUT
W3
EE_DIN
V3
LAN_CLK
U3
LAN_RSTSYNC
U5
LAN_RXD0
V4
LAN_RXD1
T5
LAN_RXD2
U7
LAN_TXD0
V6
LAN_TXD1
V7
LAN_TXD2
U1
ACZ_BIT_CLK
R6
ACZ_SYNC
R5
ACZ_RST#
T2
ACZ_SDIN0
T3
ACZ_SDIN1
T1
ACZ_SDIN2
T4
ACZ_SDOUT
AF18
SATALED#
AF3
SATA0RXN
AE3
SATA0RXP
AG2
SATA0TXN
AH2
SATA0TXP
AF7
SATA2RXN
AE7
SATA2RXP
AG6
SATA2TXN
AH6
SATA2TXP
AF1
SATA_CLKN
AE1
SATA_CLKP
AH10
SATARBIASN
AG10
SATARBIASP
AF15
DIOR#
AH15
DIOW#
AF16
DDACK#
AH16
IDEIRQ
AG16
IORDY
AE15
DDREQ
ICH7M REV 1.02 EDS
RTC LAN
AC-97/AZALIA
SATA
IDE
LPC CPU
GPIO49/CPUPWRGD
LAD0
LAD1
LAD2
LAD3
LDRQ0#
LDRQ1#/GPIO23
LFRAME#
A20GATE
A20M#
CPUSLP#
TP1/DPRSTP#
TP2/DPSLP#
FERR#
IGNNE#
INIT3_3V#
INIT#
INTR
RCIN#
NMI
SMI#
STPCLK#
THERMTRIP#
DD0
DD1
DD2
DD3
DD4
DD5
DD6
DD7
DD8
DD9
DD10
DD11
DD12
DD13
DD14
DD15
DA0
DA1
DA2
DCS1#
DCS3#
H_DPSLP#
B_LPC_LAD0
AA6
B_LPC_LAD1
AB5
B_LPC_LAD2
AC4
B_LPC_LAD3
Y6
AC3
AA5
AB3
AE22
AH28
R291 0 R0402 +/-5%
AG27
DUMMY
AF24
AH25
H_FERR_R
AG26
AG24
AG22
AG21
AF22
AF25
AG23
AH24
AF23
AH22
H_THERMTRIP_R
AF26
AB15
AE14
AG13
AF13
AD14
AC13
AD12
AC12
AE12
AF12
AB13
AC14
AF14
AH13
AH14
AC15
AH17
AE17
AF17
AE16
AD16
1D05V_S0
NO_STUFF
R317
56
+/-5%
R0402
DUMMY
B_LPC_LAD0 32,33,35,36
B_LPC_LAD1 32,33,35,36
B_LPC_LAD2 32,33,35,36
B_LPC_LAD3 32,33,35,36
LPC_LDRQ0# 35,36
LPC_LDRQ1# 32
B_LPC_LFRAME# 32,33,35,36
H_A20GATE_1
H_A20M# 4
R323 0
H_DPSLP# 4
H_PWRGD 4
H_IGNNE# 4
FWH_INIT# 36
H_INIT# 4
H_INTR 4
H_RCIN#_1
H_NMI 4
H_SMI# 4
H_STPCLK# 4
IDE_D0 23
IDE_D1 23
IDE_D2 23
IDE_D3 23
IDE_D4 23
IDE_D5 23
IDE_D6 23
IDE_D7 23
IDE_D8 23
IDE_D9 23
IDE_D10 23
IDE_D11 23
IDE_D12 23
IDE_D13 23
IDE_D14 23
IDE_D15 23
IDE_A0 23
IDE_A1 23
IDE_A2 23
IDE_CS#0 23
IDE_CS#1 23
R0402 +/-5%
R309 56
R0402 +/-5%
H_CPUSLP# 4,6
3D3V_S0
R333
10K
+/-5%
R0402
R303
24.9
+/-1%
R0402
3D3V_S0
H_DPRSLP# 4
D26
1N4148W
R346
10K
+/-5%
R0402
2 1
D28
2 1
1N4148W
H_RCIN# 33
H_A20GATE 33
1D05V_S0
R297
56
+/-1%
R0402
1D05V_S0
R306
56
+/-5%
R0402
PM_THRMTRIP-I# 4
H_FERR# 4
Title
Size Document Number Rev
<Doc>
A3
Date: Sheet of
ICH7-M (1 of 4)
W06N
18 44 Saturday, February 19, 2005
SA
FOXCONN ND2
Page 19
B_PCI_AD[31..0] 25,28,29
R651100 R0402 +/-5%
R646100 R0402 +/-5%
R632100 R0402 +/-5%
B_PCI_FRAME#
B_PCI_IRDY#
B_PCI_TRDY#
B_PCI_STOP#
3D3V_S0
B_PCI_SERR#
INT_PIRQH#
B_PCI_PERR#
PCI_LOCK#
3D3V_S0
PCI_REQ#0
PCI_REQ#5
3D3V_S0
BOOT_BLOCK#
PSW_CLR#
Boot block
(GPI40)
Password clear
(GPIO28)
INT_PIRQA#
INT_PIRQB#
INT_PIRQC#
INT_PIRQD#
RP3 10K
1
2
3
4
5
RP2 10K
1
2
3
4
5
RP4 10K
1
2
3
4
5
SW1
1
2
3
4
SW-DIP-4
Low Active
1 - 5 ON
2 - 6 ON RTC_RST#
4 - 8 ON
B_PCI_AD0
B_PCI_AD1
B_PCI_AD2
B_PCI_AD3
B_PCI_AD4
B_PCI_AD5
B_PCI_AD6
B_PCI_AD7
B_PCI_AD8
B_PCI_AD9
B_PCI_AD10
B_PCI_AD11
B_PCI_AD12
B_PCI_AD13
B_PCI_AD14
B_PCI_AD15
B_PCI_AD16
B_PCI_AD17
B_PCI_AD18
B_PCI_AD19
B_PCI_AD20
B_PCI_AD21
B_PCI_AD22
B_PCI_AD23
B_PCI_AD24
B_PCI_AD25
B_PCI_AD26
B_PCI_AD27
B_PCI_AD28
B_PCI_AD29
B_PCI_AD30
B_PCI_AD31
TP98
TP97
ON
5
6
7
8
E18
C18
A16
F18
E16
A18
E17
A17
A15
C14
E14
D14
B12
C13
G15
G13
E12
C11
D11
A11
A10
F11
F10
E9
D9
B9
A8
A6
C7
B6
E6
D6
A3
B4
C5
B5
AE5
AD5
1
AG4
1
AH4
AD9
10
INT_PIRQD#
9
INT_PIRQE#
8
INT_PIRQF#
7
INT_PIRQG#
6
10P8R0603+/-5%
10
B_PCI_DEVSEL#
9
PCI_REQ#3
8
PCI_REQ#2
7
6
10P8R0603+/-5%
10
INT_PIRQB#
9
INT_PIRQC#
8
INT_PIRQA#
7
INT_SERIRQ
6
10P8R0603+/-5%
U20B
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31
Interrupt I/F
PIRQA#
PIRQB#
PIRQC#
PIRQD#
RSVD[1]
RSVD[2]
RSVD[3]
RSVD[4]
RSVD[5]
ICH7M REV 1.02 EDS
3D3V_S0
3D3V_S0
3D3V_S0
*
PCI
MISC
REQ0#
GNT0#
REQ1#
GNT1#
REQ2#
GNT2#
REQ3#
GNT3#
REQ4#/GPIO22
GNT4#/GPIO48
GPIO1/REQ5#
GPIO17/GNT5#
C/BE0#
C/BE1#
C/BE2#
C/BE3#
IRDY#
PAR
PCIRST#
DEVSEL#
PERR#
PLOCK#
SERR#
STOP#
TRDY#
FRAME#
PLTRST#
PCICLK
PME#
GPIO2/PIRQE#
GPIO3/PIRQF#
GPIO4/PIRQG#
GPIO5/PIRQH#
RSVD[6]
RSVD[7]
RSVD[8]
RSVD[9]
MCH_SYNC#
ICH7 Pullups
PM_RI#
SMB_ALERT#
SMB_LINK_ALERT#
SMLINK0
SMLINK1
PCIE_WAKE#
PM_BATLOW#_R
DBRESET#
PSW_CLR#
GPIO9
GPIO10
R404
33
R0402
+/-5%
DUMMY
C329
33pF
C0603
50V, NPO, +/-5%
DUMMY
3D3V_S5
R610
10K
R0402
+/-5%
R608
0
R0402
+/-5%
DUMMY
H :GM L:PM
GM/PM
R407
33
R0402
+/-5%
DUMMY
C333
*
33pF
C0603
50V, NPO, +/-5%
DUMMY
PCI_REQ#0
D7
E7
PCI_REQ#1
C16
D16
PCI_REQ#2
C17
D17
PCI_REQ#3
E13
F13
PCI_REQ#4
A13
PCI_GNT#4
A14
PCI_REQ#5
C8
PCI_GNT#5
D8
B15
C12
D12
C15
A7
E10
R355 47 R0402 +/-5%
B18
A12
C9
PCI_LOCK#
E11
B10
F15
F14
F16
R602 47 R 0402+/-5%
C26
A9
B_ICH_PME#_1
B19
Int. PH
INT_PIRQE#
G8
INT_PIRQF#
F7
INT_PIRQG#
F8
INT_PIRQH#
G7
AE9
TP94
1
AG8
TP93
1
AH8
TP142
1
F21
AH20
R301 10K
R0402 +/-5%
R329 10K
R0402 +/-5%
R307 10K
R0402 +/-5%
R314 10K
R0402 +/-5%
R319 10K
R0402 +/-5%
R621 1K
R0402 +/-5%
R612 8.2K
R0402 +/-5%
R340 10K
R0402 +/-5%
CLK_ICH14 CLK48_ICH
PLANARID0
PLANARID1
PLANARID2
PCI_REQ#0 25
PCI_GNT#0 25
PCI_REQ#1 29
PCI_GNT#1 29
PCI_REQ#2 28
PCI_GNT#2 28
PCI_REQ#3 25
PCI_GNT#3 25
1
1
B_PCI_C/BE#0 25,28,29
B_PCI_C/BE#1 25,28,29
B_PCI_C/BE#2 25,28,29
B_PCI_C/BE#3 25,28,29
B_PC I_IRDY# 25,28,29
B_PCI_DEVSEL# 25,28,29
B_PCI_PERR# 25,28,29
B_PCI_SERR# 25,28,29
B_PCI_STOP# 25,28,29
B_PCI_ T RD Y# 25,28,29
B_PCI_FRAME# 25,28,29
D27
1N4148W
INT_PIRQE# 25
INT_PIRQF# 28
INT_PIRQG# 29
R638100 R0402 +/-5%
MCH_SYNC# 7
3D3V_S5
R603 10K
R0402 +/-5%
R617 10K
R0402 +/-5%
R351 10K
R0402 +/-5%
3D3V_S0
R619
10K
+/-5%
R0402
DUMMY
R618
10K
+/-5%
R0402
CLK_ICHPCI
*
TP90
TP89
B_PCI_PAR 25,28,29
PCIRST1# 16, 2 5,28,29,32
PLT_RST1# 7,14,21,23,33,35,36
CLK_ICHPCI 3
2 1
B_ICH_PME# 25,28,33
B_PM_CLKRUN#
R353
10K
+/-5%
R0402
DUMMY
PCIE_RXN0 23
PCIE_RXP0 23
PCIE_TXN0 23
PCIE_TXP0 23
need to be within 250 mils of the driver.
BOOT_BLOCK#
BT_PWR_ON#
THRM#
PCI_REQ#4
B_PM_CLKRUN#
PCI_REQ#1
R629
10K
+/-5%
R0402
DUMMY
R628
10K
+/-5%
R0402
R647 10K
R0402 +/-5%
R344 10K
R0402 +/-5%
R620 10K
R0402 +/-5%
R367 10K
R0402 +/-5%
R354 10K
R0402 +/-5%
R356 10K
R0402 +/-5%
R622
10K
+/-5%
R0402
DUMMY
R624
10K
+/-5%
R0402
B_SMB_CLK 21
B_SMB_DATA 21
R372
33
R0402
+/-5%
DUMMY
C301
33pF
C0603
50V, NPO, +/-5%
DUMMY
NEWCARD_RST#0_R 23
BT_PWR_ON# 24
C040216V, Y5V, +80%/-20%
3D3V_S0
Planar
ID(2,1,0)
SA: 0,0,0
SB: 0,0,1
SC: 0,1,0
SD: 0,1,1
ICH_SPKR 30
PM_SUS_STAT# 33
SMC_RUNTIME_SCI# 33
*
*
C040216V, Y5V, +80%/-20%
C2710 .1uF
SMB_LINK_ALERT#
PM_BMBUSY# 7
PM_STPPCI# 3
PM_STPCPU# 3
B_PM_CLKRUN# 25,28,29,32,33,35
BOOT_BLOCK#
PCIE_WAKE# 23
INT_SERIRQ 25,29,32,33,35,36
THRM# 22
SC452_VROK 38
SMC_EXTSMI#_R 33
C2700.1uF
TP136
TP139
TP123
TP132
TP135
TP138
TP120
TP131
TP129
TP140
TP119
TP130
TP128
TP134
TP122
TP125
TP133
TP137
TP121
TP127
TP100
TP149
TP157
TP151
TP155
SMLINK0
SMLINK1
PM_RI#
DBRESET#
SMB_ALERT#
GM/PM
PSW_CLR#
PLANARID2
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
USB_OC#0
USB_OC#1
USB_OC#2
USB_OC#3
USB_OC#4
USB_OC#5
USB_OC#6
USB_OC#7
U20C
C22
SMBCLK
B22
SMBDATA
A26
LINKALERT#
B25
SMLINK0
A25
SMLINK1
A28
RI#
A19
SPKR
A27
SUS_STAT#
A22
SYS_RST#
AB18
GPIO0/BM_BUSY#
B23
GPIO11/SMBALERT#
AC20
GPIO18/STPPCI#
AF21
GPIO20/STPCPU#
A21
GPIO26
B21
GPIO27
E23
GPIO28
AG18
GPIO32/CLKRUN#
AC19
GPIO33/AZ_DOCK_EN#
U2
GPIO34/AZ_DOCK_RST#
F20
WAKE#
AH21
SERIRQ
AF20
THRM#
AD22
VRMPWRGD
AC21
GPIO6
AC18
GPIO7
E21
GPIO8
ICH7M REV 1.02 EDS
U20D
F26
PERn1
F25
PERp1
E28
PETn1
E27
PETp1
H26
PERn2
H25
PERp2
G28
PETn2
G27
PETp2
K26
PERn3
K25
PERp3
J28
PETn3
J27
PETp3
M26
PERn4
M25
PERp4
L28
PETn4
L27
PETp4
P26
PERn5
P25
PERp5
N28
PETn5
N27
PETp5
T25
PERn6
T24
PERp6
R28
PETn6
R27
PETp6
R2
SPI_CLK
P6
SPI_CS#
P1
SPI_ARB
P5
SPI_MOSI
P2
SPI_MISO
D3
OC0#
C4
OC1#
D5
OC2#
D4
OC3#
E5
OC4#
C3
OC5#/GPIO29
A2
OC6#/GPIO30
B3
OC7#/GPIO31
ICH7M REV 1.02 EDS
3D3V_S5
GPIO
SATA
SMB
Clocks
GPIO16/DPRSLPVR
SYS
GPIO
Power MGT
GPIO
Layout Note:
PCIE AC coupling caps
need to be within 250 mils of the driver.
V26
DMI0RXN
V25
DMI0RXP
U28
DMI0TXN
U27
DMI0TXP
Y26
DMI1RXN
Y25
DMI1RXP
W28
DMI1TXN
W27
DMI1TXP
AB26
DMI2RXN
AB25
DMI2RXP
AA28
DMI2TXN
AA27
DMI2TXP
AD25
DMI3RXN
AD24
DMI3RXP
AC28
DMI3TXN
AC27
DMI3TXP
USB_OC#0
USB_OC#1
USB_OC#2
USB_OC#3
PCI-Express
Direct Media Interface
DMI_ZCOMP
DMI_IRCOMP
SPI
USB
USBRBIAS#
Place within 500 mils of ICH
RP5 10K
1
2
3
4
5
DMI_CLKN
DMI_CLKP
USBP0N
USBP0P
USBP1N
USBP1P
USBP2N
USBP2P
USBP3N
USBP3P
USBP4N
USBP4P
USBP5N
USBP5P
USBP6N
USBP6P
USBP7N
USBP7P
USBRBIAS
10
9
8
7
6
10P8R0603+/-5%
AE28
AE27
C25
D25
F1
F2
G4
G3
H1
H2
J4
J3
K1
K2
L4
L5
M1
M2
N4
N3
D2
D1
USB_OC#7
USB_OC#6
USB_OC#5
USB_OC#4
GPIO21/SATA0GP
GPIO19/SATA1GP
GPIO36/SATA2GP
GPIO37/SATA3GP
CLK14
CLK48
SUSCLK
SLP_S3#
SLP_S4#
SLP_S5#
PWROK
TP0/BATLOW#
PWRBTN#
LAN_RST#
RSMRST#
GPIO9
GPIO10
GPIO12
GPIO13
GPIO14
GPIO15
GPIO24
GPIO25
GPIO35
GPIO38
GPIO39
B_USB_PN5 23
B_USB_PP5 23
B_USB_PN0 43
B_USB_PP0 43
B_USB_PN7 24
B_USB_PP7 24
B_USB_PN2 43
B_USB_PP2 43
B_USB_PN4 43
B_USB_PP4 43
B_USB_PN6 43
B_USB_PP6 43
USB_RBIAS_PN
3D3V_S5
SATA0GP
AF19
AH18
AH19
AE19
AC1
B2
C20
B24
D23
F22
AA4
AC22
C21
C23
C19
PM_RSMRST#
Y4
E20
A20
F19
E19
R4
E22
R3
D20
AD21
AD20
AE20
DMI_RXN0 7
DMI_RXP0 7
DMI_TXN0 7
DMI_TXP0 7
DMI_RXN1 7
DMI_RXP1 7
DMI_TXN1 7
DMI_TXP1 7
DMI_RXN2 7
DMI_RXP2 7
DMI_TXN2 7
DMI_TXP2 7
DMI_RXN3 7
DMI_RXP3 7
DMI_TXN3 7
DMI_TXP3 7
CLK_PCIE_ICH# 3
CLK_PCIE_ICH 3
DMI_IRCOMP_R
Place within 500 mils of ICH
1
1
1
1
R406 22.6
1
SATA1GP
1
SATA2GP
1
SATA3GP
1
1
TP141
PWROK
PM_DPRSLPVR_R
PM_BATLOW#_R
PWRBTN#_ICH-1
LAN_RST#
GPIO9
TP143
1
GPIO10
TP82
1
BT_WAKEUP 24
SMC_WAKE_SCI#_R 33
TP154
1
TP144
1
PLANARID0
PLANARID1
PM_RSMRST#
10V, Y5V, +80%/-20%
T=22ms
1D5V_S0
R601
24.9
+/-1%
R0402
TP150
TP153
TP152
TP156
R0402+/-1%
Title
Size Document Number Rev
A3
Date: Sheet of
TP145
TP84
TP83
TP146
CLK_ICH14 3
CLK48_ICH 3
PM_SUS_CLK 21
PM_SLP_S3#_ICH 33
PM_SLP_S4#_ICH 33
R613
R642
100K
10K
+/-5%
+/-5%
R0402
R0402
DUMMY
GID0 14
GID1 14
BT_DETACH 24
D47
BAT54CPT
1 2
C542
4.7uF
*
C0805
R0402
<Doc>
SATA0GP
R631 10K R0402 +/-5%
SATA1GP
R358 10K R0402 +/-5%
SATA2GP
R357 10K R0402 +/-5%
SATA3GP
R630 10K R0402 +/-5%
3D3V_S5
R605
10K
+/-5%
R0402
DUMMY
R342 100
R0402 +/-5%
D24
FDLL4148
R338
R623
100K
0
+/-5%
R0603
R0402
+/-5%
Intel #67725
3D3V_S5
3
R653
4.7K
+/-5%
R0402
R654
100K
+/-5%
2N7002
DUMMY
3D3V_S0
Q34
D48
1N4148W
D S
R352 1K
R0402 +/-5%
DUMMY
R366 1K
R0402 +/-5%
DUMMY
R635 1K
R0402 +/-5%
DUMMY
G
PCI_GNT#4
PCI_GNT#5
FOXCONN ND2
ICH7-M (2 of 4)
W06N
PWROK 7,22
PM_DPRSLPVR 38
2 1
PWRBTN#_ICH 33
PLT_RST1#
BT_WAKEUP
R627
100K
+/-5%
R0402
2 1
PURE_HW_SHUTDOWN# 22
HW_SHUT 22
ICH_SPKR
Layout Note:
PCIE AC coupling caps
19 44 Saturday, February 19, 2005
3D3V_S0
SA
Page 20
Layout Note:
Place above caps within
100 mils of ICH near F27, P27, AB27
220uF
2.5V, +/-20%
R288 0
*
16V, X7R, +/-10%
16V, X7R, +/-10%
1D5V_PCIE_ICH
TC17
*
CTX
1D5V_GPLL_ICH_S0
R0603+/-5%
*
6.3V, X5R, +/-10%
Place within 100
mils of ICH
pin AE1
C531
0.1uF
C0603
16V, X7R, +/-10%
1D5V_S0
C489
*
0.1uF
C0603
16V, X7R, +/-10%
3D3V_S5
C540
1D5V_S0
0.1uF
*
C0603
C518
0.1uF
C0603
C266
0.1uF
C0603
16V, X7R, +/-10%
C263
10uF
C0805
1D5V_S0
*
*
*
3D3V_S0
C473
0.1uF
C0603
16V, X7R, +/-10%
*
C269
0.1uF
C0603
16V, X7R, +/-10%
16V, X7R, +/-10%
16V, X7R, +/-10%
16V, X7R, +/-10%
*
C527
0.1uF
C0603
C537
0.1uF
C0603
C264
0.1uF
*
C0603
*
*
1D05V_S0
1D5V_S0
R278
0
R0805
+/-5%
1D5V_S0
Place within 100
mils of ICH
1D5V_S0
C517
0.1uF
C0603
Place within 100
near E26, E27
3D3V_S0
C507
*
0.1uF
C0603
16V, X7R, +/-10%
Place within 100
mils of ICH
near pin AG9
16V, X7R, +/-10%
V5REF_S0
V5REF_S5
C268
0.1uF
*
C0603
16V, X7R, +/-10%
C488
*
0.1uF
C0603
16V, X7R, +/-10%
C509
*
0.1uF
C0603
16V, X7R, +/-10%
C538
0.1uF
*
16V, X7R, +/-10%
C0603
Place within 100
mils of ICH
pin G10
U20F
G10
V5REF[1]
AD17
V5REF[2]
F6
V5REF_Sus
AA22
Vcc1_5_B[1]
AA23
Vcc1_5_B[2]
AB22
Vcc1_5_B[3]
AB23
Vcc1_5_B[4]
AC23
Vcc1_5_B[5]
AC24
Vcc1_5_B[6]
AC25
Vcc1_5_B[7]
AC26
Vcc1_5_B[8]
AD26
Vcc1_5_B[9]
AD27
Vcc1_5_B[10]
AD28
Vcc1_5_B[11]
D26
Vcc1_5_B[12]
D27
Vcc1_5_B[13]
D28
Vcc1_5_B[14]
E24
Vcc1_5_B[15]
E25
Vcc1_5_B[16]
E26
Vcc1_5_B[17]
F23
Vcc1_5_B[18]
F24
Vcc1_5_B[19]
G22
Vcc1_5_B[20]
G23
Vcc1_5_B[21]
H22
Vcc1_5_B[22]
H23
Vcc1_5_B[23]
J22
Vcc1_5_B[24]
J23
Vcc1_5_B[25]
K22
Vcc1_5_B[26]
K23
Vcc1_5_B[27]
L22
Vcc1_5_B[28]
L23
Vcc1_5_B[29]
M22
Vcc1_5_B[30]
M23
Vcc1_5_B[31]
N22
Vcc1_5_B[32]
N23
Vcc1_5_B[33]
P22
Vcc1_5_B[34]
P23
Vcc1_5_B[35]
R22
Vcc1_5_B[36]
R23
Vcc1_5_B[37]
R24
Vcc1_5_B[38]
R25
Vcc1_5_B[39]
R26
Vcc1_5_B[40]
T22
Vcc1_5_B[41]
T23
Vcc1_5_B[42]
T26
Vcc1_5_B[43]
T27
Vcc1_5_B[44]
T28
Vcc1_5_B[45]
U22
Vcc1_5_B[46]
U23
Vcc1_5_B[47]
V22
Vcc1_5_B[48]
V23
Vcc1_5_B[49]
W22
Vcc1_5_B[50]
W23
Vcc1_5_B[51]
Y22
Vcc1_5_B[52]
Y23
Vcc1_5_B[53]
B27
Vcc3_3[1]
AG28
VccDMIPLL
AB7
Vcc1_5_A[1]
AC6
Vcc1_5_A[2]
AC7
Vcc1_5_A[3]
AD6
Vcc1_5_A[4]
AE6
Vcc1_5_A[5]
AF5
Vcc1_5_A[6]
AF6
Vcc1_5_A[7]
AG5
Vcc1_5_A[8]
AH5
Vcc1_5_A[9]
AD2
VccSATAPLL
AH11
Vcc3_3[2]
AB10
Vcc1_5_A[10]
AB9
Vcc1_5_A[11]
AC10
Vcc1_5_A[12]
AD10
Vcc1_5_A[13]
AE10
Vcc1_5_A[14]
AF10
Vcc1_5_A[15]
AF9
Vcc1_5_A[16]
AG9
Vcc1_5_A[17]
AH9
Vcc1_5_A[18]
E3
VccSus3_3[19]
C1
VccUSBPLL
AA2
VccSus1_05/VccLAN1_05[1]
Y7
VccSus1_05/VccLAN1_05[2]
ICH7M REV 1.02 EDS
Vcc1_05[1]
Vcc1_05[2]
Vcc1_05[3]
Vcc1_05[4]
Vcc1_05[5]
Vcc1_05[6]
Vcc1_05[7]
Vcc1_05[8]
Vcc1_05[9]
CORE
Vcc1_05[10]
Vcc1_05[11]
Vcc1_05[12]
Vcc1_05[13]
Vcc1_05[14]
Vcc1_05[15]
Vcc1_05[16]
Vcc1_05[17]
Vcc1_05[18]
Vcc1_05[19]
Vcc1_05[20]
VCC PAUX
VccSus3_3/VccLAN3_3[1]
VccSus3_3/VccLAN3_3[2]
VccSus3_3/VccLAN3_3[3]
VccSus3_3/VccLAN3_3[4]
Vcc3_3/VccHDA
VccSus3_3/VccSusHDA
V_CPU_IO[1]
V_CPU_IO[2]
VCCA3GP
V_CPU_IO[3]
Vcc3_3[3]
Vcc3_3[4]
Vcc3_3[5]
Vcc3_3[6]
Vcc3_3[7]
IDE
Vcc3_3[8]
Vcc3_3[9]
Vcc3_3[10]
Vcc3_3[11]
Vcc3_3[12]
Vcc3_3[13]
Vcc3_3[14]
Vcc3_3[15]
Vcc3_3[16]
PCI
Vcc3_3[17]
Vcc3_3[18]
Vcc3_3[19]
Vcc3_3[20]
Vcc3_3[21]
VccRTC
VccSus3_3[1]
VccSus3_3[2]
VccSus3_3[3]
VccSus3_3[4]
VccSus3_3[5]
VccSus3_3[6]
VccSus3_3[7]
VccSus3_3[8]
VccSus3_3[9]
VccSus3_3[10]
VccSus3_3[11]
VccSus3_3[12]
USB
VccSus3_3[13]
VccSus3_3[14]
VccSus3_3[15]
VccSus3_3[16]
VccSus3_3[17]
VccSus3_3[18]
Vcc1_5_A[19]
Vcc1_5_A[20]
Vcc1_5_A[21]
ATX ARX
Vcc1_5_A[22]
Vcc1_5_A[23]
Vcc1_5_A[24]
Vcc1_5_A[25]
VccSus1_05[1]
VccSus1_05[2]
VccSus1_05[3]
Vcc1_5_A[26]
Vcc1_5_A[27]
Vcc1_5_A[28]
Vcc1_5_A[29]
Vcc1_5_A[30]
USB CORE
L11
L12
L14
L16
L17
L18
M11
M18
P11
P18
T11
T18
U11
U18
V11
V12
V14
V16
V17
V18
V5
V1
W2
W7
U6
R7
AE23
AE26
AH26
AA7
AB12
AB20
AC16
AD13
AD18
AG12
AG15
AG19
A5
B13
B16
B7
C10
D15
F9
G11
G12
G16
W5
P7
A24
C24
D19
D22
G19
K3
K4
K5
K6
L1
L2
L3
L6
L7
M6
M7
N7
AB17
AC17
T7
F17
G17
AB8
AC8
K7
C28
G20
A1
H6
H7
J6
J7
C492
0.1uF
*
C0603
C498
0.1uF
C0603
C519
0.1uF
C0603
C534
0.1uF
C0603
3D3V_S5
16V, X7R, +/-10%
*
*
*
16V, X7R, +/-10%
16V, X7R, +/-10%
S0HDA
S5HDA
Place within 100
mils of ICH pin
AG13, AG16
16V, X7R, +/-10%
Layout Note:
Distribute in PCI section
near pin A2-A6 near
D1-H1
16V, X7R, +/-10%
*
3D3V_S5
C474
0.1uF
C0603
16V, X7R, +/-10%
1D5V_S0
1D5V_S0
*
1D5V_S0
1D5V_S0
C543
0.1uF
*
16V, X7R, +/-10%
C0603
*
16V, X7R, +/-10%
C502
0.1uF
C0603
C504
*
0.1uF
C0603
16V, X7R, +/-10%
DUMMY
3D3V_S0
C494
0.1uF
C0603
16V, X7R, +/-10%
1D05V_S0
3D3V_S0
C491
0.1uF
*
16V, X7R, +/-10%
C0603
C511
0.1uF
*
C0603
16V, X7R, +/-10%
C529
C528
0.1uF
0.1uF
*
16V, X7R, +/-10%
C0603
C0603
C332
0.1uF
16V, X7R, +/-10%
C0603
1D5V_S0
C513
0.1uF
*
16V, X7R, +/-10%
C0603
1D05V_S5
C481
0.1uF
*
C0603
*
16V, X7R, +/-10%
C274
0.1uF
C0603
16V, X7R, +/-10%
DUMMY
*
C520
0.1uF
*
16V, X7R, +/-10%
C0603
3D3V_S0
C487
0.1uF
*
16V, X7R, +/-10%
C0603
Layout Note:
Place near AB3
C541
0.1uF
C0603
NO_STUFF
C265
0.1uF
*
16V, X7R, +/-10%
C0603
C490
0.1uF
C0603
*
C493
0.1uF
C0603
16V, X7R, +/-10%
*
1D5V_S0
1D05V_S5
*
*
16V, X7R, +/-10%
C495
0.1uF
C0603
16V, X7R, +/-10%
DUMMY
*
NO_STUFF
RTC_AUX_S5
C532
0.1uF
*
16V, X7R, +/-10%
C0603
C512
*
0.1uF
C0603
DUMMY
16V, X7R, +/-10%
C514
0.1uF
16V, X7R, +/-10%
C0603
*
C505
0.1uF
C0603
3D3V_S0
*
16V, X7R, +/-10%
C486
0.1uF
C0603
16V, X7R, +/-10%
DUMMY
3D3V_S0
S0HDA
S5HDA
1D05V_S0
C503
0.1uF
*
C0603
*
*
DUMMY
C472
C483
*
0.1uF
0.1uF
C0603
C0603
16V, X7R, +/-10%
16V, X7R, +/-10%
NO_STUFF NO_STUFF
C499
C328
*
0.1uF
0.1uF
C0603
C0603
DUMMY
DUMMY
16V, X7R, +/-10%
16V, X7R, +/-10%
C515
*
0.1uF
C0603
DUMMY
16V, X7R, +/-10%
1D5V_S0 3D3V_S0
1D5V_S5 3D3V_S5
1D5V_S5
R414
10K
+/-1%
R0402
DUMMY
R415
10K
+/-1%
R0402
DUMMY
Layout Note:
Place near pin AA19
C484
22uF
10V, Y5V, +80%/-20%
C1206
Layout Note:
IDE decoupling
C497
C500
*
*
0.1uF
C0603
16V, X7R, +/-10%
Layout Note:
PCI decoupling
NO_STUFF
*
10uF
C0805
DUMMY
6.3V, X5R, +/-10%
1D5V_S0
R634
0
+/-1%
R0603
DUMMY
R637
0
+/-1%
R0603
DUMMY
1D05V_S5
1D05V_S5 Voltage divider.
Resistor need to be fine tuned.
C289
*
*
0.1uF
C0603
16V, X7R, +/-10%
C526
*
10uF
C0805
DUMMY
6.3V, X5R, +/-10%
C521
*
10uF
C0805
DUMMY
6.3V, X5R, +/-10%
R639
0
+/-1%
R0603
R633
0
+/-1%
R0603
V5REF_S0
Layout Note:
Place near ICH6
V5REF_S5
3D3V_S5
BC75
DUMMY
*
10V, Y5V, +80%/-20%
3D3V_S5
BC78
DUMMY
Title
Size Document Number Rev
Date: Sheet
*Within a given well, 5VR EF needs to be up before the
corresponding 3.3V rail
D45
CH751H-40
2 1
C506
0.1uF
C0402
16V, Y5V, +80%/-20%
C535
0.1uF
C0402
16V, Y5V, +80%/-20%
*
2 1
*
C496
1uF
C0603
10V, Y5V, +80%/-20%
D46
CH751H-40
C0603
10V, Y5V, +80%/-20%
I max = 120 mA
U23
1uF
C0603
1
2
3
SHDN#
GND
IN
G913C
DUMMY
SET
OUT
5
4
BC77
DUMMY
Reserved
I max = 120 mA
U25
1
SHDN#
2
GND
3
IN
1uF
*
G913C
DUMMY
C060310V, Y5V, +80%/-20%
SET
OUT
FOXCONN ND2
ICH7-M (3 of 4)
<Doc>
A3
W06N
C539
1uF
5
4
BC79
5V_S0 3D3V_S0
*
5V_S5 3D3V_S5
*
1D5V_S5
*
R626
10
+/-5%
R0402
R652
10
+/-5%
R0402
BC76
22pF
*
C0402
50V, NPO, +/-5%
DUMMY
1uF
C060310V, Y5V, +80%/-20%
1D5V_S5
BC80
22pF
*
C0603
DUMMY
50V, NPO, +/-5%
1uF
*
C060310V, Y5V, +80%/-20%
DUMMY
20 44 Saturday, February 19, 2005
of
R399
11K
+/-1%
R0402
DUMMY
R391
49.9K
+/-1%
R0603
DUMMY
R412
11K
+/-1%
R0402
DUMMY
R403
49.9K
+/-1%
R0603
DUMMY
SA
Page 21
PLT_RST1# 7,14,19,23,33,35,36
PCIRST# 3V to 5V level shift for HDD & CDROM
B_SMB_CLK 19
B_SMB_DATA 19
32K suspend clock output
S0_EN 14,23,33,37,40,41,42
10
2 4
U15C
74AHCT125PW
PM_SUS_CLK 19
5V_S0
14
9 8
7
SMBUS
3D3V_S5
R341
2.2K
R343
R335
10K
+/-5%
R0402
Q14 & Q15 connect SMLINK and
SMBUS in S) for SMBus 2.0
compliance
10K
+/-5%
R0402
+/-5%
R0402
D S
Q31
2N7002
3D3V_S5
1
5
3
3D3V_S0
G
D S
Q33
2N7002
U45
NC7SZ126
R228
10K
+/-5%
R0402
3D3V_S0
R336
4.7K
+/-5%
R0402
G
32KHZ
R227
33
R0402
+/-5%
R345
4.7K
+/-5%
R0402
R655
10
R656
R0402
240K
+/-5%
+/-5%
R0603
RSTDRV#_5 23
SMBC_ICH 3,12,23
B_SMBD_ICH 23
CLK32_G768 22
U20E
A4
VSS[1]
A23
VSS[2]
B1
VSS[3]
B8
VSS[4]
B11
VSS[5]
B14
VSS[6]
B17
VSS[7]
B20
VSS[8]
B26
VSS[9]
B28
VSS[10]
C2
VSS[11]
C6
VSS[12]
C27
VSS[13]
D10
VSS[14]
D13
VSS[15]
D18
VSS[16]
D21
VSS[17]
D24
VSS[18]
E1
VSS[19]
E2
VSS[20]
E4
VSS[21]
E8
VSS[22]
E15
VSS[23]
F3
VSS[24]
F4
VSS[25]
F5
VSS[26]
F12
VSS[27]
F27
VSS[28]
F28
VSS[29]
G1
VSS[30]
G2
VSS[31]
G5
VSS[32]
G6
VSS[33]
G9
VSS[34]
G14
VSS[35]
G18
VSS[36]
G21
VSS[37]
G24
VSS[38]
G25
VSS[39]
G26
VSS[40]
H3
VSS[41]
H4
VSS[42]
H5
VSS[43]
H24
VSS[44]
H27
VSS[45]
H28
VSS[46]
J1
VSS[47]
J2
VSS[48]
J5
VSS[49]
J24
VSS[50]
J25
VSS[51]
J26
VSS[52]
K24
VSS[53]
K27
VSS[54]
K28
VSS[55]
L13
VSS[56]
L15
VSS[57]
L24
VSS[58]
L25
VSS[59]
L26
VSS[60]
M3
VSS[61]
M4
VSS[62]
M5
VSS[63]
M12
VSS[64]
M13
VSS[65]
M14
VSS[66]
M15
VSS[67]
M16
VSS[68]
M17
VSS[69]
M24
VSS[70]
M27
VSS[71]
M28
VSS[72]
N1
VSS[73]
N2
VSS[74]
N5
VSS[75]
N6
VSS[76]
N11
VSS[77]
N12
VSS[78]
N13
VSS[79]
N14
VSS[80]
N15
VSS[81]
N16
VSS[82]
N17
VSS[83]
N18
VSS[84]
N24
VSS[85]
N25
VSS[86]
N26
VSS[87]
P3
VSS[88]
P4
VSS[89]
P12
VSS[90]
P13
VSS[91]
P14
VSS[92]
P15
VSS[93]
P16
VSS[94]
P17
VSS[95]
P24
VSS[96]
P27
VSS[97]
ICH7M REV 1.02 EDS
VSS[98]
VSS[99]
VSS[100]
VSS[101]
VSS[102]
VSS[103]
VSS[104]
VSS[105]
VSS[106]
VSS[107]
VSS[108]
VSS[109]
VSS[110]
VSS[111]
VSS[112]
VSS[113]
VSS[114]
VSS[115]
VSS[116]
VSS[117]
VSS[118]
VSS[119]
VSS[120]
VSS[121]
VSS[122]
VSS[123]
VSS[124]
VSS[125]
VSS[126]
VSS[127]
VSS[128]
VSS[129]
VSS[130]
VSS[131]
VSS[132]
VSS[133]
VSS[134]
VSS[135]
VSS[136]
VSS[137]
VSS[138]
VSS[139]
VSS[140]
VSS[141]
VSS[142]
VSS[143]
VSS[144]
VSS[145]
VSS[146]
VSS[147]
VSS[148]
VSS[149]
VSS[150]
VSS[151]
VSS[152]
VSS[153]
VSS[154]
VSS[155]
VSS[156]
VSS[157]
VSS[158]
VSS[159]
VSS[160]
VSS[161]
VSS[162]
VSS[163]
VSS[164]
VSS[165]
VSS[166]
VSS[167]
VSS[168]
VSS[169]
VSS[170]
VSS[171]
VSS[172]
VSS[173]
VSS[174]
VSS[175]
VSS[176]
VSS[177]
VSS[178]
VSS[179]
VSS[180]
VSS[181]
VSS[182]
VSS[183]
VSS[184]
VSS[185]
VSS[186]
VSS[187]
VSS[188]
VSS[189]
VSS[190]
VSS[191]
VSS[192]
VSS[193]
VSS[194]
P28
R1
R11
R12
R13
R14
R15
R16
R17
R18
T6
T12
T13
T14
T15
T16
T17
U4
U12
U13
U14
U15
U16
U17
U24
U25
U26
V2
V13
V15
V24
V27
V28
W6
W24
W25
W26
Y3
Y24
Y27
Y28
AA1
AA24
AA25
AA26
AB4
AB6
AB11
AB14
AB16
AB19
AB21
AB24
AB27
AB28
AC2
AC5
AC9
AC11
AD1
AD3
AD4
AD7
AD8
AD11
AD15
AD19
AD23
AE2
AE4
AE8
AE11
AE13
AE18
AE21
AE24
AE25
AF2
AF4
AF8
AF11
AF27
AF28
AG1
AG3
AG7
AG11
AG14
AG17
AG20
AG25
AH1
AH3
AH7
AH12
AH23
AH27
Title
Size Document Number Rev
<Doc>
A3
Date: Sheet
ICH7-M (4 of 4)
W06N
SA
of
21 44 Saturday, February 19, 2005
FOXCONN ND2
Page 22
Put thes e tw o Caps near the the rmal diode.
THERMDP2
BC102
470pF
*
THERMDN
50V. X7R, +/-10%
C0402
E C
B
Q38
MMBT3904
SYSTEM SENSOR
THERMDP1
BC105
2.2nF
*
50V. X7R, +/-10%
C0402
THERMDN
THERMDP1/DP 2 / T H ER M D N O N TH E SAME LAYER
W/S = 10/5 MIL , 12 MIL AWAY FROM OTHERS
CAPS CLOSE TO G768B
HW thermal shut down tempature
setting 95 degree . Put Near CPU .
THERMDP2
THERMDN
BC106
2.2nF
*
50V. X7R, +/-10%
C0402
Reserve for G768B
works at High
Speed
5V_S0
5V_S0 5V_G768_S0
R80
C420
0
R0603
+/-5%
3D3V_S0
U14C
74LCX08
PWROK 7,19
14 7
8
9
10
RUNPWROK
R520
0
R0603
+/-5%
THERMDP1 4
THERMDN 4
CN8
Header_1X3
R536
10K
+/-5%
R0603
5
3
2
1
4
*
THERMDP1
THERMDN
THERMDP2
R537
4.7K
R0402
+/-5%
FAN_FB
VCC_FAN
0.1uF
16V, Y5V, +80%/-20%
C0402
1
2
3
4
2 1
R538
10K
+/-5%
R0603
D40
FDLL4148
5
6
7
8
G768_RST#
5V_S0
U37
OUT1
VCC
DXP1
DXN
DXP2
RESET#
GND
GND
G768D
C99
10uF
*
10V, Y5V, +80%/-20%
C0805
OUT2
VCC
SMBCLK
FG2
SMBDATA
ALERT#
FG1
CLK
16V, Y5V, +80%/-20%
16
15
14
13
12
11
FAN_FB
10
9
*Layout* 15 mil
C419
0.1uF
*
C0402
R535
R532
10K
10K
+/-5%
+/-5%
R0603
R0603
G768_HW_SHDN VCC_FAN
B_KBC_SCL1 14,33
B_KBC_DAT1 14,33
THRM# 19
CLK32_G768 21
VCC_FAN
C417
10uF
*
10V, Y5V, +80%/-20%
C0805
5V_S0
R522
10K
+/-5%
R0603
DUMMY
14
13
12 11
U15D
74AHCT125PW
7
*
D S
R413
100
+/-5%
R0402
DUMMY
C421
2.2nF
50V. X7R, +/-10%
C0402
G
Q39
2N7002
DUMMY
RUNPWROK
HW_SHUT
R419
10K
+/-5%
R0603
DUMMY
HW_SHUT 19
BC24
0.1uF
C0603
VCC
*
6
5
4
5V_AUX_S5
CPU_TH_HYST
R90
0
R0603
+/-5%
DUMMY
5V_AUX_S5
R98
0
R0603
+/-5%
R101
0
R0603
+/-5%
DUMMY
PURE_HW_SHUTDOW N# 19
5V_AUX_S5
5V_AUX_S5 5V_AUX_S5
R94
10K
+/-5%
U7
GND
NC7SZ14
NC
A
1
2
3
SHUTDOWN_S5#
NC7SZ08
U8
5
VCC
SHUTDOWN_S5 42
4
Y
5 3
PURE_HW_SHUTDOW N#
4
1
2
S5_EN 23,33
R0402
R91
CPU_THSET
18K
+/-1%
R0402
HW thermal shut down tempature
setting 95 degree . Put Near CPU .
1
2
3
16V, X7R, +/-10%
U9
SET
GND
OUT#
MAX6510HAUT-T
OUTSET
HYST
FOXCONN ND2
Title
Size Document Number Rev
Custom
Date: Sheet
Thermal/Fan Controllor
<Doc>
W02
SA
of
22 44 Saturday, February 19, 2005
Page 23
R195
2.7K
+/-5%
R0402
DUMMY
R392
+/-5%
R0402
470
R180
10K
+/-5%
R0402
CD_AUDR 30
5V_S0
HDDCSEL1
IDE_A2 18
IDE_CS#1 18
TP70
BC27
0.1uF
*
C0603
16V, Y5V, +80%/-20%
5V_S0
HDD Connector
HDD1
HDD-44P
IDE_D8 18
IDE_D9 18
IDE_D10 18
IDE_D11 18
IDE_D12 18
IDE_D13 18
IDE_D14 18
IDE_D15 18
DIAG
5V_S0
IDE_D8
IDE_D9
IDE_D10
IDE_D11
IDE_D12
IDE_D13
IDE_D14
IDE_D15
IDE_DREQ
IDE_IOR#
IDE_DACK#
BAY_ID0
1
DIAG
IDE_A2
IDE_CS#1
BC28
0.1uF
*
C0603
16V, Y5V, +80%/-20%
BC86
0.1uF
*
C0402
DUMMY
16V, Y5V, +80%/-20%
BC26
0.1uF
*
C0603
16V, Y5V, +80%/-20%
46
43
41
39
37
35
33
31
29
27
25
23
21
19
17
15
13
11
45
*
16V, Y5V, +80%/-20%
CDROM
9
7
5
3
1
BC87
0.1uF
C0603
52
49
47
45
43
41
39
37
35
33
31
29
27
25
23
21
19
17
15
13
11
51
9
7
5
3
1
44
42
40
38
36
34
32
30
28
26
24
22
20
18
16
14
12
10
8
6
4
2
BC128
10uF
*
C0805
10V, Y5V, +80%/-20%
CN10
CD-ROM-50P
PBIDDACK#
2 1
50
48
46
44
42
40
38
36
34
32
30
28
26
24
22
20
18
16
14
12
10
8
6
4
2
PBRSTDRV1#_5
IDE_D7
IDE_D7 18
IDE_D6
IDE_D6 18
IDE_D5
IDE_D5 18
IDE_D4
IDE_D4 18
IDE_D3
IDE_D3 18
IDE_D2
IDE_D2 18
IDE_D1
IDE_D1 18
IDE_D0
IDE_D0 18
D49
SSM22LLPT
CD_GND
RSTDRV#_5
IDE_D7
IDE_D6
IDE_D5
IDE_D4
IDE_D3
IDE_D2
IDE_D1
IDE_D0
IDE_IOW#
IDE_IORDY
IDE_IRQ14
IDE_A1
IDE_A0
IDE_CS#0
CSEL
R302 33 R0402
IDE_DREQ 18
IDE_IOW# 18
IDE_IOR# 18
R396 33
R0402 +/-5%
IDE_A1 18
IDE_A0 18
IDE_CS#0 18
CDROM_CSEL
+/-5%
RSTDRV#_5 21
MEDIA_LED#
Master
CD_AUDL 30
CD_GND 30
SLAVE
R200 8.2K R0402 +/-5%
MEDIA_LED# 17
R133 10K
R0402 +/-5%
10K
R0402 +/-5%
R123
DUMMY
3D3V_S0 5V_S0
R426
4.7K
+/-5%
R0402
3D3V_S0
5V_S0
R388
4.7K
+/-5%
R0402
IDE_IORDY 18
IDE_DACK# 18
IDE_IRQ14 18
MEDIA_LED# 17
C305
0.1uF
16V, Y5V, +80%/-20%
C0402
1D5V_S0 3D3V_S0 3D3V_LAN_S5
C287
*
*
0.1uF
C0402
16V, Y5V, +80%/-20%
DUMMY
*
16V, Y5V, +80%/-20%
Place them Near to Chip
PCIE_WAKE# 19
1D5V_NEW_S0
B_SMBD_ICH 21
SMBC_ICH 3,12,21
1D5V_S0
1D5V_NEW_S0
3D3V_S0
3D3V_NEW_S0
3D3V_LAN_S5
3D3V_NEW_LAN_S5
TPS2231_PERST#
C285
1uF
*
C286
0.1uF
C0402
DUMMY
C0603
10V, Y5V, +80%/-20%
16V, Y5V, +80%/-20%
Check new card pin define
PCIE_TXP0 19
PCIE_TXN0 19
NEWCARD_DET# 3
3D3V_NEW_S0
CONN_WAKE#
+/-5%
R315
R0402
100
+/-5%
R308
R0402
100
+/-5%
CPUTSB#
R371 0R0402 +/-5%
R362 0R0402 +/-5%
CPPE#
NEWCARD_DET#
TPS2231_PERST#
B_SMBD_ICH_1
SMBC_ICH_1 SMBC_ICH
CONN_TP1
CONN_TP2
CPUTSB#
CPPE#
STBY#
SHDN#
SYSRST#
RCLKEN
NC#1
NC#10
NC#12
NC#13
NC#24
GND
GND
PCIE_RXP0 19
PCIE_RXN0 19
CLK_PCIE_NEW 3
CLK_PCIE_NEW# 3
B_SMBD_ICH
TP126
TP124
3D3V_NEW_LAN_S5
R3370R0402
1
1
B_USB_PP5 19
B_USB_PN5 19
U21
19
1.5VIN
18
1.5VIN
17
1.5VOUT
16
1.5VOUT
5
3.3VIN
6
3.3VIN
7
3.3VOUT
8
3.3VOUT
23
OC#
21
3.3VAUX_IN
9
PERST#
20
AUX_OUT
TPS2231-PWP
14
15
4
3
2
22
1
10
12
13
24
11
25
1D5V_NEW_S0 3D3V_NEW_S0 3D3V_NEW_LAN_S5
C288
0.1uF
C0402
*
C279
*
1uF
C0603
10V, Y5V, +80%/-20%
Place them Near to Connector
CN13
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
+/-5%
R350 100KR0402
R349 100KR0402
R375 0R0402
R376 0R0402
R374 0
R0402 +/-5%
DUMMY
11
10
9
8
7
6
5
4
3
2
1
New-card-conn26
+/-5%
+/-5%
+/-5%
+/-5%
R3260R0402
CPUTSB#
CPPE#
STBY#
SHDN#
*
C280
0.1uF
C0402
16V, Y5V, +80%/-20%
A4
A3
A2
A1
*
C283
0.1uF
C0402
16V, Y5V, +80%/-20%
3D3V_S0
S0_EN 14,21,33,37,40,41,42
S5_EN 22,33
NEWCARD_RST#0_R 19
PLT_RST1# 7,14,19,21,33,35,36
BC30
0.1uF
25V, Y5V, +80%/-20%
C0603
*
BC31
*
10uF
10V, Y5V, +80%/-20%
C0805
Title
Size Document Number Rev
Date: Sheet
SATA/CDROM/NEWCARD
<Doc>
A3
W02
SA
of
23 44 Saturday, February 19, 2005
FOXCONN ND2
Page 24
3D3V_S5
R600
10K
+/-5%
R0402
1 3
3D3V_S0
2
Q43
DTC144EUA
U19
GND
NC7SZ14
1
NC
2
3
BT_PWR_ON# 19
A
5
VCC
4
Y
MDC CONN
1
2
3D3V_S0
14 7
U14A
3
74LCX08
BTONLED# 17
2
Q32
DTC144EUA
1 3
R295
Voice Modem
MDM_AUD_IN 30
3D3V_LAN_S5
ACZ_SDATAOUT 18,32
ACZ_RST# 18,32
R257
10K
R0402
+/-5%
10V, Y5V, +80%/-20%
0
R0402
+/-5%
DUMMY
BT_LED
C261
4.7uF
C0805
MDM_AUD_IN_R
*
*
16V, Y5V, +80%/-20%
C260
0.1uF
C0402
34
11
13
15
17
19
21
23
25
27
29
33
1
3
5
7
9
CN12
MDC_30P
36
32
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
31
35
BL_ON#
AC_DIN1A_R
AC_DIN1B_R
R59922R0402
+/-5%
R59822R0402
+/-5%
R5960R0402
+/-5%
C471 10nF
C060350V, X7R, +/-10%
*
R597
100K
+/-5%
R0402
*
BT_DETACH 19
MDM_AUD_OUT 30
B_USB_PP7 19
B_USB_PN7 19
BT_WAKEUP 19
ACZ_SYNC 18,32
ACZ_SDATAIN1 18
ACZ_BTCLK_MDC 30
C470
22pF
50V, NPO, +/-5%
C0402
BT_LED
Check MDC Data In
Title
Size Document Number Rev
A3
Date: Sheet
<Doc>
MDC
W02
SA
of
24 44 Saturday, February 19, 2005
FOXCONN ND2
Page 25
9,32,33,35
B_PCI_AD[31..0] 19,28,29
B_PM_CLKRUN#
B_PCI_C/BE#0 19,28,29
B_PCI_C/BE#1 19,28,29
B_PCI_C/BE#2 19,28,29
B_PCI_C/BE#3 19,28,29
B_PCI_PAR 19,28,29
B_PCI_AD0
B_PCI_AD1
B_PCI_AD2
B_PCI_AD3
B_PCI_AD4
B_PCI_AD5
B_PCI_AD6
B_PCI_AD7
B_PCI_AD8
B_PCI_AD9
B_PCI_AD10
B_PCI_AD11
B_PCI_AD12
B_PCI_AD13
B_PCI_AD14
B_PCI_AD15
B_PCI_AD16
B_PCI_AD17
B_PCI_AD18
B_PCI_AD19
B_PCI_AD20
B_PCI_AD21
B_PCI_AD22
B_PCI_AD23
B_PCI_AD24
B_PCI_AD25
B_PCI_AD26
B_PCI_AD27
B_PCI_AD28
B_PCI_AD29
B_PCI_AD30
B_PCI_AD31
B_PM_CLKRUN#
SMCLE/SDDAT2 27
SMALE/SDCMD 27
SMDATA7/SDDAT0 27
SMWE#/SDCLK 27
SMDATA4/SDDAT3 27
SMDATA0/SDDAT1 27
SMWPD#SDWP 27
MC_PWR_CTRL# 27
CLK48_CARDBUS
U22A
F2
PCI
R436
43K
+/-5%
R0603
FW-INTA#
SERR#
PERR#
STOP#
DEVSEL#
TRDY#
IRDY#
FRAME#
FW-PCICLK
PCICLK
PCIRST#
FW-PCIRST#
FW-PCIVIOS
FW-IDSEL
IDSEL
PCIGNT#
FW-PCIGNT#
PCIREQ#
FW-PCIREQ#
G_RST#
FW-RESET#
SDCLKI
SUSPEND#
SPKROUT
RI_OUT#/PME#
FW-PME#
MFUNC6
MFUNC5
MFUNC4
MFUNC3
MFUNC2
MFUNC1
MFUNC0
MFUNC7
VCCD1#
VCCD0#
VPPD1
VPPD0
T16
T15
R16
R15
R434
43K
+/-5%
R0603
R614
2.2K
+/-5%
R0402
R4
P6
P5
P4
N6
N4
M7
K1
L4
K7
G1
W11
R397 100 R0402 +/-5%
J2
R400 100 R0402 +/-5%
J7
E4
G2
D4
H1
R13
B12
L8
R359 43K R0603 +/-5%
P14
R12
P11
H2
CB_MFUNC6
R14
CB_MFUNC5
T14
P13
T13
INT_PIRQE#
N12
T12
INT_PIRQE#
N11
M12
CB810-1
3D3V_CR_S0
R377
R437
10K
43K
+/-5%
R0402
R0603
+/-5%
FW-RESETN
INT_SERIR Q 19,29,32,33,35,36
R438
43K
+/-5%
R0603
T11
AD0
N10
AD1
P10
AD2
T10
AD3
R10
AD4
T9
AD5
R9
AD6
N9
AD7
R8
AD8
P8
AD9
N8
AD10
R7
AD11
N7
AD12
T6
AD13
R6
AD14
T5
AD15
M5
AD16
M4
AD17
L7
AD18
L6
AD19
K6
AD20
K5
AD21
J4
AD22
J5
AD23
H5
AD24
H6
AD25
H7
AD26
G4
AD27
G5
AD28
G7
AD29
F4
AD30
F5
AD31
F1
FW-CLKRUN#
T8
CBE0#
T4
CBE1#
M6
CBE2#
H4
CBE3#
R5
PAR
VCCD1# 26
VCCD0# 26
VPPD1 26
VPPD0 26
3D3V_S0
R386
43K
+/-5%
R0603
SMBSY# 27
SMCE# 27
SMWP# 27
SMCD# 27
SDCD# 27
R435
43K
+/-5%
R0603
INT_PIRQE# 19
B_PCI_SERR# 19,28,29
B_PCI_PERR# 19,28,29
B_PCI_STOP# 19,28,29
B_PCI_DEVSEL# 1 9,28,29
B_PCI_ TR DY# 19,28,29
B_PC I_IRDY# 19,28,29
B_PCI_FRAME# 19,28,29
PCLK_PCM 3
PCIRST1# 16 , 19,28,29,32
B_PCI_AD19
CLK48_CARDBUS 3
FW-RESETN
SMBSY#
SMCE#
SMWP#
SMCD#
J8
SMCLE/SDDAT2
SMALE/SDCMD
SMDATA7/SDDAT0
J9
SMWE#/SDCLK
SMDATA4/SDDAT3
SMDATA0/SDDAT1
SMWPD#/SDWP
SDCD#
SDPWREN33#
FW-TPB2P
FW-TPB2M
FW-TPA2P
FW-TPA2M
FW-TPBIAS2
B_PCI_AD25
PCI_GNT#0 19
PCI_GNT#3 19
PCI_REQ#0 19
PCI_REQ#3 19
3D3V_S0
CBUS_PME# 29
R364 10K R0402 +/-5%
R363 10K R0402 +/-5%
R433
R378
10K
2.2K
+/-5%
R0402
R0402
+/-5%
L9
M8
M9
M10
H8
H9
K9
J10
J11
H11
K10
P18
P19
N18
N19
M19
3D3V_S0
R365
10K
R0402
+/-5%
3D3V_S0
R420
510K
+/-5%
R0603
PCI_SPKR 30
R360
47K
+/-5%
R0603
BC81
0.1uF
*
16V, Y5V, +80%/-20%
C0603
CARDREADER/1394
SMPWREN#/MSPWREN#
SMDATA1/MSBS
SMDATA2/MSDATA0
SMDATA3/MSDATA3
SMRE#/MSCLK
SMDATA5/MSDATA2
SMDATA6/MSDATA1
PCLK_PCM
BC82 10pF C0402 50V, NPO, +/-5%
U22C
MSINS#
FW-TPBIAS0
FW-TPBIAS1
FW-TPA0P
FW-TPA0M
FW-TPB0P
FW-TPB0M
FW-TPA1M
FW-TPA1P
FW-TPB1M
FW-TPB1P
CB810-1
R368
33
R0402
+/-5%
DUMMY
C293
*
33pF
C0603
50V, NPO, +/-5%
DUMMY
R369
33
R0402
+/-5%
DUMMY
C291
*
33pF
C0603
50V, NPO, +/-5%
DUMMY
B_CBB_A16 27
*
X5
X-24D576MHz
*
1 2
BC83 10pFC0402 50V, NPO, +/-5%
R440
10K
R0402
+/-5%
R347 22
R0402 +/-5%
R0402 +/-5%
1394_TPBIAS0
3D3V_S0
3D3V_CR_S0
M11
L11
K12
J12
R439 22
H12
K11
L12
L10
F19
H18
F18
G19
G18
H19
J18
J19
K18
K19
B_CBB_D2 27
B_CBB_D14 27
B_CBB_A18 27
B_CBB_CD1# 27
CBB_CD2# 27
B_CBB_VS1# 27
B_CBB_VS2# 27
CBB_BVD2# 27
CBB_BVD1# 27
CBB_RDY 27
B_CBB_A19 27
CBB_WE# 27
CBB_INPACK# 27
CBB_WAIT# 27
B_CBB_A14 27
B_CBB_A20 27
B_CBB_A21 27
B_CBB_A22 27
B_CBB_A15 27
B_CBB_A23 27
CBB_WP 27
CBB_RESET 27
R402 10 R 0402 +/-5%
B_CBB_CE1# 27
B_CBB_A8 27
B_CBB_A12 27
CBB_REG# 27
B_CBB_A13 27
B_ICH_PME# 19,28,33
R348
43K
+/-5%
R0603
SM_PWREN#/MSPW REN# 27
SMDATA1/MSBS 27
SMDATA2/MSDATA0 27
SMDATA3/MSDATA3 27
SMRE#/MSCLK 27
SMDATA5/MSDATA2 27
SMDATA6/MSDATA1 27
MSINS# 27
R394
56
+/-1%
R0402
X1_CB
X2_CB
R398
56
+/-1%
R0402
D5
M16
H13
P15
D7
F9
G12
E8
F8
G9
G14
F14
E11
D8
F16
F15
E16
D16
D15
E14
G8
E12
E15
B13
A13
L16
H14
D14
E10
G16
B_ICH_PME#
R383
56
+/-1%
R0402
RSVD/D2
RSVD/D14
RSVD/A18
CCD1#/CD1#
CCD2#/CD2#
CVS1/VS1
CVS2/VS2
CAUDIO/BVD2/SPKR#
CSTSCHG/BVD1/STSCHG#
CINT#/READY/IREQ#
CBLOCK#/A19
CGNT#/WE#
CREQ#/INPACK#
CSERR#/WAIT#
CPERR#/A14
CSTOP#/A20
CDEVSEL#/A21
CTRDY#/A22
CIRDY#/A15
CFRAME#/A23
CCLKRUN#/WP/IOIS16#
CRST#/RESET
CCLK/A16
FW-XI
FW-XO
CCBE0#/CE1#
CCBE1#/A8
CCBE2#/A12
CCBE3#/REG#
CPAR/A13
3D3V_S0
R300
10K
R0402
+/-5%
DUMMY
G
D S
R325
0
+/-5%
R0402
DUMMY
R389
56
+/-1%
R0402
Q30
2N7002
DUMMY
B_1394_TPA0P 27
B_1394_TPA0N 27
B_1394_TPB0P 27
B_1394_TPB0N 27
CAD15/IOWR#
CAD13/IORD#
CARDBUS
CAD10/CE2#
R324
10K
R0402
+/-5%
CBUS_PME#
CAD31/D10
CAD30/D9
CAD29/D1
CAD28/D8
CAD27/D0
CAD26/A0
CAD25/A1
CAD24/A2
CAD23/A3
CAD22/A4
CAD21/A5
CAD20/A6
CAD19/A25
CAD18/A7
CAD17/A24
CAD16/A17
CAD14/A9
CAD12/A11
CAD11/OE#
CAD9/A10
CAD8/D15
CAD7/D7
CAD6/D13
CAD5/D6
CAD4/D12
CAD3/D5
CAD2/D11
CAD1/D4
CAD0/D3
CB810-1
U22B
E5
F6
E6
D6
F7
D9
G10
F10
D11
G11
D12
F12
D13
E13
G13
H15
J13
H16
J16
J14
K13
K14
K15
L15
L13
M14
M15
N16
M13
N13
N15
P16
B_CBB_D10 27
B_CBB_D9 27
B_CBB_D1 27
B_CBB_D8 27
B_CBB_D0 27
B_CBB_A0 27
B_CBB_A1 27
B_CBB_A2 27
B_CBB_A3 27
B_CBB_A4 27
B_CBB_A5 27
B_CBB_A6 27
B_CBB_A25 27
B_CBB_A7 27
B_CBB_A24 27
B_CBB_A17 27
CBB_IOWR# 27
B_CBB_A9 27
CBB_IORD# 27
B_CBB_A11 27
B_CBB_OE# 27
B_CBB_CE2# 27
B_CBB_A10 27
B_CBB_D15 27
B_CBB_D7 27
B_CBB_D13 27
B_CBB_D6 27
B_CBB_D12 27
B_CBB_D5 27
B_CBB_D11 27
B_CBB_D4 27
B_CBB_D3 27
C324
1uF
C0603
10V, X5R, +/-10%
*
50V, NPO, +/-5%
*
C0603
+/-5%
R0603
Title
Size Document Number Rev
<Doc>
A3
Date: Sheet of
FOXCONN ND2
ENE CardBus 1/2
W02
25 44 Saturday, February 19, 2005
SA
R390
C318
5.1K
220pF
Page 26
Power switch
C290
0.1uF
16V, Y5V, +80%/-20%
C278
0.1uF
C0402
DUMMY
3D3V_S0
*
16V, Y5V, +80%/-20%
C475
4.7uF
C0805
*
10V, Y5V, +80%/-20%
VCCD0#
VCCD1#
R604
43K
+/-5%
R0603
VCC_ASKT_S0 3D3V_PLL_S0
R607
43K
+/-5%
R0603
3D3V_CR_S0 3D3V_S0
C0402
VCCD0# 25
VCCD1# 25
*
VPP_ASKT_S0
VPP_ASKT_S0
1
2
3
4
5
6
7
8
R361
100K
+/-5%
R0402
U18
VCCD0#
VCCD1#
3.3V
3.3V
5V
5V
GND
OC#
CP2211D3
5V_S0
VCC_ASKT_S0
C284
0.1uF
*
C0402
16V, Y5V, +80%/-20%
16
SHTDN#
15
VPPD0
14
VPPD1
13
VCCOUT
12
VCCOUT
11
VCCOUT
10
VPPOUT
9
12V
C282
4.7uF
*
C0805
VCC_ASKT_S0
VPP_ASKT_S0
DUMMY
10V, Y5V, +80%/-20%
VPPD0 25
VPPD1 25
C295
1nF
50V, X7R, +/-10%
C0402
C306
1nF
50V, X7R, +/-10%
C0402
C303
0.1uF
C0402
16V, Y5V, +80%/-20%
DUMMY
Bypass/Decupoling Capacitors
Should be places as close to
PCI7421 as possible
3D3V_S0
*
3D3V_S0
*
3D3V_S0
*
*
C304
0.1uF
C0402
16V, Y5V, +80%/-20%
*
C299
0.1uF
C0402
16V, Y5V, +80%/-20%
*
C294
0.1uF
C0402
16V, Y5V, +80%/-20%
*
C313
0.1uF
C0402
16V, Y5V, +80%/-20%
*
C300
0.1uF
C0402
16V, Y5V, +80%/-20%
*
C335
0.1uF
C0402
16V, Y5V, +80%/-20%
TP102
TP105
TP85
C317
1nF
*
50V, X7R, +/-10%
C0402
DUMMY
*
C325
0.1uF
C0402
16V, Y5V, +80%/-20%
*
C296
0.1uF
C0402
16V, Y5V, +80%/-20%
DUMMY
1
1
1
A10
FW-VAUXPRSNT
A8
FW-CARDBUS#
V14
FW-MPCIACT#
E7
P12
L14
G15
F11
VCC1J6VCC2K4VCC3N5VCC4T7VCC5P9VCC6
VCC7
VCC8
VCC9
VCC10
VCC3V VCC3A
AGND GND
FW-PLLVSS
FW-VSSA1
FW-VSSA2
FW-VSSA3
FW-VSSA4
L18
A14
E18
R18
M18
W7
FW-VDD1A9FW-VDD2E1FW-VDD3J1FW-VDD4L1FW-VDD5M1FW-VDD6N1FW-VDD7P1FW-VDD8R1FW-VDD9
POWER/GND
GND1G6GND2L5GND3P7GND4
GND5
GND6
GND7
J15
F13
R11
N14
B14
R19
L19
W15
FW-VDD10W9FW-VDD11
GND8E9FW-VSS1B9FW-VSS2E2FW-VSS3K2FW-VSS4L2FW-VSS5M2FW-VSS6N2FW-VSS7P2FW-VSS8R2FW-VSS9V5FW-VSS10V6FW-VSS11V7FW-VSS12V8FW-VSS13V9FW-VSS14
E19
AVCC
FW-VDDA1
FW-VDDA2
FW-VDDA3
FW-PLLVDD
FW-CONTENDER
K16
D10
H10
VCCA1
VCCA2
VCC_SD
FW-ROMAD
FW-ROMCLK
FW-TEST0
FW-TEST1
FW-NANDTREE
FW-CNA
FW-PC0
FW-PC1
FW-PC2
FW-LPS
FW-LKON
FW-CPS
FW-SM
FW-SE
FW-PTEST
FW-R0
FW-R1
GND_SD
CB810-1
K8
V10
U22D
A5
B6
B5
A6
B7
A7
W13
V12
W12
V11
W14
V13
V15
B11
A11
A12
B15
A15
R416
R417
10K
10K
+/-5%
R0402
R0402
+/-5%
NANDTREE
1
FW-CNA
1
FW-LPS
1
FW-LKON
1
FW-CPS
1
R418 2.49K
R0402 +/-1%
3D3V_PLL_S0 3D3V_S0
TP103
TP104
TP88
TP87
TP86
R379
10K
R0402
+/-5%
C478
4.7uF
10V, Y5V, +80%/-20%
C0805
C485
0.1uF
*
*
C0402
16V, Y5V, +80%/-20%
DUMMY
R4100R0402
+/-5%
C327
*
10uF
10V, Y5V, +80%/-20%
C0805
C314
*
1nF
50V, X7R, +/-10%
C0402
3D3V_PLL_S0 3D3V_S0
C308
*
1uF
10V, Y5V, +80%/-20%
C0603
Title
Size Document Number Rev
A3
Date: Sheet
ENE CardBus 2/2
<Doc>
W02
SA
of
26 44 Saturday, February 19, 2005
FOXCONN ND2
Page 27
PCMCIA Socket
VCC_ASKT_S0
C292
10uF
*
C0805
10V, Y5V, +80%/-20%
B_CBB_A16
50V, NPO, +/-5%
Place close to pin 19.
Clock AC termination
33MHz clock for 32-bit
Cardbus card I/F
C501
10uF
*
C0805
10V, Y5V, +80%/-20%
VPP_ASKT_S0
C326
10pF
C0402
*
B_CBB_A16
*
*
50V, X7R, +/-10%
C302
0.1uF
C0402
C298
1nF
C0402
*
16V, Y5V, +80%/-20%
16V, Y5V, +80%/-20%
C508
0.1uF
C0402
VCC_ASKT_S0
B_CBB_D3 25
B_CBB_CD1# 25
B_CBB_D4 25
B_CBB_D11 25
B_CBB_D5 25
B_CBB_D12 25
B_CBB_D6 25
B_CBB_D13 25
B_CBB_D7 25
B_CBB_D14 25
B_CBB_CE1# 25
B_CBB_D15 25
B_CBB_A10 25
B_CBB_CE2# 25
B_CBB_OE# 25
B_CBB_VS1# 25
B_CBB_A11 25
CBB_IORD# 25
B_CBB_A9 25
CBB_IOWR# 25
B_CBB_A8 25
B_CBB_A17 25
B_CBB_A13 25
B_CBB_A18 25
B_CBB_A14 25
B_CBB_A19 25
CBB_WE# 25
B_CBB_A20 25
CBB_RDY 25
B_CBB_A21 25
B_CBB_A16
B_CBB_A22 25
B_CBB_A15 25
B_CBB_A23 25
B_CBB_A12 25
B_CBB_A24 25
B_CBB_A7 25
B_CBB_A25 25
B_CBB_A6 25
B_CBB_VS2# 25
B_CBB_A5 25
CBB_RESET 25
B_CBB_A4 25
CBB_WAIT# 25
B_CBB_A3 25
CBB_INPACK# 25
B_CBB_A2 25
CBB_REG# 25
B_CBB_A1 25
CBB_BVD2# 25
B_CBB_A0 25
CBB_BVD1# 25
B_CBB_D0 25
B_CBB_D8 25
B_CBB_D1 25
B_CBB_D9 25
B_CBB_D2 25
B_CBB_D10 25
CBB_WP 25
CBB_CD2# 25
B_CBB_D3
B_CBB_CD1#
B_CBB_D4
B_CBB_D11
B_CBB_D5
B_CBB_D12
B_CBB_D6
B_CBB_D13
B_CBB_D7
B_CBB_D14
B_CBB_CE1#
B_CBB_D15
B_CBB_A10
B_CBB_CE2#
B_CBB_OE#
B_CBB_VS1#
B_CBB_A11
CBB_IORD#
B_CBB_A9
CBB_IOWR#
B_CBB_A8
B_CBB_A17
B_CBB_A13
B_CBB_A18
B_CBB_A14
B_CBB_A19
CBB_WE#
B_CBB_A20
CBB_RDY
B_CBB_A21
B_CBB_A22
B_CBB_A15
B_CBB_A23
B_CBB_A12
B_CBB_A24
B_CBB_A7
B_CBB_A25
B_CBB_A6
CBUS1
1
35
2
36
3
37
4
38
5
39
6
40
7
41
8
42
9
43
10
44
11
45
12
46
13
47
14
48
15
49
16
50
17
51
18
52
19
53
20
54
21
55
22
56
23
57
24
58
25
59
26
60
27
61
28
62
29
63
30
64
31
65
32
66
33
67
34
68
PCMCIA-68P
A1
1394 Connector
A2
B_1394_TPA0P 25
B_1394_TPA0N 25
B_1394_TPB0P 25
B_1394_TPB0N 25
SMCD#
SMCD# 25
SMDATA4/SDDAT3
SMDATA3/MSDATA3
SMDATA5/MSDATA2
SMDATA2/MSDATA0
SMDATA6/MSDATA1
SMDATA1/MSBS
SMDATA7/SDDAT0
SMDATA0/SDDAT1
SMWP#
SMWE#/SDCLK
SMBSY#
SMALE/SDCMD
SMRE#/MSCLK
SMCLE/SDDAT2
B_CBB_CD1# CBB_CD2#
C273
*
10pF
C0402
A4
A3
50V, NPO, +/-5%
C336
*
10pF
C0402
50V, NPO, +/-5%
SMCE#
SMWPD#SDWP
SMWP# 25
SMWE#/SDCLK 25
SMALE/SDCMD 25
SMCLE/SDDAT2 25
SMCE# 25
SMRE#/MSCLK 25
SMBSY# 25
SMCD# 25
CR1
40
SM_11P(CD)
41
SM_12P(VCC)
42
SM_10P(GEN)
43
SM_13P(D5)
44
SM_9P(D4)
45
SM_14P(D6)
46
SM_8P(D3)
47
SM_15P(D7)
48
SM_7P(D2)
49
SM_16P(D8)
50
SM_6P(D1)
51
SM_17P(LVD)
52
SM_5P(WP)
53
SM_18P(GND)
54
SM_4P(WE)
55
SM_19P(R/B)
56
SM_3P(ALE)
57
SM_20P(RE)
58
SM_2P(CLE)
59
SM_21P(CE)
60
SM_1P(VSS)
61
SM_22P(VCC)
63
SM_CD
65
SM_GND
66
SM_WP
67
GND
68
GND
69
GND
22
XD_8P(WP#)
24
XD_7P(WP#)
26
XD_6P(ALE)
28
XD_5P(CLE)
30
XD_4P(CE#)
32
XD_3P(RE#)
34
XD_2P(R/B#)
36
XD_1P(CD)
38
XD_1P(GND)
For XD CardIn
CR7in1
L10
2
Common Choke 90 Ohm 2L
L11
2
Common Choke 90 Ohm 2L
Change to TDK
SM
SD/MMC
MS
XD
4 3
1
4 3
1
SD_CD
SD_D0
SD_D1
SD_D2
SD_D3/CD
SD_CMD
SD_VCC
SD_WP
SD_CLK
SD_VSS
SD_VSS
SD_GND
MS_BS
MS_INS
MS_SCLK
MS_SDIO
MS_RESERVE
MS_RESERVE
MS_VCC
MS_VCC
MS_VSS
MS_VSS
XD_18P(VCC)
XD_17P(D7)
XD_16P(D6)
XD_15P(D5)
XD_14P(D4)
XD_13P(D3)
XD_12P(D2)
XD_11P(D1)
XD_10P(D0)
XD_9P(GND)
TPA0+
TPA0TPB0+
TPB0- TPB0-
SDCD#
1
SMDATA7/SDDAT0
5
SMDATA0/SDDAT1
3
SMCLE/SDDAT2
39
SMDATA4/SDDAT3
37
SMALE/SDCMD
35
11
R460 0 R0402 +/-5%
62
9
7
R616 0 R0402 +/-5%
33
64
SMDATA1/MSBS
15
23
SMRE#/MSCLK
27
SMDATA2/MSDATA0
19
SMDATA3/MSDATA3
25
SMDATA5/MSDATA2
21
29
SMDATA6/MSDATA1
17
31
For MSPro
13
2
4
6
8
10
12
14
16
18
20
1
2
3
4
1394-CON4P
SKT1
5 6
Reverse Pin define
SDCD# 25
10V, Y5V, +80%/-20%
SMWPD#SDWP
SMWE#/SDCLK
BC127
10pF
*
C0402
50V, NPO, +/-5%
MSINS# 25
R615
0
R0402
+/-5%
BC126 10pFC0402
50V, NPO, +/-5%
*
SMDATA7/SDDAT0 25
SMDATA6/MSDATA1 25
SMDATA5/MSDATA2 25
SMDATA4/SDDAT3 25
SMDATA3/MSDATA3 25
SMDATA2/MSDATA0 25
SMDATA1/MSBS 25
SMDATA0/SDDAT1 25
3D3V_CR_S0 3D3V_CR_S0
C477
1uF
*
C0603
16V, Y5V, +80%/-20%
SMWPD#SDWP 25
C482
0.1uF
*
16V, Y5V, +80%/-20%
C0603
C479
0.1uF
*
C0603
R609
47K
+/-5%
R0603
DUMMY
R611
47K
+/-5%
R0603
DUMMY
R606
47K
+/-5%
R0603
DUMMY
R385
47K
+/-5%
R0603
DUMMY
B_CBB_CE1#
B_CBB_OE#
B_CBB_CE2#
Reserved Layout for Debug used
CBB_RESET
3D3V_S0
Card Reader POWER SWITCH
3D3V_S0
3D3V_S0
R334
10K
11
U14D
74LCX08
R0402
+/-5%
14 7
MC_PWR_CTRL# 25
SM_PWREN#/MSPWREN# 25
12
13
R318
10K
R0402
+/-5%
D S
Q29
2N7002
G
2
3
4
U43
GND
NC
ON/OFF#
AAT4250
3D3V_S0 3D3V_CR_S0
5
IN
1
OUT
C476
1uF
*
C0603
10V, Y5V, +80%/-20%
C480
0.1uF
*
C0402
FOXCONN ND2
Title
16V, Y5V, +80%/-20%
Size Document Number Rev
Date: Sheet of
PCMCIA SLOT / 1394 CONN.
<Doc>
A3
W02
27 44 Saturday, February 19, 2005
SA
Page 28
Close to Pin121,Pin122
X1_LAN
R14
X2_LAN
C25
27pF
C0402
50V, NPO, +/-5%
MDI0+
R16
+/-1%
+/-1%
49.9
49.9
R0402
C29
*
10nFC0402
R29
33
R0402
+/-5%
DUMMY
C61
*
33pF
C0603
50V, NPO, +/-5%
DUMMY
3D3V_S0
ISOLATE
MDI0-
DUMMY
1M R0402 +/-5%
X1
1 2
*
TX close to Lan Chip
R20
RX close to Transform
R0402
16V, X7R, +/-10%
MDI0+ 43
MDI0- 43
MDI1+ 43
MDI1- 43
PCLK_LAN
INT_PIRQF# 19
PCIRST1# 16,19,25,29,32
PCLK_LAN 3
PCI_GNT#2 19
PCI_REQ#2 19
R506
1K
+/-1%
R0402
R505
15K
+/-1%
R0603
PME#_LAN
X-25MHz
*
R25 0 R0402
+/-5% DUMMY
3D3V_LAN_S5
B_ICH_PME# 19,25,33
3D3V_LAN_S5
C24
27pF
C0402
50V, NPO, +/-5%
0 R0402
R507
R31
10K
R0402
+/-5%
DUMMY
Must check Cl=Call
AVDDL
AVDDL
CTRL25
AVDDH
V_12P
AVDDL
AVDDL
ISOLATE
DVDD
LAN_INTA#
+/-5%
PME#_LAN
DVDD
B_PCI_AD31
B_PCI_AD30
B_PCI_AD29
B_PCI_AD28
3D3V_LAN_S5
DTC144EUA
R32 0 R0402
+/-5% DUMMY
R827 value should be 5.6K
at RTL8100CL application,
and 2.49K at RTL8110SBL
application.
R502 5.6K
R0603 +/-1%
U2
1
TX+
2
TX-
3
AVDD33
4
GND
5
RX+
6
RX-
7
AVDD33
8
CTRL25
9
NC
10
NC
11
NC
12
AVDD25
13
NC
14
NC
15
NC
16
NC
17
GND
18
NC
19
NC
20
AVDD33(REG)
21
GND
22
NC
23
ISOLATE#
24
NC
25
INTA#
26
VDD33
27
PCIRST#
28
PCICLK
29
GNT#
30
REQ#
31
PME#
32
VDD25
33
PCIAD31
34
PCIAD30
35
GND
36
PCIAD29
37
PCIAD28
38
GND
RTL8100CL
2
22K ->47K ohm
1 3
Q3
3D3V_LAN_S5
128
GND
LAN_RTSET
127
RSET
+/-5%
3.6K R0402
R501
GND
X2_LAN
122
XTAL2
U35
1
CS
2
SK
3
DI
4
DO
AT93C46-2.7V
X1_LAN
AVDDH
121
XTAL1
VCC
ORG
GND
DVDD
LAN_ACT_LED#
119
120
118
116
117
NC
NC
GND
LED0
DVDD_A
126NC125
NC
TP5
1
CRTL18
EECS_3
EESK
EEDI
EEDO
124
GND
123
RTL8100CL LQFP
PCIAD2739PCIAD2640VDD3341PCIAD2542PCIAD2443CBEB344NC45IDSEL46PCIAD2347NC48PCIAD2249PCIAD2150GND51GND52PCIAD2053VDD2554PCIAD1955VDD3356PCIAD1857PCIAD1758PCIAD1659CBEB260FRAME#61NC62IRDY#63NC
B_PCI_AD26
B_PCI_AD25
B_PCI_AD27
B_PCI_AD23
DVDD
B_PCI_AD24
B_PCI_AD23
LAN_IDSEL
B_PCI_C/BE#3
R508
+/-5%
R0402
DVDD
B_PCI_AD22
10
B_PCI_AD19
B_PCI_AD20
B_PCI_AD21
B_PCI_AD18
19,25,29
3D3V_LAN_S5
8
7
NC
6
5
TP4
TP3
100M_LED#
1
1
1G_LED#
10M_LED#
100M_LED#
113NC112
115
114
NC
LED1
LED2
B_PCI_AD17
B_PCI_AD16
B_PCI_C/BE#2
*
43
DVDD
EEDO
EEDI
EESK
111
109
110
108
NC
NC
EEDI
EESK
64
DVDD
B_PCI_FRAME#
B_PCI_IRDY#
B_PC I _ IRDY# 19,25,29
B_PCI_FRAME# 19,25,29
C3950.1uFC0402
16V, Y5V, +80%/-20%
3D3V_LAN_S5
3D3V_LAN_S5
EECS_3
B_PCI_AD1
B_PCI_AD0
105
106
107
104
103
EECS
EEDO
VDD33
PCIAD0
PCIAD1
19,25,29
LANWAKE
PCIAD2
VDD25
PCIAD3
PCIAD4
PCIAD5
PCIAD6
VDD33
PCIAD7
CBEB0
PCIAD8
PCIAD9
PCIAD10
PCIAD11
PCIAD12
VDD33
PCIAD13
PCIAD14
PCIAD15
VDD25
CBEB1
SERR#
VDD33
PERR#
STOP#
DEVSEL#
TRDY#
CLKRUN#
102
101
GND
100
GND
99
98
97
96
95
94
93
92
91
GND
90
89
88
NC
87
86
85
84
83
82
81
GND
80
GND
79
78
77
76
PAR
75
74
NC
73
NC
72
NC
71
70
69
68
67
66
GND
65
LAN_ACT_LED#
B_PCI_AD2
DVDD
B_PCI_AD3
B_PCI_AD4
B_PCI_AD5
B_PCI_AD6
B_PCI_AD7
B_PCI_AD8
B_PCI_AD9
B_PCI_AD10
B_PCI_AD11
B_PCI_AD12
B_PCI_AD13
B_PCI_AD14
B_PCI_AD15
DVDD
LAN_DAT
LAN_CLK
B_PCI_C/BE#0 19,25,29
R499 330
C396
*
16V, X7R, +/-10%
3D3V_LAN_S5
B_PCI_C/BE#1 19,25,29
B_PCI_PAR 19,25,29
B_PCI_SERR# 19,25,29
1
TP6
1
TP7
B_PCI_PERR# 19,25,29
B_PCI_STOP# 19,25,29
B_PCI_DEVSEL# 1 9,25,29
B_PCI_ TR DY# 19,25,29
B_PM_CLKRUN# 19,25,2 9,3 2,3 3,3 5
R0402 +/-5%
3D3V_S5 3D3V_LAN_S5
3D3V_LAN_S5
*
16V, Y5V, +80%/-20%
DUMMY
CTRL25
B
C397
10uF
0.1uF
*
6.3V, X5R, +/-10%
C0805
C0603
***
ACTIVE_LED# 43
C3990.1uFC0402
E C
Q37
BCP69T1
4
R26
0
C380.1uFC0402
*
16V, Y5V, +80%/-20%
DUMMY
DVDD_A
3D3V_LAN_S5
+/-5%
R0805
C490.1uFC0402
C730.1uFC0402
*
16V, Y5V, +80%/-20%
DUMMY
+/-5%
R0603
R500
0
*
16V, Y5V, +80%/-20%
DUMMY
*
16V, Y5V, +80%/-20%
DUMMY
C310.1uFC0402
*
16V, Y5V, +80%/-20%
16V, Y5V, +80%/-20%
B_PCI_AD[31..0] 19,25,29
L13
BLM18AG601SN1D
C4100.1uFC0402
*
16V, Y5V, +80%/-20%
DUMMY
*
16V, Y5V, +80%/-20%
*
16V, Y5V, +80%/-20%
C4060.1uFC0402
16V, Y5V, +80%/-20%
DUMMY
*
6.3V, X5R, +/-10%
DUMMY
C600.1uFC0402
DUMMY
C4070.1uFC0402
*
C402
10uF
C0805
C4080.1uFC0402
*
*
16V, Y5V, +80%/-20%
16V, Y5V, +80%/-20%
C480.1uFC0402
*
*
16V, Y5V, +80%/-20%
16V, Y5V, +80%/-20%
DUMMY
L1
BLM18AG601SN1D
C470.1uFC0402
2 1
C3980.1uFC0402
*
16V, Y5V, +80%/-20%
C4000.1uFC0402
*
16V, Y5V, +80%/-20%
C500.1uFC0402
*
16V, Y5V, +80%/-20%
C4030.1uFC0402
*
16V, Y5V, +80%/-20%
V_12P
C590.1uFC0402
*
16V, Y5V, +80%/-20%
DVDD
C750.1uFC0402
*
16V, Y5V, +80%/-20%
AVDDL
C4010.1uFC0402
*
16V, Y5V, +80%/-20%
C46
0.1uF
C0402
C4090.1uFC0402
C580.1uFC0402
*
DUMMY
2 1
DVDD
FOXCONN ND2
Title
Size Document Number Rev
A3
Date: Sheet of
LAN RTL8100CL
<Doc>
W02
28 44 Saturday, February 19, 2005
SA
Page 29
3D3V_S0
*
C98
0.1uF
C0402
C418
0.1uF
*
C0402
C416
0.1uF
*
C0402
C104
0.1uF
*
C0402
C136
0.1uF
*
C0402
C124
0.1uF
*
C0402
C149
4.7uF
*
C0805
B_PCI_AD[31..0] 19,25,28
MINI1
RF_KILL# 33
R122
10K
+/-5%
R0402
PCLK_MINI 3
R116
33
R0402
+/-5%
DUMMY
C140
*
33pF
C0603
50V, NPO, +/-5%
DUMMY
802.11_ACT 17
TP33
INT_PIRQG#
1
B_PCI_AD31
B_PCI_AD29
B_PCI_AD27
B_PCI_AD25
B_PCI_AD23
B_PCI_AD21
B_PCI_AD19
B_PCI_AD17
B_PCI_C/BE#2
B_PM_CLKRUN#
B_PCI_C/BE#1
B_PCI_AD14
B_PCI_AD12
B_PCI_AD10
B_PCI_AD8
B_PCI_AD7
B_PCI_AD5
B_PCI_AD3
B_PCI_AD1
3D3V_S0
PCI_REQ#1 19
B_PCI_C/BE#3 19,25,28
B_PCI_C/BE#2 19,25,28
B_PCI_IRDY# 19,25,28
B_PM_CLKRUN# 1 9 ,2 5 ,28,32,33,35
B_PCI_SERR# 19,25,28
B_PCI_PERR# 19,25,28
B_PCI_C/BE#1 19,25,28
5V_S0
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
125
1
2
3
4
5
6
7
8
9
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
MINI-PCI
128 127
PIN 3-16 : LAN RESERVE
B_PCI_AD30
B_PCI_AD28
B_PCI_AD26
B_PCI_AD24 B_PCI_C/BE#3
MOD_IDSEL
B_PCI_AD22
B_PCI_AD20
B_PCI_AD18
B_PCI_AD16
B_PCI_AD15
B_PCI_AD13
B_PCI_AD11
B_PCI_AD9
B_PCI_C/BE#0
B_PCI_AD6
B_PCI_AD4
B_PCI_AD2
B_PCI_AD0
802.11_LINK 17
5V_S0
INT_PIRQG# 19
PCIRST1# 16, 1 9,25,28,32
3D3V_S0
PCI_GNT#1 19
CBUS_PME# 25
R99 10 R0402 +/-5%
B_PCI_AD21
B_PCI_PAR 19,25,28
B_PCI_FRAME# 19,25,28
B_PCI_ TR DY# 19,25,28
B_PCI_STOP# 19,25,28
B_PCI_DEVSEL# 1 9,25,28
B_PCI_C/BE#0 19,25,28
INT_SERIRQ 19,25,32,33,35,36
16V, Y5V, +80%/-20%
5V_S0
*
16V, Y5V, +80%/-20%
DUMMY
C96
4.7uF
10V, Y5V, +80%/-20%
C0805
DUMMY
DUMMY
16V, Y5V, +80%/-20%
DUMMY
16V, Y5V, +80%/-20%
DUMMY
16V, Y5V, +80%/-20%
DUMMY
16V, Y5V, +80%/-20%
DUMMY
10V, Y5V, +80%/-20%
DUMMY
Title
Size Document Number Rev
<Doc>
A3
Date: Sheet
MINIPCI
W02
SA
of
29 44 Saturday, February 19, 2005
FOXCONN ND2
Page 30
FAE suggest
Layout close to Pin6
*Layout*
5V_S0
C549
1uF
*
C0603
16V, Y5V, +80%/-20%
AUD_AGND
PCI_SPKR 25
ICH_SPKR 19
KBC_SPKR 33
CD_AUDR 23
CD_GND 23
CD_AUDL 23
40 mil
U46
1
SHDN#
2
GND
3
IN
MAX8863
BC8822pF
C0402
BC8922pF
C0402
C366
0.47uFC0603
16V, Y5V, +80%/-20%
C377
0.47uFC0603
16V, Y5V, +80%/-20% R664
C381
0.47uFC0603
16V, Y5V, +80%/-20%
LINE_INR_A 31
LINE_INL_A 31
MIC_IN_A 31
*
*
*
CD_AUDR
CD_GND
CD_AUDL
R463
47K
R468
47K
R469
47K
C551
22pF
*
C0402
50V, NPO, +/-5%
5
SET
OUT
5VA_AUD_S0
4
C547
10uF
C0805
*
*
10V, Y5V, +80%/-20%
50V, NPO, +/-5%
*
1 2
X6
*
50V, NPO, +/-5%
R0402 +/-5%
R0402 +/-5%
R0402 +/-5%
R665 0 R0603 +/-5%
R666 0 R0603 +/-5%
R667 0 R0603 +/-5%
X-24D576MHz
ACZ_SDATAIN0 18,32
ACZ_CSYNC 32
ACZ_CRST# 32
AUD_AGND
5VA_AUD_S0
C548
0.1uF
C0402
16V, Y5V, +80%/-20%
C553
10uF
C0805
22K
+/-1%
R0402
*Layout*
20 mil
R678
100K
+/-5%
R0402
R659
28.7K
+/-1%
R0603
R661
10K
+/-5%
R0402
*
10V, Y5V, +80%/-20%
ACZ_CSDATAOUT 32
R660
47 R0402 +/-5%
MDM_AUD_OUT 24
R677
100K
+/-5%
R0402
3D3V_S0
C345
0.1uF
*
C0402
AC97_BTCLK
AC97_SDIN
C365
*
AUD_AGND
CSD_CD_R_2
CSD_GND_2
CSD_CD_L_2
R676
100K
+/-5%
R0402
16V, Y5V, +80%/-20%
X1_AUDIO
X2_AUDIO
*
0.1uF
C0402
16V, Y5V, +80%/-20%
C371
*
0.1uF C0402
C370
0.1uF
C0402
DUMMY
C378 1uF C0603
C379 1uF C0603
C375 1uF C0603
C374 1uF C0603
C373 1uF C0603
C372 1uF C0603
Low for internal CLK
NC for external CLK
R429
0
+/-5%
R0603
1
DVDD1
2
XTL-IN
3
XTL-OUT
4
DVSS1
5
SDATA-OUT
6
BIT-CLK
7
DVSS2
8
SDATA-IN
9
DVDD2
10
SYNC
11
RESET#
12
PC-BEEP
PHONE
*
*
*
*
*
*
S/PDIF 31
TPA1421_SD 31
5VA_AUD_S0
R428
0
+/-5%
R0603
AUD_AGND
DUMMY
47
45
46
48
SPDIFO
SPDIFI/EAPD
PHONE13AUX-L14AUX-R15JD2/VIDEO-L16JD1/VIDEO-R17CD-L18CD-GND19CD-R20MIC121MIC222LINE-IN-L23LINE-IN-R
LINE_IN_R_1
LINE_IN_L_1
MIC1_1
CSD_CD_R_1
CSD_GND_1
CSD_CD_L_1
43
44
42
AVSS2
LFE-OUT
CEN-OUT
JD0/GPIO0
XTLSEL/ID1#
41
40
NC
SURR-OUT-R/HP-OUT-R
38
39
AVDD2
FRONT-OUT-R
FRONT-OUT-L
FRONT-MIC1
SURR-OUT-L/HP-OUT-L
VREFOUT2
FRONT-MIC2/VRDA
VRDA/VRAD
AC97_BTCLK
C343
0.1uF
*
C0402
DUMMY
AUD_AGND
37
MONO-O
AFILT2
AFILT1
VREFOUT
VREF
AVSS1
AVDD1
24
MIC2_1
R443
22
R0402
+/-5%
MDM_AUD_IN 24
U28
ALC655
36
35
34
33
32
31
30
29
28
27
26
25
*
C376
1uF
C0603
ADCX3D
ADRX3D
ADAFL
VRDA
AFLT2
AFLT1
5VA_AUD_S0
AUD_AGND
MIC2 31
AC97_BTCLK_1
BC129
47pF
*
50V, NPO, +/-5%
C0402
DUMMY
C364
0.1uF
*
C0402
16V, Y5V, +80%/-20%
G14
1 2
Close-Power-Gap-3050
G22
1 2
Close-Power-Gap-3050
G21
1 2
Close-Power-Gap-3050
3D3V_S0
5 3
ACZ_CRST#
C348
C351 10nFC0402 DUMMY
C350 1uF C0603
C353 1nF C0402
C352 1nF C0402
ALC100_VREF
*
C355
1uF
C0603
1
2
R442 0
R0402 +/-5%
DUMMY
C347
1nF
50V, X7R, +/-10%
*
*
C0402
50V, X7R, +/-10%
AUD_AGNDAUD_AGND
1nF C0402
50V, X7R, +/-10% DUMMY
*
*
*
*
*
ALC100_VREF
BC92
C356
10uF
C0805
0.1uF
*
C0402
*
10V, Y5V, +80%/-20%
U29
4
NC7SZ08
C346
1nF
C0402
*
*
16V, Y5V, +80%/-20%
AUD_AGND
AUD_AGND
R454 47R0402 +/-5%
R456 47R0402 +/-5%
R457 47R0402 +/-5%
SOUND_R
SOUND_L
C349 0.1uF
C0402 DUMMY
AUD_REF
*
C556
1uF
C0603
R427
0 R0402 +/-5%
R679
0
R0402
+/-5%
SOUND_R 31
SOUND_L 31
AUD_REF
C555
0.1uF
C0402
16V, Y5V, +80%/-20%
ACZ_BTCLK_DJ 32
ACZ_BITCLK 18
ACZ_BTCLK_MDC 24
AUD_AGND
AUD_AGND AUD_AGND AUD_AGND
AUD_AGND
Title
Size Document Number Rev
<Doc>
A3
Date: Sheet
AC97 code
W02
SA
of
30 44 Saturday, February 19, 2005
FOXCONN ND2
Page 31
3D3V_S0
2 1
D16
3
R432
0
+/-5%
R0402
DUMMY
R441
0
+/-5%
R0402
TPA1421_SD 30
MUTE_EN 33
BAV99
DUMMY
SOUND_L 30
VOL_AUDIO
10K R0402 +/-5%
R446
2
1
SOUND_R 30
AUD_REF
AUD_AGND
D50
BAV70PT
R673
4.7K
+/-5%
R0402
EXT_MIC_IN
R458
22K
+/-5%
R0603
SPKR_L+ SPKR_L- SPKR_R- SPKR_R+
5VA_AUD_S0
AUD_AGND
3
SOUND_L
SOUND_L
5V_OP_S5
*
AUD_AGND
3
R447
100K
R0402+/-5%
AUD_AGND
SOUND_R
*
AUD_AGND
10V, Y5V, +80%/-20%
2 1
D15
BAV99
DUMMY
C554
C359
1uF
C0603
AUD_AGND
*
AUD_AGND
C339
5VA_AUD_S0
C368
4.7uF
C0805
DUMMY
*
50V, X7R, +/-10%
*
1uF C0603
10V, X5R, +/-10%
C552
*
0.33uFC0603
10V, X5R, +/-10%
HP_L
L_BYPASS
TPA1421_SD_R
VOL_AUDIO
5V_OP_S5
R_BYPASS
HP_R
C546
1uF
C0603
C340
*
0.33uFC0603
10V, X5R, +/-10%
R422
*
1uF C0603
10V, X5R, +/-10%
R465
4.7K
+/-5%
R0402
DUMMY
R461
1K
+/-5%
R0402
DUMMY
C369
3.9nF
C0603
DUMMY
AUD_AGND
AUD_AGND
2 1
3
R662
22K R0402 +/-1%
R663
10K R0402 +/-5%
R423
10K R0402 +/-5%
22K R0402 +/-1%
C558
4.7uF
*
C0805
10V, Y5V, +80%/-20%
DUMMY
R473
2.2K
R0402 +/-5%
DUMMY
D14
BAV99
DUMMY
17
23
18
19
20
21
R_LINE_IN SOUND_R
HP_R
5VA_AUD_S0
AUD_AGND
2 1
D13
BAV99
3
DUMMY
150pF C0603 50V, NPO, +/-5%
HP_L
C357
*
R448 33K R0603 +/-1%
L_LINE_IN
C354
25V, NPO, +/-5%
*
220pF C0402
R444
22K R0402 +/-1%
U27
4
LLINEIN
5
LHPIN
6
LBYPASS
7
LVDD
8
SHUTDOWN
2
TJ
HP-IN
VOL
RVDD
RBYPASS
RHPIN
RLINEIN
G1421BF3U
GND
25
AUD_AGND
22K R0402 +/-1%
R424
C341
220pF C0402
R425 33K R0603 +/-1%
C337
150pF C0603 50V, NPO, +/-5%
LOUT+
LOUT-
SE/BTL#
HP/LINE#
MUTEIN
MUTEOUT
GND/HS
GND/HS
GND/HS
GND/HS
ROUT-
ROUT+
25V, NPO, +/-5%
*
*
3
10
14
16
11
9
1
12
13
24
15
22
Near MIC connector
+/-5%
AUD_AGND AUD_AGND
C380 470pF C0402
R669
0 R0603
U31
1
IN+
VDD
2
VSS
IN-3OUT
MAX4490
DUMMY
R471
*
DUMMY
DUMMY
0 R0402 +/-5%
25V. X7R, +/-10%
R674
47K
+/-5%
R0402
DUMMY
R668
47K
+/-5%
R0402
DUMMY
EXT_MICIN_2
SPKR_L+
SPKR_L-
SPKR_RSPKR_R+
5VA_AUD_S0
5
4
AUD_AGND
R675
22K R0402 +/-1%
DUMMY
SPKR_L+
SPKR_LSPKR_R+
SPKR_R-
HP_IN
AUD_AGND
R445
10K
+/-5%
R0402
AUD_AGND
MIC_IN_A 30
G13
1 2
Close-Power-Gap-3050
G12
1 2
Close-Power-Gap-3050
G11
1 2
Close-Power-Gap-3050
G10
1 2
Close-Power-Gap-3050
C2411nF C0402 50V, X7R, +/-10% DUMMY
*
C2401nF C0402 50V, X7R, +/-10% DUMMY
*
C2371nF C0402 50V, X7R, +/-10% DUMMY
*
C2391nF C0402 50V, X7R, +/-10% DUMMY
*
5V_OP_S5
R421
100K
+/-5%
R0402
Q35
DTC144EUA
HP_IN#
2
1 3
AUD_AGND
SPK1
SPKR_L+
SPKR_L-
SPKR_RSPKR_R+
6
1
2
3
4
5
HS8204E
5V_OP_S5
HP_IN#
AUD_AGND
16V, Y5V, +80%/-20%
AUD_AGND_S AUD_AGND
Line-Out
R474
10K
+/-5%
R0402
C383
0.1uF
*
OPEN-POWER-GAP-3050
C0402
SPKR_L+
SPKR_R+
G15
1 2
R_BYPASS
L_BYPASS
AUD_REF
MIC2 30
LINE_INR_A 30
LINE_INL_A 30
TC18100uF CTD 6.3V, +/-20%
TC19100uF CTD 6.3V, +/-20%
C338
1uF C0603 10V, X5R, +/-10%
C358
1uF C0603 10V, X5R, +/-10%
R672
4.7K
+/-5%
R0402
R671
22K
+/-5%
R0603
AUD_AGND AUD_AGND
R472
4.7K
+/-5%
R0402
DUMMY
AUD_AGND
AUD_AGND
HP_IN
AUD_AGND
AUD_AGND
*
*
R658
5V_OP_S5
*
5V_S0
*
AUD_AGND
R670
+/-5%
0 R0603
EXT_MIC_IN
*
C557
680pF
C0402
50V, X7R, +/-10%
R464 1K
R0402 +/-5%
R485 1K
R0402 +/-5%
R466
4.7K
+/-5%
R0402
DUMMY
SPKR_L+2 SPKR_L_1
SPKR_R+2
AUD_AGND
*
C382
680pF
C0402
AUD_AGND AUD_AGND
U30
2
GND
3
NC
4
ON/OFF#
AAT4250
S/PDIF 30
R45322R0402
R44922R0402
R450
R452
1K
1K
+/-5%
+/-5%
R0402
R0402
50V, X7R, +/-10%
C363680pFC0402DUMMY
+/-5%
+/-5%
R483 0 R0402 +/-5%
*
50V, X7R, +/-10%
AUD_AGND
R462 0
R0603 +/-5%
R484 0
R0603 +/-5%
*
50V, X7R, +/-10%
IN
OUT
*
SPKR_R_1
*
C360
680pF
C0402
AUD_AGND
0
R0805
+/-5%
C367
680pF
C0402
5
1
50V, X7R, +/-10%
C0402
C384
680pF
*
50V, X7R, +/-10%
AUD_AGND
*
AUD_AGND
AUD_AGND_S
AUD_AGND_S
5V_OP_S5
S/PDIF_PWR
0.1uF
*
C362
C0402
AUD_AGND
R451
0 R0402 +/-5%
R459 0
R0603 +/-5%
R0603 +/-5%
R467 0
C361
680pF
C0402
C545
4.7uF
10V, Y5V, +80%/-20%
C0805
Line-In
AUD_AGND_S
FOXCONN ND2
Title
Size Document Number Rev
<Doc>
A3
Date: Sheet of
Audio AMP and Jack
W02
MIC-In
JK1
5
4
3
6
2
1
MIC-IN
JK2
5
4
3
6
2
1
AUDIO-LINE-IN
SPKR_L_2
SPKR_R_2
AUD_AGND_S AUD_AGND
31 44 Saturday, February 19, 2005
LOUT1
9
GND
8
VCC
7
VIN
10
6
5
4
2
3
1
S-PDIF
SA
Page 32
3D3V_S0
RN39
1
*
3
5
7 8
10K 8P4R0603 +/-5%
RN32
1
*
3
5
7 8
10K 8P4R0603 +/-5%
VOL_UP#
VOL_DOWN#
STOP/EJECT#
PLAY/PAUSE#
FW/SCAN_FW#
REW/SCAN_REW #
2
VOL_UP#
4
VOL_DOWN#
6
MP3_MEDIASEL
FW/SCAN_FW#
2
REW/SCAN_REW #
4
STOP/EJECT#
6
PLAY/PAUSE#
RN30
1
*
3
5
7 8
4708P4R0603 +/-5%
R405
R401 470 R0402
470 R0402
2
4
6
CLK33_AUDIODJ 3
VOL_UP#_CN
VOL_DOWN#_CN
STOP/EJECT#_CN
PLAY/PAUSE#_CN
FW/SCAN_FW#_CN
REW/SC AN_REW #_CN
33
R0402
+/-5%
DUMMY
C522
*
33pF
C0603
50V, NPO, +/-5%
DUMMY
B_LPC_LAD0 18,33,35,36
B_LPC_LAD1 18,33,35,36
B_LPC_LAD2 18,33,35,36
B_LPC_LAD3 18,33,35,36
ACZ_RST# 18,24
ACZ_CRST# 30
ACZ_SYNC 18,24
ACZ_CSYNC 30
ACZ_SDATAIN0 18,30
ACZ_CSDATAOUT 30
ACZ_SDATAOUT 18,24
ACZ_BTCLK_DJ 30
VOL_UP#_CN 43
VOL_DOWN#_CN 43
STOP/EJECT#_CN 43
PLAY/PAUSE#_CN 43
FW/SCAN_FW#_CN 43
REW/SCAN_REW#_CN 43
B_PM_CLKRUN# 1 9 ,2 5 ,28,29,33,35
INT_SERIRQ 19 ,2 5 ,29,33,35,36
LPC_LDRQ1# 18
B_LPC_LFRAME# 18,33,35,36
PCIRST1# 16,19,25,28,29
B_LPC_LAD0
B_LPC_LAD1
B_LPC_LAD2
B_LPC_LAD3
7
6
4
3
13
14
15
16
18
22
21
19
LAD0
LAD1
LAD2
LAD3
HRST#
CRST#
HSYNC
CSYNC
CSDATA_IN
CSDATA_OUT
HSDATA_OUT
CBIT_CLK
2
LRESET#
GND
8
9
20
10
LCLK
GND
32
LFRAME#
GND
11
1
LDRQ#
GND
44
IRQ
12
CLKRUN#
3D3V_S0
C321
C323
C316
0.1uF
*
C0402R636
U44
SEG0
SEG1
SEG2
SEG3
SEG4
SEG5
SEG6
SEG7
SEG8
SEG9
SEG10
SEG11
COM0
COM1
CLK32K
OZ263T
31
DUMMY
NOTUS_CLK
MP3_MEDIASEL
0.1uF
C0402
43
39
40
42
38
35
36
37
48
45
46
47
33
34
*
*
5
17
29
41
VCC
VCC
VCC
VCC
VOL_UP#23VOL_DOWN#24MEDIA_SEL
STOP/EJECT#26PLAT/PAUSE#27FW/SCAN_FW#
REW/SCAN_REW#
25
28
30
VOL_DOWN#
VOL_UP#
STOP/EJECT#
PLAY/PAUSE#
FW/SCAN_FW#
REW/SCAN_REW #
0.1uF
C0402
SEG0
SEG1
SEG2
SEG3
SEG4
SEG5
SEG6
SEG7
SEG8
SEG9
SEG10
SEG11
COM0
COM1
*
3D3V_S0
*
C322
0.1uF
C0402
C320
0.1uF
C0402
EMI
RN31
SEG1
1
*
SEG2
3
SEG3
5
SEG0
7 8
100
8P4R0603
RN33
SEG5
1
*
SEG6
3
SEG7
5
SEG4
7 8
100
8P4R0603
RN38
SEG8
1
*
SEG11
3
SEG10
5
SEG9
7 8
100
8P4R0603
R411
10K
+/-5%
5
VCC
4
Y
R0402
U24
GND
NC7SZ14
NOTUS_CLK_RC
NC
A
+/-5%
+/-5%
+/-5%
1
2
3
2
4
6
2
4
6
2
4
6
*
DJ_SEG1
DJ_SEG2
DJ_SEG3
DJ_SEG0
DJ_SEG5
DJ_SEG6
DJ_SEG7
DJ_SEG4
DJ_SEG8
DJ_SEG11
DJ_SEG10
DJ_SEG9
C334
4.7nF
50V, X7R, +/-10%
C0603
DJ_SEG1 43
DJ_SEG2 43
DJ_SEG3 43
DJ_SEG0 43
DJ_SEG5 43
DJ_SEG6 43
DJ_SEG7 43
DJ_SEG4 43
DJ_SEG8 43
DJ_SEG11 43
DJ_SEG10 43
DJ_SEG9 43
ESD
VOL_UP#_CN
VOL_DOWN#_CN
STOP/EJECT#_CN
PLAY/PAUSE#_CN
FW/SCAN_FW#_CN
REW/SC AN_REW #_CN
MP3_PWRBTN#_CN
(Check)
C510470pFC0402
*
C516470pFC0402
*
C523470pFC0402
*
C525470pFC0402
*
C530470pFC0402
*
C533470pFC0402
*
C536470pFC0402
*
For Non-MP3 Model
PUT INSIDE OZ263
ACZ_SDATAOUT
ACZ_SYNC
ACZ_RST#
R395 0 R0402 +/-5%
R384 0 R0402 +/-5%
R380 0 R0402 +/-5%
ACZ_CSDATAOUT
ACZ_CSYNC
ACZ_CRST#
3D3V_S0
R387
10K
+/-5%
R0402
R393
10K
+/-5%
R0402
COM1
3D3V_S0
R382
10K
+/-5%
R0402
R381
10K
+/-5%
R0402
COM0
MP3 POWER BUTTON
3D3V_AUX_S5
R592
10K
+/-5%
R0402
COM0 43 COM1 43
MP3_PWRBTN#_CN 43
MP3_PWRBTN#_CN
R591 470
MP3_PWRBTN# 33
C466
0.1uF
R0402+/-5%
*
C0402
Title
Size Document Number Rev
<Doc>
A3
Date: Sheet
FOXCONN ND2
OZ263
W02
SA
of
32 44 Saturday, February 19, 2005
Page 33
Rev 1.1:
1. Change RS232 NTXD/NRXD connection
2. Change PS/2 interface pull-up to VCC5
3. Change Flash ROM Power to VCC3_ALWAYS
4. Change HW strap pull-up to
VCC3_ALWAYS
Rev 1.2
1. Change SRAM to 128Kx8
Rev 1.3
1. Fix FAN1PWM and FAN2PWM Pin#
Rev 1.4
1. Correct HW Strap pin 124 to pin 125
INT_SERIRQ 19 ,2 5 ,29,32,35,36
B_LPC_LFRAME# 18,32,35,36
B_LPC_LAD0 18,32,35,36
B_LPC_LAD1 18,32,35,36
B_LPC_LAD2 18,32,35,36
B_LPC_LAD3 18,32,35,36
PCLK_KBC
R583
33
R0402
+/-5%
DUMMY
C464
*
33pF
C0603
50V, NPO, +/-5%
DUMMY
3D3V_S5
R217
10K
+/-5%
R0402
TP110
TP71
TP72
TP73
BT+SENSE 43
BAT_TH 43
DUMMY
R22
15K
+/-1%
R0603
R17
10K
+/-5%
R0603
10K
+/-5%
R0603
DUMMY
R11
R23 1K
R0402 +/-5%
Pull-Dow n res istor required
to avoid leakage current
3D3V_AUX_S5
POWER-ON RESET
Example Only
COVERUP
5V_S0
1
1
1
1
R13
39K
+/-1%
R0603
*
10K
BAT_TYPE
C45
*
0.1uF
C0402
16V, Y5V, +80%/-20%
C17
0.1uF
C0402
16V, Y5V, +80%/-20%
R12
+/-5%
R0603
R282 47K
R0402 +/-5%
B_ICH_PME# 19,25,28
R231
10K
+/-5%
R0402
R18
100K
+/-1%
R0603
R230
10K
+/-5%
R0402
PCLK_KBC 3
PLT_RST1# 7,14,19,21,23,35,36
R229
10K
+/-5%
R0402
ECRST#
R232
10K
+/-5%
R0402
R259
10K
+/-5%
R0402
R280
0
R0603
+/-5%
DUMMY
PSCLK2
PSDAT2
PSCLK3
PSDAT3
*
3D3V_AUX_S5
BC63
0.1uF
25V, Y5V, +80%/-20%
C0603
When GM replace to PM
BT+SENSE_KBC BT+_BAT
0 ohm
R240 0 R0402
+/-5% DUMMY
R238
0 R0402 +/-5%
DUMMY
THERM_ALERT#_GPIO8 14
GMCH_BL_ON 7
ATI_BL_ON 14
AD_OFF
R24
10K
+/-5%
R0402
16V, Y5V, +80%/-20%
B_PM_CLKRUN# 1 9 ,2 5 ,28,29,32,35
PM_SUS_STAT# 19
H_RCIN# 18
H_A20GATE 18
SMC_RUNTIME_SCI# 19
R283
10K
+/-5%
R0402
MP3_PWRBTN# 32
TP117
1
AC_IN 42
COVERUP 43
EC_PWRBTN# 43
TP75
KBC_MATRIX1 34
KBC_MATRIX0 34
S0_EN 14,21,23,37,40,41,42
S3_EN 41
PM_SLP_S3#_ICH 19
PM_SLP_S4#_ICH 19
S0_EN_D 40
S5_EN 22,23
RF_KILL# 29
EC_BLON 17
GMODULE_RST# 14
RTC_SENSE# 18
SMC_WAKE_SCI#_R 19
SMC_EXTSMI#_R 19
BC36
0.1uF
C0402
KROW1 34
KROW2 34
KROW3 34
KROW4 34
KROW5 34
KROW6 34
KROW7 34
KROW8 34
TP78
TP80
TP116
KCOL1 34
KCOL2 34
KCOL3 34
KCOL4 34
KCOL5 34
KCOL6 34
KCOL7 34
KCOL8 34
KCOL9 34
KCOL10 34
KCOL11 34
KCOL12 34
KCOL13 34
KCOL14 34
KCOL15 34
KCOL16 34
TCLK 34
TDATA 34
TP81
TP79
TP77
3D3V_AUX_S5
*
KROW1
KROW2
KROW3
KROW4
KROW5
KROW6
KROW7
KROW8
KCOL17
1
KCOL18
1
BAT_IN2#
BT+SENSE_KBC
BAT_TYPE
BT_IN#
1
1
BL_ONF_NB_VGA
MP3PWR_ON#
1
MP3BT_ON#
1
BL#2
1
AD_OFF 43
CHGON#/OFF 43
DEPOP
U13
161
VCCBAT
17
GND
35
GND
46
GND
122
GND
137
GND
167
GND
159
BATGND
7
SERIRQ
9
LFRAME#
15
LAD0
14
LAD1
13
LAD2
10
LAD3
18
LCLK
25
CLKRUN#/GPIO0C
24
GPIO0B
165
LRST#/GPIO2C
6
KBRST#/GPIO03
5
GA20/GPIO02
31
ECSCI#
19
ECRST#
71
KSI0/GPIK0
72
KSI1/GPIK1
73
KSI2/GPIK2
74
KSI3/GPIK3
77
KSI4/GPIK4
78
KSI5/GPIK5
79
KSI6/GPIK6
80
KSI7/GPIK7
49
KSO0/GPOK0
50
KSO1/GPOK1
51
KSO2/GPOK2
52
KSO3/GPOK3
53
KSO4/GPOK4
56
KSO5/GPOK5
57
KSO6/GPOK6
58
KSO7/GPOK7
59
KSO8/GPOK8
60
KSO9/GPOK9
61
KSO10/GPOK10
64
KSO11/GPOK11
65
KSO12/GPOK12
66
KSO13/GPOK13
67
KSO14/GPOK14
68
KSO15/GPOK15
153
KSO16/GPOK16
154
KSO17/GPOK17
2
GPWU0
26
GPWU1
29
GPWU2
30
GPWU3
44
GPWU4
76
GPWU5
172
GPWU6/TIN1
176
GPWU7/TIN2/FANFB2
110
PSCLK1
111
PSDAT1
114
PSCLK2
115
PSDAT2
116
PSCLK3
117
PSDAT3
81
AD0/GPIAD0
82
AD1/GPIAD1
83
AD2/GPIAD2
84
AD3/GPIAD3
87
AD4/GPIAD4
88
AD5/GPIAD5
89
AD6/GPIAD6
90
AD7/GPIAD7
28
GPIO0E
27
GPIO0D
175
TOUT2/GPIO2F
8
GPIO04
11
GPIO05/FAN3PWM
12
GPIO06/FANFB3
20
GPIO07
21
GPIO08
22
GPIO09
48
GPIO10
62
GPIO13
63
GPIO14
69
GPIO15
70
GPIO16
75
GPIO17
109
GPIO24
118
GPIO25
119
GPIO26
148
GPIO27
149
GPIO28
155
GPIO29
156
GPIO2A
162
GPIO2B
168
GPIO2D
Power
Power
XIOCCS#/GPIO1C
XIODCS#/GPIO1D
Expanded I/O Debug Clock
LPC Interface
X-BUS Interface
Internal KeyBoard
SMbus
GPW
PWM2/GPOW2/FAN1PWM
PWD
PWM7/GPOW7/FAN2PWM
PS2
FANFB1/TOUT1/GPIO2E
CAPLOCK#/GPIO11
FNLOCK#/GPIO12
SCROLLLOCK#/GPIO0F
A to D
NUMLOCK#/GPIO0A
D to A
GPIO
E51RXD/GPIO21/ISPCLK
E51TXD/GPIO22/ISPDAT
E51CS#/GPIO20/ISPEN_TP
KB3910
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCCA
AGND
XIO8CS#/GPIO18
XIO9CS#/GPIO19
XIOACS#/GPIO1A
XIOBCS#/GPIO1B
XIOECS#/GPIO1E
XIOFCS#/GPIO1F
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20/GPIO23
RD#
WR#
IOCS#
MEMCS#
SCL1
SDA1
SCL2
SDA2
PWM0/GPOW0
PWM1/GPOW1
PWM3/GPOW3
PWM4/GPOW4
PWM5/GPOW5
PWM6/GPOW6
DA0/GPODA0
DA1/GPODA1
DA2/GPODA2
DA3/GPODA3
DA4/GPODA4
DA5/GPODA5
DA6/GPODA6
DA7/GPODA7
E51IT0/GPIO00
E51IT1/GPIO01
XCLKO
XCLKI
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
D0
D1
D2
D3
D4
D5
D6
D7
16
34
45
123
136
157
166
95
96
85
86
CHG_LED2#
91
EMAIL_LED#
92
PWR_LED#
93
BT_LED#
94
INTERNET_LED#
97
98
124
125
126
127
128
131
132
133
143
142
135
134
130
129
121
120
113
112
104
103
108
138
139
140
141
144
145
146
147
150
151
152
173
163
164
169
170
32
33
36
37
38
39
40
43
171
54
55
41
23
99
100
101
102
1
42
47
174
3
4
106
107
GPIO20
105
160
158
3D3V_AUX_S5
BC42
1uF
*
10V, X7R, +/-10%
C0805
TP113
1
A0/ENV0 36
A1/ENV1 36
A2/BADDR0 36
A3/BADDR1 36
A4/TRIS 36
A5 36
A6 36
A7 36
A8 36
A9 36
A10 36
A11 36
A12 36
A13 36
A14 36
A15 36
A16 36
A17 36
A18 36
KBC_D0 36
KBC_D1 36
KBC_D2 36
KBC_D3 36
KBC_D4 36
KBC_D5 36
KBC_D6 36
KBC_D7 36
KBCBIOS_FRD# 36
KBCBIOS_FWR# 36
KBCBIOS_MEMCS# 36
B_KBC_SCL1 14,22
B_KBC_DAT1 14,22
BAT_KBC_SCL1 43
BAT_KBC_DAT1 43
BRIGHTNESS_PWM 17
KBC_SPKR 30
R281
100K
R0402
+/-5%
CAPS# 17
NUM# 17
TP108
1
TP115
1
TP111
1
X1_KBC
X2_KBC
BC46
10pF
C0402
50V, NPO, +/-5%
BC43
0.1uF
*
10V, X7R, +/-10%
C0402
STBY_LED# 17
CHG_LED# 17
TP114
1
PWR_LED# 17,43
1
TP112
1
TP109
KBCBIOS_IOCS#
For External Debug
X3
XTAL-32.768kHz
4 1
*
L6
2 1
FB L0805 100 Ohm
*
G9
1 2
Close-Power-Gap-3050
TP76
1
PWRBTN#_ICH 19
MUTE_EN 31
BC47
*
10pF
2 3
C0402
50V, NPO, +/-5%
TC16
10uF
12.5V, +/-20%
CTB
HW STRAP OPTION
3D3V_AUX_S5
R235
47K
+/-5%
R0402
A4/TRIS
A4 GPIO20
S0_EN S3_EN
R286
4.7K
+/-5%
R0402
R233
100K
+/-5%
R0402
R287
4.7K
+/-5%
R0402
GPIO20
A1/ENV1
R239
4.7K
+/-5%
R0402
GPIO05 GPIO06 A1
3D3V_AUX_S5
RN27 4.7K
KBC_D3
1
2
*
KBC_D2
3
5
7 8
8P4R0603+/-5%
RN29 4.7K
1
*
3
5
7 8
8P4R0603+/-5%
4
6
2
4
6
KBC_D1
KBC_D0
KBC_D7
KBC_D6
KBC_D5
KBC_D4
FOXCONN ND2
Title
Size Document Number Rev
<Doc>
A3
Date: Sheet
KBC ENE3910
W02
of
33 44 Saturday, February 19, 2005
SA
Page 34
TouchPad Connector
5V_S0
Internal Ke yBoard Connector
KROW8 33
KROW7 33
KROW6 33
KROW5 33
KROW4 33
KROW3 33
KROW2 33
KROW1 33
KCOL16 33
KCOL15 33
KCOL14 33
KCOL13 33
KCOL12 33
KCOL11 33
KCOL10 33
KCOL9 33
KCOL8 33
KCOL7 33
KCOL6 33
KCOL5 33
KCOL4 33
KCOL3 33
KCOL2 33
KCOL1 33
KBC_MATRIX1 33
KBC_MATRIX0 33
KROW8
KROW7
KROW6
KROW5
KROW4
KROW3
KROW2
KROW1
KCOL16
KCOL15
KCOL14
KCOL13
KCOL12
KCOL11
KCOL10
KCOL9
KCOL8
KCOL7
KCOL6
KCOL5
KCOL4
KCOL3
KCOL2
KCOL1
KBC_MATRIX1
KBC_MATRIX0
E8528SE-03
KB1
29 30
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
5V_S0
TDATA 33
TCLK 33
R0402
+/-5%
C219
33pF
50V, NPO, +/-5%
C0603
R196
10K
*
R197
10K
R0402
+/-5%
C220
33pF
*
50V, NPO, +/-5%
C0603
C218
0.1uF
*
16V, Y5V, +80%/-20%
C0603
TDATA
TCLK
TPAD1
1
2
3
4
5
6
E6506S0-03
C217
1uF
*
10V, Y5V, +80%/-20%
C0603
3D3V_S0
R218 10K R0402 +/-5%
R219 10K R0402 +/-5%
KBC_MATRIX0
KBC_MATRIX1
Keyboard matrix ( from vendor )
MATRIXID1#
MATRIXID2#
1
00 1
1 1
Ohter Eur
Jap US
00
Title
Size Document Number Rev
<Doc>
A3
Date: Sheet
KB Conn.
W02
SA
of
34 44 Saturday, February 19, 2005
FOXCONN ND2
Page 35
3D3V_S0
3D3V_S0
IR1
TFDU6102
R470 7.5
R0603 +/-5%
R680 3.3
R0603 +/-5%
VCC2/IRED_ANODE
IRED_CATHODE
TXD
RXD
VCC1
MODE
GND
3D3V_S0
*
10V, Y5V, +80%/-20%
SD
BC130
10uF
C0805
3D3V_S0
R431
100K
+/-5%
R0402
LPCPD#
B_LPC_LAD0 18,32,33,36
B_LPC_LAD1 18,32,33,36
B_LPC_LAD2 18,32,33,36
B_LPC_LAD3 18,32,33,36
PLT_RST1# 7,14,19,21,23,33,36
B_LPC_LFRAME# 18,32,33,36
LPC_LDRQ0# 18,36
B_PM_CLKRUN# 19,25,28,2 9,3 2,3 3
INT_SERIR Q 19,25,29,32,33,36
SIO_14M 3
R657
33
R0402
+/-5%
DUMMY
C550
*
33pF
C0603
50V, NPO, +/-5%
DUMMY
PCLK_SIO 3
BC84
BC91
0.1uF
*
C0402
44
DCD1#
45
DSR1#
46
SIN1
47
RTS1#
48
SOUT1
1
CTS1#
2
DTR1#_BOUT1
3
RI1#
4
NC
6
R455
100K
+/-5%
+/-5%
R0402
IRRX1
10R0402
1
2
3
4
5
6
7
8
3D3V_FIR_S0
IRTX
FIRSL0 IRRX2
R681
R682
10K
+/-5%
R0402
BC131
0.1uF
*
C0402
16V, Y5V, +80%/-20%
5
7
29
42
41
39
37
18
33
31
26
IRTX
IRRX1
IRRX2_IRSL0
NC
NC
NC
NC
NC
NC
NC
NC
NC
10
VCOREF
8
16V, Y5V, +80%/-20%
VDD1
VDD224VDD2
LDRQ#/XOR_OUT
LPCPD#/GPIO21
CLKRUN#/GPIO22
VSS334VSS223VSS1
9
C0402
35
LFRAME#
0.1uF
U26
LAD0
LAD1
LAD2
LAD3
LCLK
LRESET#
SERIRQ
CLKIN
GPIO0
GPIO01
GPIO2
GPIO3
GPIO4
GPIO20
GPIO24
GPIO23
PC87381
BC90
*
C0402
16V, Y5V, +80%/-20%
32
36
38
40
25
27
30
16
21
19
28
43
11
12
13
14
15
17
20
22
0.1uF
*
LPCPD#
BC85
0.1uF
C0402
16V, Y5V, +80%/-20%
*
16V, Y5V, +80%/-20%
R430
33
R0402
+/-5%
DUMMY
C344
*
33pF
C0603
50V, NPO, +/-5%
DUMMY
Title
Size Document Number Rev
<Doc>
A3
Date: Sheet
SIO NS87381
W06N
SA
of
35 44 Saturday, February 19, 2005
FOXCONN ND2
Page 36
A0/ENV0 33
A1/ENV1 33
A2/BADDR0 33
A3/BADDR1 33
A4/TRIS 33
A5 33
A6 33
A7 33
A8 33
A9 33
A10 33
A11 33
A12 33
A13 33
A14 33
A15 33
A16 33
A17 33
KBCBIOS_MEMCS# 33
KBCBIOS_FRD# 33
A18 33
KBCBIOS_FWR# 33
2N7002EPT
A5 Status.
H : Internal BIOS.
L : External BIOS.
3D3V_AUX_S5
3D3V_AUX_S5
D S
Q20
A5
C256
0.1uF
*
16V, Y5V, +80%/-20%
C0402
5V_AUX_S5
R237
4.7K
+/-5%
R0402
G
R234
20K
+/-5%
R0402
R236
10K
+/-5%
R0402
512KB Flash
U12
32
VCC
12
A0
11
A1
10
A2
9
A3
8
A4
7
A5
6
A6
5
A7
27
A8
26
A9
23
A10
25
A11
4
A12
28
A13
29
A14
3
A15
2
A16
30
A17
22
CE
24
OE
1
VPP
31
PGM
16
GND
PLCC-32-SKT
A5/SHBM
DEBUG GOLDEN FINGER
GOLDEN FINGER FOR DEBUG BOARD
KBC_D0
13
O0
KBC_D1
14
O1
KBC_D2
15
O2
KBC_D3
17
O3
KBC_D4
18
O4
KBC_D5
19
O5
KBC_D6
20
O6
KBC_D7
21
O7
KBC_D0 33
KBC_D1 33
KBC_D2 33
KBC_D3 33
KBC_D4 33
KBC_D5 33
KBC_D6 33
KBC_D7 33
5V_S0
1
3D3V_S0
PLT_RST1#
B_LPC_LFRAME#
A5/SHBM
PCLK_FWH
GND
FWH_INIT#
GND
B_LPC_LAD3
B_LPC_LAD2
B_LPC_LAD1
B_LPC_LAD0
NC2
GND
INT_SERIRQ
LPC_LDRQ0#
NC1
Boot Device must have ID[3:0] = 0000
Has internal pull-down resistors
All may be left floated
FPET7 Elec. P3-46
PLT_RST1# 7,14,19,21,23,33,35
B_LPC_LFRAME# 18,32,33,35
PCLK_FWH 3
FWH_INIT# 18
B_LPC_LAD3 18,32,33,35
B_LPC_LAD2 18,32,33,35
B_LPC_LAD1 18,32,33,35
B_LPC_LAD0 18,32,33,35
INT_SERIRQ 19 ,2 5 ,29,32,33,35
LPC_LDRQ0# 18,35
TP99
CN3
GF
35 36
31 32
29 30
27 28
25 26
23 24
21 22
19 20
17 18
15 16
13 14
11 12
9 10
7 8
5 6
3 4
1 2
33 34
top bot
top bot
LPC36P-GF
3D3V_S0
NC1
LPC_LDRQ0#
INT_SERIRQ
GND
NC2
1
B_LPC_LAD0
B_LPC_LAD1
B_LPC_LAD2
B_LPC_LAD3
GND
FWH_INIT#
GND
PCLK_FWH
A5/SHBM
B_LPC_LFRAME#
PLT_RST1#
5V_S0
TP91
R370
33
R0402
+/-5%
DUMMY
C297
*
33pF
C0603
50V, NPO, +/-5%
DUMMY
TOP VIEW(1.3...35)
BOTTOM VIEW(2.4..36)
35
31
3
1
33
TOP view
....
....
Title
Size Document Number Rev
<Doc>
A3
Date: Sheet
BIOS /Debug
W02
SA
of
36 44 Saturday, February 19, 2005
FOXCONN ND2
Page 37
Run Power
15VSWPWR_S5
R45
10K
+/-5%
R0402
R44
330K
+/-5%
R0402
BOM change
15VS
S D
15VG
G
R43
1K
+/-5%
R0402
Q5
TP0610K
*
5V_S0
DRVTOS0
R50
3D3V_S0
330K
C0603
50V, Y5V, +80%/-20%
+/-5%
R0402
C412
0.1uF
U36
Si4800BDY
G
4 5
S
3
S
2
S
1
U10
Si4800BDY
G
4 5
S
3
S
2
S
1
D
D
6
D
7
D
8
D
D
6
D
7
D
8
5V_S5
3D3V_S5
S01N#
D S
Q4
S0_EN 14,21,23,33,40,41,42
G
2N7002
1D8V_S0
2D5V_S0
U6
Si4800BDY
G
4 5
S
3
S
2
S
1
1D8V_S3
D
D
6
D
7
D
8
Populate
R563
10K
+/-1%
R0402
R564
10K
+/-1%
R0402
3D3V_S0
BC112
BC111
I max = 120 mA
U41
1
SHDN#
2
GND
3
IN
1uF
*
G913C
C060310V, Y5V, +80%/-20%
SET
OUT
5
4
BC113
22pF
*
C0603
50V, NPO, +/-5%
1uF
*
C060310V, Y5V , + 80%/-20%
Title
Size Document Number Rev
<Doc>
A3
Date: Sheet
PWRPLANE&RESETLOGIC
W02
37 44 Saturday, February 19, 2005
SA
of
FOXCONN ND2
Page 38
5
*
BC74
100pF
50V, NPO, +/-5%
C0402
DUMMY
2 1
PSI# 4
R277
100
+/-5%
R0402
R266
100
+/-5%
R0402
R331
130K
+/-5%
R0603
HYS
CLSET
R330
130K
+/-5%
R0603
*
50V, Y5V, +80%/-20%
D22
CH501H-40
3D3V_S0
R313
100K
+/-5%
R0402
VREF
HYS
CLSET
PR2 0+/-5% R0402
PR8 0+/-5% R0402
PR3 0+/-5% R0402
PR6 0+/-5% R0402
PR4 0+/-5% R0402
PR7 0+/-5% R0402
PR5 0+/-5% R0402
3D3V_S0
R328
10K
+/-5%
R0402
R289
10
+/-5% R0805
1 2
C267
*
10nF
C0402
5
VREF
BC72
1nF
50V, X7R, +/-10%
C0402
R285
0
+/-5%
R0402
VR_ON
1
2
3
4
5
6
7
8
9
10
11
R293
680
+/-5%
R0402
R275
10
+/-5%
1 2
C262
R0805
*
10nF
C0402
SC452_P+
50V, Y5V, +80%/-20%
BC68
0.1uF
C0603
R304
100
+/-5%
R0402
*
CLKEN#
VREF
HYS
CLSET
VID6
VID5
VID4
VID3
VID2
VID1
VID0
45
DRP- 39
DRP+ 39
R322
100
+/-5%
R0402
BC71
0.1uF
C0603
SC452_P+
VPN1
44
43
42
VPN1
DPRSL
SC452
VPN2
SC452_P+
SC452_VROK
*
BST1
VIN1
VIN214VPN213PWRGD12GND
BST2
5V_S0
*
BC67
1nF
C0402
*
50V, X7R, +/-10%
VR_ON
TG1 TG2
DRN1 DR N2
BG1
41
37
40
36
38
39
TG1
BG1
V5_1
BST1
DRN1
U17
BST215TG216DRN217BG218V5_219PSI#20FB+21FB-
PSI#
BG2
*
BC69
1nF
RP1
0
+/-5%
R0402
1 2
*
R339
30.1K
+/-1%
R0603
R327
100K
+/-5%
R0402
D D
*
BC73
100pF
50V, NPO, +/-5%
C0402
DUMMY
SC452_AGND
C C
B B
A A
MAX985_OUT# 42
MAX1845_PGGOOD 40
PM_DPRSLPVR 19
CLKEN# 3
H_VID6 5
H_VID5 5
H_VID4 5
H_VID3 5
H_VID2 5
H_VID1 5
H_VID0 5
SC452_VROK 19
VCC_CORE_S0
FB+ 5
FB- 5
PR1
0
+/-5%
R0402
1 2
PC2
ISH
35
34
EN
NC
ISH
CS1+
CS2+
ERROUT
VCCA
AGND
DRP+
DRP-
22
FB-
FB+
1 2
DRPDRP+
BG2
DRN2
TG2
C0402
50V, X7R, +/-10%
BSTRC2
2 1
C272
2.2uF
6.3V, +/-20%
c0603h8
4
BSTRC1
*
2.2uF
c0603h8
6.3V, +/-20%
R305
16.2K
+/-1%
R0603
BC53
100pF
50V, NPO, +/-5%
C0402
SC452_AGND
CS1P
33
CS1N
32
CS1-
CS2N
31
CS2-
CS2P
30
E_OUT
29
VCCA
28
27
DAC
26
DAC
SS
25
SS
24
23
*
R321
16.2K
+/-1%
r0402h4
1uF
PC4
C0805
25V, Y5V, +80%/-20%
*
PD2
CH501H-40
4
2 1
PC3
1uF
C0805
25V, Y5V, +80%/-20%
CS1P
50V, X7R, +/-10%
*
1 2
*
10nF
C258
C0402
16V, Y5V, +80%/-20%
SC452_AGND
CS2P
BC59
100pF
*
50V, NPO, +/-5%
C0402
SC452_AGND
5V_S0
PD1
CH501H-40
DUMMY
R254
23.7K
+/-1%
R0603
*
BC60
12nF
C0603
1nF
BC58
50V, X7R, +/-10%
R256
23.7K
+/-1%
R0603
DUMMY
R258
10
+/-5%
R0402
CS1T
R273
1M
+/-5%
R0402
DUMMY
VREF
1 2
*
C0402
100K
+/-5%
R253
R0402
CS2T
BC51
12nF
50V, X7R, +/-10%
C0603
*
SC452_AGND
C257
1uF
10V, Y5V, +80%/-20%
R265
100K
+/-5%
R0402
*
C0402
*
ERC
R255
33K
+/-5%DUMMY
R0603
PC1
R267
0
R0402
+/-5%
BC54
100pF
R248
33K
+/-5%
R0603
DUMMY
SC452_AGND
0.1uF
25V, Y5V, +80%/-20%
C0402
50V, NPO, +/-5%
R269
0
+/-5%
R0402
3
*
C0603
BC48
100pF
50V, NPO, +/-5%
C0402
DUMMY
678
DDD
D
Q19
SI4392DY
GSS
S
123
4 5
678
DDD
D
Q18
Si4856DY
GSS
S
123
4 5
678
DDD
D
*
Q23
SI4392DY
GSS
S
123
4 5
678
DDD
D
Q22
Si4856DY
GSS
4 5
1 2
S
D41
123
Note: Route CS1x , CS2x , DRPx
, and FBx as differential pairs
R268
1M
+/-5%
R0402
*
BC50
*
BC49
100pF
50V, NPO, +/-5%
C0402
DUMMY
SC452_AGND
100pF
50V, NPO, +/-5%
C0402
VREF
DRN2 39
R252
10K
+/-5%
R0402
678
DDD
D
Q16
SI4392DY
GSS
S
123
4 5
678
DDD
D
Q25
Si4856DY
GSS
S
123
4 5
PQ1
Q26
678
DDD
D
*
SI4392DY
GSS
S
123
4 5
678
DDD
D
Si4856DY
GSS
S
4 5
1 2
123
Note:
DRN1/ CS1N are the terminal of the L16
DRN2/ CS2N are the terminal of the L20
3
SC452_P+
10uF
BC119
SSM54PT
10uF
BC121
D21
SSM54PT
2
*
C1210
25V, X5R, +/-10%
L18
0.56uH
ETQP4LR56WFC
*
DRN1 39
SC452_P+
*
C1210
25V, X5R, +/-10%
L19
0.56uH
ETQP4LR56WFC
*
2
1
DCBATOUT
1 2
GAP26
OPEN-POWER-GAP-3050
C0603
25V, Y5V, +80%/-20%
TC7
C0603
25V, Y5V, +80%/-20%
TC11
1 2
OPEN-POWER-GAP-3050
1 2
OPEN-POWER-GAP-3050
*
330uF
ctxh20
2.5V,+/-20%
1 2
OPEN-POWER-GAP-3050
1 2
OPEN-POWER-GAP-3050
1 2
OPEN-POWER-GAP-3050
*
330uF
ctxh20
2.5V,+/-20%
TC9
TC10
GAP27
GAP28
330uF
2.5V,+/-20%
GAP29
GAP24
GAP25
330uF
2.5V,+/-20%
*
TC6
ctxh20
R572 0
R0402 +/-5%
R575 0
R0402 +/-5%
*
TC12
ctxh20
330uF
ctxh20
2.5V,+/-20%
CS1N 39
CS2N 39
DCBATOUT
330uF
ctxh20
2.5V,+/-20%
VCC_CORE_S0
*
10uF
C1210
BC122
25V, X5R, +/-10%
*
10uF
C1210
BC118
25V, X5R, +/-10%
*
10uF
BC44
BC45
0.1uF
C1210
25V, X5R, +/-10%
*
*
BC38
0.1uF
C0603
25V, X7R, +/-10%
*
10uF
BC37
BC39
0.1uF
C1210
25V, X5R, +/-10%
*
*
BC35
0.1uF
C0603
25V, X7R, +/-10%
FOXCONN ND2
Title
Size Document Number Rev
<Doc>
A3
Date: Sheet of
38_Vcore_SC452 (1/2)
W02
38 44 Saturday, February 19, 2005
1
SA
Page 39
5
D D
CS1N 38
C C
DRN1 38
DRN2 38
B B
CS2N 38
BC125
*
100pF
50V, NPO, +/-5%
C0402
SC452_AGND
R587
16.2K
+/-1%
R0603
R573
16.2K
+/-1%
R0603
BC123
100pF
*
50V, NPO, +/-5%
C0402
SC452_AGND
R589
18.2K
+/-1%
R0603
R569
18.2K
+/-1%
R0603
DRP_P1
BC120
68nF
16V, X7R, +/-10%
C0603
*
DRP_DCR_P1
DRP_DCR_P2
BC115
68nF
16V, X7R, +/-10%
C0603
*
DRP_P2
R590
33K
+/-5%
R0402
R567
33K
+/-5%
R0402
4
R593
10
+/-5%
R0402
R588
10
+/-5%
R0402
R566
10
+/-5%
R0402
R570
10
+/-5%
R0402
BC62
*
100pF
50V, NPO, +/-5%
C0402
R274
26.1K
+/-1%
R0603
3
*
SC452_AGND
*
SC452_AGND
BC55
100pF
50V, NPO, +/-5%
C0402
BC61
100pF
50V, NPO, +/-5%
C0402
DRP+ 38
DRP- 38
2
1
Note:
DRN1/ CS1N are the terminal of the L16
DRN2/ CS2N are the terminal of the L20
A A
INDUCTOR DROOP
DRNx is the "+" end of the
inductor . CSxN is the "-" end .
FOXCONN ND2
5
Title
Size Document Number Rev
<Doc>
A3
4
3
2
Date: Sheet
39_Vcore_SC452 (2/2)
W02
39 44 Saturday, February 19, 2005
1
of
SA
Page 40
DCBATOUT
5V_S5
DCBATOUT
DCBATOUT
GAP20
1 2
OPEN-POWER-GAP-3050
*
1D05V_S0
GAP13
GAP22
GAP14
1 2
M1845AGND M1845AGND
*
1 2
VCCVIO
BC40
0.1uF
R262
20K
+/-1%
R0603
R251
100K
+/-1%
R0603
1 2
*
C0603
16V, X7R, +/-10%
C1206
GAP15
1 2
TC15
220uF
2.5V, +/-20%
CTD
R310
10K
+/-1%
R0402
R332
10M
+/-5%
R0603
DUMMY
25V, Y5V, +80%/-20%
C0603
25V, X7R, +/-10%
GAP23
1 2
L16
1uH
IHLP2525CZRZ1R0M01.Normal
OPEN-POWER-GAP-3050
*
TC13
220uF
*
2.5V, +/-20%
CTD
MAX1845_REF
MAX1845_VCCCPUIO
MAX1845_1D5VILIM
BC41
4.7uF
GAP21
1 2
OPEN-POWER-GAP-3050
M1845V+P1
*
0.1uF
BC116
2 1
D43
SSM24PT
VCCVIO VCC1V5
M1845AGND M1845AGND
R294
4.7
+/-5%
1uF
C0603
10V, Y5V, +80%/-20%
M1845AGND
BC57
0.1uF
C0603
R0603
*
BC64
MAX1845_VCC_
MAX1845_VCCCPUIO
MAX1845_1D5VILIM
R2720+/-5%
*
R0402
MAX1845_DH1
MAX1845_LX 1
MAX1845_DL1
MAX1845_TON
MAX1845_REF
MAX1845_FB1
5V_S5
100K
+/-5%
R0402
R276
0
+/-5%
R0402
DUMMY
D23
2 1
CH501H-40
678
DDD
D
Q17
SI4892DY
GSS
S
123
4 5
DRV_BST1D05V
25V, Y5V, +80%/-20%
R0402
+/-5%
678
DDD
D
Q24
SI4892DY
GSS
S
123
4 5
R264
4.99K
+/-1%
R0402 R279
R263
100K
+/-1%
R0603
0
R292
BC65
0.22uF
*
10V, X7R, +/-10%
C0603
M1845AGND
R311
4.99K
+/-1%
R0402
MAX1845_FB1
MAX1845_FB2 MAX1845_SKIP#
R312
9.76K
+/-1%
R0603
35
V+
PGND
N.C.9N.C.10N.C.
THERMALPAD37N.C.17N.C.
24
MAX1845_ON1
MAX1845_ON2
*
OUT2
PGOOD
N.C.29N.C.
25
36
R296 0 R0402 +/-5%
R299 0 R0402 +/-5% DUMMY
*
R320 0 R0402 +/-5%
R316 0 R0402 +/-5% DUMMY
*
BC52
4.7uF
C1206
25V, Y5V, +80%/-20%
8
ON1
11
ON2
4
OVP
19
BST2
18
DH2
16
LX2
20
DL2
15
CS2
14
2
SKIP
13
FB2
3
C276
10pF
50V, NPO, +/-5%
C0402
C277
10pF
50V, NPO, +/-5%
C0402
*
BC56
MAX1845_ON1
MAX1845_ON2
M1845AGND
MAX1845_DH2
MAX1845_DL2
5V_S0
0.1uF
R2980+/-5%
MAX1845_FB2
R284
100K
+/-5%
R0402
MAX1845_PGGOOD
*
1uF
BC66
C0603
10V, X5R, +/-10%
U16
21
VDD
5
UVP
22
VCC
34
ILIM1
12
ILIM2
MAX1845_BST1 MAX1845_BST2
M1845AGND
27
28
30
26
1
31
32
7
33
23
MAX1845
BST1
DH1
LX1
DL1
TON
CS1
OUT1
REF
FB1
AGND
R290
0
+/-5%
R0402
6
C0603
25V, X7R, +/-10%
2 1
DRV_BST1D5V
BC70
0.1uF
*
R0402
S0_EN_D 33
S0_EN 14,21,23,33,37,41,42
S0_EN_D 33
S0_EN 14,21,23,33,37,41,42
25V, Y5V, +80%/-20%
C0603
MAX1845_LX 2
MAX1845_SKIP#
MAX1845_PGGOOD 38
BC117
L17
1uH
SSM24PT
*
M1845V+P2
0.1uF
25V, X7R, +/-10%
OPEN-POWER-GAP-3050
*
C0603
D44
SSM54PT
GAP12
1 2
10uF
C1210
BC114
25V, X5R, +/-10%
GAP19
1 2
OPEN-POWER-GAP-3050
TC14
220uF
*
2.5V, +/-20%
1 2
CTB
GAP17
1 2
OPEN-POWER-GAP-3050
*
1D5V_S0
OPEN-POWER-GAP-3050
TC21
220uF
2.5V, +/-20%
CTB
GAP16
1 2
VCC1V5
*
GAP18
1 2
OPEN-POWER-GAP-3050
0.1uF
C0603
BC124
16V, X7R, +/-10%
GAP11
1 2
OPEN-POWER-GAP-3050
*
D25
CH501H-40
678
DDD
D
Q15
SI4892DY
GSS
S
123
4 5
IHLP2525CZRZ1R0M01.Normal
2 1
678
DDD
D
Q21
SI4392DY
GSS
S
4 5
D42
123
FOXCONN ND2
Title
Size Document Number Rev
A3
Date: Sheet
Max1845+ 1D5V/VCCCPUIO
<Doc>
W02
SA
of
40 44 Saturday, February 19, 2005
Page 41
0D9V_S0
GAP3
1 2
OPEN-POWER-GAP-3050
DDR_VREF_S3
M8550AGND
M8550AGND M8550AGND M8550AGND
MAX8550VTT
TP2
TP1
R4
100K
+/-5%
R0402
DUMMY
TC2
220uF
*
2.5V, +/-20%
CTB
*
5V_S5 5V_S0
1
1
*
BC6
BC96
3.9nF
0.22uF
R5
100K
+/-5%
R0402
50V, X7R, +/-10%
10V, X7R, +/-10%
C0603
C0603
*
VCC1V8
BC93
5V_S5
*
C0603
13
12
11
10
25
24
15
16
9
2
5
6
1
8
3
4
0.22uF
10V, X7R, +/-10%
U1
VTTI
VTT
VTTS
PGND2
VTTR
OVP/UVP
POK1
POK2
SKIP#
TON
GND
SS
REF
ILIM
FB
OUT
MAX8550
14
REFIN
THERMALPAD
29
M8550AGND
AVDD
VDD
BST
PGND1
SHDNA#
SHDNB#
STBY
26
22
17
VIN
MAX8550_BST
20
MAX8550_LX
19
LX
MAX8550_DH
18
DH
MAX8550_DL
21
DL
23
27
28
MAX8550_STBY
7
MAX8550_AVDD
R2
10
+/-5%
R0805
D37
2 1
*
BC94
CH501H-40
0.1uF
25V, Y5V, +80%/-20%
*
M8550AGND
*
*
C0603
BC7
2.2uF
10V, Y5V, +80%/-20%
C0603
5V_S5
BC2
1uF
10V, Y5V, +80%/-20%
C0603
Q2
BC95
S3_EN 33
4.7uF
25V, Y5V, +80%/-20%
C1206
SI4892DY
Q1
SI4392DY
D
GSS
4 5
D
GSS
4 5
678
S
678
S
DDD
123
DDD
123
DCBATOUT
1 2
OPEN-POWER-GAP-3050
M8550V+
*
2 1
GAP2
BC5
D38
10uF
L12
2.2uH
*
SSM24PT
OPEN-POWER-GAP-3050
C1210
25V, X5R, +/-10%
1 2
GAP1
1D8V_S3
GAP4
TC20
150uF
4V, +/-20%
CTB
1
0
1
1
0
1 2
OPEN-POWER-GAP-3050
VCC1V8
*
1.8V
1.8V
1.8V
0
0
1 2
*
BC1
0.1uF
C0603
25V, Y5V, +80%/-20%
*
OPEN-POWER-GAP-3050
TC1
150uF
*
4V, +/-20%
CTB
Statuse Input Vo
SHDNA# S HDNB# STBY
0
1
0
1
1
1
0
0
0
0
GAP6
BC3
0.1uF
25V, Y5V, +80%/-20%
C0603
0D9V_S0 MAX8550_VTT_REF 1D8V_S3
0.9V
0
0
0.9V
0
1 2
OPEN-POWER-GAP-3050
*
GAP5
TC3
330uF
2.5V,+/-20%
0.9V
0
0.9V
0.9V
0
ctxh20
*
BC4
0.1uF
C0603
25V, Y5V, +80%/-20%
MAX8550VTT
R6
100K
+/-5%
R0402
MAX8550_1D8V_PG
MAX8550_VTTQ_PG
MAX8550_SKIP#
MAX8550_TON
MAX8550_SS
MAX8550_REF
MAX8550_ILIM
BC98
C0603
0.22uF
10V, X7R, +/-10%
MAX8550_FB
5V_S5
R491
100K
+/-5%
R0402
MAX8550_SKIP#
R492
0
+/-5%
R0402
DUMMY
R7
2.2K
+/-1%
R0603
R8
22K
+/-1%
R0603
M8550AGND M8550AGND M8550AGND
R486
6.8K
+/-1%
R0402
R1
4.3K
+/-1%
R0603
R3
0
+/-5%
R0402
3D3V_S5
5 3
S3_EN 33
S0_EN 14,21,23,33,37,40,42
1
2
U32
NC7SZ86
4
FOXCONN ND2
Title
Size Document Number Rev
<Doc>
A3
Date: Sheet
Max8550+ 1D8V/VTTQ
W06N
41
SA
of
44 Saturday, February 19, 2005
Page 42
5V_AUX_S5
R84
DCBATOUT
R83
R79
47K
+/-5%
R0402
R78
47K
+/-5%
R0402
G4
1 2
OPEN-POWER-GAP-3050
*
5V_AUX_S5
MAX985_OUT#
SHUTDOWN_S5 22
MAX1999_SLP_VEST
PWRPM_SLP_S3
S0_EN 14,21,23,33,37,40,41
3D3V_S5
G3
1 2
VCC3D3V
OPEN-POWER-GAP-3050
*
C0603
16V, X7R, +/-10%
BC103
100pF
C0402
D39
CH501H-40
2N7002
TC5
150uF
*
Q40
G
BC25
0.1uF
50V, NPO, +/-5%
R87
47K
+/-5%
R0402
PWRSHUTDOWN_S5#
2 1
Q8
2N7002
G
CTB
4V, +/-20%
M1999AGND
R88 0
R0402 +/-5%
D S
S D
G
D S
M1999AGND
6.8K
R530
+/-1%
R0402
10K
R523
+/-1%
R0402
R85 0
R0402 +/-5%
*
Q9
TP0610K
*
L15
4.7uH
IHLP2525CZRZ4R7M01
OPEN-POWER-GAP-3050
BC22
0.1uF
DUMMY
M1999_CTLTON
D7
CH501H-40
2 1
MAX1999_SKIP#
G19
1 2
*
BC108
*
C0402
16V, Y5V, +80%/-20%
M1999AGND M1999AGND M1999AGND
4.7uF
25V, Y5V, +80%/-20%
DUMMY
DCBATOUT
M1999AGND
G20
1 2
M1999V+P3
OPEN-POWER-GAP-3050
*
0.1uF
C1206
BC21
0.1uF
C0603
BC107
25V, X7R, +/-10%
MAX1999_VCC MAX1999_VCC
C0402
16V, Y5V, +80%/-20%
M1999AGND M1999AGND
R75
100K
+/-5%
R0402
R76
100K
+/-5%
R0402
DDD
123
DDD
123
R526
20K
+/-1%
R0603
R527
10K
+/-1%
R0402
678
D
GSS
S
4 5
678
D
GSS
S
4 5
DCBATOUT
*
Q10
Si4800BDY
Q11
Si4800BDY
MAX1999_ON3
MAX1999_ON5
R529
18K
+/-1%
R0402
R528
10K
+/-1%
R0402
DCBATOUT
*
BC14
4.7uF
C1206
25V, Y5V, +80%/-20%
BC18
0.1uF
*
25V, Y5V, +80%/-20%
C0603
MAX1999_LX 3
R86
200K
+/-5%
R0402
MAX1999_ILIM3
MAX1999_ILIM5
BC15
0.1uF
25V, X7R, +/-10%
2 1
DRV_BST3
C0603
MAX1999_V+
MAX1999_BST3
MAX1999_DH3
MAX1999_DL3
MAX1999_FB3
MAX1999_SHDN#
MAX1999_ON3
MAX1999_ON5
MAX1999_ILIM3
MAX1999_ILIM5
D6
R71
4.7
+/-5%
R0805
R73
0
+/-5%
R0402
10uF
C1210
25V, X5R, +/-10%
15VT
DUMMY
OPEN-POWER-GAP-3050
*
L14
4.5uH
4 3
G1
1 2
DUMMY
R40 0 +/-5% R0603
D4
1SS355
BC13
10uF
R0402
R0603
25V, X5R, +/-10%
2 1
+/-5%
+/-1%
G2
1 2
OPEN-POWER-GAP-3050
*
BC10
C1210
2 1
D3
15K
R525
R524
9.76K
M1999AGND
0.1uF
C0603
25V, Y5V, +80%/-20%
15VSWPWR_S5
*
MMPZ5245BPT
BC104
100pF
*
50V, NPO, +/-5%
C0402
MAX1645B_LDO
BC9
4.7uF
VCC5V
U4
NC7SZ32
C1206
25V, Y5V, +80%/-20%
*
G16
1 2
OPEN-POWER-GAP-3050
TC4
5V_AUX_S5
1
2
150uF
6.3V, +/-20%
3 5
G17
1 2
OPEN-POWER-GAP-3050
CTD
*
4
FOXCONN ND2
Title
Size Document Number Rev
<Doc>
A3
Date: Sheet
Max1999+ 5V/3D3V
W06N
5V_S5
G18
1 2
OPEN-POWER-GAP-3050
*
0.1uF
C0603
BC101
16V, X7R, +/-10%
BC12
0.1uF
16V, Y5V, +80%/-20%
C0402
AC_IN 33
of
42 44 Saturday, February 19, 2005
SA
R72
10
12
SKIP
BST5
TON
VCC
DH5
LX5
DL5
+/-5%
R0805
BC17
1uF
*
10V, Y5V, +80%/-20%
C0603
M1999AGND
MAX1999_SKIP#
MAX1999_TON
13
MAX1999_VCC
17
MAX1999_BST5
14
MAX1999_DH5
16
MAX1999_LX 5
15
MAX1999_DL5
19
2.2uF
10V, Y5V, +80%/-20%
C0603
D8
CH501H-40
2 1
CH501H-40
*
BC20
U5
18
LDO5
20
V+
28
BST3
26
DH3
27
LX3
24
DL3
100K
+/-5%
R0402
DUMMY
DRV_BST5
25V, Y5V, +80%/-20%
BC16
0.1uF
C0603
MAX1999
22
7
6
3
4
5
11
R74
0
+/-5%
R0402
DCBATOUT
R533
200K
+/-5%
R0402
R531
47K
+/-5%
R0402
OUT3
FB3
SHDN
ON3
ON5
ILIM3
ILIM5
N.C.
GND
1
23
*
M1999AGND
R534
1M
+/-5%
R0402
R 47K for Li-ion 10.5V
R 100K for Ni-MH 6.0V
21
OUT5
FB5
PGOOD
REF
PRO
LDO3
25
3D3V_AUX_S5 5V_AUX_S5
BC19
2.2uF
10V, Y5V, +80%/-20%
C0603
5V_AUX_S5
9
2
8
10
M1999AGND
10V, X7R, +/-10%
MAX985_OUT# 38
MAX985_OUT#
MAX985_IN
MAX1999_FB5
MAX1999_PGOOD
M1999_VREF
BC23
0.22uF
C0603
M1999AGND
U38
1
OUT
2
VCC
3
IN+
MAX985
*
VEE
IN-
0
+/-5%
R0402
R82 0
+/-5% R0402
*
R81
100K
+/-5%
R0402
5
M1999_VREF
4
M1999AGND
D
Q7
Si4800BDY
GSS
4 5
D
Q6
SI4892DY
GSS
4 5
678
S
678
S
M1999V+P5
*
DDD
123
DDD
123
BC11
DCBATOUT
2 1
2 1
D5
SSM24PT
Page 43
MAX1645B_LDO
DCBATOUT
CN5
MH1
1
3
5
7
9
11
13
15
17
BAT_TH 33
BAT_KBC_DAT1 33
ACTIVE_LED# 28
BT+SENSE 33
MDI1+ 28
MDI1- 28
BAT_TH
BAT_KBC_DAT1
ACTIVE_LED#
Yellow
BT+SENSE 5V_S5
MDI1-
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
MH2
D2D-CON60-M
AD_OFF
BAT_KBC_SCL1
CHGON#/OFF
100M_LED#
Green
MDI0+ MDI1+
MDI0-
AD_OFF 33
BAT_KBC_SCL1 33
CHGON#/OFF 33
100M_LED# 28
MDI0+ 28
MDI0- 28
5V_S5
DCBATOUT
B_USB_PN4 19
B_USB_PP4 19
B_USB_PN6 19
B_USB_PP6 19
B_USB_PN2 19
B_USB_PP2 19
3 PORT USB Connector
5V_S0
B_USB_PN4
B_USB_PP4
3D3V_S5
B_USB_PN6
B_USB_PP6
B_USB_PN2
B_USB_PP2
CN4
A1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
A2
FOX-CONN20
3D3V_AUX_S5
VOL_UP#_CN 32
VOL_DOWN#_CN 32
STOP/EJECT#_CN 32
PLAY/PAUSE#_CN 32
FW/SCAN_FW#_CN 32
REW/SCAN_REW#_CN 32
MP3_PWRBTN#_CN 32
COM0 32
COM1 32
DJ_SEG0 32
DJ_SEG1 32
DJ_SEG2 32
DJ_SEG3 32
DJ_SEG4 32
DJ_SEG5 32
DJ_SEG6 32
DJ_SEG7 32
DJ_SEG8 32
DJ_SEG9 32
DJ_SEG10 32
DJ_SEG11 32
Power /LAN Connector
COM1
DJ_SEG1
DJ_SEG3
DJ_SEG5
DJ_SEG7
DJ_SEG9
DJ_SEG11
3D3V_S0
COM0
DJ_SEG0
DJ_SEG2
DJ_SEG4
DJ_SEG6
DJ_SEG8
DJ_SEG10
CN14
25
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
26
AUDIO-CONN28
AudioDJ Connector
PWR1
6
HS8204E
1
2
3
4
5
PWR_LED# 17,33
EC_PWRBTN#
BC8
0.1uF
*
16V, Y5V, +80%/-20%
C0402
DUMMY
Power Switch Connector
5V_S0
5V_S0
B_USB_PN0
B_USB_PP0 19
B_USB_PP0
CN2
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
B2B-CON16-FEMALE
TV_LUMA
TV_COMP
TV_CRMA
COVERUP COVERUP
USB / TV Connector
R19
10K
R0402
+/-5%
EC_PWRBTN# 33
TV_LUMA 15
TV_COMP 15
TV_CRMA 15 B_USB_PN0 19
COVERUP 33
3D3V_S5
3
2 1
D10
BAV99
DUMMY
FOXCONN ND2
Title
Daughter Board Connectors
Size Document Number Rev
<Doc>
A3
Date: Sheet
W02
of
43 44 Saturday, February 19, 2005
SA
Page 44
H4
MH28X80-80X120T
1
H1
MH28X80-80X120
H2
MH28X80-80X120
H20
MH28X80-80X120
H18
MH28X80-80X120
H15
MH28X80-80X120
H10
MH28X80-80X120
H19
MH28X80-80X120
H14
MH28X80-80X120
H9
MH28X80-80X120
4
5
3D3V_S0
14 7
6
U14B
74LCX08
1
H11
MH28X90
1
H3
MH28X80
1
H7
MH36X60
1
H16
MH28X60
1
1
H12
MH28X90
1
H5
MH28X80
1
H13
MH36X60
1
H17
MH28X60
1
H8
MH28X90
1
1
H6
MH28X90
1
1
1
1
1
AUD_AGND_S
1
1
VCC_CORE_S0
EC2
0.1uF
*
C0603
16V, Y5V, +80%/-20%
EC8
0.1uF
*
C0603
16V, Y5V, +80%/-20%
EC7
0.1uF
*
C0603
16V, Y5V, +80%/-20%
EC4
0.1uF
*
C0603
16V, Y5V, +80%/-20%
EC5
0.1uF
*
C0603
16V, Y5V, +80%/-20%
EC6
0.1uF
*
C0603
16V, Y5V, +80%/-20%
EC1
0.1uF
*
C0603
16V, Y5V, +80%/-20%
EC3
0.1uF
*
C0603
16V, Y5V, +80%/-20%
Title
Size Document Number Rev
<Doc>
A3
Date: Sheet of
UNUSED PARTS
W02
44 44 Saturday, February 19, 2005
SA
FOXCONN ND2