5
4
3
2
1
S04
BLOCK DIAGRAM
D D
Dothan(Yonah)/Alviso
+1.8V
+1.5V
Dothan/Yonah
+VCCP
FSB
C C
VTT_MEM
DDR-SODIMM1
DDR-SODIMM2
VDIMM
DDR SDRAM 2.5V, 400/500MHz
P:12
DDR SDRAM 2.5V, 400/500MHz
P:13
4X100MHZ
4X133MHZ
+VCCP(1.05V)
VDIMM(2.5V)
+2.5V
VCORE_CPU
478 Pins
(Micro-FCPGA)
P:5,6
PCI-Express x16(GFX)
+1.5V
( 915PM )
Alviso
1257 PCBGA
+3V
+3V
CPU Thermal
Sensor
MAX6648
VCORE_VGA
Video Controller
+1.5V
+1.8V
+1.2V
+2.5V
+3V
P:5
ATI-M24CSP
P:21,22,23
P:7,8,9,10,11
Primary IDE - HDD
+5V
Master
DVD/CDRW/CD/COMBO
+5V
Slave
B B
Headphone
P:27
External
P:27
MIC
P:17
P:17
+5V
+3V
AUDIO
ALC202A(Codec)
ATA 66/100
AC-LINK
+5V
+3VAUX
MDC1.0
+3V
P:20
VCCRTC
+VCCP(1.05V)
+2.5V
+1.5V
+5V
+5VSUS
+3VSUS
RJ11
DMI
ICH6-M
609 BGA
P:14,15,16
+1.5VSUS
+3V
33MHZ, 3.3V PCI
PCI-Express x1
USB 2.0
USB PORT -->2,6
+5VSUS
CON
P:38
P:17
TPA0312(Amp)
P:26
Internal
P:1
MIC
PCI Board
A A
+5V
Touchpad
P:29
5
+3VALW
+5V
+3V
PC87591
176 Pins LQFP
+5V
Keyboard
P:29
+3VALW
FLASH
4
VCCRTC
P:28
P:28
+5V
FAN 1
P:30
CON
CON
USB --> 1
+5VSUS
USB BOARD
P:38
3
+3V
Clocks
CK410
CYPRESS:
CY28411
IDT CV125
LVDS
R.G,B
P:4
LCD Panel
CRT port
S-VIDEO
CON
P:1
+1.5V
+3VSUS 3VAUX
+3V
NewCard
USB --> 7
PCI Board
P:25
P:24
P:24
P:5
DC/DC & Charger
CPU VR
MAX1987
AC/BATT
Connector
RTC
Battery
PIRQCJ,DJ
AD20
REQ1J
+3V
CardReader
P:5
USB -->0
SD&MMC&MS
Slot
2
P:31
P:39
P:33
+5V
+3VSUS
MINI-PCI
Intel
Calexico II
33MHZ, 3.3V PCI
PIRQEJ
CardBus
OZ711
Switching
+VCCP,1.5V
3V,5V
VGA CORE
VDIMM,VTT_MEM
LDO
1.2V(ATI)
+1.8V
+2.5V
+3V
MAX1715
MAX1999
MAX1993
MAX8550
MAX8527
L1087_ADJ
P:20
AD25
REQ3J
PIRQBJ
+3V
AD23
REQ2J
PIRQAJ
+3V
1394
VT6307
P:5 P:4
CARD
BUS
SLOT
Title
Document Number Re v
Date: Sheet
1394
CONN
S04 MAINBOARD
10/100/1G
RTL8110S-32
RJ45
TECHNOLOGY COPR.
1
+3VAUX
LAN
P:2
P:3
RJ11
14 0 Monday, June 14, 2004
P:36
P:33
P:35
P:34
P:37
P:37
P:37
AD22
REQ0J
of
A
BLOCK DIAGRAM
5
4
3
2
1
Power & Ground
Label
MBATA+
VIN
VCCRTC
D D
+3VALW
+5VALW
3VAUX
+1.5VSUS
VDIMM
+3VSUS
+5VSUS
+1.5V
+1.8V
C C
VCORE_VGA
VMEM_VGA
+3V
+5V
+5VA
+5VAA
+5V_FAN
M_VREF
VCORE_CPU
B B
+VCCP
+1.2V
+2.5V
5VAUX
VTT_MEM
MOSVCC
MOSVCC_RUN
GND
A A
AUDGND
Pg#
MBATA+ 39
VIN 25,31,33,34,35,36,39
VCCRTC 14,16,28,33
+3VALW 19 ,25,28,29, 33,39
+5VALW 32 ,33
3VAUX 20,33, 38
+1.5VSUS 16,36,37
VDIMM 7,9 ,10,12,13 ,34,37
+3VSUS 15,16,19,20,32,33,34,35
+5VSUS 16,17,32,33,36,38
+1.5V 6,10,11,15,16,23,32,36,37,38
+1.8V 6,22,23,32,37
VCORE_VGA 23,35
VMEM_VGA 22,23
+3V 4,5,10,12,13,14,15,16,17,18,19,20,21,23,24,25,26,28,29,30,31,32,33,35,37,38
+5V 16,17,20,24,25,26,27,28,29,30,31,32,33,38
+5VA 26
+5VAA 26,27
+5V_FAN 30
M_VREF 7,12,13,34
VCORE_CPU 6,31
+VCCP 4,5,6,7,9,10,14,16,36
+1.2V 23,37
+2.5V 7,8,10,11,16,23,32,37
5VAUX 33,34 ,35,36,38
VTT_MEM 12,13,34
MOSVCC 32,33
MOSVCC_RUN 25,30,32,33,38
ALL PAGES
AUDGND 26,27,38
5
4
S0 S3 S4 S5
YYYY
YYYY
YYYY
YYYY
YYY
YY
YY
Y Y
YY
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
YYY
Y
YYY
Y
Control Signal
9V-12.6V,3X2 cells
20V-9V
3V
3VAUXEN
3VAUXEN
Y Y Y Y
3VAUXEN
SUSD
SUSON
SUSD
SUSD
MAIND
+3V
MAIND
+1.8V
MAIND
MAIND
+5V
+5V
VFAN,+5V
MAINON
VRON
VRON
MAIND
MAIND
3VAUXEN
MAINON
5VAU X
MAINON
3
Title
Frontpage
Document Number Re v
2
Date: Sheet
S04 MAINBOARD
TECHNOLOGY COPR.
24 0 Monday, June 14, 2004
1
A
of
5
4
3
2
1
PWR_LED STATUS
S0 S1&S3 S4&S5
PWR_LED
D D
ON Blinking OFF
LAN LED STATUS
Green Amber Yellow
10M/100M
1000M
C C
Blinking
Blinking
OFF
BlinkingONON
WAKE UP EVENT
POWER BUTTON
RTC ALARM
LAN (PCI LAN)
USB
TOUCH PAD/INTERNAL KB
MODEM WAKEUP
1394
WIRELESS LAN
WAKE UP EVENT
FROM ACPI STATE
S1,S3,*S4,S5
S5
S1,S3,*S4
S1,S3
S1,S3
S3 Default support
COMMENTS
Default set all support by BIOS
Default set all support by BIOS
*S4 support set by BIOS,or not support
S3 set by BIOS,or not support
Default support
not support
not support
B B
A A
Title
Table of contects
Document Number Re v
5
4
3
2
Date: Sheet
S04 MAINBOARD
TECHNOLOGY COPR.
34 0 Monday, June 14, 2004
1
A
of
5
*
CLK48_USB 15
PCLK_1394 38
PCLK_MINI 20
PCLK_591 28
PCLK_LAN 38
PCLK_OZ 38
PCLK_ICH6 15
SMB_CLK 12,13,15,16,38
SMB_DATA 12,13,15,16,38
FB1
FB L0805 180 Ohm
2 1
BC7
*
0.1uF
C0402
BC8
0.1uF
C0402
*
D D
+3V
FB2
FB L0805 180 Ohm
2 1
CLK_XTAL_OUT
CLK_XTAL_IN
X1
XTAL-14.318MHz
BC13
33pF
C0603
1 2
BC14
*
33pF
C0603
C C
*
B B
BC6
*
0.1uF
C0402
4
+V3.3S_CLKVDD1
BC1
*
47nF
C0603
VCC3_CLK
BC9
R20
0.1uF
2.2
C0402
+/-5%
R0603
BC10
*
47nF
C0603
R30 33 R0402+/-5%
R32 33 R0402+/-5%
R36 33 R0402+/-5%
R38 33 R0402+/-5%
R42 33 R0402+/-5%
R43 33 R0402+/-5%
R45 33 R0402+/-5%
R48 0 R0402+/-5%
R50 0 R0402+/-5%
*
*
CLK_VDD_A
BC11
10uF
C0805
R0402
+/-1%
R54
475
BC2
10uF
C0805
100_96_sel
PCIF0
CGCLK_SMB
CGDAT_SMB
CLK_XTAL_OUT
CLK_XTAL_IN
BSEL0
BSEL1
FSA
CLK_IREF
U1
1
VDD_PCI0
7
VDD_PCI1
21
VDD_SRC0
28
VDD_SRC1
34
VDD_SRC2
42
VDD_CPU
37
VDD_A
38
VSS_A
49
XTAL_OUT
50
XTAL_IN
53
FSC/TEST_SEL
16
FSB/TEST_MODE
12
FSA/USB_48
3
PCI3
4
PCI4
5
PCI5
56
PCI2
9
PCIF1
8
PCIF0/ITP_EN
46
SCLOCK
47
SDATA
39
IREF
13
VSS_48
51
VSS_REF
45
VSS_CPU
29
VSS_SRC
6
VSS_PCI1
2
VSS_PCI0
CV125
3
VDD_48
VDD_REF
CPU_STOP#
PCI_STOP#
CPU1
CPU1#
CPU0
CPU0#
CPU_2_ITP/SRC_7
CPU2_ITP/SRC7#
SRC6
SRC6#
SRC5
SRC5#
SRC4_SATA
SRC4_SATA#
SRC3
SRC3#
SRC2
SRC2#
SRC1
SRC1#
SRC0
SRC0#
DOT96
DOT96#
VTT_PWRGD#/PD
REF
+V3.3S_CLKVDD1
R9
2.2
+/-5%
R0603
11
48
54
55
R21 33 R0402+/-5%
41
R23 33 R0402+/-5%
40
R24 33 R0402+/-5%
44
R25 33 R0402+/-5%
43
36
35
R27 33 R0402+/-5%
33
R28 33 R0402+/-5%
32
R29 33 R0402+/-5%
31
R31 33 R0402+/-5%
30
26
27
R39 33 R0402+/-5%
24
R41 33 R0402+/-5%
25
22
23
R47 33 R0402+/-5%
19
R49 33 R0402+/-5%
20
R950 33 R0402+/-5% @GM
17
R951 33 R0402+/-5% @GM
18
R52 33 R0402+/-5% @GM
14
R53 33 R0402+/-5% @GM
15
CKGEN_ENJ
10
R56 12.1 R0402+/-1%
52
R58 12.1 R0402+/-1%
R10
1
+/-5%
R0603
CLK_PWR
BC5 47nF
Dummy
2
CLK_MCH_BCLK
CLK_MCH_BCLKJ
CLK_CPU_BCLK
CLK_CPU_BCLKJ
CLK_NEWCARD
CLK_NEWCARDJ
CLK_PCIE_VGA
CLK_PCIE_VGAJ
CLK_PCIE_ICH
CLK_PCIE_ICHJ
CLK_PCIE_MCH
CLK_PCIE_MCHJ
DREFCLK+3V
DREFCLKJ
DREFssCLKJ
BC3
*
C0603
*
BC4
*
47nF
10uF
C0603
C0805
STP_CPUJ 15
STP_PCIJ 15
CLK_MCH_BCLK 7
CLK_MCH_BCLKJ 7
CLK_CPU_BCLK 5
CLK_CPU_BCLKJ 5
CLK_NEWCARD 38
CLK_NEWCARDJ 38
CLK_PCIE_VGA 21
CLK_PCIE_VGAJ 21
CLK_PCIE_ICH 15
CLK_PCIE_ICHJ 15
CLK_PCIE_MCH 11
CLK_PCIE_MCHJ 11
DREFssCLK 7
DREFssCLKJ 7
DREFCLK 7
DREFCLKJ 7
CKGEN_ENJ 31
CLK14_ICH6 15
CLK14_AUDIO 26
DREFssCLK
@M24
CPU_BSEL1 6
MCH_BSEL1 7
R957
0
+/-5%
R0402
+1.5V +1.5V
BC12 10pF
C0603 50V, N PO, +/-5%
R37 10K
+3V
1
R1 49.9 R0402+/-1%
R2 49.9 R0402+/-1%
R3 49.9 R0402+/-1%
R4 49.9 R0402+/-1%
R5 49.9 R0402+/-1%
R6 49.9 R0402+/-1%
R7 49.9 R0402+/-1%
R8 49.9 R0402+/-1%
R13 49.9 R0402+/-1%
R14 49.9 R0402+/-1%
R17 49.9 R0402+/-1%
R18 49.9 R0402+/-1%
R838 49.9 R0402+/-1% @GM
R839 49.9 R0402+/-1%
R949 49.9 R0402+/-1%
R948 49.9 R0402+/-1% @GM
R958
0
+/-5%
R0402
@M24
PCLK_MINI
*
PCIF0
R0402+/-5%
+VCCP
R51
1K
+/-1%
R0402
R0402+/-5%
R0402+/-1%
Dummy
Dummy
R57
2.2K
+/-5%
R0402
R55 0
R821 1K
BSEL1
+VCCP
R60
1K
+/-1%
+3V
R63
10K
+/-5%
R0402
A A
5
R64
10K
+/-5%
R0402
Dummy
FSA
100_96_sel
4
R952
10K
R0402
+/-5%
Title
Document Number Re v
3
2
Date: Sheet
CPU_BSEL0 6
MCH_BSEL0 7
Clock Generator
R61 0
R822 1K
S04 MAINBOARD
1
R0402
Dummy
R0402+/-5%
R62
2.2K
R0402+/-1%
+/-5%
R0402
Dummy
TECHNOLOGY COPR.
of
44 0 Monday, June 14, 2004
BSEL0
A
5
4
3
2
1
AA3
AA2
AF4
AC4
AC7
AC3
AD3
AE4
AD2
AB4
AC6
AD5
AE2
AD6
AF3
AE1
AF1
AE5
A13
A12
C12
C11
B13
A16
A15
B10
A10
B18
A18
C17
B17
P4
U4
V3
R3
V2
W1
T4
W2
Y4
Y1
U1
Y3
U3
R2
P3
T2
P1
T1
N2
A4
N4
J3
L1
J2
K3
K4
L4
C8
B8
A9
C9
M3
H1
K1
L2
C2
D3
A3
E4
B4
A7
D1
D4
C6
A6
B7
U2A
A3#
A4#
A5#
A6#
A7#
A8#
A9#
A10#
A11#
A12#
A13#
A14#
A15#
A16#
A17#
A18#
A19#
A20#
A21#
A22#
A23#
A24#
A25#
A26#
A27#
A28#
A29#
A30#
A31#
ADSTB0#
ADSTB1#
REQ0#
REQ1#
REQ2#
REQ3#
REQ4#
ADS#
IERR#
BR0#
BPRI#
BNR#
LOCK#
HIT#
HITM#
DEFER#
BPM0#
BPM1#
BPM2#
BPM3#
TRDY#
RS0#
RS1#
RS2#
A20M#
FERR#
IGNNE#
PWRGOOD
SMI#
TCK
TDO
TDI
TMS
TRST#
ITP_CLK0
ITP_CLK1
PREQ#
PRDY#
DBR#
LINT0
LINT1
STPCLK#
SLP#
DPSLP#
THERMDA
THERMDC
THERMTRIP#
PROCHOT#
Banias-Processor
Dothan
REQUEST
PHASE
SIGNALS
ERROR
SIGNALS
ARBITRATION
PHASE
SIGNALS
SNOOP PHASE
SIGNALS
RESPONSE
PHASE
SIGNALS
PC
COMPATIBILITY
SIGNALS
DIAGNOSTIC
& TEST
SIGNALS
EXECUTION
CONTROL
SIGNALS
THERMAL DIODE
4
1 OF 3
DATA
PHASE
SIGNALS
D10#
D11#
D12#
D13#
D14#
D15#
D16#
D17#
D18#
D19#
D20#
D21#
D22#
D23#
D24#
D25#
D26#
D27#
D28#
D29#
D30#
D31#
D32#
D33#
D34#
D35#
D36#
D37#
D38#
D39#
D40#
D41#
D42#
D43#
D44#
D45#
D46#
D47#
D48#
D49#
D50#
D51#
D52#
D53#
D54#
D55#
D56#
D57#
D58#
D59#
D60#
D61#
D62#
D63#
DSTBN0#
DSTBP0#
DSTBN1#
DSTBP1#
DSTBN2#
DSTBP2#
DSTBN3#
DSTBP3#
DINV0#
DINV1#
DINV2#
DINV3#
DBSY#
DRDY#
BCLK1
BCLK0
INIT#
RESET#
DPWR#
HDJ0
A19
D0#
HDJ1
A25
D1#
HDJ2
A22
D2#
HDJ3
B21
D3#
HDJ4
A24
D4#
HDJ5
B26
D5#
HDJ6
A21
D6#
HDJ7
B20
D7#
HDJ8
C20
D8#
HDJ9
B24
D9#
HDJ10
D24
HDJ11
E24
HDJ12
C26
HDJ13
B23
HDJ14
E23
HDJ15
C25
HDJ16
H23
HDJ17
G25
HDJ18
L23
HDJ19
M26
HDJ20
H24
HDJ21
F25
HDJ22
G24
HDJ23
J23
HDJ24
M23
HDJ25
J25
HDJ26
L26
HDJ27
N24
HDJ28
M25
HDJ29
H26
HDJ30
N25
HDJ31
K25
HDJ32
Y26
HDJ33
AA24
HDJ34
T25
HDJ35
U23
HDJ36
V23
HDJ37
R24
R26
HDJ39
R23
HDJ40
AA23
HDJ41
U26
HDJ42
V24
HDJ43
U25
HDJ44
V26
HDJ45
Y23
HDJ46
AA26
HDJ47 H_IERRJ
Y25
HDJ48
AB25
HDJ49
AC23
HDJ50
AB24
HDJ51
AC20
HDJ52
AC22
HDJ53
AC25
HDJ54
AD23
HDJ55
AE22
HDJ56
AF23
HDJ57
AD24
HDJ58
AF20
HDJ59
AE21
HDJ60
AD21
HDJ61
AF25
HDJ62
AF22
HDJ63
AF26
C23
C22
K24
L24
W25
W24
AE24
AE25
D25
J26
T24
AD20
M2
H2
B14
B15
B5
H_CPURSTJ
B11
C19
+VCCP
H_A20MJ 14
H_FERRJ 14
H_IGNNEJ 14
H_SMIJ 14
H_INTR 14
H_NMI 14
H_STPCLKJ 14
H_CPUSLPJ 7,14
H_DPSLPJ 14,31
PM_THRMTRIPJ 7,14
R78 56
HADSTBJ0 7
HADSTBJ1 7
HREQJ0 7
HREQJ1 7
HREQJ2 7
HREQJ3 7
HREQJ4 7
ADSJ 7
HBREQJ0 7
BPRIJ 7
BNRJ 7
HLOCKJ 7
HITJ 7
HITMJ 7
DEFERJ 7
HTRDYJ 7
RSJ0 7
RSJ1 7
RSJ2 7
5
HAJ[3..31]
R75 56
Dummy
R77 220
PM_THRMTRIPJ
R0603+/-5%
R0603+/-5%
H_PWRGD
TCK_H
TDO_H
TDI_H
TMS_H
TRSTJ
DBRJ
R0402+/-5%
THERMDA
THERMDC
CPU_PROCHOTJ
HAJ3
HAJ4
HAJ5
HAJ6
HAJ7
HAJ8
HAJ9
HAJ10
HAJ11
HAJ12
HAJ13
HAJ14
HAJ15
HAJ16
HAJ17
HAJ18
HAJ19
HAJ20
HAJ21
HAJ22
HAJ23
HAJ24
HAJ25
HAJ26
HAJ27
HAJ28
HAJ29
HAJ30
HAJ31
HAJ[3..31] 7 HDJ[0..63] 7
D D
C C
B B
PM_SYSRSTJ 15,16
A A
+VCCP
HDJ[0..63]
3
HDSTBNJ0 7
HDSTBPJ0 7
HDSTBNJ1 7
HDSTBPJ1 7
HDSTBNJ2 7
HDSTBPJ2 7
HDSTBNJ3 7
HDSTBPJ3 7
HDBIJ0 7
HDBIJ1 7
HDBIJ2 7
HDBIJ3 7
DBSYJ 7
DRDYJ 7
CLK_CPU_BCLKJ 4
CLK_CPU_BCLK 4
H_INITJ 14
H_CPURSTJ 7
DPWRJ 7
+3V
R66
R65
8.2K
Q2
2N7002
D S
MBCLK 28,39
Q3
2N7002
MBDATA 28,39
TEMP_ALERTJ 28
D S
8.2K
G
G
+/-5%
R0402
6648CLK
6648DAT
+/-5%
R0402
U3 MAX6648
8
7
6
5
H_CPURSTJ
TDO_H
TMS_H
TDI_H HDJ38
DBRJ
TCK_H
TRSTJ
SMCLK
SMDATA
-ALT
GND
H_PWRGD 14
+3V
6648VCC
1
VCC
2
DXP
BC16 2.2nF C0603
3
DXN
4
-OVT
Dummy
R68 54.9 R0603+/-1%
R69 54.9 R0603+/-1%
Dummy
R70 39.2 R0603+/-1%
R71 150 R0603+/-5%
R72 150 R0603+/-5%
R73 27.4 R0402+/-1%
R74 680 R0603+/-5%
+VCCP
R67
100
+/-1%
R0603
R76
200
+/-1%
R0603
*
*
TEMP_OVTJ 30
+VCCP
H_PWRGD
BC15
0.1uF
C0603
THERMDA
THERMDC
TECHNOLOGY COPR.
Title
Dothan CPU-1
Document Number Re v
2
Date: Sheet
S04 MAINBOARD
1
54 0 Monday, June 14, 2004
A
of
5
+VCCP
BC18
EC1
150uF
*
2.5V, +/-20%
CTB
D D
VCORE_CPU
C C
EC2
150uF
*
2.5V, +/-20%
CTB
BC29
*
10uF
C0805
B B
BC39
*
10uF
C0805
BC49
*
10uF
C0805
A A
BC59
*
0.1uF
C0603
BC17
*
*
0.1uF
C0603
+VCCP
BC22
*
*
0.1uF
C0603
VCORE_CPU
BC30
*
*
*
*
BC31
*
10uF
10uF
C0805
C0805
BC40
BC41
*
10uF
10uF
C0805
C0805
VCORE_CPU VCORE_CPU
BC50
BC51
*
10uF
10uF
C0805
C0805
VCORE_CPU VCORE_CPU
BC60
BC61
*
0.1uF
0.1uF
C0603
C0603
5
BC19
*
0.1uF
C0603
BC23
0.1uF
C0603
*
*
*
*
*
0.1uF
C0603
BC24
*
*
0.1uF
C0603
10U/6.3V/X5R(CC0805)
5 mOhm*35
BC32
BC33
*
10uF
10uF
C0805
C0805
BC42
BC43
*
10uF
10uF
C0805
C0805
BC52
BC53
*
10uF
10uF
C0805
C0805
BC62
BC63
*
0.1uF
0.1uF
C0603
C0603
BC20
0.1uF
C0603
BC25
0.1uF
C0603
BC21
*
0.1uF
+VCCP
C0603
H_DPRSLPJ 14
BC26
*
0.1uF
C0603
BC34
*
*
10uF
C0805
BC44
*
*
10uF
C0805
BC54
*
10uF
C0805
BC64
*
10uF
C0805
+1.5V
R88
0
+/-5%
R0805
VCORE_CPU
BC35
10uF
C0805
VCORE_CPU VCORE_CPU
BC45
10uF
C0805
BC55
*
10uF
C0805
BC65
*
10uF
C0805
4
R79 27.4 R0402+/-1%
R80 54.9 R0402+/-1%
R81 27.4 R0402+/-1%
R82 54.9 R0402+/-1%
R83 1K R0603+/-1%
R84 2K R0603+/-1%
R85 0
+1.8V
+1.8V_R
*
BC36
*
10uF
C0805
BC46
*
10uF
C0805
*
*
4
BC56
10uF
C0805
BC66
10uF
C0805
R89
0
+/-5%
R0805
Dummy
BC27
10nF
C0402
*
*
*
BC37
10uF
C0805
BC47
10uF
C0805
*
*
R0402+/-5%
+1.8V_R
BC28
10uF
C0805
*
*
BC57
10uF
C0805
BC67
10uF
C0805
Dummy
R86
1K
+/-1%
R0603
BC38
10uF
C0805
BC48
10uF
C0805
*
*
DPRSLPJ
BC58
10uF
C0805
BC68
10uF
C0805
COMP0
COMP1
COMP2
COMP3
GTLREF0
TEST1
TEST2
Dummy
R87
1K
+/-1%
R0603
VCORE_CPU
AD26
AC26
W21
AA11
AA13
AA15
AA17
AA19
AA21
AB10
AB12
AB14
AB16
AB18
AB20
AB22
AC11
AC13
AC15
AC17
AC19
AD10
AD12
AD14
AD16
AD18
AE11
AE13
AE15
AE17
AE19
AF10
AF12
AF14
AF16
AF18
P25
P26
AB2
AB1
E26
AC1
D18
D20
D22
E17
E19
E21
G21
H22
K22
V22
Y22
AA5
AA7
AA9
AB6
AB8
AC9
AD8
AE9
AF8
G1
C5
F23
N1
B1
F26
D6
D8
E5
E7
E9
F6
F8
F18
F20
F22
G5
H6
J5
J21
U5
V6
W5
Y6
U2B
COMP0
COMP1
COMP2
COMP3
GTLREF0
RSVD
DPRSLP#
RSVD
TEST1
TEST2
VCCA3
VCCA2
VCCA1
VCCA0
VCC00
VCC01
VCC02
VCC03
VCC04
VCC05
VCC06
VCC07
VCC08
VCC09
VCC10
VCC11
VCC12
VCC13
VCC14
VCC15
VCC16
VCC17
VCC18
VCC19
VCC20
VCC21
VCC22
VCC23
VCC24
VCC25
VCC26
VCC27
VCC28
VCC29
VCC30
VCC31
VCC32
VCC33
VCC34
VCC35
VCC36
VCC37
VCC38
VCC39
VCC40
VCC41
VCC42
VCC43
VCC44
VCC45
VCC46
VCC47
VCC48
VCC49
VCC50
VCC51
VCC52
VCC53
VCC54
VCC55
VCC56
VCC57
VCC58
VCC59
VCC60
VCC61
VCC62
VCC63
VCC64
VCC65
VCC66
VCC67
VCC68
VCC69
VCC70
VCC71
Banias-Processor
3
Dothan
2 OF 3
POWER,
GROUND,
RESERVED
SIGNALS
3
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
A2
A5
A8
A11
A14
A17
A20
A23
A26
B3
B6
B9
B12
B16
B19
B22
B25
C1
C4
C7
C10
C13
C15
C18
C21
C24
D2
D5
D7
D9
D11
D13
D15
D17
D19
D21
D23
D26
E3
E6
E8
E10
E12
E14
E16
E18
E20
E22
E25
F1
F4
F5
F7
F9
F11
F13
F15
F17
F19
F21
F24
G2
G6
G22
G23
G26
H3
H5
H21
H25
J1
J4
J6
J22
J24
K2
K5
K21
K23
K26
L3
L6
L22
L25
M1
M4
M5
M21
M24
N3
N6
N22
N23
N26
P2
P5
P21
P24
R1
R4
Dummy
R90 54.9 R0603+/-1%
R91 54.9 R0603+/-1%
Dummy
CPU_BSEL1 4
CPU_BSEL0 4
PSIJ 31
2
+VCCP
CPU_VID0 31
CPU_VID1 31
CPU_VID2 31
CPU_VID3 31
CPU_VID4 31
CPU_VID5 31
VCCSEN
VSSSEN
U2C
D10
VCCP0
D12
VCCP1
D14
VCCP2
D16
VCCP3
E11
VCCP4
E13
VCCP5
E15
VCCP6
F10
VCCP7
F12
VCCP8
F14
VCCP9
F16
VCCP10
K6
VCCP11
L5
VCCP12
L21
VCCP13
M6
VCCP14
M22
VCCP15
N5
VCCP16
N21
VCCP17
P6
VCCP18
P22
VCCP19
R5
VCCP20
R21
VCCP21
T6
VCCP22
T22
VCCP23
U21
VCCP24
P23
VCCP25
W4
VCCP26
E2
VID0
F2
VID1
F3
VID2
G3
VID3
G4
VID4
H4
VID5
AE7
VCCSENSE
AF6
VSSSENSE
B2
RSVD
AF7
RSVD
C14
BSE[1]
C3
RSVD
C16
BSE[0]
E1
PSI#
R6
VSS
R22
VSS
R25
VSS
T3
VSS
T5
VSS
T21
VSS
T23
VSS
T26
VSS
U2
VSS
U6
VSS
U22
VSS
U24
VSS
V1
VSS
V4
VSS
V5
VSS
V21
VSS
V25
VSS
W3
VSS
W6
VSS
W22
VSS
Banias-Processor
Dothan
3 OF 3
POWER, GR OUND AND NC
VID
1
W23
VSS
W26
VSS
Y2
VSS
Y5
VSS
Y21
VSS
Y24
VSS
AA1
VSS
AA4
VSS
AA6
VSS
AA8
VSS
AA10
VSS
AA12
VSS
AA14
VSS
AA16
VSS
AA18
VSS
AA20
VSS
AA22
VSS
AA25
VSS
AB3
VSS
AB5
VSS
AB7
VSS
AB9
VSS
AB11
VSS
AB13
VSS
AB15
VSS
AB17
VSS
AB19
VSS
AB21
VSS
AB23
VSS
AB26
VSS
AC2
VSS
AC5
VSS
AC8
VSS
AC10
VSS
AC12
VSS
AC14
VSS
AC16
VSS
AC18
VSS
AC21
VSS
AC24
VSS
AD1
VSS
AD4
VSS
AD7
VSS
AD9
VSS
AD11
VSS
AD13
VSS
AD15
VSS
AD17
VSS
AD19
VSS
AD22
VSS
AD25
VSS
AE3
VSS
AE6
VSS
AE8
VSS
AE10
VSS
AE12
VSS
AE14
VSS
AE16
VSS
AE18
VSS
AE20
VSS
AE23
VSS
AE26
VSS
AF2
VSS
AF5
VSS
AF9
VSS
AF11
VSS
AF13
VSS
AF15
VSS
AF17
VSS
AF19
VSS
AF21
VSS
AF24
VSS
TECHNOLOGY COPR.
Title
Dothan CPU-2
Document Number Re v
2
Date: Sheet
S04 MAINBOARD
1
64 0 Monday, June 14, 2004
A
of
5
HDJ[0..63] 5 HAJ[3..31] 5
HDJ0
HDJ1
HDJ2
HDJ3
HDJ4
HDJ5
HDJ6
HDJ7
H_XRCOMP
H_XSCOMP
H_XSWING
H_YRCOMP
H_YSCOMP
H_YSWING
R102 54.9
R105 54.9
R110 24.9
R111 24.9
HDJ8
HDJ9
HDJ10
HDJ11
HDJ12
HDJ13
HDJ14
HDJ15
HDJ16
HDJ17
HDJ18
HDJ19
HDJ20
HDJ21
HDJ22
HDJ23
HDJ24
HDJ25
HDJ26
HDJ27
HDJ28
HDJ29
HDJ30
HDJ31
HDJ32
HDJ33
HDJ34
HDJ35
HDJ36
HDJ37
HDJ38
HDJ39
HDJ40
HDJ41
HDJ42
HDJ43
HDJ44
HDJ45
HDJ46
HDJ47
HDJ48
HDJ49
HDJ50
HDJ51
HDJ52
HDJ53
HDJ54
HDJ55
HDJ56
HDJ57
HDJ58
HDJ59
HDJ60
HDJ61
HDJ62
HDJ63
5
D D
C C
B B
H_XSCOMP
H_YSCOMP
A A
H_XRCOMP
H_YRCOMP
U4A
E4
HD0#
E1
HD1#
F4
HD2#
H7
HD3#
E2
HD4#
F1
HD5#
E3
HD6#
D3
HD7#
K7
HD8#
F2
HD9#
J7
HD10#
J8
HD11#
H6
HD12#
F3
HD13#
K8
HD14#
H5
HD15#
H1
HD16#
H2
HD17#
K5
HD18#
K6
HD19#
J4
HD20#
G3
HD21#
H3
HD22#
J1
HD23#
L5
HD24#
K4
HD25#
J5
HD26#
P7
HD27#
L7
HD28#
J3
HD29#
P5
HD30#
L3
HD31#
U7
HD32#
V6
HD33#
R6
HD34#
R5
HD35#
P3
HD36#
T8
HD37#
R7
HD38#
R8
HD39#
U8
HD40#
R4
HD41#
T4
HD42#
T5
HD43#
R1
HD44#
T3
HD45#
V8
HD46#
U6
HD47#
W6
HD48#
U3
HD49#
V5
HD50#
W8
HD51#
W7
HD52#
U2
HD53#
U1
HD54#
Y5
HD55#
Y2
HD56#
V4
HD57#
Y7
HD58#
W1
HD59#
W3
HD60#
Y3
HD61#
Y6
HD62#
W2
HD63#
C1
HXRCOMP
C2
HXSCOMP
D1
HXSWING
T1
HYRCOMP
L1
HYSCOMP
P1
HYSWING
ALVISO_90
+VCCP
R0603+/-1%
R0603+/-1%
R0402+/-1%
R0402+/-1%
+VCCP +VCCP +VCCP
R106
221
+/-1%
R0603
R112
100
+/-1%
R0603
HA10#
HA11#
HA12#
HA13#
HA14#
HA15#
HA16#
HA17#
HA18#
HA19#
HA20#
HA21#
HA22#
HA23#
HA24#
HA25#
HA26#
HA27#
HA28#
HA29#
HA30#
HA31#
HADS#
HADSTB#0
HOST
HADSTB#1
HVREF
HBNR#
HBPRI#
HBREQ0#
HCPURST#
HCLKINN
HCLKINP
HDBSY#
HDEFER#
HDINV#0
HDINV#1
HDINV#2
HDINV#3
HDPWR#
HDRDY#
HDSTBN#0
HDSTBN#1
HDSTBN#2
HDSTBN#3
HDSTBP#0
HDSTBP#1
HDSTBP#2
HDSTBP#3
HEDRDY#
HHIT#
HHITM#
HLOCK#
HPCREQ#
HREQ#0
HREQ#1
HREQ#2
HREQ#3
HREQ#4
HRS0#
HRS1#
HRS2#
HCPUSLP#
HTRDY#
H_XSWING H_YSWING H_VREF M_RCOMPN
BC75
*
0.1uF
C0603
NEAR NB NEAR NB NEAR NB
HA3#
HA4#
HA5#
HA6#
HA7#
HA8#
HA9#
4
HAJ3
G9
HAJ4
C9
HAJ5
E9
HAJ6
B7
HAJ7
A10
HAJ8
F9
HAJ9
D8
HAJ10
B10
HAJ11
E10
HAJ12
G10
HAJ13
D9
HAJ14
E11
HAJ15
F10
HAJ16
G11
HAJ17
G13
HAJ18
C10
HAJ19
C11
HAJ20
D11
HAJ21
C12
HAJ22
B13
HAJ23
A12
HAJ24
F12
HAJ25
G12
HAJ26
E12
HAJ27
C13
HAJ28
B11
HAJ29
D13
HAJ30
A13
HAJ31
F13
F8
B9
E13
H_VREF
J11
A5
D5
E7
H10
AB1
AB2
C6
E6
H8
K3
T7
U5
G6
F7
G4
K1
R3
V3
G5
K2
R2
W4
F6
D4
D6
B3
A11
A7
D7
B8
C7
A8
A4
C5
B4
H_CPUSLPJ_GMCH
G8
B5
R107
221
+/-1%
R0603
R113
100
+/-1%
R0603
4
BNRJ 5
BPRIJ 5
HBREQJ0 5
H_CPURSTJ 5
CLK_MCH_BCLKJ 4
CLK_MCH_BCLK 4
BC76
*
0.1uF
C0603
ADSJ 5
HADSTBJ0 5
HADSTBJ1 5
DBSYJ 5
DEFERJ 5
HDBIJ0 5
HDBIJ1 5
HDBIJ2 5
HDBIJ3 5
DPWRJ 5
DRDYJ 5
HDSTBNJ0 5
HDSTBNJ1 5
HDSTBNJ2 5
HDSTBNJ3 5
HDSTBPJ0 5
HDSTBPJ1 5
HDSTBPJ2 5
HDSTBPJ3 5
HITJ 5
HITMJ 5
HLOCKJ 5
HREQJ0 5
HREQJ1 5
HREQJ2 5
HREQJ3 5
HREQJ4 5
RSJ0 5
RSJ1 5
RSJ2 5
R99 0
HTRDYJ 5
R0402+/-5%
Dummy
*
R108
100
+/-1%
R0603
R114
200
+/-1%
R0603
BC70
0.1uF
C0603
H_CPUSLPJ 5,14
BC77
*
0.1uF
C0603
3
M_CLK_DDR0 12
M_CLK_DDR1 12
M_CLK_DDR3 13
M_CLK_DDR4 13
M_CLK_DDRJ0 12
M_CLK_DDRJ1 12
M_CLK_DDRJ3 13
M_CLK_DDRJ4 13
M_CKE0 12
M_CKE1 12
M_CKE2 13
M_CKE3 12,13
M_CSJ0 12
M_CSJ1 12
M_CSJ2 12,13
M_CSJ3 13
R95 40.2 R0402+/-1%
R97 40.2 R0402+/-1%
M_VREF
VDIMM
R109
80.6
+/-1%
R0402
M_RCOMPP
R115
80.6
+/-1%
R0402
3
DMI_TXN0 15
DMI_TXN1 15
DMI_TXN2 15
DMI_TXN3 15
DMI_TXP0 15
DMI_TXP1 15
DMI_TXP2 15
DMI_TXP3 15
DMI_RXN0 15
DMI_RXN1 15
DMI_RXN2 15
DMI_RXN3 15
DMI_RXP0 15
DMI_RXP1 15
DMI_RXP2 15
DMI_RXP3 15
SMOCDCOMP0
SMOCDCOMP1
M_RCOMPN
M_RCOMPP
SMXSLEW
SMYSLEW
+2.5V
R103
10K
R0402
+/-5%
AA31
AB35
AC31
AD35
Y31
AA35
AB31
AC35
AA33
AB37
AC33
AD37
Y33
AA37
AB33
AC37
AM33
AL1
AE11
AJ34
AF6
AC10
AN33
AK1
AE10
AJ33
AF5
AD10
AP21
AM21
AH21
AK21
AN16
AM14
AH15
AG16
AF22
AF16
AP14
AL15
AM11
AN10
AK10
AK11
AF37
AD1
AE27
AE28
AF9
AF10
R104
10K
R0402
+/-5%
2
U4B
DMIRXN0
DMIRXN1
DMIRXN2
DMIRXN3
DMIRXP0
DMIRXP1
DMIRXP2
DMIRXP3
DMITXN0
DMITXN1
DMITXN2
DMITXN3
DMITXP0
DMITXP1
DMITXP2
DMITXP3
SM_CK0
SM_CK1
SM_CK2
SM_CK3
SM_CK4
SM_CK5
SM_CK0#
SM_CK1#
SM_CK2#
SM_CK3#
SM_CK4#
SM_CK5#
SM_CKE0
SM_CKE1
SM_CKE2
SM_CKE3
SM_CS0#
SM_CS1#
SM_CS2#
SM_CS3#
SM_OCDCOMP0
SM_OCDCOMP1
SM_ODT0
SM_ODT1
SM_ODT2
SM_ODT3
SMRCOMPN
SMRCOMPP
SMVREF0
SMVREF1
SMXSLEWIN
SMXSLEWOUT
SMYSLEWIN
SMYSLEWOUT
ALVISO_90
PM_EXTTSJ0
PM_EXTTSJ1
2
1
GMCH_CFG0
G16
CFG0
H13
CFG1
G14
CFG2
F16
CFG3
F15
CFG4
G15
CFG5
E16
CFG6
D17
CFG7
DMI
CFG/RSVD
DDR MUXING
THRMTRIP#
PM CLK
DREF_CLKN
DREF_CLKP
DREF_SSCLKN
DREF_SSCLKP
NC
VDIMM
R100
4.7K
+/-5%
R0603
Dummy
R101
4.7K
+/-5%
R0603
Dummy
Title
Document Number Re v
Date: Sheet
J16
CFG8
D15
CFG9
E15
CFG10
D14
CFG11
E14
CFG12
H12
CFG13
C14
CFG14
H15
CFG15
J15
CFG16
H14
CFG17
G22
CFG18
G23
CFG19
D23
CFG20
G25
RSVD21
G24
RSVD22
J17
RSVD23
A31
RSVD24
A30
RSVD25
D26
RSVD26
D25
RSVD27
J23
BM_BUSY#
EXT_TS0#
EXT_TS1#
PWROK
RSTIN#
NC1
NC2
NC3
NC4
NC5
NC6
NC7
NC8
NC9
NC10
NC11
PM_EXTTSJ0
J21
PM_EXTTSJ1
H22
F5
AD30
AE29
A24
A23
C37
D37
AP37
AN37
AP36
AP2
AP1
AN1
B1
A2
B37
A36
A37
BC71
*
*
0.1uF
C0402
Alviso MCH-1
S04 MAINBOARD
*
PM_THRMTRIPJ 5,14
IMVP_PWG 15,31
PLT_RSTJ 15, 17,21,38
R934 0 R0402+/-5%
R935 0 R0402+/-5%
R96 0 R0402+/-5%
R98 0 R0402+/-5%
BC72
2.2uF
C0603
BC69
0.1uF
C0603
Dummy
*
R93 10K R0402+/-5%
MCH_BSEL1 4
MCH_BSEL0 4
CFG5 8
CFG6 8
CFG8 8
CFG9 8
CFG16 8
CFG18 8
CFG19 8
CFG20 8
R94
0
+/-5%
R0402
MCH_SYNCJ 15,16
PM_BMBUSYJ 15
M_VREF
BC73
*
2.2uF
C0603
1
BC74
0.1uF
C0402
+VCCP
DREFCLKJ 4
DREFCLK 4
DREFssCLKJ 4
DREFssCLK 4
TECHNOLOGY COPR.
of
74 0 Monday, June 14, 2004
A
5
4
3
2
1
R_M_A_DQ[0..63] 12
R_M_A_DQ0
R_M_A_DQ1
R_M_A_DQ2
R_M_A_DQ3
D D
C C
B B
R_M_A_DQ4
R_M_A_DQ5
R_M_A_DQ6
R_M_A_DQ7
R_M_A_DQ8
R_M_A_DQ9
R_M_A_DQ10
R_M_A_DQ11
R_M_A_DQ12
R_M_A_DQ13
R_M_A_DQ14
R_M_A_DQ15
R_M_A_DQ16
R_M_A_DQ17
R_M_A_DQ18
R_M_A_DQ19
R_M_A_DQ20
R_M_A_DQ21
R_M_A_DQ22
R_M_A_DQ23
R_M_A_DQ24
R_M_A_DQ25
R_M_A_DQ26
R_M_A_DQ27
R_M_A_DQ28
R_M_A_DQ29
R_M_A_DQ30
R_M_A_DQ31
R_M_A_DQ32
R_M_A_DQ33
R_M_A_DQ34
R_M_A_DQ35
R_M_A_DQ36
R_M_A_DQ37
R_M_A_DQ38
R_M_A_DQ39
R_M_A_DQ40
R_M_A_DQ41
R_M_A_DQ42
R_M_A_DQ43
R_M_A_DQ44
R_M_A_DQ45
R_M_A_DQ46
R_M_A_DQ47
R_M_A_DQ48
R_M_A_DQ49
R_M_A_DQ50
R_M_A_DQ51
R_M_A_DQ52
R_M_A_DQ53
R_M_A_DQ54
R_M_A_DQ55
R_M_A_DQ56
R_M_A_DQ57
R_M_A_DQ58
R_M_A_DQ59
R_M_A_DQ60
R_M_A_DQ61
R_M_A_DQ62
R_M_A_DQ63
AG35
AH35
AL35
AL37
AH36
AJ35
AK37
AL34
AM36
AN35
AP32
AM31
AM34
AM35
AL32
AM32
AN31
AP31
AN28
AP28
AL30
AM30
AM28
AL28
AP27
AM27
AM23
AM22
AL23
AM24
AN22
AP22
AM9
AL9
AL6
AP7
AP11
AP10
AL7
AM7
AN5
AN6
AN3
AP3
AP6
AM6
AL4
AM3
AK2
AK3
AG2
AG1
AL3
AM2
AH3
AG3
AF3
AE3
AD6
AC4
AF2
AF1
AD4
AD5
U4C
SADQ0
SADQ1
SADQ2
SADQ3
SADQ4
SADQ5
SADQ6
SADQ7
SADQ8
SADQ9
SADQ10
SADQ11
SADQ12
SADQ13
SADQ14
SADQ15
SADQ16
SADQ17
SADQ18
SADQ19
SADQ20
SADQ21
SADQ22
SADQ23
SADQ24
SADQ25
SADQ26
SADQ27
SADQ28
SADQ29
SADQ30
SADQ31
SADQ32
SADQ33
SADQ34
SADQ35
SADQ36
SADQ37
SADQ38
SADQ39
SADQ40
SADQ41
SADQ42
SADQ43
SADQ44
SADQ45
SADQ46
SADQ47
SADQ48
SADQ49
SADQ50
SADQ51
SADQ52
SADQ53
SADQ54
SADQ55
SADQ56
SADQ57
SADQ58
SADQ59
SADQ60
SADQ61
SADQ62
SADQ63
ALVISO_90
AK15
SA_BS0#
AK16
SA_BS1#
AL21
SA_BS2#
R_M_A_DM0
AJ37
SA_DM0
SA_DM1
SA_DM2
SA_DM3
SA_DM4
SA_DM5
SA_DM6
SA_DM7
SA_DQS0
SA_DQS1
SA_DQS2
SA_DQS3
SA_DQS4
SA_DQS5
SA_DQS6
SA_DQS7
SA_DQS0#
SA_DQS1#
SA_DQS2#
SA_DQS3#
SA_DQS4#
SA_DQS5#
SA_DQS6#
SA_DQS7#
SA_MA0
SA_MA1
SA_MA2
SA_MA3
SA_MA4
SA_MA5
SA_MA6
SA_MA7
SA_MA8
SA_MA9
SA_MA10
SA_MA11
DDR SYSTEM MEMORY A
SA_MA12
SA_MA13
SA_CAS#
SA_RAS#
RCVENIN#
RCVENOUT#
SA_WE#
AP35
AL29
AP24
AP9
AP4
AJ2
AD3
AK36
AP33
AN29
AP23
AM8
AM4
AJ1
AE5
AK35
AP34
AN30
AN23
AN8
AM5
AH1
AE4
AL17
AP17
AP18
AM17
AN18
AM18
AL19
AP20
AM19
AL20
AM16
AN20
AM20
AM15
AN15
AP16
AF29
AF28
AP15
R_M_A_DM1
R_M_A_DM2
R_M_A_DM3
R_M_A_DM4
R_M_A_DM5
R_M_A_DM6
R_M_A_DM7
R_M_A_DQS0
R_M_A_DQS1
R_M_A_DQS2
R_M_A_DQS3
R_M_A_DQS4
R_M_A_DQS5
R_M_A_DQS6
R_M_A_DQS7
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_BSJ0 12
M_A_BSJ1 12
M_A_WEJ 12
R_M_A_DM[0..7] 12
R_M_A_DQS[0..7] 12
M_A_A[0..13] 12
M_A_CASJ 1 2,13
M_A_RASJ 1 2,13
AE31
AE32
AG32
AG36
AE34
AE33
AF31
AF30
AH33
AH32
AK31
AG30
AG34
AG33
AH31
AJ31
AK30
AJ30
AH29
AH28
AK29
AH30
AH27
AG28
AF24
AG23
AJ22
AK22
AH24
AH23
AG22
AJ21
AG10
AG9
AG8
AH8
AH11
AH10
AK9
AK6
AH5
AK8
AK4
AG5
AG4
AD8
AD9
AH4
AG6
AE8
AD7
AC5
AB8
AB6
AA8
AC8
AC7
AA4
AA5
AJ9
AJ7
AJ4
AJ8
AJ5
U4D
SBDQ0
SBDQ1
SBDQ2
SBDQ3
SBDQ4
SBDQ5
SBDQ6
SBDQ7
SBDQ8
SBDQ9
SBDQ10
SBDQ11
SBDQ12
SBDQ13
SBDQ14
SBDQ15
SBDQ16
SBDQ17
SBDQ18
SBDQ19
SBDQ20
SBDQ21
SBDQ22
SBDQ23
SBDQ24
SBDQ25
SBDQ26
SBDQ27
SBDQ28
SBDQ29
SBDQ30
SBDQ31
SBDQ32
SBDQ33
SBDQ34
SBDQ35
SBDQ36
SBDQ37
SBDQ38
SBDQ39
SBDQ40
SBDQ41
SBDQ42
SBDQ43
SBDQ44
SBDQ45
SBDQ46
SBDQ47
SBDQ48
SBDQ49
SBDQ50
SBDQ51
SBDQ52
SBDQ53
SBDQ54
SBDQ55
SBDQ56
SBDQ57
SBDQ58
SBDQ59
SBDQ60
SBDQ61
SBDQ62
SBDQ63
ALVISO_90
AJ15
SB_BS0#
AG17
SB_BS1#
AG21
SB_BS2#
AF32
SB_DM0
AK34
SB_DM1
AK27
SB_DM2
AK24
SB_DM3
AJ10
SB_DM4
AK5
SB_DM5
AE7
SB_DM6
AB7
SB_DM7
AF34
SB_DQS0
AK32
SB_DQS1
AJ28
SB_DQS2
AK23
SB_DQS3
AM10
SB_DQS4
AH6
SB_DQS5
AF8
SB_DQS6
AB4
SB_DQS7
AF35
SB_DQS0#
AK33
SB_DQS1#
AK28
SB_DQS2#
AJ23
SB_DQS3#
AL10
SB_DQS4#
AH7
SB_DQS5#
AF7
SB_DQS6#
AB5
SB_DQS7#
M_B_A0
AH17
SB_MA0
SB_MA1
SB_MA2
SB_MA3
SB_MA4
SB_MA5
SB_MA6
SB_MA7
SB_MA8
SB_MA9
SB_MA10
SB_MA11
SB_MA12
SB_MA13
DDR SYSTEM MEMORY B
SB_CAS#
SB_RAS#
SB_RCVENIN#
SB_RCVENOUT#
SB_WE#
AK17
AH18
AJ18
AK18
AJ19
AK19
AH19
AJ20
AH20
AJ16
AG18
AG20
AG15
AH14
AK14
AF15
AF14
AH16
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_BSJ0 13
M_B_BSJ1 13
M_B_CASJ 13
M_B_RASJ 13
M_B_WEJ 13
M_B_A[0..13] 13
CFG[3..17] internal pullup
R118 2.2K
CFG5 7
CFG8 7
A A
CFG9 7 CFG16 7
R0402+/-5%
R120 2.2K
R0402+/-5%
R123 2.2K
R0402+/-5%
5
Dummy
Dummy
Dummy
1=DMI 8X
0=DMI 4X
R124 2.2K
4
Dummy
R0402+/-5%
CFG[18..20] internal pulldown
R116 1K
CFG18 7
R122 1K
CFG19 7
R125 1K
CFG20 7
3
R0603+/-1%
CPU_VTT=1.05V
R0603+/-1%
CPU_VTT=1.05V
R0603+/-1%
Dummy
Dummy
+2.5V
+2.5V
+2.5V
CFG6 7
R117 2.2K
Dummy
R0402+/-5%
DDR
TECHNOLOGY COPR.
Title
Alviso MCH-2
Document Number Re v
2
Date: Sheet
S04 MAINBOARD
1
84 0 Monday, June 14, 2004
A
of
5
AA29
W29
V29
U29
P29
L29
H29
G29
F29
E29
D29
A29
AC28
AB28
AA28
W28
E28
AN27
AL27
AJ27
AG27
AF27
AB27
AA27
W27
G27
E27
AN24
B27
J26
G26
E26
A26
AL24
VSS103
VSS104
VSS105
VSS106
VSS107
VSS108
VSS109
VSS110
VSS111
VSS112
VSS113
VSS114
VSS115
VSS116
VSS117
VSS118
VSS119
VSS120
VSS121
VSS122
VSS123
VSS124
VSS125
VSS126
VSS127
VSS128
VSS129
VSS266
VSS261
VSS262
VSS263
VSS264
VSS265
VSS267
D D
AG29
AD29
VSS102
AJ29
VSS100
VSS101
AM29
VSS99
C30
VSS98
Y30
VSS97
AA30
4
AB30
VSS95
VSS96
AC30
VSS94
AE30
VSS93
AP30
VSS92
D31
VSS91
E31
VSS90
F31
VSS89
G31
VSS88
H31
VSS87
J31
VSS86
K31
VSS85
L31
VSS84
M31
VSS83
N31
VSS82
P31
VSS81
R31
VSS80
T31
VSS79
U31
VSS78
V31
VSS77
W31
VSS76
AD31
VSS75
AG31
VSS74
AL31
VSS73
A32
VSS72
C32
VSS71
Y32
VSS70
AA32
VSS69
AB32
VSS68
AC32
VSS67
3
AD32
VSS66
AJ32
VSS65
AN32
VSS64
D33
VSS63
E33
VSS62
F33
VSS61
G33
VSS60
H33
VSS59
J33
VSS58
K33
VSS57
L33
VSS56
M33
VSS55
N33
VSS54
P33
VSS53
R33
VSS52
T33
VSS51
U33
VSS50
V33
VSS49
W33
VSS48
AD33
VSS47
AF33
VSS46
AL33
VSS45
C34
VSS44
AA34
VSS43
AB34
VSS42
AC34
VSS41
AD34
VSS40
AH34
VSS39
AN34
VSS38
2
B35
VSS37
D35
VSS36
E35
VSS35
F35
VSS34
G35
VSS33
H35
VSS32
J35
VSS31
K35
L35
VSS29
VSS30
M35
N35
VSS27
VSS28
P35
VSS26
R35
VSS25
T35
VSS24
U35
VSS23
V35
VSS22
W35
VSS21
Y35
VSS20
AE35
VSS19
C36
VSS18
AA36
VSS17
AB36
VSS16
AC36
VSS15
AD36
VSS14
AE36
VSS13
AF36
VSS12
AJ36
VSS11
AL36
VSS10
AN36
VSS9
E37
VSS8
H37
1
VSS7
K37
VSS6
M37
VSS5
P37
VSS4
T37
VSS3
V37
VSS2
Y37
VSS1
AG37
VSS0
U4E
ALVISO_90
VSS
VSS130
VSS131
VSS132
VSS133
VSS134
VSS135
VSS136
VSS137
VSS138
VSS139
VSS140
VSS141
VSS142
VSS143
VSS144
VSS145
VSS146
VSS147
VSS148
VSS149
VSS150
VSS151
VSS152
VSS153
VSS154
VSS155
VSS156
VSS157
VSS158
VSS159
VSS160
VSS161
VSS162
VSS163
VSS164
VSS165
VSS166
VSS167
VSS168
VSS169
VSS170
VSS171
VSS172
VSS173
VSS174
VSS175
VSS176
VSS177
VSS178
VSS179
VSS180
VSS181
VSS182
VSS183
VSS184
VSS185
VSS186
VSS187
VSS188
VSS189
VSS190
VSS191
VSS192
VSS193
VSS194
VSS195
VSS196
VSS197
VSS198
VSS199
VSS200
VSS201
VSS202
VSS203
VSS204
VSS205
VSS206
VSS207
VSS208V9VSS209
VSS210K9VSS211H9VSS212A9VSS213
VSS214Y8VSS215P8VSS216L8VSS217E8VSS218
VSS219
VSS220
VSS221
VSS222
VSS223V7VSS224G7VSS225
VSS226
VSS227
VSS228
VSS229T6VSS230P6VSS231L6VSS232J6VSS233B6VSS234
VSS235
VSS236
VSS237
VSS238
VSS239
VSS240
VSS241
VSS242P4VSS243L4VSS244H4VSS245C4VSS246
VSS247
VSS248
VSS249
VSS250
VSS251A3VSS252
VSS253
VSS254
VSS255
VSS256
VSS257V2VSS258T2VSS259P2VSS260
VSS268J2VSS269
VSS270D2VSS271
VSSALVDS
L2
Y1
G2
B36
C C
AD2
C3
AN2
AJ3
AB3
AA3
AC3
AL2
AE2
AH2
E5
Y4
U4
W5
AL5
AF4
AP5
AN4
AJ6
AE6
AA6
AC6
C8
AK7
AA7
AN7
AG7
T9
AL8
L10
F11
Y11
Y10
H11
D10
AE9
AA9
AN9
AH9
AC9
AA10
AA11
AF11
AG11
AJ11
AL11
AN11
J14
J12
F14
K14
B14
A14
B12
D12
AG14
AJ14
AL14
AN14
K16
A16
K15
C17
H16
D16
C15
AL16
G17
AJ17
AF17
AN17
J19
T19
B18
A18
H19
C19
U18
AL18
W19
AG19
AN19
A20
D20
VDIMM
F20
V20
E20
C21
G20
AK20
J22
F21
E22
A22
D22
AF21
AH22
AN21
AL22
J24
F24
B24
D24
H23
AF23
AG24
AJ24
Y14
B B
VSS_NCTF15
VSS_NCTF16
VSS_NCTF17
VSS_NCTF18
VSS_NCTF19
VSS_NCTF20
VSS_NCTF21
VSS_NCTF22
VSS_NCTF23
VSS_NCTF24
VSS_NCTF25
VSS_NCTF26
VSS_NCTF27
VSS_NCTF28
VSS_NCTF29
VSS_NCTF30
VSS_NCTF31
VSS_NCTF32
VSS_NCTF33
VSS_NCTF34
VSS_NCTF35
VSS_NCTF36
VSS_NCTF37
VSS_NCTF38
VSS_NCTF39
VSS_NCTF40
VSS_NCTF41
VSS_NCTF42
VSS_NCTF43
VSS_NCTF44
VSS_NCTF45
VSS_NCTF46
VSS_NCTF47
VSS_NCTF48
VSS_NCTF49
VSS_NCTF50
VSS_NCTF51
VSS_NCTF52
VSS_NCTF53
VSS_NCTF54
VSS_NCTF56
VSS_NCTF57
VSS_NCTF58
VSS_NCTF59
VSS_NCTF60
VSS_NCTF61
VSS_NCTF62
VSS_NCTF63
VSS_NCTF64
VSS_NCTF65
VSS_NCTF66
VSS_NCTF67
VSS_NCTF68
VSS_NCTF55
VSS_NCTF10
VSS_NCTF11
VSS_NCTF12
VSS_NCTF13
VSS_NCTF14
AA24
Y24
AB23
VSS_NCTF7
VSS_NCTF8
VSS_NCTF9
AA25
Y25
AB24
VSS_NCTF4
VSS_NCTF5
VSS_NCTF6
AB26
AA26
Y26
AB25
VSS_NCTF1
VSS_NCTF2
VSS_NCTF3
VSS_NCTF0
AB12
VCCSM_NCTF31
AC14
AD13
AC13
AB13
AD12
AC12
VCCSM_NCTF26
VCCSM_NCTF27
VCCSM_NCTF28
VCCSM_NCTF29
VCCSM_NCTF30
AD14
VCCSM_NCTF24
VCCSM_NCTF25
AD17
AC17
AD16
AC16
AD15
AC15
VCCSM_NCTF19
VCCSM_NCTF20
VCCSM_NCTF21
VCCSM_NCTF22
VCCSM_NCTF23
AC18
VCCSM_NCTF17
VCCSM_NCTF18
AC21
AD20
AC20
AD19
AC19
AD18
VCCSM_NCTF12
VCCSM_NCTF13
VCCSM_NCTF14
VCCSM_NCTF15
VCCSM_NCTF16
AD21
AD23
AC23
AD22
AC22
VCCSM_NCTF6
VCCSM_NCTF7
VCCSM_NCTF8
VCCSM_NCTF9
VCCSM_NCTF10
VCCSM_NCTF11
AC26
AD25
AC25
AD24
AC24
VCCSM_NCTF1
VCCSM_NCTF2
VCCSM_NCTF3
VCCSM_NCTF4
VCCSM_NCTF5
AD26
U4F
ALVISO_90
VCCSM_NCTF0
AA23
Y23
AB22
AA22
Y22
AB21
AA21
Y21
R21
AB20
AA20
AB19
AA19
AB18
AA18
AB17
AA17
Y17
R17
AB16
AA16
Y16
W16
V16
U16
T16
R16
P16
N16
M16
L16
AB15
AA15
Y15
W15
V15
U15
T15
R15
P15
N15
M15
L15
AB14
AA14
W14
V14
U14
T14
R14
P14
N14
M14
L14
AA13
Y13
AA12
Y12
NCTF
VCC_NCTF0
VCC_NCTF1
VCC_NCTF2
VCC_NCTF3
VCC_NCTF4
VCC_NCTF5
VCC_NCTF6
VCC_NCTF7
VCC_NCTF8
VCC_NCTF9
VCC_NCTF10
VCC_NCTF11
VCC_NCTF12
VCC_NCTF13
VCC_NCTF14
VCC_NCTF15
VCC_NCTF16
VCC_NCTF17
VCC_NCTF18
VCC_NCTF19
VCC_NCTF20
VCC_NCTF21
VCC_NCTF22
VCC_NCTF23
VCC_NCTF24
VCC_NCTF25
VCC_NCTF26
VCC_NCTF27
VCC_NCTF28
VCC_NCTF29
VCC_NCTF30
VCC_NCTF31
VCC_NCTF32
VCC_NCTF33
VCC_NCTF34
VCC_NCTF35
VCC_NCTF36
VCC_NCTF37
VCC_NCTF38
VCC_NCTF39
VCC_NCTF40
VCC_NCTF41
VCC_NCTF42
VCC_NCTF43
VCC_NCTF44
VCC_NCTF45
VCC_NCTF46
VCC_NCTF47
VCC_NCTF48
VCC_NCTF49
VCC_NCTF50
VCC_NCTF51
VCC_NCTF52
VCC_NCTF53
VCC_NCTF54
VCC_NCTF55
VCC_NCTF56
VCC_NCTF57
VCC_NCTF58
VCC_NCTF59
VCC_NCTF60
VCC_NCTF61
VCC_NCTF62
VCC_NCTF63
VCC_NCTF64
VCC_NCTF65
VCC_NCTF66
VCC_NCTF67
VCC_NCTF68
VCC_NTTF69
VCC_NCTF70
VCC_NCTF71
VCC_NCTF72
VCC_NCTF73
VCC_NCTF74
VCC_NCTF75
VCC_NCTF76
VCC_NCTF77
VCC_NCTF78
VTT_NCTF0
VTT_NCTF1
VTT_NCTF2
VTT_NCTF3
VTT_NCTF4
VTT_NCTF5
VTT_NCTF6
VTT_NCTF7
VTT_NCTF8
VTT_NCTF9
VTT_NCTF10
VTT_NCTF11
VTT_NCTF12
VTT_NCTF13
VTT_NCTF14
VTT_NCTF15
VTT_NCTF16
VTT_NCTF17
L12
N12
M12
+VCCP
A A
5
L13
W12
T13
V13
P13
U13
R13
N13
M13
T12
V12
P12
U12
R12
W13
L17
M17
L18
T17
V17
P17
N17
4
N18
U17
M18
W17
P19
Y18
P18
R19
N19
R18
M19
Y20
P20
Y19
R20
N20
M21
M20
L21
L20
L19
L22
T21
V21
P21
N21
N22
U21
M22
W21
3
L23
T22
V22
P22
R22
N23
U22
M23
W22
L24
T23
V23
P23
R23
N24
U23
M24
W23
L25
T24
V24
P24
R24
N25
U24
M25
W24
2
L26
W25
T26
V26
P26
U26
R26
N26
M26
W26
VCORE_GMCH
T25
V25
P25
U25
R25
TECHNOLOGY COPR.
Title
Alviso MCH-3
Document Number Re v
Date: Sheet
S04 MAINBOARD
1
94 0 Monday, June 14, 2004
A
of
5
BC85
BC84
0.22uF
0.22uF
C0603
C0603
D D
+VCCP
BC88
*
*
4.7uF
C1206
BC89
4.7uF
C1206
BC90
*
2.2uF
C0805
*
*
G1
BC86
0.47uF
*
C0603
BC87
0.47uF
*
C0603
4
VCORE_GMCH
R828 0 R0603+/-5% @M24
VTT23Y9VTT24W9VTT25U9VTT26R9VTT27P9VTT28N9VTT29M9VTT30L9VTT31J9VTT32N8VTT33M8VTT34N7VTT35M7VTT36N6VTT37M6VTT38A6VTT39N5VTT40M5VTT41N4VTT42M4VTT43N3VTT44M3VTT45N2VTT46M2VTT47B2VTT48V1VTT49N1VTT50M1VTT51
R127 0 R0603+/-5% @M24
U10
T10
R10
P10
N10
M10
K10
J10
VTT15
VTT16
VTT17
VTT18
VTT19
VTT20
VTT21
VTT22
V10
VTT14
W10
VTT13
K11
VTT12
L11
VTT11
GMCH_VCC_SYNC
M11
R11
P11
N11
VTT7
VTT8
VTT9
VTT10
T11
VTT6
U11
VTT5
VCCA_CRTDAC
J13
K12
W11
V11
VTT1
VTT2
VTT3
VTT4
K13
VTT0
VCCH_MPLL +VCCP
H20
G19
VCC_SYNC
VSSA_CRTDAC
3
VCCH_HPLL
VCCH_DPLLB
AA1
AA2
F19
E19
C35
VCCA_HPLL
VCCA_MPLL
VCCA_CRTDAC0
VCCA_CRTDAC1
VCCH_DPLLA
+1.5V
AC2
AC1
B23
VCCA_DPLLA
VCCA_DPLLB
VCCH_MPLL1
VCCH_MPLL0
K17
VCC48
K18
VCC47
T18
VCC46
V18
VCC45
W18
VCC44
K19
VCC43
U19
VCC42
V19
VCC41
K20
VCC40
T20
VCC39
U20
VCC38
W20
VCC37
K21
VCC36
K22
VCC35
K23
VCORE_GMCH
H26
K25
J25
K24
VCC30
VCC31
VCC32
VCC33
VCC34
K26
VCC29
2
H27
VCC28
J27
VCC27
K27
VCC26
L27
VCC25
M27
VCC24
N27
VCC23
R27
P27
VCC22
T27
VCC20
VCC21
U27
VCC19
V27
VCC18
VCORE_GMCH
BC78
*
0.1uF
C0402
K28
J28
H28
G28
VCC14
VCC15
VCC16
VCC17
R126 0 R1206+/-5%
*
R28
P28
N28
M28
L28
VCC9
VCC10
VCC11
VCC12
VCC13
BC79
0.1uF
C0402
U28
T28
VCC8
V28
VCC7
VCC6
*
J29
K29
VCC5
BC80
0.1uF
C0402
M29
VCC4
N29
VCC3
R29
VCC2
*
T29
VCC1
1
BC81
10uF
C0805
U4G
ALVISO_90
VCC0
+VCCP
BC82
10uF
C0805
BC83
*
10uF
C0805
*
POWER
VCCA_TVDACA0
VCCA_TVDACA1
VCCA_TVDACB0
VCCA_TVDACB1
VCCA_TVDACC0
VCCA_TVDACC1
VCCA_TVBG
VSSA_TVBG
VCCD_TVDAC
VCCDQ_TVDAC
VCCD_LVDS0
VCCD_LVDS1
VCCD_LVDS2
VCCA_LVDS
VCCHV0
VCCHV1
VCCHV2
VCCSM0
VCCSM1
VCCSM2
VCCSM3
VCCSM4
VCCSM5
VCCSM6
VCCSM7
VCCSM8
VCCSM9
VCCSM10
VCCSM11
VCCSM12
VCCSM13
VCCSM14
VCCSM15
VCCSM16
VCCSM17
VCCSM18
VCCSM19
VCCSM20
VCCSM21
VCCSM22
VCCSM23
VCCSM24
VCCSM25
VCCSM26
VCCSM27
VCCSM28
VCCSM29
VCCSM30
VCCSM31
VCCSM32
VCCSM33
VCCSM34
VCCSM35
VCCSM36
VCCSM37
VCCSM38
VCCSM39
VCCSM40
VCCSM41
VCCSM42
VCCSM43
VCCSM44
VCCSM45
VCCSM46
VCCSM47
VCCSM48
VCCSM49
VCCSM50
VCCSM51
VCCSM52
VCCSM53
VCCSM54
VCCSM55
VCCSM56
VCCSM57
VCCSM58
VCCSM59
VCCSM60
VCCSM61
VCCSM62
VCCSM63
VCCSM64
VCCTX_LVDS0
VCCTX_LVDS1
VCCTX_LVDS2
VCCA_SM0
VCCA_SM1
VCCA_SM2
VCCA_SM3
VCC3G0
VCC3G1
VCC3G2
VCC3G3
VCC3G4
VCC3G5
VCC3G6
VCCA_3GPLL0
VCCA_3GPLL1
VCCA_3GPLL2
VCCA_3GBG
VSSA_3GBG
C C
BC91
0.1uF
C0402
F37
G37
+2.5V
*
J37
L37
Y29
Y28
Y27
VCCA_3GPLL VC CA_3G VCCA_SM +2.5V
U37
R37
N37
W37
AE37
AF18
AF19
AP19
AF20
A28
A27
H17
D19
BC100
10nF
C0402
E18
H18
G18
VCCA_TVBG
VCCD_TVDAC
VCCDQ_TVDAC
+2.5V
BC101
*
0.1uF
C0402
D18
C18
TVDACB
TVDACC
R128
0 R0603+/-5% @M24
TVDACA
R129 0 R0603+/-5% @M24
R130 0 R0603+/-5% @M24
R131 0 R0603+/-5% @M24
R133 0 R0603+/-5% @M24
R134 0 R0603+/-5% @M24
BC102
*
10uF
C0805
+1.5V
BC103
*
0.1uF
C0402
B28
AB9
AP8
AE1
AM1
AB11
AB10
BC96
BC95
*
*
0.1uF
0.1uF
C0402
C0402
AC11
AD11
AE12
AF12
*
AG12
AH12
BC97
0.1uF
C0402
AJ12
AK12
AL12
AM12
AN12
AP12
VDIMM
AE13
AF13
AG13
AH13
AJ13
AK13
AL13
AM13
AN13
AP13
AE14
AE15
AE16
AE17
AE18
AE19
AE20
AE21
*
AE22
AE23
BC92
0.1uF
C0402
AE24
AE25
AF25
AG25
AH25
AJ25
*
AK25
AL25
AM25
BC93
0.1uF
C0402
AN25
AP25
AE26
AF26
AG26
*
AH26
AJ26
AK26
BC94
0.1uF
C0402
AL26
AM26
AN26
AP26
AC27
AD27
AD28
AP29
BC98
0.1uF
C0402
AH37
AM37
A21
+2.5V
BC99
*
*
10uF
C0805
*
B26
B25
A25
A35
B22
B21
F17
F18
E17
L1 L0805 1uH
EC5
220uF
2.5V, +/-20%
CTX
4
*
L3 L1211 82nH
*
1A
L5 L0805 1uH
*
L6 L0805 1uH
*
L7 L0805 1uH
*
FB45
FB L0805 180 Ohm
@GM
VDIMM
BC104 0.1uF C0402
B B
BC105 0.1uF C0402
BC108 0.1uF C0402
BC111 0.1uF C0402
BC112 0.1uF C0402
BC113 0.1uF C0402
BC117 10uF C0805
BC120 10uF C0805
A A
BC130
*
0.1uF
C0402
*
*
*
*
*
*
VCCA_3GPLL
*
*
VCCH_MPLL
+2.5V
BC132
BC131
*
*
4.7uF
C1206
0.1uF
C0402
5
BC106
*
0.1uF
C0402
BC114
*
10uF
C0805
BC123
*
10uF
C0805
BC129
*
0.1uF
C0402
BC133
*
0.1uF
C0402
BC732
*
0.1uF
C0402
@GM
EC3
220uF
*
2.5V, +/-20%
CTX
BC115
10uF
C0805
*
*
*
*
BC124
0.1uF
C0402
EC8
470uF
2.5V, +/-20%
CTX
EC9
470uF
2.5V, +/-20%
CTX
*
BC733
22pF
*
C0402
@GM
+1.5V VCCA_SM
+1.5V VC CA_3G
+1.5V
+1.5V VCCH_HPLL
+1.5V
2 1
+2.5V VCCA_CRTDAC
VCCH_DPLLB
TVDACA
TVDACB
TVDACC
BC107
*
0.1uF
C0402
BC116
*
0.1uF
C0402
BC122
22pF
BC121
*
*
C0402
0.1uF
@GM
C0402
@GM
BC128
22pF
BC127
*
*
*
3
0.1uF
C0402
@GM
BC134
0.1uF
C0402
@GM
C0402
@GM
BC135
22pF
*
C0402
@GM
*
*
EC4
470uF
2.5V, +/-20%
CTX
EC6
470uF
2.5V, +/-20%
CTX
L2 L0805 10uH
*
L4 L0805 10uH
*
2 1
FB4
FB L0805 180 Ohm
@GM
2 1
FB6
FB L0805 180 Ohm
@GM
2 1
FB7
FB L0805 180 Ohm
@GM
2
VCCA_TVBG
+1.5V VCCH_DPLLA
+1.5V
VCCD_TVDAC
+3V
+3V
+3V
VCCDQ_TVDAC
GMCH_VCC_SYNC
BC109
0.1uF
C0402
@GM
BC118
22pF
C0402
@GM
BC125
22pF
C0402
@GM
BC110
22pF
*
*
C0402
@GM
BC119
0.1uF
*
*
C0402
@GM
BC126
0.1uF
*
*
C0402
@GM
BC734
*
0.1uF
C0402
@GM
2 1
+3V
FB3
FB L0805 180 Ohm
@GM
2 1
+1.5V
FB46
FB L0805 180 Ohm
@GM
2 1
+1.5V
FB5
FB L0805 180 Ohm
@GM
2 1
+2.5V
FB47
FB L0805 180 Ohm
@GM
TECHNOLOGY COPR.
Title
Alviso MCH-4
Document Number Re v
Date: Sheet
S04 MAINBOARD
1
10 40 Monday, June 14, 2004
A
of
5
4
3
2
1
PEG_RXN[0..15]
PEG_RXP[0..15]
PEG_TXN [0..15]
AB29
AC29
G21
H24
H25
A15
C16
A17
J18
B15
B16
B17
E24
E23
E21
D21
C20
B20
A19
B19
H21
J20
E25
F25
C23
C22
F23
F22
F26
C33
C31
F28
F27
B30
B29
C25
C24
B34
B33
B32
A34
A33
B31
C29
D28
C27
C28
D27
C26
PEG_TXP [0..15]
U4H
SDVOCTRL_DATA
SDVOCTRL_CLK
GCLKN
GCLKP
TVDAC_A
TVDAC_B
TVDAC_C
TV_REFSET
TV_IRTNA
TV_IRTNB
TV_IRTNC
DDCCLK
DDCDATA
BLUE
BLUE#
GREEN
GREEN#
RED
RED#
VSYNC
HSYNC
REFSET
LBKLT_CRTL
LBKLT_EN
LCTLA_CLK
LCTLB_DATA
LDDC_CLK
LDDC_DATA
LVDD_EN
LIBG
LVBG
LVREFH
LVREFL
LACLKN
LACLKP
LBCLKN
LBCLKP
LADATAN0
LADATAN1
LADATAN2
LADATAP0
LADATAP1
LADATAP2
LBDATAN0
LBDATAN1
LBDATAN2
LBDATAP0
LBDATAP1
LBDATAP2
ALVISO_90
D D
+2.5V
TV_CHROMA 21,24
TV_LUMA 21,24
TV_COMP 21,24
C C
B B
+2.5V
R162 2.2K R0 402+/-5% @GM
R164 2.2K R0 402+/-5% @GM
DDCCLK 21,24
DDCDAT 21,24
CRT_B 21,24
CRT_G 21,24
CRT_R 21,24
CRTVS_VGA 21,24
A A
CRTHS_VGA 21,24
+2.5V
R165 0 R0402+/-5% @GM
R166 0 R0402+/-5% @GM
R167 0 R0402+/-5% @GM
R168 0 R0402+/-5% @GM
R170 0 R0402+/-5% @GM
R172 0 R0402+/-5% @GM
R173 0 R0402+/-5% @GM
R174 0 R0402+/-5% @GM
R176 0 R0402+/-5% @GM
R178 0 R0402+/-5% @GM
R179 255 R0402+/-1% @GM
R181 100K R0402+/-5% @GM
R183 100K R0402+/-5% @GM
R184 2.2K R 0402+/-5% @GM
R185 2.2K R 0402+/-5% @GM
R186 2.2K R 0402+/-5% @GM
R188 2.2K R 0402+/-5% @GM
R191 1.5K R 0402+/-5% @GM
5
DDCCLK
DDCDAT
R144 0 R0402+/-5% @GM
R145 0 R0402+/-5% @GM
R146 0 R0402+/-5% @GM
R147 5.6K R 0402+/-5% @GM
5K+/-0.5%
VCORE_GMCH
GMCH_VGA_DDCCLK
GMCH_VGA_DDCDATA
GMCH_VG A_BLUE
GMCH_VGA_BLUEJ
GMCH_VGA_GREEN
GMCH_VGA_GREENJ
GMCH_VGA_RED
GMCH_VGA_RED J
GMCH_VGA_VSYNC
GMCH_VGA_HSYNC
GMCH_VG A_REFSET
VGA_BLON
DISP_ON
GMCH_LC TLA_CLK
GMCH_LCTLB_DATA
EDIDCLK
EDIDDATA
GMCH_LIBG
4
R148
0
+/-5%
R0402
@M24
R152 0 R0402+/-5% @M24
R153 0 R0402+/-5% @M24
R154 0 R0402+/-5% @M24
R155 0 R0402+/-5% @M24
R156 0 R0402+/-5% @M24
R157 0 R0402+/-5% @M24
R158 0 R0402+/-5% @M24
R159 0 R0402+/-5% @M24
R160 1K R0402+/-1% @M24
R161 1K R0402+/-1% @M24
R163 0 R0402+/-5% @M24
VGA_BLON 21,25
DISP_ON 21,25
EDIDCLK 21,25
EDIDDATA 21,25
TXLCLKOUT- 21,25
TXLCLKOUT+ 21,25
TXLOUT0- 21,25
TXLOUT1- 21,25
TXLOUT2- 21,25
TXLOUT0+ 21,25
TXLOUT1+ 21,25
TXLOUT2+ 21,25
R169 0 R0402+/-5% @GM
R171 0 R0402+/-5% @GM
R175 0 R0402+/-5% @GM
R177 0 R0402+/-5% @GM
R180 0 R0402+/-5% @GM
R182 0 R0402+/-5% @GM
R187 0 R0402+/-5% @GM
R189 0 R0402+/-5% @GM
R190 0 R0402+/-5% @GM
R192 0 R0402+/-5% @GM
R193 0 R0402+/-5% @GM
R194 0 R0402+/-5% @GM
HW strap, 0= No SDVO device
R956 3.6K R0402+/-5%
CLK_PCIE_MCHJ 4
CLK_PCIE_MCH 4
R149
0
+/-5%
R0402
@M24
Dummy
R150
0
+/-5%
R0402
@M24
GMCH_VGA_DDCCLK
GMCH_VGA_DDCDATA
GMCH_VG A_BLUE
GMCH_VGA_BLUEJ
GMCH_VGA_GREEN
GMCH_VGA_GREENJ
GMCH_VGA_RED
GMCH_VGA_RED J
GMCH_VGA_VSYNC
GMCH_VGA_HSYNC
GMCH_VG A_REFSET
GMCH_VG A_BLON
GMCH_DISP_ON
GMCH_LC TLA_CLK
GMCH_LCTLB_DATA
GMCH_EDIDCLK
GMCH_EDIDDATA
GMCH_LIBG
GMCH_TXLCLKOUTGMCH_TXLCLKOUT+
GMCH_TXLOUT0GMCH_TXLOUT1GMCH_TXLOUT2-
GMCH_TXLOUT0+
GMCH_TXLOUT1+
GMCH_TXLOUT2+
GMCH_T V_CHROMA
GMCH_TV_COMP
GMCH_TV_REFSET
R151
0
+/-5%
R0402
@M24
3
MISC VGA LVDS TV
PEG_RXN[0..15] 21
PEG_RXP[0..15] 21
PEG_TXN [0..15] 21
PEG_TXP[0..15] 21
EXP_COMPI
EXP_ICOMPO
EXP_RXN0
EXP_RXN1
EXP_RXN2
EXP_RXN3
EXP_RXN4
EXP_RXN5
EXP_RXN6
EXP_RXN7
EXP_RXN8
EXP_RXN9
EXP_RXN10
EXP_RXN11
EXP_RXN12
EXP_RXN13
EXP_RXN14
EXP_RXN15
EXP_RXP0
EXP_RXP1
EXP_RXP2
EXP_RXP3
EXP_RXP4
EXP_RXP5
EXP_RXP6
EXP_RXP7
EXP_RXP8
EXP_RXP9
EXP_RXP10
EXP_RXP11
EXP_RXP12
EXP_RXP13
EXP_RXP14
EXP_RXP15
EXP_TXN0
EXP_TXN1
EXP_TXN2
EXP_TXN3
EXP_TXN4
EXP_TXN5
EXP_TXN6
EXP_TXN7
EXP_TXN8
EXP_TXN9
EXP_TXN10
EXP_TXN11
PCI-EXPRESS GRAPHICS
EXP_TXN12
EXP_TXN13
EXP_TXN14
EXP_TXN15
EXP_TXP0
EXP_TXP1
EXP_TXP2
EXP_TXP3
EXP_TXP4
EXP_TXP5
EXP_TXP6
EXP_TXP7
EXP_TXP8
EXP_TXP9
EXP_TXP10
EXP_TXP11
EXP_TXP12
EXP_TXP13
EXP_TXP14
EXP_TXP15
2
+1.5V
R142
24.9
+/-1%
PEG_TXN0
PEG_TXN1
PEG_TXN2
PEG_TXN3
PEG_TXN4 GMCH_TV_LUMA
PEG_TXN5
PEG_TXN6
PEG_TXN7
PEG_TXN8
PEG_TXN9
PEG_TXN10
PEG_TXN11
PEG_TXN12
PEG_TXN13
PEG_TXN14
PEG_TXN15
PEG_TXP0
PEG_TXP1
PEG_TXP2
PEG_TXP3
PEG_TXP4
PEG_TXP5
PEG_TXP6
PEG_TXP7
PEG_TXP8
PEG_TXP9
PEG_TXP10
PEG_TXP11
PEG_TXP12
PEG_TXP13
PEG_TXP14
PEG_TXP15
PEG_RXN0
PEG_RXN1
PEG_RXN2
PEG_RXN3
PEG_RXN4
PEG_RXN5
PEG_RXN6
PEG_RXN7
PEG_RXN8
PEG_RXN9
PEG_RXN10
PEG_RXN11
PEG_RXN12
PEG_RXN13
PEG_RXN14
PEG_RXN15
PEG_RXP0
PEG_RXP1
PEG_RXP2
PEG_RXP3
PEG_RXP4
PEG_RXP5
PEG_RXP6
PEG_RXP7
PEG_RXP8
PEG_RXP9
PEG_RXP10
PEG_RXP11
PEG_RXP12
PEG_RXP13
PEG_RXP14
PEG_RXP15
R0402
D36
D34
E30
F34
G30
H34
J30
K34
L30
M34
N30
P34
R30
T34
U30
V34
W30
Y34
D30
E34
F30
G34
H30
J34
K30
L34
M30
N34
P30
R34
T30
U34
V30
W34
E32
F36
G32
H36
J32
K36
L32
M36
N32
P36
R32
T36
U32
V36
W32
Y36
D32
E36
F32
G36
H32
J36
K32
L36
M32
N36
P32
R36
T32
U36
V32
W36
TECHNOLOGY COPR.
Title
Alviso MCH-5
Document Number Re v
Date: Sheet
S04 MAINBOARD
1
11 40 Monday, June 14, 2004
A
of
5
M_A_A0
112
M_A_A1
111
M_A_A2
110
M_A_A3
109
M_A_A4
108
D D
VDIMM
C C
M_VREF
B B
A A
R320
220
R0402
+/-5%
R335
220
R0402
+/-5%
BC202
*
0.1uF
C0402
BC726
+3V
*
2.2uF
C0603
5
M_A_A5
107
M_A_A6
106
M_A_A7
105
M_A_A8
102
M_A_A9
101
M_A_A10
115
M_A_A11
100
M_A_A12
99
M_A_A13
97
M_A_DM0
M_A_DM1
M_A_DM2
M_A_DM3
M_A_DM4
M_A_DM5
M_A_DM6
M_A_DM7
M_A_DQS0
M_A_DQS1
M_A_DQS2
M_A_DQS3
M_A_DQS4
M_A_DQS5
M_A_DQS6
M_A_DQS7
*
BC727
2.2uF
C0603
117
116
98
121
122
12
26
48
62
134
148
170
184
78
119
120
118
96
95
35
37
160
158
89
91
11
25
47
61
133
147
169
183
77
193
195
194
196
198
1
2
199
197
86
85
123
124
200
3
15
27
39
51
63
75
87
103
125
137
149
159
161
185
4
16
28
38
40
52
64
76
88
90
104
126
138
150
162
174
186
201
202
173
DDR_SO-DIMM
M_A_BSJ0 8
M_A_BSJ1 8
M_CSJ0 7
M_CSJ1 7
M_A_WEJ 8
M_A_CASJ 8,13
M_A_RASJ 8,13
M_CKE0 7
M_CKE1 7
M_CLK_DDR0 7
M_CLK_DDRJ0 7
M_CLK_DDR1 7
M_CLK_DDRJ1 7
SMB_DATA 4,13,15,16,38
SMB_CLK 4,13,15,16,38
BC207
*
0.1uF
C0402
SO-DIMM1
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12
DU/A13
BA0
BA1
DU/BA2
CS0
CS1
DQM0
DQM1
DQM2
DQM3
DQM4
DQM5
DQM6
DQM7
DQM8
WE
CAS
RAS
CKE0
CKE1
CK0
CK0
CK1
CK1
CK2
CK2
DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
DQS8
SDA
SCL
SA0
SA1
SA2
VREF_1
VREF_2
VDDID
VDDSPD
NC/DU/RESET
NC/DU_1
NC/DU_2
NC/DU_3
NC/DU_4
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
4
R_M_A_DM[0..7] 8
R_M_A_DQS[0..7] 8
M_A_A[0..13] 8
R_M_A_DQ[0..63] 8
M_A_DM[0..7] 13
M_A_DQS[0..7] 13
M_A_DQ[0..63] 13
5
D0
7
D1
13
D2
17
D3
6
D4
8
D5
14
D6
18
D7
19
D8
23
D9
29
D10
31
D11
20
D12
24
D13
30
D14
32
D15
41
D16
43
D17
49
D18
53
D19
42
D20
44
D21
50
D22
54
D23
55
D24
59
D25
65
D26
67
D27
56
D28
60
D29
66
D30
68
D31
127
D32
129
D33
135
D34
139
D35
128
D36
130
D37
136
D38
140
D39
141
D40
145
D41
151
D42
153
D43
142
D44
146
D45
152
D46
154
D47
163
D48
165
D49
171
D50
175
D51
164
D52
166
D53
172
D54
176
D55
177
D56
181
D57
187
D58
189
D59
178
D60
182
D61
188
D62
190
D63
71
CB0
73
CB1
79
CB2
83
CB3
72
CB4
74
CB5
80
CB6
84
CB7
10
VDD
22
VDD
34
VDD
36
VDD
46
VDD
58
VDD
70
VDD
82
VDD
92
VDD
94
VDD
114
VDD
132
VDD
144
VDD
156
VDD
180
VDD
191
VDD
168
VDD
9
VDDQ
21
VDDQ
33
VDDQ
45
VDDQ
57
VDDQ
69
VDDQ
81
VDDQ
93
VDDQ
113
VDDQ
131
VDDQ
143
VDDQ
155
VDDQ
157
VDDQ
167
VDDQ
179
VDDQ
192
VDDQ
203
204
203
204
4
M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ4
M_A_DQ5
M_A_DQ6
M_A_DQ7
M_A_DQ8
M_A_DQ9
M_A_DQ10
M_A_DQ11
M_A_DQ12
M_A_DQ13
M_A_DQ14
M_A_DQ15
M_A_DQ16
M_A_DQ17
M_A_DQ18
M_A_DQ19
M_A_DQ20
M_A_DQ21
M_A_DQ22
M_A_DQ23
M_A_DQ24
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQ28
M_A_DQ29
M_A_DQ30
M_A_DQ31
M_A_DQ32
M_A_DQ33
M_A_DQ34
M_A_DQ35
M_A_DQ36
M_A_DQ37
M_A_DQ38
M_A_DQ39
M_A_DQ40
M_A_DQ41
M_A_DQ42
M_A_DQ43
M_A_DQ44
M_A_DQ45
M_A_DQ46
M_A_DQ47
M_A_DQ48
M_A_DQ49
M_A_DQ50
M_A_DQ51
M_A_DQ52
M_A_DQ53
M_A_DQ54
M_A_DQ55
M_A_DQ56
M_A_DQ57
M_A_DQ58
M_A_DQ59
M_A_DQ60
M_A_DQ61
M_A_DQ62
M_A_DQ63
VDIMM
R_M_A_DQ0
R_M_A_DQ1
R_M_A_DQ2
R_M_A_DQ3
R_M_A_DQ4
R_M_A_DQ5
R_M_A_DQ6
R_M_A_DQ7
R_M_A_DQ8
R_M_A_DQ9
R_M_A_DQ10
R_M_A_DQ11
R_M_A_DQ12
R_M_A_DQ13
R_M_A_DQ14
R_M_A_DQ15
R_M_A_DQ16
R_M_A_DQ17
R_M_A_DQ18
R_M_A_DQ19
R_M_A_DQ20
R_M_A_DQ21
R_M_A_DQ22
R_M_A_DQ23
R_M_A_DQ24
R_M_A_DQ25
R_M_A_DQ26
R_M_A_DQ27
R_M_A_DQ28
R_M_A_DQ29
R_M_A_DQ30
R_M_A_DQ31
R_M_A_DQ32
R_M_A_DQ33
R_M_A_DQ34
R_M_A_DQ35
R_M_A_DQ36
R_M_A_DQ37
R_M_A_DQ38
R_M_A_DQ39
R_M_A_DQ40
R_M_A_DQ41
R_M_A_DQ42
R_M_A_DQ43
R_M_A_DQ44
R_M_A_DQ45
R_M_A_DQ46
R_M_A_DQ47
R_M_A_DQ48
R_M_A_DQ49
R_M_A_DQ50
R_M_A_DQ51
R_M_A_DQ52
R_M_A_DQ53
R_M_A_DQ54
R_M_A_DQ55
R_M_A_DQ56
R_M_A_DQ57
R_M_A_DQ58
R_M_A_DQ59
R_M_A_DQ60
R_M_A_DQ61
R_M_A_DQ62
R_M_A_DQ63
R_M_A_DM0
R_M_A_DM1
R_M_A_DM2
R_M_A_DM3
R_M_A_DM4
R_M_A_DM5
R_M_A_DM6
R_M_A_DM7
R_M_A_DQS0
R_M_A_DQS1
R_M_A_DQS2
R_M_A_DQS3
R_M_A_DQS4
R_M_A_DQS5
R_M_A_DQS6
R_M_A_DQS7
VTT_MEM
R398 56 R0402+/-5%
R404 56 R0402+/-5%
R408 56 R0402+/-5%
M_CSJ2 7,13
3
R236 10 R0402+/-5%
R238 10 R0402+/-5%
R240 10 R0402+/-5%
R242 10 R0402+/-5%
R244 10 R0402+/-5%
R246 10 R0402+/-5%
R248 10 R0402+/-5%
R250 10 R0402+/-5%
R252 10 R0402+/-5%
R254 10 R0402+/-5%
R256 10 R0402+/-5%
R258 10 R0402+/-5%
R260 10 R0402+/-5%
R262 10 R0402+/-5%
R264 10 R0402+/-5%
R266 10 R0402+/-5%
R268 10 R0402+/-5%
R270 10 R0402+/-5%
R272 10 R0402+/-5%
R274 10 R0402+/-5%
R276 10 R0402+/-5%
R278 10 R0402+/-5%
R280 10 R0402+/-5%
R282 10 R0402+/-5%
R284 10 R0402+/-5%
R286 10 R0402+/-5%
R288 10 R0402+/-5%
R290 10 R0402+/-5%
R292 10 R0402+/-5%
R294 10 R0402+/-5%
R296 10 R0402+/-5%
R298 10 R0402+/-5%
R300 10 R0402+/-5%
R302 10 R0402+/-5%
R304 10 R0402+/-5%
R306 10 R0402+/-5%
R308 10 R0402+/-5%
R310 10 R0402+/-5%
R312 10 R0402+/-5%
R314 10 R0402+/-5%
R316 10 R0402+/-5%
R318 10 R0402+/-5%
R321 10 R0402+/-5%
R323 10 R0402+/-5%
R325 10 R0402+/-5%
R327 10 R0402+/-5%
R329 10 R0402+/-5%
R331 10 R0402+/-5%
R333 10 R0402+/-5%
R336 10 R0402+/-5%
R338 10 R0402+/-5%
R340 10 R0402+/-5%
R342 10 R0402+/-5%
R344 10 R0402+/-5%
R346 10 R0402+/-5%
R348 10 R0402+/-5%
R350 10 R0402+/-5%
R352 10 R0402+/-5%
R354 10 R0402+/-5%
R356 10 R0402+/-5%
R358 10 R0402+/-5%
R360 10 R0402+/-5%
R362 10 R0402+/-5%
R364 10 R0402+/-5%
R366 10 R0402+/-5%
R368 10 R0402+/-5%
R370 10 R0402+/-5%
R372 10 R0402+/-5%
R374 10 R0402+/-5%
R376 10 R0402+/-5%
R378 10 R0402+/-5%
R380 10 R0402+/-5%
R382 10 R0402+/-5%
R384 10 R0402+/-5%
R386 10 R0402+/-5%
R388 10 R0402+/-5%
R390 10 R0402+/-5%
R392 10 R0402+/-5%
R394 10 R0402+/-5%
R396 10 R0402+/-5%
1
*
M_A_DQ21
3
M_A_DM2
5
M_A_DQ22
7 8
56 8P4R0402+/-5%
M_A_DQ23
1
*
M_A_DQ28
3
M_A_DQ29
5
M_A_DM3
7 8
56 8P4R0402+/-5%
M_A_DQ33
1
*
M_A_DQ32
3
M_A_A0
5
M_A_A2
7 8
56 8P4R0402+/-5%
M_A_A4
1
*
M_A_DQ37
3
M_A_BSJ1
5
M_CSJ2
7 8
56 8P4R0402+/-5%
3
RN32
RN33
RN35
RN36
M_CKE0
M_CKE3
M_CSJ1
2
4
6
2
4
6
2
4
6
2
4
6
M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ4
M_A_DQ5
M_A_DQ6
M_A_DQ7
M_A_DQ8
M_A_DQ9
M_A_DQ10
M_A_DQ11
M_A_DQ12
M_A_DQ13
M_A_DQ14
M_A_DQ15
M_A_DQ16
M_A_DQ17
M_A_DQ18
M_A_DQ19
M_A_DQ20
M_A_DQ21
M_A_DQ22
M_A_DQ23
M_A_DQ24
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQ28
M_A_DQ29
M_A_DQ30
M_A_DQ31
M_A_DQ32
M_A_DQ33
M_A_DQ34
M_A_DQ35
M_A_DQ36
M_A_DQ37
M_A_DQ38
M_A_DQ39
M_A_DQ40
M_A_DQ41
M_A_DQ42
M_A_DQ43
M_A_DQ44
M_A_DQ45
M_A_DQ46
M_A_DQ47
M_A_DQ48
M_A_DQ49
M_A_DQ50
M_A_DQ51
M_A_DQ52
M_A_DQ53
M_A_DQ54
M_A_DQ55
M_A_DQ56
M_A_DQ57
M_A_DQ58
M_A_DQ59
M_A_DQ60
M_A_DQ61
M_A_DQ62
M_A_DQ63
M_A_DM0
M_A_DM1
M_A_DM2
M_A_DM3
M_A_DM4
M_A_DM5
M_A_DM6
M_A_DM7
M_A_DQS0
M_A_DQS1
M_A_DQS2
M_A_DQS3
M_A_DQS4
M_A_DQS5
M_A_DQS6
M_A_DQS7
M_CKE3 7,13
VTT_MEM
M_A_DQ0
M_A_DQ1
M_A_DQ4
M_A_DQ15
M_A_DQ26
M_A_DQ27
M_A_DQ30
M_A_DQ31
M_A_A6
M_A_A8
M_A_A11
M_A_DQ59
M_A_DQ58
M_A_DQS7
M_A_DQ57
M_A_DQ56
M_A_DQ51
M_A_DQ50
M_A_DM6
M_A_DQS6
M_A_DQ49
M_A_DQ48
M_A_DQ43
M_A_DQS5
M_A_DQ41
M_A_DQ45
M_A_DQ44
M_A_DQ8
M_A_DQ3
M_A_DQ2
M_A_DQS0
M_A_DQ11
M_A_DQ10
M_A_DQS1
M_A_DQ9
M_A_DM4
M_A_DQ38
M_A_DQ39
M_A_DM5
M_A_DQ5
M_A_DM0
M_A_DQ6
M_A_DQ7
M_A_DQ42
M_A_DQ46
M_A_DQ47
M_A_DQ52
M_A_DQ12
M_A_DQ13
M_A_DM1 M_A_DQ20
M_A_DQ14
M_A_DQ53
M_A_DQ54
M_A_DQ55
M_A_DQ60
M_A_DQ61
M_A_DM7
M_A_DQ62
M_A_DQ63
2
R237 56 R0402+/-5%
R239 56 R0402+/-5%
R245 56 R0402+/-5%
R267 56 R0402+/-5%
R289 56 R0402+/-5%
R291 56 R0402+/-5%
R297 56 R0402+/-5%
R299 56 R0402+/-5%
R409 56 R0402+/-5%
R413 56 R0402+/-5%
R419 56 R0402+/-5%
RN11
1
*
3
5
7 8
56 8P4R0402+/-5%
RN12
1
*
3
5
7 8
56 8P4R0402+/-5%
RN13
1
*
3
5
7 8
56 8P4R0402+/-5%
RN14
1
*
3
5
7 8
56 8P4R0402+/-5%
RN15
1
*
3
5
7 8
56 8P4R0402+/-5%
RN16
1
*
3
5
7 8
56 8P4R0402+/-5%
RN17
1
*
3
5
7 8
56 8P4R0402+/-5%
RN18
1
*
3
5
7 8
56 8P4R0402+/-5%
RN19
1
*
3
5
7 8
56 8P4R0402+/-5%
RN20
1
*
3
5
7 8
56 8P4R0402+/-5%
RN21
1
*
3
5
7 8
56 8P4R0402+/-5%
RN22
1
*
3
5
7 8
56 8P4R0402+/-5%
2
VTT_MEM
M_A_DQ18
M_A_DQS2
M_A_DQ17
M_A_DQ16
M_A_A9
M_A_A12
M_A_A13
M_CKE1
M_A_DQ40
M_A_DQ35
M_A_DQ34
M_A_DQS4
M_A_DQS3
M_A_DQ25
VTT_MEM
VTT_MEM
2
4
6
2
4
6
2
4
6
2
4
6
2
4
6
2
4
6
2
4
6
2
4
6
2
4
6
2
4
6
2
4
6
2
4
6
Title
DDR SO-DIMM1
Document Number Rev
Date: Sheet
M_A_DQ24
M_A_DQ19
M_A_A1
M_A_A3
M_A_A5
M_A_A7
M_CSJ0
M_A_WEJ
M_A_BSJ0
M_A_A10
VDIMM
EC7
330uF
*
6.3V, +/-20%
CTX
BC146 0.1uF C0402
BC147 0.1uF C0402
BC148 0.1uF C0402
BC149 0.1uF C0402
BC150 0.1uF C0402
BC151 0.1uF C0402
BC152 0.1uF C0402
BC153 0.1uF C0402
BC154 0.1uF C0402
BC155 0.1uF C0402
BC156 0.1uF C0402
BC157 0.1uF C0402
BC158 0.1uF C0402
BC159 0.1uF C0402
BC160 0.1uF C0402
BC161 0.1uF C0402
BC162 0.1uF C0402
BC168 0.1uF C0402
BC169 0.1uF C0402
BC170 0.1uF C0402
BC171 0.1uF C0402
BC172 0.1uF C0402
BC173 0.1uF C0402
BC174 0.1uF C0402
BC175 0.1uF C0402
BC176 0.1uF C0402
BC177 0.1uF C0402
BC178 0.1uF C0402
BC179 0.1uF C0402
BC180 0.1uF C0402
BC181 0.1uF C0402
BC182 0.1uF C0402
BC183 0.1uF C0402
BC184 0.1uF C0402
BC185 0.1uF C0402
BC186 0.1uF C0402
BC187 0.1uF C0402
BC188 0.1uF C0402
BC189 0.1uF C0402
BC190 0.1uF C0402
BC191 0.1uF C0402
BC192 0.1uF C0402
BC193 0.1uF C0402
BC194 0.1uF C0402
BC195 0.1uF C0402
BC196 0.1uF C0402
BC197 0.1uF C0402
BC198 0.1uF C0402
BC199 0.1uF C0402
S04 MAINBOARD
RN26
1
*
3
5
7 8
56 8P4R0402+/-5%
RN27
1
*
3
5
7 8
56 8P4R0402+/-5%
RN28
1
*
3
5
7 8
56 8P4R0402+/-5%
RN29
1
*
3
5
7 8
56 8P4R0402+/-5%
RN30
1
*
3
5
7 8
56 8P4R0402+/-5%
RN31
1
*
3
5
7 8
56 8P4R0402+/-5%
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
1
VTT_MEM
2
4
6
2
4
6
2
4
6
2
4
6
2
4
6
2
4
6
EC22
220uF
4V, +/-20%, D.F.=8%
CTX
VDIMM
TECHNOLOGY COPR.
12 40 Monday, June 14, 2004
1
of
A
5
M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
D D
VDIMM
R195
220
R0402
+/-5%
R196
BC136
0.1uF
C0402
220
R0402
+/-5%
BC724
*
2.2uF
+3V
C0603
C C
M_VREF
*
B B
M_B_A13
M_B_BSJ0 8
M_B_BSJ1 8
M_CSJ2 7,12
M_CSJ3 7
M_A_DM0
M_A_DM1
M_A_DM2
M_A_DM3
M_A_DM4
M_A_DM5
M_A_DM6
M_A_DM7
M_B_WEJ 8
M_B_CASJ 8
M_B_RASJ 8
M_CKE2 7
M_CKE3 7,12
M_CLK_DDR3 7
M_CLK_DDRJ3 7
M_CLK_DDR4 7
M_CLK_DDRJ4 7
M_A_DQS0
M_A_DQS1
M_A_DQS2
M_A_DQS3
M_A_DQS4
M_A_DQS5
M_A_DQS6
M_A_DQS7
SMB_DATA 4,12,15,16,38
SMB_CLK 4,12,15,16,38
+3V
BC137
BC725
*
*
0.1uF
2.2uF
C0402
C0603
SO-DIMM2
112
A0
111
A1
110
A2
109
A3
108
A4
107
A5
106
A6
105
A7
102
A8
101
A9
115
A10/AP
100
A11
99
A12
97
DU/A13
117
BA0
116
BA1
98
DU/BA2
121
CS0
122
CS1
12
DQM0
26
DQM1
48
DQM2
62
DQM3
134
DQM4
148
DQM5
170
DQM6
184
DQM7
78
DQM8
119
WE
120
CAS
118
RAS
96
CKE0
95
CKE1
35
CK0
37
CK0
160
CK1
158
CK1
89
CK2
91
CK2
11
DQS0
25
DQS1
47
DQS2
61
DQS3
133
DQS4
147
DQS5
169
DQS6
183
DQS7
77
DQS8
193
SDA
195
SCL
194
SA0
196
SA1
198
SA2
1
VREF_1
2
VREF_2
199
VDDID
197
VDDSPD
86
NC/DU/RESET
85
NC/DU_1
123
NC/DU_2
124
NC/DU_3
200
NC/DU_4
3
GND
15
GND
27
GND
39
GND
51
GND
63
GND
75
GND
87
GND
103
GND
125
GND
137
GND
149
GND
159
GND
161
GND
185
GND
4
GND
16
GND
28
GND
38
GND
40
GND
52
GND
64
GND
76
GND
88
GND
90
GND
104
GND
126
GND
138
GND
150
GND
162
GND
174
GND
186
GND
201
GND
202
GND
173
GND
DDR_SO-DIMM
4
M_A_DQ0
5
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
203
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
D11
D12
D13
D14
D15
D16
D17
D18
D19
D20
D21
D22
D23
D24
D25
D26
D27
D28
D29
D30
D31
D32
D33
D34
D35
D36
D37
D38
D39
D40
D41
D42
D43
D44
D45
D46
D47
D48
D49
D50
D51
D52
D53
D54
D55
D56
D57
D58
D59
D60
D61
D62
D63
CB0
CB1
CB2
CB3
CB4
CB5
CB6
CB7
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
203
204
204
M_A_DQ1
7
M_A_DQ2
13
M_A_DQ3
17
M_A_DQ4
6
M_A_DQ5
8
M_A_DQ6
14
M_A_DQ7
18
M_A_DQ8
19
M_A_DQ9
23
M_A_DQ10
29
M_A_DQ11
31
M_A_DQ12
20
M_A_DQ13
24
M_A_DQ14
30
M_A_DQ15
32
M_A_DQ16
41
M_A_DQ17
43
M_A_DQ18
49
M_A_DQ19
53
M_A_DQ20
42
M_A_DQ21
44
M_A_DQ22
50
M_A_DQ23
54
M_A_DQ24
55
M_A_DQ25
59
M_A_DQ26
65
M_A_DQ27
67
M_A_DQ28
56
M_A_DQ29
60
M_A_DQ30
66
M_A_DQ31
68
M_A_DQ32
127
M_A_DQ33
129
M_A_DQ34
135
M_A_DQ35
139
M_A_DQ36
128
M_A_DQ37
130
M_A_DQ38
136
M_A_DQ39
140
M_A_DQ40
141
M_A_DQ41
145
M_A_DQ42
151
M_A_DQ43
153
M_A_DQ44
142
M_A_DQ45
146
M_A_DQ46
152
M_A_DQ47
154
M_A_DQ48
163
M_A_DQ49
165
M_A_DQ50
171
M_A_DQ51
175
M_A_DQ52
164
M_A_DQ53
166
M_A_DQ54
172
M_A_DQ55
176
M_A_DQ56
177
M_A_DQ57
181
M_A_DQ58
187
M_A_DQ59
189
M_A_DQ60
178
M_A_DQ61
182
M_A_DQ62
188
M_A_DQ63
190
71
73
79
83
72
74
80
84
10
22
34
36
46
58
70
82
92
94
114
132
144
156
180
191
168
9
21
33
45
57
69
81
93
113
131
143
155
157
167
179
192
VDIMM
3
M_A_DM[0..7] 12
M_A_DQS[0..7] 12
M_B_A[0..13] 8
M_A_DQ[0..63] 12
M_B_BSJ0
M_B_A12
M_B_A13
M_B_A3
M_B_A5
M_B_A7
M_B_A9
M_B_A10
M_CKE2
M_B_A11
M_B_A8
M_B_A6
M_B_A4
M_B_A2
M_B_A0
M_B_BSJ1
M_B_RASJ
M_B_CASJ
M_CSJ3
M_A_DQ36
M_A_CASJ
M_A_CASJ 8,12
M_B_WEJ
M_A_RASJ
M_A_RASJ 8,12
M_B_A1
2
R197 56 R0402+/-5%
R199 56 R0402+/-5%
R200 56 R0402+/-5%
R204 56 R0402+/-5%
R206 56 R0402+/-5%
R208 56 R0402+/-5%
R210 56 R0402+/-5%
R211 56 R0402+/-5%
RN23
1
*
3
5
7 8
56 8P4R0402+/-5%
RN24
1
*
3
5
7 8
56 8P4R0402+/-5%
RN25
1
*
3
5
7 8
56 8P4R0402+/-5%
RN34
1
*
3
5
7 8
56 8P4R0402+/-5%
1
VTT_MEM
2
4
6
2
4
6
2
4
6
2
4
6
A A
Title
DDR SO-DIMM2
Document Number Rev
5
4
3
2
Date: Sheet
S04 MAINBOARD
TECHNOLOGY COPR.
13 40 Monday, June 14, 2004
1
A
of
5
R217
180K
R0603
D D
VCCRTC
BC144
*
1uF
C0603
C C
R218
1M
+/-5%
R0603
AC_BITCLK_AUD 26
AC_BITCLK_MDC 20
AC_SYNC 20,26
AC_RESETJ 20,26
AC_SDIN0 26
AC_SDIN1 20
AC_SDOUT 20,26
+/-1%
BC145
*
0.1uF
C0402
R223 12.1 R0402+/-1%
R827 12.1 R0402+/-1%
R224 33 R0402+/-5%
R225 33 R0402+/-5%
R228 33 R0402+/-5%
GND RX signal,CLK signal,and RBIAS/J
B B
SIORDY 17
IRQ14 16,17
SDDACKJ 17
SDIOWJ 17
SDIORJ 17
4
RTC_X1
RTC_X2
RTC_RSTJ
SM_INTRUDERJ
ACZ_BITCLK_R
ACZ_SYNC_R
ACZ_RSTJ_R
ACZ_SDO_R
SIORDY
IRQ14
SDDACKJ
SDIOWJ
SDIORJ SDDREQ
AC19
AG11
AF11
AF16
AB16
AB15
AC14
AE16
AA2
AA3
AA5
D12
B12
D11
F13
F12
B11
E12
E11
C13
C12
C11
E13
C10
A10
F11
F10
B10
AE3
AD3
AG2
AF2
AD7
AC7
AF6
AG6
AC2
AC1
Y1
Y2
B9
C9
RTCX1
RTCX2
RTCRST#
INTRUDER#
INTVRMEN
EE_CS
EE_SHCLK
EE_DOUT
EE_DIN
LAN_CLK
LAN_RSTSYNC
LANRXD[0]
LANRXD[1]
LANRXD[2]
LANTXD[0]
LANTXD[1]
LANTXD[2]
ACZ_BIT_CLK
ACZ_SYNC
ACZ_RST#
ACZ_SDIN[0]
ACZ_SDIN[1]
ACZ_SDIN[2]
ACZ_SDO
SATALED#
SATA[0]RXN
SATA[0]RXP
SATA[0]TXN
SATA[0]TXP
SATA[2]RXN
SATA[2]RXP
SATA[2]TXN
SATA[2]TXP
SATA_CLKN
SATA_CLKP
SATARBIAS#
SATARBIAS
IORDY
IDEIRQ
DDACK#
DIOW#
DIOR#
U7A
LAD[1]/FB[1]
LAD[2]/FB[2]
LAD[3]/FB[3]
LPC
RTC LAN
LDRQ[0]#
LDRQ[1]#/GPI[41]
LFRAME#
A20GATE
CPUSLP#
DPRSLP#/TP[4]
DPSLP#/TP[2]
CPU
CPUPWRGD/GPO[49]
IGNNE#
INIT3_3V#
STPCLK#
THRMTRIP#
AC-97/AZALIA SATA
IDE
DDREQ
ICH6-M
LAD[0]
A20M#
FERR#
INIT#
INTR
RCIN#
SMI#
DA[0]
DA[1]
DA[2]
DCS1#
DCS3#
DD[0]
DD[1]
DD[2]
DD[3]
DD[4]
DD[5]
DD[6]
DD[7]
DD[8]
DD[9]
DD[10]
DD[11]
DD[12]
DD[13]
DD[14]
DD[15]
3
P2
N3
N5
N4
LDRQ0J
N6
LDRQ1J
P4
P3
AF22
AF23
AE27
H_DPRSTPJ_R
AE24
H_DPSLPJ_R
AD27
H_FERR_R
AF24
AG25
AG26
AE22
AF27
AG24
AD23
AF25
NMI
AG27
AE26
AE23
SDA0
AC16
AB17
SDA2
AC17
SDCS1J
AD16
SDCS3J
AE17
SDD0
AD14
SDD1
AF15
SDD2
AF14
SDD3
AD12
SDD4
AE14
SDD5
AC11
SDD6
AD11
SDD7
AB11
SDD8
AE13
SDD9
AF13
SDD10
AB12
SDD11
AB13
SDD12
AC13
SDD13
AE15
SDD14
AG15
SDD15
AD13
AB14
LAD0/FWH0 28
LAD1/FWH1 28
LAD2/FWH2 28
LAD3/FWH3 28
LFRAMEJ/FWH4 28
GATEA20 16,28
H_A20MJ 5
H_CPUSLPJ 5,7
H_PWRGD 5
H_IGNNEJ 5
H_INITJ 5
H_INTR 5
RCINJ 1 6,28
H_NMI 5
H_SMIJ 5
H_STPCLKJ 5
PM_THRM TRIPJ_R
SDA0 17
SDA1
SDA1 17
SDA2 17
SDCS1J 17
SDCS3J 17
SDDREQ 17
SDD[0..15] 17
2
BC142 4.7pF
*
C0402 50V, NP O, +/-0.25pF
XTAL-32.768kHz
BC143 4.7pF
*
C0402 50V, NP O, +/-0.25pF
LDRQ0J
R219 10K
R220 10K
R222 56
R227 56
Dummy
R0402+/-5%
R0402+/-5%
R231
56
R0603
+/-5%
H_FERR_R
PM_THRM TRIPJ_R
H_DPRSTPJ_R
H_DPSLPJ_R
LDRQ1J
R233 0 R0402+/-5%
R234 0 R0402+/-5%
1
RTC_X1
2 3
R216
4 1
+3V
+VCCP
+VCCP
+VCCP
R221
56
R0603
+/-5%
R226
75
+/-5%
R0402
R232
56
R0603
+/-5%
10M
+/-5%
R0402
RTC_X2
H_FERRJ 5
PM_THRMTRIPJ 5,7
H_DPRSLPJ 6
H_DPSLPJ 5,31
X2
R0603+/-5%
R0603+/-5%
Del SATA CONN U10
A A
Del SATA CONN POWER & CAPS
TECHNOLOGY COPR.
Title
ICH6M_CPU&LPC&AC97&IDE
Document Number Re v
5
4
3
2
Date: Sheet
S04 MAINBOARD
1
14 40 Monday, June 14, 2004
A
of
5
AD[0..31] 20,38
D D
FRAMEJ 16,20,38
C C
R431 100 R0603+/-1%
R433 100 R0603+/-1%
R435 100 R0603+/-1%
B B
R441
10
+/-5%
R0402
BC214
*
5.6pF
C0603
50V, NPO, +/-0.5pF
A A
PIRQAJ 16,38
PIRQBJ 16,38
PIRQCJ 16,20
PIRQDJ 16,20
AD0
E2
AD[0]
AD1
E5
AD[1]
AD2
C2
AD[2]
AD3
F5
AD[3]
AD4
F3
AD[4]
AD5
E9
AD[5]
AD6
F2
AD[6]
AD7
D6
AD[7]
AD8
E6
AD[8]
AD9
D3
AD[9]
AD10
A2
AD[10]
AD11
D2
AD[11]
AD12
D5
AD[12]
AD13
H3
AD[13]
AD14
B4
AD[14]
AD15
J5
AD[15]
AD16
K2
AD[16]
AD17
K5
AD[17]
AD18
D4
AD[18]
AD19
L6
AD[19]
AD20
G3
AD[20]
AD21
H4
AD[21]
AD22
H2
AD[22]
AD23
H5
AD[23]
AD24
B3
AD[24]
AD25
M6
AD[25]
AD26
B2
AD[26]
AD27
K6
AD[27]
AD28
K3
AD[28]
AD29
A5
AD[29]
AD30
L1
AD[30]
AD31 PCLK_ICH6
K4
AD[31]
J3
FRAME#
Interrupt I/F
N2
PIRQ[A]#
L2
PIRQ[B]#
M1
PIRQ[C]#
L3
PIRQ[D]#
RESERVED
AC5
RSVD[1]
AD5
RSVD[2]
AF4
RSVD[3]
AG4
RSVD[4]
AC9
RSVD[5]
ICH6-M
PCLK_ICH6
CLK48_USB
R442
10
+/-5%
R0402
BC215
*
5.6pF
C0603
50V, NPO, +/-0.5pF
5
R443
10
+/-5%
R0402
BC216
*
5.6pF
C0603
50V, NPO, +/-0.5pF
U7B
PCI
REQ[4]#/GPI[40]
GNT[4]#/GPO[48]
REQ[5]#/GPI[1]
GNT[5]#/GPO[17]
REQ[6]#/GPI[0]
GNT[6]#/GPO[16]
C/BE[0]#
C/BE[1]#
C/BE[2]#
C/BE[3]#
PCIRST#
DEVSEL#
PLTRST#
PIRQ[E]#/GPI[2]
PIRQ[F]#/GPI[3]
PIRQ[G]#/GPI[4]
PIRQ[H]#/GPI[5]
R436 10K R0402+/-5% Dummy
R437 10K R0402+/-5% Dummy
R439 10K R0402+/-5% Dummy
REQ[0]#
GNT[0]#
REQ[1]#
GNT[1]#
REQ[2]#
GNT[2]#
REQ[3]#
GNT[3]#
IRDY#
PAR
PERR#
PLOCK#
SERR#
STOP#
TRDY#
PCICLK
PME#
RSVD[6]
RSVD[7]
RSVD[8]
RSVD[9]
4
L5
C1
B5
B6
M5
F1
B8
C8
F7
E7
R429 100 R0402+/-5% Dummy
E8
F6
B7
D8
R430 100 R0402+/-5% Dummy
J6
H6
G4
G2
A3
E1
R2
C3
E3
C5
G5
J1
J2
R5
G6
P6
D9
C7
C6
M3
RSVD6_R
AD9
AF8
AG8
U3
4
REQ0J 16,38
GNT0J 38
REQ1J 16,20
GNT1J 20
REQ2J 16,38
GNT2J 38
REQ3J 16,38
GNT3J 38
REQ4J 16
REQ5J 16
REQ6J 16
C/BE0J 20,38
C/BE1J 20,38
C/BE2J 20,38
C/BE3J 20,38
IRDYJ 16,20,38
PAR 20,38
PCIRSTJ 20 ,28,38
DEVSELJ 16,20,38
PERRJ 16,20,38
LOCKJ 16
SERRJ 16,20,38
STOPJ 16, 20,38
TRDYJ 16,20,38
PLT_RSTJ 7,1 7,21,38
PCLK_ICH6 4
ICH_PMEJ 16 ,20,38
PIRQEJ 16,38
PIRQFJ 16
PIRQGJ 16
PIRQHJ 16
R432 100
R0603 +/-1%
B_ID0
B_ID1
B_ID2 CLK14_ICH6
DPRSLPVR 31
3
T2
RI#
AF17
SATA[0]GP/GPIO[26]
AE18
SATA[1]GP/GPIO[29]
AF18
SATA[2]GP/GPIO[30]
AG18
SATA[3]GP/GPIO[31]
Y4
SMBCLK
W5
SMBDATA
Y5
LINKALERT#
W4
SMLINK[0]
U6
SMLINK[1]
AG21
MCH_SYNC#
F8
SPKR
W3
SUS_STAT#/LPCPD#
U2
SYS_RESET#
AD19
BM_BUSY#/GPI[6]
AE19
GPI[7]
R1
GPI[8]
W6
SMBALERT#/GPI[11]
M2
GPI[12]
R6
GPI[13]
AC21
STP_PCI#/GPO[18]
AB21
GPO[19]
AD22
STP_CPU#/GPO[20]
AD20
GPO[21]
AD21
GPO[23]
V3
GPIO[24]
P5
GPIO[25]
R3
GPIO[27]
T3
GPIO[28]
AF19
CLKRUN#/GPIO[32]
AF20
GPIO[33]
AC18
GPIO[34]
U5
WAKE#
AB20
SERIRQ
AC20
THRM#
AF21
VRMPWRGD
E10
CLK14
A27
CLK48
V6
SUSCLK
T4
SLP_S3#
T5
SLP_S4#
T6
SLP_S5#
AA1
PWROK
AE20
DPRSLPVR/TP[1]
V2
BATLOW#/TP[0]
U1
PWRBTN#
V5
LAN_RST#
Y3
RSMRST#
ICH6-M
2 1
D1
RB751V-40
SUSON 28,32,34
SUSOK 28,35
MCH_SYNCJ 7,16
PM_SYSRSTJ 5,16
PM_BMBUSYJ 7
SMB_ALERTJ 16
CRT_SENSEJ 24
PCIE_WAKEJ 16,38
PM_THRMJ 16
CLK14_ICH6 4
CLK48_USB 4
DNBSWONJ 28
RIJ 16,38
SMB_CLK 4,12,13,16,38
SMB_DATA 4,12,13,16,38
SMLINK0 16
SMLINK1 16
PCSPK 26
IRQ15 16,17
KBSMIJ 16,28
SCIJ 16,28
STP_PCIJ 4
STP_CPUJ 4
FPBACKJ 25
SWIJ 16,28
CLKRUNJ 16,20,28,38
SERIRQ 16,28,38
IMVP_PWG 7,31
SUSCLK 38
PM_DPRSLPVR_R
BATLOWJ 16,28
PLT_RSTJ
RSMRSTJ 28
RSMRSTJ
B_ID0
B_ID1
B_ID2
PM_SYSRSTJ
KBSMIJ
SCIJ
SWIJ
R447 0
R0402 +/-5%
+3VSUS
R451
100K
+/-5%
R0402
BC217
1uF
*
10V, X5R, +/-10%
C0603
+3V
R425 10K R0402+/-5%
R426 10K R0402+/-5%
R427 10K R0402+/-5%
R428 10K R0402+/-5%
SMB_LINK _ALERTJ 16
SUSBJ 28
SUSCJ 28
PWROK 28
R445
100K
R0402
+/-5%
R438 100 R0603 +/-1%
R440 100 R0603 +/-1%
PWROK
R444 100 R0603 +/-1%
R446
8.2K
+/-5%
R0402
Dummy
R453 0 R0402+/-5%
R454
100K
R0402
+/-5%
3
2
U7C
GPIO CLOCKS POWER MGT
2
OC[5]#/GPI[10]
OC[6]#/GPI[14]
OC[7]#/GPI[15]
1
H25
HSIN[0]
H24
HSIP[0]
G27
HSON[0]
G26
HSOP[0]
K25
HSIN[1]
K24
HSIP[1]
J27
HSON[1]
J26
HSOP[1]
PCI-EXPRESS
Direct Media Interface
DMI_ZCOMP
DMI_IRCOMP
OC[4]#/GPI[9]
USB
M25
HSIN[2]
M24
HSIP[2]
L27
HSON[2]
L26
HSOP[2]
P24
HSIN[3]
P23
HSIP[3]
N27
HSON[3]
N26
HSOP[3]
T25
DMI[0]RXN
T24
DMI[0]RXP
R27
DMI[0]TXN
R26
DMI[0]TXP
V25
DMI[1]RXN
V24
DMI[1]RXP
U27
DMI[1]TXN
U26
DMI[1]TXP
Y25
DMI[2]RXN
Y24
DMI[2]RXP
W27
DMI[2]TXN
W26
DMI[2]TXP
AB24
DMI[3]RXN
AB23
DMI[3]RXP
AA27
DMI[3]TXN
AA26
DMI[3]TXP
AD25
DMI_CLKN
AC25
DMI_CLKP
F24
DMI_IRCOMP_R
F23
USB_OCJ4
C23
USB_OCJ5
D23
USB_OCJ6
C25
USB_OCJ7
C24
USB_OCJ0
C27
OC[0]#
OC[1]#
OC[2]#
OC[3]#
USBP[0]N
USBP[0]P
USBP[1]N
USBP[1]P
USBP[2]N
USBP[2]P
USBP[3]N
USBP[3]P
USBP[4]N
USBP[4]P
USBP[5]N
USBP[5]P
USBP[6]N
USBP[6]P
USBP[7]N
USBP[7]P
USBRBIAS#
USBRBIAS
USB_OCJ1
B27
USB_OCJ2
B26
USB_OCJ3
C26
C21
D21
A20
B20
D19
C19
A18
B18
E17
D17
B16
A16
C15
D15
A14
B14
A22
B22
Title
ICH6M_USB&DMI&PCI/E
Document Number Re v
Date: Sheet
BC212 0.1uF C0402
BC213 0.1uF C0402
DMI_RXN0 7
DMI_RXP0 7
DMI_TXN0 7
DMI_TXP0 7
DMI_RXN1 7
DMI_RXP1 7
DMI_TXN1 7
DMI_TXP1 7
DMI_RXN2 7
DMI_RXP2 7
DMI_TXN2 7
DMI_TXP2 7
DMI_RXN3 7
DMI_RXP3 7
DMI_TXN3 7
DMI_TXP3 7
CLK_PCIE_ICHJ 4
CLK_PCIE_ICH 4
SYSUSBP0- 38
SYSUSBP0+ 38
SYSUSBP1- 38
SYSUSBP1+ 38
SYSUSBP2- 17
SYSUSBP2+ 17
SYSUSBP6- 17
SYSUSBP6+ 17
SYSUSBP7- 38
SYSUSBP7+ 38
USB_RBIAS_PN
USB_OCJ4
USB_OCJ5
USB_OCJ6
USB_OCJ7
1
2
3
4
5
S04 MAINBOARD
*
*
R434 24.9
R0402+/-1%
NEAR SB 10 MILS
R448 22.6 R0402+/-1%
RN1
10P8R0603
10K
+/-5%
10
9
8
7
6
+1.5V
USB_OCJ3
USB_OCJ2
USB_OCJ1
USB_OCJ0
1
PCIE_RXN1 38
PCIE_RXP1 38
PCIE_TXN1 38
PCIE_TXP1 38
+3VSUS
TECHNOLOGY COPR.
of
15 40 Monday, June 14, 2004
A
5
BC219
0.1uF
C0402
BC231
10nF
C0402
BC257
0.1uF
C0402
*
*
BC232
2.2uF
C0805
+1.5V
*
+1.5V
*
+3V
+1.5V
*
+3VSUS
*
SB_VCC1_5V
BC220
0.1uF
C0402
BC249
0.1uF
C0402
BC252
0.1uF
C0402
BC258
0.1uF
C0402
BC264
0.1uF
C0402
*
*
BC268
0.1uF
C0402
5
L8
L0805 1uH
*
*
+1.5VSUS
BC218
0.1uF
*
C0402
+VCCP
BC230
0.1uF
*
C0402
+1.5V
BC242 0.1uF C0402
BC243 0.1uF C0402
BC244 0.1uF C0402
BC245 0.1uF C0402
BC246 10nF C 0402
*
VCCRTC
BC729
BC256
*
0.1uF
0.1uF
C0402
C0402
BC269
10nF
*
C0402
*
*
*
*
*
*
*
GPLL_L
BC251
10nF
25V, X7R, +/-10%
C0402
*
+1.5V
2 1
FB8
FB L0805 30 Ohm
SB_VCC1_5V
D D
C C
B B
A A
EC10 220uF CTX 2.5V, +/-20%
BC226 0.1uF C0402
BC227 0.1uF C0402
BC228 0.1uF C0402
BC229 0.1uF C0402
BC233 0.1uF C0402
BC234 0.1uF C0402
BC235 0.1uF C0402
+5VSUS +3 VSUS
R462
10
+/-5%
R0603
BC240
*
1uF
C0603
+5V
R463
100
+/-1%
R0603
BC247
*
1uF
C0603
+1.5V
R467 1
R0603 +/-5%
BC250
10uF
*
10V, Y5V, +80%/-20%
C0805
+3V
BC254
0.1uF
C0402
+1.5V
*
*
BC265
0.1uF
C0402
BC255
0.1uF
C0402
*
*
*
*
*
*
*
*
*
*
D2
RB751V-40
2 1
V5REF_SUS
BC241
*
0.1uF
C0402
+3V
D3
RB751V-40
2 1
VCC5REF
BC248
*
0.1uF
C0402
GPLL_R
BC728
*
0.1uF
C0402
+1.5V
BC730 0.1uF C0402
BC731 0.1uF C0402
+1.5V
BC266
10nF
*
C0402
GPLL_L
+3V
+3VSUS
4
AA22
VCC1_5[1]
AA23
VCC1_5[2]
AA24
VCC1_5[3]
AA25
VCC1_5[4]
AB25
VCC1_5[5]
AB26
VCC1_5[6]
AB27
VCC1_5[7]
F25
VCC1_5[8]
F26
VCC1_5[9]
F27
VCC1_5[10]
G22
VCC1_5[11]
G23
VCC1_5[12]
G24
VCC1_5[13]
G25
VCC1_5[14]
H21
VCC1_5[15]
H22
VCC1_5[16]
J21
VCC1_5[17]
J22
VCC1_5[18]
K21
VCC1_5[19]
K22
VCC1_5[20]
L21
VCC1_5[21]
L22
VCC1_5[22]
M21
VCC1_5[23]
M22
VCC1_5[24]
N21
VCC1_5[25]
N22
VCC1_5[26]
N23
VCC1_5[27]
N24
VCC1_5[28]
N25
VCC1_5[29]
P21
VCC1_5[30]
P25
VCC1_5[31]
P26
VCC1_5[32]
P27
VCC1_5[33]
R21
VCC1_5[34]
R22
VCC1_5[35]
T21
VCC1_5[36]
T22
VCC1_5[37]
U21
VCC1_5[38]
U22
VCC1_5[39]
V21
VCC1_5[40]
V22
VCC1_5[41]
W21
VCC1_5[42]
W22
VCC1_5[43]
Y21
VCC1_5[44]
Y22
VCC1_5[45]
AA6
VCC1_5[46]
AB4
VCC1_5[47]
AB5
VCC1_5[48]
AB6
VCC1_5[49]
AC4
VCC1_5[50]
AD4
VCC1_5[51]
AE4
VCC1_5[52]
AE5
VCC1_5[53]
AF5
VCC1_5[54]
AG5
VCC1_5[55]
AA7
VCC1_5[56]
AA8
VCC1_5[57]
AA9
VCC1_5[58]
AB8
VCC1_5[59]
AC8
VCC1_5[60]
AD8
VCC1_5[61]
AE8
VCC1_5[62]
AE9
VCC1_5[63]
AF9
VCC1_5[64]
AG9
VCC1_5[65]
AC27
VCCDMIPLL
E26
VCC3_3[1]
AE1
VCCSATAPLL
AG10
VCC3_3[22]
A13
VCCLAN3_3/VCCSUS3_3[1]
F14
VCCLAN3_3/VCCSUS3_3[2]
G13
VCCLAN3_3/VCCSUS3_3[3]
G14
VCCLAN3_3/VCCSUS3_3[4]
A11
VCCSUS3_3[1]
U4
VCCSUS3_3[2]
V1
VCCSUS3_3[3]
V7
VCCSUS3_3[4]
W2
VCCSUS3_3[5]
Y7
VCCSUS3_3[6]
A17
VCCSUS3_3[7]
B17
VCCSUS3_3[8]
C17
VCCSUS3_3[9]
F18
VCCSUS3_3[10]
G17
VCCSUS3_3[11]
G18
VCCSUS3_3[12]
ICH6-M
4
U7E
VCC1_5[98]
VCC1_5[97]
VCC1_5[96]
VCC1_5[95]
VCC1_5[94]
VCC1_5[93]
VCC1_5[92]
VCC1_5[91]
VCC1_5[90]
VCC1_5[89]
VCC1_5[88]
VCC1_5[87]
VCC1_5[86]
VCC1_5[85]
VCC1_5[84]
VCC1_5[83]
VCC1_5[82]
VCC1_5[81]
VCC1_5[80]
VCC1_5[79]
VCC3_3[21]
VCC3_3[20]
VCC3_3[19]
VCC3_3[18]
VCC3_3[17]
VCC3_3[16]
VCC3_3[15]
VCC3_3[14]
VCC3_3[13]
VCC3_3[12]
VCC3_3[11]
VCC3_3[10]
VCC3_3[9]
VCC3_3[8]
VCC3_3[7]
VCC3_3[6]
VCC3_3[5]
VCC3_3[4]
VCC3_3[3]
VCC3_3[2]
VCCSUS1_5[3]
VCCSUS1_5[2]
VCCSUS1_5[1]
VCC1_5[78]
VCC1_5[77]
VCC1_5[76]
VCC1_5[75]
VCC1_5[74]
VCC1_5[73]
VCC1_5[72]
VCC1_5[71]
VCC1_5[70]
VCC1_5[69]
VCC1_5[68]
VCC1_5[67]
VCC2_5[4]
VCC2_5[2]
V5REF[2]
V5REF[1]
V5REF_SUS
VCCUSBPLL
VCCSUS3_3[20]
VCCRTC
VCCLAN1_5/VCCSUS1_5[2]
VCCLAN1_5/VCCSUS1_5[1]
V_CPU_IO[3]
V_CPU_IO[2]
V_CPU_IO[1]
VCCSUS3_3[19]
VCCSUS3_3[18]
VCCSUS3_3[17]
VCCSUS3_3[16]
VCCSUS3_3[15]
VCCSUS3_3[14]
VCCSUS3_3[13]
+1.5V
F9
U17
U16
U14
U12
U11
T17
T11
P17
P11
M17
M11
L17
L16
L14
L12
L11
AA21
AA20
AA19
AA10
AG19
AG16
AG13
AD17
AC15
AA17
AA15
AA14
AA12
P1
M7
L7
L4
J7
H7
H1
E4
B1
A6
+1.5VSUS
U7
R7
G19
+1.5V
G20
F20
E24
E23
E22
E21
E20
D27
D26
D25
D24
G8
+2.5V
AB18
BC253 0.1uF C0402
P7
VCC5REF
AA18
A8
V5REF_SUS
F21
A25
+1.5V
A24
+3VSUS
AB3
+1.5V
G11
G10
+VCCP
AG23
AD26
AB22
+3VSUS
G16
G15
F16
F15
E16
D16
C16
+3V
*
VCCRTC
3
+3V
BC221
BC222
0.1uF
0.1uF
*
C0402
C0402
RIJ 15,38
FRAMEJ 15,20,38
IRDYJ 15,20,38
TRDYJ 15,20,38
STOPJ 15,20,38
LOCKJ 15
DEVSELJ 15,20,38
PERRJ 15,20,38
SERRJ 15,20,38
REQ0J 15,38
REQ1J 15,20
REQ2J 15,38
REQ5J 15
IRQ14 14,17
REQ3J 15,38
PIRQAJ 15,38
PIRQBJ 15,38
PIRQCJ 15,20
PIRQDJ 15,20
PIRQEJ 15,38
PIRQGJ 15
PIRQFJ 15
PIRQHJ 15
CLKRUNJ 15,20,28,38
IRQ15 15,17
REQ4J 15
REQ6J 15
MCH_SYNCJ 7,15
PM_THRMJ 15
GATEA20 14,28
RCINJ 14,28
SERIRQ 15,28,38
SMB_CLK 4,12,13,15,38
SMB_DATA 4,12,13,15,38
PCIE_WAKEJ 15,38
SCIJ 15,28
SWIJ 15,28
KBSMIJ 15,28
ICH_PMEJ 15,20,38
+3VSUS
SMB_LINK _ALERTJ 15
+3VSUS
*
SMB_ALERTJ 15
SMLINK0 15
SMLINK1 15
PM_SYSRSTJ 5,15
BATLOWJ 15,28
2
BC223
BC224
0.1uF
0.1uF
*
C0402
R455 10KR 0402 +/-5%
R456 10KR 0402 +/-5%
R457 10KR 0402 +/-5%
R458 10KR 0402 +/-5%
R459 10KR 0402 +/-5%
R460 10KR 0402 +/-5%
R461 10KR 0402 +/-5%
RN2 8.2K8P4R0603+/-5%
1
*
3
5
7 8
RN3 8.2K8P4R0603+/-5%
1
*
3
5
7 8
RN4 8.2K8P4R0603+/-5%
1
*
3
5
7 8
R464 8.2KR0402 +/-5%
R465 8.2KR0402 +/-5%
R466 8.2KR0402 +/-5%
RN5 8.2K8P4R0603+/-5%
1
*
3
5
7 8
RN6 8.2K+/-5%
1
*
3
5
7 8
R468 8.2KR0402 +/-5%
R469 8.2KR0402 +/-5%
R470 8.2KR0402 +/-5%
R471 10KR0402 +/-5%
R472 8.2KR0402 +/-5%
R473 8.2KR0402 +/-5%
R474 10KR0402 +/-5%
R475 8.2KR0402 +/-5%
R476 2.2KR0402 +/-5%
R477 2.2KR0402 +/-5%
R478 8.2KR0402 +/-5%
R479 8.2KR0402 +/-5%
R480 8.2KR0402 +/-5%
R481 8.2KR0402 +/-5%
R482 10KR0402 +/-5%
*
*
C0402
2
4
6
2
4
6
2
4
6
2
4
6
2
4
6
Dummy
BC225
0.1uF
C0402
+3V
+3V
+3VSUS
+3VSUS
W25
W24
W23
M27
M26
M23
M16
M15
M14
M13
M12
G21
G12
1
E27
VSS[172]
Y6
VSS[171]
Y27
VSS[170]
Y26
VSS[169]
Y23
VSS[168]
W7
VSS[167]
VSS[166]
VSS[165]
VSS[164]
W1
VSS[163]
V4
VSS[162]
V27
VSS[161]
V26
VSS[160]
V23
VSS[159]
U25
VSS[158]
U24
VSS[157]
U23
VSS[156]
U15
VSS[155]
U13
VSS[154]
T7
VSS[153]
T27
VSS[152]
T26
VSS[151]
T23
VSS[150]
T16
VSS[149]
T15
VSS[148]
T14
VSS[147]
T13
VSS[146]
T12
VSS[145]
T1
VSS[144]
R4
VSS[143]
R25
VSS[142]
R24
VSS[141]
R23
VSS[140]
R17
VSS[139]
R16
VSS[138]
R15
VSS[137]
R14
VSS[136]
R13
VSS[135]
R12
VSS[134]
R11
VSS[133]
P22
VSS[132]
P16
VSS[131]
P15
VSS[130]
P14
VSS[129]
P13
VSS[128]
P12
VSS[127]
N7
VSS[126]
N17
VSS[125]
N16
VSS[124]
N15
VSS[123]
N14
VSS[122]
N13
VSS[121]
N12
VSS[120]
N11
VSS[119]
N1
VSS[118]
M4
VSS[117]
VSS[116]
VSS[115]
VSS[114]
VSS[113]
VSS[112]
VSS[111]
VSS[110]
VSS[109]
L25
VSS[108]
L24
VSS[107]
L23
VSS[106]
L15
VSS[105]
L13
VSS[104]
K7
VSS[103]
K27
VSS[102]
K26
VSS[101]
K23
VSS[100]
K1
VSS[99]
J4
VSS[98]
J25
VSS[97]
J24
VSS[96]
J23
VSS[95]
H27
VSS[94]
H26
VSS[93]
H23
VSS[92]
G9
VSS[91]
G7
VSS[90]
VSS[89]
VSS[88]
G1
VSS[87]
ICH6-M
U7D
VSS[86]
VSS[85]
VSS[84]
VSS[83]
VSS[82]
VSS[81]
VSS[80]
VSS[79]
VSS[78]
VSS[77]
VSS[76]
VSS[75]
VSS[74]
VSS[73]
VSS[72]
VSS[71]
VSS[70]
VSS[69]
VSS[68]
VSS[67]
VSS[66]
VSS[65]
VSS[64]
VSS[63]
VSS[62]
VSS[61]
VSS[60]
VSS[59]
VSS[58]
VSS[57]
VSS[56]
VSS[55]
VSS[54]
VSS[53]
VSS[52]
VSS[51]
VSS[50]
VSS[49]
VSS[48]
VSS[47]
VSS[46]
VSS[45]
VSS[44]
VSS[43]
VSS[42]
VSS[41]
VSS[40]
VSS[39]
VSS[38]
VSS[37]
VSS[36]
VSS[35]
VSS[34]
VSS[33]
VSS[32]
VSS[31]
VSS[30]
VSS[29]
VSS[28]
VSS[27]
VSS[26]
VSS[25]
VSS[24]
VSS[23]
VSS[22]
VSS[21]
VSS[20]
VSS[19]
VSS[18]
VSS[17]
VSS[16]
VSS[15]
VSS[14]
VSS[13]
VSS[12]
VSS[11]
VSS[10]
VSS[9]
VSS[8]
VSS[7]
VSS[6]
VSS[5]
VSS[4]
VSS[3]
VSS[2]
VSS[1]
F4
F22
F19
F17
E25
E19
E18
E15
E14
D7
D22
D20
D18
D14
D13
D10
D1
C4
C22
C20
C18
C14
B25
B24
B23
B21
B19
B15
B13
AG7
AG3
AG22
AG20
AG17
AG14
AG12
AG1
AF7
AF3
AF26
AF12
AF10
AF1
AE7
AE6
AE25
AE21
AE2
AE12
AE11
AE10
AD6
AD24
AD2
AD18
AD15
AD10
AD1
AC6
AC3
AC26
AC24
AC23
AC22
AC12
AC10
AB9
AB7
AB2
AB19
AB10
AB1
AA4
AA16
AA13
AA11
A9
A7
A4
A26
A23
A21
A19
A15
A12
A1
TECHNOLOGY COPR.
BC270
BC259
*
*
0.1uF
C0402
3
0.1uF
C0402
BC271
*
0.1uF
C0402
2
Title
ICH6M_POWER&GND
Document Number Re v
Date: Sheet
S04 MAINBOARD
1
of
16 40 Monday, June 14, 2004
A
5
4
3
2
1
ODD CONNECTOR
RCDL
RCDL 26
CDGND
CDGND 26
D D
C C
B B
PLT_RSTJ 7,15,21,38
PLT_RSTJ 7,15,21,38
R485 33
R0402 +/-5%
IRQ15 15,16
ODD_LEDJ 19
R488 470
+3V
R0603 +/-5%
Dummy
R490 33
R0402 +/-5%
SDDREQ 14
SDIOWJ 14
SDIORJ 14
SIORDY 14
SDDACKJ 14
IRQ14 14,16
SDA1 14
SDA0 14
SDCS1J 14
-HDD0_LED 19
HDD_VDD
HDD_VDD +5V
FB9
FB L0805 30 Ohm
2 1
RIDERST
SDIOWJ
SIORDY
IRQ15
SDCS1J
BAYVCC
RCSEL
ODD = SLAVE
SDD7 SDD8
SDD6
SDD5
SDD4
SDD3
SDD2
SDD1
SDD0
SDA1
SDA0
BC284
100pF
*
C0402
Dummy
ODD_CONN1
1
2
3
4
5
SDD7
SDD6
SDD5
SDD4
SDD3
SDD2
SDD1
SDD0
SDA1
SDA0
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51 52
54 53
0.8P BTB_DIP 50P
HDD CONNECTOR
HDD_CONN1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
FG1
46
FG2
HEADER_2X22 (HDD)
RCDR
RCDR 26
CDGND
SDD8
SDD9
SDD10
SDD11
SDD12
SDD13
SDD14
SDD15
SDDREQ
SDIORJ
SDDACKJ
R824 0 R0402+/-5%
SDA2
SDCS3J
BC822
10uF
*
C0805
SDD9
SDD10
SDD11
SDD12
SDD13
SDD14
SDD15
SCSEL
R491 470
R0603 +/-5%
SDIAG
R492 10K
SDA2
R0402 +/-5%
BC285
0.1uF
*
10V, X7R, +/-10%
C0402
BAYVCC
*
SDA2 14
SDCS3J 14
FB48
FB L0805 30 Ohm
BC823
0.1uF
C0402
HDD = MASTER
Dummy
*
+3V
SDIAG
2 1
SIORDY
R487 4.7K
BC286
1nF
50V, X7R, +/-10%
C0402
R823
10K
+/-5%
R0402
HDD_VDD
*
+5V
BC276
0.1uF
*
10V, X7R, +/-10%
C0402
+3V
R0402+/-5%
BC287
10uF
16V, X5R, +/-10%
C1206
+5VSUS
BC278
0.1uF
*
10V, X7R, +/-10%
C0402
Del ODD hot plug function
U8
1
GND
2
IN
3
IN
4
EN#
MAX1930ESA
L9
SYSUSBP2- 15
SYSUSBP2+ 15
SYSUSBP6- 15
SYSUSBP6+ 15
1
4 3
Common Choke 90 Ohm 2L
L10
1
4 3
Common Choke 90 Ohm 2L
OUT
OUT
OUT
OUTNC
8
7
6
5
2
2
USB1PWR
SYSUSBP2-_1
SYSUSBP2+_1
USB1PWR
SYSUSBP6-_1
SYSUSBP6+_1
USB1PWR
BC279
C14
330uF
*
CTX
1
2
3
4
1
2
3
4
0.1uF
*
C0402
USB_CONN1
GND
1
2
3
4
GND
USB
USB_CONN2
GND
1
2
3
4
GND
USB
BC280
0.1uF
*
C0402
5
6
5
6
BAYVCC
A A
BC288
0.1uF
*
10V, X7R, +/-10%
C0402
BC289
0.1uF
*
10V, X7R, +/-10%
C0402
5
BC290
0.1uF
*
10V, X7R, +/-10%
C0402
BC291
0.1uF
*
10V, X7R, +/-10%
C0402
4
SDD[0..15]
SDD[0..15] 14
SDIOWJ 14
SDDREQ 14
SIORDY 14
SDIORJ 14
SDDACKJ 14
SDCS1J 14
SDCS3J 14
Title
TECHNOLOGY COPR.
HDD/ODD/USBX2
Document Number Re v
3
2
Date: Sheet
S04 MAINBOARD
1
17 40 Monday, June 14, 2004
A
of
5
D D
C C
H1
H2
H3
H4
4
H5
H6
H7
3
H8
2
1
1
1
H9
B B
A A
1
1
H10
1
1
1
1
H11
1
1
1
1
H12
1
1
1
1
H17
1
1
1
1
H13
1
1
1
1
H14
1
1
1
1
H15
1
1
1
1
H16
1
1
TECHNOLOGY COPR.
Title
Hole
Document Number Re v
5
4
3
2
Date: Sheet
S04 MAINBOARD
1
18 40 Monday, June 14, 2004
A
of
5
+3V
D5
BAT54A
-HDD0_LED 17
D D
ODD_LEDJ 17
NUMLEDJ 28
1
3
2
R501
330
+/-5%
R0603
4
3
2
1
Switch Board Connector
1 3
Q7
CAPSLEDJ 28
C C
PWR_LEDJ 28
B B
WLAN_2P4_LEDJ 29
WLAN_5_LEDJ 29
A A
5
2
PWR_LEDJ
WLAN_5 LEDJ
DTA124EUA
R504 330
R0603 +/-5%
+3VSUS
1 3
Q10
2
DTA124EUA
+3V +3V
R509
10K
+/-5%
R0402
Q11
DTC144EUA
2
1 3
2
PWR_LED
R508
10K
+/-5%
R0402
Q12
DTC144EUA
1 3
4
1 3
Q8
DTA124EUA
R505 330
R0603 +/-5%
2
2
WLAN_2P4_LED_ON 20
D6
RB751V-40
D7
RB751V-40
WLAN_5_LED_ON 20
1 3
Q9
DTA124EUA
R506 330
R0603 +/-5%
2 1
2 1
IDE_LED CAPSLED NUMLED
WIRELESS_LED_ACTJ 20
3
LIDJ 25
NBSWONJ 28
BC827
*
0.1uF
C0402
NBSWONJ
R503 0 R0402+/-5%
+3VSUS
*
PWR_LED
CAPSLED
NUMLED
IDE_LED
BC832
0.1uF
C0402
Switch Board EMI CAPs
*
BC299 220pF C0402 Dummy
*
BC300 220pF C0402 Dummy
*
BC301 220pF C0402 Dummy
*
BC302 220pF C0402 Dummy
*
BC304 220pF C0402 Dummy
Title
Document Number Re v
2
Date: Sheet
NBSWONJ
CAPSLED
NUMLED
IDE_LED
PWR_LED NBSWONJ
Switch board
SWITCHBOARD_CONN1
FPC CONN_10P
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
H111H2
12
S04 MAINBOARD
1
+3VALW
R507
8.2K
+/-5%
R0402
TECHNOLOGY COPR.
of
19 40 Monday, June 14, 2004
A
5
+3V
R511
10K
R0402
+/-5%
D D
C C
*
B B
WIRELESS_LED_ACTJ 19
WLAN_ACTIVE 29
PCLK_MINI
R519
10
+/-5%
R0402
Dummy
BC305
5.6pF
50V, NPO, +/-0.5pF
C0603
Dummy
RF_ENABLE 28
PCLK_MINI 4
C/BE3J 15,38
CLKRUNJ 15,16,28,38
PIRQDJ 15,16
REQ1J 15,16
C/BE2J 15,38
IRDYJ 15,16,38
SERRJ 15,16,38
PERRJ 15,16,38
C/BE1J 15,38
2 1
D8 RB751V-40
R514 0
R0402 +/-5%
+5V
+5V
Dummy
PCLK_MINI
AD31
AD29
AD27
AD25
WLAN_DATA_PCI
AD23
AD21
AD19
AD17
IRDYJ
AD14
AD12
AD10
AD8
AD7
AD5
AD3
AD1
BC306
10pF
*
50V, NPO, +/-5%
C0603
4
AD[0..31]
AD[0..31] 15,38
+3V
MINIPCI_CONN1
1
TIP
3
LAN
5
LAN
7
LAN
9
LAN
11
LAN
13
LAN
15
LAN
17
INT#B
19
3.3V
21
RESERVED
23
GND
25
CLK
27
GND
29
REQ#
31
3.3V
33
AD31
35
AD29
37
GND
39
AD27
41
AD25
43
RESV.
45
C/BE#3
47
AD23
49
GND
51
AD21
53
AD19
55
GND
57
AD17
59
C/BE#2
61
IRDY#
63
3.3V
65
CLKRUN#
67
SERR#
69
GND
71
PERR#
73
C/BE#1
75
AD14
77
GND
79
AD12
81
AD10
83
GND
85
AD8
87
AD7
89
3.3V
91
AD5
93
RESV.
95
AD3
97
5V
99
AD1
101
GND
103
AC_SYNC
105
AC_DI1
107
AC_BIT_CLK
109
AC_ID1#
111
MOD_A_MON
113
AGND
115
SYS_A_OUT
117
AGND
119
AGND
121
NC
123
VCC5A
PCI_SLOT
IDSEL=AD20
IRQ C,D
REQ1/GNT1
RING
LAN
LAN
LAN
LAN
LAN
LAN
LAN
INT#A
RESV.
3.3VAUX
RST#
3.3V
GNT#
GND
PME#
RESV.
AD30
3.3V
AD28
AD26
AD24
IDSEL
GND
AD22
AD20
PAR
AD18
AD16
GND
FRAME#
TRDY#
STOP#
3.3V
DEVSEL#
GND
AD15
AD13
AD11
GND
AD9
C/BE#0
3.3V
AD6
AD4
AD2
AD0
RESV.
RESV.
GND
M66EN
AC_DO
AC_ID0#
AC_RST#
RESV.
GND
SYS_A_IN
AGND
AGND
MCPIACT#
3.3VAUX
2
+3V
4
6
8
10
12
14
16
18
5V
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
+5V
MINIPCI_PMEJ
AD30
AD28
AD26
AD24
AD22
AD20
AD18
AD16
AD15
AD13
AD11
AD9
AD6
AD4
AD2
AD0
3
+3VSUS
R515 100
R0603 +/-1%
PAR 15,38
FRAMEJ 15,16,38
TRD YJ 15,16,38
STOPJ 15, 16,38
DEVSELJ 15,16,38
C/BE0J 15,38
+3VSUS
WLAN_2P4_LED_ON 19
WLAN_5_LED_ON 19
PIRQCJ 15,16
PCIRSTJ 15,28,38
GNT1J 15
AD20
3VAUX
+3V
AC_SDOUT 14,26
AC_RESETJ 14,26
MINIPCI_PMEJ
2
R510 0
R0402 +/-5%
MDC1
1
1
3
3
5
5
7
7
9
9
11
11
13
13
15
15
17
17
19
19
21
21
23
23
25
25
27
27
29
29
H131H2
0.8P BTB_SMT 30P
1
ICH_PMEJ 15 ,16,38
+5V
2
2
4
4
6
6
8
8
10
10
12
12
14
14
16
16
18
18
20
20
22
24
26
28
30
22
24
26
28
30
32
R517 0 R0402+/-5%
R518 0 R0402+/-5%
R516 10K
R0402 +/-5%
MAINON 28,32,33,34
PHONE 26
AC_BITCLK_MDC
G
Q13
2N7002
R520
10K
R0402
+/-5%
D S
3VAUX
AC_SYNC 14,26
AC_SDIN1 14
AC_BITCLK_MDC 14
MDC_RINGJ 28
R521
33
+/-5%
R0402
Dummy
BC307
10pF
*
50V, NPO, +/-5%
C0603
A A
BC308
0.1uF
*
10V, X7R, +/-10%
C0402
BC309
0.1uF
*
10V, X7R, +/-10%
C0402
+3VSUS +5V
*
5
BC310
2.2uF
C0805
16V, Y5V, +80%/-20%
BC311
0.1uF
*
10V, X7R, +/-10%
C0402
BC312
0.1uF
*
10V, X7R, +/-10%
C0402
4
BC313
2.2uF
*
16V, Y5V, +80%/-20%
C0805
BC314
0.1uF
*
10V, X7R, +/-10%
C0402
BC315
0.1uF
*
10V, X7R, +/-10%
C0402
BC316
0.1uF
*
10V, X7R, +/-10%
C0402
3
+3V
BC317
0.1uF
*
10V, X7R, +/-10%
C0402
BC318
10uF
*
10V, Y5V, +80%/-20%
C0805
2
Title
Mini PCI/MDC
Document Number Re v
Date: Sheet
S04 MAINBOARD
Dummy
TECHNOLOGY COPR.
20 40 Monday, June 14, 2004
1
A
of
5
R546
1M
+/-5%
R0603
@M24
R547 10K
R0402 +/-5%
@M24
VPEG_RXP0
VPEG_RXN0
VPEG_RXP1
VPEG_RXN1
VPEG_RXP2
VPEG_RXN2
VPEG_RXP3
VPEG_RXN3
VPEG_RXP4
VPEG_RXN4
VPEG_RXP5
VPEG_RXN5
VPEG_RXP6
VPEG_RXN6
VPEG_RXP7
VPEG_RXN7
VPEG_RXP8
VPEG_RXN8
VPEG_RXP9
VPEG_RXN9
VPEG_RXP10
VPEG_RXN10
VPEG_RXP11
VPEG_RXN11
VPEG_RXP12
VPEG_RXN12
VPEG_RXP13
VPEG_RXN13
VPEG_RXP14
VPEG_RXN14
VPEG_RXP15
VPEG_RXN15
VPEG_TXP0
VPEG_TXN0
VPEG_TXP1
VPEG_TXN1
VPEG_TXP2
VPEG_TXN2
VPEG_TXP3
VPEG_TXN3
VPEG_TXP4
VPEG_TXN4
VPEG_TXP5
VPEG_TXN5
VPEG_TXP6
VPEG_TXN6
VPEG_TXP7
VPEG_TXN7
VPEG_TXP8
VPEG_TXN8
VPEG_TXP9
VPEG_TXN9
VPEG_TXP10
VPEG_TXN10
VPEG_TXP11
VPEG_TXN11
VPEG_TXP12
VPEG_TXN12
VPEG_TXP13
VPEG_TXN13
VPEG_TXP14
VPEG_TXN14
VPEG_TXP15
VPEG_TXN15
@M24
DDC3CLK
DDC3DATA
CLK_ATI1
CLK_ATI2
BC320 0.1uF
C0402 @M24
BC322 0.1uF
C0402 @M24
BC324 0.1uF
C0402 @M24
BC326 0.1uF
C0402 @M24
BC328 0.1uF
C0402 @M24
D D
C C
B B
+3V
A A
BC330 0.1uF
C0402 @M24
BC332 0.1uF
C0402 @M24
BC334 0.1uF
C0402 @M24
BC336 0.1uF
C0402 @M24
BC338 0.1uF
C0402 @M24
BC340 0.1uF
C0402 @M24
BC342 0.1uF
C0402 @M24
BC344 0.1uF
C0402 @M24
BC346 0.1uF
C0402 @M24
BC348 0.1uF
C0402 @M24
BC350 0.1uF
C0402 @M24
BC352 0.1uF
C0402 @M24
PEG_TXP1 VPEG_TXP1
BC354 0.1uF
C0402 @M24
PEG_TXP2 VPEG_TXP2
BC356 0.1uF
C0402 @M24
PEG_TXP3 VPEG_TXP3
BC358 0.1uF
C0402 @M24
PEG_TXP4 VPEG_TXP4
BC360 0.1uF
C0402 @M24
PEG_TXP5 VPEG_TXP5
BC362 0.1uF
C0402 @M24
PEG_TXP6 VPEG_TXP6
BC364 0.1uF
C0402 @M24
PEG_TXP7 VPEG_TXP7
BC366 0.1uF
C0402 @M24
PEG_TXP8 VPEG_TXP8
BC368 0.1uF
C0402 @M24
PEG_TXP9 VPEG_TXP9
BC370 0.1uF
C0402 @M24
PEG_TXP10 VPEG_TXP10
BC372 0.1uF
C0402 @M24
PEG_TXP11 VPEG_TXP11
BC374 0.1uF
C0402 @M24
PEG_TXP12 VPEG_TXP12
BC376 0.1uF
C0402 @M24
PEG_TXP13 VPEG_TXP13
BC378 0.1uF
C0402 @M24
PEG_TXP14 VPEG_TXP14
BC380 0.1uF
C0402 @M24
PEG_TXP15 VPEG_TXP15
BC382 0.1uF
C0402 @M24
R534
10K
PCIE_VDDR
+/-5%
R0402
Dummy
R539
10K
+/-5%
R0402
@M24
15pF
BC387
*
15pF
BC388
*
VPEG_TXN0 PEG_TXN0
*
VPEG_TXN1 PEG_TXN1
*
VPEG_TXN2 PEG_TXN2
*
VPEG_TXN3 PEG_TXN3
*
VPEG_TXN4 PEG_TXN4
*
VPEG_TXN5 PEG_TXN5
*
VPEG_TXN6 PEG_TXN6
*
VPEG_TXN7 PEG_TXN7
*
VPEG_TXN8 PEG_TXN8
*
VPEG_TXN9 PEG_TXN9
*
VPEG_TXN10 PEG_TXN10
*
VPEG_TXN11 PEG_TXN11
*
VPEG_TXN12 PEG_TXN12
*
VPEG_TXN13 PEG_TXN13
*
VPEG_TXN14 PEG_TXN14
*
VPEG_TXN15 PEG_TXN15
*
VPEG_TXP0 PEG_TXP0
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
CLK_PCIE_VGA 4
CLK_PCIE_VGAJ 4
R531 150 R0603 +/-1% @M24
R535 100 R0603 +/-1% @M24
R536 10K R0402 +/-1% @M24
PLT_RSTJ 7,15,17,38
R540 715 R0603 +/-1% @M24
TV_CHROMA 11,24
TV_LUMA 11,24
TV_COMP 11,24
@M24
C0603
X3
XTAL-27MHz
@M24
1 2
@M24
C0603
5
R538 0
R0402 +/-5%
4
U11A
AH30
PCIE_RX0P
AG30
PCIE_RX0N
AG29
PCIE_RX1P
AF29
PCIE_RX1N
AE29
PCIE_RX2P
AE30
PCIE_RX2N
AD30
PCIE_RX3P
AD29
PCIE_RX3N
AC29
PCIE_RX4P
AB29
PCIE_RX4N
AB30
PCIE_RX5P
AA30
PCIE_RX5N
AA29
PCIE_RX6P
Y29
PCIE_RX6N
W29
PCIE_RX7P
W30
PCIE_RX7N
V30
PCIE_RX8P
V29
PCIE_RX8N
U29
PCIE_RX9P
T29
PCIE_RX9N
T30
PCIE_RX10P
R30
PCIE_RX10N
R29
PCIE_RX11P
P29
PCIE_RX11N
N29
PCIE_RX12P
N30
PCIE_RX12N
M30
PCIE_RX13P
M29
PCIE_RX13N
L29
PCIE_RX14P
K29
PCIE_RX14N
K30
PCIE_RX15P
J30
PCIE_RX15N
AF26
PCIE_TX0P
AE26
PCIE_TX0N
AC25
PCIE_TX1P
AB25
PCIE_TX1N
AC27
PCIE_TX2P
AB27
PCIE_TX2N
AC26
PCIE_TX3P
AB26
PCIE_TX3N
Y25
PCIE_TX4P
W25
PCIE_TX4N
Y27
PCIE_TX5P
W27
PCIE_TX5N
Y26
PCIE_TX6P
W26
PCIE_TX6N
U25
PCIE_TX7P
T25
PCIE_TX7N
U27
PCIE_TX8P
T27
PCIE_TX8N
U26
PCIE_TX9P
T26
PCIE_TX9N
P25
PCIE_TX10P
N25
PCIE_TX10N
P27
PCIE_TX11P
N27
PCIE_TX11N
P26
PCIE_TX12P
N26
PCIE_TX12N
L25
PCIE_TX13P
K25
PCIE_TX13N
L27
PCIE_TX14P
K27
PCIE_TX14N
L26
PCIE_TX15P
K26
PCIE_TX15N
AF27
PCIE_REFCLKP
AE27
PCIE_REFCLKN
AC23
PCIE_CALRP
AB24
PCIE_CALRN
AB23
PCIE_CALI
AE25
PCIE_TEST
AD25
PERSTb
AD24
PERSTb_MASK
AH21
R2SET
AK21
Y_G
AJ22
C_R_PR
AK22
COMP_B_PB
AJ24
H2SYNC
AK24
V2SYNC
AG22
DDC3CLK
AG23
DDC3DATA
AJ23
SSIN
AH24
SSOUT
AJ29
XTALOUT
AH28
XTALIN
AH27
TESTEN
AH25
STEREOSYNC
E8
TEST_YCLK
B6
TEST_MCLK
AF25
PLLTEST
216TDDAKA11FH @M24
4
GPIO0
Part 1 of 6
GPIO1
GPIO2
GPIO3
GPIO4
GPIO5
GPIO6
GPIO7
GPIO8
GPIO9
GPIO10
GPIO11
GPIO12
GPIO13
GPIO14
GPIO_PWRCNTL
GPIO_MEMSSIN
DVOVMODE
DVPDATA_0
DVPDATA_1
DVPDATA_2
DVPDATA_3
DVPDATA_4
DVPDATA_5
DVPDATA_6
DVPDATA_7
DVPDATA_8
DVPDATA_9
DVPDATA_10
DVPDATA_11
DVPDATA_12
DVPDATA_13
DVPDATA_14
DPVDATA_15
DVPDATA_16
DVPDATA_17
DVPDATA_18
DVPDATA_19
DVPDATA_20
PCI EXPRESS
DVPDATA_21
DVPDATA_22
DVPDATA_23
DVPCNTL_0
DVPCNTL_1
DVPCNTL_2
DVPCNTL_3
VREFG
TXOUT_L0P
TXOUT_L1P
TXOUT_L2P
TXOUT_L2N
TXOUT_U0N
TXOUT_U1N
TXOUT_U1P
TXOUT_U3N
DIGON
BLON
TXOUT_L0N
TXOUT_U3P
TXOUT_U2P
TXCLK_LP
TXOUT_L3P
TXOUT_L3N
TXOUT_L1N
TXCLK_LN
TXOUT_U0P
TXOUT_U2N
TXCLK_UN
TXCLK_UP
TX0M
TX0P
TX1M
TX1P
TX2M
TX2P
TXCM
TXCP
DDC2CLK
DDC2DATA
DAC2 SS CLK
HPD1
HSYNC
VSYNC
RSET
DDC1DATA
DDC1CLK
GPIO_AUXWIN
DPLUS
DMINUS
THERM DAC1 TMDS LVDS DVO/EXT TMDS/GPIO
3
VGA_GPIO0
AJ5
VGA_GPIO1
AH5
VGA_GPIO2
AJ4
VGA_GPIO3
AK4
VGA_GPIO4
AH4
VGA_GPIO5
AF4
VGA_GPIO6
AJ3
VGA_GPIO7
AK3
VGA_GPIO8
AH3
VGA_GPIO9
AJ2
VGA_GPIO10
AH2
VGA_GPIO11
AH1
VGA_GPIO12
AG3
VGA_GPIO13
AG1
VGA_GPIO14
AG2
VCORE_L/HJ
AF3
AF2
AE10
AH6
AJ6
AK6
AH7
AK7
AJ7
AH8
AJ8
AH9
AJ9
AK9
AH10
AE6
AG6
AF6
AE7
AF7
AE8
AG8
AF8
AE9
AF9
AG10
AF10
AJ10
AK10
AJ11
AH11
AG4
AH16
AJ17
AK18
AJ18
AG16
AF16
AF17
AF19
AE12
AG12
AH15
AF20
AE19
AJ19
AJ21
AJ20
AJ16
AK19
AG17
AE18
AG19
AG20
AK13
AJ13
AJ14
AJ15
AK15
AK16
AJ12
AK12
AE13
AE14
AF12
AK27
R
AJ27
G
AJ26
B
AJ25
AK25
M24_RSET
AH26
DDCDAT
AG25
DDCCLK
AF24
VGA_AUXWIN
AG24
THERMD+
AF11
THERMD-
AE11
VCORE_L/HJ 35
VGA_GPIO16 25
R526 2.2KR0402+/-5% @M24
R527 2.2KR0402+/-5% @M24
EDIDDATA 11,25
EDIDC LK 11,25
DVPCNTL_0
DVPCNTL_1
DVPCNTL_2
DVPCNTL_3
R528 1K R0402 +/-1% @M24
R529 1K R0402 +/-1% @M24
TXLOUT0+ 11,25
TXLOUT1+ 11,25
TXLOUT2+ 11,25
TXLOUT2- 11,25
DISP_ON 11,25
VGA_BLON 1 1,25
TXLOUT0- 11,25
TXLCLKOUT+ 11 ,25
TXLOUT1- 11,25
TXLCLKOUT- 11 ,25
@M24
R542 100K
R0402 +/-5%
CRT_R 11,24
CRT_G 11,24
CRT_B 11,24
CRTHS_VGA 11,24
CRTVS_VGA 11,24
R545
499
3
@M24
R0402
+/-1%
+3V
+3V
PEG_RXP[0..15]
PEG_RXN[0..15]
PEG_TXP [0..15]
PEG_TXN [0..15]
+3V
R522 10K R0402 +/-5% @M24
R523 10K R0402 +/-5% @M24
R524 10K R0402 +/-5% @M24
R525 10K R0402 +/-5% @M24
R937 10K
R938 10K
R939 10K
R940 10K
R941 10K
R942 10K
R943 10K
R944 10K
R945 10K
R946 10K
R947 10K
+3V
R544
R543
4.7K
4.7K
+/-5%
+/-5%
R0402
R0402
@M24
@M24
DVPCNTL_3
DVPCNTL_2
DVPCNTL_1
DVPCNTL_0
R537
10K
+/-5%
R0402
@M24
R825 0 R0402+/-5%
@M24,&Dummy
R0402+/-5%
@M24,&Dummy
R0402+/-5%
@M24,&Dummy
R0402+/-5%
@M24,&Dummy
R0402+/-5%
@M24,&Dummy
R0402+/-5%
@M24,&Dummy
R0402+/-5%
@M24,&Dummy
R0402+/-5%
@M24,&Dummy
R0402+/-5%
@M24,&Dummy
R0402+/-5%
@M24,&Dummy
R0402+/-5%
@M24,&Dummy
R0402+/-5%
@M24
R541 10K
+3V
R0402 +/-5%
DDCDAT 11,24
DDCCLK 11,24
2
PEG_RXP[0..15] 11
PEG_RXN[0..15] 11
PEG_TXP[0..15] 11
PEG_TXN [0..15] 11
RN7
1
2
*
3
4
5
6
7 8
10K
+/-5%
8P4R0603
@M24
R532
4.7K
+/-5%
R0402
@M24
DDC3CLK
DDC3DATA
@M24
D S
G
2
1
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
VPEG_RXN0 PEG_RXN0
VPEG_RXP0 PEG_RXP0
BC383
0.1uF
*
10V, X7R, +/-10%
C0402
@M24
THERMD+
BC384
2.2nF
50V, X7R, +/-10%
C0603
THERMD-
@M24
*
BC386
220pF
25V, NPO, +/-5%
C0402
@M24
VGA_GPIO0
VGA_GPIO1
VGA_GPIO2
VGA_GPIO3
VGA_GPIO4
VGA_GPIO5
VGA_GPIO6
VGA_GPIO7
VGA_GPIO8
VGA_GPIO9
VGA_GPIO10
VGA_GPIO11
VGA_GPIO12
VGA_GPIO13
VGA_GPIO14
+3V
+3V
R533
4.7K
+/-5%
R0402
@M24
VGA_AUXWIN
Q14
2N7002
@M24
BC319 0.1uF
C0402 @M24
PEG_RXN1 VPEG_RXN1
BC321 0.1uF
C0402 @M24
PEG_RXN2 VPEG_RXN2
BC323 0.1uF
C0402 @M24
PEG_RXN3 VPEG_RXN3
BC325 0.1uF
C0402 @M24
PEG_RXN4 VPEG_RXN4
BC327 0.1uF
C0402 @M24
PEG_RXN5 VPEG_RXN5
BC329 0.1uF
C0402 @M24
PEG_RXN6 VPEG_RXN6
BC331 0.1uF
C0402 @M24
PEG_RXN7 VPEG_RXN7
BC333 0.1uF
C0402 @M24
PEG_RXN8 VPEG_RXN8
BC335 0.1uF
C0402 @M24
PEG_RXN9 VPEG_RXN9
BC337 0.1uF
C0402 @M24
PEG_RXN10 VPEG_RXN10
BC339 0.1uF
C0402 @M24
PEG_RXN11 VPEG_RXN11
BC341 0.1uF
C0402 @M24
PEG_RXN12 VPEG_RXN12
BC343 0.1uF
C0402 @M24
PEG_RXN13 VPEG_RXN13
BC345 0.1uF
C0402 @M24
PEG_RXN14 VPEG_RXN14
BC347 0.1uF
C0402 @M24
PEG_RXN15 VPEG_RXN15
BC349 0.1uF
C0402 @M24
BC351 0.1uF
C0402 @M24
PEG_RXP1 VPEG_RXP1
BC353 0.1uF
C0402 @M24
PEG_RXP2 VPEG_RXP2
BC355 0.1uF
C0402 @M24
PEG_RXP3 VPEG_RXP3
BC357 0.1uF
C0402 @M24
PEG_RXP4 VPEG_RXP4
BC359 0.1uF
C0402 @M24
PEG_RXP5 VPEG_RXP5
BC361 0.1uF
C0402 @M24
PEG_RXP6 VPEG_RXP6
BC363 0.1uF
C0402 @M24
PEG_RXP7 VPEG_RXP7
BC365 0.1uF
C0402 @M24
PEG_RXP8 VPEG_RXP8
BC367 0.1uF
C0402 @M24
PEG_RXP9 VPEG_RXP9
BC369 0.1uF
C0402 @M24
PEG_RXP10 VPEG_RXP10
BC371 0.1uF
C0402 @M24
PEG_RXP11 VPEG_RXP11
BC373 0.1uF
C0402 @M24
PEG_RXP12 VPEG_RXP12
BC375 0.1uF
C0402 @M24
PEG_RXP13 VPEG_RXP13
BC377 0.1uF
C0402 @M24
PEG_RXP14 VPEG_RXP14
BC379 0.1uF
C0402 @M24
PEG_RXP15 VPEG_RXP15
BC381 0.1uF
C0402 @M24
R530 100
+3V
R0603 +/-1%
@M24
U12
8
SMBCLK
7
SMDATA
6
ALERT
5
GND
LM89 @M24
VDD
D+
D-
T_CRIT_A
25V, NPO, +/-5%
1
2
3
4
DDCCLK
DDCDAT
BC385
220pF
C0402
@M24
TECHNOLOGY COPR.
Title
M24CSP-1
Document Number Re v
Date: Sheet
S04 MAINBOARD
1
of
21 40 Monday, June 14, 2004
A
5
U11B
H28
VSS#H28
H29
VSS#H29
J28
VSS#J28
J29
VSS#J29
J26
VSS#J26
H25
VSS#H25
H26
VSS#H26
G26
VSS#G26
G30
VSS#G30
D29
VSS#D29
D D
C C
B B
A A
D28
VSS#D28
E28
VSS#E28
E29
VSS#E29
G29
VSS#G29
G28
VSS#G28
F28
VSS#F28
G25
VSS#G25
F26
VSS#F26
E26
VSS#E26
F25
VSS#F25
E24
VSS#E24
F23
VSS#F23
E23
VSS#E23
D22
VSS#D22
B29
VSS#B29
C29
VSS#C29
C25
VSS#C25
C27
VSS#C27
B28
VSS#B28
B25
VSS#B25
C26
VSS#C26
B26
VSS#B26
F17
VSS#F17
E17
VSS#E17
D16
VSS#D16
F16
VSS#F16
E15
VSS#E15
F14
VSS#F14
E14
VSS#E14
F13
VSS#F13
C17
VSS#C17
B18
VSS#B18
B17
VSS#B17
B15
VSS#B15
C13
VSS#C13
B14
VSS#B14
C14
VSS#C14
C16
VSS#C16
A13
VSS#A13
A12
VSS#A12
C12
VSS#C12
B12
VSS#B12
C10
VSS#C10
C9
VSS#C9
B9
VSS#B9
B10
VSS#B10
E13
VSS#E13
E12
VSS#E12
E10
VSS#E10
F12
VSS#F12
F11
VSS#F11
E9
VSS#E9
F9
VSS#F9
F8
VSS#F8
216TDDAKA11FH @M24
VMEM_VGA
5
R551
100
+/-5%
R0402
@M24
R552
100
+/-5%
R0402
@M24
VMEM_VGA
VSS#E22
VSS#B22
VSS#B23
VSS#B24
VSS#C23
VSS#C22
VSS#F22
VSS#F21
VSS#C21
VSS#A24
VSS#C24
VSS#A25
VSS#E21
VSS#B20
VSS#J25
VSS#F29
VSS#E25
VSS#A27
VSS#F15
VSS#C15
VSS#C11
VSS#E11
VSS#J27
VSS#F30
VSS#F24
VSS#B27
VSS#E16
VSS#B16
VSS#B11
VSS#F10
VSS#A19
VSS#E18
VSS#E19
VSS#E20
VSS#F20
VSS#B19
VSS#B21
VSS#C20
VSS#C18
VSS#A18
VSS#C19
VSS#D30
VSS#B13
MVREFM
MVREFA
VGA_MVREFD
R553
100
+/-5%
R0402
@M24
R554
100
+/-5%
R0402
@M24
E22
B22
B23
B24
C23
C22
F22
F21
C21
A24
C24
A25
E21
B20
J25
F29
E25
A27
F15
C15
C11
E11
J27
F30
F24
B27
E16
B16
B11
F10
A19
E18
E19
E20
F20
B19
B21
C20
C18
A18
C19
D30
B13
B8
B7
BC389
0.1uF
*
10V, X7R, +/-10%
C0402
@M24
VGA_MVREFS
4
BC390
0.1uF
*
10V, X7R, +/-10%
C0402
@M24
4
U11C
D7
VSS#D7
F7
VSS#F7
E7
VSS#E7
G6
VSS#G6
G5
VSS#G5
F5
VSS#F5
E5
VSS#E5
C4
VSS#C4
B5
VSS#B5
C5
VSS#C5
A4
VSS#A4
B4
VSS#B4
C2
VSS#C2
D3
VSS#D3
D1
VSS#D1
D2
VSS#D2
G4
VSS#G4
H6
VSS#H6
H5
VSS#H5
J6
VSS#J6
K5
VSS#K5
K4
VSS#K4
L6
VSS#L6
L5
VSS#L5
G2
VSS#G2
F3
VSS#F3
H2
VSS#H2
E2
VSS#E2
F2
VSS#F2
J3
VSS#J3
F1
VSS#F1
H3
VSS#H3
U6
VSS#U6
U5
VSS#U5
U3
VSS#U3
V6
VSS#V6
W5
VSS#W5
W4
VSS#W4
Y6
VSS#Y6
Y5
VSS#Y5
U2
VSS#U2
V2
VSS#V2
V1
VSS#V1
V3
VSS#V3
W3
VSS#W3
Y2
VSS#Y2
Y3
VSS#Y3
AA2
VSS#AA2
AA6
VSS#AA6
AA5
VSS#AA5
AB6
VSS#AB6
AB5
VSS#AB5
AD6
VSS#AD6
AD5
VSS#AD5
AE5
VSS#AE5
AE4
VSS#AE4
AB2
VSS#AB2
AB3
VSS#AB3
AC2
VSS#AC2
AC3
VSS#AC3
AD3
VSS#AD3
AE1
VSS#AE1
AE2
VSS#AE2
AE3
VSS#AE3
216TDDAKA11FH @M24
3
3
VSS#N5
VSS#M1
VSS#M3
VSS#L3
VSS#L2
VSS#M2
VSS#M5
VSS#P6
VSS#N3
VSS#K2
VSS#K3
VSS#J2
VSS#P5
VSS#P3
VSS#E6
VSS#B2
VSS#J5
VSS#G3
VSS#W6
VSS#W2
VSS#AC6
VSS#AD2
VSS#F6
VSS#B3
VSS#K6
VSS#G1
VSS#V5
VSS#W1
VSS#AC5
VSS#AD1
VSS#R2
VSS#T5
VSS#T6
VSS#R5
VSS#R6
VSS#R3
VSS#N1
VSS#N2
VSS#T2
VSS#T3
VSS#P2
VSS#E3
VSS#AA3
ROMCSB
MEMVMODE_0
MEMVMODE_1
MEMTEST
N5
M1
M3
L3
L2
M2
M5
P6
N3
K2
K3
J2
P5
P3
E6
B2
J5
G3
W6
W2
AC6
AD2
F6
B3
K6
G1
V5
W1
AC5
AD1
R2
T5
T6
R5
R6
R3
N1
N2
T2
T3
P2
E3
AA3
AF5
C6
C7
C8
MEMVCODE[0:1]
0 1=2.5V(DDR)
1 0=1.8V(DDR)
R835 4.7K R0402 +/-5% @M24,&Dummy
VGAMEM0
R548 4.7K R0402 +/-5% @M24
VGAMEM1
R549 4.7K R0402 +/-5% @M24
MEMTEST
R836 4.7K R0402 +/-5% @M24,&Dummy
R550 47 R0402 +/-5% @M24
2
U11E
A2
VSS#A2
A10
VSS#A10
A16
VSS#A16
A22
VSS#A22
A29
VSS#A29
C1
VSS#C1
C3
VSS#C3
C28
VSS#C28
C30
VSS#C30
D27
VSS#D27
D24
VSS#D24
D21
VSS#D21
D18
VSS#D18
D15
VSS#D15
D12
VSS#D12
D10
VSS#D10
D6
VSS#D6
D4
VSS#D4
F27
VSS#F27
G9
VSS#G9
G12
VSS#G12
G16
VSS#G16
G18
VSS#G18
G21
VSS#G21
G24
VSS#G24
H27
VSS#H27
H23
VSS#H23
H21
VSS#H21
H18
VSS#H18
H16
VSS#H16
H14
VSS#H14
H12
VSS#H12
H9
VSS#H9
H8
VSS#H8
H4
VSS#H4
K8
VSS#K8
K7
VSS#K7
K1
VSS#K1
L4
VSS#L4
M8
VSS#M8
M7
VSS#M7
P4
VSS#P4
R7
VSS#R7
R8
VSS#R8
T1
VSS#T1
AD12
VSS#AD12
AG5
VSS#AG5
AG9
VSS#AG9
AG11
VSS#AG11
J24
VSS#J24
J23
VSS#J23
+1.8V
216TDDAKA11FH @M24
+1.8V
1
VSS#U4
VSS#U8
VSS#W7
VSS#W8
VSS#Y4
VSS#AB8
VSS#AB7
VSS#AB1
VSS#AC4
VSS#AC12
VSS#AC14
VSS#AC16
VSS#AC18
VSS#AD18
VSS#AD16
VSS#AJ1
VSS#AK2
PCIE_VSS#K28
CORE GND
PCIE_VSS#L28
PCIE_VSS#M27
PCIE_VSS#M26
PCIE_VSS#M24
PCIE_VSS#M25
PCIE_VSS#M28
PCIE_VSS#P28
PCIE_VSS#N28
PCIE_VSS#R25
PCIE_VSS#R23
PCIE_VSS#R24
PCIE_VSS#R26
PCIE_VSS#R27
PCIE_VSS#R28
PCIE_VSS#T28
PCIE_VSS#T24
PCIE_VSS#U28
PCIE_VSS#V24
PCIE_VSS#V26
PCIE_VSS#V27
PCIE_VSS#V25
PCIE_VSS#V28
PCIE_VSS#Y28
PCIE_VSS#W24
PCIE_VSS#W28
PCIE_VSS#AA26
PCIE_VSS#AA27
PCIE_VSS#AA23
PCIE_VSS#AA24
PCIE_VSS#AA25
PCIE_VSS#AA28
PCIE_VSS#AB28
PCIE_VSS#AC28
PCIE_VSS#AD28
PCIE_VSS#AD26
PCIE_VSS#AD27
PCIE_VSS#AE28
PCIE_VSS#AF28
PCIE_VSS#AH29
U4
U8
W7
W8
Y4
AB8
AB7
AB1
AC4
AC12
AC14
AC16
AC18
AD18
AD16
AJ1
AK2
K28
L28
M27
M26
M24
M25
M28
P28
N28
R25
R23
R24
R26
R27
R28
T28
T24
U28
V24
V26
V27
V25
V28
Y28
W24
W28
AA26
AA27
AA23
AA24
AA25
AA28
AB28
AC28
AD28
AD26
AD27
AE28
AF28
AH29
TECHNOLOGY COPR.
Title
M24CSP-2
Document Number Re v
2
Date: Sheet
S04 MAINBOARD
1
22 40 Monday, June 14, 2004
A
of
*
*
BC391
10uF
C0805
@M24
BC398
10uF
C0805
@M24
BC438
0.1uF
C0402
@M24
BC447
0.1uF
C0402
@M24
5
BC392
*
0.1uF
C0402
@M24
BC399
*
0.1uF
C0402
@M24
2 1
BC405
*
0.1uF
C0402
@M24
2 1
BC407
*
0.1uF
C0402
@M24
2 1
BC409
*
0.1uF
C0402
@M24
2 1
BC410
*
0.1uF
C0402
@M24
2 1
BC412
*
0.1uF
C0402
@M24
2 1
BC416
*
0.1uF
C0402
@M24
2 1
BC418
*
0.1uF
C0402
@M24
2 1
BC423
*
0.1uF
C0402
@M24
2 1
BC431
*
0.1uF
C0402
@M24
2 1
BC432
*
0.1uF
C0402
@M24
BC439
*
0.1uF
C0402
@M24
BC448
*
0.1uF
C0402
@M24
5
BC393
*
0.1uF
C0402
@M24
BC400
*
0.1uF
C0402
@M24
BC406
*
0.1uF
C0402
@M24
BC408
*
0.1uF
C0402
@M24
BC411
*
0.1uF
C0402
@M24
BC413
*
0.1uF
C0402
@M24
BC417
*
0.1uF
C0402
@M24
BC424
*
0.1uF
C0402
@M24
BC440
*
0.1uF
C0402
@M24
BC449
*
0.1uF
C0402
@M24
BC394
*
0.1uF
C0402
@M24
BC401
*
0.1uF
C0402
@M24
PVGA_1.2V
VGA_LVDDR_2.5V +2.5V
VGA_VDDRH_1.8V +1.8V
VGA_A2VDD_2.5V +2.5V
BC425
*
0.1uF
C0402
@M24
VGA_PVDD_1.8V +1.8V
VGA_MVDD_1.8V +1.8V
BC441
*
0.1uF
C0402
@M24
BC450
*
0.1uF
C0402
@M24
VMEM_VGA
*
VMEM_VGA
D D
C C
B B
VCORE_VGA
*
A A
VCORE_VGA
*
*
+1.2V
FB43
FB L0805 300 Ohm
@M24
+1.8V VGA_PCIE_1.8V
FB49
FB L0603 120 Ohm
@M24
FB50
FB L0603 120 Ohm
@M24
+1.8V VGA_LVDDR_1.8V
FB51
FB L0603 120 Ohm
@M24
+1.8V VGA_LTP VDD_1.8V
FB52
FB L0603 120 Ohm
@M24
FB44
+3V
FB L0603 120 Ohm
2 1
@M24
D9
BAT54
Dummy
FB53
FB L0603 120 Ohm
@M24
+1.8V VGA_AVDD_1.8V
FB54
FB L0603 120 Ohm
@M24
FB55
FB L0603 120 Ohm
@M24
FB56
FB L0603 120 Ohm
@M24
BC437
10uF
C0805
@M24
BC446
10uF
C0805
@M24
4
BC395
*
0.1uF
C0402
@M24
BC402
*
0.1uF
C0402
@M24
BC426
*
0.1uF
C0402
@M24
BC442
*
0.1uF
C0402
@M24
BC451
*
0.1uF
C0402
@M24
BC396
*
0.1uF
C0402
@M24
BC403
*
0.1uF
C0402
@M24
BC443
*
0.1uF
C0402
@M24
BC452
*
0.1uF
C0402
@M24
4
BC397
*
0.1uF
C0402
@M24
BC404
*
0.1uF
C0402
@M24
*
*
FB42
FB L0805 300 Ohm
@M24
VMEM_VGA
EC13
220uF
*
2.5V, +/-20%
CTX
@M24
VGA_LVDDR_2.5V
VGA_LVDDR_1.8V
VGA_LTP VDD_1.8V
VGA_VDDRH_1.8V
VGA_A2VDD_2.5V
VGA_AVDD_1.8V
VGA_PVDD_1.8V
VGA_MVDD_1.8V
BC444
0.1uF
C0402
@M24
BC453
0.1uF
C0402
@M24
2 1
BC445
*
0.1uF
C0402
@M24
BC454
*
0.1uF
C0402
@M24
+1.8V
3
VMEM_VGA
3
U11D
A9
VDDR1#A9
A15
VDDR1#A15
A21
VDDR1#A21
A28
VDDR1#A28
B1
VDDR1#B1
B30
VDDR1#B30
D26
VDDR1#D26
D23
VDDR1#D23
D20
VDDR1#D20
D17
VDDR1#D17
D14
VDDR1#D14
D11
VDDR1#D11
D8
VDDR1#D8
D5
VDDR1#D5
E27
VDDR1#E27
F4
VDDR1#F4
G7
VDDR1#G7
G10
VDDR1#G10
G13
VDDR1#G13
G15
VDDR1#G15
G19
VDDR1#G19
G22
VDDR1#G22
G27
VDDR1#G27
H22
VDDR1#H22
H19
VDDR1#H19
H17
VDDR1#H17
H15
VDDR1#H15
H13
VDDR1#H13
H10
VDDR1#H10
J1
VDDR1#J1
J4
VDDR1#J4
A3
VDDR1#A3
L8
VDDR1#L8
J8
VDDR1#J8
M4
VDDR1#M4
N7
VDDR1#N7
N8
VDDR1#N8
R1
VDDR1#R1
R4
VDDR1#R4
T7
VDDR1#T7
J7
VDDR1#J7
T8
VDDR1#T8
V4
VDDR1#V4
V7
VDDR1#V7
V8
VDDR1#V8
AA1
VDDR1#AA1
AA4
VDDR1#AA4
AA7
VDDR1#AA7
AA8
VDDR1#AA8
N4
VDDR1#N4
AD4
VDDR1#AD4
K23
VDDR1#K23
K24
VDDR1#K24
L23
VDDR1#L23
AE16
LVDDR_25#AE16
AE17
LVDDR_25#AE17
AF15
LVDDR_18#AF15
AE15
LVDDR_18#AE15
AH19
LPVDD
AH13
TPVDD
AF13
TXVDDR#AF13
AF14
TXVDDR#AF14
N6
VDDRH1
F18
VDDRH0
AE20
A2VDD#AE20
AF21
A2VDD#AF21
AF23
A2VDDQ
AH23
AVDD
AE23
VDD1DI
AE22
VDD2DI
AK28
PVDD
A7
MPVDD
216TDDAKA11FH @M24
+3V
PCIE_VDDR_12#AG26
PCIE_VDDR_12#AK29
PCIE_VDDR_12#AJ30
PCIE_VDDR_12#AG28
PCIE_VDDR_12#AG27
PCIE_PVDD_12#N24
PCIE_PVDD_12#N23
PCIE_PVDD_12#P23
PCIE_PVDD_18#U23
PCIE_PVDD_18#T23
PCIE_PVDD_18#V23
PCIE_PVDD_18#W23
D10
2 1
BAT54
@M24
VDDC#AC13
VDDC#AD13
VDDC#AD15
VDDC#AC15
VDDC#AC17
VDD15#P8
VDD15#Y8
VDD15#Y23
VDD15#AC11
VDD15#AC20
VDD15#H20
VDD15#H11
VDD15#M23
VDDR3#AD7
VDDR3#AD19
VDDR3#AD21
VDDR3#AC22
VDDR3#AC8
VDDR3#AC21
VDDR3#AC19
VDDR4#AG7
VDDR4#AD9
VDDR4#AC9
VDDR4#AC10
VDDR4#AD10
VDDM#D9
VDDM#D13
VDDM#D19
VDDM#D25
VDDM#E4
VDDM#T4
VDDM#AB4
I/OP POWER
TPVSS
TXVSSR#AG14
TXVSSR#AH12
TXVSSR#AG13
A2VSSQ
MPVSS
AVSSQ
VSS1DI
AVSSN
LVSSR#AH17
LPVSS
LVSSR#AF18
VSSRH0
VSSRH1
LVSSR#AG15
LVSSR#AG18
A2VSSN#AH20
A2VSSN#AG21
VSS2DI
VCORE_VGA
*
PVSS
EC14
220uF
2.5V, +/-20%
CTX
@M24
AC13
AD13
AD15
AC15
AC17
P8
Y8
Y23
AC11
AC20
H20
H11
M23
AD7
AD19
AD21
AC22
AC8
AC21
AC19
AG7
AD9
AC9
AC10
AD10
AG26
AK29
AJ30
AG28
AG27
N24
N23
P23
U23
T23
V23
W23
D9
D13
D19
D25
E4
T4
AB4
AH12
AG14
AH14
AG13
AF22
A6
AJ28
AD22
AE24
AH22
AH17
AH18
AF18
F19
M6
AG15
AG18
AH20
AG21
AE21
2
VCORE_VGA
+1.2V
2
*
*
BC434
0.1uF
C0402
@M24
*
BC421
0.1uF
C0402
@M24
BC429
0.1uF
C0402
@M24
1
VSS#M16
VSS#N16
VSS#N15
VSS#P15
VSS#P16
VSS#R18
VSS#R17
VSS#R16
VSS#R15
VSS#R14
VSS#R13
VSS#R12
VSS#W15
VSS#V16
VSS#V15
VSS#U15
VSS#U16
CENTER
VDDC1#W16
VDDC1#M15
VDDC1#R19
VDDC1#T12
BC414
0.1uF
C0402
@M24
*
1
VSS#T13
VSS#T14
VSS#T15
VSS#T19
VSS#T18
VSS#T17
VSS#T16
BC435
0.1uF
C0402
@M24
VCORE_VGA
+1.5V
+3V
+3V
PCIE_VDDR
PVGA_1.2V
VGA_PCIE_1.8V
VCORE_VGA
VMEM_VGA
+1.5V
BC419
*
10uF
C0805
@M24
+3V
BC427
*
10uF
C0805
@M24
PCIE_VDDR
FB11
FB L0805 300 Ohm
2 1
*
@M24
Title
M24CSP-3
Document Number Re v
Date: Sheet
U11F
P17
VDDC#P17
P18
VDDC#P18
P19
VDDC#P19
U12
VDDC#U12
U13
VDDC#U13
U14
VDDC#U14
U17
VDDC#U17
U18
VDDC#U18
U19
VDDC#U19
V19
VDDC#V19
V18
VDDC#V18
V17
VDDC#V17
V14
VDDC#V14
V13
VDDC#V13
V12
VDDC#V12
N18
VDDC#N18
N17
VDDC#N17
N14
VDDC#N14
W17
VDDC#W17
W18
VDDC#W18
W19
VDDC#W19
W12
VDDC#W12
W13
VDDC#W13
W14
VDDC#W14
N13
VDDC#N13
N19
VDDC#N19
M19
VDDC#M19
M18
VDDC#M18
M12
VDDC#M12
N12
VDDC#N12
M13
VDDC#M13
M14
VDDC#M14
P12
VDDC#P12
P13
VDDC#P13
P14
VDDC#P14
M17
VDDC#M17
216TDDAKA11FH @M24
FB10
FB L0603 120 Ohm
2 1
@M24
BC420
*
0.1uF
C0402
@M24
BC428
*
0.1uF
C0402
@M24
BC433
*
10uF
C0805
@M24
S04 MAINBOARD
M16
N16
N15
P15
P16
R18
R17
R16
R15
R14
R13
R12
T13
T14
T15
W15
V16
V15
U15
U16
T19
T18
T17
T16
W16
M15
R19
T12
BC415
*
0.1uF
C0402
@M24
BC422
*
0.1uF
C0402
@M24
BC430
*
0.1uF
C0402
@M24
BC436
*
0.1uF
C0402
@M24
TECHNOLOGY COPR.
of
23 40 Monday, June 14, 2004
A
D12
1
BAT54S
3
2
D13
1
BAT54S
3
2
D14
1
BAT54S
3
2
D15
1
BAT54S
3
2
D16
1
BAT54S
3
2
D17
1
BAT54S
3
2
D18
1
BAT54S
3
2
SVIDEO_CONN1
5
6
6
9
9
3
3
7
7
5
5
4
8
1
2
2
MINI DIN 7
CRT_R_1
CRT_B_1
CRT_G_1
DDCCLK_1
DDCDAT_1
CRT_VS_1
CRT_HS_1
4
8
1
TV_CHROMA1
TV_LUMA1
BC464
82pF
*
C0603
50V, NPO, +/-5%
BC466
82pF
*
C0603
50V, NPO, +/-5%
CRT_B 11,21
CRT_G 11,21
CRT_R 11,21
L11
*
L0805 1.8uH
L12
*
L0805 1.8uH
+3V
D D
+5V
C C
+5V
B B
R567
150
R0402
+/-5%
4
R568
150
R0402
+/-5%
CRTVS_VGA 11,21
CRTHS_VGA 11,21
BC465
82pF
*
C0603
50V, NPO, +/-5%
BC467
82pF
*
C0603
50V, NPO, +/-5%
R569
150
R0402
+/-5%
DDCCLK 11,21
DDCDAT 11,21
TV_CHROMA
TV_LUMA
R570
150
R0402
+/-5%
DDCCLK
+3V
CRTVS_VGA
+3V
CRTHS_VGA
+3V
DDCDAT
+3V
R577
150
R0402
+/-5%
R579
150
R0402
+/-5%
R571
150
R0402
+/-5%
RHU002N06
RHU002N06
RHU002N06
RHU002N06
R578
150
R0402
+/-5%
R580
150
R0402
+/-5%
L29
Wave Filter
1 3
2
R572
150
R0402
+/-5%
Q15
DDCCLK2
3 1
2
Q16
3 1
2
Q17
CRT_VS2
3 1
2
Q18
3 1
2
TV_CHROMA 11,21
TV_LUMA 11,21
3
L30
Wave Filter
1 3
2
CRT_HS2
DDCDAT2
L31
Wave Filter
1 3
2
*
FB15
FB L0603 120 Ohm
2 1
FB16
FB L0603 120 Ohm
2 1
FB17
FB L0603 120 Ohm
2 1
FB18
FB L0603 120 Ohm
2 1
BC457
15pF
C0603
*
CRT_B_1
CRT_G_1
CRT_R_1
BC458
15pF
C0603
*
*
TV_LUMA TV_CHROMA TV_COMP1
3
2
1
D19
BAT54S
+3V +3V +3V
1
D20
BAT54S
5
4
3
2
1
BC459
15pF
C0603
BC460
22pF
C0402
3
2
VGA_CONN1
VGA15P
GND
ID0
B
G
R
17
BC461
*
22pF
C0402
2
CRTVDD2
*
VGA
SCL
15
GND
10
VSYNC
14
NC
9
HSYNC
13
GND
8
SDA
12
GND
7
ID1
11
GND
6
16
BC463
BC462
*
*
22pF
C0402
1
3
D21
BAT54S
22pF
C0402
2
D11
2 1
BC455
0.1uF
10V, X7R, +/-10%
C0402
RB751V-40
DDCCLK_1
CRT_VS_1
CRT_HS_1
DDCDAT_1
+5V
1
+3V
R566
10K
+/-5%
R0402
BC456
220pF
*
25V, NPO, +/-5%
C0402
R573
2.2K
R574
2.2K
R575
2.2K
R576
2.2K
CRT_SENSEJ 15
CRTVDD2
R0402
+/-5%
R0402
+/-5%
R0402
+/-5%
R0402
+/-5%
A A
TV_COMP1
5
BC468
82pF
*
C0603
50V, NPO, +/-5%
L13
*
L0805 1.8uH
BC469
82pF
*
C0603
50V, NPO, +/-5%
4
TV_COMP
R581
150
R0402
+/-5%
R582
150
R0402
+/-5%
TV_COMP 11,21
Title
TECHNOLOGY COPR.
VGA port/S-VIDEO
Document Number Re v
3
2
Date: Sheet
S04 MAINBOARD
1
24 40 Monday, June 14, 2004
A
of
5
4
3
2
1
R583
100K
+/-5%
R0402
3 1
+3V
Q20
RHU002N06
VIN
Q19
Si3456BDV
6
5
2
1
3
BC473
1nF
*
C0805
50V, NPO, +/-5%
BC824
0.1uF
*
C0805
4
R584
47
+/-5%
R0402
3 1
Q21
2
RHU002N06
TXLOUT1- 11,21
TXLOUT1+ 11,21
TXLCLKOUT- 11,21
TXLCLKOUT+ 11,21
EDIDCLK 11,21
EDIDDATA 11,21
2 1
FB20 FB L0805 300 Ohm
FB19
FB L0805 300 Ohm
TXLOUT1TXLOUT1+
TXLCLKOUTTXLCLKOUT+
VIN1
BC825
1uF
*
C0805
2 1
BC470
0.1uF
*
C0402
LCDVCC
BC826
0.1uF
*
C0805
R585
10K
+/-5%
R0402
2
MOSVCC_RUN
2
Q23
DTC144EUA
Dummy
1 3
+5V
D D
DTC144EUA
VGA_GPIO16 21
2
Q22
1 3
DISP_ON 11,21
C C
LCDVCC
LCDVCC
BC472
BC471
10uF
0.1uF
*
*
C0402
C0805
LCD_CONN1
Header_2X15_LCD
1
1
3
3
5
5
7
7
9
9
10
11
11
12
13
13
14
15
15
16
17
17
18
19
19
20
21
21
22
23
23
24
25
25
26
27
27
28
29
29
30
32
31
2
2
4
4
6
6
8
8
10
12
14
16
18
20
22
24
26
28
30
LCDVCC
BLON
PWM-ADJ
TXLOUT0- 11,21
TXLOUT0+ 1 1,21
TXLOUT2- 11,21
TXLOUT2+ 1 1,21
PWM-ADJ 28
B B
D22
VGA_BLON 11,21
A A
2 1
RB751V-40
FPBACKJ 15
+3V +3VALW
R590
10K
+/-5%
R0402
BLON LIDJ
2
Q24
DTC144EUA
1 3
LIDJ 19
D23
RB751V-40
2 1
R591
10K
+/-5%
R0402
R592
1K
R0402
+/-1%
MXLIDJ
BC484
0.1uF
*
10V, X7R, +/-10%
C0402
MXLIDJ 28
PWM-ADJ
BLON
BC481
0.1uF
*
10V, X7R, +/-10%
C0402
BC482
0.1uF
*
10V, X7R, +/-10%
C0402
TECHNOLOGY COPR.
Title
LCD CONN
Document Number Re v
5
4
3
2
Date: Sheet
S04 MAINBOARD
1
25 40 Monday, June 14, 2004
A
of
5
CODEC
D D
50V, NPO, +/-5%
AC_RESETJ 14,20
AC_BITCLK_AUD 14
AC_SYNC 14,20
AC_SDIN0 14
AC_BITCLK_AUD
BC704
22pF
*
50V, NPO, +/-5%
C0402
AC_SDOUT 14,20
PHONE 20
MIC1 27
MIC2 27
SPDIF 27
C C
B B
+3VM3E
R793
10K
+/-1%
R0603
BC660
Dummy
R794 0
R0603
Dummy
+/-5%
XTAL-24.576MHz
1 2
BC668
X5
22pF
*
C0402
R797 22 R0402
BEEP AOUTR
BC681 1uF C0603 10V, X5R, +/-10%
BC682 1uF C0603 10V, X5R, +/-10%
BC690 1uF C0603 10V, X5R, +/-10%
BC691 1uF C0603 10V, X5R, +/-10%
R795
10K
+/-1%
R0603
Dummy
BC669
22pF
*
50V, NPO, +/-5%
C0402
10nF
C0603
*
Dummy
*
*
*
*
CD_LINL
CD_GND
CD_LINR
CLK14_AUDIO 4
3
2
11
6
10
8
5
12
13
14
15
16
17
18
19
20
21
22
23
24
47
48
BC661
*
10uF
C0805
U31
XTL_OUT
XTL_IN
RESET#
BIT_CLK
SYNC
SDATA_IN
SDATA_OUT
PC_BEEP
PHONE
AUX_L
AUX_R
VIDEO_L
VIDEO_R
CD_L
CD_GND
CD_R
MIC1
MIC2
LINE_IN_L
LINE_IN_R
EAPD
SPDIF
4
*
25
38
1
9
AVdd1
AVdd2
DVdd1
DVdd2
AC97 CODEC
LQFP-48P
DVss1
DVss2
AVss1
AVss2
4
7
26
42
AUDGND
BC663
0.1uF
C0603
+5VA +3VM3E
*
AUDGND
LINE_OUT_L
LINE_OUT_R
MONO_OUT
ALC202A
HP_OUT_L
HP_OUT_R
BC664
10uF
16V, X5R, +/-10%
C1206
NC1
NC2
HP_COMM
GPIO0
GPIO1
CID0
CID1
VREFOUT
VREF
AFILT1
AFILT2
NC/CAP1
CAP2
35
36
37
33
34
AOUTL
39
40
41
43
44
R798 0 R0402+/-5% Dummy
45
R799 0 R0402+/-5% Dummy
46
28
27
29
30
31
32
BC694
1uF
*
C0603
3
*
HPSPKL+ 27
HPSPKR+ 27
VREFOUT 27
BC695
BC696
1uF
C0603
1nF
*
*
C0603
*
BC697
1nF
C0603
*
AUDGND
BC698
10uF
C1206
2
CD_LINL
BC657 1uF C0603
*
CD_LINR
BC658 1uF C0603
*
CD_GND
BC659 1uF C0603
*
R826
2.7K
R0402
Dummy
AUDGND
U30 MIC5205-5.0BM5
1
VIN
R796 10K
BC666
BC665
*
0.1uF
0.1uF
C0402
C0402
+3V +3VM3E
BC675
10uF
C0805
10V, X7R, +/-10%
3
R0402+/-5%
FB36 FB L0603 300 Ohm
*
FB37
FB L0805 300 Ohm
+5V
BC699
*
0.1uF
C0402
2 1
SHDN
*
BC676
0.1uF
C0402
2 1
AUDGND
R791
4.7K
R0402
AUDGND AUDGND
GND
2
*
BC700
*
10uF
C0805
VOUT
BYPASS/ADJ
BC677
0.1uF
C0402
*
BC701
0.1uF
C0402
R792
4.7K
R0402
BC667
C0402
R788 4.7K R0402
R789 4.7K R0402
R790 2.7K R0402
5
4
*
10nF
AUDGND AUDGND
+5VAA
BC702
*
0.1uF
C0402
1
RCDL 17
RCDR 17
CDGND 17
+5VA +5V
BC686
*
*
0.1uF
C0402
AUDGND
BC703
*
0.1uF
C0402
BC687
0.1uF
C0402
BC670
*
0.1uF
C0402
+5VAA
Amp
AOUTR
+5VAA
R803 100K R0402 Dummy
R804 100K R0402
A A
AUDGND
AUDGND
AOUTL
*
BC706 1uF
*
BC708 1uF R801
*
BC713 1uF
C0603
*
BC714 1uF
C0603
AUDIO_G0
AUDIO_G1
R807
R806
1K
+/-1%
R0402
AUDGND AUDGND
1K
+/-1%
R0402
Dummy
AUDGND AUDGND
5
U33
7
PVDD1
PVDD2
VDD
RHPIN
RLINEIN
RIN+
LIN+
LHPIN
LLINEIN
BYPASS
GAIN0
GAIN1
ROUT+
ROUT-
LOUT+
PC-BEEP
HP/LINE
SE/BTL
SHUTDOWN
AUDGND1
25
18
19
20
23
8
10
6
5
11
2
3
BC715
1uF
*
C0603
LOUT-
GND4
GND3
GND2
GND1
TPA0312
21
16
9
4
14
17
15
22
1
24
13
12
INSPKR+
INSPKR-
INSPKL+
INSPKL-
BC707 1uF
*
R802 0
4
BC710
220pF
C0603
1 3
*
BC711
*
220pF
C0603
SHUNDOWNJ 27
R805
R0603
Q94
DTC144EUA
2
BC712
220pF
C0603
AUDGND
100K
+/-1%
BC828
*
0.1uF
C0402
+5VAA
VOL_MUTE 28
3
BC709
*
*
220pF
C0603
*
SPEAKER_CONN1
Header_1X4
4
3
2
1
BC829
0.1uF
C0402
NC
6
NC
5
PCSPK 15
EC_BEEP 28
+3V
5 3
1
2
U34
NC7SZ86
2
NORMAL:LOW NORMAL:LOW
PCMSPKJ 38
4
Title
AUDIO ALC202A & AMP
Document Number Re v
Date: Sheet
+5VA
5 3
1
2
AUDGND
U32
NC7SZ86
4
S04 MAINBOARD
R800 10K
1
BEEP
R0603+/-1%
1K
+/-1%
R0402
AUDGND
TECHNOLOGY COPR.
of
26 40 Monday, June 14, 2004
BC705
0.1uF
*
C0402
A
5
4
3
2
1
VREFOUT 26
INT_MIC 38
D D
C C
B B
VREFOUT 26
MIC2 26
VREFOUT 26
MIC1 26
SHUNDOWNJ 26
Q95
2N7002
D S
AUDGND
*
AUDGND
G
R808
3.9K
+/-5%
R0603
BC718
0.1uF
C0402
2N7002
Q96
*
BC716 1uF C0603
R809
3.9K
R0603
+/-5%
2 1
R811
3.9K
+/-5%
R0603
AUDGND
+5VAA
D S
R812
100K
+/-1%
R0603
2 1
G
EXT_MIC INT_MIC
FB38
FB L0603 300 Ohm
BC717
220pF
C0603
FB39
FB L0603 300 Ohm
R813
100K
+/-1%
R0603
SENSEA_CON
*
AUDGND
*
AUDGND
BC720
220pF
50V, NPO, +/-5%
C0603
MIC2_CON
MIC1_CON
SPDIF 26
R810 0 R0402+/-5%
*
SENSEA_CON
BC830
*
0.1uF
C0402
BC831
0.1uF
C0402
MIC1_CON
EXT_MIC
MIC2_CON
HPSPKL+_CON
HPSPKR+_CON
+5V
*
BC719
0.1uF
C0402
AUDGND
BC721 0.1uF
C0603
*
SHORT10
1 2
JUMPER1
MIC_JACK1
1
2
6
3
4 7
5
JACK_AUDX1 Reverse
AUDIO_SPDIF_JACK1
5
4
2
3
1
7
8
9
Drive
IC
2F11TC1
25V, X7R, +/-10%
AUDGND
LED
8
AUDGND
6
10
AUDGND
FB40
HPSPKL+ 26
HPSPKR+ 26
A A
R816 10 R0402+/-5%
R817 10 R0402+/-5%
EC20 150uF CTX 4V, +/-20%
*
EC21 150uF CTX 4V, +/-20%
*
R818
33K
+/-5%
R0603
R819
33K
+/-5%
R0603
FB L0603 300 Ohm
2 1
FB41
FB L0603 300 Ohm
2 1
BC722
470pF
*
C0603
*
AUDGND
HPSPKL+_CON
HPSPKR+_CON
BC723
470pF
C0603
TECHNOLOGY COPR.
Title
MIC Jack & AUDIO Jack
Document Number Re v
5
4
3
2
Date: Sheet
S04 MAINBOARD
1
27 40 Monday, June 14, 2004
A
of
5
HWPG
R595 10K
R0402 +/-5%
D D
C C
B B
A A
Dummy
+3VALW
1 3
+3VALW
1 3
D25
1SS355
HOLDJ
D26
1SS355
R600
10K
R0402
+/-5%
Dummy
PCLK_591
R604
33
+/-5%
R0402
BC489
*
10pF
C0603
TPCLK 29
TPDATA 29
NUMLEDJ 19
FB23 FB L0603 300 Ohm
Dummy
R593 100K
R0402 +/-5%
Q26
DTA124EUA
MDC_RINGJ
2
Q27
DTA124EUA
NBSWONJ
2
2 1
2 1
EC_BEEP 26
DNBSWONJ 15
SAVE_POWER_M24
EC_BEEP 26
VRON 31,36
+5V
RN9
10K
8P4R0603
+/-5%
2 1
*
HWID
R596 10K
R0402 +/-5%
MMBT3904
SUSBJ
ACIN
ACIN 39
+3VALW
R605
470K
+/-1%
R0603
591RESET 591RESETJ
R831 0 R 0402+/-5% Dummy
D33 RB751V-40 Dummy
R832 0 R 0402+/-5% Dummy
R833 0 R 0402+/-5%
R608 0 R 0402+/-5%
*
135
7 8
SAVE_POWER_M24
642
REF3V +3VALW
BC497
4.7uF
10V, Y5V, +80%/-20%
C0805
5
DNBSWONJ 15
Q25
GATEA20 14,16
+3VALW
B
BC487
E C
C0603
D27 RB751V-40
D28 RB751V-40
RCINJ 14,16
SCIJ 15,16
D31
1SS355
SERIRQ 15,16,38
KBSMIJ 15,16
2 1
D56
RB751V-40
Dummy
2.2nF
*
LFRAMEJ/FWH4 14
2 1
D32 RB751V-40
R834
0 R0402+/-5%
2 1
2 1
LAD0/FWH0 14
LAD1/FWH1 14
LAD2/FWH2 14
LAD3/FWH3 14
PCLK_591 4
2 1
CHA_OFF 39
MBAT_PRESJ 39
4
MBCLK 5,39
MBDATA 5,39
MBATV 39
SUSCJ 15
HWPG 35,36
CC_SET 39
CV_SET 39
VFAN 30
CLKRUNJ 15,16,20,38
2 1
D30 RB751V-40
SERIRQ
2 1
MDC_RINGJ 20
FANSIG 30
LAN_PME_591J 38
TEMP_ALERTJ 5
SUSBJ 15
PCIRSTJ 15,20,38
REFON 39
NBSWONJ 19
PWM-ADJ 25
MAINON 20,32,33,34
SUSON 15,32,34
3VAUX_EN 33
4
MBCLK
SBCLK
MBDATA
SBDATA
MBATV
HWID
SUSCJ
HWPG
DP/AD8
DN/AD9
CC-SET
CV-SET
VFAN
MX0 29
MX1 29
MX2 29
MX3 29
MX4 29
MX5 29
MX6 29
MX7 29
MY0 29
MY1 29
MY2 29
MY3 29
MY4 29
MY5 29
MY6 29
MY7 29
MY8 29
MY9 29
MY10 29
MY11 29
MY12 29
MY13 29
MY14 29
MY15 29
LAD0/FWH0
LAD1/FWH1
LAD2/FWH2
LAD3/FWH3
PCLK_591
LFRAMEJ/FWH4
LPCPDJ
KBSMIJ591
HOLDJ
MDC_RINGJ
FANSIG
LAN_PME_591J
TEMP_ALERTJ
SUSBJ
PCIRSTJ
REFON
DNBSWONJ591
NBSWONJ
SUSPEND_LEDJ
MAINON
SUSON
3VAUX_EN
MBAT_PRESJ
NUMLEDJ
MX0
MX1
MX2
MX3
MX4
MX5
MX6
MX7
MY0
MY1
MY2
MY3
MY4
MY5
MY6
MY7
MY8
MY9
MY10
MY11
MY12
MY13
MY14
MY15
CLKRUNJ
KBC
HOST
ICU
MIWU
PWM
MSWC
PS2 I/F
*
*
*
*
3
CLOCKS
CLKOUT/SIOCLKIN/IOPC7
BIU & DSS
3
U13 P C87591L
163
SCL1/IOPB3
169
164
170
81
82
83
84
87
88
89
90
93
94
99
100
101
102
71
72
73
74
77
78
79
80
49
50
51
52
53
56
57
58
59
60
61
64
65
66
67
68
25
15
14
13
10
18
31
24
19
23
22
26
29
172
176
30
44
165
175
171
32
33
36
37
38
39
40
43
41
42
54
55
168
110
114
116
118
111
115
117
119
+3VALW
5
6
8
9
7
2
ACCESS
SCL2/IOPC1
BUS
SDA1/IOPB4
I/F
SDA2/IOPC2
AD0
AD1
AD2
AD3
ANALOG
AD4/IOPE0
I/F
AD5/IOPE1
AD6/IOPE2
AD7/IOPE3
AD8/DP
AD9/DN
DA0
DA1
DA2
DA3
KBSIN0
KBSIN1
KBSIN2
KBSIN3
KBSIN4
KBSIN5
KBSIN6
KBSIN7
KBSOUT0
KBSOUT1
KBSOUT2
KBSOUT3
KBSOUT4
KBSOUT5
KBSOUT6
KBSOUT7
KBSOUT8
KBSOUT9
KBSOUT10
KBSOUT11
KBSOUT12
KBSOUT13
KBSOUT14
KBSOUT15
CLKRUN#/EXWINT46/IOPE7
GA20/IOPB5
KBRST#/IOPB6
LAD0
LAD1
LAD2
LAD3
LCLK
ECSCI#/IOPD3
LDRQ#
LFRAME#
LPCPD#/EXWINT45/IOPE6
LRESET#
PWUREQ
SERIRQ
SMI#
EXWINT20/RI1#/IOPD0
EXWINT21/RI2#/IOPD1
EXWINT22/TB1/IOPC4
EXWINT23/TB2/IOPC6
EXWINT24/IOPD2
EXWINT40/IOPE5
PFAIL#/RING#/IOPB7
TA2/IOPC5
TA1/IOPC3
SWIN/IOPE4
PWM0/IOPA0
PWM1/IOPA1
PWM2/IOPA2
PWM3/IOPA3
PWM4/IOPA4
PWM5/IOPA5
PWM6/IOPA6
PWM7/IOPA7
IOPD4
IOPD5
IOPD6
IOPD7
IOPC0
PSCLK1/IOPF0
PSCLK2/IOPF2
SCLK3/IOPF4
PSCLK4/IOPF6
PSDAT1/IOPF1
PSDAT2/IOPF3
PSDAT3/IOPF5
PSDAT4/IOPF7
BC496 0.1uF
C0402
BC498 0.1uF
C0402
BC499 0.1uF
C0402
BC500 0.1uF
C0402
32KCLKIN/32KX1
32KX2
A0/ENV0/IOPH0
A1/ENV1/IOPH1
A2/BADDR0/IOPH2
A3/BADDR1/IOPH3
A4/TRIS/IOPH4
A5/SHBM/IOPH5
A6/IOPH6
A7/IOPH7
A8/IOPK0
A9/IOPK1
A10/IOPK2
A11/IOPK3
A12/IOPK4
A13/BE0/IOPK5
A14/BE1/IOPK6
A15/CBRD/IOPK7
A16/IOPL0
A17/IOPL1
A18/IOPL2
A19/IOPL3
D0/IOPI0
D1/IOPI1
D2/IOPI2
D3/IOPI3
D4/IOPI4
D5/IOPI5
D6/IOPI6
D7/IOPI7
D8/IOPM0
D9/IOPM1
D10/IOPM2
D11/IOPM3
D12/IOPM4
D13/IOPM5
D14/IOPM6
D15/IOPM7
RD#/IOPJ0
WR0#/IOPJ1
SELIO#
WR1#/IOPL4
BRKL#_RSTO#/IOPJ7
BST0/IOPJ2
BST1/IOPJ3
BST2/IOPJ4
PFS#/IOPJ5
PLI/IOPJ6
TINT#
SEL0#
SEL1#
URXD/IOPB0
USART
UTXD/IOPB1
USCLK/IOPB2
AGND
AVCC
POWER &
GROUND
VBAT
NC
CLK
TCK
TDO
TMS
GND
GND
GND
GND
GND
GND
GND
VCC
VCC
VCC
VCC
VCC
VCC
VDD
NC1
NC2
NC3
NC4
NC5
NC6
NC7
NC8
NC9
NC10
2
591_32KX1
158
591_32KX2
160
47
PWROK_1
1
ENV0
124
ENV1
125
BADDR0
126
BADDR1
127
TRIS
128
SHBM
131
A6
132
A7
133
A8
143
A9A9
142
A10
135
A11
134
A12
130
A13
129
A14
121
A15
120
A16
113
A17
112
A18
104
103
D0
138
D1
139
D2
140
D3
141
D4
144
D5
145
D6
146
D7
147
148
149
155
156
3
4
27
28
RDJ
150
WRJ
151
152
48
CAPSLEDJ
76
62
63
MXLIDJ
69
BATLOWJ591
70
ACIN
75
106
108
TDI
107
105
109
173
174
MBATLED1J
153
MBATLED0J
154
PWR_LEDJ
162
96
95
17
35
46
122
137
159
167
161
34
45
123
136
157
166
16
11
12
20
21
85
86
91
92
97
*
98
RB751V-40
R599 0
R603 0
TCK-591
TDI-591
TDO-591
TINTTMS-591
CSJ
*
*
BC493
0.1uF
*
10V, X7R, +/-10%
C0402
BC494
1uF
10V, X5R, +/-10%
C0603
Dummy
D24
2 1
Dummy
R0402+/-5%
CAPSLEDJ 19
R0402+/-5%
MBATLED1J 29
MBATLED0J 29
PWR_LEDJ 19
BC490
0.1uF
C0402
VCCRTC
BC491 0.1uF C0402
BC492
0.1uF
10V, X7R, +/-10%
C0402
+3V
RF_ENABLE 20
RSMRSTJ 15
VOL_MUTE 26
SWIJ 15,16
SUSOK 15,35
MXLIDJ 25
R594 1K
R0402 +/-1%
REF3V
*
+3VALW
PWROK 15
+3VALW
BC488
0.1uF
*
10V, X7R, +/-10%
C0402
2 1
D29 RB751V-40
591_32KX1
+3V
591_32KX2
ENV0
ENV1
BADDR0
BADDR1
TRIS
SHBM
A6
A7
A8
A9A9
A10
A11
A12
A13
A14
A15
A16
A17
CSJ
RDJ
A18
WRJ
BATLOWJ 1 5,16
CONN1
10
11
10
11
9
9
8
8
7
7
6
6
5
5
4
4
3
3
2
2
1
1
Header_1X10
Dummy
+3VALW
R609 10K R0402+/-5%
R610 10K R0402+/-5%
SBCLK
R614 4.7K R0402 +/-5%
SBDATA
R616 4.7K R0402 +/-5%
MBCLK
R618 4.7K R0402 +/-5%
MBDATA
R620 4.7K R0402 +/-5%
ENV1
R612 10K R0402 +/-5%
BADDR0
R613 10K R0402 +/-5% Dummy
BADDR1
R615 10K R0402 +/-5% Dummy
LPCPDJ
R617 10K R0402 +/-5%
SHBM
R619 10K R0402 +/-5%
R597
20M R0603
R598
120K R0603
TINT-
TCK-591
TDO-591
TDI-591
Z3009
TMS-591
+/-5%
+/-5%
BIOS_CONN1
32
VCC
12
A0
11
A1
10
A2
9
A3
8
A4
7
A5
6
A6
5
A7
27
A8
26
A9
23
A10
25
A11
4
A12
28
A13
29
A14
3
A15
2
A16
30
A17
22
CE
24
OE
1
VPP
31
PGM
16
GND
PLCC-32-SKT
R606 10K
R0402 +/-5%
R607 10K
R0402 +/-5%
1
4 1
O0
O1
O2
O3
O4
O5
O6
O7
Dummy
Dummy
TEMP_ALERTJ
LAN_PME_591J
+3VALW
BC485 4.7pF
C0402
2 3
X4
XTAL-32.768kHz
BC486 4.7pF
C0402
13
14
15
17
18
19
20
21
U35
SST39VF040
+3VALW
ENV1
+3VALW
*
*
D0
D1
D2
D3
D4
D5
D6
D7
TECHNOLOGY COPR.
Title
PC87591L & FLASH
Document Number Re v
2
Date: Sheet
S04 MAINBOARD
1
28 40 Monday, June 14, 2004
A
of
PC87591 & FLASH
PC87591 & FLASH
5
4
3
2
1
KEY BOARD
TOUCH PAD
BC501 4.7uF
BC508
10pF
C0603
Dummy
C0805
BC502 0.1uF
C0402
5VTP
+3V
+3VALW
BC511
0.1uF
C0402
*
*
TOUCHPAD_CONN1
1
1
2
2
3
3
4
4
5
5
WLAN_2P4_LEDJ 19
WLAN_5_LEDJ 19
WLAN_ACTIVE 20
MBATLED0J 28
MBATLED1J 28
*
6
6
7
7
8
8
9
9
10
10
11
11
12
12
FPC CONN_12P
KB_CONN1
D D
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
SHIELD1
SHIELD2
C C
RN10
MX3
1
MX0
2
3
MX7
4
B B
A A
5
8.2K 10P8R0603+/-5%
10
MX2
9
MX1 MX6
8
MX5
7
MX4
6
FPC_FFC CONN 24P
+5V
MX1
MX7
MX6
MY9
MX4
MX5
MY0
MX2
MX3
MY5
MY1
MX0
MY2
MY4
MY7
MY8
MY6
MY3
MY12
MY13
MY14
MY11
MY10
MY15
BCN2
24 31
8
8P4R0603
220pF
50V, NPO, +/-10%
BCN4
24 31
8
220pF
8P4R0603
50V, NPO, +/-10%
BCN6
24 31
8
8P4R0603
220pF
50V, NPO, +/-10%
MX1 28
MX7 28
MX6 28
MY9 28
MX4 28
MX5 28
MY0 28
MX2 28
MX3 28
MY5 28
MY1 28
MX0 28
MY2 28
MY4 28
MY7 28
MY8 28
MY6 28
MY3 28
MY12 28
MY13 28
MY14 28
MY11 28
MY10 28
MY15 28
MX2
MY0
MX5
MX4
MY15
MY10
MY11
MY14
MY8
MY7
MY4
MY2
BCN3
*
576
*
576
BCN7
*
576
BCN5
24 31
8
8P4R0603
220pF
50V, NPO, +/-10%
24 31
8
8P4R0603
220pF
50V, NPO, +/-10%
24 31
8
8P4R0603
220pF
50V, NPO, +/-10%
MY9
MX6
MX7
MX1
MX0
MY1
MY5
MX3
MY13
MY12
MY3
MY6
1
2
3
4
5
6
7
8
9
25
26
*
576
*
576
*
576
+5V
TPDATA 28
TPCLK 28
FB24
FB L0805 300 Ohm
FB25
FB L0603 300 Ohm
2 1
2 1
FB26
FB L0603 300 Ohm
BC507
10pF
C0603
Dummy
2 1
*
*
5
Title
TECHNOLOGY COPR.
KB & TOUCHPAD
Document Number Re v
4
3
2
Date: Sheet
S04 MAINBOARD
1
29 40 Monday, June 14, 2004
A
of
5
4
MOSVCC_RUN
3
2
1
+5V
Q29
D D
TEMP_OVTJ 5
VFAN 28
C C
B B
DTA124EUA
2
R634 820
R0603+/-5%
BC518
10V, Y5V, +80%/-20%
10uF
C0805
1 3
R635
10K
*
+/-1%
R0603
R637
3K
+/-5%
R0603
BC517
0.1uF
*
25V, X7R, +/-10%
C0603
U15
1
OUT1
2
IN1-
3
IN1+
OUT2
IN2+
4
V-
LM358M
R636 2K
R0603 +/-5%
BC519
10uF
C0805
10V, Y5V, +80%/-20%
8
V+
7
5
6
IN2-
BC520
*
1nF
*
C0402
FANSIG 28
3
R633
1K
+/-1%
R0603
2
Q31
DTC144EUA
+5V
1 3
65241
Q30
Si3456BDV
+5V_FAN
BC521
1nF
*
50V, X7R, +/-10%
C0402
R638 10K R0402+/-5%
FAN_CONN1
1
NC
2
345
NC
Header_1X3
+3V
A A
TECHNOLOGY COPR.
Title
CPU FAN
Document Number Re v
5
4
3
2
Date: Sheet
S04 MAINBOARD
1
30 40 Monday, June 14, 2004
A
of
5
4
3
2
1
+5V
R840
R843
100K
+/-5%
R0402
*
10
+/-5%
R0603
MAX1987_VCC
1987_CKENJ
MAX1987_SUS
H_DPSLPJ_PW
MAX1987_PSI
MAX1987_SHDNJ
MAX1987_CCV
MAX1987_REF
MAX1987_ILIM
MAX1987_TIME
R858
28K
+/-1%
R0603
D S
G
*
R932
10K
+/-5%
R0402
BC744
1uF
C0603
12
22
23
24
30
29
28
27
26
25
43
44
21
14
10
11
31
Q101
2N7002
8
7
6
3
4
5
9
2
1
U16
VCC
SYSPOK
IMVP_OK
CLK_EN
D0
D1
D2
D3
D4
D5
S2
S1
S0
B0
B1
B2
SUS
DPSLP
PSI
SHDN
TON
CCV
REF
ILIM
TIME
DD0
H_DPSLPJ_PW
THERMALPAD
MAX1987
49
4
VDD
BSTM
DHM
LXM
DLM
PGND
GND
CMP
CMN
OAIN+
OAIN-
NEG
POS
CSP
CSN
BSTS
DHS
DLS
FB
CCI
LXS
V+
36
42
1987_BSTM
32
34
33
35
37
13
45
46
20
19
1987_FB
18
16
1987_CCI
17
15
48
47
BST2
41
39
40
38
VCORE_CPU
*
2 1
MAX1987_CMP
MAX1987_OAIN+
R848
+/-5%
4.7K R0402
BC748
470pF
*
C0603
MAX1987_POS
MAX1987_CSP
D59
2 1
RB751V-40
C1
330uF
*
CTX
D57
RB751V-40
C2
330uF
CTX
+3V
D D
R841
R842
100K
100K
+/-5%
+/-5%
R0402
R0402
VCCP_HWPG 36
IMVP_PWG 7,15
CKGEN_ENJ 4
R845 0 R0402+/-5%
CPU_VID0 6
CPU_VID1 6
CPU_VID2 6
CPU_VID3 6
CPU_VID4 6
CPU_VID5 6
SUSPEND MODE=0.748V
C C
DPRSLPVR 15
B B
A A
BOOT MODE=1.196V
R921 0 R0402+/-5%
R851 0 R0402+/-5%
PSIJ 6
R855 0 R0402+/-5%
VRON 28,36
BC753 270pF C 0402
BC754 0.22uF C0603
H_DPSLPJ 5,14
TON FLOAT = 300K Hz
*
*
R856
301K
+/-1%
R0603
BC757
R859
49.9K
100pF
C0402
+/-1%
R0603
+3V
R931
10K
+/-5%
R0402
H_DPSLP_1
D S
Q102
2N7002
G
5
BC738
*
2.2uF
C0603
LX_VCORE
DH_VCORE
DL_VCORE
BC747
4.7nF
C0603
R850
*
1.5K
+/-5%
R852
R0402
1M
+/-5%
R0402
BC755 0.1uF C0805
DH_VCORE2
LX_VCORE2
DL_VCORE2
C3
330uF
*
*
CTX
VIN_CPU
BC745
0.1uF
C0805
*
MAX1987_OAIN-
R853
2.74K
+/-1%
R0603
+5V
*
C4
330uF
*
CTX
3
C5
330uF
CTX
R854
100K
+/-5%
R0402
VIN
PH5330E
FB30
FB L0805 300 Ohm
FB31
FB L0805 300 Ohm
Q97 PH5330E
4
G
Q99
4
G
S1S2S
2 1
2 1
Q32
PHK24NQ04LT
5
D
S1S2S
5
D
3
3
Q100
PH5330E
4
4
4
4
VIN_CPU
876
G
G
2
VIN_CPU
*
876
5
D
G
S
123
5
Q98 PH5330E
D
G
S1S2S
3
5
Q36
PHK24NQ04LT
D
S
123
5
D
S1S2S
3
BC743
BC739
*
1uF
0.1uF
C0805
C0805
VCORE_CPU
R846
2m
R2512
+/-5%
VCORE_CPU
R861
1K
+/-1%
R0402
It should be close
to max1987's pin
R863
1K
+/-1%
R0402
BC740
*
2.2nF
C0805
2 1
BC522
10uF
C1210
2 1
D35
B320B
*
D34
B320B
L16 0 .5uH
1
BC523
10uF
C1210
L15 0.5u H
3
2
BC524
BC525
*
10uF
C1210
3
2
*
*
10uF
C1210
1
R847
2m
R2512
+/-5%
R860
750
+/-1%
R0603
R862
750
+/-1%
R0603
TECHNOLOGY COPR.
Title
CPU POWER
Document Number Re v
Date: Sheet
S04 MAINBOARD
1
of
31 40 Monday, June 14, 2004
A
5
+5VALW +5 VSUS +3VSUS MOSVCC
4
3
2
1
R666
1M
+/-5%
D D
SUSONJ 34
SUSON 15,28,34
C C
MAINON 20,28,33,34
B B
R0603
SUSONJ
2
Q38
DTC144EUA
1 3
+5VALW +5V +3V +2.5V +1.8V +1.5V MOSVCC_RUN
R670
1M
+/-5%
R0603
MAINONJ
2
Q42
DTC144EUA
1 3
R667
270
+/-5%
R0603
D S
Q39
G
2N7002
R671
270
+/-5%
R0603
D S
Q43
G
2N7002
R668
110
+/-5%
R0603
D S
Q40
G
2N7002
R672
110
+/-5%
R0603
D S
Q44
G
2N7002
R669
10K
+/-1%
R0603
SUSD 33,36
D S
Q41
G
2N7002
R673
63.4
+/-1%
R0603
D S
Q45
G
2N7002
BC543
1nF
*
50V, X7R, +/-10%
C0603
G
R674
32.4
+/-1%
R0603
@M24
D S
Q46
2N7002
@M24
R675
23.2
+/-1%
R0603
D S
Q47
G
2N7002
R676
10K
+/-1%
R0603
MAIND 33,35,36,37
D S
Q48
G
2N7002
BC544
1nF
*
50V, X7R, +/-10%
C0603
A A
TECHNOLOGY COPR.
Title
Discharge
Document Number Re v
5
4
3
2
Date: Sheet
S04 MAINBOARD
1
32 40 Monday, June 14, 2004
A
of
5
VIN
main Li+ battery 3S2P: 9v to 12.6V;
8
D2
S2
123
MOSVCC
BC565
4.7uF
*
C1206
7
D2
S4,10V
VIN_SYSTEM
6
D1
D D
BC766
BC767
0.1uF
C0603
C6
100uF
CTX
U18 MAX1683
3
D41
1
2
BAT54C
NC
4
NC
BC768
*
10uF
C1210
2
1 2
SGND2
C+5IN
OUT
C-
GND
1
3
5
*
NEW COMP
L17 3.1u H
SHORT7
JUMPER1
4
2
VCCRTC +3VALW
5VAUX
*
4 3
1
BC564
4.7uF
C0805
*
0.1uF
C0603
3VAUX
*
C C
B B
A A
short2
C7
330uF
CTX
MAX1683_C+
BAT
3VAUX_BF
*
BC563
*
4.7uF
C0805
BATT_1
R700
1K
+/-1%
R0402
CMOSBAT_CONN1
125
3
Wire To Borad_3
4 5
D1
G1G2S1
R865
4.7
+/-5%
R0805
3VAUX_EN 28
R697
200K
R0603
+/-5%
R0402
+/-5%
Q50
FDS6982S
R698
100
4
BC770
0.1uF
C0603
SGND2
S D
D S
Q56
2N7002
G
4
BC761
*
4.7uF
C1206
SGND2 SGND2
*
BC774
0.1uF
R869
33.2K
R8700+/-5%
R8720+/-5%
R8732K+/-5%
R876
220K
+/-5%
R0603
SGND2
Q53
Si2301DS
G
R699 0
R0402 +/-5%
BC762
*
0.1uF
C0603
R867
4.7
C0402
Dummy
*
+/-1%
R0603
Dummy
R0402
R0402
R0402
*
MOSVCC_RUN1
MAX1999_V+
+/-5%
R0603
MAX1999_BST3
MAX1999_DH3
MAX1999_DL3
+3VALW
BC495
*
10uF
C0805
R696 0
R0603 +/-5%
MAINON 20,28,32,34
VCC_1999
MAX1999_LX3
MAX1999_FB3
MAX1999_ON3
MAX1999_ON5
BC777
4.7uF
C0805
MOSVCC_RUN MOSVCC
*
BC758
*
1uF
C0805
SGND2
20
17
1
28
26
27
24
22
7
3
4
25
MAX1999_SKIPJ
R874
0
+/-5%
R0402
Dummy
SGND2
BC566
1uF
C0805
3
BST3_5VALW
U17
V+
VCC
NC
BST3
DH3
LX3
DL3
OUT3
FB3
ON3
ON5
LDO3
MAX1999
R875
0
+/-5%
R0402
VCC_1999
3
R864
47
+/-5%
R0603
SKIP
12
+5VALW
3
D36
BAW56
2
1
BST5_5VALW
18
LDO5
14
BST5
16
DH5
15
LX5
19
DL5
21
OUT5
9
FB5
10
PRO
11
ILIM5
5
ILIM3
8
REF
13
TON
23
GND
2
PGOOD
SHDN
6
MAX1999_SHDNJ
R882
10K
+/-5%
R0402
VCCRTC
SUSD 32,36 SUSD 32,36
MAIND 32,35,36,37
BC567
0.1uF
10V, X7R, +/-10%
C0402
*
MAX1999_BST5
MAX1999_DH5
MAX1999_LX5
MAX1999_DL5
MAX1999_FB5
MAX1999_PROJ
MAX1999_ILIM5
MAX1999_ILIM3
MAX1999_TON
R879
10K
+/-5%
R0402
+3VSUS
*
BC759
10uF
C0805
R866
BC568
0.1uF
*
10V, X7R, +/-10%
C0402
2
BC760
*
1uF
C0603
+/-5%
R0603
SGND2
R868
0
+/-5%
R0603
*
4.7
REF_1999
BC775
1uF
C0805
AUXPWG
*
SGND2
ILIM3 and ILIM5: 1.15V;
F=400k/500khz
Q54
4
G2
S2
3
2
G1
1
S1
Si9936BDY
2
1
VIN
FB57 FB L0805 300 Ohm
D2
D2
D1
D1
BC769
0.1uF
C0603
5
6
7
8
FB58 FB L0805 300 Ohm
Q49
8
Si4410DY
D5D6D7D
S1S2S3G
4
Q52
8
Si4410DY
D5D6D7D
S1S2S3G
4
R871
100K
BC776
0.1uF
*
MAX1999_ILIM5
MAX1999_ILIM3
MAX1999_PROJ
MAX1999_TON
MAIND 32,35,36,37
10V, X7R, +/-10%
2 1
2 1
L18 4.7uH
2 1
+/-1% R 0603
Dummy
C0402
Dummy
BC569
0.1uF
C0402
D39
B140
R877
60.4K
+/-1%
R0603
R883
18K
+/-1%
R0603
*
BC549
*
10uF
C1210
*
5VAUX_BF
*
*
R878
60.4K
+/-1%
R0603
R884
18K
+/-1%
R0603
+5VSUS +5V +3VSUS +3V
BC570
0.1uF
*
10V, X7R, +/-10%
C0402
BC764
0.1uF
C0603
C8
220uF
10V, +/-20%
CTX
SGND2
Q55
4
3
2
1
Si9936BDY
VIN_SYSTEM
BC765
*
0.1uF
C0603
G2
S2
G1
S1
TECHNOLOGY COPR.
Title
System power
Document Number Re v
Date: Sheet
S04 MAINBOARD
1
33 40 Monday, June 14, 2004
*
R880
0
+/-5%
R0402
Dummy
R885
0
+/-5%
R0402
short1
BC771
0.1uF
C0402
VCC_1999
5
D2
D2
6
7
D1
D1
8
of
5VAUX
R881
0
+/-5%
R0402
Dummy
R886
0
+/-5%
R0402
5VAUX 3VAUX
A
5
D D
4
3
2
1
BC778
10nF C0402
*
14
U19
13
BC779
*
R888
100K
+/-5%
R0402
R895
184K
+/-1%
R0603
22uF
C1206
MAX8550_OVP_UVP
R891
0
+/-5%
R0402Dummy
MAX8550_POK1
MAX8550_POK2
MAX8550_SKIPJ
MAX8550_SS
MAX8550_REF
MAX8550_ILIM
VTT_MEM
EC29
C C
M_VREF
SKIP#=AVdd: PWM
SKIP#=GND: Skip mode
B B
TON=open: 300KHz
TON=GND: 600KHZ
FB=AVdd: 1.8V Output
FB=GND: 2.5V output
47uF
*
4V, +/-20%
CTB
BC782
*
1uF
C0603
R892
+/-5%
R0402
R894
+/-5%
R0402
Dummy
EC30
47uF
*
4V, +/-20%
CTB
MAX8550_AVDD
R889
100K
0
+/-5%
R0402
R893 0 +/-5% R 0402
0
R890
100K
+/-5%
R0402
*
*
R896
20K
+/-1%
R0603
BC787
3.9nF
C0603
BC789
0.22uF
C0603
R897
100K
+/-1%
R0603
12
11
10
25
24
15
16
9
2
5
6
1
8
3
4
VTTI
VTT
VTTS
PGND2
VTTR
OVP/UVP
POK1
POK2
SKIP#
TON
GND
SS
+2.0V
REF
ILIM
FB
OUT
MAX8550
REFIN
AVDD
PGND1
SHDNA#
SHDNB#
THERMALPAD
29
VDD
STBY
BST
MAX8550_AVDD
26
22
17
VIN
MAX8550_BST
20
19
LX
18
DH
21
DL
23
27
28
7
MAX8550_STBY
VDIMM_BF
R887
10
+/-5%
R0402
BC786
2 1
0.22uF
*
10V, X7R, +/-10%
C0603
MAX8550_DH
MAX8550_LX MAX8550_TON
MAX8550_DL
SUSON 15,28,32
MAINON 20,28,32,33
BC780
1uF
10V, X5R, +/-10%
C0603
*
BC781
4.7uF
C0805
*
D44
B120
876
G
4
123
R930 10K
+/-5% R 0402
R933 0
+/-5% R 0402
VDIMM
SHORT8
1 2
JUMPER1
*
C10
150uF
4V, +/-20%
CTX
BC577
4.7uF
C1206
VIN
2 1
*
VDIMM_BF
C9
150uF
*
4V, +/-20%
CTX
FB59
FB L0805 300 Ohm
VIN_MEM
BC582
1uF
*
10V, X5R, +/-10%
C0603
short3
5VAUX
BIAS
SUPPLY
*
BC575
5
D
Q58
PHK24NQ04LT
S
L19 1.8uH
*
876
5
D
Q60
G
4
PHK24NQ04LT
S
123
+3VSUS
SUSONJ 32
0.1uF
C0603
BC576
0.1uF
C0603
*
Vilim(min)=10*Ioutmax*(1-LIR/2)*Rdsonlow25c*1.25
=10*6*0.85*7.5*1.25
A A
=478.125MV
Vilim_rating=478.125*1.15=549.84375MV
R895=(2V-0.3*Vilim_rating)/10=183.5Kohm;
R896||R897=2V/10u-183.5K=16.5Kohm;
R896=19.8Kohm;
R897=98.3Kohm
5
4
L19=Vout*(Vin-Vout)/(Vin*fsw*Imax*LIR)
L19max=2.5*(19-2.5)/(19*600K*6*0.3)
=2.01uH
L19min=2.5*(9-2.5)/(9*600K*6*0.3)
=1.67uH
3
Title
TECHNOLOGY COPR.
VDIMM&VTT_MEM
Document Number Re v
2
Date: Sheet
S04 MAINBOARD
1
34 40 Monday, June 14, 2004
A
of
5
4
3
2
1
0
R900
+3V
2.2
D46
1SS355
@M24
+/-5%
R0805
R929
10K
+/-5%
R0402
5VAUX
2 1
BST_5V
@M24
HWPG 28,36
BC798
0.1uF
C0603
*
@M24
BC791
*
4.7uF
C0805
@M24
MAIND 32,33,36,37
Q64
PH5330E
@M24
4
G
Q66
PH5330E
@M24
4
G
VIN
FB60
FB L0805 300 Ohm
@M24
2 1
5
BC794
*
1nF
D
C0603
@M24
S1S2S
3
5
D
2 1
S1S2S
3
PH5330E: 30V-85A-7.5mohm
Iilim=79mV>(Iloadmax-0.15Iloadmax)*Rdaon
=(10-0.15*10)*7.5
=63.75;
L21=Vout*(Vin-Vout)/(Vin*fsw*Imax*LIR)
L21max(1.2)=1.2*(19-1.2)/(19*600K*10*0.3)
=0.625uH
L21min(1.2)=1.2*(9-1.2)/(9*600K*10*0.3)
=0.578uH
L21max(1.0)=1*(19-1)/(19*600K*10*0.3)
=0.526uH
L21min(1.0)=1*(9-1)/(9*600K*10*0.3)
=0.494uH
D47
B140
@M24
BC795
*
10uF
C1210
@M24
3
2
L21 0.8u H @M24
VIN_VGA
BC796
*
10uF
C1210
@M24
VCORE_VGA_BF
1
10A/1.2V&1.0V
VCORE_VGA
*
EC33
220uF
4V, +/-20%
CTX
@M24
*
EC34
220uF
4V, +/-20%
CTX
@M24
short5
BC801
1nF
*
50V, X7R, +/-10%
C0402
@M24
BC790
*
1nF
C0402
@M24
R899
0
+/-5%
R0402
@M24
0.1uF
*
SGND3
SHDN#
PGOOD
GND
20
BST
CSN
CSP
OUT
V+
DH
LX
DL
FB
14
23
17
15
16
12
18
11
9
10
4
T
25
VIN
1993_SHDNJ
1993_BST
MAX1993_DH
MAX1993_LX
MAX1993_DL
1993_PGOOD
R904
+/-5%
R0402
@M24
5VAUX
R898
4.7
+/-5%
R0603
D D
@M24
*
SGND3
BC799
*
R901
0
+/-5%
R0402
@M24
600KHZ
0.22uF
C0805
@M24
BC800
*
1nF
C0402
@M24
SGND3
SGND3
0 : Core VCC=1.2V
C C
1 : Core VCC=1V
VCORE_L/HJ 21
Vref=2.0V
1993_VREF
R905
100K
+/-1%
R0603
@M24
R908
140K
+/-1%
R0603
@M24
B B
NEW COMPENT
SGND3
R906
75K
+/-1%
R0603
@M24
R907
75K
+/-1%
R0603
@M24
R909
37.4K
+/-1%
R0603
@M24
ILIM
VOUT_H
VOUT_L
BC792
*
1uF
C0603
@M24
SGND3
BC797
1uF
C0603
MAX1993_VCC
@M24
1993_VREF
ILIM
VOUT_H
VOUT_L
MAX1993_GATE
MAX1993_TON
R903
+/-5%
R0402
@M24
1 2
JUMPER1
MAX1993_SKIPJ
0
SHORT9
R902
0
+/-5%
R0402
@M24
SGND3 SGND3
SGND3
19
22
24
3
6
5
7
8
21
2
1
U20
MAX1993 @M24
VDD
VCC
OVP/UVP
LSAT
REF
ILIM
REFIN
OD
GATE
FBLANK
TON
SKIP#
13
BC793
C0603
@M24
+3VSUS +3VSUS
2
SUSOK 15,28
A A
1 3
Q69
DTC144EUA
Dummy
5
R728
10K
+/-5%
R0402
Dummy
E C
HWPG
B
Q70
MMBT3906
Dummy
1.2V_OK 37
Title
TECHNOLOGY COPR.
VCORE VGA
Document Number Re v
4
3
2
Date: Sheet
S04 MAINBOARD
1
35 40 Monday, June 14, 2004
A
of
5
D D
4
3
BC571
0.1uF
25V, X7R, +/-10%
C0603
2
MOSVCC_RUN
+1.5V +1.5VSUS
Q57
5
G4D
6
S
D
7
S
D
8
S
D
Si4410DY
*
3
2
1
BC572
0.1uF
*
25V, X7R, +/-10%
C0603
On_1.5V
Q104
2N7002
R953
+/-5%
R0402
10K
R954
10K
+/-5%
R0402
D S
G
Q105
DTC144EUA
1 3
VCORE_VGA
2
R955
0
+/-5%
R0402
1
D43
1SS355
R914
2.2
+/-5%
R0805
R916
10K
+/-1%
R0603
5VAUX
2 1
R911 0
R912 0
BST2_5V
R920
0
+/-5%
R0402
BC802
*
1nF
C0603
BC803
*
4.7uF
C0805
VRON 28,31
SUSD 32,33
BC815
0.1uF
C0603
*
R936
0
+/-5%
R0402
@GM
8
D5D6D7D
4
8
D5D6D7D
4
VCCP_HWPG 31
HWPG 28,35
*
S1S2S3G
S1S2S3G
BC808
0.1uF
C0603
Q59
FDS6680A
Q61
FDS6680A
VIN_1715
*
2 1
BC809
10uF
C1210
D45
B140
VIN
FB61
FB L0805 300 Ohm
2 1
BC810
*
10uF
C1210
L20
2.7uH
*
+1.5VSUS_BF
BC585
*
1nF
C0603
4A/1.5V
+1.5VSUS
short4
C11
C12
220uF
220uF
*
*
CTX
CTX
5VAUX 5VAUX
C C
VCORE_GMCH and
VCCP=1.05V
VIN_1715
BC811
*
10uF
C1210
7.5A/1.05V
+VCCP
short6
EC37
*
220uF
CTX
B B
+VCCP_BF
EC15
220uF
*
BC817
*
CTX
1nF
C0603
L22
2.7uH
R910
4.7
+/-5%
R0603
BC806
*
1uF
C0603
BC812
10uF
C1210
BC813
*
1nF
C0603
Q71
FDS6680A
*
8
S1S2S3G
*
D5D6D7D
4
*
B140
D49
2 1
Q73
FDS6680A
8
S1S2S3G
D5D6D7D
4
BC805
BC804
*
4.7uF
1nF
C0805
C0603
BC814
0.1uF
C0603
BST1_5V
*
+5VSUS
345khz/235khz
2 1
BC818
0.47uF
C0805
R919
1K
+/-1%
R0603
R913
2.2
D48
1SS355
R915
0
Dummy
*
MAX1715_VCC
+/-5%
R0805
MAX1715_BST1
MAX1715_DH1
MAX1715_LX1
MAX1715_TON
MAX1715_REF
MAX1715_FB1
R918
20K
+/-1%
R0603
20
21
12
25
26
27
24
3
5
1
9
2
8
U21
MAX1715
VDD
VCC
ILIM1
ILIM2
BST1
DH1
LX1
DL1
TON
OUT1
REF
FB1
AGND
NC115NC223NC3
28
*
BST2
PGND
OUT2
SKIP
PGOOD
BC807
0.1uF
C0603
V+
ON1
ON2
DH2
LX2
DL2
FB2
VIN
4
10
11
MAX1715_BST2
18
MAX1715_DH2
17
MAX1715_LX2
16
MAX1715_DL2 MAX1715_DL1
19
22
14
6
MAX1715_FB2
13
7
MAX1715_PGOOD
MAX1715_ON1
MAX1715_ON2
R917
20K
+/-1%
R0603
A A
TECHNOLOGY COPR.
Title
VCCP & +1.5VSUS
Document Number Re v
5
4
3
2
Date: Sheet
S04 MAINBOARD
1
36 40 Monday, June 14, 2004
A
of
5
4
3
2
1
D D
C C
B B
A A
+3V
*
*
BC819
10uF
C0805
@M24
BC617
22uF
C1206
@M24
U29
L1087_ADJ @M24
IN3OUT
BC618
0.1uF
*
C0603
@M24
ADJ/GND
1
L1087_ADJ_GND
BC612
10uF
*
C0805
2
R922
4.42K
+/-1%
R0603
@M24
R923
10K
+/-5%
R0402
@M24
+2.5V VDIMM
Q103
1
8
S
D
2
7
S
D
3
6
S
D
5
G4D
Si4410DY
*
+1.5VSUS
+1.8V
R925 0
@M24
+1.8V
BC820
0.1uF
*
10V, X7R, +/-10%
C0402
@M24
500 mA
U24
2
IN
3
IN
4
IN
5
IN
1
EN
MAIND 32,33,35,36
14
NC
MAX8527
BC615
4.7uF
10V, Y5V, +80%/-20%
C0805
R0402+/-5%
FOR M24
<500 mA
7
NC
GND
8
OUT
OUT
OUT
OUT
FB
POK
MAX8527
*
13
12
11
10
MAX8527_FB
9
MAX8527_POK
6
BC821
4.7uF
10V, Y5V, +80%/-20%
C0805
@M24
R927 0
R924
10K
+/-1%
R0603
@M24
R926
7.15K
+/-1%
R0603
@M24
@M24
+1.2V
FOR M24
MAX 2A
C13
150uF
*
4V, +/-20%
CTB
@M24
+1.5V
R928
10K
+/-5%
R0402
@M24
R0402+/-5%
1.2V_OK 35
TECHNOLOGY COPR.
Title
Other power
Document Number Re v
5
4
3
2
Date: Sheet
S04 MAINBOARD
1
37 40 Monday, June 14, 2004
A
of
5
4
3
2
1
+5VSUS
BC735
0.1uF
*
10V, X7R, +/-10%
D D
PCLK_LAN 4
PCLK_OZ 4
PCLK_1394 4
C/BE3J 15,20
C/BE1J 15,20
C C
GNT0J 15
B B
5VAUX
PCIE_WAKEJ 15,16
3VAUX
AD[0..31] 15,20
PCIBOARD_CONN1
1
1
3
3
5
5
7
7
9
9
11
AD31
AD29
AD27
AD25
AD23
AD21
AD19
AD17
AD15
AD13
AD11
AD9
AD7
AD5
AD3
AD1
IRDYJ
IRDYJ 15,16,20
CLKRUNJ 15,16,20,28
SERRJ 15,16,20
PERRJ 15,16,20
PCIRSTJ 15,20,28
RIJ 15,16
REQ0J 15,16
PIRQAJ
PIRQAJ 15,16
PIRQBJ
PIRQBJ 15,16
SERIRQ 15,16,28
PIRQEJ 15,16
REQ3J 15,16
GNT3J 15
PCIE_TXP1 15
PCIE_TXN1 15
PCIE_RXP1 15
PCIE_RXN1 15
SYSUSBP7+ 15
SYSUSBP7- 15
PLT_RSTJ 7,15,17,21
13
15
17
19
21
23
25
27
29
91
101
103
105
107
109
111
113
115
117
119
11
13
15
17
19
21
23
25
27
29
313132
333334
353536
373738
393940
414142
434344
454546
474748
494950
515152
535354
555556
575758
595960
616162
636364
656566
676768
696970
717172
737374
757576
777778
797980
818182
838384
858586
878788
898990
91
939394
959596
979798
9999100
101
103
105
107
109
111
113
115
117
119
2
2
4
4
6
6
8
8
10
10
12
12
14
14
16
16
18
18
20
20
22
22
24
24
26
26
28
28
30
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
92
94
96
98
100
102
102
104
104
106
106
108
108
110
110
112
112
114
114
116
116
118
118
120
120
AD30
AD28
AD26
AD24
AD22
AD20
AD18
AD16
AD14
AD12
AD10
AD8
AD6
AD4
AD2
AD0
3VAUX
SMB_CLK 4,1 2,13,15,16
SMB_DATA 4,1 2,13,15,16
PCMSPKJ 26
LAN_PME_591J 28
+5V
AUDGND 26,27
INT_MIC 27
+1.5V
CLK_NEWCARD 4
CLK_NEWCARDJ 4
C/BE2J 15,20
C/BE0J 15,20
PAR 15,20
DEVSELJ 15,16,20
FRAMEJ 15,16,20
TRDYJ 15,16,20
STOPJ 15, 16,20
ICH_PMEJ 15 ,16,20
GNT2J 15
REQ2J 15,16
SYSUSBP0+ 15
SYSUSBP0- 15
SUSCLK 15
+3V
MOSVCC_RUN
BC620
0.1uF
*
25V, X7R, +/-10%
C0603
C0402
SYSUSBP1+ 15
SYSUSBP1- 15
U36
1
OUT
GND
2
IN
OUT
3
IN
OUT
4
EN
OC
MAX1607ESA
L28
1
4 3
Common Choke 90 Ohm 2L
USBBOARD_CONN1
1
1
2
7
2
GND
3
3
4
4
5
8
5
GND
6
6
WTB CONN_6P
8
7
6
5
2
*
SYSUSBP1_L+
SYSUSBP1_L-
USB2PWR
SYSUSBP1_LSYSUSBP1_L+
C15
330uF
CTX
USB2PWR
BC736
*
0.1uF
C0402
BC737
*
0.1uF
C0402
121
122
121
0.6P BTB_High Speed 120P
A A
122
TECHNOLOGY COPR.
Title
PCIboard & ISTICKboard
Document Number Re v
5
4
3
2
Date: Sheet
S04 MAINBOARD
1
38 40 Monday, June 14, 2004
A
of
5
VIN
VIN
R745
100K
R747
100K
+/-5%
R0402
+/-5%
R0402
D D
Q80
DTC144EUA
2
REFON 28
VIN_REFON_1
VIN_REFON_2
D S
Q81
G
1 3
2N7002
G
MMBATA+
R746
102K
+/-1%
R0603
MMBATA+_1
D S
R753
18K
+/-1%
R0603
Q79
2N7002
4
Monitor battery voltage
MBATV 28
BC624
10nF
*
C0603
MBATA+
8
7
6
5
Q82
2N7002
Q78
Si4835DY
4
D S
3
2
1
ACIN_5
G
ACIN_4
Q83
2N7002
R748
75K
+/-1%
R0603
3
VIN
R752
75K
+/-1%
R0603
D S
ACIN_3
G
R756
75K
+/-1%
R0603
*
R755
10K
R0402
+/-5%
BC622
0.1uF
C0603
MBATA+
*
ACIN 28
BC623
47pF
C0603
MBCLK 5,28
MBDATA 5,28
MBAT_PRESJ 28
3
2
D50
BAT54S
+3VALW +3VALW +3VALW +3VALW
2
FB32 FB L0805 300 Ohm
FB33 FB L0805 300 Ohm
1
R754
10K
+/-5%
R0402
2 1
2 1
R749 330R0603 +/-5%
R750 330R0603 +/-5%
R751 330R0603 +/-5%
3
2
1
D51
BAT54S
BC621
1nF
*
50V, X7R, +/-10%
C0603
3
2
D52
BAT54S
1
1
MMBATA+
BATT_SMB_CLK
BATT_SMB_DAT
BATT_PRESJ
BATT_CONN1
7
BATT1+
6
BATT2+
5
SMB_CLK
4
SMB_DAT
3
BATT_PRES#
2
BATT-
1
BATT1-
Battery CONN
FB34 FB L0805 300 Ohm
C C
DC_IN_CONN1
1
2
3
4
HEADER_ 1X4 Shield
ADIN VSYS
BC636
R762
0.1uF
47.5K
*
50V, X7R, +/-10%
+/-1%
C0805
R0603
B B
REF3V
R769
100K
+/-1%
R0603
Dummy
R775
100K
A A
+/-1%
R0603
Dummy
SGND7
*
Q87 FDS4435
S
D
8
7
6
G
R770
15K
+/-1%
R0603
Dummy
OZ862A_ISET
OZ862A_VSET
R776
49.9
+/-1%
R0402
Dummy
5
DC_IN
BC630
0.1uF
C0805
1
2
3
4 5
PWR_AC
SGND7
BC631
0.1uF
*
C0805
PWR_AC1
R765
+/-5%
R0402
+3VALW
CC_SET 28
CV_SET 28
REFON 28
1 2
JUMPER1
*
0
ACIN 28
R777
FB35 FB L0805 300 Ohm
BC632
0.1uF
50V, X7R, +/-10%
C0805
ADIN_2
R763
BC641
*
1uF
C0805
+/-5%
R0402
R766 100K
R0402 +/-5%
+3VALW
R771 0R0402 +/-5%
R772 0R0402 +/-5%
R773 47.5K
R0603 +/-1%
R759 20mR2512 +/-5%
0
2 1
2 1
R764
+/-5%
R0402
BC644
1uF
*
C0805
R767 100K
R0402 +/-5%
R778
100K
R0402
+/-5%
SGND7
ADIN
BC633
0.1uF
*
50V, X7R, +/-10%
C0805
R761 470
R0603 +/-5%
BC642
0.1uF
10
*
25V, X7R, +/-10%
C0603
OZ862A_CHIGH
OZ862A_IACM
OZ862A_IACP
OZ862A_BL
OZ862A_ISET
OZ862A_VSET OZ862A_SYS_BL
OZ862A_ICHG
OZ862A_COR
BC648
1uF
*
10V, X5R, +/-10%
C0603
4
BC643
10uF
*
C1210
U28
16
CHIGH
14
VAC
13
IACM
17
IACP
1
ACAV
2
BL
7
ISET
6
SYS_BL
VSET
8
REF_EN
4
ICHG
5
COR
GND12CELLS
OZ862A
SGND7
R757
75K
+/-1%
R0603
HDR
ICHP
ICHM
REF
COMP
LV
3
OZ862A_CELLS
15
18
19
11
20
10
9
+/-5%
R0402
R780
Q85
FDS4435
1
8
S
D
2
7
3
6
G
4 5
R837
R0603
75K
PWR_AC ACIN_2
1
2
3
4 5
OZ862A_HDR
OZ862A_ICHP
OZ862A_COMP
OZ862A_LV
0
SGND7
+/-1%
2N7002
Q88
FDS4435
S
G
SCM34
D53
MBATA+_2
8
D
7
6
2 1
*
SGND7
BC646
*
10uF
C0805
SGND7 SGND7
R774 47.5K
R0603 +/-1%
R779
10K
+/-5%
R0402
VIN
3
Q86
BC645
10uF
C0805
BC628
10uF
C1210
D S
L25 15uH
*
G
VIN
BC629
10uF
*
C1210
ACIN_1
BC634
0.1uF
*
10V, X7R, +/-10%
C0402
BC637
10uF
C1210
REF3V
R768 1K R0402+/-1%
BC647
*
0.47uF
C0805
SGND7
*
R758 10K
R0402 +/-5%
BC638
10uF
*
C1210
*
2
*
ACIN 28
R760 39R2512 +/-5%
BC639
10uF
C1210
OZ862A_COMP_1
Q89
2N7002
Title
Document Number Re v
Date: Sheet
MBATA+
*
D S
G
SGND7
Charger
BC635
0.1uF
C0603
CHA_OFF 28
S04 MAINBOARD
TECHNOLOGY COPR.
39 40 Monday, June 14, 2004
1
A
of
0527:
1) Update Keyboard connector,LCD connector,USB board connector;
2) Delete trackpoint;
3) Place R453;
4) No stuff R19,R22,R26,Q1;
5) Boot mode: Vboot=1.196V,connect B0,B1 to GND and OPEN B2;
6) Suspend mode: Vsuspend=0.748V,connect S0 to GND,connect S1 to Vcc,and OPEN S2;
P4,change R36 to 33ohm,del signal PCLK_TPM;
P8,del R119,R121 and signal CFG10/11;
P10,put EC7 in P12;
P11,del R143;
P13,del thermal sensor;
P19,del signal NOVO_BTJ and R502,BC303;
D D
P29,del TPM(including components and signal SUS_STATJ);
P31,change R840 to R0603,add R931,R932,Q101 and Q102;
P33,del U35,change BC759 to 10uf;
P34,connect SHDNA# to SUSONJ,SHDNB# to MAINONJ,STBY to SUSON through R933.
0528:
P7,no stuff R100 and R101;
P11,float pin H24;
P28,move BC495 into P33;
P37,update 2.5V schematics;
P26,del Q93 and the signal EAPD,del BC678,BC679,BC680,BC662,
0529:
P7,no stuff R100 and R101;
P11,float pin H24;
P28,move BC495 into P33;
P37,update 2.5V schematics;
P26,del Q93 and the signal EAPD,del BC678,BC679,BC680,BC662,
change BC661 to C0805,change BC686 to 0.1uf
P29,update TOUCHPAD_CONN1;
P31,del Q97,Q99,update R845,R847,D34,D35,L15,L16;
P34,update L19;
P39,update L25.
C C
0530:
P11,name the signals;
P16,stuff R469,R470;
0531:
change R777 to a short.
update R895,R896,R897;
update R909(change to 37.4kohm),R897(change to 100kohm);
delete BC692,BC693,BC671,BC672,BC673,BC674;
connect DREF_SSCLKN to GND, DREF_SSCLKP to +1.5V;
update U11(M24);
update L25(15uh).
update POWER signals' name.
0601:
update L15,L16;
update L19,L21;
P4,delete R33,R35,R11,R12;delete CLK_PCIE_SATA/J;
P14,delete R230,R235,connect SATA_CLKN/P and SATARBIAS/J to GND;
0602:
update the front page;
update EC3,EC5,EC10,EC13,EC14,and EC22;
B B
0603:
RN7,change pin1 with pin7,pin3 with pin5;
P24,connect CRTVDD2 to CRT_CONN1 pin9;
P18,add 16 holes;
P33,change Q50 to FDS6982S;change Q49,Q52 to SI4410DY,del Q51,D38;
P35,update Q64,Q66;
update L17,L18;
0604:
P19,reserve BC827 on "LIDJ" near "Switchboard_conn1";reserve a 0.1uF BC832 on "+3Vsus";
P26,reserve BC828,BC829 on PIN4,PIN3 of SPEAKER_CONN1;
P27,reserve BC830,BC831 on PIN5,PIN7 of AUDIO_SPDIF_JACK1;
P21,Leave pull-up footprint on all GPIO straps,so place R937 -- R947;
Change R531 and R536 to 1% tolerance resistors;change the power connected to R535 (for PCIE_CALRN) to PCIE_VDDR.
P23,change R557--R560,R562--R565 to FB(120ohm,600mA);
P24,D19,D29,D21,connect to +3V;
0607:
P38,connect 5VAUX to PCIBOARD_CONN1 pin103;
update the footprint of Q11,Q12,Q22,Q23,Q24,Q31,Q38,Q42,Q69,Q80,Q94;Q7,Q8,Q9,Q10,Q26,Q27,Q29;Q15,Q16,Q17,Q18,Q20,Q21;
P34,BC700,BC709 connect to AUDGND;
Q32,Q36,Q58,Q60,change to PHK24NQ04LT;
P32,change R669,R676 to 10K,+/-1% tolerance;
0608:
P4,connect DREFSSCLK/J to pin 17,18 of U1 through R950,R951;and pull down them through R948,R949;
P7,conncet DREFSSCLK/J to pin C37,D37 of U4B;
A A
P36,update the control circuit of Q57;
P37,change MAIND to +1.8V to connect to U24 pin 1 EN.
P18,del 4 EMI caps,update the holes in the MB;
P37,change R922 to 4.42K;
P11,pull up SDVOCRTL_DATA(pin H24) to +2.5V through R956(3.6Kohm);
5
5
4
3
0609:
change R9,R20 from 0ohm to 2.2ohm;change R10 from 0ohm to 1ohm;
change BC142,BC143,BC485,BC486 to 4.7pf 0402;
0610:
P24,change FB12,FB13,F14 to EMI filter L29,L30,L31;
0611:
P4,DREFssCLK pull up through R957(@GM) to +1.5V;DREFCLK pull up through R958(@GM) to +1.5V;and R52,R53 all @GM;
P16,connect ICH6 pin A13 to +3V;
0612:
P6,change R84 to +/-1% tolerance;
P33,P34,P35,P36,add FB57,FB58,FB59,FB60,FB61;
0613:
P12,Del some caps:BC163,BC164,BC165,BC166,BC167,BC200,BC201,BC203,BC205,BC206,BC208,BC209,BC210,BC211,BC204;
change BC485,BC486,BC142,BC143 to 4.7pF 0402;
2
1
TECHNOLOGY COPR.
Title
Changelist
Document Number Re v
4
3
2
Date: Sheet
S04 MAINBOARD
1
40 40 Monday, June 14, 2004
A
of