Page 1

8 7 6 5 4 3 2 1
+3V
D D
Dothan
478 Pins
(Micro-FCPGA)
CPU Thermal
Sensor
Clocks
ICS952005
Buffer
ICS93705
Host Bus
400MHZ
VTT_MEM
VDIMM
DDR-SODIMM1
DDR SDRAM 2.5V, 333/400MHz
533MHZ
SiSM661FX
C C
DDR-SODIMM2
Primary IDE - HDD
Master
DVD/CDRW/CD/COMBO
Slave
DDR SDRAM 2.5V, 333/400MHz
ATA 133/100
SiS963
AC-LINK
AGP
R.G,B
33MHZ, 3.3V PCI
USB 2.0
VCORE_VGA
Video Controller
SIS302LV
CRT port
33MHZ, 3.3V PCIMuTIOL.1G
Headphone
USB PORT -->2,6
External
B B
MIC
AUDIO
ALC202A(Codec)
TPA0312(Amp)
MDC
USB --> 1,3
Internal
MIC
+5V
+3V
+3VALW
VCCRTC
PC87591
176 Pins LQFP
LVDS
S-VIDEO
LCD Panel
CardReader
SD&MMC&MS
Slot
CardBus
CB810
CARD
BUS
SLOT
MINI-PCI
1394
CONN
LAN
10/100 Mbps
RTL8100C
RJ45
FLASH FAN 1Touchpad Keyboard
A
Title
Document Number Re v
Date: Sheet
661S03
TECHNOLOGY COPR.
of
150Friday, August 13, 2004
A
Page 2

8 7 6 5 4 3 2 1
Device
M661FX
Rails MDC
CPU
963L
PC87591
DDR
M10
LCD302LV
MiniPCI
LAN
AUDIO cardbus
HDD
Buffer
CLK GEN.
D D
+1.5VSUS
+3VALW
+3v
+1.8V
3VAUX
+1.8VAUX
5VAUX
C C
VDDQ
VDIMM
DDR_VTT
+1.2V
+1.5V
+5VALW
+12V
B B
VCORE_CPU
VCCP
+5V
3VSUS
VCORE_VGA
TECHNOLOGY COPR.
of
250Friday, August 13, 2004
A
Title
Document Number Re v
Date: Sheet
Power Diagram
661S03
A
Page 3

5
AA3
AA2
AF4
AC4
AC7
AC3
AD3
AE4
AD2
AB4
AC6
AD5
AE2
AD6
AF3
AE1
AF1
AE5
A13
A12
C12
C11
B13
A16
A15
B10
A10
B18
A18
C17
B17
P4
U4
V3
R3
V2
W1
T4
W2
Y4
Y1
U1
Y3
U3
R2
P3
T2
P1
T1
N2
A4
N4
J3
L1
J2
K3
K4
L4
C8
B8
A9
C9
M3
H1
K1
L2
C2
D3
A3
E4
B4
A7
D1
D4
C6
A6
B7
U33A
A3#
A4#
A5#
A6#
A7#
A8#
A9#
A10#
A11#
A12#
A13#
A14#
A15#
A16#
A17#
A18#
A19#
A20#
A21#
A22#
A23#
A24#
A25#
A26#
A27#
A28#
A29#
A30#
A31#
ADSTB0#
ADSTB1#
REQ0#
REQ1#
REQ2#
REQ3#
REQ4#
ADS#
IERR#
BR0#
BPRI#
BNR#
LOCK#
HIT#
HITM#
DEFER#
BPM0#
BPM1#
BPM2#
BPM3#
TRDY#
RS0#
RS1#
RS2#
A20M#
FERR#
IGNNE#
PWRGOOD
SMI#
TCK
TDO
TDI
TMS
TRST#
ITP_CLK0
ITP_CLK1
PREQ#
PRDY#
DBR#
LINT0
LINT1
STPCLK#
SLP#
DPSLP#
THERMDA
THERMDC
THERMTRIP#
PROCHOT#
Banias-Processor
H_A20MJ10
H_FERRJ10
H_IGNNEJ10
CPUPWRGD5
H_SMIJ10
H_INTR10
H_NMI10
H_STPCLKJ10
H_CPUSLPJ10
H_DPSLPJ10,31
PM_THRMTRIPJ10
HAJ[3..31]
HADSTBJ05
HADSTBJ15
HREQJ05
HREQJ15
HREQJ25
HREQJ35
HREQJ45
ADSJ5
R508 56
+/-5% R0603
HBREQJ05
BPRIJ5
BNRJ5
HLOCKJ5
HITJ5
HITMJ5
DEFERJ5
HTRDYJ5
RSJ05
RSJ15
RSJ25
5
TCK_H
TDO_H
TDI_H
TMS_H
TRSTJ
THERMDA
THERMDC
PM_THRMTRIPJ
CPU_PROCHOTJ
HAJ3
HAJ4
HAJ5
HAJ6
HAJ7
HAJ8
HAJ9
HAJ10
HAJ11
HAJ12
HAJ13
HAJ14
HAJ15
HAJ16
HAJ17
HAJ18
HAJ19
HAJ20
HAJ21
HAJ22
HAJ23
HAJ24
HAJ25
HAJ26
HAJ27
HAJ28
HAJ29
HAJ30
HAJ31
DBRJ
HAJ[3..31]5
D D
C C
+VCCP
B B
A A
CPU_PROCHOTJ10
4
Dothan
REQUEST
PHASE
SIGNALS
ERROR
SIGNALS
ARBITRATION
PHASE
SIGNALS
SNOOP PHASE
SIGNALS
RESPONSE
PHASE
SIGNALS
PC
COMPATIBILITY
SIGNALS
DIAGNOSTIC
& TEST
SIGNALS
EXECUTION
CONTROL
SIGNALS
THERMAL DIODE
4
1 OF 3
DATA
PHASE
SIGNALS
D0#
D1#
D2#
D3#
D4#
D5#
D6#
D7#
D8#
D9#
D10#
D11#
D12#
D13#
D14#
D15#
D16#
D17#
D18#
D19#
D20#
D21#
D22#
D23#
D24#
D25#
D26#
D27#
D28#
D29#
D30#
D31#
D32#
D33#
D34#
D35#
D36#
D37#
D38#
D39#
D40#
D41#
D42#
D43#
D44#
D45#
D46#
D47#
D48#
D49#
D50#
D51#
D52#
D53#
D54#
D55#
D56#
D57#
D58#
D59#
D60#
D61#
D62#
D63#
DSTBN0#
DSTBP0#
DSTBN1#
DSTBP1#
DSTBN2#
DSTBP2#
DSTBN3#
DSTBP3#
DINV0#
DINV1#
DINV2#
DINV3#
DBSY#
DRDY#
BCLK1
BCLK0
INIT#
RESET#
DPWR#
A19
A25
A22
B21
A24
B26
A21
B20
C20
B24
D24
E24
C26
B23
E23
C25
H23
G25
L23
M26
H24
F25
G24
J23
M23
J25
L26
N24
M25
H26
N25
K25
Y26
AA24
T25
U23
V23
R24
R26
R23
AA23
U26
V24
U25
V26
Y23
AA26
Y25
AB25
AC23
AB24
AC20
AC22
AC25
AD23
AE22
AF23
AD24
AF20
AE21
AD21
AF25
AF22
AF26
C23
C22
K24
L24
W25
W24
AE24
AE25
D25
J26
T24
AD20
M2
H2
B14
B15
B5
B11
C19
HDJ0
HDJ1
HDJ2
HDJ3
HDJ4
HDJ5
HDJ6
HDJ7
HDJ8
HDJ9
HDJ10
HDJ11
HDJ12
HDJ13
HDJ14
HDJ15
HDJ16
HDJ17
HDJ18
HDJ19
HDJ20
HDJ21
HDJ22
HDJ23
HDJ24
HDJ25
HDJ26
HDJ27
HDJ28
HDJ29
HDJ30
HDJ31
HDJ32
HDJ33
HDJ34
HDJ35
HDJ36
HDJ37
HDJ38
HDJ39
HDJ40
HDJ41
HDJ42
HDJ43
HDJ44
HDJ45
HDJ46
HDJ47H_IERRJ
HDJ48
HDJ49
HDJ50
HDJ51
HDJ52
HDJ53
HDJ54
HDJ55
HDJ56
HDJ57
HDJ58
HDJ59
HDJ60
HDJ61
HDJ62
HDJ63
3
HDJ[0..63]
H_CPURSTJ
3
HDJ[0..63] 5
HDSTBNJ0 5
HDSTBPJ0 5
HDSTBNJ1 5
HDSTBPJ1 5
HDSTBNJ2 5
HDSTBPJ2 5
HDSTBNJ3 5
HDSTBPJ3 5
HDBIJ0 5
HDBIJ1 5
HDBIJ2 5
HDBIJ3 5
DBSYJ 5
DRDYJ 5
CLK_CPU_BCLKJ 13
CLK_CPU_BCLK 13
H_INITJ 10
H_CPURSTJ 5
DPWRJ 5
2
+3V
R539
R540
8.2K
Q50
G
2N7002
D S
MBCLK15,39
Q51
2N7002
MBDATA15,39
TEMP_ALERTJ15
D S
8.2K
+/-5%
R0402
G
H_CPURSTJ
TDO_H
TMS_H
TDI_H
DBRJ
TCK_H
TRSTJ
H_PWRGD5
H_FERRJ
HBREQJ0
CPU_PROCHOTJ
PM_THRMTRIPJ
H_A20MJ
H_STPCLKJ
H_CPUSLPJ
H_SMIJ
H_INITJ
H_IGNNEJ
H_INTR
H_NMI
H_DPSLPJ
+/-5%
R0402
U34 MAX6648
8
7
6
5
R521 54.9+/-1% R0603
R524 54.9+/-1% R0603
R522 39.2+/-1% R0603
R523 150 +/-5% R0603
R517 150 +/-5% R0603
R527 27.4 +/-1% R0603
R525 680 +/-5% R0603
R532 56
R0603 +/-1%
R493 56
R0603 +/-1%
R507 56
R0603 +/-1%
R510 56
R0603 +/-1%
R516 62
R0603 +/-1%
VCC
SMCLK
DXP
SMDATA
DXN
-ALT
-OVT
GND
+VCCP
R498
200
+/-1%
R0402
R499 62
R0603 +/-1%
R526 62
R0603 +/-1%
R531 62
R0603 +/-1%
R514 56
R0603 +/-1%
R512 56
R0603 +/-1%
R505 56
R0603 +/-1%
R492 56
R0603 +/-1%
R506 56
R0603 +/-1%
+3V
1
2
3
4
+VCCP
CPUPWRGD
1
R534
100
+/-1%
R0603
BC565 2.2nF C0603
+VCCP
BC559
0.1uF
C0603
*
THERMDA
THERMDC
*
TEMP_OVTJ 32
Sis FAE Suggestion
Lonny update July 1st
Title
Dothan CPU-1
Document Numbe r R e v
2
Date: Sheet
661S03
TECHNOLOGY COPR.
350Friday, August 13, 2004
1
of
A
Page 4

5
+VCCP
D D
EC1
150uF
*
2.5V, +/-20%
CTB
+VCCP
EC2
150uF
*
2.5V, +/-20%
CTB
C C
*
B B
*
*
A A
*
BC556
10uF
C0805
BC557
10uF
C0805
BC552
10uF
C0805
BC15
0.1uF
C0603
*
*
*
*
*
+VCCP
*
BC558
10uF
C0805
BC32
10uF
C0805
BC555
10uF
C0805
BC28
0.1uF
C0603
BC50
BC49
0.1uF
0.1uF
*
C0603
C0603
BC25
BC16
0.1uF
0.1uF
*
C0603
C0603
VCORE_CPU
BC571
10uF
*
C0805
BC581
10uF
*
C0805
VCORE_CPU VCORE_CPU
BC40
10uF
*
C0805
VCORE_CPU
BC41
0.1uF
*
C0603
5
+VCCP
BC27
0.1uF
*
C0603
BC33
0.1uF
*
C0603
10U/6.3V/X5R(CC0805)
5 mOhm*35
BC577
10uF
*
*
C0805
BC584
10uF
*
*
C0805
BC52
10uF
*
*
C0805
BC42
0.1uF
*
*
C0603
R5441K +/-5% R0603
R5482K +/-5% R0603
BC19
0.1uF
*
*
C0603
BC17
0.1uF
*
C0603
BC567
10uF
C0805
BC578
10uF
C0805
BC38
10uF
C0805
BC18
0.1uF
C0603
*
BC51
0.1uF
C0603
BC20
0.1uF
C0603
*
*
BC572
10uF
C0805
BC26
10uF
C0805
*
*
*
*
BC55
10uF
C0805
BC553
10uF
C0805
4
R545 27.4 +/-1% R0603
R543 54.9 +/-1% R0603
R497 27.4 +/-1% R0603
R495 54.9 +/-1% R0603
DPRSLPVR10,31
H_DPRSLPJ10,31
+1.8V
*
VCORE_CPU
BC564
BC569
10uF
10uF
*
C0805
C0805
VCORE_CPUVCORE_CPU
BC575
BC579
10uF
10uF
*
C0805
C0805
BC23
10uF
*
*
C0805
VCORE_CPU
BC549
10uF
*
*
C0805
4
0.5'' max length
R486 0 R0402+/-5%
R0805
+/-5%
Dummy
0
R549
BC586
10nF
25V, X7R, +/-10%
C0402
*
*
BC22
10uF
C0805
BC547
10uF
C0805
BC566
10uF
C0805
BC551
10uF
C0805
*
*
*
*
BC29
10uF
C0805
BC550
10uF
C0805
R511
1K
+/-5%
R0603
*
BC561
10uF
C0805
BC548
10uF
C0805
*
*
BC588
10uF
C0805
BC24
10uF
C0805
BC21
10uF
C0805
COMP0
COMP1
COMP2
COMP3
GTLREF0
TEST1
TEST2
Dummy
R546
1K
+/-5%
R0603
VCORE_CPU
P25
P26
AB2
AB1
AD26
E26
AC1
F23
AC26
F26
D18
D20
D22
E17
E19
E21
F18
F20
F22
G21
H22
K22
V22
W21
Y22
AA5
AA7
AA9
AA11
AA13
AA15
AA17
AA19
AA21
AB6
AB8
AB10
AB12
AB14
AB16
AB18
AB20
AB22
AC9
AC11
AC13
AC15
AC17
AC19
AD8
AD10
AD12
AD14
AD16
AD18
AE9
AE11
AE13
AE15
AE17
AE19
AF8
AF10
AF12
AF14
AF16
AF18
G1
C5
N1
B1
D6
D8
E5
E7
E9
F6
F8
G5
H6
J5
J21
U5
V6
W5
Y6
U33B
COMP0
COMP1
COMP2
COMP3
GTLREF0
RSVD
DPRSLP#
RSVD
TEST1
TEST2
VCCA3
VCCA2
VCCA1
VCCA0
VCC00
VCC01
VCC02
VCC03
VCC04
VCC05
VCC06
VCC07
VCC08
VCC09
VCC10
VCC11
VCC12
VCC13
VCC14
VCC15
VCC16
VCC17
VCC18
VCC19
VCC20
VCC21
VCC22
VCC23
VCC24
VCC25
VCC26
VCC27
VCC28
VCC29
VCC30
VCC31
VCC32
VCC33
VCC34
VCC35
VCC36
VCC37
VCC38
VCC39
VCC40
VCC41
VCC42
VCC43
VCC44
VCC45
VCC46
VCC47
VCC48
VCC49
VCC50
VCC51
VCC52
VCC53
VCC54
VCC55
VCC56
VCC57
VCC58
VCC59
VCC60
VCC61
VCC62
VCC63
VCC64
VCC65
VCC66
VCC67
VCC68
VCC69
VCC70
VCC71
Banias-Processor
3
Dothan
2 OF 3
POWER,
GROUND,
RESERVED
SIGNALS
3
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
A2
A5
A8
A11
A14
A17
A20
A23
A26
B3
B6
B9
B12
B16
B19
B22
B25
C1
C4
C7
C10
C13
C15
C18
C21
C24
D2
D5
D7
D9
D11
D13
D15
D17
D19
D21
D23
D26
E3
E6
E8
E10
E12
E14
E16
E18
E20
E22
E25
F1
F4
F5
F7
F9
F11
F13
F15
F17
F19
F21
F24
G2
G6
G22
G23
G26
H3
H5
H21
H25
J1
J4
J6
J22
J24
K2
K5
K21
K23
K26
L3
L6
L22
L25
M1
M4
M5
M21
M24
N3
N6
N22
N23
N26
P2
P5
P21
P24
R1
R4
Dummy
R518 54.9+/-1% R0603
R513 54.9+/-1% R0603
Dummy
CPU_BSEL113
CPU_BSEL013
PSIJ31
2
CPU_VID031
CPU_VID131
CPU_VID231
CPU_VID331
CPU_VID431
CPU_VID531
JP11 SHORT
1 2
JP10
1 2
2
1
+VCCP
Z0501
Z0502
SHORT
D10
VCCP0
D12
VCCP1
D14
VCCP2
D16
VCCP3
E11
VCCP4
E13
VCCP5
E15
VCCP6
F10
VCCP7
F12
VCCP8
F14
VCCP9
F16
VCCP10
K6
VCCP11
L5
VCCP12
L21
VCCP13
M6
VCCP14
M22
VCCP15
N5
VCCP16
N21
VCCP17
P6
VCCP18
P22
VCCP19
R5
VCCP20
R21
VCCP21
T6
VCCP22
T22
VCCP23
U21
VCCP24
P23
VCCP25
W4
VCCP26
E2
VID0
F2
VID1
F3
VID2
G3
VID3
G4
VID4
H4
VID5
AE7
VCCSENSE
AF6
VSSSENSE
B2
RSVD
AF7
RSVD
C14
BSE[1]
C3
RSVD
C16
BSE[0]
E1
PSI#
R6
VSS
R22
VSS
R25
VSS
T3
VSS
T5
VSS
T21
VSS
T23
VSS
T26
VSS
U2
VSS
U6
VSS
U22
VSS
U24
VSS
V1
VSS
V4
VSS
V5
VSS
V21
VSS
V25
VSS
W3
VSS
W6
VSS
W22
VSS
Banias-Processor
U33C
Dothan
3 OF 3
POWE R, GROUND AND NC
VID
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
TECHNOLOGY COPR.
Title
Dothan CPU-2
Document Numbe r R e v
Date: Sheet
661S03
450Friday, August 13, 2004
1
W23
W26
Y2
Y5
Y21
Y24
AA1
AA4
AA6
AA8
AA10
AA12
AA14
AA16
AA18
AA20
AA22
AA25
AB3
AB5
AB7
AB9
AB11
AB13
AB15
AB17
AB19
AB21
AB23
AB26
AC2
AC5
AC8
AC10
AC12
AC14
AC16
AC18
AC21
AC24
AD1
AD4
AD7
AD9
AD11
AD13
AD15
AD17
AD19
AD22
AD25
AE3
AE6
AE8
AE10
AE12
AE14
AE16
AE18
AE20
AE23
AE26
AF2
AF5
AF9
AF11
AF13
AF15
AF17
AF19
AF21
AF24
of
A
Page 5

8
+VCCP
R117
75
+/-1%
R0603
R118
150
+/-1%
R0603
D D
CLK_MCH_BCLK13
CLK_MCH_BCLKJ13
H_CPURSTJ3
CPUPWRGD3
HBREQJ03
HREQJ43
HREQJ33
HREQJ23
HREQJ13
C C
HREQJ03
B B
HAJ[3..31]3
+VCCP
R596 20
R0603 +/-1%
R107 110
R0603 +/-1%
BC179
10nF
*
C0402
BC172
10nF
*
C0402
place this capacitor
under 660FX solder side
HLOCKJ3
DEFERJ3
HTRDYJ3
BPRIJ3
RSJ23
RSJ13
RSJ03
ADSJ3
HITMJ3
HITJ3
DRDYJ3
DBSYJ3
BNRJ3
HADSTBJ13
HADSTBJ03
DPWRJ3
HNCOMP
Rds-on(n) = 10 ohm
HNCVERF = 1/3 VCCP
HPCOMP
Rds-on(p) = 56 ohm
HPCVERF = 2/3 VCCP
*
CLK_MCH_BCLK
CLK_MCH_BCLKJ
HLOCKJ
DEFERJ
HTRDYJ
H_CPURSTJ
CPUPWRGD
BPRIJ
HBREQJ0
H_RSJ2
H_RSJ1
H_RSJ0
ADSJ
HITMJ
HITJ
DRDYJ
DBSYJ
BNRJ
H_REQJ4
H_REQJ3
H_REQJ2
H_REQJ1
H_REQJ0
HADSTBJ1
HADSTBJ0
DPWRJ
HAJ31
HAJ30
HAJ29
HAJ28
HAJ27
HAJ26
HAJ25
HAJ24
HAJ23
HAJ22
HAJ21
HAJ20
HAJ19
HAJ18
HAJ17
HAJ16
HAJ15
HAJ14
HAJ13
HAJ12
HAJ11
HAJ10
HAJ9
HAJ8
HAJ7
HAJ6
HAJ5
HAJ4
HAJ3
HVREF
BC166
0.1uF
C0402
HDJ[0..63]3
AJ31
AJ33
T33
T35
V32
B23
F22
R34
U31
R33
T32
U35
V35
R35
U34
W34
U33
V33
W35
Y33
W31
W33
Y35
AG31
AA33
R36
AH33
AG33
AJ35
AF32
AJ34
AH32
AG35
AE31
AH35
AF35
AE35
AE33
AE34
AF33
AG34
AC33
AD32
AD33
AC35
AD35
AC31
AC34
AB35
AB32
AB33
AA35
AA31
Y32
AA34
SiSM661FX
+VCCP
7
U37A
CPUCLK
CPUCLK#
HLOCK#
DEFER#
HTRDY#
CPURST#
CPUPWRGD
BPRI#
BREQ0#
RS#2
RS#1
RS#0
ADS#
HITM#
HIT#
DRDY#
DBSY#
BNR#
HREQ4#
HREQ3#
HREQ2#
HREQ1#
HREQ0#
HASTB1#
HASTB0#
DPWR#
HA31#
HA30#
HA29#
HA28#
HA27#
HA26#
HA25#
HA24#
HA23#
HA22#
HA21#
HA20#
HA19#
HA18#
HA17#
HA16#
HA15#
HA14#
HA13#
HA12#
HA11#
HA10#
HA9#
HA8#
HA7#
HA6#
HA5#
HA4#
HA3#
R595
150
+/-1%
R0603
R593
75
+/-1%
R0603
*
*
C4XAVDD
C1XAVDD
C4XAVSS
C1XAVSS
HVREF
AL36
AJ36
AK34
AK35
AA26
HVREF0
C1XAVSS
C4XAVSS
C1XAVDD
C4XAVDD
HOST
HD63#
HD62#
HD61#
HD60#
HD59#
HD58#
HD57#
HD56#
HD55#
HD54#
F24
E23
B24
B25
C24
HDJ62
HDJ63
BC620
10nF
C0402
HNCVREF
BC621
10nF
C0402
B26
D23
D25
C26
D27
HDJ54
HDJ55
HDJ56
HDJ57
HDJ58
HDJ59
HDJ60
HDJ61
6
VBD6
VBD1
VBD3
VBD0
VBD4
VBD2
VBD7
VBD5
ST0
HNCVREF
HPCOMP
HNCOMP
ST1
ST2
B22
C22
D22
W26
U26
R26
L20
HVREF1
HVREF2
HVREF3
HVREF4
B5
ST0B6ST1F7ST2
HCOMP_P
AAD0Y5AAD1W4AAD2V2AAD3W6AAD4V4AAD5U2AAD6V5AAD7U4AAD8R2AAD9
HCOMP_N
HCOMPVREF_N
VAD4
VAD6
VAD5
T4
AAD10R3AAD11T5AAD12P2AAD13R4AAD14N2AAD15R6AAD16L3AAD17L4AAD18K2AAD19L6AAD20J2AAD21J3AAD22K4AAD23J4AAD24J6AAD25H4AAD26G3AAD27H5AAD28F2AAD29G4AAD30E2AAD31
M661FX-1
HD53#
HD52#
HD51#
HD50#
HD49#
HD48#
HD47#
HD46#
HD45#
HD44#
HD43#
HD42#
HD41#
HD40#
HD39#
HD38#
HD37#
HD36#
HD35#
HD34#
HD33#
HD32#
HD31#
F28
E27
B27
B28
E29
B29
B30
B31
B33
B35
B34
D26
D28
C28
C30
C32
HDJ41
HDJ42
HDJ43
HDJ44
HDJ45
HDJ46
HDJ47
HDJ48
HDJ49
HDJ50
HDJ51
HDJ52
HDJ53
C1XAVDD C4XAVDD
BC103
0.1uF
*
C0402
C1XAVSS
D29
C33
HDJ39
HDJ40
*
D32
HDJ35
HDJ36
HDJ37
HDJ38
FB7
FB L0805 60 Ohm
BC99
10nF
C0402
JP1
SHORT
E31
D31
D33
D35
HDJ31
HDJ32
HDJ33
HDJ34
21
*
12
5
AVSYNC
AHSYNC
VAD10
VAD11
VADE
VAD9
VAD7
VAD8
LVDS/AGP
HD30#
HD29#
HD28#
HD27#
HD26#
HD25#
HD24#
HD23#
J34
F33
F32
E33
E35
C35
D34
G31
HDJ30
BC100
10uF
10V, Y5V, +80%/-20%
C1206
HDJ23
HDJ24
HDJ25
HDJ26
HDJ27
HDJ28
HDJ29
VBD11
G34
HDJ22
HD22#
VBD10
VBD8
HD21#
HD20#
J33
F35
H35
HDJ20
HDJ21
C4XAVSS
VBD9
HD19#
HDJ19
VAD1
HD18#
J31
HDJ18
BC600
0.1uF
C0402
VAD0
HD17#
G35
HDJ17
VAD2
HD16#
H33
HDJ16
VAD3
HD15#
J35
HDJ15
*
K32
HDBIJ33
HDBIJ23
HDBIJ13
HDBIJ03
VBDE
HD14#
N33
HDJ14
VBCTL0
HD13#
HDJ13
VBCTL1
HD12#
K33
HDJ12
L31
*
BVSYNC
BHSYNC
G6
HD11#
HD10#
L33
K35
HDJ10
HDJ11
HDJ9
BC607
10nF
C0402
4
SBA7
SBA6
SBA5
SBA4
SBA3
SBA2
SBA7E3SBA6F4SBA5D2SBA4F5SBA3E4SBA2B2SBA1E6SBA0
HD9#
HD8#
HD7#
HD6#
HD5#
HD4#
HD3#
L35
L34
P32
P33
M35
M33
HDJ3
HDJ4
HDJ5
HDJ6
HDJ7
HDJ8
H_DINVJ3
H_DINVJ2
H_DINVJ1
H_DINVJ0
+3V+3V
FB35
21
FB L0805 60 Ohm
*
JP12
12
SHORT
BCLK
SBA1
B3
AC/BE3#
AC/BE2#
AC/BE1#
AC/BE0#
AREQ#
AGNT#
AFRAME#
AIRDY#
ATRDY#
ADEVSEL#
ASERR#
ASTOP#
APAR
RBF#
WBF#
GC_DET#
ADBIH/PIPE#
ADBIL
SB_STB
SB_STB#
AD_STB0
AD_STB0#
AD_STB1
AD_STB1#
AGPCLK
AGPCOMP_P
AGPCOMP_N
A1XAVDD
A1XAVSS
A4XAVDD
A4XAVSS
AGPVREF
AGPVSSREF
HDSTBN3#
HDSTBN2#
HDSTBN1#
HDSTBN0#
HDSTBP3#
HDSTBP2#
HDSTBP1#
HDSTBP0#
HD2#
HD1#
HD0#
DBI3#
DBI2#
DBI1#
F26
P35
B32
E34
N34
N35
HDJ0
HDJ1
HDJ2
BC595
10uF
10V, Y5V, +80%/-20%
C1206
3
AC-BE3
K5
AC-BE2
M5
AC-BE1
P4
AC-BE0
U6
C6
E8
N6
M4
N4
L2
P5
ASTOP_
M2
N3
RBF#
D7
B4
C7
C4
D6
C2
D3
T2
U3
G2
H2
D8
W2
Y2
B8
C8
A7
B7
W3
Y4
D24
F30
G33
N31
E25
D30
H32
M32
DBI0#
R31
AGP3.0 = 50 ohm
AGPRCOMN
Demo is 50 Ohm 1%
lonny 2004-06-02
AGPRCOMP
Demo is 43.75 Ohm 1%
lonny 2004-06-02
AGP_WBF# 41
AGP8X_MB_DETJ
DBI_HI
DBI_LOW
AGP_SBSTBF
AGP_SBSTBS
AGPCLK0
AGPRCOMP
AGPRCOMN
A1XAVDD
A1XAVSS
A4XAVDD
A4XAVSS
AVREFGC
H_DSTVNJ3
H_DSTVNJ2
H_DSTVNJ1
H_DSTVNJ0
H_DSTVPJ3
H_DSTVPJ2
H_DSTVPJ1
H_DSTVPJ0
R634 49.9
R0603 +/-1%
R639 43
R0603 +/-1%
ST[0..2]41
@648
R614 0
R0402 +/-5%
R613 0
R0402 +/-5%
AGP_PAR 41
DB_HI 41
DB_LO 41
AGP_SBSTBF 41
AGP_SBSTBS 41
R666 0
R0402 +/-5%
R658 0
R0402 +/-5%
AGPCLK0 13
R653 0
R0402 +/-5%
HDSTBNJ3 3
HDSTBNJ2 3
HDSTBNJ1 3
HDSTBNJ0 3
HDSTBPJ3 3
HDSTBPJ2 3
HDSTBPJ1 3
HDSTBPJ0 3
VDDQ
VAD[0..11]
VBD[0..11]
VBCTL[0..1]
AHSYNC
AVSYNC
SBA[1..7]
AC-BE[0..3]
AGP_REQ# 41
VBCAD 40
AGP_GNT# 41
AGP_FRAME# 41
AGP_IRDY# 41
AGP_TRDY# 41
AGP_DEVSEL# 41
AGP_STOP# 41
R147 0
R0402 +/-5%
R152 0
R0402 +/-5%
AGP8X_MB_DETJ 41
@648
AGP_ADSTBS_0 41
@648
AGP_ADSTBS_1 41
@648
AVREFGC
2
VAD[0..11] 40,41
VBD[0..11] 40,41
VBCTL[0..1] 40,41
VAHSYNC 40,41
VAVSYNC 40,41
ST[0..2]
SBA[1..7] 41
AC-BE[0..3] 41
A4XAVDD
BC641
0.1uF
*
C0402
A4XAVSS
VBHCLK 40
@648
AGP_RBF# 41
R670 0
R0402 +/-5%
AGCLK
AGPREF 41,46
Sis FAE release demo ver0.8
change Value 200 Ohm from 300 Ohm
lonny 070704
BGCLK
R163 0
R0402 +/-5%
BGCLK
R645 10
R0402 +/-5%
16V, X7R, +/-10%
AVREFGC
R633 10
R0402 +/-5%
16V, X7R, +/-10%
BCLK
R635 10
R0402 +/-5%
@648
AGCLK
@648
BC664
0.1uF
C0402
Dummy
BC658
0.1uF
C0402
Dummy
BHSYNC
BVSYNC
VADE
VBDE
*
A1XAVDD
AGP_ADSTBF_0 41
AGP_ADSTBF_1 41
A1XAVSS
*
BC653
0.1uF
*
C0402
*
This part only for 661FX, and 648FX dummy
Title
Document Number Rev
Date: Sheet
661S03
FB41
21
FB L0805 60 Ohm
BC640
10nF
C0402
JP17
12
SHORT
BC639
0.1uF
*
C0402
VAGCLK 40
VDDQ
VBGCLK 40
VBCLK 40,41
1
VBHSYNC 40,41
VBVSYNC 40,41
VADE 40,41
VBDE 40,41
+3V
BC636
10uF
*
C1206
FB40
FB L0805 60 Ohm
BC638
10nF
*
C0402
JP16
SHORT
R640
200
+/-1%
R0603
R646
200
+/-1%
R0603
TECHNOLOGY COPR.
of
550Friday, August 13, 2004
+3V
21
BC637
10uF
*
C1206
12
A
A
Page 6

8
/RMD[0..63]
/RDQM[0..7]
/RDQS[0..7]
/RCS-[0..3]
CKE[0..5]
D D
/RMD7 MD7
RN24
/RDQM0 DQM0
10
+/-5%
/RMD0 MD0
8P4R0603
/RMD6
RN23
/RDQS0
10
/RMD5 MD5
+/-5%
/RMD4 MD4
8P4R0603
/RDQS1
RN25
/RMD12
10
/RMD8
+/-5%
/RMD3 MD3
8P4R0603
RN28
10
/RMD17
+/-5%
/RMD20
8P4R0603
/RDQM1 DQM1
RN26
/RMD13 MD13
10
/RMD9 MD9
+/-5%
/RMD2 MD2
8P4R0603
/RMD11
RN27
/RMD14
10
/RMD15
+/-5%
/RMD10
8P4R0603
/RMD29 /RMD24
update sch following layout
C C
0719
B B
/RMD29 MD29
RN30
/RMD24 MD24
10
+/-5%
8P4R0603
/RMD19
RN31
/RMD22
10
/RMD18
+/-5%
/RDQS2
8P4R0603
RN33
/RMD30 MD30
10
+/-5%
/RDQS3
8P4R0603
/RMD31 MD31
RN32
/RMD26
10
/RMD25
+/-5%
/RMD28 MD28
8P4R0603
/RMD39 MD39
RN35
10
+/-5%
8P4R0603
/RMD53
RN39
/RMD49 MD49
10
/RMD47
+/-5%
/RMD42 MD42
8P4R0603
/RDQM4
RN34
/RMD34 MD34
10
/RMD37
+/-5%
/RMD36 MD36
8P4R0603
/RDQM5
RN37
/RMD45
10
/RMD44
+/-5%
/RMD38
8P4R0603
RN38
/RMD48 MD48
10
/RMD46 MD46
+/-5%
/RMD43 MD43
8P4R0603
/RDQS5
RN36
/RMD41
10
/RMD40 MD40
+/-5%
/RMD35 MD35
8P4R0603
/RDQM6
RN41
/RMD54
10
/RMD51
+/-5%
/RDQS6
8P4R0603
/RMD57
RN40
/RMD60 MD60
10
/RMD55
+/-5%
/RMD50
8P4R0603
/RMD63
/RMD62
/RDQM7
/RMD56
/RMD59
/RMD58 MD58
/RDQS7 DQS7
/RMD61 MD61
RN42
10
+/-5%
8P4R0603
RN43
10
+/-5%
8P4R0603
7
/RMD[0..63] 19,20
/RDQM[0. .7] 19,20
/RDQS [ 0 ..7] 19,20
/RCS-[ 0..3] 19,20
CKE[0. . 5] 19,20
1
2
*
3
4
5
6
7 8
1
2
*
3
4
5
6
7 8
1
2
*
3
4
5
6
7 8
1
2
*
3
4
5
6
7 8
1
2
*
3
4
5
6
7 8
1
2
*
3
4
5
6
7 8
1
2
*
3
4
5
6
7 8
1
2
*
3
4
5
6
7 8
1
2
*
3
4
5
6
7 8
1
2
*
3
4
5
6
7 8
1
2
*
3
4
5
6
7 8
1
2
*
3
4
5
6
7 8
1
2
*
3
4
5
6
7 8
1
2
*
3
4
5
6
7 8
1
2
*
3
4
5
6
7 8
1
2
*
3
4
5
6
7 8
1
2
*
3
4
5
6
7 8
1
2
*
3
4
5
6
7 8
1
2
*
3
4
5
6
7 8
1
2
*
3
4
5
6
7 8
MD1/RMD1
MD6
DQS0
DQS1
MD12
MD8
MD21/RMD21
MD16/RMD16
MD17
MD20
MD11
MD14
MD15
MD10
MD23/RMD23
DQM2/RDQM2
MD19
MD22
MD18
DQS2
MD27/RMD27
DQM3/RDQM3
DQS3
MD26
MD25
DQS4/RDQS4
MD33/RMD33
MD32/RMD32
MD53
MD47
DQM4
MD37
DQM5
MD45
MD44
MD38
MD52/RMD52
DQS5
MD41
DQM6
MD54
MD51
DQS6
MD57
MD55
MD50
MD63
MD62
DQM7
MD56
MD59
6
/RMD[0..63]
/RMA[0..14]
MD0
MD1
MD2
MD3
MD4
MD5
MD6
MD7
DQM0
DQS0
MD8
MD9
MD10
MD11
MD12
MD13
MD14
MD15
DQM1
DQS1
MD16
MD17
MD18
MD19
MD20
MD21
MD22
MD23
DQM2
DQS2
MD24
MD25
MD26
MD27
MD28
MD29
MD30
MD31
DQM3
DQS3
MD32
MD33
MD34
MD35
MD36
MD37
MD38
MD39
DQM4
DQS4
MD40
MD41
MD42
MD43
MD44
MD45
MD46
MD47
DQM5
DQS5
MD48
MD49
MD50
MD51
MD52
MD53
MD54
MD55
DQM6
DQS6
MD56
MD57
MD58
MD59
MD60
MD61
MD62
MD63
DQM7
DQS7
MD[0..63]
AN35
AP36
AK33
AM33
AN34
AK32
AR34
AN33
AR35
AP34
AM32
AL31
AR31
AL30
AN32
AR33
AN31
AM31
AR32
AP32
AP30
AR30
AM29
AL27
AN30
AN29
AL28
AN28
AL29
AR29
AP26
AN25
AR24
AL24
AL25
AR26
AM25
AN24
AP24
AR25
AN21
AP20
AN20
AL18
AM21
AR21
AL19
AM19
AL20
AR20
AL15
AL14
AN15
AR15
AN16
AM15
AN14
AL13
AP16
AR16
AM13
AL12
AL11
AR12
AP14
AR14
AN13
AP12
AN12
AR13
AL10
AR11
AM9
AR9
AM11
AN11
AP10
AN9
AN10
AR10
/RMD[0..63] 19,20
/RMA[0..14] 19,20
U37B
MD0
MD1
MD2
MD3
MD4
MD5
MD6
MD7
DQM0
DQS0/CSB0#
MD8
MD9
MD10
MD11
MD12
MD13
MD14
MD15
DQM1
DQS1/CSB1#
MD16
MD17
MD18
MD19
MD20
MD21
MD22
MD23
DQM2
DQS2/CSB2#
MD24
MD25
MD26
MD27
MD28
M661FX-2
MD29
MD30
MD31
DQM3
DQS3/CSB3#
MD32
MD33
MD34
MD35
MD36
MD37
MD38
MD39
DQM4
DQS4/CSB4#
MD40
MD41
MD42
MD43
MD44
MD45
MD46
MD47
DQM5
DQS5/CSB5#
MD48
MD49
MD50
MD51
MD52
MD53
MD54
MD55
DQM6
DQS6/CSB6#
MD56
MD57
MD58
MD59
MD60
MD61
MD62
MD63
DQM7
DQS7/CSB7#
SiSM661FX
5
MA0
MA1
MA2
MA3
MA4
MA5
MA6
MA7
MA8
MA9
MA10
MA11
MA12
MA13
MA14
TEST1
SRAS#
SCAS#
SWE#
CS0#
CS1#
CS2#
CS3#
CS4#
CS5#
CKE0
CKE1
CKE2
CKE3
CKE4
CKE5
S3AUXSW#
FWDSDCLKO
SDRCLKI
DLLAVDD
DLLAVSS
DDRAVDD
DDRAVSS
DDRVREFB
DDRVREFA
DRAM_SEL
DDRCOMP_P
DDRCOMP_N
4
CKE4
R621 0 R0402dummy
CKE2
R622 0 R0402dummy
CKE3
R623 0 R0402dummy
CKE5
R624 0 R0402dummy
CKE0
R620 0 R0402dummy
CKE1
R619 0 R0402dummy
R627 0 R0402
MA0
AR23
MA1
MA3 /RMA3
AN23
MA2
AN22
MA3
AM23
MA4
AL23
MA5
AL26
MA6
AN26
MA7
AN27
MA8
AR27
MA9
AR28
MA10
AP22
MA11
AN18
MA12 MA8
AR22
MA13
AP28
MA14
AM27
AT14
SRAS-
AL17
SCAS-
AR19
SWE-
AN19
CS-0
AM17
CS-1
AL16
DEBUG4
AN17
DEBUG5
AR17
AP18
AR18
DEBUG8 CKE0
AP4
DEBUG9
AT3
AR3
AP3
AR2
AN4
DEBUG14
AP2
ADCLKO FWDSDCLKO
AL21
AL22
DLLAVDD
AL35
DLLAVSS
AL34
DDRAVDD
AM35
DDRAVSS
AN36
DDRVREFB
AF16
DDRVREFA
AF23
AP1
DDRCOMP
AR8
DDRCOMN
AP8
R644 0 R0402
MA4
R642 0 R0402
MA2
R651 0 R0402
MA1
MA10
MA12
MA6
DEBUG4
DEBUG5
MA7
MA9
MA13
R661 0 R0402
R660 0 R0402
R665 0 R0402
CS-0
MA11
MA5
For debug mode
R119 22
R0402 +/-5%
R652 0 R0402
R647 0 R0402
R656 0 R0402
R655 0 R0402
R641 0 R0402
R668 0 R0402
R667 0 R0402
R626 0 R0402
R636 0 R0402
R630 0 R0402
R631 0 R0402
R671 0
R672 0
R664 0
R637 0
R612 0
R618 0
R628 0
R0402 +/-5%
3
/RMA4
/RMA2
/RSRAS/RSCAS/RSWE-
S3AUXSW-
40 ohms
DDRCOMN
40 ohms
DDRCOMP
VDIMM
/RMA14MA14
/RMA1
/RMA0MA0
/RMA10
/RMA12
/RMA6
/RCS-2
/RCS-3
/RMA8
/RMA7
/RMA9
/RMA13
/RSRAS- 19,20
/RSCAS- 19,20
/RSWE- 19,20
/RCS-1CS-1
/RCS-0
/RMA11
/RMA5
CKE1
CKE2DEBUG10
CKE3DEBUG11
CKE4DEBUG12
CKE5DEBUG13
FWDSDCLKO 14
R609 40.2
R0402 +/-1%
R610 40.2
R0402 +/-1%
S3AUXSW- 10,38
VDIMM
DDRAVDD
DDRAVSS
2
DDRVREFB
DDRVREFA
FWDSDCLKO
DLLAVDD
DLLAVSS
*
*
*
*
*
BC185 10pF
C0603 50V, NPO, +/-5%
BC602
0.1uF
*
C0402
BC102
BC101
10nF
0.1uF
*
C0402
C0402
JP2
BC186
10nF
C0402
BC199
10nF
16V, X7R, +/-10%
C0402
VDIMM
BC163
10nF
16V, X7R, +/-10%
C0402
BC144
10nF
16V, X7R, +/-10%
C0402
*
FB36 FB L0805 60 Ohm
BC603
10nF
*
C0402
JP13 SHORT
FB8
21
FB L0805 60 Ohm
12
SHORT
1
VDIMM
R120
150
+/-1%
R0603
R123
150
+/-1%
R0603
R116
150
+/-1%
R0603
R102
150
+/-1%
R0603
+3V
21
BC598
10uF
*
C1206
12
+3V
BC104
10uF
*
10V, Y5V, +80%/-20%
C1206
A
Title
TECHNOLOGY C OPR.
Document Number Rev
Date: Sheet
661S03
of
650Friday, August 13, 2004
A
Page 7

8
ZAD[0..16]9
ZAD[0..16]
D D
7
6
5
4
3
NB Hardware Trap
(for SiS internal test only)
DLLENTRAP0
TRAP1
2
R139 0
R0402 +/-5%
R141 0
R0402 +/-5%
R144 0
R0402 +/-5%
1
+3V
dummy
dummy
dummy
+1.8V
ZCLK013
ZUREQ9
ZDREQ9
ZSTB09
ZSTB-09
ZSTB19
ZSTB-19
R138
75
+/-1%
R0402
R153
150
+/-1%
R0603
R146
150
+/-1%
R0603
BC248
0.1uF
*
16V, X7R, +/-10%
C0402
ZVREF
BC231
0.1uF
*
16V, X7R, +/-10%
C0402
C C
+3V
FB43 FB L0805 60 Ohm
21
BC670
10uF
*
C1206
JP18
SHORT
+3V
FB42 FB L0805 60 Ohm
BC669
10uF
*
C1206
JP19
B B
SHORT
+1.8V
FB11 FB L0805 60 Ohm
BC229
10uF
*
C1206
JP4
SHORT
BC657
0.1uF
*
C0402
12
21
BC649
0.1uF
*
C0402
12
21
BC230
0.1uF
*
C0402
12
ENTEST
PWRGD
AUXOK
Z1XAVDD
BC650
10nF
*
16V, X7R, +/-10%
C0402
Z1XAVSS
Z4XAVDD
BC656
10nF
*
16V, X7R, +/-10%
C0402
Z4XAVSS
BC233
10nF
*
16V, X7R, +/-10%
C0402
R142 4.7K
R0402 +/-5%
BC648 0.1uF C0402
BC655 0.1uF C0402
R148 56
R0603 +/-1%
R149 56
R0603 +/-1%
*
*
ZCLK0
ZUREQ
ZDREQ
ZSTB0
ZSTB-0
ZSTB1
ZSTB-1
ZAD0
ZAD1
ZAD2
ZAD3
ZAD4
ZAD5
ZAD6
ZAD7
ZAD8
ZAD9
ZAD10
ZAD11
ZAD12
ZAD13
ZAD14
ZAD15
ZAD16
ZVREF
ZCMP_N
ZCMP_P
Z1XAVDD
Z1XAVSS
Z4XAVDD
Z4XAVSS
NBRSTJ9
AUXOK10,32
ZCMP_P
PWRGD10,15,31
ZCMP_N
AL6
AL4
AK5
AE3
AF2
AH5
AK2
AH2
AH4
AG3
AG6
AF4
AG2
AF5
AG4
AD2
AE6
AE2
AE4
AL3
AK4
AD5
AD4
AN1
AM2
AL2
AL1
AJ2
AJ3
AJ4
AJ6
U37C
ZCLK
ZUREQ
ZDREQ
ZSTB0
ZSTB0#
ZSTB1
ZSTB1#
ZAD0
ZAD1
ZAD2
ZAD3
ZAD4
ZAD5
ZAD6
ZAD7
ZAD8
ZAD9
ZAD10
ZAD11
ZAD12
ZAD13
ZAD14
ZAD15
ZAD16
ZVREF
ZCOMP_N
ZCOMP_P
Z1XAVDD
Z1XAVSS
Z4XAVDD
Z4XAVSS
SiSM661FX
PWRGD
AUXOK
HyperZip
M661FX-3
PCIRST#
PWROK
AUXOK
TRAP1F9TRAP0
TESTMODE2C9TESTMODE1B9TESTMODE0
D10
AN2
AN3
AM4
TRAP1
TMODE2
TRAP0
A15
VOSCI
B12
ROUT
B13
GOUT
A13
VGA
DLLEN#
ENTEST
D9
B10
E10
TMODE0
ENTEST
TMODE1
DLLEN-
BOUT
HSYNC
VSYNC
VGPIO0
VGPIO1
INT#A
CSYNC
RSYNC
LSYNC
VCOMP
VRSET
VVBWN
DACAVDD1
DACAVSS1
DACAVDD2
DACAVSS2
DCLKAVDD
DCLKAVSS
ECLKAVDD
ECLKAVSS
A11
B11
E13
C11
C10
D12
E12
D11
E15
D15
E14
D13
C12
D14
C13
B15
C15
B14
C14
DCLKAVDD
DCLKAVSS
ECLKAVDD
ECLKAVSS
BC628
C0402
BC632
C0402
R606 33 R0402
R605 33 R0402
R132 100 R0402
R135 100 R0402
Update sch basis on demo ver0.8
lonny 2004/07/12
CSYNC
RSYNC
LSYNC
VCOMP
VRSET
VVBWN
DACAVDD
DACAVSS
DACAVDD
DACAVSS
DCLKAVDD
DCLKAVSS
ECLKAVDD
ECLKAVSS
10nF
*
*
10nF
*
*
REFCLK0 13
302LV_CRT_R 18
302LV_CRT_G 18
302LV_CRT_B 18
302LV_CRTHS_VGA 18
302LV_CRTVS_VGA 18
302LV_DDCCLK 18
302LV_DDCDAT 18
INT-A 9,2 2,23,40
FB38 FB L0805 60 Ohm
21
BC627
0.1uF
C0402
JP14
SHORT
FB39 FB L0805 60 Ohm
BC633
0.1uF
C0402
JP15
SHORT
BC626
10uF
*
C1206
12
21
BC631
10uF
*
C1206
12
This part only for 661FX, and 648FX reserved.
+3V
+3V
TMODE0
TMODE1
TMODE2
RSYNC
LSYNC
CSYNC TBD
RSYNC
LSYNC
CSYNC
RSYNC
LSYNC
CSYNC
VVBWN
BC197 0.1uF C0402
VCOMP
BC187 0.1uF C0402
DACAVDD
DACAVSS
R137 0
R0402 +/-5%
R608 0
R0402 +/-5%
R607 0
R0402 +/-5%
VGA Interrupt
TBD
R130 4.7K
R0402 +/-5%
R140 4.7K
R0402 +/-5% Dummy
R133 4.7K
R0402 +/-5% Dummy
R131 4.7K
R0402 +/-5% Dummy
R136 4.7K
R0402 +/-5%
R134 4.7K
R0402 +/-5%
*
*
*
BC198
0.1uF
C0402
*
FB10 FB L0805 60 Ohm
BC201
1uF
C0603
JP3
SHORT
This part only for 661FX, and 648FX reserved.
+3V
dummy
dummy
dummy
Enable Disable
1
1
1
+3V
VRSET
+1.8V
21
12
0
0
0
BC194
10uF
*
C1206
R122
130
+/-1%
R0402
A
Title
TECHNOLOGY C OPR.
Document Number Rev
Date: Sheet
661S03
of
750Friday, August 13, 2004
A
Page 8

8
+VCCP
A17
A18
A19
A20
A21
B17
L25
VTT
L26
VTT
M18
VTT
M19
VTT
M20
VTT
M21
D D
VDIMM
C C
B B
VTT
M22
VTT
M23
VTT
M24
VTT
M25
VTT
M26
VTT
N25
VTT
P25
VTT
R25
VTT
T25
VTT
U25
VTT
V25
VTT
W25
VTT
Y25
VTT
AA25
VTT
AL7
VDDM
AL8
VDDM
AL9
VDDM
AM6
VDDM
AM7
VDDM
AM8
VDDM
AN5
VDDM
AN6
VDDM
AN7
VDDM
AN8
VDDM
AP5
VDDM
AP6
VDDM
AP7
VDDM
AR4
VDDM
AR5
VDDM
AR6
VDDM
AR7
VDDM
AT4
VDDM
AT5
VDDM
AT6
VDDM
AT7
VDDM
AB25
VDDM
AC25
VDDM
AD12
VDDM
AD25
VDDM
AE11
VDDM
AE12
VDDM
AE13
VDDM
AE14
VDDM
AE15
VDDM
AE16
VDDM
AE17
VDDM
AE18
VDDM
AE19
VDDM
AE20
VDDM
AE21
VDDM
AE22
VDDM
AE23
VDDM
AE24
VDDM
AE25
VDDM
AE26
VDDM
AF11
VDDM
AF12
VDDM
AF25
VDDM
AF26
VDDM
AB24
PVDDM
AC13
PVDDM
AD14
PVDDM
AD16
PVDDM
AD18
PVDDM
AD20
PVDDM
AD22
PVDDM
P14
VSS
P15
VSS
P16
VSS
P17
VSS
P18
VSS
P19
VSS
P20
VSS
P21
VSS
P22
VSS
P23
VSS
R14
VSS
R15
VSS
R16
VSS
R17
VSS
R18
VSS
R19
VSS
R20
VSS
R21
VSS
R22
VSS
R23
VSS
T14
VSS
T15
VSS
T16
VSS
T17
VSS
T18
VSS
T19
VSS
T20
VSS
T21
VSS
T22
VSS
T23
VSS
U14
VSS
U15
VSS
U16
VSS
U17
VSS
U18
VSS
U19
VSS
U20
VSS
U21
VSS
U22
VSS
U23
VSS
V14
VSS
V15
VSS
V16
VSS
V17
VSS
V18
VSS
V19
VSS
V20
VSS
V21
VSS
V22
VSS
V23
VSS
W14
VSS
W15
VSS
W16
VSS
W17
VSS
W18
VSS
W19
VSS
W20
VSS
W21
VSS
W22
VSS
W23
VSS
B18
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
Y14
Y15
Y16
Y17
Y18
Y19
Y20
Y21
7
IVDD
N13
B19
B20
B21
C17
C18
C19
C20
C21
D17
D18
D19
D20
D21
E17
VTT
VTT
VTT
VTT
VTT
E18
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
N14
E19
E20
E21
F17
F18
F19
F20
F21
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
IVDD
M661FX-4
Power
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
Y22
Y23
AA14
AA15
AA16
AA17
AA18
AA19
AA20
AA21
AA22
AA23
AB14
AB15
AB16
VSS
AB17
AB18
AB19
AB20
AB21
AB22
AB23
AC14
AC15
AC16
6
+1.8V
N16
N18
N19
N21
N23
N24
P13
P24
T24
V24
W13
Y24
AA24
AB13
AC24
AD13
N20
N22
R24
T13
U24
V13
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
PVDD
PVDD
PVDD
PVDD
PVDD
PVDD
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AC17
AC18
AC19
AC20
AC21
AC22
VSS
VSS
VSS
AF34
AE32
AE36
AC32
AC36
AD34
AC23
AG32
AD15
W24
Y13
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
PVDD
PVDD
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AJ32
AH34
AG36
AM10
AM12
AM14
AM16
AM18
AM20
5
+1.8V
AD17
AD19
AD21
AD23
AD24
R13
U13
AA13
N15
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
PVDD
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AP9
AP11
AP13
AP15
AP17
AM22
AM24
AM26
AM28
AM30
AD3
AE1
AF3
AH3
AJ1
AK3
VDDZ
VDDZ
VDDZ
VSS
VSS
VSS
AP19
AP21
AP23
AG1
AM3
W11
W12
Y11
Y12
AA12
VDDZ
VDDZ
VDDZ
VDDZ
VDDZ
VDDZ
VDDZ
VDDZ
VDDZ
VDDZ
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AT8
AT10
AT12
AT16
AP25
AP27
AT18
AP29
AP31
AP33
AP35
NCD4NCD5NC
VSS
AT20
4
+3V
AUX_IVDD
AM5
VSS
VSS
VSS
AT22
AT24
U37D
L17
M17
N17
AB12
AUX_IVDD
AC12
AA1
AA2
AA3
AA4
AA5
AA6
AB1
AB2
AB3
AB4
AB5
AB6
AC1
AC2
AC3
AC4
AC5
AC6
L11
L12
L13
M11
M12
M13
M14
M15
M16
N11
N12
P12
R12
T12
U12
V12
B16
C16
D16
E16
F15
E11
F11
F13
AL33
AM34
A9
A3
A5
C1
C3
C5
E1
E5
E7
E9
F3
G1
G5
H3
J1
J5
K3
L1
L5
M3
N1
N5
P3
R1
R5
T3
U1
U5
V3
W1
W5
Y3
AE5
AG5
AJ5
AL5
A22
A24
A26
A28
A30
A32
A34
C23
C25
C27
C29
C31
C34
C36
E22
E24
E26
E28
E30
E32
E36
F34
G32
G36
H34
J32
J36
K34
L32
L36
M34
N32
N36
P34
R32
T34
U32
U36
V34
W32
W36
Y34
AA32
AA36
AB34
SiSM661FX
3VAUX
VDDQ
IVDD
change to DPWR#
AUX3.3
VDD3.3
VDD3.3
VDD3.3
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
IVDD
IVDD
IVDD
IVDD
IVDD
NC
NC
NC
NC
NC
NC
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AL32
AT26
AT28
AT30
AT32
AT34
3
AUX_IVDD 3VAUX
BC659 10uF
BC257 0.1uF C0402
BC251 0.1uF
C0402 16V, X7R, +/-10%
+VCCP
BC189 10uF
C1206
*
BC129 0.1uF C0402
*
Dummy
BC156 10uF
C1206
*
BC124 0.1uF C0402
*
Dummy
VDDQ
648 solder side
BC216 0.1uF C0402
*
BC221 0.1uF C0402
*
BC196 0.1uF C0402*BC190 0.1uF C0402
*
BC212 0.1uF C0402
*
close to 648
and on VDDQ
plane
Place these capacitors under 661 solder side
C1206
*
*
Dummy
*
BC155 1uF
*
BC127 0.1uF C0402
*
Dummy
BC128 0.1uF C0402
*
Dummy
BC123 0.1uF C0402
*
Dummy
BC223 0.1uF C0402
BC224 0.1uF C0402
BC222 0.1uF C0402
+1.8V
BC151 0.1uF C0402
BC204 0.1uF C0402
BC147 0.1uF C0402
Dummy
BC171 0.1uF C0402
Dummy
BC237 10uF
C1206
*
BC228 1uF
C0603
*
BC226 0.1uF
C0402 16V, X7R, +/-10%
*
BC182 0.1uF
C0603
BC126 0.1uF C0402
BC174 0.1uF C0402
BC122 0.1uF C0402
VDIMM
BC225 10uF
*
BC238 10uF
*
BC120 10uF
BC209 10uF
*
VDIMM
BC193 0.1uF C0402
*
BC157 0.1uF C0402
Dummy
*
BC154 0.1uF C0402
*
BC121 0.1uF C0402
*
*
*
Dummy
*
Dummy
*
Dummy
*
*
*
*
*
*
*
*
2
C0402
C1206
C1206
C1206
C1206
661 bottom side
IVDD IVDD
BC205 0.1uF
C0402
*
BC195 0.1uF
C0402
*
BC177 0.1uF
C0402
*
BC200 10uF
C1206
*
BC150 0.1uF C0402
*
Dummy
BC139 0.1uF
C0402
*
BC125 0.1uF C0402
*
Dummy
BC153 0.1uF C0402
*
Dummy
BC158 0.1uF C0402
*
Dummy
BC173 1uF
C0603
*
BC235 1uF
C0603
*
BC236 0.1uF C0402
*
BC165 0.1uF C0402
*
BC203 0.1uF
C0402
*
BC176 0.1uF
C0402
*
BC146 0.1uF
C0402
*
BC145 0.1uF
C0402
*
BC148 0.1uF
C0402
*
+1.8V
BC254 0.1uF C0402
*
BC660 10uF
C1206
*
BC152 1uF
C0603
*
BC253 0.1uF C0402
*
BC255 0.1uF C0402
*
BC218 1uF
C0603
*
BC132 1uF
C0603
*
BC138 0.1uF C0402
*
BC202 0.1uF C0402
*
3VAUX
BC211 0.1uF C0402
*
BC219 0.1uF C0402
*
VDDQ
BC220 0.1uF C0402
*
Dummy
BC206 0.1uF C0402
*
1
+3V
BC183 0.1uF
C0402
*
A
8
7
change to MA15
Title
Document Number Rev
6
5
4
3
Date: Sheet of
2
661S03
TECHNOLOGY COPR.
850Friday, August 13, 2004
1
A
Page 9

8
RN18
INT-D
1
*
INT-A
3
INT-B
5
INT-C
7 8
8.2K
+/-1%
8P4R0603
PREQ-4
R250 4.7K
R0402 +/-5%
D D
PGNT-4
R252 4.7K
R0402 +/-5%
PCIRSTJ 15,17,22,23,29,40,41
NBRSTJ 7
C C
U11
1
I1
2
O1
3
I2
4
O2
5
I3
6
O3
7
GND
74LVC14
B B
R261
75
+/-1%
R0402
+1.8V
+3V
2
4
6
+3V
14
Vcc
13
I6
12
O6
11
I5
10
O5
9
I4
8
O4
R262
*
150
+/-1%
R0603
R767
*
150
+/-1%
R0603
JP7
12
SHORT
7
REQ3J23
REQ2J23
REQ1J22
REQ0J29
GNT3J23
GNT2J23
GNT1J22
GNT0J29
C/BE3J2 2,23,29
C/BE2J22,23,29
C/BE1J22,23,29
C/BE0J22,23,29
INT-A7,22,23,40
INT-B41,46
INT-C22,23,29
INT-D22,23
FRAMEJ2 2,23,29
IRDYJ22,23,29
TRDYJ22,23,29
STOPJ2 2,23,29
SERRJ22,23,29
PAR22,23,29
DEVSELJ22,23,29
96XPCLK13
PCIRSTJ
PCIRSTJ 15,17,22,23,29,40,41
ZCLK113
ZSTB07
ZSTB-07
ZSTB17
ZSTB-17
ZUREQ7
ZDREQ7
SVDDZCMP
SZCMP_N
SZCMP_P
SVSSZCMP
BC348
0.1uF
C0402
SZVREF
BC355
0.1uF
C0402
SZ1XAVDD
SZ1XAVSS
SZ4XAVDD
SZ4XAVSS
SZVREF
ZAD16
REQ3J
REQ2J
REQ1J
REQ0J
GNT3J
GNT2J
GNT1J
GNT0J
C/BE3J
C/BE2J
C/BE1J
C/BE0J
INT-A
INT-B
INT-C
INT-D
ZCLK1
ZSTB0
ZSTB-0
ZSTB1
ZSTB-1
ZUREQ
ZDREQ
AD[0..31]22,23,29
PREQ-4
PGNT-4
FRAMEJ
IRDYJ
TRDYJ
STOPJ
SERRJ
PAR
DEVSELJ
ZAD[0..16]7
M19
V20
N20
K20
N16
N17
R19
N18
R18
P18
U20
U19
T20
T19
R20
P20
J20
F1
F2
E1
H5
F3
H3
G1
G2
G3
H4
K3
M4
P1
R4
E3
F4
E2
G4
M3
M1
M2
N4
M5
N3
N1
N2
Y2
C3
6
AD[0..31]
PREQ4#
PREQ3#
PREQ2#
PREQ1#
PREQ0#
PGNT4#
PGNT3#
PGNT2#
PGNT1#
PGNT0#
C/BE3#
C/BE2#
C/BE1#
C/BE0#
INTA#
INTB#
INTC#
INTD#
FRAME#
IRDY#
TRDY#
STOP#
SERR#
PAR
DEVSEL#
PLOCK#
PCICLK
PCIRST#
ZCLK
ZSTB0
ZSTB0#
ZSTB1
ZSTB1#
ZUREQ
ZDREQ
VDDZCMP
ZCMP_N
ZCMP_P
VSSZCMP
Z1XAVDD
Z1XAVSS
Z4XAVDD
Z4XAVSS
ZVREF
ZAD16
5
AD22
AD31
AD31J5AD30J4AD29H2AD28H1AD27J3AD26K4AD25J2AD24J1AD23K5AD22K2AD21L3AD20K1AD19L1AD18L4AD17L5AD16L2AD15N5AD14P2AD13P3AD12P4AD11R2AD10
AD24
AD28
AD29
AD27
AD30
AD20
AD18
AD25
AD26
AD19
AD21
AD23
PCI
963-1
HyperZip
ZAD0
ZAD1
ZAD2
ZAD3
ZAD4
ZAD5
ZAD6
ZAD7
ZAD8
ZAD9
ZAD10
ZAD11
ZAD12
M18
L16
L20
N19
M17
M16
M20
ZAD0
ZAD1
ZAD6
ZAD4
ZAD3
ZAD5
ZAD2
J18
L18
K18
K19
K17
K16
H20
ZAD12
ZAD7
ZAD11
ZAD13
ZAD9
ZAD8
ZAD10
4
AD17
AD16
ZAD13
ZAD14
H19
H18
ZAD14
ZAD15
AD10
AD9
AD13
AD11
AD12
R3
AD8
AD9R1AD8T1AD7P5AD6T2AD5U1AD4U2AD3T3AD2R5AD1U3AD0
AD15
AD14
IDE
ZAD15
AD1
AD7
AD6
AD0
AD2
AD3
AD4
AD5
V1
IDEAVDD
IDEAVSS
ICHRDYA
IDREQA
IIRQA
CBLIDA
IIORA#
IIOWA#
IDACKA#
IDSAA2
IDSAA1
IDSAA0
IDECSA1#
IDECSA0#
ICHRDYB
IDREQB
IIRQB
CBLIDB
IIORB#
IIOWB#
IDACKB#
IDSAB2
IDSAB1
IDSAB0
IDECSB1#
IDECSB0#
IDA0
IDA1
IDA2
IDA3
IDA4
IDA5
IDA6
IDA7
IDA8
IDA9
IDA10
IDA11
IDA12
IDA13
IDA14
IDA15
IDB0
IDB1
IDB2
IDB3
IDB4
IDB5
IDB6
IDB7
IDB8
IDB9
IDB10
IDB11
IDB12
IDB13
IDB14
IDB15
U18A
Y3
Y4
W10
V10
Y11
U12
V11
Y9
Y10
T11
U11
W11
T12
V12
W17
Y17
T16
U17
T14
W16
V16
Y18
T15
V17
U16
W18
U10
V9
W8
T9
Y7
V7
Y6
Y5
W6
U8
W7
V8
U9
Y8
T10
W9
Y16
V15
U14
W14
V13
T13
Y13
Y12
W12
W13
U13
Y14
V14
W15
Y15
U15
SiS963L
3
ICHRDYA
IDEREQA
IDEIRQA
CBLIDA
IDEIOR-A
IDEIOW-A
IDACK-A
IDESAA2
IDESAA1
IDESAA0
IDECS-A1
IDECS-A0
ICHRDYB
IDEREQB
IDEIRQB
IDEIOR-B
IDEIOW-B
IDACK-B
IDESAB2
IDESAB1
IDESAB0
IDECS-B196XPCLK
IDECS-B0
HDD0
HDD1
HDD2
HDD3
HDD4
HDD5
HDD6
HDD7
HDD8
HDD9
HDD10
HDD11
HDD12
HDD13
HDD14
HDD15
CDD0
CDD1
CDD2
CDD3
CDD4
CDD5
CDD6
CDD7
CDD8
CDD9
CDD10
CDD11
CDD12
CDD13
CDD14
CDD15
*
2
R296 0
R0603 +/-1%
BC399
10nF
C0402
BC406
0.1uF
*
C0402
ICHRDYA 17
IDEREQA 17
IDEIRQA 17
CBLIDA 17
IDEIOR-A 17
IDEIOW-A 17
IDACK-A 17
IDESAA2 17
IDESAA1 17
IDESAA0 17
IDECS-A1 17
IDECS-A0 17
ICHRDYB 17
IDEREQB 17
IDEIRQB 17
IDEIOR-B 17
IDEIOW-B 17
IDACK-B 17
IDESAB2 17
IDESAB1 17
IDESAB0 17
IDECS-B1 17
IDECS-B0 17
HDD[0..15] 17
CDD[0..15] 17
Put near 96X Chip.
only for MUTIOL 1.0 backup solution
ZSTB0
ZSTB1
+1.8V
BC405
0.1uF
*
C0402
R255 0 R0402 dummy
R251 0 R0402 dummy
1
+1.8V
Analog Power supplies of Transzip function for 96X Chip.
+3V +3V
*
BC409
10uF
C1206
FB57
FB L1806 60 Ohm
21
JP9
12
SHORT
BC384
BC385
0.1uF
C0402
10nF
*
C0402
*
SZ1XAVDD
SZ1XAVSS
+1.8V
FB55
FB L1806 60 Ohm
21
BC391
10uF
*
C1206
JP8
SHORT
BC376
0.1uF
*
*
C0402
12
BC377
10nF
C0402
SZ4XAVDD
*
SZ4XAVSS
BC731
10uF
C1206
FB54
FB L1806 60 Ohm
21
JP6
12
SHORT
SVDDZCMP
BC739
BC740
10nF
C0402
R754 56
R0603 +/-1%
R257 56
R0603 +/-1%
0.1uF
*
*
C0402
SZCMP_N
SZCMP_P
SVSSZCMP
ZSTB-0
ZSTB-1
R256 0 R0402 dummy
R254 0 R0402 dummy
TECHNOLOGY C OPR.
Title
Document Number Rev
Date: Sheet
661S03
of
950Friday, August 13, 2004
A
A
Page 10

Programable on-die pull-high strength for CPU_S:
( Infinite, 150, 110, 56 Ohm)
D D
C C
B B
8
SMBDAT13,14,19,46
SMBCLK13,14,19,46
PCSPK11,27
DPRSLPVR4,31
PMEJ22,23
AUXOK7,32
H_INITJ
H_A20MJ
H_SMIJ
H_INTR
H_NMI
H_IGNNEJ
H_FERRJ
H_STPCLKJ
H_CPUSLPJ
1
2
3 4
H_INITJ3
H_A20MJ3
H_SMIJ3
H_INTR3
H_NMI3
H_IGNNEJ3
H_FERRJ3
H_STPCLKJ3
SUSBJ15,29
SUSCJ15
SUSON15,33,38
H_CPUSLPJ3
CPU_PROCHOTJ3
PM_THRMTRIPJ3
LFRAMEJ/FWH415
SERIRQ15,23
BATOK32
PWRGD7,15,31
AC_SDIN027
AC_SDIN122
AC_SDOUT11,22,27
AC_SYNC22,27
AC_RESETJ22,27
AC_BITCLK22,27
REFCLK113
PWRBTN15
R615 100 R0603 +/-1%
R616 100 R0603 +/-1%
+3V
S3AUXSW-6,38
R290 10K
R0402 +/-1%
LAD0/FWH015
LAD1/FWH115
LAD2/FWH215
LAD3/FWH315
LFRAMEJ/FWH4
LDRQJ
SERIRQ
OSC32KHI
OSC32KHO
BATOK
*
SMBDAT
SMBCLK
AC_SDIN0
AC_SDIN1
AC_SDOUT
AC_SYNC
AC_RESETJ
AC_BITCLK
REFCLK1
SENTEST
PCSPK
PWRBTN
PMEJ
AUXOK
GPIO14
SLP_S3#
SLP_S4#
GPIO17
GPIO18
U40A
3
74LV08
7 14
147
U39B
74HCT14
7
VCCRTC
BC311
0.1uF
16V, X7R, +/-10%
C0402
R0402
R294 0
R771 0
R0402
BC290
0.1uF
*
16V, X7R, +/-10%
C0402
1 2
4
5
7 14
5VAUX5VAUX
+/-5%
+/-5%
147
T18
P16
R17
R16
Y20
U18
T17
W20
V19
Y19
V18
W19
W5
W4
W2
W3
A14
B14
D14
A15
D13
B15
U39A
74HCT14
U40B
6
74LV08
U18B
INIT#
A20M#
SMI#
INTR
NMI
IGNNE#
FERR#
STPCLK#
CPUSLP#
APICCK/LDTREQ#
APICD0/THERM2#
APICD1/GPIOFF#
V5
LAD0
T7
LAD1
U6
LAD2
LAD3
LFRAME#
U7
LDRQ#
V6
SIRQ
C2
OSC32KHI
D2
OSC32KHO
D3
BATOK
D1
PWROK
C1
RTCVDD
E4
RTCVSS
B2
GPIO20
A1
GPIO19
A2
AC_SDIN0
D5
AC_SDIN1
AC_SDOUT
T5
AC_SYNC
D6
AC_RESET#
Y1
AC_BIT_CLK
OSCI
G5
ENTEST
V3
SPK
PWRBTN#
PME#
PSON#
A3
AUXOK
ACPILED
B1
GPIO13/DPRSLPVR
E5
GPIO14
GPIO17/PMDAT
GPIO18/PMCLK
SiS963L
SLP_S4#
SLP_S3#
6
CPU_S
APIC
LPC
RTC
963-2
GPIO
AC97
ACPI
/others
KBC
/geyserville
GPIO
Place near to 96X
AC_BITCLK
5
MII
GPIO1/LDRQ1#
GPIO2/THERM#
GPIO3/EXTSMI#
GPIO4/CLKRUN#
GPIO5/PREQ5#
GPIO6/PGNT5#
GPIO8/RING
GPIO9/AC_SDIN2
GPIO10/AC_SDIN3
GPIO11/OSC25M/STP_PCI#
GPIO12/CPUSTP#
GPIO15/VR_HILO#
GPIO16/LO_HI#
BC389
10pF
*
50V, NPO, +/-5%
C0402
OSC25MHI
OSC25MHO
TXCLK
TXEN
TXD0
TXD1
TXD2
TXD3
RXCLK
RXDV
RXER
RXD0
RXD1
RXD2
RXD3
COL
CRS
MDC
MDIO
MIIAVDD
MIIAVSS
GPIO0
GPIO7
4
MCLK25I
A8
MCLK25O
A9
A6
B6
E8
D7
C6
B4
A7
C7
C8
D8
A5
B5
A4
B7
E9
C5
E7
CLKRUNJ
SMBALTJ
RF_DIS
GPIO11
MIIAVDD
MIIAVSS
SCIJ
THERM-
KBSMIJ
CLKRUNJ
GPIO6
SMBALTJ
CPUSTPGPIO15
GPIO16
R0402 +/-5%
dummy
R0402 +/-5%
dummy
B9
B8
V2
T8
T4
T6
W1
U5
U4
C4
C14
E6
B3
F5
D4
E13
A16
5 6
11 10
R282
R208
9
10
147
147
KBSMIJ 15
4.7K
4.7K
3
U40C
8
74LV08
7 14
U39C
74HCT14_1
U39E
74HCT14_1
SCIJ 15
CLKRUNJ 15,22,29
R238
4.7K
+/-1%
R0603
+3V
3VAUX
12
13
147
9 8
147
13 12
+3V
R253
24.9K
+/-1%
R0603
Q17
B
MMBT3904
E C
(To PWM regulator)
PMEJ
R211 4.7K
R0603 +/-1%
2
U40D
11
74LV08
7 14
U39D
74HCT14_1
U39F
74HCT14_1
H_DPSLPJ 3,31
CPUSTP- 13
3VAUX
Title
Document Number Rev
Date: Sheet
Put closed to 963 CHIP
MCLK25O
MCLK25I
BC287
15pF
*
C0402
MIIAVDD
MIIAVSS
BC291
0.1uF
*
C0402
Analog power of MII
Put closed to 96X CHIP
OSC32KHO
OSC32KHI
BC300
15pF
C0402
NEED NOT to place
close to 96X
LAD1/FWH1
LAD0/FWH0
LAD3/FWH3
LAD2/FWH2
LDRQJ
R794 0
R0402 +/-5% dummy
SERIRQ
R795 0
R0402 +/-5% Dummy
SENTEST
R741 0
R0402 +/-5%
GPIO pins pull down
NEED NOT to place
close to 96X
THERMRF_DIS
CPUSTPGPIO14
SMBDAT
SMBCLK
GPIO18
GPIO11
GPIO6
GPIO17
GPIO15
GPIO16
661S03
10M
R212
dummy
R0402 +/-5%
X6
1 2
OSC-25MHz
FB14
FB L1806 60 Ohm
BC289
10nF
*
C0402
R221 10M
R0603 +/-1%
XTAL-32.768kHz
2 3
*
RN8SMDA
8P4R0603+/-5%
7 8
5
6
3
4
*
1
2
RN45 0
Dummy
R768 4.7K
R0603 +/-1% Dummy
R303 4.7K
R0603 +/-1% Dummy
R244 4.7K
R0603 +/-1% Dummy
R734 4.7K
R0603 +/-1%
R204 4.7K
R0603 +/-1%
R203 4.7K
R0603 +/-1%
R207 4.7K
R0603 +/-1%
R738 4.7K
R0603 +/-1%
R306 4.7K
R0603 +/-1%
R697 4.7K
R0603 +/-1%
R694 4.7K
R0603 +/-1%
R205 4.7K
R0603 +/-1%
TECHNOLOGY COPR.
10 50Friday, August 13, 2004
1
21
JP5
SHORT
X7
*
3VAUX
12
41
+3V
of
BC288
22pF
C0402
*
*
+3V
BC271
10uF
C1206
BC307
22pF
C0402
A
A
Page 11

8
SDATO( Trap
mode)
7
6
5
4
3
2
1
U18C
E11
SCLK
LINKON
LREQ
LPS
GPIO21/EESK
GPIO22/EEDI
GPIO23/EEDO
GPIO24/EECS
OSC12MHI
OSC12MHO
USBREF
USBPVDD
USBPVSS
IVDD_AUX
IVDD_AUX
IPBRST#
TDFRAME
RDFRAME
IPB_RDCLK
IPB_TDCLK
IPB_OUT0/PLLENN
IPB_IN0
IPB_IN1
USBREFAVDD
internal pull-low
(30~50K Ohm)
C19
A19
A20
F20
D20
E20
C20
B16
A17
F16
A18
C15
C16
C17
B11
D10
A11
E10
D9
B10
A10
C10
C9
B20
yes
yesROM
NOOC4-( SB debug mode)
yes
GPIO21
GPIO22
GPIO23
GPIO24
OSC12MHI
OSC12MHO
USBREF
USBPVDD
USBPVSS
IVDD_AUX
IVDD_AUX
USBPVDD
R702 412
R0603 +/-1%
GPIO24
GPIO21
GPIO22
GPIO23
IVDD_AUX
USBPVDD
USBPVSS
OC0OC1OC2OC3OC4OC5-
BC680
0.1uF
*
10V, X7R, +/-10%
C0402
D0
D1
D2
D3
D4
D5
D6
D7
UCLK48M
UV4+
UV4UV5+
UV5-
D D
3VAUX
FB47
21
FB L0805 60 Ohm
BC692
10uF
*
10V, X5R, +/-10%
C1206
C C
D[0..7]15
UCLK48M13
SYSUSBP0+17
SYSUSBP0-17
SYSUSBP1+17
SYSUSBP1-17
SYSUSBP2+18
SYSUSBP2-18
SYSUSBP3+18
SYSUSBP3-18
BC681
*
1uF
C0603
connect VSS pin
directly to GND
B B
+3V
OC3-
R739 10K R0402
OC4-
R742 10K R0402
OC5-
R737 10K R0402
OC0-
R239 10K R0402
OC1-
R736 10K R0402
OC2-
R743 10K R0402
UV4+
R731 15K R0402
UV4-
R730 15K R0402
UV5+
R236 15K R0402
UV5-
R235 15K R0402
V4
USBCLK48M
B18
UV0+
C18
UV0-
D18
UV1+
D19
UV1-
E14
UV2+
D15
UV2-
E18
UV3+
F18
UV3-
E16
UV4+
E15
UV4-
G18
UV5+
G19
UV5-
G20
OC0#
G17
OC1#
J16
OC2#
H16
OC3#
H17
OC4#
G16
OC5#
D16
USBVDD
D17
USBVDD
E17
USBVDD
F17
USBVDD
F19
USBVSS
E19
USBVSS
B19
USBVSS
B17
USBVSS
A12
D0
B12
D1
C12
D2
D12
D3
E12
D4
A13
D5
B13
D6
C13
D7
D11
CTL0
C11
CTL1
SiS963L
SPKR( LPC addr mapping)
SDATO( Trap from) R170 un-stuff
SYNC( PCICLK PLL)
USB
963-3
1394
SB Hardware Trap
PCSPK10,27
AC_SDOUT10,22,27
PCSPK
R280 4.7K R0402 dummy
AC_SDOUT
R305 4.7K R0402 dummy
OC4-
R740 0 R0402 dummy
external pull-up at page 28 USB header
0
disable
enable
enable
1
enable
PCI AD
disable
disable
IPB_OUT1/ZCLKSEL
+3V
Default
R169 un-stuff
R171 un-stuff
NONE
3VAUX
R705
4.7K
+/-5%
R0402
BC690
*
1uF
C0603
BC699
10nF
16V, X7R, +/-10%
C0402
OSC12MHI
OSC12MHO
BC686
10nF
*
16V, X7R, +/-10%
C0402
FB L0805 60 Ohm
*
U15
1
CS
2
SK
3
DI
4
DO
AT93C46-2.7V
R209 10M
R0603 +/-5%
BC286
15pF
*
50V, NPO, +/-5%
C0402
X5 not in CIS
070904 lonny
R691 0
R0402 +/-5%
FB48
BC698
*
1uF
C0603
VCC
NC
ORG
GND
JP20
SHORT
JP21
SHORT
X5
12M
12
21
12
8
7
6
5
*
+1.8VAUX
BC684
10uF
*
10V, X5R, +/-10%
C1206
3VAUX
BC678
10uF
*
10V, X5R, +/-10%
C1206
3VAUX
BC285
10pF
50V, NPO, +/-5%
C0402
TECHNOLOGY C OPR.
Title
Document Number Rev
Date: Sheet
661S03
of
11 50Friday, August 13, 2004
A
A
Page 12

8
7
6
5
4
3
2
1
D D
+3V
BC764 10uF
*
BC748 10uF
*
BC753 0.1uF
*
BC738 0.1uF
*
C1206
C1206
C0402
C0402
BC749 1uF
C0603
*
BC725 1uF
C0603
*
BC734 0.1uF
C0402
*
BC732 0.1uF
C0402
*
C C
Put under 96X solder side
+1.8V
BC752 0.1uF
BC733 0.1uF
B B
BC717 0.1uF
BC747 0.1uF
BC728 0.1uF
C0402
*
C0402
*
C0402
*
C0402
*
C0402
*
BC751 0.1uF
BC719 0.1uF
BC754 0.1uF
BC750 0.1uF
C0402
*
C0402
*
C0402
*
C0402
*
+1.8V
BC724 10uF
BC720 1uF
BC729 0.1uF
BC726 0.1uF
BC723 0.1uF
C1206
*
C0603
*
C0402
*
C0402
*
C0402
*
+1.8VAUX
+VCCP
+VCCP
BC756 0.1uF
BC746 0.1uF
3VAUX+3V
BC712 0.1uF
BC711 0.1uF
+1.8VAUX
BC715 0.1uF
BC714 0.1uF
BC682 1uF
*
BC683 0.1uF
*
BC768 1uF
*
BC767 1uF
*
C0402
*
C0402
*
Dummy
C0402
*
C0402
*
C0402
*
C0402
*
C0603
C0402
C0603
C0603
Dummy
3VAUX
*
BC674
10uF
C1206
*
+1.8VAUX
BC709
1uF
C0603
+1.8V
+VCCP
+3V
BC713
0.1uF
*
C0402
M15
G15
N15
P19
K15
H15
R10
R14
P15
R15
R11
R13
R12
F12
F10
F11
F14
F15
F13
J15
J19
L15
L19
G6
L6
R6
H6
K6
M6
P6
R7
R9
J6
N6
R8
F9
F7
F8
U18D
VDDZ
VDDZ
VDDZ
VDDZ
VDDZ
VDDZ
VDDZ
PVDDZ
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
VTT
VTT
OVDD
OVDD
OVDD
OVDD
OVDD
OVDD
OVDD
OVDD
PVDD
PVDD
PVDD
PVDD
IVDD_AUX
IVDD_AUX
OVDD_AUX
OVDD_AUX
OVDD_AUX
OVDD_AUX
OVDD_AUX
PVDD_AUX
PVDD_AUX
SiS963L
963
-4
Power
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSSZ
VSSZ
VSSZ
VSSZ
VSSZ
VSSZ
VSSZ
VSSZ
VSSZ
VSSZ
H8
H9
H10
H11
H12
H13
J8
J9
J10
J11
J12
K8
K9
K10
K11
L8
L9
L10
L11
M8
M9
M10
M11
N8
N9
N10
N11
N12
N13
J13
J17
K12
K13
L12
L13
L17
M12
M13
P17
Title
Document Number Rev
Date: Sheet
915S02
TECHNOLOGY C OPR.
of
12 50Friday, August 13, 2004
A
A
Page 13

8
7
6
5
4
3
2
1
Main Clock Generator
+3V
FB5
FB L0805 60 Ohm
2 1
D D
BC92
22uF
C1206
*
*
C C
B B
+3V Connect pin 12 PCI_STOP#
lonny 2004-06-01
BC135
0.1uF
C0402
BC136
0.1uF
*
C0402
BC83
0.1uF
C0402
*
*
BC114
0.1uF
C0402
+3V
*
*
R54
10K
+/-1%
R0603
BC97
470pF
C0402
+3V
*
+3V
*
BC130
0.1uF
C0402
BC75
0.1uF
C0402
BC84
22uF
C1206
*
CPUSTP-10
FB6
BC95
0.1uF
*
BC137
C0402
0.1uF
C0402
+3V
R52 475
R0402 +/-1%
FB L0805 80 Ohm
21
*
BC85
0.1uF
*
C0402
*
R61
10K
+/-1%
R0603
BC96
0.1uF
C0402
VCC3_CLK
BC94
0.1uF
C0402
CPUSTP-
VCC3_CLK
*
BC74
1nF
*
50V, X7R, +/-10%
C0402
BC86
1nF
50V, X7R, +/-10%
C0402
(5 OPTIONS)
1: (ICS)
2: (Cypress)
3. (Hitachi)
4: ()
5: ()
1
VDDREF
11
VDDZ
13
VDDPCI
19
VDDPCI
28
VDD48
29
VDDAGP
42
VDDCPU
48
VDDSD
5
VSSREF
8
VSSZ
18
VSSPCI
24
VSSPCI
25
VSS48
32
VSSAGP
41
VSSCPU
46
VSSSD
45
CPU_STOP#
33
PD#/VTT_PWRGD
38
IREF
12
PCI_STOP#
36
VDDA
37
VSSA
BC133
10pF
C0402
XIN
6
1 2
XTAL-14.318MHz
*
PCICLK_F0/FS3
PCICLK_F1/FS4
24_48M/MULTISEL
X3
7
*
CPUCLK0
CPUCLK#0
CPUCLK1
CPUCLK#1
SDCLK
AGPCLK0
AGPCLK1
ZCLK0
ZCLK1
PCICLK0
PCICLK1
PCICLK2
PCICLK3
PCICLK4
PCICLK5
REF0/FS0
REF1/FS1
REF2/FS2
SCLK
SDATA
XOUT
ICS952005
BC134
10pF
C0402
CPU_BSEL04
CPU_BSEL14
48M
Damping Resistors
Place near to the
FS3
FS4
FS0
FS1
FS2
CPU_BSEL0
CPU_BSEL1
FS4
FS0
FS1
Clock Outputs
R66 33 R0603
R68 33 R0603
R57 33R0603
R58 33R0603
R55 22 R0603
R56 22 R0603
R99 22 R0603
R115 22 R0603
R100 33R0603
R69 33R0603
R75 33R0603
R81 33R0603
R101 33R0603
R80 33R0603
R96 33R0603
R98 33R0603
R53 22 R0603
MULTISEL
+3V
R113
R114
10K
10K
+/-1%
+/-1%
R0402
R0402
Dummy
CLK_CPU_BCLK
CLK_CPU_BCLKJ
CLK_MCH_BCLK
CLK_MCH_BCLKJ
AGPCLK0
AGPCLK1
ZCLK0
ZCLK1
96XPCLK
PCLK_LAN
PCLK_591
MINIPCIC LK
CARDBUDCLK
PCLK_1394
REFCLK0
REFCLK1
REFCLK2
UCLK48M
SMBCLK
SMBDAT
R92 2.7K R 0402
R93 2.7K R 0402
+/-5%
R94 2.7K R 0402
R79 2.7K R 0402
R97 2.7K R 0402
CLK_CPU_BCLK 3
CLK_CPU_BCLKJ 3
CLK_MCH_BCLK 5
CLK_MCH_BCLKJ 5
AGPCLK0 5
AGPCLK1 41
ZCLK0 7
ZCLK1 9
96XPCLK 9
PCLK_LAN 29
PCLK_591 15
MINIPCICLK 22
CARDBUDCLK 23
PCLK_1394 23
REFCLK0 7
REFCLK1 10
UCLK48M 11
SMBCLK 10 , 14,19,46
SMBDAT 10,14,19,46
FS2
FS3
+3V
U7
40
39
44
43
47
31
30
9
10
14
15
16
17
20
21
22
23
2
3
4
27
26
35
34
By-Pass Capacitors
Place near to the Clock Outputs
CLK_MCH_BCLKJ
CLK_MCH_BCLK
CLK_CPU_BCLK
CLK_CPU_BCLKJ
AGPCLK0
AGPCLK1
ZCLK0
ZCLK1
96XPCLK
PCLK_1394
PCLK_LAN
CARDBUDCLK
MINIPCIC LK
REFCLK0
REFCLK1
REFCLK2
UCLK48M
R48 49.9 R0402 +/-1%
R65 49.9 R0402 +/-1%
R70 49.9 R0402 +/-1%
BC90 10pF C0402
BC91 10pF C0402
BC161 10pF C0402
BC175 10pF C0402
BC162 10pFC0402
BC164 10pFC0402R82 33R0603
BC109 10pF C0402
BC131 10pF C0402
BC118 10pF C0402
BC117 10pF C0402
BC159 10pF C0402
BC160 10pF C0402
BC89 10pF C0402
R49 49.9 R0402 +/-1%
*
*
*
*
*
*
*
*
*
*
*
*
*
MULTISEL
R44 0
R0402 +/-5%
dummy
Title
TECHNOLOGY C OPR.
Document Number Rev
Date: Sheet of
661S03
13 50Friday, August 13, 2004
A
A
Page 14

8
7
6
5
4
3
2
1
Clock Buffer (DDR)
(OPTIONS)
1: (ICS-93705)
D D
BC435
0.1uF
C0402
CBVDD
BC429
10nF
*
C0402
FWDSDCLKO
VDIMM
FB29
FB L0805 60 Ohm
2 1
BC454
10uF
*
*
C1206
SMBCLK DDRCLK-0 DDRCLK2
R329 0R0402 +/-5% Dummy
SMBDAT DDRCLK-1
R260 0R0402 +/-5% Dummy
C C
FB_OUT
B B
VDIMM
*
BC459
22uF
C1206
FB30 FB L0805 60 Ohm
CBVDD
BC462
10nF
C0402
21
*
BC461
22uF
*
C1206
BC463
0.1uF
*
C0402
*
BC370
10nF
C0402
U20
15
VDDI2C
4
VDD
11
VDD
21
VDD
28
VDD
34
VDD
38
VDD
45
VDD
16
AVDD
17
AGND
12
SCLK
37
SDATA
13
CLK_IN
14
NC
35
FB_IN
36
NC
GND1GND7GND8GND18GND24GND25GND31GND41GND42GND
BC453
0.1uF
*
C0402
BC372
0.1uF
*
C0402
BC431
0.1uF
*
C0402
CLK0
CLK1
CLK2
CLK3
CLK4
CLK5
CLK6
CLK7
CLK8
CLK9
CLK#0
CLK#1
CLK#2
CLK#3
CLK#4
CLK#5
CLK#6
CLK#7
CLK#8
CLK#9
FB_OUT
NC
ICS93705
48
BC455
0.1uF
*
C0402
BC432
0.1uF
*
C0402
3
5
10
20
22
46
44
39
29
27
2
6
9
19
23
47
43
40
30
26
33
32
BC367
0.1uF
*
C0402
R319 0 R0402
R322 0 R0402
R325 0 R0402
R327 0 R0402
R320 0 R0402
R269 0 R0402
R270 0 R0402
R273 0 R0402
R275 0 R0402
R315 0 R0402
R323 0 R0402
R324 0 R0402
R326 0 R0402
R321 0 R0402
R268 0 R0402
R271 0 R0402
R272 0 R0402
R274 0 R0402
R259 22
R0603 +/-1%
BC368
0.1uF
*
C0402
BC433
0.1uF
*
C0402
DDRCLK0
DDRCLK1
DDRCLK2
DDRCLK8
DDRCLK5
DDRCLK4
DDRCLK3
DDRCLK7 DDRCLK0
DDRCLK6
DDRCLK-2
DDRCLK-8
DDRCLK-5
DDRCLK-4
DDRCLK-3
DDRCLK-7
DDRCLK-6
FB_OUT
BC434
0.1uF
*
C0402
DDRCLK[0..8]
DDRCLK-[0..8]
SMBCLK
SMBDAT
FWDSDCLKO
DDRCLK[0..8] 19
DDRCLK-[0..8] 19
SMBCLK 1 0 ,13,19,46
SMBDAT 10,13,19,46
FWDSDCLKO 6
By-Pass Capacitors
Place near to the Clock Buffer
BC419 10pF
DDRCLK1
DDRCLK8
DDRCLK5
DDRCLK4
DDRCLK3
DDRCLK7
DDRCLK6
DDRCLK-0
DDRCLK-1
DDRCLK-2
DDRCLK-8
DDRCLK-5
DDRCLK-4
DDRCLK-3
DDRCLK-7
DDRCLK-6
FB_OUT
C0402 50V, NPO, +/-5%
BC444 10pF
C0402 50V, NPO, +/-5%
BC439 10pF
C0402 50V, NPO, +/-5%
BC351 10pF
C0402 50V, NPO, +/-5%
BC347 10pF
C0402 50V, NPO, +/-5%
BC420 10pF
C0402 50V, NPO, +/-5%
BC443 10pF
C0402 50V, NPO, +/-5%
BC440 10pF
C0402 50V, NPO, +/-5%
BC352 10pF
C0402 50V, NPO, +/-5%
BC346 10pF
C0402 50V, NPO, +/-5%
Dummy
*
BC441 10pF
C0402 50V, NPO, +/-5%
*
BC438 10pF
C0402 50V, NPO, +/-5%
*
BC350 10pF
C0402 50V, NPO, +/-5%
*
BC354 10pF
C0402 50V, NPO, +/-5%
*
*
BC442 10pF
C0402 50V, NPO, +/-5%
*
BC437 10pF
C0402 50V, NPO, +/-5%
*
BC349 10pF
C0402 50V, NPO, +/-5%
*
BC353 10pF
C0402 50V, NPO, +/-5%
*
BC369 10pF C0402
*
Dummy
*
Dummy
*
Dummy
*
Dummy
Dummy
*
Dummy
*
Dummy
*
Dummy
*
Dummy
*
Dummy
Dummy
Dummy
Dummy
Dummy
Dummy
Dummy
Dummy
Title
TECHNOLOGY C OPR.
Document Number Rev
Date: Sheet of
661S03
14 50Friday, August 13, 2004
A
A
Page 15

5
HWPG
D D
+3VALW_591
13
Q16
DTA124EUA
+3VALW_591
13
D38
HOLDJ
R662
R0402
+/-5%
Dummy
*
10K
1SS355
D37
1SS355
PCLK_591
R175
33
+/-5%
R0402
BC268
10pF
C0603
C C
B B
????
SAVE_POWER_M1036
TPCLK16
A A
TPDATA16
NUMLEDJ18
2
Q15
DTA124EUA
2
2 1
2 1
+5V
RN5
10K
8P4R0603
+/-5%
R95 100K
R0402 +/-5%
WIRELESS_SWJ18
MDC_RINGJ
NBSWONJ
SUSBJ
ACIN
+3VALW_591
R657
470K
+/-1%
R0603
591RESET 591RESETJ
EC_BEEP27
PWRBTN10
EC_BEEP27
R632 0 R0402+/-5% Dummy
D34 RB751V-40 Dummy
R179 0 R0402+/-5% Dummy
R178 0 R0402+/-5%
R180 0 R0402+/-5%
VRON31,35
*
135
78
642
FB9 FB L0603 300 Ohm
Dummy
5
Q11
E C
ACIN 39
1SS355
????
PWRBTN10
21
BC141
4.7uF
*
10V, Y5V, +80%/-20%
+3VALW_591
R597
4.7K
R0603
+/-5%
B
MMBT3904
D36
SERIRQ10,23
KBSMIJ10
21
D33
RB751V-40
Dummy
REF3V+3VALW_591
Follow TPC01 update sch
070904 lonny
WIRELESS_SWJ
BC140
2.2nF
*
C0603
LAD0/FWH010
LAD1/FWH110
LAD2/FWH210
LAD3/FWH310
SCIJ10
PCLK_59113
LFRAMEJ/FW H410
21
D11 RB751V-40
????
21
CHA_OFF39
SCROLL_LOCK_LEDJ
C0805
4
MBCLK3,39
MBDATA3,39
MBAT_PRESJ39
MBATV39
SUSCJ10
HWPG34,36
CC_SET39
CV_SET39
VFAN32
CLKRUNJ10,22,29
D35 RB751V-40
SERIRQ
21
MDC_RINGJ22
LAN_PME_591J29
TEMP_ALERTJ3
NBSWONJ18,50
3VAUX_EN34,50
21
FANSIG32
SUSBJ10,29
PCIRSTJ9,17,22,23,29,40,41
REFON39
PWM-ADJ21
MAINON22,33,34,36,38
SUSON10,33,38
4
MBCLK
SBCLK
MBDATA
MBAT_PRESJ
MBATV
SUSCJ
HWPG
DP/AD8
DN/AD9
CC-SET
CV-SET
VFAN
MX016
MX116
MX216
MX316
MX416
MX516
MX616
MX716
MY016
MY116
MY216
MY316
MY416
MY516
MY616
MY716
MY816
MY916
MY1016
MY1116
MY1216
MY1316
MY1416
MY1516
LAD0/FWH0
LAD1/FWH1
LAD2/FWH2
LAD3/FWH3
PCLK_591
LFRAMEJ/FWH4
LPCPDJ
KBSMIJ591
HOLDJ
MDC_RINGJ
FANSIG
LAN_PME_591J
TEMP_ALERTJ
SUSBJ
PCIRSTJ
REFON
DNBSWONJ591
NBSWONJ
VADJ
SUSPEND_LEDJ
MAINON
SUSON
3VAUX_EN
NUMLEDJ
MX0
MX1
MX2
MX3
MX4
MX5
MX6
MX7
MY0
MY1
MY2
MY3
MY4
MY5
MY6
MY7
MY8
MY9
MY10
MY11
MY12
MY13
MY14
MY15
CLKRUNJ
+3VALW_591
3
U10 PC87591L
163
SCL1/IOPB3
169
SCL2/IOPC1
164
SDA1/IOPB4
170
SDA2/IOPC2
81
AD0
82
AD1
83
AD2
84
AD3
87
AD4/IOPE0
88
AD5/IOPE1
89
AD6/IOPE2
90
AD7/IOPE3
93
AD8/DP
94
AD9/DN
99
DA0
100
DA1
101
DA2
102
DA3
71
KBSIN0
72
KBSIN1
73
KBSIN2
74
KBSIN3
77
KBSIN4
78
KBSIN5
79
KBSIN6
80
KBSIN7
49
KBSOUT0
50
KBSOUT1
51
KBSOUT2
52
KBSOUT3
53
KBSOUT4
56
KBSOUT5
57
KBSOUT6
58
KBSOUT7
59
KBSOUT8
60
KBSOUT9
61
KBSOUT10
64
KBSOUT11
65
KBSOUT12
66
KBSOUT13
67
KBSOUT14
68
KBSOUT15
25
CLKRUN#/EXWINT46/IOPE7
5
GA20/IOPB5
6
KBRST#/IOPB6
15
LAD0
14
LAD1
13
LAD2
10
LAD3
18
LCLK
31
ECSCI#/IOPD3
8
LDRQ#
9
LFRAME#
24
LPCPD#/EXWINT45/IOPE6
19
LRESET#
23
PWUREQ
7
SERIRQ
22
SMI#
26
EXWINT20/RI1#/IOPD0
29
EXWINT21/RI2#/IOPD1
172
EXWINT22/TB1/IOPC4
176
EXWINT23/TB2/IOPC6
30
EXWINT24/IOPD2
44
EXWINT40/IOPE5
165
PFAIL#/RING#/IOPB7
175
TA2/IOPC5
171
TA1/IOPC3
2
SWIN/IOPE4
32
PWM0/IOPA0
33
PWM1/IOPA1
36
PWM2/IOPA2
37
PWM3/IOPA3
38
PWM4/IOPA4
39
PWM5/IOPA5
40
PWM6/IOPA6
43
PWM7/IOPA7
41
IOPD4
42
IOPD5
54
IOPD6
55
IOPD7
168
IOPC0
110
PSCLK1/IOPF0
114
PSCLK2/IOPF2
116
SCLK3/IOPF4
118
PSCLK4/IOPF6
111
PSDAT1/IOPF1
115
PSDAT2/IOPF3
117
PSDAT3/IOPF5
119
PSDAT4/IOPF7
ACCESS
BUS
I/F
ANALOG
I/F
KBC
HOST
ICU
MIWU
PWM
MSWC
PS2 I/F
BC143 0.1uF
C0402
*
BC625 0.1uF
C0402
*
BC646 0.1uF
C0402
*
BC654 0.1uF
C0402
*
32KCLKIN/32KX1
CLOCKS
CLKOUT/SIOCLKIN/IOPC7
A0/ENV0/IOPH0
A1/ENV1/IOPH1
A2/BADDR0/IOPH2
A3/BADDR1/IOPH3
A5/SHBM/IOPH5
A15/CBRD/IOPK7
BIU & DSS
BRKL#_RSTO#/IOPJ7
USART
POWER &
GROUND
NC
3
32KX2
CLK
A4/TRIS/IOPH4
A6/IOPH6
A7/IOPH7
A8/IOPK0
A9/IOPK1
A10/IOPK2
A11/IOPK3
A12/IOPK4
A13/BE0/IOPK5
A14/BE1/IOPK6
A16/IOPL0
A17/IOPL1
A18/IOPL2
A19/IOPL3
D0/IOPI0
D1/IOPI1
D2/IOPI2
D3/IOPI3
D4/IOPI4
D5/IOPI5
D6/IOPI6
D7/IOPI7
D8/IOPM0
D9/IOPM1
D10/IOPM2
D11/IOPM3
D12/IOPM4
D13/IOPM5
D14/IOPM6
D15/IOPM7
RD#/IOPJ0
WR0#/IOPJ1
SELIO#
WR1#/IOPL4
BST0/IOPJ2
BST1/IOPJ3
BST2/IOPJ4
PFS#/IOPJ5
PLI/IOPJ6
TCK
TDO
TINT#
TMS
SEL0#
SEL1#
URXD/IOPB0
UTXD/IOPB1
USCLK/IOPB2
AGND
AVCC
GND
GND
GND
GND
GND
GND
GND
VBAT
VCC
VCC
VCC
VCC
VCC
VCC
VDD
NC1
NC2
NC3
NC4
NC5
NC6
NC7
NC8
NC9
NC10
2
591_32KX1
158
591_32KX2
160
47
PWROK_1SBDATA
1
ENV0
124
ENV1
125
BADDR0
126
BADDR1
127
TRIS
128
SHBM
131
A6
132
A7
133
A8
143
A9A9
142
A10
135
A11
134
A12
130
A13
129
A14
121
A15
120
A16
113
A17
112
A18
104
103
D0
138
D1
139
D2
140
D3
141
D4
144
D5
145
D6
146
D7
147
148
149
155
156
3
4
27
28
RDJ
150
WRJ
151
152
48
CAPSLEDJ
76
62
63
MXLIDJ
69
70
ACIN
75
106
108
TDI
107
105
109
173
174
153
154
PWR_LEDJ
162
FB37 FB L0603 300 Ohm
96
95
17
35
46
122
137
159
167
161
34
45
123
136
157
166
16
11
12
20
21
85
86
91
92
97
*
98
D10
RB751V-40
R106 0
TCK-591
TDI-591
TDO-591
TINTTMS-591
CSJ
21
*
BC665
*
0.1uF
10V, X7R, +/-10%
C0402
BC652
0.1uF
*
10V, X7R, +/-10%
C0402
BC651
1uF
10V, X5R, +/-10%
C0603
Dummy
2 1
D[0..7]11
RF_ENABLE 22
VOL_MUTE 27
CAPSLEDJ 18
SUSOK 34,36
R0402+/-5%
MXLIDJ 21
BATLEDJ 18
PWR_LEDJ 18
BC149
0.1uF
C0402
VCCRTC
BC643 0.1uF C0402
+3V
*
PWRGD 7,10,31
R177 1K
R0402 +/-1%
+3VALW
*
????
REF3V
+3VALW_591
BC72
0.1uF
10V, X7R, +/-10%
C0402
11
+3VALW_591
591_32KX1
+3V
591_32KX2
ENV0
ENV1
BADDR0
BADDR1
TRIS
SHBM
A6
A7
A8
A9A9
A10
A11
A12
A13
A14
A15
A16
A17
CSJ
RDJ
A18
WRJ
CONN1
10
10
11
9
8
7
6
5
4
3
2
1
Header_1X10
Dummy
R648 10K R0402+/-5%
R643 10K R0402+/-5%
SBCLK
SBDATA
MBCLK
MBDATA
ENV1
BADDR0
BADDR1
LPCPDJ
SHBM
TINT-
9
8
TCK-591
7
6
TDO-591
5
4
TDI-591
3
Z3009
2
TMS-591
1
R625 4.7K R0402 +/-5%
R629 4.7K R0402 +/-5%
R611 4.7K R0402 +/-5%
R617 4.7K R0402 +/-5%
R89 10K R0402 +/-5%
R90 10K R0402 +/-5% Dummy
R104 10K R 0402 +/-5% Dummy
R649 10K R 0402 +/-5%
R103 10K R 0402 +/-5%
R145
20M R0603
R143
120K R0603
+/-5%
+/-5%
BIOS_CONN1
32
VCC
12
A0
11
A1
10
A2
9
A3
8
A4
7
A5
6
A6
5
A7
27
A8
26
A9
23
A10
25
A11
4
A12
28
A13
29
A14
3
A15
2
A16
30
A17
22
CE
24
OE
1
VPP
31
PGM
16
GND
PLCC-32-SKT
R105 10K
R0402 +/-5%
R91 10K
R0402 +/-5%
1
23
4 1
O0
O1
O2
O3
O4
O5
O6
O7
+3VALW
Dummy
Dummy
TEMP_ALERTJ
LAN_PME_591J
+3VALW_591
BC232
22pFC0402
*
X4
XTAL-32.768MHz
BC239 22pF
C0402
*
D0
13
D1
14
D2
15
D3
17
D4
18
D5
19
D6
20
D7
21
U15
SST39VF040
ENV1
+3VALW_591
TECHNOLOGY COPR.
Title
PC87591L & FLASH
Document Numbe r R e v
2
Date: Sheet
661S03
of
15 50Friday, August 13, 2004
1
A
Page 16

5
4
3
2
1
KEY BOARD
D D
C C
RN29
MX7
B B
A A
MX6
MX5
MX4
1
2
3
4
5
8.2K 10P8R0603+/-5%
5
CN4
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
KB CONN
10
MX0
9
MX1
8
MX2
7
MX3
6
MX1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
MY10
23
24
+3V
MX7
MX6
MY9
MX4
MX5
MY0
MX2
MX3
MY5
MY1
MX0
MY2
MY4
MY7
MY8
MY6
MY3
MY12
MY13
MY14
MY11
MY15
MX1 15
MX7 15
MX6 15
MY9 15
MX4 15
MX5 15
MY0 15
MX2 15
MX3 15
MY5 15
MY1 15
MX0 15
MY2 15
MY4 15
MY7 15
MY8 15
MY6 15
MY3 15
MY12 15
MY13 15
MY14 15
MY11 15
MY10 15
MY15 15
BCN6
*
2431
576
8
8P4R0603
220pF
50V, NPO, +/-10%
BCN4
*
2431
576
8
220pF
8P4R0603
50V, NPO, +/-10%
BCN5
*
2431
576
8
8P4R0603
220pF
50V, NPO, +/-10%
4
MY0
MY1
MY2
MY3
MY8
MY9
MY10
MY11
MY4
MY5
MY6
MY7
BCN1
*
576
*
576
BCN3
*
576
BCN2
2431
8
8P4R0603
220pF
50V, NPO, +/-10%
2431
8
8P4R0603
220pF
50V, NPO, +/-10%
2431
8
8P4R0603
220pF
50V, NPO, +/-10%
3
MX4
MX5
MX6
MX7
MX0
MX1
MX2
MX3
MY12
MY13
MY14
MY15
TPDATA15
TPCLK15
TOUCH PAD
BC373 4.7uF
C0805
*
BC363 0.1uF
0402
*
21
FB21
FB L0805 120 Ohm
2
+5V
21
FB56
FB L0805 180 Ohm
CN5
1
1
2
2
3
3
4
4
5
5
6
6
TOUCHPAD CONN
BC343
10pF
*
C0603
Dummy
FB23
FB L0805 120 Ohm
21
BC357
10pF
*
50V
C0603
Dummy
TECHNOLOGY COPR.
Title
KB & TOUCHPAD
Document Numbe r R e v
Date: Sheet
661S03
16 50Friday, August 13, 2004
1
of
A
Page 17

A
B
C
D
E
ODD CONNECTOR
+5VSUS
RCDL
RCDL27 RCDR 27
+3V
CDGND
N22385929
R933
4.7K
+/-5%
R0402
RIDEIOW-B
RICHRDY-B
RIDEIRQ-B
CDS1
CDS0
CDCS-B0
BAYVCC
CDCSEL
CDD7
CDD6
CDD5
CDD4
CDD3
CDD2
CDD1
CDD0
4 4
3 3
PCIRSTJ9,15,22,23,29,40,41
IDEIOW-B9
ICHRDYB9
IDEIRQB9
R932
10K
+/-5%
R0402
R939 33
R0402 +/-5%
R946 22 R0402
R942 82 R0402
IDECS-B09
ODD_LEDJ18
+3V
CDGND27
R940 33
R0402 +/-5%
R936 470
R0603 +/-5% Dummy
CON1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51 52
5453
0.8P BTB_DIP 50P
CDD8
CDD9
CDD10
CDD11
CDD12
CDD13
CDD14
CDD15
RCDR
CDGND
RIDEREQB
RIDEIOR-B
RIDACK-B
CDS2
CDCS-B1
BAYVCC
CDCS-B1
CDS1 IDESAB1
CDS2 ID ESAB2
CDS0
R945 82 R0402
R944 22 R0402
R941 22 R0402R943 22 R0402
FB62
2 1
FB L0805 30 Ohm
RN46
1
*
3
5
7 8
33
+/-5%
8P4R0402
2
4
6
IDECS-B1
IDESAB0
IDEREQB 9
IDEIOR-B 9
IDACK-B 9
+5V
BC856
0.1uF
*
10V, X7R, +/-10%
C0402
IDECS-B1 9
IDESAB1 9
IDESAB2 9
IDESAB0 9
BC529
0.1uF
*
16V, X7R, +/-10%
C0402
SYSUSBP1-11
SYSUSBP1+11
U31
1
2
3
4
OUT
GND
IN
OUT
IN
OUT
EN
OC
MAX1607ESA
L2
1
4 3
Common Choke 90 Ohm 2L
8
7
6
5
2
EC23
220uF
*
10V, +/-20%
CTX
USB1PWR
SYSUSBP1-_1
SYSUSBP1+_1
BC528
0.1uF
*
C0402
CN7
1
1
2
2
3
3
4
4
USB CONN1
USB1PWR
BC527
0.1uF
C0402
GND
GND
*
5
6
HDD CONNECTOR
5,22,23,29,40,41
2 2
PCIRSTJ
IDEREQA9
IDEIOW-A9
IDEIOR-A9
ICHRDYA9
IDACK-A9
IDEIRQA9
PCIRSTJ
R424
10K
+/-5%
R0402
R435 33 R0402
R418 82 R0402
R419 22 R0402
R420 22 R0402
R422 22 R0402
R423 22 R0402
R425 82 R0402
HDD0_LED18
R421
4.7K
+/-5%
R0402
+3V
R430
5.6K
+/-5%
R0402
HDD_VDD
N22385788
RIDEREQA
RIDEIOW-A
RIDEIOR-A
RICHRDY-A
RIDACK-A
RIDEIRQA
HDA1
HDA0
RIDECS-A0
HDD7
HDD6
HDD5
HDD4
HDD3
HDD2
HDD1
HDD0
CN12
112
334
556
778
9910
111112
131314
151516
171718
191920
212122
232324
252526
272728
292930
313132
333334
353536
373738
393940
414142
434344
HDD CONN
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
HDD8
HDD9
HDD10
HDD11
HDD12
HDD13
HDD14
HDD15
CBLIDA
HDA2
R433 33
R0402 +/-5%
BC518
0.1uF
*
16V, X7R, +/-10%
C0402
CBLIDA 9
IDECS-A1 9
*
HDD_VDD
BC519
1nF
50V, X7R, +/-10%
C0402
BC510
2.2uF
*
16V, Y5V, +80%/-20%
C0805
CN8
1
1
GND
2
2
3
3
4
4
GND
USB CONN2
5
6
L1
SYSUSBP0-11
SYSUSBP0+11
1
4 3
Common Choke 90 Ohm 2L
2
USB1PWR
SYSUSBP0-_1
SYSUSBP0+_1
HDD[0..15]
HDD_VDD +5V
FB32 FB L1806 60 Ohm
21
1 1
BC864
0.1uF
*
16V, X7R, +/-10%
C0402
BC860
0.1uF
*
16V, X7R, +/-10%
C0402
A
BC859
0.1uF
*
16V, X7R, +/-10%
C0402
BAYVCC
BC863
0.1uF
*
16V, X7R, +/-10%
C0402
B
CDD[0..15]
RN22
1
IDECS-A09
IDESAA29
IDESAA09
IDESAA19
*
3
5
7 8
33
+/-5%
8P4R0402
HDD[0..15] 9
CDD[0..15] 9
RIDECS-A0
2
HDA2
4
HDA0
6
HDA1
Title
TECHNOLOGY COPR.
HDD/ODD/USB_1
Document Numbe r R e v
C
D
Date: Sheet
661S03
of
17 50Friday, August 13, 2004
E
A
Page 18

5
+3V
D1
BAT54A
D D
HDD0_LED17
ODD_LEDJ17
NUMLEDJ15
CAPSLEDJ15
1
2
3
2
R1
330
+/-5%
R0603
13
Q35
DTA124EUA
R474 330
R0603 +/-5%
2
CAPSLED NUMLED
4
13
Q3
DTA124EUA
R473 330
R0603 +/-5%
3
WILLIAM
071604
13
Q2
2
DTA124EUA
SCROLL_LOCK_LEDJ15
R472 330
R0603 +/-5%
IDE_LED
13
Q4
2
DTA124EUA
R471 330
R0603 +/-5%
2
SCROLL_LOCK_LED
INT_MIC28
SCROLL_LOCK_LED
IDE_LED
CAPSLED
NUMLED
BATLED
CN1
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
LED WTB CONN
1
C C
DTA124EUA
PWR_LEDJ15 RF_LEDJ22BATLEDJ15
PWR_LEDJ
PWR_LED
+3VSUS
+5VSUS
Q74
13
2
BATLEDJ
Q75
DTA124EUA
2
BATLED
13
RF_LEDJ
DTA124EUA
RF_LED
2
Q73
13
BC427
0.1uF
*
C0402
U21
1
2
3
4
GND
IN
IN
EN
OUT
OUT
OUT
OC
MAX1607ESA
close to the J6
8
7
6
5
*
TC6
220uF
10V, +/-20%
CTX
USB2PWR
BC428
0.1uF
*
C0402
BC446
0.1uF
*
C0402
william
073104
B B
R468 0 R 0402
R466 0 R 0402
R462 0 R 0402
302LV_CRT_B7
302LV_CRT_G7
302LV_CRT_R7
M10_CRT_B41
M10_CRT_G41
M10_CRT_R41
BC523
A A
0.1uF
16V, X7R, +/-10%
C0402
R463 0 R 0402
R460 0 R 0402
R456 0 R 0402
R464 0 R 0402 @M10
R459 0 R 0402 @M10
R455 0 R 0402 @M10
+5V
*
WIRELESS_SWJ15
NBSWONJ15,50
5
CRT_B
CRT_G
CRT_R
+3V +3V
LIDJ USBGND
LIDJ21
WIRELESS_SWJ
NBSWONJ
+3V
R0402
+/-5%
8.2K
R954
CN13
112
334
556
778
9910
111112
131314
151516
171718
191920
212122
232324
252526
272728
292930
CRT BTB CONN
4
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
DDCCLK
CRTVS_VGA
CRTHS_VGA
DDCDAT
TV_CHROMA
TV_LUMA
TV_COMP
+5V
RF_LED
PWR_LED
BC522
0.1uF
C0402
*
R458 0 R 0402
R454 0 R 0402
R452 0 R 0402
R450 0 R 0402
R467 0 R 0402 @M10
R465 0 R 0402 @M10
R461 0 R 0402 @M10
R457 0 R 0402 @M10
R453 0 R 0402 @M10
R451 0 R 0402 @M10
R449 0 R 0402 @M10
+3VSUS
302LV_DDCCLK 7
302LV_CRTVS_VGA 7
302LV_CRTHS_VGA 7
302LV_DDCDAT 7
302LV_TV_CHROMA 40
302LV_TV_LUMA 40
302LV_TV_COMP 40
M10_DDC1CLK 41
M10_CRTVS_VGA 41
M10_CRTHS_VGA 41
M10_DDC1DAT 41
M10_TV_CHROMA 41
M10_TV_LUMA 41
M10_TV_COMP 41
3
FB31
USBGND
AUDGND
FB L0805 60 Ohm
21
2
USB2PWR
SYSUSBP2-11
SYSUSBP2+11
SYSUSBP3-11
SYSUSBP3+11
HPSPKL+_CON27
HPSPKR+_CON27
SHUNDOWNJ27
+5VAA
EXTMIC28
EXTMICIN28
VREFOUT27
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
11
11
12
12
13
13
14
14
15
15
audio conn
J2
TECHNOLOGY COPR.
Title
LED
Document Numbe r R e v
Date: Sheet
18 50Friday, August 13, 2004
1
of
A
Page 19

8
NOTE:
VDDID IS A TRAP ON THE DIMM
MODULE TO INDICATE:
VDDID
OPEN
GND
D D
/RMA[0..14]6,20
/RDQM[0:7]6,20
C C
B B
VDIMM
R67
75
+/-1%
R0402
R71
75
+/-1%
R0402
REQUIRED POWER
VDD=VDDQ
VDD!=VDDQ
/RMA0
/RMA1
/RMA2
/RMA3
/RMA4
/RMA5
/RMA6
/RMA7
/RMA8
/RMA9
/RMA10
/RMA13
/RMA14
/RMA11
/RMA12
/RDQM0
/RDQM1
/RDQM2
/RDQM3
/RDQM4
/RDQM5
/RDQM6
/RDQM7
SWESCASSRAS-
CKE0
CKE1
DCLK0
-DCLK0
DCLK1
-DCLK1
DCLK2
-DCLK2
RDQS0
RDQS1
RDQS2
RDQS3
RDQS4
RDQS5
RDQS6
RDQS7
SMBDT
SMBCLK
DDRVREF
/RCS-0
/RCS-1
SODIMM_200P-STD
DDRCLK-014
DDRCLK-114
DDRCLK-214
VDIMM
/RCS-06,20
/RCS-16,20
/RSWE-6,20
/RSCAS-6,20
/RSRAS-6,20
DDRCLK014
DDRCLK114
DDRCLK214
/RDQS06,20
/RDQS16,20
/RDQS26,20
/RDQS36,20
/RDQS46,20
/RDQS56,20
/RDQS66,20
/RDQS76,20
SMBDAT10,13,14,46
SMBCLK10,13,14,46
DDRVREF GEN. & DECOUPLING
BC107
*
10nF
C0402
BC111
*
10nF
C0402
BC105
*
10nF
C0402
BC112
*
10nF
C0402
112
111
110
109
108
107
106
105
102
101
115
100
99
97
117
116
98
121
122
12
26
48
62
134
148
170
184
78
119
120
118
96
95
35
37
160
158
89
91
11
25
47
61
133
147
169
183
77
193
195
194
196
198
1
2
199
197
86
85
123
124
200
BC110
*
10nF
C0402
BC108
*
10nF
C0402
7
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12
DU/A13
BA0
BA1
DU/BA2
CS0
CS1
DQM0
DQM1
DQM2
DQM3
DQM4
DQM5
DQM6
DQM7
DQM8
WE
CAS
RAS
CKE0
CKE1
CK0
CK0
CK1
CK1
CK2
CK2
DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
DQS8
SDA
SCL
SA0
SA1
SA2
VREF
VREF
VDDID
VDDSPD
NC//DU/RESET
NC/DU
NC/DU
NC/DU
NC/DU
3
113
VDDQ9VDDQ21VDDQ33VDDQ45VDDQ57VDDQ69VDDQ81VDDQ93VDDQ
GND15GND27GND39GND51GND63GND75GND87GND
GND
103
-CS/-RAS/-CAS/-WE
R - 0101
W - 0100
BC113
*
10nF
C0402
DDRVREF
BC106
*
10nF
C0402
6
VDIMM
179
131
143
155
157
167
191
VDD
VDD10VDD22VDD34VDD36VDD46VDD58VDD70VDD
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
GND
GND
GND
GND
GND
GND
GND
GND4GND16GND28GND38GND40GND52GND64GND76GND88GND90GND
125
137
149
159
161
173
185
82
VDD92VDD94VDD
PC2100 - CL2 = 15 to Data 2-2-2/2.5-3-3
CL2.5 = 18.75 to Data
DDR266 256MB 4Bks Pmax = 8W
Ptyp = 7W
64MB/128MB/256MB - 500MB/s - 1.0W
- 1000MB/s - 1.65W
- 1500MB/s - 2.5W
- 2000MB/s - 3.2W
192
114
132
144
156
168
180
VDD
VDD
VDD
VDD
VDD
GND
GND
GND
GND
GND
104
138
150
162
174
126
186
DIMM2
Lower
VDDQ
GND
GND
201
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
D11
D12
D13
D14
D15
D16
D17
D18
D19
D20
D21
D22
D23
D24
D25
D26
D27
D28
D29
D30
D31
D32
D33
D34
D35
D36
D37
D38
D39
D40
D41
D42
D43
D44
D45
D46
D47
D48
D49
D50
D51
D52
D53
D54
D55
D56
D57
D58
D59
D60
D61
D62
D63
CB0
CB1
CB2
CB3
CB4
CB5
CB6
CB7
GND
202
Outsight
5
CKE[0:3]6,20
/RMD0
5
/RMD1
7
/RMD2
13
/RMD3
17
/RMD4
6
/RMD5
8
/RMD6
14
/RMD7
18
/RMD8
19
/RMD9
23
/RMD10
29
/RMD11
31
/RMD12
20
/RMD13
24
/RMD14
30
/RMD15
32
/RMD16
41
/RMD17
43
/RMD18
49
/RMD19
53
/RMD20
42
/RMD21
44
/RMD22
50
/RMD23
54
/RMD24
55
/RMD25
59
/RMD26
65
/RMD27
67
/RMD28
56
/RMD29
60
/RMD30
66
/RMD31
68
/RMD32
127
/RMD33
129
/RMD34
135
/RMD35
139
/RMD36
128
/RMD37
130
/RMD38
136
/RMD39
140
/RMD40
141
/RMD41
145
/RMD42
151
/RMD43
153
/RMD44
142
/RMD45
146
/RMD46
152
/RMD47
154
/RMD48
163
/RMD49
165
/RMD50
171
/RMD51
175
/RMD52
164
/RMD53
166
/RMD54
172
/RMD55
176
/RMD56
177
/RMD57
181
/RMD58
187
/RMD59
189
/RMD60
178
/RMD61
182
/RMD62
188
/RMD63
190
71
73
79
83
72
74
80
84
/RMD[0:63] 6,20
CKE[0:3]
4
DDRCLK-314
DDRCLK-414
DDRCLK-514
VDIMM
VDIMM
3
VDIMM
113
131
143
155
157
167
/RMA0
112
/RMA1
111
/RMA2
110
/RMA3
109
/RMA4
108
/RMA5
107
/RMA6
106
/RMA7
105
/RMA8
102
/RMA9
101
/RMA10
115
/RMA13
100
/RMA14
99
97
/RMA11
117
/RMA12
116
98
/RCS-26,20
/RCS-36,20
/RDQM0
/RDQM1
/RDQM2
/RDQM3
/RDQM4
/RDQM5
/RDQM6
/RDQM7
SWESCASSRAS-
CKE2
CKE3
DDRCLK314
DDRCLK414
DDRCLK514
RDQS0
RDQS1
RDQS2
RDQS3
RDQS4
RDQS5
RDQS6
RDQS7
SMBDT
SMBCLK
DDRVREF
121
122
12
26
48
62
134
148
170
184
78
119
120
118
96
95
35
37
160
158
89
91
11
25
47
61
133
147
169
183
77
193
195
194
196
198
1
2
199
197
86
85
123
124
200
SODIMM_200P-RVS
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12
DU/A13
BA0
BA1
DU/BA2
CS0
CS1
DQM0
DQM1
DQM2
DQM3
DQM4
DQM5
DQM6
DQM7
DQM8
WE
CAS
RAS
CKE0
CKE1
CK0
CK0
CK1
CK1
CK2
CK2
DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
DQS8
SDA
SCL
SA0
SA1
SA2
VREF
VREF
VDDID
VDDSPD
NC//DU/RESET
NC/DU
NC/DU
NC/DU
NC/DU
3
VDDQ9VDDQ21VDDQ33VDDQ45VDDQ57VDDQ69VDDQ81VDDQ93VDDQ
GND15GND27GND39GND51GND63GND75GND87GND
GND
103
125
VDDQ
GND
137
VDDQ
GND
VDDQ
VDDQ
GND
GND
149
159
161
2
179
191
VDD
VDD10VDD22VDD34VDD36VDD46VDD58VDD70VDD
VDDQ
VDDQ
GND
GND
GND
GND4GND16GND28GND38GND40GND52GND64GND76GND88GND90GND
173
185
1
DIMM1
82
114
VDD92VDD94VDD
104
192
132
144
156
168
180
Upper
VDD
VDD
VDD
VDD
VDD
VDDQ
GND
GND
GND
GND
GND
GND
138
150
162
174
126
186
201
CB0
CB1
CB2
CB3
CB4
CB5
CB6
CB7
GND
D10
D11
D12
D13
D14
D15
D16
D17
D18
D19
D20
D21
D22
D23
D24
D25
D26
D27
D28
D29
D30
D31
D32
D33
D34
D35
D36
D37
D38
D39
D40
D41
D42
D43
D44
D45
D46
D47
D48
D49
D50
D51
D52
D53
D54
D55
D56
D57
D58
D59
D60
D61
D62
D63
202
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
GND
Insight
/RMD0
5
/RMD1
7
/RMD2
13
/RMD3
17
/RMD4
6
/RMD5
8
/RMD6
14
/RMD7
18
/RMD8
19
/RMD9
23
/RMD10
29
/RMD11
31
/RMD12
20
/RMD13
24
/RMD14
30
/RMD15
32
/RMD16
41
/RMD17
43
/RMD18
49
/RMD19
53
/RMD20
42
/RMD21
44
/RMD22
50
/RMD23
54
/RMD24
55
/RMD25
59
/RMD26
65
/RMD27
67
/RMD28
56
/RMD29
60
/RMD30
66
/RMD31
68
/RMD32
127
/RMD33
129
/RMD34
135
/RMD35
139
/RMD36
128
/RMD37
130
/RMD38
136
/RMD39
140
/RMD40
141
/RMD41
145
/RMD42
151
/RMD43
153
/RMD44
142
/RMD45
146
/RMD46
152
/RMD47
154
/RMD48
163
/RMD49
165
/RMD50
171
/RMD51
175
/RMD52
164
/RMD53
166
/RMD54
172
/RMD55
176
/RMD56
177
/RMD57
181
/RMD58
187
/RMD59
189
/RMD60
178
/RMD61
182
/RMD62
188
/RMD63
190
71
73
79
83
72
74
80
84
TECHNOLOGY C OPR.
Title
Document Number Rev
Date: Sheet
661S03
19 50Friday, August 13, 2004
A
of
A
Page 20

8
7
6
5
4
3
2
1
SSTL-2 Termination Resistors
/RMD[0..63]
/RDQM[0..7]
D D
C C
B B
/RDQS[0..7]
/RMA[0..14]
/RCS-[0..3] CKE[0..3]
/RMD4 /RMD36
/RMD5
/RDQM0
/RMD6
/RMD2
/RMD1
/RMD0
/RDQS1
/RMD9
/RMD8 /RMD45
/RMD3 /RDQM5
/RMD7 /RMD49
/RMD13
/RDQM1 /RMD43
/RMD17
/RMD16
/RMD11
/RMD10
/RMD23 /RMD54
/RMD22 /RMD55
/RMD28
/RMD20
/RMD21
/RMD15
/RMD14
/RMD24
/RMD19
/RMD18
/RDQS2
/RMD26 /RDQM7
/RMD25
/RDQS3
/RMD29
/RDQM3
/RMD30
/RMD31
/RMA0
/RMA1
/RMA2
/RMA3
/RMA4
/RMA5
/RMA6
/RMA7
/RMA8
/RMA9
/RMA10
/RMA11
/RMA12
/RMA13
/RMA14
/RSRAS-6,19
/RSCAS-6,19
/RSWE-6,19
/RSRAS/RSCAS/RSWE-
/RMD[0..63] 6,19
/RDQM[0..7] 6,19
/RDQS[0..7] 6,19
/RMA[0..14] 6,19
/RCS-[0..3] 6,19
1
2
*
3
4
5
6
78
1
2
*
3
4
5
6
78
1
2
*
3
4
5
6
78
1
2
*
3
4
5
6
R127 33 R0402
R125 33 R0402
R112 33 R0402
R109 33 R0402
R126 33 R0402
R128 33 R0402
R111 33 R0402
R108 33 R0402
R173 33 R0402
R174 33 R0402
R172 33 R0402
R171 33 R0402
R167 33 R0402
R168 33 R0402
R170 33 R0402
R160 33 R0402
R161 33 R0402
R162 33 R0402
R181 33 R0402
R184 33 R0402
R176 33 R0402
R159 33 R0402
R157 33 R0402
R183 33 R0402
R186 33 R0402
R188 33 R0402
78
1
2
*
3
4
5
6
78
1
2
*
3
4
5
6
78
1
2
*
3
4
5
6
78
1
2
*
3
4
5
6
78
RN1
33
+/-5%
8P4R0603
RN2
33
+/-5%
8P4R0603
RN4
33
+/-5%
8P4R0603
RN3
33
+/-5%
8P4R0603
RN7
33
+/-5%
8P4R0603
RN6
33
+/-5%
8P4R0603
RN8
33
+/-5%
8P4R0603
RN9
33
+/-5%
8P4R0603
R995 R996 R997 R998
R999 R1000 R1001 R1002
update sch following layout
07/19/04
DDR_VTT
MD/DQM(/DQS)
MA/Control
CS
CKE
SDR
LV-CMOS
LV-CMOS
LV-CMOS
OD 3.3V OD 2.5V
/RMD37
/RDQM4
/RMD38
/RMD34
/RDQS4/RDQS0
/RMD33
/RMD32
/RMD39
/RMD44
/RMD48
/RMD42/RMD12
/RDQM6/RDQM2
/RMD60
/RMD56
/RMD51
/RMD50
/RDQS6
/RMD59
/RMD58
/RDQS7
/RMD57
/RMD61/RMD27
/RMD62
/RMD63
/RMD47
/RMD46
/RMD53
/RMD52
/RDQS5
/RMD41
/RMD40
/RMD35
/RCS-3
/RCS-2
/RCS-1
/RCS-0
Rs
0/10/- 33
10
0
2
4
6
2
4
6
2
4
6
2
4
6
2
4
6
2
4
6
2
4
6
2
4
6
2
*
4
6
2
*
4
6
2
*
4
6
DDR
SSTL-2
SSTL-2
SSTL-2
DDR_VTT
RN12
1
*
33
3
+/-5%
5
8P4R0603
78
RN11
1
*
33
3
+/-5%
5
8P4R0603
78
RN14
1
*
33
3
+/-5%
5
8P4R0603
78
RN15
1
*
33
3
+/-5%
5
8P4R0603
78
RN19
1
*
33
3
+/-5%
5
8P4R0603
78
RN17
1
*
33
3
+/-5%
5
8P4R0603
78
RN20
1
*
33
3
+/-5%
5
8P4R0603
78
RN21
1
*
33
3
+/-5%
5
8P4R0603
78
DDR_VTT
RN16
1
33
3
+/-5%
5
8P4R0603
78
RN13
1
33
3
+/-5%
5
8P4R0603
78
RN10
1
33
3
+/-5%
5
8P4R0603
78
Rs
10
0
0
DDR_VTT
BC270 0.1uF
C0603
25V, X7R, +/-10%
BC321 0.1uF
C0603
25V, X7R, +/-10%
BC308 0.1uF
C0603
25V, X7R, +/-10%
BC142 0.1uF
C0603
25V, X7R, +/-10%
DDR_VTT
BC184 0.1uF
C0603
25V, X7R, +/-10%
BC278 0.1uF
C0603
25V, X7R, +/-10%
BC329 0.1uF
C0603
25V, X7R, +/-10%
BC645 0.1uF
C0603
25V, X7R, +/-10%
Rtt
33
47
CKE[0..3]6,19
DECOUPLING CAPACITOR FOR SSTL-2 END TERMIANTION VTT
0603 Package placed within 200mils of VTT Termination R-packs
ISLAND
BC241 0.1uF
*
*
*
*
*
*
*
*
C0603
*
25V, X7R, +/-10%
BC617 0.1uF
C0603
*
25V, X7R, +/-10%
BC281 0.1uF
C0603
*
25V, X7R, +/-10%
BC191 0.1uF
C0603
*
25V, X7R, +/-10%
BC168 0.1uF
C0603
*
25V, X7R, +/-10%
BC622 0.1uF
C0603
*
25V, X7R, +/-10%
BC269 0.1uF
C0603
*
25V, X7R, +/-10%
BC170 0.1uF
C0603
*
25V, X7R, +/-10%
BC119 0.1uF
C0603
*
25V, X7R, +/-10%
BC326 0.1uF
C0603
*
25V, X7R, +/-10%
BC240 0.1uF
C0603
*
25V, X7R, +/-10%
BC262 0.1uF
C0603
*
25V, X7R, +/-10%
BC292 0.1uF
C0603
*
25V, X7R, +/-10%
BC619 0.1uF
C0603
*
25V, X7R, +/-10%
BC647 0.1uF
C0603
*
25V, X7R, +/-10%
BC249 0.1uF
C0603
*
25V, X7R, +/-10%
BC314 0.1uF
C0603
*
25V, X7R, +/-10%
BC634 0.1uF
C0603
*
25V, X7R, +/-10%
BC242 0.1uF
C0603
*
25V, X7R, +/-10%
BC217 0.1uF
C0603
*
25V, X7R, +/-10%
BC180 0.1uF
C0603
*
25V, X7R, +/-10%
BC234 0.1uF
C0603
*
25V, X7R, +/-10%
BC315 0.1uF
C0603
*
25V, X7R, +/-10%
BC181 0.1uF
C0603
*
25V, X7R, +/-10%
VDIMM
BC247 0.1uF
C0402
BC299 0.1uF
C0402
BC280 0.1uF
C0402
BC327 0.1uF
C0402
BC207 0.1uF
C0402
BC252 0.1uF
C0402
DIMM DECOUPLING
*
16V, X7R, +/-10%
*
16V, X7R, +/-10%
*
16V, X7R, +/-10%
*
16V, X7R, +/-10%
*
16V, X7R, +/-10%
*
16V, X7R, +/-10%
VDIMM
BC245 0.1uF
C0402 16V, X7R, +/-10%
*
BC279 0.1uF
C0402 16V, X7R, +/-10%
*
BC330 0.1uF
C0402 16V, X7R, +/-10%
*
BC325 0.1uF
C0402 16V, X7R, +/-10%
*
BC250 0.1uF
C0402 16V, X7R, +/-10%
*
BC116 0.1uF
C0402 16V, X7R, +/-10%
*
BC169 0.1uF
C0402 16V, X7R, +/-10%
*
BC208 0.1uF
C0402 16V, X7R, +/-10%
*
BC246 0.1uF
C0402 16V, X7R, +/-10%
*
BC115 0.1uF
C0402 16V, X7R, +/-10%
*
BC301 0.1uF
C0402 16V, X7R, +/-10%
*
BC167 0.1uF
C0402 16V, X7R, +/-10%
*
TECHNOLOGY C OPR.
Title
Document Number Rev
Date: Sheet
661S03
20 50Friday, August 13, 2004
A
of
A
Page 21

5
D D
*
C0805
0.1uF
VIN
302LV_DDC1DAT40
302_TXLOUT0+40
302_TXLOUT1-40
302_TXLOUT2+40
302_TXLCLKOUT-40
M10_TXLCLKOUT-41
M10_TXLOUT2+41
M10_TXLOUT1-41
M10_TXLOUT0+41
C C
M10_DDCDAT41,46
BC580
PWM-ADJ15
R530 0 R 0402 +/-5%
R185 0 R 0402 +/-5%
R189 0 R 0402 +/-5%
R195 0 R 0402 +/-5%
R201 0 R 0402 +/-5%
R689 0 R 0402 +/-5% @M10
R677 0 R 0402 +/-5% @M10
R673 0 R 0402 +/-5% @M10
R659 0 R 0402 +/-5% @M10
R529 0 R 0402 +/-5% @M10
4
FB L0805 300 Ohm
FB34
21
3
VIN1
*
C0805
0.1uF
BC582
LCD CONN
CN3
112
334
556
778
9910
111112
131314
151516
171718
191920
212122
232324
252526
272728
292930
313132
353536
333334
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
36
34
BLON
LCDVCC
DDCCLK
TXLOUT0-
*
C0805
1uF
BC583
PWM-ADJ
LCDVCC
DDCDAT
TXLOUT0+
TXLOUT1- TXLOUT1+
TXLOUT2+
TXLCLKOUT-
TXLOUT2TXLCLKOUT+
2
R533 0 R 0402 +/-5%
R182 0 R 0402 +/-5%
R190 0 R 0402 +/-5%
R191 0 R 0402 +/-5%
R202 0 R 0402 +/-5%
R692 0 R 0402 +/-5%@M10
R682 0 R 0402 +/-5%@M10
R669 0 R 0402 +/-5%@M10
R663 0 R 0402 +/-5%@M10
R528 0 R 0402 +/-5%@M10
302LV_DDC1CLK 40
302_TXLOUT0- 40
302_TXLOUT1+ 40
302_TXLOUT2- 40
302_TXLCLKOUT+ 40
M10_TXLCLKOUT+ 41
M10_TXLOUT2- 41
M10_TXLOUT1+ 41
M10_TXLOUT0- 41
M10_DDCCLK 41,46
1
+3V +3VALW
R538
10K
+/-5%
R0402
2
Q49
DTC144EUA
1 3
D23
RB751V-40
LIDJ18
R536
10K
+/-5%
R0402
R537
1K
R0402
+/-1%
MXLIDJ
BC570
0.1uF
*
10V, X7R, +/-10%
C0402
MXLIDJ 15
21
LIDJBLON
31
R535
100K
+/-5%
R0402
+3V
Q43
RHU002N06
Q46
Si3456BDV
6
5
2
1
4
3
BC562
1nF
*
C0805
50V, NPO, +/-5%
FB33
FB L0805 300 Ohm
21
BC563
0.1uF
*
*
R515
47
+/-5%
R0402
31
Q42
2
RHU002N06
C0402
PWM-ADJ
BLON
+5V
1 3
R519
10K
+/-5%
R0402
2
B B
DISP_ON41
A A
2
Q41
DTC144EUA
@M10
VGA_GPIO1640
MOSVCC_RUN
2
Q47
DTC144EUA
1 3
BC560
0.1uF
C0402
BC574
0.1uF
*
10V, X7R, +/-10%
C0402
LCDVCC
LCDVCC
BC554
10uF
*
C0805
BC576
0.1uF
*
10V, X7R, +/-10%
C0402
D24
@M10
VGA_BLON41
2 1
RB751V-40
FPBACKJ40
TECHNOLOGY COPR.
Title
LCD CONN
5
Document Numbe r R e v
4
3
2
Date: Sheet
661S03
of
21 50Friday, August 13, 2004
1
A
Page 22

5
4
3
2
1
+3V
R797
10K
R0402
+/-5%
D D
C C
MINIPCICLK
R781
10
+/-5%
R0402
Dummy
BC762
5.6pF
*
50V, NPO, +/-0.5pF
B B
C0603
RF_LEDJ18
RF_ENABLE15
R787 0R0402 +/-5%
INT-D9,23
MINIPCICLK13
REQ1J9
C/BE3J9,23,29
C/BE2J9,23,29
IRDYJ9,23,29
CLKRUNJ10,15,29
SERRJ9,23,29
PERRJ23,29
C/BE1J9,23,29
2 1
D14 RB751V-40
+5V
+5V
Dummy
Dummy
MINIPCICLK
*
+3V
AD31
AD29
AD27
AD25
AD23
AD21
AD19
AD17
IRDYJ
AD14
AD12
AD10
AD8
AD7
AD5
AD3
AD1
BC675
10pF
50V, NPO, +/-5%
C0603
101
103
105
107
109
111
113
115
117
119
121
123
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
AD[0..31]
MINIPCI _ CONN1
TIP
LAN
LAN
LAN
LAN
LAN
LAN
LAN
INT#B
3.3V
RESERVED
GND
CLK
GND
REQ#
3.3V
AD31
AD29
GND
AD27
AD25
RESV.
C/BE#3
AD23
GND
AD21
AD19
GND
AD17
C/BE#2
IRDY#
3.3V
CLKRUN#
SERR#
GND
PERR#
C/BE#1
AD14
GND
AD12
AD10
GND
AD8
AD7
3.3V
AD5
RESV.
AD3
5V
AD1
GND
AC_SYNC
AC_DI1
AC_BIT_CLK
AC_ID1#
MOD_A_MON
AGND
SYS_A_OUT
AGND
AGND
NC
VCC5A
PCI_SLOT
IDSEL=AD20
IRQ C,D
REQ1/GNT1
AD[0..31] 9,23,29
RING
LAN
LAN
LAN
LAN
LAN
LAN
LAN
5V
INT#A
RESV.
3.3VAUX
RST#
3.3V
GNT#
GND
PME#
RESV.
AD30
3.3V
AD28
AD26
AD24
IDSEL
GND
AD22
AD20
PAR
AD18
AD16
GND
FRAME#
TRDY#
STOP#
3.3V
DEVSEL#
GND
AD15
AD13
AD11
GND
AD9
C/BE#0
3.3V
AD6
AD4
AD2
AD0
RESV.
RESV.
GND
M66EN
AC_DO
AC_ID0#
AC_RST#
RESV.
GND
SYS_A_IN
AGND
AGND
MCPIACT#
3.3VAUX
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
+3V
+5V
PMEJ
AD30
AD28
AD26
AD24
AD22
AD20
PAR 9,23,29
AD18
AD16
FRAMEJ 9,23,29
TRDYJ 9,23,29
STOPJ 9,23,29
DEVSELJ 9 ,23,29
AD15
AD13
AD11
AD9
C/BE0J 9,23,29
AD6
AD4
AD2
AD0
+3VSUS
+3VSUS
R752 100
R0603 +/-1%
R248 0R0402 +/-5%
R249 0R0402 +/-5%
PMEJ 10,23
Dummy
PCIRSTJ 9,15,1 7, 23, 29, 40, 41
GNT1J 9
AD20
3VAUX
AC_SDOUT10,11,27
AC_RESETJ10,27
+3V
INT-A 7,9,23,40
INT-C 9,23,29
MDC1
1
1
3
3
5
5
7
7
9
9
11
11
13
13
15
15
17
17
19
19
21
21
23
23
25
25
27
27
29
29
H131H2
0.8P BTB_SMT 30P
+5V
2
2
4
4
6
6
8
8
10
10
12
12
14
14
16
16
18
18
20
20
22
22
24
26
28
30
R882 0 R0402+/-5%
24
26
R887 0 R0402+/-5%
28
30
32
MAINON15,33,34,36,38
MONO_PHONE 27
R871 10K
R0402 +/-5%
G
Q30
2N7002
AC_BITCLK
AC_BITCLK
R875
10K
R0402
+/-5%
DS
3VAUX
AC_SYNC 10,27
AC_SDIN1 10
AC_BITCLK 10,27
MDC_RINGJ 15
R288
33
+/-5%
R0402
Dummy
BC404
10pF
*
50V, NPO, +/-5%
C0603
A A
BC263
0.1uF
*
16V, X7R, +/-10%
C0402
BC763
0.1uF
*
16V, X7R, +/-10%
C0402
+3VSUS +5V
*
5
BC264
2.2uF
C0805
16V, Y5V, +80%/-20%
BC765
0.1uF
*
16V, X7R, +/-10%
C0402
BC661
0.1uF
*
16V, X7R, +/-10%
C0402
BC256
2.2uF
*
16V, Y5V, +80%/-20%
C0805
4
BC687
0.1uF
*
16V, X7R, +/-10%
C0402
BC761
0.1uF
*
16V, X7R, +/-10%
C0402
BC755
0.1uF
*
16V, X7R, +/-10%
C0402
3
+3V
BC757
0.1uF
*
16V, X7R, +/-10%
C0402
BC294
10uF
*
10V, Y5V, +80%/-20%
C0805
2
Title
Mini PCI/MDC
Document Numbe r R e v
Date: Sheet
661S03
Dummy
TECHNOLOGY COPR.
22 50Friday, August 13, 2004
1
of
A
Page 23

5
INT-C9,22,29
GRST# should
connect to Power
On reset if
support S3
D D
AD[0..31]
AD[0..31]
2,29
C C
R35 10K
R0402 +/-5%
B B
100
AD23 IDSEL_1394 FW-RESETN
A A
SDCLK1
SUSPEND#
R0603
R38
+/-5%
100
R0603
R36
+/-5%
R46 0
R0402 +/-5%
L6
L0805 4.7uH
REQ3J9
REQ2J9
GNT3J9
GNT2J9
+3V
PCIRSTJ9,15,17,22,29,40,41
CARDBUDCLK13
FRAMEJ9,22,29
IRDYJ9,22,29
TRDYJ9,22,29
DEVSELJ9,22,29
STOPJ9,22,29
PERRJ22,29
SERRJ9,22,29
INT-A7,9,22,40
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31
C/BE0J9,22,29
C/BE1J9,22,29
C/BE2J9,22,29
C/BE3J9,22,29
PAR9,22,29
IDSEL_CARDBUSAD25
*
5
INT-D9,22
SERIRQ10,15
PMEJ10,22 FW-TPA0P26
SPEAKOUT27
PCIRSTJ9,15,17,22,29,40,41
FW-CLK
+3V
T11
N10
P10
T10
R10
T9
R9
N9
R8
P8
N8
R7
N7
T6
R6
T5
M5
M4
L7
L6
K6
K5
J4
J5
H5
H6
H7
G4
G5
G7
F4
F5
F1
T8
T4
M6
H4
R5
F2
AD0
AD1
FW-INTA#
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31
FW-CLKRUN#
CBE0#
CBE1#
CBE2#
CBE3#
PAR
GND1G6GND2L5GND3P7GND4
R28
510K
+/-5%
R0603
P5
P6
R4
PERR#
SERR#
GND5
J15
R11
N14
1
A0
2
A1
3
A2
4
GND
AT24C08AN-10SU
K1
N4
N6
L4
P4
STOP#
DEVSEL#
GND6
GND7
F13
K7
M7
IRDY#
TRDY#
PCICLK
FRAME#
PCIRST#
FW-PCICLK
GND8
FW-VSS1B9FW-VSS2E2FW-VSS3K2FW-VSS4L2FW-VSS5M2FW-VSS6N2FW-VSS7P2FW-VSS8R2FW-VSS9V5FW-VSS10V6FW-VSS11V7FW-VSS12V8FW-VSS13V9FW-VSS14
E9
BC57
0.1uF
*
16V, X7R, +/-10%
C0402
+3V
U3
8
VCC
7
WP
FW-ROMCLK
6
SCL
FW-ROMAD
5
SDA
IDSEL_CARDBUS
IDSEL_1394
J2
G1
J7
W11
FW-IDSEL
FW-PCIVIOS
FW-PCIRST#
E4
IDSEL
PCIGNT#
4
GNT3J
D4
G2
FW-PCIGNT#
4
REQ3J
H1
R13
G_RST#
PCIREQ#
FW-PCIREQ#
FW-PLLVSS
V10
A14
BC43
0.1uF
*
16V, X7R, +/-10%
C0402
FW-RESETN
SUSPEND#
B12
P14
SUSPEND#
FW-RESET#
FW-VSSA1
FW-VSSA2
FW-VSSA3
L18
R18
M18
P11
H2
R12
FW-PME#
SPKROUT
RI_OUT#/PME#
VCC1J6VCC2K4VCC3N5VCC4T7VCC5P9VCC6
FW-VSSA4
E18
T14
R14
MFUNC5
MFUNC6
VCC_SD
T13
P13
MFUNC3
MFUNC4
P12
SDCLK1
N11
T12
N12
M12
L8
SDCLKI
MFUNC0
MFUNC1
MFUNC2
MFUNC7
VCC7
VCC8
VCC9
VCC10
FW-VDD1A9FW-VDD2E1FW-VDD3J1FW-VDD4L1FW-VDD5M1FW-VDD6N1FW-VDD7P1FW-VDD8R1FW-VDD9W7FW-VDD10W9FW-VDD11
E7
L14
F11
G15
R11 43K
R0603 +/-1%
R20 43K
R0603 +/-1%
R0603 +/-1%
R19 43K
R0603 +/-1%
R18 43K
R0603 +/-1%
R13 10K
R0402 +/-1%
R21 10K
R0402 +/-1%
FW-ROMAD
A5
PCLK_139413
FW-ROMAD
R33
10K
+/-5%
R0402
FW-ROMCLK
B6
FW-ROMCLK
FW-TEST0B5FW-TEST1
+3V
R32
10K
+/-5%
R0402
R41
10K
+/-5%
R0402
A6
B7
W13
V12
W12
A7
FW-PC0
FW-PC1
FW-CNA
FW-NANDTREE
W15
SMDATA7/SDDAT0
SMDATA4/SDDAT3
SMDATA0/SDDAT1
SMALE/SDCMD
SMCLE/SDDAT2
SMWE#/SDCLK
SMRE#/MSCLK
S4,10V
V11
W14
FW-PC2
FW-CONTENDER
B14
3
FW-CLK
MOSVCC
Dummy
V13
V15
FW-LPS
FW-CPS
FW-LKON
FW-PLLVDD
FW-VDDA1
FW-VDDA2
L19
R19
3
FW-TPB0M26
FW-TPB0P26
FW-TPA0M26
FW-TPBIAS026
R42
402K
+/-1%
R0603
A12
B15
A11
B11
FW-SE
FW-SM
FW-PTEST
FW-VDDA3
FW-VAUXPRSNT
A8
E19
A10
R31
2.49K
+/-1%
R0402
P18
P19
A15
FW-R0
FW-R1
FW-TPB2P
VCCA1
FW-CARDBUS#
FW-MPCIACT#
K16
V14
D10
AVCC+3V VCC3A
VCC_SD
N18
N19
M19
FW-TPA2P
FW-TPB2M
FW-TPA2M
FW-TPBIAS2
VCCA2
VCC_SD
GND_SD
K8
H10
E8
G18
F18
J19
G19
H19
J18
F19
H18
FW-TPB0P
FW-TPA0P
FW-TPA1P
FW-TPA0M
FW-TPB0M
FW-TPA1M
FW-TPBIAS0
FW-TPBIAS1
CAUDIO/BVD2/SPKR#
CBLOCK#/A19
CGNT#/WE#
CINT#/READY/IREQ#G9CIRDY#/A15
CPERR#/A14
CREQ#/INPACK#
CSERR#/WAIT#D8CSTOP#/A20
CSTSCHG/BVD1/STSCHG#
F8
F14
F16
E11
G14
K19
K18
R16
VCCD1#
FW-TPB1P
FW-TPB1M
CDEVSEL#/A21
F15
E16
R15
T15
T16
VPPD1
VCCD0#
CTRDY#/A22
E14
D15
D16
D5
H13
M16
VPPD0
RSVD/D2
RSVD/A18
RSVD/D14
CFRAME#/A23
CCLK/A16
CCLKRUN#/WP/IOIS16#G8CRST#/RESET
L9
E15
E12
SMBSY#
2
P15
D7
CCD1#/CD1#
CCD2#/CD2#
SMCE#M8SMWP#M9SMCD#
SMBSY#
M10
SMCD#
SMWP#
SMCE#
2
VCCD1# 24
VCCD0# 24
VPPD1 24
VPPD0 24
A_CCD1# 24
A_CCD2# 24
A_CVS1 24
A_CVS2 24
MSPWREN#
K12
G12
L11
M11
CVS1/VS1F9CVS2/VS2
SMDATA1/MSBS
SMDATA2/MSDATA0
SMPWREN#/MSPWREN#
SMCLE/SDDAT2
SMALE/SDCMDH8SMDATA7/SDDAT0H9SMWE#/SDCLK
SMDATA4/SDDAT3
J8
J9
K9
A_CPERR# 24
A_CSERR# 24
A_CREQ# 24
A_CGNT# 24
A_CBLOCK# 24
A_CINT# 24
A_CSTSCHG 24
A_CAUDIO 24
1
CLOSE TO CB810
FW-CLK
R39 22
R0402 +/-5%
A_D2 24
A_D14 24
A_A18 24
SMDATA1/MSBS 25
SMDATA2/MSDATA0 25
SMRE#/MSCLK 25
MSINS# 25
K11
L12
J12
H12
L10
CAD31/D10
MSINS#
CAD30/D9
CAD29/D1
CAD28/D8
SMRE#/MSCLK
CAD27/D0
CAD26/A0
CAD25/A1
SMDATA5/MSDATA2
SMDATA6/MSDATA1
SMDATA3/MSDATA3
CAD24/A2
CAD23/A3
CAD22/A4
CAD21/A5
CAD20/A6
CAD19/A25
CAD18/A7
CAD17/A24
CAD16/A17
CAD15/IOWR#
CAD14/A9
CAD13/IORD#
CAD12/A11
CAD11/OE#
CAD10/CE2#
CAD9/A10
CAD8/D15
CAD7/D7
CAD6/D13
CAD5/D6
CAD4/D12
CAD3/D5
CAD2/D11
CAD1/D4
CAD0/D3
FW-XI
FW-XO
CCBE0#/CE1#
CCBE1#/A8
CCBE2#/A12
CCBE3#/REG#
CPAR/A13
SMDATA0/SDDAT1
SMWPD#/SDWP
SDCD#
SDPWREN33#
J10
J11
K10
H11
SDPWREN33# 25
SDCD# 25
SMWPD#/SDWP 25
SMDATA0/SDDAT1 25
SMDATA4/SDDAT3 25
SMWE#/SDCLK 25
SMDATA7/SDDAT0 25
SMALE/SDCMD 25
SMCLE/SDDAT2 25
A_CCLK 24
A_CRST# 24
A_CCLKRUN# 24
A_CFRAME# 24
A_CIRDY# 24
A_CTRDY# 24
A_CDEVSEL# 24
A_CSTOP# 24
Title
Document Number Rev
Date: Sheet
U4
E5
F6
E6
D6
F7
D9
G10
F10
D11
G11
D12
F12
D13
E13
G13
H15
J13
H16
J16
J14
K13
K14
K15
L15
L13
M14
M15
N16
M13
N13
N15
P16
B13
A13
L16
H14
D14
E10
G16
CB810
*
R37
0
+/-5%
R0402
BC62
10pF
50V, NPO, +/-5%
C0402
1394
IDSEL AD23
REQ3/GNT3
A_CAD31
A_CAD30
A_CAD29
A_CAD28
A_CAD27
A_CAD26
A_CAD25
A_CAD24
A_CAD23
A_CAD22
A_CAD21
A_CAD20
A_CAD19
A_CAD18
A_CAD17
A_CAD16
A_CAD15
A_CAD14
A_CAD13
A_CAD12
A_CAD11
A_CAD10
A_CAD9
A_CAD8
A_CAD7
A_CAD6
A_CAD5
A_CAD4
A_CAD3
A_CAD2
A_CAD1
A_CAD0
R30 10
R0402 +/-5%
Cardbus
IDSEL AD25
REQ2/GNT2
SMBSY#
SMCE#
SMWP#
SMCD#
661S03
MSPWREN#
SDPWREN33#
A_CAD[31..0]
BC47 12pF
C0402 50V, NPO, +/-5%
1 2
BC48 12pF
C0402 50V, NPO, +/-5%
A_CCBE0# 24
A_CCBE1# 24
A_CCBE2# 24
A_CCBE3# 24
A_CPAR 24
VCC_SD VCC_SD
R24
R23
10K
+/-5%
R0402
2.2K
+/-5%
R0402
R40 2.2K R0402R10 43K
R25 2.2K R0402
1
+3V
R26
43K
+/-5%
R0603
A_CAD[31..0] 24
*
X1
XTAL-24.576MHz
*
VCC_SD
TECHNOLOGY COPR.
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23 50Friday, August 13, 2004
A
Page 24

5
4
3
2
1
U2
9
12V
D D
C C
A_CAD[31..0]23
B B
Reserved layout for
debug used
AVCC
AVCC
+5V
5
6
+3V
3
4
A_CAD[31..0]
dummy
R62 47K R0402
R63 47K R0402
dummy
5V
5V
3.3V
3.3V
A_CAD31
A_CAD30
A_CAD29
A_CAD28
A_CAD27
A_CAD26
A_CAD25
A_CAD24
A_CAD23
A_CAD22
A_CAD21
A_CAD20
A_CAD19
A_CAD18
A_CAD17
A_CAD16
A_CAD15
A_CAD14
A_CAD13
A_CAD12
A_CAD11
A_CAD10
A_CAD9
A_CAD8
A_CAD7
A_CAD6
A_CAD5
A_CAD4
A_CAD3
A_CAD2
A_CAD1
A_CAD0
GND
7
16
VCC
VCC
VCC
VPP
VCCD0
VCCD1
VPPD0
VPPD1
OC
SHDN
TPS2211
CN11
66
(D10) CAD31
65
(D9) CAD30
31
(D1) CAD29
64
(D8) CAD28
30
(D0) CAD27
29
(A0) CAD26
28
(A1) CAD25
27
(A2) CAD24
26
(A3) CAD23
25
(A4) CAD22
24
(A5) CAD21
23
(A6) CAD20
56
(A25) CAD19
22
(A7) CAD18
55
(A24) CAD17
46
(A17) CAD16
45
IOWR*) CAD15
11
(A9) CAD14
44
(IORD*) CAD13
10
(A11) CAD12
9
(OE*) CAD11
42
(CE2*) CAD10
8
(A10) CAD9
41
(D15) CAD8
6
(D7) CAD7
39
(D13) CAD6
5
(D6) CAD5
38
(D12) CAD4
4
(D5) CAD3
37
(D11) CAD2
3
(D4) CAD1
2
(D3) CAD0
68
GND
35
GND
34
GND
1
GND
CARDBUS CONN
13
12
11
10
1
2
15
14
8
+3V
AVCC
AVPP
VCC
VCC
VPP
VPP
CCLK (A16)
CFRAME# (A23)
CIRDY# (A15)
CTRDY# (A22)
CDEVSEL# (A21)
CSTOP# (A20)
CPAR (A13)
CPERR# (A14)
CSERR# (WAIT*)
CREQ# (INPACK*)
CGNT# (WE*)
CINT# (IRQ*)
CBLOCK# (A19)
CCLKRUN# (IO16*)
CRESET# (RESET)
RFU (R2_D2)
RFU (R2_D14)
RFU (R2_A18)
CVS1
CVS2
CCD1# (CD1*)
CCD2# (CD2*)
CAUDIO (BVD2/SPKR*)
CSTSCHG (BVD1/
CC/BE3# (REG*)
CC/BE2# (A12)
CC/BE1# (A8)
CC/BE0# (CE1*)
VCCD0# 23
VCCD1# 23
VPPD0 23
VPPD1 23
AVPP
51
17
52
18
19
54
20
53
50
49
13
14
59
60
15
16
48
33
58
32
40
47
43
57
36
67
62
63
61
21
12
7
R64
47K
dummy
+/-5%
R0402
AVCC
AVCC
R72
47K
dummy
+/-5%
R0402
Reserved layout for
debug used
AVCC
A_CFRAME# 23
A_CIRDY# 23
A_CTRDY# 23
A_CDEVSEL# 23
A_CSTOP# 23
A_CPAR 23
A_CPERR# 23
A_CSERR# 23
A_CREQ# 23
A_CGNT# 23
A_CINT# 23
A_CBLOCK# 23
A_CCLKRUN# 23
A_CRST# 23
A_D2 23
A_D14 23
A_A18 23
A_CVS1 23
A_CVS2 23
A_CCD1# 23
A_CCD2# 23
A_CAUDIO 23
A_CSTSCHG 23
A_CCBE3# 23
A_CCBE2# 23
A_CCBE1# 23
A_CCBE0# 23
AVCC AVPP
*
BC35
0.1uF
16V, X7R, +/-10%
C0402
R60 0
R0402 +/-5%
R34 10 R0402
BC39
0.1uF
16V, X7R, +/-10%
C0402
+5V +3V
*
BC34
0.1uF
*
16V, X7R, +/-10%
C0402
BC37
4.7uF
*
16V, Y5V, +80%/-20%
C1206
BC54
0.1uF
16V, X7R, +/-10%
C0402
CLOSE TO SOCKET
BC98 10pF
C0402 50V, NPO, +/-5%
*
A_CCLK 23
A_CCD1#
A_CCD2#
BC53
10pF
*
50V, NPO, +/-5%
C0402
Close to CB810 CD1# and CD2# pin
*
*
*
BC73
10pF
50V, NPO, +/-5%
C0402
BC44
4.7uF
16V, Y5V, +80%/-20%
C1206
A A
TECHNOLOGY COPR.
Title
5
Document Numbe r R e v
4
3
2
Date: Sheet
661S03
of
24 50Friday, August 13, 2004
1
A
Page 25

5
D D
SMDATA4/SDDAT323
SMALE/SDCMD23 SMDATA1/MSBS 23
SMWE#/SDCLK23
SMDATA7/SDDAT023
SMDATA0/SDDAT123
SMCLE/SDDAT223
SMWPD#/SDWP23
C C
4
SMDATA4/SDDAT3
SMALE/SDCMD
SD_VDD
R12 22
SMDATA7/SDDAT0
SMDATA0/SDDAT1
SMCLE/SDDAT2 MS_VCC
SMWPD#/SDWP
CN2
1
2
3
4
5
6
7
8
9
10
SD_CD/DAT3
SD_CMD
SD_VSS1
SD_VDD
SDCLK
SD_VSS2
SD_DAT0
SD_DAT1
SD_DAT2
WP
GND23GND24GND25GND
*
BC301uF
*
BC311uF
MS_VSS
MS_BS
MS_VCC
MS_SDIO
RESERVED
MS_INS
RESERVED
MS_SCLK
MS_VCC
MS_VSS
COM
CD#
26
VCC_SD
3
11
12
13
14
15
16
17
18
19
20
22
21
3 IN 1 CARD READER
MS_VCC
SD_VDD
SMDATA1/MSBS
MS_VCC
SMDATA2/MSDATA0
22K
SMRE#/MSCLK
R22
R0402
SDCD#
3VAUX
MSINS#
SMDATA2/MSDATA0 23
MSINS# 23
SMRE#/MSCLK 23
SDCD# 23
2
1
+3V VCC_SD
R27
43K
+/-5%
R0603
B B
SDPWREN33#23
A A
R29 0
R0402 +/-5%
BC45
0.1uF
*
16V, X7R, +/-10%
C0402
Q5
NDS356AP
S D
G
BC36
0.1uF
*
16V, X7R, +/-10%
C0402
TECHNOLOGY COPR.
Title
5
Document Numbe r R e v
4
3
2
Date: Sheet
661S03
of
25 50Friday, August 13, 2004
1
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Page 26

5
R4
BC3
D D
220pF
*
50V, NPO, +/-5%
C0603
56.2
+/-1%
R0603
R3
56.2
+/-1%
R0603
R2
4.99K
+/-1%
R0603
4
3
2
1
TF1
FW-TPA0M23
FW-TPA0P23
FW-TPB0M23
FW-TPB0P23
C C
VCC3A
TC1
10uF
*
12.5V, +/-20%
CTB
+3V
BC56
0.1uF
*
25V, X7R, +/-10%
B B
C0603
2
Common Choke 90 Ohm 2L
Common Choke 90 Ohm 2L
2
TF2
BC46
0.1uF
*
25V, X7R, +/-10%
C0603
BC71
0.1uF
*
25V, X7R, +/-10%
C0603
FW-TPBIAS023
BC69
10nF
*
25V, X7R, +/-10%
C0603
*
1
43
TPB0M
1
TPB0P
43
BC80
0.1uF
25V, X7R, +/-10%
C0603
*
TPA0M
TPA0P
R6
56.2
+/-1%
R0603
BC58
0.1uF
25V, X7R, +/-10%
C0603
BC76
0.1uF
*
25V, X7R, +/-10%
C0603
R5
56.2
+/-1%
R0603
C0603
BC64
10nF
*
25V, X7R, +/-10%
C0603
*
CN6
1
1
GND
2
2
3
3
4
4
GND
1394 CONN
BC4
0.33uF
10V, X5R, +/-10%
*
BC68
0.1uF
25V, X7R, +/-10%
C0603
5
6
BC61
0.1uF
*
25V, X7R, +/-10%
C0603
+3V
BC65
0.1uF
*
25V, X7R, +/-10%
C0603
A A
BC77
0.1uF
*
25V, X7R, +/-10%
C0603
BC67
0.1uF
*
25V, X7R, +/-10%
C0603
BC66
0.1uF
*
25V, X7R, +/-10%
C0603
BC82
10uF
*
10V, Y5V, +80%/-20%
C0805
BC70
10nF
*
25V, X7R, +/-10%
C0603
BC81
10uF
*
10V, Y5V, +80%/-20%
C0805
BC63
10nF
*
25V, X7R, +/-10%
C0603
BC79
0.1uF
*
25V, X7R, +/-10%
C0603
BC78
0.1uF
*
25V, X7R, +/-10%
C0603
+3V
BC60
10nF
*
25V, X7R, +/-10%
C0603
TECHNOLOGY COPR.
Title
5
Document Numbe r R e v
4
3
2
Date: Sheet
661S03
of
26 50Friday, August 13, 2004
1
A
Page 27

5
CODEC
D D
C C
SPEAKOUT23
MONO_PHONE22
AC_BITCLK
BC793
22pF
*
B B
50V, NPO, +/-5%
C0402
50V, NPO, +/-5%
AC_RESETJ10,22
AC_BITCLK10,22
AC_SYNC10, 22
AC_SDIN010
AC_SDOUT10,11,22
MIC128
Dummy
BC803
22pF
C0402
Amp
+5VAA
A A
R924 100K R0402 Dummy
R925 100K R0402
+3VM3E
R846
10K
+/-5%
R0603
R858 0
BEEP AOUTR
5
Dummy
R0603
+/-5%
R866
10K
+/-5%
R0603
Dummy
XTAL-24.576MHz
1 2
X9
BC804
*
R864 22 R0402
AOUTR
AUDGND
AUDGND
AOUTL
22pF
*
50V, NPO, +/-5%
C0402
BC801 1uF C0603 10V, X5R, +/-10%
BC817 1uF C0603 10V, X5R, +/-10%
BC828 1uF C0603 10V, X5R, +/-10%
BC798 1uF
BC847 1uF
BC846 1uF
BC832 1uF
R905
1K
+/-1%
R0402
AUDGND AUDGND
*
*
*
*
*
*
*
AUDIO_G0
AUDIO_G1
R906
1K
+/-5%
R0402
Dummy
BC808
10uF
16V, X5R, +/-10%
C1206
CD_LINL
CD_GND
CD_LINR
+5VAA
7
18
19
20
23
8
C0603
C0603
10
6
5
11
2
3
BC834
1uF
*
C0603
AUDGND AUDGND
*
3
2
11
6
10
8
5
12
13
14
15
16
17
18
19
20
21
22
23
24
47
48
U45
PVDD1
PVDD2
VDD
RHPIN
RLINEIN
RIN+
LIN+
LHPIN
LLINEIN
BYPASS
GAIN0
GAIN1
BC802
0.1uF
*
C0603
25V, X7R, +/-10%
U46
XTL_OUT
XTL_IN
RESET#
BIT_CLK
SYNC
SDATA_IN
SDATA_OUT
PC_BEEP
PHONE
AUX_L
AUX_R
VIDEO_L
VIDEO_R
CD_L
CD_GND
CD_R
MIC1
MIC2
LINE_IN_L
LINE_IN_R
EAPD
SPDIF
ROUT+
PC-BEEP
HP/LINE
SE/BTL
SHUTDOWN
AUDGND1
25
4
*
1
9
25
38
AVdd1
AVdd2
DVdd1
DVdd2
AC97 CODEC
LQFP-48P
DVss1
DVss2
AVss1
4
7
26
42
AUDGND
21
16
ROUT-
9
LOUT-
4
LOUT+
GND4
GND3
GND2
GND1
4
TPA0312
14
17
15
22
1
24
13
12
BC800 1uF
DTC144EUA
BC826
0.1uF
C0603
25V, X7R, +/-10%
AVss2
INSPKR+
INSPKR-
INSPKL+
INSPKL-
R865 0
Q68
+5VA+3VM3E
*
AUDGND
*
1 3
LINE_OUT_L
LINE_OUT_R
ALC202A
AUDGND
AUDGND
HPSPKL+
HPSPKR+
BC820
10uF
16V, X5R, +/-10%
C1206
MONO_OUT
NC1
NC2
HP_OUT_L
HP_COMM
HP_OUT_R
GPIO0
GPIO1
CID0
CID1
VREFOUT
VREF
AFILT1
AFILT2
NC/CAP1
CAP2
BC797
470pF
*
C0603
R861
R0603
2
R926 10 R0402+/-5%
R927 10 R0402+/-5%
35
36
37
33
34
39
40
41
43
44
R879 0 R0402+/-5% Dummy
45
R878 0 R0402+/-5% Dummy
46
28
27
29
30
31
32
BC852
1uF
*
C0603
10V, X5R, +/-10%
BC799
470pF
*
*
C0603
100K
+5VAA
+/-5%
VOL_MUTE 15
HPSPKL+
HPSPKR+
AOUTL
*
BC833
470pF
C0603
3
EC15 150uF CTX 4V, +/-20%
*
EC16 150uF CTX 4V, +/-20%
*
HPSPKL+ 18
HPSPKR+ 18
BC850
BC851
1nF
1uF
*
*
C0603
C0603
50V, X7R, +/-10%
10V, X5R, +/-10%
123
123
BC845
470pF
*
C0603
AUDGND
SHUNDOWNJ 18
3
BC849
1nF
C0603
50V, X7R, +/-10%
AUDGND
J3
NC
4
NC
Header_1X2
J1
NC
4
NC
Header_1X2
VREFOUT 18
BC855
10uF
*
C1206
16V, Y5V, +80%/-20%
william
071304
AUDGND
HPSPKL+_CON
HPSPKR+_CON
SHORT13
1 2
JUMPER1
AUDGND
2
CD_LINL
CD_LINR
CD_GND
*
+5VA
BC818 1uF C0603
*
BC823 1uF C0603
*
BC819 1uF C0603
*
R891
2.7K
R0402
Dummy
AUDGND
BC844
*
0.1uF
C0402
+5VA
*
+3V +3VM3E
BC788
*
10uF
C0805
BC500
*
10uF
C0805
AUDGND
16V, X7R, +/-10%
NORMAL:LOW
PCSPK10,11
EC_BEEP15
R896
4.7K
R0402
AUDGND AUDGND
R923 10K
R0402+/-5%
BC848
0.1uF
C0402
BC836
0.1uF
*
C0402
FB60 FB L0603 600 Ohm
21
BC494
*
0.1uF
C0402
+5V
BC786
*
0.1uF
C0402
53
1
2
AUDGND
NORMAL:LOW
R874
4.7K
R0402
U47 MIC5205-5.0BM5
1
3
BC835
0.1uF
C0402
FB59
FB L0603 600 Ohm
21
AUDGND
+5VA
R863 10K
4
U26
NC7SZ86
+3V
53
1
2
U24
NC7SZ86
VIN
SHDN
*
*
1
R880 4.7KR0402
R892 4.7KR0402
R886 2.7KR0402
BYPASS/ADJ
GND
2
BC839
0.1uF
*
C0402
BC805
BC806
*
0.1uF
1uF
C0402
C0603
BC792
BC796
*
10uF
0.1uF
C0805
C0402
R0603+/-5%
AUDGND
4
VOUT
AUDGND
R862
1K
+/-1%
R0402
RCDL 17
RCDR 17
CDGND 17
5
4
AUDGNDAUDGND
BC837
0.1uF
*
16V, X7R, +/-10%
C0402
+5VAA
BC809
*
0.1uF
C0402
BEEP
BC794
0.1uF
*
16V, X7R, +/-10%
C0402
+5VA+5V
BC841
*
10nF
C0402
BC831
*
0.1uF
C0402
TECHNOLOGY COPR.
Title
AUDIO ALC202A & AMP
Document Numbe r R e v
2
Date: Sheet
661S03
of
27 50Friday, August 13, 2004
1
A
Page 28

5
D D
C C
+5VA
R448
100K
+/-1%
R0603
BC514
R436
10uF
C0805
100K
+/-1%
R0603
*
+5VA
U48A
84
3
+
2
-
LM358MX
AUDGNDAUDGND
INT_MIC18 EXTMIC 18
R947
1
2.2K
+/-5%
R0603
INT_MIC
R417
10K
+/-5%
R0603
AUDGND
4
*
*
AUDGND
BC857
1uF
C0603
*
BC853
47pF
50V, NPO, +/-5%
C0603
*
BC858 0.22uF
C0603
FB61
FB L0805 80 Ohm
2 1
EXTMIC
EXTMICIN
BC840
470pF
External MIC
50V, NPO, +/-5%
C0603
*
AUDGND
*
AUDGND
+5VA
R953
100K
+/-1%
R0603
BC517
R935
4.7uF
100K
+/-1%
C0805
R0603
R431 4.7K
+/-5%R0603
BC521
0.47uF
C0603
EXTMICIN 18
3
+5VA
R934
1M
+/-1%
R0603
5
6
R432 10K
+/-5%R0603
*
BC516
1nF
50V, X7R, +/-10%
C0603
+
-
84
LM358MX
U48B
7
AUDGND
R928
1K
+/-5%
R0603
*
AUDGND
MIC_IN
BC854
10nF
50V, X7R, +/-10%
C0603
2
MIC1 27
1
B B
Place near the switch
connecter 2004/07/03
BC787 0.1uF
C0603
R930 0
R0805
R929 0
R0805
A A
5
*
+/-5%
Dummy
+/-5%
25V
AUDGND
Title
TECHNOLOGY COPR.
MIC Jack & AUDIO Jack
Document Numbe r R e v
4
3
2
Date: Sheet
661S03
of
28 50Friday, August 13, 2004
1
A
Page 29

5
4
3
2
1
VDD3
*
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31
R600
100
+/-5%
R0603
R150
4.7K
+/-5%
R0603
25V, Y5V, +80%/-20%
C14
C12
10nF
10nF
*
C0603
C0603
50V, Y5V, +80%/-20%
U9
103
AD1
104
AD0
102
AD2
98
AD3
97
AD4
96
AD5
95
AD6
93
AD7
90
AD8
89
AD9
87
AD10
86
AD11
85
AD12
83
AD13
82
AD14
79
AD15
59
AD16
58
AD17
57
AD18
55
AD19
53
AD20
50
AD21
49
AD22
47
AD23
43
AD24
42
AD25
40
AD26
39
AD27
37
AD28
36
AD29
34
AD30
33
AD31
92
CBE0B
77
CBE1B
60
CBE2B
44
CBE3B
30
REQB
29
GNTB
61
FRAMEB
63
IRDYB
68
DEVSELB
69
STOPB
67
TRDYB
76
PAR
70
PERRB
75
SERRB
25
INTAB
27
RSTB
28
CLK
46
IDSEL
65
CLKRUNB
88
M66EN
C5
10nF
*
C0603
50V, X7R, +/-10%
GND
22
D D
10V, Y5V, +80%/-20%
C C
B B
A A
C30
10uF
C1206
L17
C29
C13
*
*
0.1uF
C0603
C0603
FB L0805 60 Ohm
21
AD[0..31]9,22,23
REQ0J9
GNT0J9
FRAMEJ9,22,23
IRDYJ9,22,23
DEVSELJ9,22,23
STOPJ9,22, 23
TRDYJ9,22, 23
PAR9,22, 23
PERRJ22,23
SERRJ9,22,23
INT-C9,22,23
PCIRSTJ9,15,17,22,23,40,41
PCLK_LAN13
CLKRUNJ10,15,22
0.1uF
AD[0..31]
C/BE0J9,22,23
C/BE1J9,22,23
C/BE2J9,22,23
C/BE3J9,22,23
R151 0
*
DUMMY
AD18
C33
0.1uF
C0603
VDD3+3V
+/-5%R0603
*
+3V
50V, X7R, +/-10%
C24
10nF
*
C0603
26
41
56
71
VDD33
VDD33
VDD33
GND
GND
GND
35
48
52
62
VDD33
GND
84
94
VDD33
GND
73
80
107
VDD33
VDD33
GND
GND
GND
100
112
16V, X5R, +/-10%
24
VDD25/18
GND
118
VDD25/18_LAN
C9
10uF
C28
*
*
0.1uF
C1206
C0603
L7 FB L0805 60 Ohm
32
21
3
45
54
64
78
99
110
VDD25/18
VDD25/18
VDD25/18
VDD25/18
VDD25/18
VDD25/18
7
116
126
VDD18
AVDDL
VDD25/18
AVDDL
VDD25/18
RTL8100C
LNAGD
LNAGD
VSSPST
VSSPST
21
38
VSSPST
VSSPST
51
66
VSSPST
VSSPST
81
91
VSSPST
101
VSSPST
119
LNAGD
4
9
13
C31
0.1uF
C0603
16V, X5R, +/-10%
16
20
AVDDL
AVDDL
AVDDH
MDI0+
MDI0-
MDI1+
MDI1-
MDI2+
MDI2-
MDI3+
MDI3-
HSDAC-
HSDAC+
CTRL25
CTRL18
RSET
EECS
EESK
EEDO
LWAKE
PMEB
SMBCLK
SMBDATA
LED3
LED2
LED1
LED0
XTAL1
XTAL2
ISLATB
LNAGD
HG
LNAGD
17
123
124
128
EEDI
LG2
*
HV
0.1uF
0.1uF
C0603
C0603
C23
10uF
*
C1206
10
120
MDI0P
1
MDI0N
2
MDI1P
5
MDI1N
6
MDI2P
14
MDI2N
15
MDI3P
18
MDI3N
19
R0603 dummy
R85
12
11
R860+/-5% R0603DUMMY
8
125
R110 5.6K
127
C25
C20
*
2.49K/F 8110
106
111
109
108
105
31
R154 4.7K
72
74
113
114
115
117
CLK_LAN_X1
121
CLK_LAN_X2
122
23
129
129
C6
0.1uF
*
25V, X7R, +/-10%
C0603
Lan
IDSEL AD18
*
C19
*
0.1uF
C0603
REG25
REG18
+/-5%R0603
R155 4.7K
R76 1K
C10
10nF
*
50V, X7R, +/-10%
C0603
C22
C21
*
0.1uF
0.1uF
C0603
C0603
R599
0
VDD3
+/-5%
R0603
TRDP0 30
TRDN0 30
TRDP1 30
TRDN1 30
TRDP2 30
TRDN2 30
TRDP3 30
TRDN3 30
0
+/-5%
2.5V_LAN
+/-1%R0603
EECS
EESK
EEDO
DUMMY
+/-5%R0603
SUSBJ 10,15
+/-5%R0603
50V, X7R, +/-10%
C11
10nF
*
*
C0603
*
MDI0P
R88
49.9
+/-1%
R0603
EEDI/AUX
VDD33
DUMMY
C32
10nF
*
50V, X7R, +/-10%
C0603
L12
L14
MDI0N
R87
49.9
+/-1%
R0603
C4
10nF
*
50V, X7R, +/-10%
C0603
R602
10K
+/-5%
R0603Dummy
Dummy
LAN_PME_591J 15
C27
10nF
C0603
50V, X7R, +/-10%
R74
49.9
+/-1%
R0603
R604
5.6K
+/-5%
R0603
1
2
3
4
XTAL-25MHz
1 2
L13
21
dummy
21
FB L0805 60 Ohm
MDI1P
MDI1N
C1
10nF
*
50V, X7R, +/-10%
C0603
VDD3
U38
CS
SK
DI
DO
AT93C46-2.7V
C7
27pF
*
50V, NPO, +/-5%
C0603
X2
*
C8 27pF
50V, NPO, +/-5%C0603
L15 FB L0805 60 Ohm
DUMMY
21
21
FB L0805 60 Ohm
FB L0805 60 Ohm
VDD3
2.5V_LAN
MDI2P
MDI2N
R73
R84
49.9
49.9
+/-1%
+/-1%
R0603
R0603
C3
10nF
*
50V, X7R, +/-10%
C0603
8
VCC
7
NC
6
ORG
5
GND
2.5V_LAN
1.8V_LAN
R83
49.9
+/-1%
R0603
R78
49.9
+/-1%
R0603
VDD3
C26
0.1uF
*
25V, X7R, +/-10%
C0603
AVDDH
V_12P
AVDDL
V_DAC
DVDD
DVDD_A
1.8V_LAN
MDI3N
MDI3P
R77
49.9
+/-1%
R0603
C2
10nF
*
50V, X7R, +/-10%
C0603
RTL8100C
2.5AVDD
3.3AVDD
2.5VDD
N/A
N/A
N/A
REG25
REG18
RTL8110S /
RTL8169S
3.3AVDD
N/A
2.5AVDD
2.5AVDD
1.8VDD
1.8VDD
Q58
2SA1576A
13
2
Q57
2SA1576A
13
2
VDD32.5V_LAN
VDD3
REQ0/GNT0
TECHNOLOGY COPR.
29 50Friday, August 13, 2004
1
of
A
5
Title
Document Numbe r R e v
4
3
2
Date: Sheet
RTL8100
Page 30

8 7 6 5 4 3 2 1
10
1
2
3
4
5
6
7
8
9
CN9
TX+/0+
TX-/0RX+/1+
NC1/2+
NC2/2RX-/1NC/3+
NC4/3-
TIP
RING
RJ45_ RJ11
GND1
GND2
BC540
0.1uF
*
C0402
16V, X7R, +/-10%
BC539
10nF
*
C0402
11
12
25V, X7R, +/-10%
BC11
1.5nF
*
C1808
2kV, X7R, +/-10%
3VAUX
BC623
0.1uF
*
16V, X7R, +/-10%
C0402
D D
WILLIAM
071704
J4
1
3
NC
2
4
NC
Header_1X2
*
J5
9
10
Wire To Borad_8
BC6
1.5nF
2kV, X7R, +/-10%
C1808
8
7
2
6
5
1
4
3
*
MX0+
MX0MX1+
MX2+
MX2-
MX1-
MX3+
MX3-
TIP_RJ11
RING_RJ11
BC7
1.5nF
2kV, X7R, +/-10%
C1808
C C
+3V
R958
0
R0402
+/-5%
R957 0
Dummy
Dummy
+/-5%
R0402
Dummy
TRANSFORMER
TXTX+
TXCT
RXCT
RXRX+
@8100C
XFMR 350uH
TDCT
RDCT
RD+
MDI1- MX2+
6
TD-
5
TD+
4
3
2
RD-
1
L3
25V, X7R, +/-10%
MDI1+
V_DAC0
V_DAC1
MDI0MDI0+
BC9
10nF
C0402
@8100C
*
TRDN1 29
TRDP1 29
TRDN029
TRDP0 29
R955 0
R0402
+/-5%
R487 75R0402 +/-5% @8110S
R488 75R0402 +/-5% @8110S
BC10
1.5nF
*
2kV, X7R, +/-10%
C1808
@8110S
MX2-
MX3+
MX3-
7
8
9
10
11
12
MX1-
B B
R9 75R0402 +/-5% @8100C
R8 75R0402 +/-5% @8100C
BC12
1.5nF
*
2kV, X7R, +/-10%
C1808
@8100C
MX1+
MX0MX0+
7
8
9
10
11
12
TXTX+
TXCT
RXCT
RXRX+
XFMR 350uH
R956 0
TD-
TD+
TDCT
RDCT
RD-
RD+
L10
+/-5%
@8110S
6
5
4
3
2
1
MDI2+
MDI2V_DAC2
V_DAC3
MDI3+
MDI3-
BC538
10nF
25V, X7R, +/-10%
C0402
Dummy
*
BC537
10nF
*
25V, X7R, +/-10%
C0402
Dummy
TRDP2 29
TRDN2 29
R0402
TRDP3 29
TRDN3 29
Title
TECHNOLOGY COPR.
RJ45&TRANSFORMER
Document Number Re v
Date: Sheet
661S03
of
30 50Friday, August 13, 2004
A
A
Page 31

5
4
3
2
1
+5V
R490
R480
100K
+/-5%
SGND6
MAX1987_SUS
H_DPSLPJ_PW
MAX1987_PSI
MAX1987_SHDNJ
R7
301K
+/-1%
R0603
R485
49.9K
+/-1%
R0603
SGND6
10
+/-5%
R0402
*
SGND6
MAX1987_VCC
1987_CKENJ
*
R491
28K
+/-1%
R0603
BC533
1uF
C0603
12
22
23
24
30
29
28
27
26
25
8
7
6
3
4
5
43
44
21
9
2
14
10
11
1
31
U32
VCC
SYSPOK
IMVP_OK
CLK_EN
D0
D1
D2
D3
D4
D5
S2
S1
S0
B0
B1
B2
SUS
DPSLP
PSI
SHDN
TON
CCV
REF
ILIM
TIME
DD0
49
SGND6
THERMALPAD
BSTM
PGND
OAIN+
OAIN-
BSTS
MAX1987
VDD
DHM
LXM
DLM
GND
CMP
CMN
NEG
POS
CSP
CSN
DHS
LXS
DLS
CCI
36
42
V+
32
34
33
35
37
13
45
46
20
19
18
FB
16
17
15
48
47
41
39
40
38
+3V
D D
R481
R482
100K
100K
+/-5%
+/-5%
R0402
R483
+/-5%
VCCP_HWPG35
PWRGD7 ,10,15
0 R0402
CPU_VID04
CPU_VID14
CPU_VID24
CPU_VID34
CPU_VID44
CPU_VID54
R0402
R0402
SUSPEND MODE=0.748V
BOOT MODE=1.196V
C C
PSIJ4
VRON15,35
R500 0 R0402+/-5%
R475 0 R0402+/-5%
R489 0 R0402+/-5%
DPRSLPVR4,10
FLOAT (300KHZ)
SGND6
SGND6
B B
BC535 0.22uF C0603
*
BC531 270pF C0402
*
BC534
100pF
C0402
+3V
*
1987_BSTM
MAX1987_CMP
MAX1987_OAIN+
R476
4.7K R0402
FB
BC532
*
470pF
CCI
C0603
BST2
BC543
2.2uF
C0603
D21
2 1
RB751V-40
+/-5%
MAX1987_POS
MAX1987_CSP
D22
2 1
RB751V-40
BC536 0.1uF C0805
*
LX_VCORE
DH_VCORE
DL_VCORE
BC530
4.7nF
C0603
*
R484
1M
+/-5%
R0402
BC544 0.1uF C0805
R477
1.5K
+/-5%
R0402
R479
2.74K
+/-1%
R0603
+5V
*
DH_VCORE2
LX_VCORE2
DL_VCORE2
MAX1987_OAIN-
VIN_CPU
R478
100K
+/-5%
R0402
VIN
Q45 PH5330E
4
G
Q40
PH5330E
4
FB3
FB L0805 300 Ohm
21
21
FB4
FB L0805 300 Ohm
5
D
S1S2S
3
5
D
G
S1S2S
3
Q39
PH5330E
678
D
GSS
S
4 5
Q44 PH5330E
4
G
678
DDD
D
GSS
S
123
4 5
5
4
G
S1S2S
DDD
123
5
D
S1S2S
3
Q36
IRF7811W
D
3
Q48
IRF7811W
21
*
21
D2
B320B
1
BC542
1uF
C0805
L5 0.5uH
3
2
D4
B320B
VIN_CPU
*
*
L40.5uH
Not in CIS
lonny 070704
BC59
10uF
C1210
BC541
1uF
C0805
3
2
BC13
*
10uF
C1210
VCORE_CPU
R520
1
2m
R2512
+/-5%
BC568
*
*
0.1uF
C0805
R509
2m
R2512
+/-5%
R504
750 +-1%
R0402
It should be close
to max1987's pin
BC573
0.1uF
C0805
R503
1K
+/-1%
R0402
VIN_CPU
*
C15
330uF
*
CTX
VCORE_CPU
C18
330uF
*
CTX
*
C17
330uF
CTX
C16
330uF
CTX
R494
10K
+/-5%
R0402
A A
H_DPSLPJ3,10
Q37
2N7002
5
H_DPSLP_1
DS
G
R496
10K
+/-5%
R0402
Q38
2N7002
H_DPSLPJ_PW
DS
G
SGND6
SHORT7
1 2
JUMPER1
Not in CIS
lonny 070704
R501
750 +-1%
R0402
R502
1K
+/-1%
R0402
TECHNOLOGY COPR.
Title
CPU POWER
Document Numbe r R e v
4
3
2
Date: Sheet
661S03
of
31 50Friday, August 13, 2004
1
A
Page 32

8 7 6 5 4 3 2 1
RTC
NOTE!
1.The VCCRTC is 3V
2.Decoupling capacitor must be close to 652 RTCVDD pin.
3.RTC circuit must strictly follow SiS's recommended design
SiS is not responsible for RTC problems from foreign designs.
D D
3VAUX
Q13
MMBT3906
E C
R165
47K
+/-5%
R0402
R158
15K
+/-5%
R0402
B
R156
10K
+/-5%
R0402
Q12
B
MMBT3904
E C
BC635
1uF
*
C0805
*
EC25
22uF
8V, +/-20%
CTB
21
D31
1N4148
BAT
BAT
C C
BAT
R603
1K
+/-1%
R0402
RTC_CONN1
1
NC
2
345
NC
Header_1X3
+5V
Q53
DTA124EUA
TEMP_OVTJ3
B B
R572 820
VFAN15
10V, Y5V, +80%/-20%
2
R0603+/-5%
BC599
10uF
C0805
13
R567
*
10K
+/-5%
R0603
R51
3K
+/-5%
R0603
BC597
0.1uF
*
25V, X7R, +/-10%
C0603
R50 2K
R0603 +/-5%
U6
1
OUT1
2
IN1-
3
IN1+
4
V-
LM358MX
BC88
10uF
C0805
10V, Y5V, +80%/-20%
Decoupling Capacitor
Place close to 96X
MOSVCC_RUN
8
V+
7
OUT2
5
IN2+
6
IN2-
*
VCCRTC
D30
2 1
1N4148
R601 10K
R0402 +/-5%
BC293
10nF
*
16V, X7R, +/-10%
BC296
*
BC87
1nF
*
C0402
1uF
C0805
FANSIG15
C0402
3
R47
1K
+/-5%
R0603
2
Q54
DTC144EUA
+5V
65241
+5V_FAN
13
*
EC24
10uF
*
6.3V, Y5V, + 80%/-20%
C0805
Q52
Si3456BDV
FAN_CONN1
1
2
345
Header_1X3
BC93
1nF
50V, X7R, +/-10%
C0402
R571 10K R0402+/-5%
BATOK 10
NC
NC
+3V
3VAUX
R169 1K
R0402 +/-5%
D9
2 1
1N4148
AUXOK
R164
100K
+/-5%
R0402
*
EC6
22uF
8V, +/-20%
CTB
AUXOK 7,10
A
Title
TECHNOLOGY COPR.
Document Number Re v
Date: Sheet
661S03
of
32 50Friday, August 13, 2004
A
Page 33

5
+5VALW +5VSUS +3VSUS MOSVCC
4
3
2
1
R376
1M
+/-5%
D D
SUSON10,15,38
C C
MAINON15,22,34,36,38
2
2
R0603
Q29
DTC144EUA
1 3
+5VALW +5V +3V +1.8V MOSVCC_RUN
R825
1M
+/-5%
R0603
MAINONJ
Q20
DTC144EUA
1 3
R359
270
+/-5%
R0603
DS
Q28
G
2N7002
R826
270
+/-5%
R0603
DS
Q19
G
2N7002
R833
110
+/-5%
R0603
DS
Q22
G
2N7002
R316
110
+/-5%
R0603
DS
Q65
G
2N7002
R827
1M
+/-5%
R0603
SUSD 34,35
DS
Q21
G
2N7002
R317
32.4
+/-1%
R0603
DS
Q64
G
2N7002
BC776
1nF
*
50V, X7R, +/-10%
C0603
DS
G
R314
1M
+/-5%
R0603
Q66
2N7002
BC426
1nF
*
50V, X7R, +/-10%
C0603
MAIND 34
B B
3
H1
H20
HOLE_30X80
HOLE_39X60
H18
H14
HOLE_30X80
AUDGND
HOLE_39X60
H7
H16
HOLE_30X80
HOLE_39X60
Title
TECHNOLOGY COPR.
Discharge
Document Numbe r R e v
2
Date: Sheet
661S03
of
33 50Friday, August 13, 2004
1
A
H19
HOLE_30X60
H21
HOLE_30X80
A A
H4
HOLE_39X60
H17
HOLE_30X80
H9
HOLE_39X100
5
H15
HOLE_30X80
H11
HOLE_39X100
H12
HOLE_30X80
H10
HOLE_37X80
H3
HOLE_30X80
H6
HOLE_37X80
4
H2
HOLE_30X80
H5
HOLE_37X80
H8
HOLE_30X80
H13
HOLE_39X60
Page 34

5
4
3
2
1
VCC_1999
SGND2SGND2
*
SGND2
20
17
1
28
26
27
24
22
7
3
4
25
R439
0
+/-5%
R0402
Dummy
R412 47
R0603 +/-1%
1uF
BC509
C0603
MAX1999
U30
V+
VCC
N.C.
BST3
DH3
LX3
DL3
OUT3
FB3
ON3
ON5
LDO3
SKIP
12
R440
0
+/-5%
R0402
VCC_1999
D19
1SS355
2 1
PGOOD
SHDN
6
MAX1999_SHDNJ
william
073104
LDO5
BST5
DH5
OUT5
PRO
ILIM5
ILIM3
REF
TON
GND
R385 4.7
VIN
R0805 +/-5%
D D
BC829
0.1uF
*
C0603
BC825
0.1uF
*
C0603
3VAUX
4A/3.3V
BC476
4.7uF
C0805
EC29
330uF
*
CTX
BC478
0.1uF
*
*
C0402
C C
BC503
10uF
*
25V, Y5V, +80%/-20%
C1210
SHORT11
L8
5.2uH
1SS355
D44
*
21
SSS
123
SSS
123
VIN
678
DDD
Q71
IRF7413
GD
4 5
Q70
IRF7413
678
DDD
GD
4 5
3VAUX_EN15,50
BC480
4.7uF
25V, X5R, +/-10%
BC507 0.1uF
C0603 25 V, X7R, +/-10%
SGND2
*
C1206
SGND2 SGND2
*
BC862 0.1uF
C0402 10V, X7R, +/-10%
*
R950 33.2K
R0603 +/-1%
R948 0
R0402 +/-5%
R443 0
R0402 +/-5%
R447 2K
R0603 +/-1%
R949
220K
+/-5%
R0603
BC486
0.1uF
*
C0603
R392 4.7
R0603 +/-5%
Dummy
Dummy
+3VALW
*
BC484
4.7uF
C0805
DH3
LX3
DL3
LX5
DL5
FB5
R441
+/-5%
R0402
R442
330K
+/-5%
R0402
2 1
18
14
16
15
19
21
9
10
11
5
8
13
23
2
1M
+5VALW
*
D20
1SS355
R393 4.7
R0603 +/-5%
DH5
LX5
DL5
PRO#
ILIM5
ILIM3
TON
VIN
BC483
4.7uF
C0805
REF_1999
BC520
1uF
*
C0603
SGND2
SUSOK 15,36
R416
10K
+/-5%
R0603
+3VSUS
BC485
1uF
*
C0603
BC497 0.1uF
C0603 25V, X7R, +/-10%
*
R446
0
+/-5%
R0603
SGND2
HWPG 15,36
BC498
10uF
*
25V, Y5V, +80%/-20%
C1210
Q69
IRF7413
VIN
BC838
0.1uF
*
*
C0603
678
DDD
Q72
IRF7413
SSS
GD
123
4 5
678
DDD
GD
4 5
21
SSS
123
R952 100K
R0603 +/-1%
BC861 0.1uF
C0402 10 V, X7R, +/-10%
*
BC830
0.1uF
C0603
L9
*
1SS355
Dummy
D43
5.2uH
4A/5V
EC30
330uF
*
CTX
5VAUX
*
SHORT12
BC477
0.1uF
C0402
R414
200K
R0603
+/-5%
R413
100
R0402
+/-5%
Q32
2N7002
R394 0
G
R0402 +/-5%
Q31
Si2301DS
S D
G
5
R391 0
R0603 +/-5%
*
MAINON 15,22,33,36,38
BC502
1uF
C0805
*
BC445
0.1uF
16V, X7R, +/-10%
C0402
4
U28 MAX1683
C+5IN
3
C-
BC493
4.7uF
C0805
GND
1
+3V +3VSUS +5VSUS
*
*
B B
A A
MOSVCC
DS
4
2
OUT
Q25
4
G2
S2
3
2
G1
1
S1
BC778
Si9936BDY
0.1uF
16V, X7R, +/-10%
C0402
5VAUX
*
BC481
4.7uF
C0805
SGND2
*
SHORT14
1 2
JUMPER1
Q67
4
G2
S2
3
2
G1
1
S1
BC773
Si9936BDY
0.1uF
16V, X7R, +/-10%
C0402
R444
60.4K
+/-1%
R0603
ILIM5
ILIM3
PRO#
TON
R445
15K
+/-1%
5VAUX3VAUX
5
D2
D2
6
7
D1
D1
8
2
R0603
Title
Document Number Rev
Date: Sheet
R951
60.4K
+/-1%
R0603
R931
15K
+/-1%
R0603
661S03
MOSVCCMOSVCC_RUN
S4,10V
BC488
4.7uF
*
C1206
+5V
5
D2
D2
6
7
D1
D1
8
16V, X7R, +/-10%
3
SUSD33,35SUSD33,35
MAIND33MAIND33
BC774
0.1uF
*
C0402
Dummy
SGND2
R426
0
+/-5%
R0402
R427
0
+/-5%
R0402
1
VCC_1999
R937
0
+/-5%
R0402
Dummy
R938
0
+/-5%
R0402
TECHNOLOGY COPR.
34 50Friday, August 13, 2004
A
of
Page 35

8
7
6
5
4
3
2
1
D D
BC644
0.1uF
C0603
*
SGND5
MAX 4.0A
Vccp=1.05V
+VCCP
SHORT1
21
EC3
C C
B140
D8
*
220uF
CTX
EC4
*
220uF
CTX
*
SGND5
BC259
4.7uF
C1206
R594
10K
+/-1%
R0603
3S2P Li+
*
R589
500 +-1%
R0603
BC642
4.7uF
C1206
L16
*
3.3uH
not in cis
07/15/04
VIN
*
R576
4.7
+/-5%
R0603
BC610
1uF
16V, X7R, +/-10%
C1206
PQ1B
FDS6982S
PQ1A
FDS6982S
BC614
1nF
*
50V, NPO, +/-5%
C0603
5
D2 D1
S1
3
7
D2 D1
S1
1
6
8
4
G1
2
G1
*
R591 250k +-1%
5VAUX
BC605
4.7uF
10V, X7R, +/-10%
C1206
R586 250K +-1%
R0805
BC612 0.1uF
C0603 25V, X7R, +/-10%
*
235khz/170khz
SGND5 SGND5
D26
RB751V-40
2 1
R0805
R573 2.2
R0603 +/-5%
5VAUX
R587 0
R0402 +/-5%
BC624 0.47uF
C0805
*
25V, Y5V, +80%/-20%
SGND5
20
21
12
25
26
27
24
3
5
1
9
2
8
U36
VDD
VCC
ILIM1
ILIM2
BST1
DH1
LX1
DL1
TON
OUT1
REF
FB1
AGND
MAX1715
100mV
+2.0V
NC115NC223NC3
28
BST2
PGND
OUT2
SKIP
PGOOD
V+
ON1
ON2
DH2
LX2
DL2
FB2
VIN
4
MAX1715_ON1
10
MAX1715_ON2
11
R575
2.2
18
R0603 +/-5%
17
16
19
22
14
6
13
Vfb=1.0V
7
R588 10K
R0402 +/-5%
*
D27
RB751V-40
2 1
*
R592 0
R590 0
BC613 0.22uF
C0805
25V, Y5V, +80%/-20%
VCCP_HWPG 31
BC604
1nF
50V, NPO, +/-5%
C0603
BC615
0.1uF
25V, X7R, +/-10%
C0603
*
3VAUX
BC601
4.7uF
*
10V, X7R, +/-10%
C1206
Vin: 3S2P -- 10.8V/typ;
VIN
*
VRON 15,31
SUSD 33,34
SGND5
5
6
D2D1
4
FDS6982S
G1
S1
3
7
8
D2D1
PQ2A
2
FDS6982S
G1
S1
1
PQ2B
BC227
4.7uF
C1206
SIS648Fx: IVDD=1.5V/2.2Amax
BC214
4.7uF
C1206
5.2uH
*
SGND5
BC192
0.1uF
C0603
R585
X.0K +-1%
R0603
R583
10K
+/-1%
R0603
MAX 4.0A
EC7
*
220uF
CTX
R646=8K: 1.8V for IVDD sis661fx
R646=5K: 1.5V for IVDD sis648fx
*
PL1
*
SIS661fx: IVDD=1.8V/1.3Amax
IVDD
SHORT9
EC5
*
220uF
CTX
BC616
2.2uF
*
16V, Y5V, +80%/-20%
C0805
21
RB751V-40
D29
B B
8
7
6
SGND5
SHORT8
1 2
JUMPER1
Title
Document Number Re v
5
4
3
Date: Sheet
2
661S03
TECHNOLOGY COPR.
of
35 50Friday, August 13, 2004
1
A
A
Page 36

8 7 6 5 4 3 2 1
D D
5VAUX
5VAUX
VIN
BC489
*
*
SGND4
1uF
C0603
VREF
ILIM
VOUT_H
VOUT_L
SGND4
R387
0
+/-5%
R0402
19
22
24
21
3
6
5
7
8
2
1
U29
VDD
VCC
OVP/UVP
LSAT
REF
ILIM
REFIN
OD
GATE
FBLANK
TON
SGND4
MAX1993
13
SGND4
1 2
JUMPER1
SKIP#
R415
0
+/-5%
R0402
SHORT6
SHDN#
BST
CSN
CSP
OUT
PGOOD
GND
20
14
V+
23
R388
17
R0805 +/-5%
15
DH
16
LX
12
18
DL
11
9
FB
10
4
T
25
R390
0
+/-5%
R0402
2.2
R381
4.7
+/-5%
R0603
BC492
*
1uF
C0603
SGND4
BC508 0.22uF
C0805 16V, X7R, +/-10%
BC513 1nF
C0402 50V, X7R, +/-10%
SGND4
VCORE_L/H#41
R383 0
R0402 +/-5%
0 : Core VCC=1.2V
1 : Core VCC=1V
R437
100K
+/-1%
R0603
Dummy
DS
G
R428
100K
+/-1%
R0603
Dummy
*
SAVE_POWER_M10 15
ILIM
VOUT_H
VOUT_L
2N7002
Dummy
SGND4
Q33
SGND1
C C
Vref=2.0V
VREF
R395
100K
+/-1%
R0603
R411
140K
+/-1%
R0603
NEW COMPENT
Demo is 37.5K
R429
75K
+/-1%
R0603
R434
75K
+/-1%
R0603
R438
37.4K
+/-1%
R0603
B B
SGND4
BC490
*
1nF
C0402
*
D18
RB751V-40
SGND4
2 1
R382 0
R0402 +/-5%
BC504 0.1uF
HWPG 15,34
BC496
4.7uF
*
10V, Y5V, +80%/-20%
C0805
BC506
0.1uF
25V, Y5V, +80%/-20%
C0603
MAINON 15,22,33,34,38
C0603
*
VIN
BC785
*
21
3
2
L21 0.8uH
D42
B320B
10uF
C1210
BC457
*
1nF
C0805
567
8
Q26
D
4
8
4
123
567
Q27
D
123
IRF7455
IRF7455
PHE5330E: 30V-85A-7.5mohm
Iilim=79mV>(Iloadmax-0.15Iloadmax)*Rdaon
=(10-0.15*10)*7.5
=63.75;
BC449
10uF
*
25V, Y5V, +80%/-20%
C1210
1
ESR
40mR
*
EC20
330uF
CTX
(7000 MA 1.2V VDDC )
VCORE_VGA
SHORT10
EC19
330uF
*
CTX
BC515
1nF
*
50V, X7R, +/-10%
C0402
Title
TECHNOLOGY COPR.
VCORE VGA
Document Number Re v
Date: Sheet
661S03
of
36 50Friday, August 13, 2004
A
A
Page 37

8 7 6 5 4 3 2 1
VDDQ
M661FX+302LV is 1.8V ; 648FX+M10 is 1.5V
lonny 070804
+3V VDDQ
D D
BC304
10V, Y5V, +80%/-20%
10uF
C1206
@dummy
U13 AIC1084CE
VIN3VOUT
*
VDDQ 1.8/1.5V_5A
Vref=1.25V
2
+
ADJ
1
Vref
-
R680
45.3
+/-1%
R0402
dummy
R681
124
+/-1%
R0402
R679
54.9
+/-1%
R0402
*
BC272
470uF
2.5V, +/-20%
CTX
BC673
BC284
0.1uF
470uF
*
*
16V, X7R, +/-10%
2.5V, +/-20%
C0603
CTX
45.3_1%R933 R_OPEN
1.8V1.5VVDDQ
AUX_IVDD=1.8V(M661FX)
JP50 OPEN JP51 OPEN
AUX_IVDD=1.9V(648FX)
JP50 OPEN JP51 SHORT
1.8V for VB/1.5V for AGP
C C
VDDQ Sis consumption Spec
Current is 281.3mA( Only AGP8X)
Lonny 070804
AUX_IVDD 1.8V/1.9V
Vref=1.24V
U22
SC431L
1
3 2
JP23
SHORT
3VAUX
R313 62
R0402 +/-5%
R318 62
R0402 +/-5%
BC436
0.1uF
*
16V, X7R, +/-10%
C0402
for SB1.8V current 38mA (max)
for SB1.5V current 48mA (max)
R829
43.2
+/-1%
R0603
12
JP22
SHORT
R830
47
+/-1%
R0603
+
R839
Vref
105
+/-1%
-
R0603
12
R838
560
+/-1%
R0603
BC424
10uF
*
10V, X5R, +/-10%
C1206
AUX_IVDD
BC423
0.1uF
*
16V, X7R, +/-10%
C0402
AUX_IVDD Sis consumption Spec
Current is 493mA
Lonny 070804
B B
3VAUX +1.8VAUX
AIC1086
3
Vin
BC360
10uF
*
10V, X5R, +/-10%
C1206
2
1
Vout
ADJ
U19
4
4
+
Vref
-
Vref=1.25V
R283
105
+/-1%
R0603
R284
54.9
+/-1%
R0402
*
TC5
470uF
2.5V, +/-20%
CTX
BC387
10uF
*
10V, X5R, +/-10%
C1206
10V, Y5V, +80%/-20%
+3V +1.8V
BC210
10uF
C1206
U8 AIC1084CE
VIN3VOUT
*
Vref=1.25V
2
+
ADJ
1
Vref
-
R121
240
+/-1%
R0603
R129
86.6
+/-1%
R0603
R124
45.3
+/-1%
R0402
*
BC188
470uF
2.5V, +/-20%
CTX
*
BC215
470uF
2.5V, +/-20%
CTX
BC213
0.1uF
*
16V, X7R, +/-10%
C0603
TECHNOLOGY COPR.
Title
Document Number Re v
Date: Sheet
661S03
of
37 50Friday, August 13, 2004
A
A
Page 38

5
D D
DDR_VTT
EC11
47uF
*
4V, +/-20%
CTB
C C
DDRVREF
SKIP#=AVdd: PWM
SKIP#=GND: Skip mode
TON=open: 300KHz
*
R358
0
+/-5%
R0402
R357
0
+/-5%
R0402
Dummy
EC18
47uF
4V, +/-20%
CTB
R363
100K
+/-5%
R0402
100K
+/-5%
R0402
R362
TON=GND: 600KHZ
B B
FB=AVdd: 1.8V Output
FB=GND: 2.5V output
4
BC458
*
22uF
C1206
*
R373
100K
+/-5%
R0402
R368
0
+/-5%
R0402Dummy
R367 0 +/-5% R0402
BC467
*
3.9nF
C0603
*
BC471
0.22uF
R375
C0603
178k
+/-1%
R374
R0603
68K
+/-1%
R0603
R330
33K
+/-1%
R0603
13
12
11
10
BC468
1uF
C0603
25
24
15
16
9
2
5
6
1
8
3
4
U25
VTTI
VTT
VTTS
PGND2
VTTR
OVP/UVP
POK1
POK2
SKIP#
TON
GND
SS
+2.0V
REF
ILIM
FB
OUT
MAX8550
BC452
10nF C0402
*
14
REFIN
AVDD
VDD
VIN
BST
PGND1
SHDNA#
SHDNB#
STBY
THERMALPAD
29
3
BC466
1uF
26
22
17
20
19
LX
18
DH
21
DL
23
27
28
7
BC450
0.22uF
*
10V, X7R, +/-10%
C0603
SUSON 10,15,33
MAINON 15,22,33,34,36
R364 10K
+/-5% R0402
R365 0
+/-5% R0402
R355
10
+/-5%
R0402
*
D17
B120
2 1
10V, Y5V, +80%/-20%
C0603
BC460
4.7uF
10V, Y5V, +80%/-20%
C0805
*
567
8
D
4
123
8
4
+3VSUS
S3AUXSW- 6,10
567
123
BC430
0.1uF
C0603
D
5VAUX
Q24
IRF7455
Q23
IRF7455
BIAS
SUPPLY
*
BC451
0.1uF
C0603
*
L20 2.7uH
21
1SS355
*
BC447
4.7uF
C1206
D16
VIN
*
2
SHORT5
1 2
JUMPER1
VDIMM_BF
SHORT4
*
C34
150uF
4V, +/-20%
CTX
*
C35
150uF
4V, +/-20%
CTX
BC417
1uF
*
10V, Y5V, +80%/-20%
C0603
1
VDIMM
Vilim(min)=10*Ioutmax*(1-LIR/2)*Rdsonlow25c*1.25
=10*12*0.85*5*1.25
A A
=637.5MV
Vilim_rating=637.5*1.15=733.125MV
5
R4=(2V-0.3*Vilim_rating)/10=178Kohm;
4
Title
VDIMM&VTT_MEM
Document Numbe r R e v
3
2
Date: Sheet
661S03
TECHNOLOGY COPR.
38 50Friday, August 13, 2004
1
of
A
Page 39

8 7 6 5 4 3 2 1
VIN MMBATA+VIN
R800
R801
100K
+/-5%
R0402
Q62
REFON15
DTC144EUA
2
1 3
D D
100K
+/-5%
R0402
DS
Q61
G
2N7002
R785
102K
+/-1%
R0603
DS
Q63
G
2N7002
Monitor battery voltage
R820
18K
+/-1%
R0603
BC771
10nF
*
C0603
MBATV 15
MBATA+
8
7
6
5
Q7
2N7002
Q59
Si4835DY
4
DS
VINT
3
2
1
G
Q8
2N7002
R559
75K
+/-1%
R0603
DS
R568
75K
+/-1%
R0603
G
ACIN_3
R45
75K
+/-1%
R0603
R43
10K
R0402
+/-5%
*
ACIN 15
BC759
0.1uF
C0603
MBATA+
BC760
47pF
*
C0603
MBAT_PRESJ15
2
+3VALW
MBDATA3,15
FB25 FB L0805 300 Ohm
FB24 FB L0805 300 Ohm
MBCLK3,15
3
1
D15
BAT54S
MBCLK_BATA
MBDATA_BATA
R312
10K
+/-5%
R0402
+3VALW
21
21
2
+3VALW +3VALW
3
BAT54S
*
1
D13
BC398
1nF
50V, X7R, +/-10%
C0603
MMBATA+
R302 330R0603 +/-5%
R307 330R0603 +/-5%
R310 330R0603 +/-5%
3
2
BAT54S
1
D12
BATTCONN1
1
BATT1+
2
BATT2+
3
SMB_CLK
4
SMB_DAT
5
BATT_PRES#
6
BATT-
7
BATT1-
BATT-CONN
ADIN
FB1 FB L0805 300 Ohm
C C
CN10
1
PWR
4
GND
2
GND
5
GND
3
GND
DC JACK
ADIN VSYS
BC525
R470
0.1uF
47.5K
*
50V, X7R, +/-10%
+/-1%
C0805
R0603
*
BC5
0.1uF
C0805
*
B320B
BC2
0.1uF
C0805
D7
BC526
0.1uF
*
50V, Y5V, +80%/-20%
C0805
21
FB2 FB L0805 300 Ohm
B B
REF3V
+3VALW_591
ACIN15
R556
100K
+/-1%
R0603
Dummy
R553
100K
+/-1%
R0603
Dummy
SGND7
R557
15K
+/-1%
R0603
Dummy
CC_SET_1
CV_SET_1
R555
49.9
+/-1%
R0402
Dummy
R566 0
R1206 +/-5%
SGND7
CC_SET15
CV_SET15
REFON15
JUMPER1
R578 10K
R0402 +/-5%
+3VALW
R570 47.5K
R0603 +/-1%
21
21
*
R560 20mR2512 +/-5%
R565
0
+/-5%
R0402
BC593
1uF
*
C0805
R580 100K
R0402 +/-5%
R563 0R0402 +/-5%
R564 0R0402 +/-5%
R569
100K
R0402
+/-5%
SGND7
BC1
0.1uF
50V, Y5V, +80%/-20%
C0805
R558
10
BC596
+/-5%
1uF
*
R0402
25V, Y5V, +80%/-20%
C0805
BL
CC_SET_1
CV_SET_1
BC606
1uF
*
10V, Y5V, +80%/-20%
C0603
16
14
13
17
1
2
7
6
8
4
5
*
U35
CHIGH
VAC
IACM
IACP
ACAV
BL
ISET
VSET
REF_EN
ICHG
COR
OZ862A
R584 470
R0402 +/-5%
BC618
10uF
C1210
HDR
ICHP
ICHM
REF
COMP
LV
SYS_BL
GND12CELLS
3
R579
SGND7
0
R0402
+/-5%
SGND7
R469
75K
+/-5%
R0603
15
18
19
11
20
10
9
Q34
FDS4435
S
D
8
7
6
Q10
FDS4435
1
2
3
4 5
*
SGND7 SGND7
1
2
3
G
45
Q1
2N7002
8
S
D
7
6
G
21
D28
B320B
BC592
10uF
*
10V, Y5V, +80%/-20%
C0805
SGND7
BC594
10uF
10V, Y5V, +80%/-20%
C0805
R562 47.5K
R0603 +/-1%
R561
10K
+/-1%
R0402
DS
G
L11 15uH
*
REF3V
R574 1K R0402+/-1%
BC609
0.47uF
*
25V, Y5V, +80%/-20%
C0805
VIN
BC589
10uF
C1210
BC524
0.1uF
*
16V, X7R, +/-10%
C0402
BC630
10uF
C1210
SGND7
VINT
BC611
10uF
*
C1210
R581 10K
R0402 +/-5%
*
*
Q56
2N7002
*
BC629
10uF
C1210
DS
SGND7
BC178
10uF
*
C1210
G
CHA_OFF 15
ACIN 15
R598
R2512
39 Ohm
+/-5%
MBATA+
BC608
0.1uF
*
C0603
Title
Charger
Document Number Re v
Date: Sheet
661S03
TECHNOLOGY COPR.
of
39 50Friday, August 13, 2004
A
A
Page 40

8
7
6
5
4
3
2
1
+3V
FB15 FB L0805 120 Ohm
+3V
FB46 FB L0805 120 Ohm
+3V
*
+3V
VDDQ
21
BC295
10uF
*
C1206
21
BC672
10uF
*
C1206
FB16 FB L0805 120 Ohm
21
BC305
0.1uF
C0402
21
BC265
10uF
*
C1206
FB45 FB L0805 120 Ohm
21
BC297
*
0.1uF
C0402
BC685
0.1uF
*
C0402
BC313
10uF
*
*
C1206
BC261 0.1uF
C0402FB12 FB L0805 120 Ohm
*
BC663
0.1uF
*
C0402
BC668
10uF
*
*
C1206
*
*
LPLLVDD
BC312
0.1uF
C0402
LPLLGND
DACVDD
BC267
0.1uF
*
C0402
DACGND
BC662
0.1uF
C0402
LVDD1
BC306
0.1uF
C0402
LVDD2
BC679
0.1uF
C0402
VAGCLK5
VAHSYNC5,41
VAVSYNC5,41
U12
DVDD4
VADE
DVSS4
RESERVED
VBCAD
VBHCLK
DVSS5
DVDD5
OVDD
GPIOA(GPI)
GPIOB(GPI)
GPIOC(GPI)
GPIOD(GPI)
LDDCDATA
LDDCCLK
V5V
V2HSYNC
V2VSYNC
LCDSENSE
INTA#
EXTRSTN
PFTEST1
PFTEST2
PFTESTO
GPIOG(GPO)
GPIOH(GPO)
+3V +5V+3V
FB13 FB L0805 120 Ohm
VAVSYNC
VAHSYNC
DGND
102
100
101
OVSS
VAVSYNC
VAHSYNC
21
BC266
10uF
C1206
VAD9
VAD8
VAD7
VAD6
VAD694VAD795VAD896VAD9
*
93
VAGCLK
VAGCLK
BC708
0.1uF
C0402
DGND
91
92
DVSS3
VAD5
DVDD
90
DVDD3
*
VAD4
VAD3
*
VAD11
VAD10
99
97
VAD1098VAD11
VAD2
BC274
0.1uF
C0402
VAD1
VAD0
BC298
*
0.1uF
C0402
DGND
VBD11
VBD10
VBD7
VBD9
VBD6
VBD8
84
82
77
80
76
VBD6
VAD085VAD186VAD287VAD388VAD489VAD5
VBD778VBD879VBD9
VBD1081VBD11
RESERVED83RESERVED
VBGCLK
VBGCLK
DGND
74
75
DVSS2
VBD5
DVDD
73
DVDD2
VBD4
*
VBD2
VBD3
VBD1
SiS302LV
BC701
10uF
C1206
VBCTL0
VBD0
67
VBD068VBD169VBD270VBD371VBD472VBD5
*
VBVSYNC
VBHSYNC
65
66
VBCTL0
VBVSYNC
VBHSYNC
+5V
BC707
0.1uF
C0402
VBGCLK 5
VBCTL0 5,41
VBHSYNC 5,41
VBVSYNC 5,41
DVDD1
VBDE
VBCTL1
DVSS1
OVDD
VBCLK
DVSS0
TVCLKO
TSCLKI
DVDD0
PLL1VDD
VBOSCO
VBRCLK
PLL1GND
RESERVED
IOCS
DAC_GND
DAC_VDD
RESERVED
IOC
RESERVED
IOY
RESERVED
IOCOMP
V2COMP
DAC_GND
FB L0805 120 Ohm
FB49
21
D D
VBD[11..0]5,41
VAD[11..0]5,41
C C
R725
R0402
VBCAD5
VBHCLK5
B B
+3V
VGA_GPIO1621
FPBACKJ21
VBD[11..0]
VAD[11..0]
VDDQ
4.7K
VADE5,41
302LV_DDC1DAT21
302LV_DDC1CLK21
DD2
R713100
DC2
R710100
R0402
INT-A7,9,22,23
PCIRSTJ9,15,17,22,23,29,41
R726 4.7K R0402
VBD0
VBD1
VBD2
VBD3
VBD4
VBD5
VBD6
VBD7
VBD8
VBD9
VBD10
VBD11
VAD0
VAD1
VAD2
VAD3
VAD4
VAD5
VAD6
VAD7
VAD8
VAD9
VAD10
VAD11
DVDD DVDD
DGND VBCTL1
VBCAD
VBHCLK
DGND DGND
DVDD
OVDD
R0402
INT-A
EXTRSTN VDDV
PFTEST0
VGA_GPIO16 V2COMP
FPBACKJ DACGND
OVDD DVDD
BC702
0.1uF
*
16V, X7R, +/-10%
C0402
103
VADE VBDE
104
105
106
107
108
109
110
111
112
113
114
115
116
117
+5V
118
119
120
121
122
123
124
125
126
127
128
clock source:R25/R38:crystal/mainboard
VBOSCO VBRCLK
Y1 XTAL-14.318MHz
1 2
27pF
*
BC260
C0603
R166 10
R0603 +/-5%
27pF
*
BC258
C0603
Choose clock source:
Clock
Source
R38
Main
Board
10 NC
Crystal
R25 NC 10
302LV_CRT_B7,18
302LV_CRT_G7,18
302LV_CRT_R7,18
64
63
62
DGND
61
VDDV
60
VBCLK V2COMP
59
58
57
56
DVDD
55
TVPLLVDD
54
VBOSCO
53
VBRCLK
52
TVPLLGND
51
50
49
DACGND
48
DACVDD
47
46
45
44
43
42
41
40
39
VBDE 5,41
VBCTL1 5,41
VBCLK 5,41
302LV_TV_CHROMA 18
302LV_TV_LUMA 18
302LV_TV_COMP 18
+3V
FB44 FB L0805 120 Ohm
+3V
R706
R719
2.2K
2.2K
+/-5%
+/-5%
R0402
R0402
DD2
A A
DC2
LXC2+,LXC2-,LX7+,LX7-,LX6+,LX6-,LX5+,LX5LX4+,LX4- are 302LV LVDS dual link signals
301lv/302lv: R63/R59
8
7
LVDSPLLVDDL1LPLLCAP2LVDSPLLVSS3LAVSS4LXC2P5LXC2N6LAVDD7LX7P8LX7N9LAVSS10LX6P11LX6N12LAVDD13LX5P14LX5N15LVDSPLLVSS16LX4P17LX4N18LVDSPLLVDD19LAVDD20LX3P21LX3N22LAVSS23LXC1P24LXC1N25LAVDD26LX2P27LX2N28LAVSS29LX1P30LX1N31LAVDD32LX0P33LX0N34LAVSS35EXTSWING36DACVDD37V2RSET
LPLLVDD
LPLLGND
LGND
LVDD1
LGND
LVDD1
LGND
LVDD2
LGND
TXLCLKOUT+
TXLCLKOUT-
LVDD2
TXLOUT2+
TXLOUT2-
LGND
TXLOUT1+
TXLOUT1-
LVDD2
TXLOUT0+
TXLOUT0-
LPLLCAP
BC705
100pF
*
50V, NPO, +/-5%
C0402
R698
LPLLVDD LVDD1
R0402 +/-5%
dummy
6
R699 0
0
R0402 +/-5%
LGND
LGND
VSWING
DACVDD
R654 24K
R0603 +/-5%
5
38
ISET
R638 147
R0603 +/-1%
R650 5.9K
R0603 +/-1%
BC666 1uF
SiS302LV
R694 Demo Valve is 6K
lonny 20040601
C1206
*
4
302_TXLOUT2+21
302_TXLOUT2-21
302_TXLOUT1+21
302_TXLOUT1-21
302_TXLOUT0+21
302_TXLOUT0-21
302_TXLCLKOUT-21
302_TXLCLKOUT+21
TXLOUT2+
TXLOUT2TXLOUT1+
TXLOUT1TXLOUT0+
TXLOUT0TXLCLKOUTTXLCLKOUT+
3
*
Title
Document Number Rev
Date: Sheet
BC688
0.1uF
C0402
21
*
2
BC671
10uF
*
C1206
661S03
TVPLLVDD
BC667
0.1uF
C0402
TVPLLGND
TECHNOLOGY C OPR.
of
40 50Friday, August 13, 2004
1
A
Page 41

5
NOTE:
D D
M9CSP32/64 AND M9+CSP32/64
AND M10CSP32 ARE 31MM X 31MM PACKAGES
M10CSP6 4 I S 35MM X 31MM PACKAGE
AC-BE[0..3]5
C C
SBA[1..7]5
AGP_SBSTBS5
AGP_ADSTBS_05
AGP_ADSTBS_15
AGPREF5,46
B B
AGP_TEST46
M9 <> M10
CONNECT DBI _ LO / D BI_HI
TO AGP CONN FOR AGP3.0 ON M10
OR TO VDDP FOR AGP2.0 ON M10
OR TO VDDP FOR M9
DB_LO5
DB_HI5
AGP8X_MB_DETJ5
TO 1.5V PU OR TO AGP CONN WITH 1.5V PU FOR M10
THIS DESIGN SHOWS DAC2 CONFIGURED FOR TV OUT
DAC2 CAN ALSO BE CONFIGURED FOR SECONDARY CRT
MUX LOGIC IS REQUIRED FOR DAC2 AS BOTH TVOUT AND SECONDARY CRT
A A
X147
X247
ST[2..0]5
VDDQ
M9 <> M10
CONNECT AGP_DET#
TO VDDP FOR M9 OR
M10_TV_CHROMA18
M10_TV_LUMA18
CONNECT RSTB_MSK TO GND OR TO AGP CONN FOR M10
5
AC-BE[0..3]
AGP_DEVSEL#5
AGP_TRDY#5
AGP_FRAME#5
AGP_ADSTBF_05
AGP_ADSTBF_15
SBA[1..7]
ST[2..0]
R233 0 R0603 dummy
R234 0 R0603 dummy
R732 0 R0603
@M10
+3V
+3V
+3V
AGP_SBSTBF5
REMOVE TESTEN PULL DOWN
FOR OPTIONAL TES T MODE ENABLE
REFER TO DATA BOOK
FOR JTAG AND SCAN SIGNAL SOURCES
PULL-UP TEST_YCLK/MCLK
TO BE COMPATIBLE WITH M9
M9 <> M10
CONNECT RSTB_MSK TO GND FOR M9
4
VBD75,40
VBD65,40
VBD55,40
VBD45,40
VBD35,40
VBD25,40
VBD15,40
VBD05,40
VAD65,40
VAD55,40
VAD45,40
VAD75,40
VAD85,40
VAD95,40
VAD105,40
VAD115,40
VADE5,40
VAVSYNC5,40
VAHSYNC5,40
VBD115,40
VBD105,40
VBD85,40
VBD95,40
VAD15,40
VAD05,40
VAD25,40
VAD35,40
VBDE5,40
VBCTL05,40
VBCTL15,40
VBHSYNC5,40
VBVSYNC5,40
AC-BE0
AC-BE1
AC-BE2
AC-BE3
AGPCLK113
PCIRSTJ9,15,17,22,23,29,40
AGP_REQ#5
AGP_GNT#5
AGP_PAR5
AGP_STOP#5
AGP_IRDY#5
INT-B9,46
AGP_WBF#5
AGP_RBF#5
VBCLK5,40
VDDQ
R73547K R0402
@M10
M10_TV_COMP18
R2451K R0402 @M10
M9 <> M10
R223 10K R0402 @M10
R714 10K R0402 @M10
R703 10K R0402 @M10
4
VBCLK
SBA1
SBA2
SBA3
SBA4
SBA5
SBA6
SBA7
ST0
ST1
ST2
BC302 0.1uFC0402
@M10
R727 0
@M10
16V, X7R, +/-10%
*
PLACE C83 CLOSE TO ASIC PIN
R258 715
R0402 +/-1% @M10
T6
T9
T10
T8
T5
T7
VDD_MEM_IO
T4
SUSTAT#
STP_AGP#
RSTB_MSK
R0402
W26
W25
AA26
AA25
AA27
AG30
AG28
AF28
AD26
W29
W28
AE26
AC26
AE29
AB29
AD28
AD29
AC28
AC29
AA28
AA29
AF29
AD27
AE28
AB28
AB26
AB25
AC25
AK21
AJ23
AJ22
AK22
AJ24
AK24
AG23
AG24
AK25
AJ25
AH28
AJ29
AH27
AE25
AG26
AH30
AH29
AG29
H29
H28
K29
K28
N28
P29
P28
R29
R28
T29
T28
U29
N25
R26
P25
R27
R25
T25
T26
U25
V27
Y26
Y25
N29
U28
P26
U26
M25
N26
V29
V28
M28
V25
Y28
Y29
M29
V26
M26
M27
J29
J28
L29
L28
E8
B6
U41A
AD0
Part 1 of 6
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31
C/BE#0
C/BE#1
C/BE#2
C/BE#3
PCICLK
RST#
REQ#
GNT#
PAR
STOP#
DEVSEL#
TRDY#
IRDY#
FRAME#
INTA#
WBF#
RBF#
AD_STBF_0
AD_STBF_1
SB_STBF
SBA0
SBA1
SBA2
SBA3
SBA4
SBA5
SBA6
SBA7
ST0
ST1
ST2
SB_STBS
ADSTBS_0
ADSTBS_1
AGPREF
AGPTEST
DBI_LO
DBI_HI
AGP8X_DET#
R2SET
C_R_Pr
Y_G_Y
COMP_B_Pb
H2SYNC
V2SYNC
DDC3CLK
DDC3DATA
SSIN
SSOUT
XTALIN
XTALOUT
TESTEN
TEST_YCLK(NC)
TEST_MCLK(NC)
PLLTEST(NC)
SUS_STAT#
STP_AGP#
AGP_BUSY#
RSTB_MSK(NC)
3
PCI / AGP
AGP2X4X
AGP
8X
DAC2SSCLK
PWR
M9+X_M10-P
3
DVO / EXT TMDS / GPIOLVDSTMDSDAC1
MAN
GPIO0
GPIO1
GPIO2
GPIO3
GPIO4
GPIO5
GPIO6
GPIO7
GPIO8
GPIO9
GPIO10
GPIO11
GPIO12
GPIO13
GPIO14
GPIO15
GPIO16
DVOMODE
ZV_LCDDATA0
ZV_LCDDATA1
ZV_LCDDATA2
ZV_LCDDATA3
ZV_LCDDATA4
ZV_LCDDATA5
ZV_LCDDATA6
ZV_LCDDATA7
ZV_LCDDATA8
ZV_LCDDATA9
ZV_LCDDATA10
ZV_LCDDATA11
ZV_LCDDATA12
ZV_LCDDATA13
ZV_LCDDATA14
ZV_LCDDATA15
ZV_LCDDATA16
ZV_LCDDATA17
ZV_LCDDATA18
ZV_LCDDATA19
ZV_LCDDATA20
ZV_LCDDATA21
ZV_LCDDATA22
ZV_LCDDATA23
ZV_LCDCNTL0
ZV_LCDCNTL1
ZV_LCDCNTL2
ZV_LCDCNTL3
(NC)VREFG
TXOUT_L0N
TXOUT_L0P
TXOUT_L1N
TXOUT_L1P
TXOUT_L2N
TXOUT_L2P
TXOUT_L3N
TXOUT_L3P
TXCLK_LN
TXCLK_LP
TXOUT_U0N
TXOUT_U0P
TXOUT_U1N
TXOUT_U1P
TXOUT_U2N
TXOUT_U2P
TXOUT_U3N
TXOUT_U3P
TXCLK_UN
TXCLK_UP
DIGON
BLON
TX0M
TX0P
TX1M
TX1P
TX2M
TX2P
TXCM
TXCP
DDC2CLK
DDC2DATA
HPD1
HSYNC
VSYNC
RSET
DDC1DATA
DDC1CLK
AUXWIN
DPLUS
DMINUS
THERM
AJ5
AH5
AJ4
AK4
AH4
AF4
AJ3
AK3
AH3
AJ2
AH2
AH1
AG3
AG1
AG2
AF3
AF2
R293 0 R0402 dummy
R788 0 R0402 @M10
AE10
AH6
AJ6
AK6
AH7
AK7
AJ7
AH8
AJ8
AH9
AJ9
AK9
AH10
AE6
AG6
AF6
AE7
AF7
AE8
AG8
AF8
AE9
AF9
AG10
AF10
AJ10
AK10
AJ11
AH11
AG4
AK16
AH16
AH17
AJ16
AH18
AJ17
AK19
AH19
AK18
AJ18
AG16
AF16
AG17
AF17
AF18
AE18
AH20
AG20
AF19
AG19
AE12
AG12
AJ13
AH14
AJ14
AH15
AJ15
AK15
AH13
AK13
AE13
AE14
AF12
AK27
R
AJ27
G
AJ26
B
AG25
AH25
AH26
AF25
AF24
AF26
AF11
AE11
T41
T39
T38
T37
T40
VCORE_L/H#
OSC_SPREAD
T32
T35
T34
T29
T28
T33
T21
T27
T23
T2
T3
T22
T36
T30
T26
T31
T25
T24
R805 10K R0402@M10
PANEL_ID0
PANEL_ID1
PANEL_ID2
M10_TXLOUT0- 21
M10_TXLOUT0+ 21
M10_TXLOUT1- 21
M10_TXLOUT1+ 21
M10_TXLOUT2- 21
M10_TXLOUT2+ 21
M10_TXLCLKOUT- 21
M10_TXLCLKOUT+ 21
DISP_ON 21
T18
T15
T1
T11
T12
T14
T16
T19
T13
T17
T20
M10_CRT_R 18
M10_CRT_G 18
M10_CRT_B 18
M10_CRTHS_VGA 18
M10_CRTVS_VGA 18
R247 499 R0402@M10
M10_DDC1DAT 18
M10_DDC1CLK 18
D+ 46
D- 46
GPIO0 46
GPIO1 46
GPIO2 46
GPIO3 46
SOUT 46
SIN 46
SCLK 46
ROM_ID1 46
ROM_ID2 46
ROM_ID3 46
ROM_ID4 46
VCORE_L/H# 36
T42
R769 0
R779 330
R246
10K
R0402
@M10
+3V
PULL UP AUXWIN
IF NOT USED
2
VDD_CORE1.8
dummy
R0603
B
R0402@M10
2
FOR ALL GPIO AND ZV_DATA SIGNALS
THAT ARE ALSO CONFIGURATION STRAPS
ENSURE CORRECT PULL UP/DOWN ARE MAINTAINED
DURING POWER ON RESET CONFIGURATION
DVO IS CONFIGURED FOR ZVPORT (DVOMODE = GND)
IT CAN ALSO BE DDR EXTERNAL TMDS (DVOMODE = 1.8V)
+3V
+3V
R837
1K
+/-5%
R0402
@M10
BC407
10nF
*
R836
C0402
1K
@M10
+/-5%
R0402
@M10
+3V
R778
10K
+/-5%
R0402
Q60
MMBT3904
@M10
E C
SEE DATA BOOK
ON THIS DESIGN
SEE DATA BOOK
UNUSED GPIO,DDC OR ZV_LCDDATA CAN BE
USED FOR PANEL OR MEMORY ID
IF DVO IS CONFIGURED FOR 12 BIT EXT DDR TMDS
ANY UNUSED LCDDATA PULLUP STRAPPING
BC410
10nF
*
C0402
@M10
M9 <> M10
CONNECT VREFG TO VDDC FOR M9
CONNECT VREFG TO VOLTAGE DIVIDER FOR M10
VGA_BLON 21
Title
Document Number Rev
Date: Sheet
MUST BE TO +1.8V
R821 33R0402@M10
R822 33R0402@M10
RN44
1
*
3
5
7 8
10K
8P4R0603
BC415
10nF
*
C0402
@M10
M9/M10 CORE_A
661S03
+/-5%
@M10
R823 2.21K R0603@M10
R807 2.21K R0603@M10
2
4
6
1
+3V
1
+3V
M10_DDCDAT 21,46
M10_DDCCLK 21,46
+3V
+3V+3V
R299
R304
10K
10K
+/-5%
+/-5%
R0402
R0402
@M10
@M10
R798
R791
10K
10K
+/-5%
+/-5%
R0402
R0402
@M10
@M10
TECHNOLOGY COPR.
of
41 50Friday, August 13, 2004
R308
10K
+/-5%
R0402
@M10
R803
10K
+/-5%
R0402
@M10
A
Page 42

1
INTERNAL MEMORY IS CONNECTED TO CHANNEL A WITH SIGNALS AVAILABLE FOR TESTING ONLY ON M9CSP32 AND M9+CSP32
2
EXTERNAL M E MORY CAN BE C O NNE CT E D TO CHANNEL B O N M9CSP32 AN D M9+CSP32
ALL CHANNEL A AND B MEMORY SIGNALS ARE GROUNDS ON M9CSP64,M9+CSP64 AND M10CSP64
SO ENSURE THEY ARE NOT CONNECTED TO GROUND ON THE BOARD IF M10CSP32 OR M9+CSP32 IS AN OPTION
3
4
5
M9 <> M10
6
7
8
NO EXTERNA L MEMORY CA N BE CO NN EC T ED T O CH ANNEL A O R B O N M10CSP32 OR M10CSP64
A A
MDA0
MDA1
MDA2
MDA3
MDA4 MDB4
MDA5
MDA6
MDA7
MDA8
MDA9
MDA10
MDA11
MDA12
MDA13
MDA14
MDA15
MDA16
MDA17
MDA18
MDA19
MDA20
MDA21
MDA22
MDA23
MDA24
MDA25
B B
C C
D D
1
MDA26
MDA27
MDA28
MDA29
MDA30
MDA31
MDA32
MDA33
MDA34
MDA35
MDA36
MDA37
MDA38
MDA39
MDA40
MDA41
MDA42
MDA43
MDA44
MDA45
MDA46
MDA47
MDA48
MDA49
MDA50
MDA51
MDA52
MDA53
MDA54
MDA55
MDA56
MDA57
MDA58
MDA59
MDA60
MDA61
MDA62
MDA63
U41B
L25
DQA0
L26
DQA1
K25
DQA2
K26
DQA3
J26
DQA4
H25
DQA5
H26
DQA6
G26
DQA7
G30
DQA8
D29
DQA9
D28
DQA10
E28
DQA11
E29
DQA12
G29
DQA13
G28
DQA14
F28
DQA15
G25
DQA16
F26
DQA17
E26
DQA18
F25
DQA19
E24
DQA20
F23
DQA21
E23
DQA22
D22
DQA23
B29
DQA24
C29
DQA25
C25
DQA26
C27
DQA27
B28
DQA28
B25
DQA29
C26
DQA30
B26
DQA31
F17
DQA32
E17
DQA33
D16
DQA34
F16
DQA35
E15
DQA36
F14
DQA37
E14
DQA38
F13
DQA39
C17
DQA40
B18
DQA41
B17
DQA42
B15
DQA43
C13
DQA44
B14
DQA45
C14
DQA46
C16
DQA47
A13
DQA48
A12
DQA49
C12
DQA50
B12
DQA51
C10
DQA52
C9
DQA53
B9
DQA54
B10
DQA55
E13
DQA56
E12
DQA57
E10
DQA58
F12
DQA59
F11
DQA60
E9
DQA61
F9
DQA62
F8
DQA63
M9+X_M10-P
MVREF DIV ID ER RESI STORS AND DECOUPLING CAP S
MUST BE PLACED AS CLOSE AS POSSIBLE
TO THE ASIC MVREF BALLS
CHANNEL B MEMORY HAS BYTES 2 AND 3 SWAPPED AND SIGNALS ARE AVAILABLE FOR TESTING ONLY ON M10CSP32
Part 2 of 6
MEMORY INTERFACE A
2
MAA0
MAA1
MAA2
MAA3
MAA4
MAA5
MAA6
MAA7
MAA8
MAA9
MAA10
MAA11
(MAA13)MAA12
(MAA12)MAA13
(NC)MAA14
DQMA#0
DQMA#1
DQMA#2
DQMA#3
DQMA#4
DQMA#5
DQMA#6
DQMA#7
QSA0
QSA1
QSA2
QSA3
QSA4
QSA5
QSA6
QSA7
RASA#
CASA#
WEA#
CSA0#
CSA1#
CKEA
CLKA0
CLKA0#
CLKA1
CLKA1#
MVREFD
(NC)MVREFS
DIMA_0
DIMA_1
E22
B22
B23
B24
C23
C22
F22
F21
C21
A24
C24
A25
E21
B20
C19
J25
F29
E25
A27
F15
C15
C11
E11
J27
F30
F24
B27
E16
B16
B11
F10
A19
E18
E19
E20
F20
B19
B21
C20
C18
A18
B7
B8
D30
B13
MAA0
MAA1
MAA2
MAA3
MAA4
MAA5
MAA6
MAA7
MAA8
MAA9
MAA10
MAA11
MAA12
MAA13
DQMA0
DQMA1
DQMA2
DQMA3
DQMA4
DQMA5
DQMA6
DQMA7
QSA0
QSA1
QSA2
QSA3
QSA4
QSA5
QSA6
QSA7
RASA
CASA
WEA
CSA0
CSA1
CKEA
CLKA0
CLKA0#
CLKA1
CLKA1#
3
MDB0
MDB1
MDB2
MDB3
MDB5
MDB6
MDB7
MDB8
MDB9
MDB10
MDB11
MDB12
MDB13
MDB14
MDB15
MDB16
MDB17
MDB18
MDB19
MDB20
MDB21
MDB22
DQMA[0..7] 44,48 DQMB[0..7] 45,48
QSA[0..7] 44,48
RASA 44,48
CASA 44,48
WEA 44,48
CSA0 44,48
CSA1 44,48
CKEA 44,48
CLKA0 44
CLKA0# 44
VDD_MEM_IO
CLKA1 44
CLKA1# 44
R831
+/-5%
1KR0402
@M10
R824
*
1K
+/-5%
R0402
@M10
VDD_MEM_IO
R789
1K
+/-5%
R0402
@M10
R793
1K
+/-5%
R0402
@M10
IT IS IMPORTANT TO HAVE NO
MEMORY SIGNAL TRACE STUBS
FROM THE UNUSED CHANNELS
BC772
0.1uF
C0402
@M10
*
4
*
BC766
0.1uF
C0402
@M10
EC13
10uF
12.5V, +/-20%
CTB
@M10
MDB[0..63]45,48MDA[0..63]44,48
*
EC27
10uF
12.5V, +/-20%
CTB
@M10
MDB23
MDB24
MDB25
MDB26
MDB27
MDB28
MDB29
MDB30
MDB31
MDB32
MDB33
MDB34
MDB35
MDB36
MDB37
MDB38
MDB39
MDB40
MDB41
MDB42
MDB43
MDB44
MDB45
MDB46
MDB47
MDB48
MDB49
MDB50
MDB51
MDB52
MDB53
MDB54
MDB55
MDB56
MDB57
MDB58
MDB59
MDB60
MDB61
MDB62
MDB63
U41C
D7
DQB0
F7
DQB1
E7
DQB2
G6
DQB3
G5
DQB4
F5
DQB5
E5
DQB6
C4
DQB7
B5
DQB8
C5
DQB9
A4
DQB10
B4
DQB11
C2
DQB12
D3
DQB13
D1
DQB14
D2
DQB15
G4
DQB16
H6
DQB17
H5
DQB18
J6
DQB19
K5
DQB20
K4
DQB21
L6
DQB22
L5
DQB23
G2
DQB24
F3
DQB25
H2
DQB26
E2
DQB27
F2
DQB28
J3
DQB29
F1
DQB30
H3
DQB31
U6
DQB32
U5
DQB33
U3
DQB34
V6
DQB35
W5
DQB36
W4
DQB37
Y6
DQB38
Y5
DQB39
U2
DQB40
V2
DQB41
V1
DQB42
V3
DQB43
W3
DQB44
Y2
DQB45
Y3
DQB46
AA2
DQB47
AA6
DQB48
AA5
DQB49
AB6
DQB50
AB5
DQB51
AD6
DQB52
AD5
DQB53
AE5
DQB54
AE4
DQB55
AB2
DQB56
AB3
DQB57
AC2
DQB58
AC3
DQB59
AD3
DQB60
AE1
DQB61
AE2
DQB62
AE3
DQB63
M9+X_M10-P
5
Part 3 of 6
MEMORY INTERFACE B
MAB0
MAB1
MAB2
MAB3
MAB4
MAB5
MAB6
MAB7
MAB8
MAB9
MAB10
MAB11
(MAB13)MAB12
(MAB12)MAB13
(NC)MAB14
DQMB#0
DQMB#1
DQMB#2
DQMB#3
DQMB#4
DQMB#5
DQMB#6
DQMB#7
QSB0
QSB1
QSB2
QSB3
QSB4
QSB5
QSB6
QSB7
RASB#
CASB#
WEB#
CSB0#
CSB1#
CKEB
CLKB0
CLKB0#
CLKB1
CLKB1#
DIMB_0
DIMB_1
ROMCS#
MEMVMODE_0
MEMVMODE_1
MEMTEST
6
N5
M1
M3
L3
L2
M2
M5
P6
N3
K2
K3
J2
P5
P3
P2
E6
B2
J5
G3
W6
W2
AC6
AD2
F6
B3
K6
G1
V5
W1
AC5
AD1
R2
T5
T6
R5
R6
R3
N1
N2
T2
T3
E3
AA3
AF5
C6
C7
C8
MAB0
MAB1
MAB2
MAB3
MAB4
MAB5
MAB6
MAB7
MAB8
MAB9
MAB10
MAB11
MAB12
MAB13
DQMB0
DQMB1
DQMB2
DQMB3
DQMB4
DQMB5
DQMB6
DQMB7
QSB0
QSB1
QSB2
QSB3
QSB4
QSB5
QSB6
QSB7
RASB
CASB
WEB
CSB0
CSB1
CKEB
CLKB0
CLKB0#
CLKB1
CLKB1#
R806
47
+/-5%
R0402
@M10
R301
4.7K
+/-5%
R0402
@M10
MAB[0..13] 45,48MAA[0..13] 44,48
RASB 45,48
CASB 45,48
WEB 45,48
CSB0 45,48
CSB1 45,48
CKEB 45,48
CLKB0 45
CLKB0# 45
CLKB1 45
CLKB1# 45
R328
4.7K
+/-5%
R0402
@M10
+3V
R311 4.7KR0402@M10
R309 4.7KR0402@M10
QSB[0..7] 45,48
R841
10K
+/-5%
R0402
@M10
FOR 2.5V VDDR1
FOR 1.8V VDDR1(ELPIDA)
SCS 46
VDD_CORE1.8
MEMVMODE = 1.8V
MEMVMODE1 = GND
MEMVMODE = GND
MEMVMODE1 = 1.8V
SEE DESIGN GUIDE
Title
Document Number Rev
Date: Sheet
M9/M10-2
661S03
7
TECHNOLOGY COPR.
of
42 50Friday, August 13, 2004
8
A
Page 43

5
M9+X<>M10
VDDR1(R4) IS CLKBFB ON M9+X AND IS A NC
4
3
2
1
R331 0 R0603 @M10
U41D
BC784
0.1uF
C0402
@M10
BC741
0.1uF
C0402
@M10
BC742
0.1uF
C0402
@M10
T7
R4
R1
N8
N7
M4
L27
L8
J24
J23
J8
J7
J4
J1
H10
H13
H15
H17
T8
V4
V7
V8
AA1
AA4
AA7
AA8
A3
A9
A15
A21
A28
B1
B30
D26
D23
D20
D17
D14
D11
D8
D5
E27
F4
G7
G10
G13
G15
G19
G22
G27
H22
H19
AD4
T4
N4
D19
D13
AE17
AE20
AE15
AF21
AJ20
AK12
AF13
AF14
F18
N6
AG21
AH21
AF22
AH24
AE24
AE22
AK28
A7
*
*
*
VDDR1
Part 4 of 6
VDDR1(CLKBFB)
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1(CLKAFB)
VDDR1
LVDDR_25(LVDDR18_25)
LVDDR_25(LVDDR18_25)
LVDDR_18
LVDDR_18
LPVDD
TPVDD
TXVDDR
TXVDDR
VDDRH0
VDDRH1
A2VDD
A2VDD
A2VDDQ
AVDD
VDD1DI
VDD2DI
PVDD
MPVDD
M9+X_M10-P
VDD_MEM_IO
VDD_DAC2.5
VDD_PNLIO2.5
AC13
VDDC
AD13
VDDC
AD15
VDDC
AC15
VDDC
AC17
VDDC
(VDDC18)VDD15
(VDDC18)VDD15
(VDDC18)VDD15
(VDDC18)VDD15
(VDDC18)VDD15
(VDDC18)VDD15
(VDDC18)VDD15
(VDDC18)VDD15
I/O POWER
P8
Y8
AC11
AC20
Y23
L23
H20
H11
AD7
VDDR3
AD19
VDDR3
AD21
VDDR3
AD22
VDDR3
AC22
VDDR3
AC21
VDDR3
AC19
VDDR3
AC8
VDDR3
AG7
VDDR4
AD9
VDDR4
AC9
VDDR4
AC10
VDDR4
AD10
VDDR4
J30
VDDP
AF27
VDDP
AE30
VDDP
AC27
VDDP
AC23
VDDP
AB30
VDDP
AA24
VDDP
AA23
VDDP
Y27
VDDP
W30
VDDP
V23
VDDP
V24
VDDP
M23
VDDP
M24
VDDP
N30
VDDP
P23
VDDP
P27
VDDP
T23
VDDP
T24
VDDP
T30
VDDP
U27
VDDP
AD24
AVSSQ
AF20
LVSSR
AE19
LVSSR
AE16
LVSSR
AF15
LVSSR
AJ19
LPVSS
AJ12
TPVSS
AH12
TXVSSR
AG13
TXVSSR
AG14
TXVSSR
F19
VSSRH0
M6
VSSRH1
AH22
A2VSSN
AJ21
A2VSSN
AF23
A2VSSQ
AH23
AVSSN
AE23
VSS1DI
AE21
VSS2DI
AJ28
PVSS
A6
MPVSS
ADD ASIC DECOUPLING FOR ALL POWER AS REQUIRED
PLACED CLOSE T O TH E PO WE R /G N D PINS
WITH AS MANY AS POSSIBLE PLACED UNDER THE ASIC
4
@M10
R292 0 R0603
R300 0 R0603
dummy
ADD DECOUPLING CAPS AS REQUIRED
BC332
22uF
*
*
CTB
@M10
R297 0 R0603 @M10
R298 0 R0603
STRAP VDDR4 TO 1.8V FOR EXT TMDS
STRAP VDDR4 TO 3.3V FOR VIP OR ZV_PORT
ALSO SEE DVOMODE STRAPS
BC333
22uF
*
*
CTB
@M10
ADD DECOUPLIN G CA P S A S RE QUIRED
VDD_MEM_IO
D D
C C
VDDR1(D19) IS CLKAFB ON M9+X AND IS A NC
M9+X<>M10
M9+X IS LVDDR_18_25 AND CONNECTS TO 1.8V
M10-P IS LVDDR_25 AND CONNECTS TO 2.5V
B B
A A
*
*
*
M9+X<>M10
VDD_PNLIO2.5
VDD_PNLIO1.8
VDD_PNLPLL1.8
VDD_MEM_IO
VDD_DAC2.5
A2VDDQ_1.8
AVDD_1.8
VDDDI_1.8
VDD_PLL1.8
VDD_MEMPLL1.8
VDD_MEM2.5
BC396
22uF
*
CTB
@M10
BC413
0.1uF
*
C0603
@M10
BC364
22uF
*
CTB
@M10
2 1
FB L0805 60 Ohm
2 1
FB L0805 60 Ohm
2 1
FB L0805 60 Ohm
5
BC425
BC412
10nF
0.1uF
*
C0402
C0603
@M10
@M10
BC422
BC337
10nF
0.1uF
*
C0402
C0603
@M10
@M10
BC421
BC414
10nF
0.1uF
*
C0402
C0603
@M10
@M10
R263 0 R0603
R266 0 R0603 @M10
R277 0 R0603 dummy
FB58
@M10
FB51
@M10
FB52
@M10
BC783
0.1uF
C0402
@M10
BC735
0.1uF
C0402
@M10
BC736
0.1uF
C0402
@M10
*
*
*
@M10
BC362
1nF
C0402
@M10
BC338
1nF
C0402
@M10
BC418
1nF
C0402
@M10
*
*
*
*
VDD_CORE1.5
VDD_CORE1.8
BC358
0.1uF
C0603
@M10
dummy
BC339
22uF
CTB
@M10
+3V
DIODE SUPPLIES POWER
TO VDDC RAIL
WHEN VDDC IS OFF AND +3.3V IS ON
21
D41
B140
@M10
BC400
BC383
BC366
22uF
CTB
@M10
*
22uF
CTB
@M10
0.1uF
*
C0603
@M10
ADD DECOUPLING CAPS AS REQUIRED
BC411
*
*
BC416
10nF
C0402
@M10
VDD_CORE1.8
BC319
0.1uF
*
C0603
@M10
BC344
1nF
0.1uF
*
*
C0402
C0603
@M10
@M10
BC318
BC706
1nF
10nF
C0402
@M10
*
*
C0402
@M10
3
*
BC320
0.1uF
C0603
@M10
VCORE_VGA
BC359
AG15
AD12
AE27
AG11
AG18
AG22
AG27
A10
A16
A22
A29
C28
C30
D27
D24
D21
D18
D15
D12
F27
G12
G16
G18
G21
G24
H27
H23
H21
H18
H16
H14
H12
K30
K27
K24
K23
AG5
AG9
AB4
BC390
10nF
C0402
@M10
A2
C1
C3
D9
D6
D4
G9
H9
H8
H4
E4
*
+3V
VDDQ
U41E
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
M9+X_M10-P
BC382
1nF
0.1uF
*
*
C0402
C0603
@M10
@M10
M9+X<>M10
M9+X IS VDDC 18 AND CONNECTS TO 1.8V
M10-P IS VDDC15 AND CONNECTS TO 1.5V
VDDQ VDD_CORE1.5
FB26
FB L0805 60 Ohm
Part 5 of 6
CORE GND
BC379
10nF
C0402
@M10
@M10
2 1
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
BC371
1nF
*
*
C0402
@M10
BC392
0.1uF
*
C0402
@M10
K8
K7
K1
L4
M30
M8
M7
N23
N24
N27
P4
R7
R8
R23
R24
R30
T27
T1
U4
U8
U23
V30
W7
W8
W23
W24
W27
Y4
AA30
AB27
AB24
AB23
AB8
AB7
AB1
AC4
AC12
AC14
AD16
AC16
AC18
AD30
AD25
AD18
AK2
AK29
AJ30
AJ1
D10
D25
BC365
10nF
C0402
@M10
BC388
0.1uF
C0402
@M10
BC402
0.1uF
*
C0603
@M10
*
FB28
@M10
21
FB L0805 60 Ohm
FB27
@M10
21
FB L0805 60 Ohm
FB53
@M10
21
FB L0805 60 Ohm
FB50
@M10
21
FB L0805 60 Ohm
FB20
@M10
21
FB L0805 60 Ohm
FB19
@M10
21
FB L0805 60 Ohm
FB17
@M10
21
FB L0805 60 Ohm
FB18
@M10
21
FB L0805 60 Ohm
2
U41F
P17
VDDC
Part 6 of 6
P18
VDDC
P19
VDDC
U12
VDDC
U13
VDDC
M10-P
U14
VDDC
U17
VDDC
(708 BGA)
U18
VDDC
U19
VDDC
V19
VDDC
V18
VDDC
M9+X
V17
VDDC
V14
VDDC
(708 BGA)
V13
VDDC
V12
VDDC
N18
VDDC
CENTER
N17
VDDC
N14
VDDC
ARRAY
W17
VDDC
W18
VDDC
W12
VDDC
W13
VDDC
W14
VDDC
N13
VDDC
N19
VDDC
M19
VDDC
M18
VDDC
M12
VDDC
N12
VDDC
M13
VDDC
M14
VDDC
P12
VDDC
P13
VDDC
P14
VDDC
M17
VDDC
W19
VDDC
M9+X_M10-P
FB22
@M10
21
FB L0805 80 Ohm
BC770
*
0.1uF
C0402
@M10
BC401
0.1uF
*
C0402
@M10
BC378
0.1uF
*
C0402
@M10
BC342
0.1uF
*
C0402
@M10
BC334
0.1uF
*
C0402
@M10
BC324
0.1uF
*
C0402
@M10
BC323
0.1uF
*
C0402
@M10
BC317
0.1uF
*
C0402
@M10
Title
Document Number Re v
Date: Sheet
BC361
22uF
*
CTB
@M10
BC769
*
0.1uF
C0402
@M10
BC408
0.1uF
*
C0402
@M10
BC380
0.1uF
*
C0402
@M10
BC356
0.1uF
*
C0402
@M10
BC331
0.1uF
*
C0402
@M10
BC328
0.1uF
*
C0402
@M10
BC322
0.1uF
*
C0402
@M10
BC316
0.1uF
*
C0402
@M10
661S03
M16
VSS
N16
VSS
N15
VSS
P15
VSS
P16
VSS
R18
VSS
R17
VSS
R16
VSS
R15
VSS
R14
VSS
R13
VSS
R12
VSS
T13
VSS
T14
VSS
T15
VSS
W15
VSS
V16
VSS
V15
VSS
U15
VSS
U16
VSS
T19
VSS
T18
VSS
T17
VSS
T16
VSS
W16
VDDCI
M15
VDDCI
R19
VDDCI
T12
VDDCI
BC375
10nF
*
C0402
@M10
VDD_MEMPLL1.8+V1.8
VDD_CORE1.8
BC403
0.1uF
*
C0603
@M10
VDD_PNLIO1.8
VDD_PNLPLL1.8
A2VDDQ_1.8
AVDD_1.8
VDDDI_1.8
VDD_PLL1.8
BC345
1nF
*
C0402
@M10
TECHNOLOGY COPR.
of
1
43 50Friday, August 13, 2004
A
Page 44

5
CLKA042
CKEA42,48
WEA42,48
CASA42,48
RASA42,48
CSA042,48
CLKA0# 42
4
CSA142,48
CSA1
3
CSA042,48
2
CLKA1#42
CLKA142
CKEA42,48
WEA42,48
CASA42,48
RASA42,48
1
L9
NCC4NCH4NCM3NCN3NCM4NC
RFU2
RFU3
VSSJ9VSSJ8VSSJ7VSSJ6VSSH9VSSH8VSSH7VSSH6VSSG9VSSG8VSSG7VSSG6VSSF9VSSF8VSSF7VSS
CSA1
L12NCL13NCH11NCC11
VDDL4VDDL7VDDL8VDD
L11
VDDE4VDD
E11
DQ31
DQ30
DQ29
DQ28
DQ27
DQ26
DQ25
DQ24
DQ15
DQ14
DQ13
DQ12
DQ11
DQ10
DQS3
DQS1
VREF
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
B8
C9
B9
B10
C13
D12
D13
E13
F12
F13
G12
G13
J12
J13
K12
DQ9
K13
DQ8
B12
DM3
H12
DM1
B13
H13
PLACE CLOSE TO MEMORY
N13
C3
C5
C7
C8
C10
C12
E3
E12
F4
G4
J4
K4
F11
G11
J11
K11
VDDD7VDD
K4D263238E-GC36
D8
MDA[0..7]42,48MDA[24..31] 42,48
DQMA0
MDA0
MDA1
MDA3
MDA4
MDA5
MDA6
MDA7
MDA15
MDA14
MDA13
MDA12
MDA11
MDA10
MDA9
MDA8
DQMA1
QSA0
QSA1
EC9
10uF
*
12.5V, +/-20%
CTB
@M10
VDD_MEM2.5
MDA[8..15] 42,48
MDA[48..55]42,48
VDD_MEM_IO
R744
1K
+/-1%
R0402
@M10
BC721
R745
0.1uF
*
C0402
@M10
VDD_MEM_IO
1K
+/-1%
R0402
@M10
MDA[32..39] 42,48
MDA32
MDA33
MDA34
MDA35
MDA36
MDA37
MDA38
MDA39
MDA48
MDA49
MDA50
MDA51
MDA52
MDA53
MDA54
MDA55
DQMA4
DQMA6
QSA4
QSA6
M13
B11
D10
D11
G10
H10
K10
F10
J10
C6
C2
D3
D2
G3
G2
H3
H2
D4
D6
D9
D5
G5
H5
B7
B6
B5
E2
F3
F2
J3
J2
K2
K3
B3
B2
B4
E6
E9
F5
J5
K5
U42
@M10
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DM0
DM2
DQS0
DQS2
MCL
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
MAA0
MAA1
VSSL5VSS
MAA2
L10
MAA3
VSSK6VSS
MAA7
MAA6
MAA5
MAA4
N10A6N9A5M9A4N8A3N7A2M6A1N6A0N5
A7
VSSE5VSS
VSSK8VSSE7VSSE8VSS
K7
K9
MAA9
MAA8
N11
A8_AP
MAA13
MAA11
MAA10
L6
M7
M8
A9
A10
A11
MAA12
N4
BA1M5BA0
CSA0
N2
CS#
CASA
RASA
RAS#M2CAS#
CKEA
WEA
L2
N12
L3
CKE
WE#
8M x 32 DDR
FBGA 144
F6
E10
CLKA1
M11
L9
NCC4NCH4NCM3NCN3NCM4NC
RFU2
RFU3
VSSJ9VSSJ8VSSJ7VSSJ6VSSH9VSSH8VSSH7VSSH6VSSG9VSSG8VSSG7VSSG6VSSF9VSSF8VSSF7VSS
CSA1
L12NCL13NCH11NCC11
VDDL4VDDL7VDDL8VDD
L11
VDDE4VDD
E11
DQ31
DQ30
DQ29
DQ28
DQ27
DQ26
DQ25
DQ24
DQ15
DQ14
DQ13
DQ12
DQ11
DQ10
DQS3
DQS1
VREF
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
MDA[56..63]42,48
B8
C9
B9
B10
C13
D12
D13
E13
F12
F13
G12
G13
J12
J13
K12
DQ9
K13
DQ8
DM3
DM1
VDDD7VDD
D8
DQMA7
B12
DQMA5
H12
B13
H13
PLACE CLOSE TO MEMORY
N13
C3
C5
C7
C8
C10
C12
E3
E12
F4
G4
J4
K4
F11
G11
J11
K11
K4D263238E-GC36
MDA63
MDA62
MDA61
MDA60
MDA59
MDA58
MDA57
MDA56
MDA47
MDA46
MDA45
MDA44
MDA43
MDA42
MDA41
MDA40
QSA7
QSA5
EC10
10uF
*
12.5V, +/-20%
CTB
@M10
VDD_MEM2.5
MDA[40..47] 42,48
VDD_MEM_IO
R765
1K
+/-1%
R0402
@M10
BC758
0.1uF
C0402
@M10
VDD_MEM_IO
R772
1K
+/-1%
R0402
@M10
*
CLKA1#
M10
M12
CK
CK#
D D
C C
B B
MDA[16..23] 42,48
MDA31
B7
MDA30
C6
MDA29 MDA2
B6
MDA28
B5
MDA27
C2
MDA26
D3
MDA25
D2
MDA24
M13
B11
D10
D11
F10
G10
H10
J10
K10
E2
F3
F2
G3
G2
J3
J2
K2
K3
B3
H3
B2
H2
B4
D4
E6
D6
D9
D5
E9
F5
G5
H5
J5
K5
MDA16
MDA17
MDA18
MDA19
MDA20
MDA21
MDA22
MDA23
DQMA3
DQMA2
QSA3
QSA2
U16
@M10
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DM0
DM2
DQS0
DQS2
MCL
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
MAA0
MAA1
VSSL5VSS
MAA2
L10
MAA3
VSSK6VSS
MAA6
MAA7
MAA5
MAA4
MAA8
N10A6N9A5M9A4N8A3N7A2M6A1N6A0N5
A7
VSSE5VSS
VSSK8VSSE7VSSE8VSS
K7
K9
MAA9
N11
A8_AP
MAA11
MAA10
L6
M7
M8
A9
A10
A11
MAA13
MAA12
N4
BA1M5BA0
RASA
CSA0
N2
CS#
CASA
WEA
L2
L3
RAS#M2CAS#
CKEA
N12
WE#
CLKA0
CKE
8M x 32 DDR
FBGA 144
F6
E10
M11
CLKA0#
M10
M12
CK
CK#
VDD_MEM_IOVDD_MEM2.5 VDD_MEM2.5
BC386
1nF
C0402
@M10
BC381
10nF
*
*
C0402
@M10
BC397
BC693
10nF
C0402
@M10
BC394
0.1uF
*
C0402
@M10
EC14
10uF
*
12.5V, +/-20%
CTB
A A
@M10
BC694
1nF
*
*
C0402
@M10
1uF
*
*
C0603
@M10
BC374
0.1uF
C0402
@M10
*
EC26
10uF
12.5V, +/-20%
CTB
@M10
EC8
10uF
*
12.5V, +/-20%
CTB
@M10
BC395
BC393
10nF
C0402
@M10
1nF
*
C0402
@M10
*
BC691
0.1uF
*
C0402
@M10
BC689
1uF
*
*
C0603
@M10
BC703
10nF
C0402
@M10
BC696
1nF
*
C0402
@M10
VDD_MEM_IO
EC12
BC700
10uF
0.1uF
*
*
C0402
@M10
12.5V, +/-20%
CTB
@M10
QSA[0..7]42,48
DQMA[0..7]42,48
MAA[0..13]42,48
TECHNOLOGY COPR.
Title
Document Number Rev
5
4
3
2
Date: Sheet
661S03
44 50Friday, August 13, 2004
1
A
of
Page 45

5
RASB42,48
CSB042,48
CLKB0#42
CLKB042
WEB42,48 WEB42,48
4
MDB[16..23]42,48
CSB142,48
CSB1
3
RASB42,48
CSB042,48
2
CLKB1#42
CLKB142
CKEB42,48CKEB42,48
CASB42,48CASB42,48
1
L9
NCC4NCH4NCM3NCN3NCM4NC
RFU2
RFU3
VSSJ9VSSJ8VSSJ7VSSJ6VSSH9VSSH8VSSH7VSSH6VSSG9VSSG8VSSG7VSSG6VSSF9VSSF8VSSF7VSS
CSB1
L12NCL13NCH11NCC11
VDDL4VDDL7VDDL8VDD
L11
VDDE4VDD
E11
DQ31
DQ30
DQ29
DQ28
DQ27
DQ26
DQ25
DQ24
DQ15
DQ14
DQ13
DQ12
DQ11
DQ10
DQS3
DQS1
VREF
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
MDB[24..31]42,48
B8
C9
B9
B10
C13
D12
D13
E13
F12
F13
G12
G13
J12
J13
K12
DQ9
K13
DQ8
B12
DM3
H12
DM1
B13
H13
PLACE CLOSE TO MEMORY
N13
C3
C5
C7
C8
C10
C12
E3
E12
F4
G4
J4
K4
F11
G11
J11
K11
VDDD7VDD
K4D263238E-GC36
D8
MDB31
MDB30
MDB29
MDB28
MDB27
MDB26
MDB25
MDB24
MDB15
MDB14
MDB13
MDB12
MDB11
MDB10
MDB9
MDB8
DQMB3
QSB3QSB0
QSB1QSB2
EC17
10uF
*
12.5V, +/-20%
CTB
@M10
VDD_MEM2.5
MDB[48..55]42,48
MDB[8..15] 42,48
MDB[32..39]42,48
VDD_MEM_IO
R857
1K
+/-1%
R0402
@M10
BC791
R856
0.1uF
*
C0402
@M10
VDD_MEM_IO
1K
+/-1%
R0402
@M10
MDB48
MDB49
MDB50
MDB51
MDB52
MDB53
MDB54
MDB55
MDB32
MDB33
MDB34
MDB35
MDB36
MDB37
MDB38
MDB39
DQMB6
DQMB4
QSB6
QSB4
M13
B11
D10
D11
G10
H10
K10
F10
J10
C6
C2
D3
D2
G3
G2
H3
H2
D4
D6
D9
D5
G5
H5
B7
B6
B5
E2
F3
F2
J3
J2
K2
K3
B3
B2
B4
E6
E9
F5
J5
K5
@M10
U27
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DM0
DM2
DQS0
DQS2
MCL
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
MAB0
MAB1
VSSL5VSS
MAB2
L10
MAB3
VSSK6VSS
MAB7
MAB6
MAB5
MAB4
N10A6N9A5M9A4N8A3N7A2M6A1N6A0N5
A7
VSSE5VSS
VSSK8VSSE7VSSE8VSS
K7
K9
MAB9
MAB8
N11
A8_AP
MAB13
MAB11
MAB10
L6
M7
M8
A9
A10
A11
MAB12
N4
BA1M5BA0
CSB0
N2
CS#
CASB
RASB
RAS#M2CAS#
CKEB
WEB
L2
N12
L3
CKE
WE#
8M x 32 DDR
FBGA 144
F6
E10
CLKB1
M11
L9
NCC4NCH4NCM3NCN3NCM4NC
RFU2
RFU3
VSSJ9VSSJ8VSSJ7VSSJ6VSSH9VSSH8VSSH7VSSH6VSSG9VSSG8VSSG7VSSG6VSSF9VSSF8VSSF7VSS
CSB1
L12NCL13NCH11NCC11
VDDL4VDDL7VDDL8VDD
L11
VDDE4VDD
E11
DQ31
DQ30
DQ29
DQ28
DQ27
DQ26
DQ25
DQ24
DQ15
DQ14
DQ13
DQ12
DQ11
DQ10
DQS3
DQS1
VREF
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
MDB[56..63]42,48
B8
C9
B9
B10
C13
D12
D13
E13
F12
F13
G12
G13
J12
J13
K12
DQ9
K13
DQ8
DM3
DM1
VDDD7VDD
D8
DQMB7
B12
DQMB5
H12
B13
H13
PLACE CLOSE TO MEMORY
N13
C3
C5
C7
C8
C10
C12
E3
E12
F4
G4
J4
K4
F11
G11
J11
K11
K4D263238E-GC36
QSB7
QSB5
MDB63
MDB62
MDB61
MDB60
MDB59
MDB58
MDB57
MDB56
MDB47
MDB46
MDB45
MDB44
MDB43
MDB42
MDB41
MDB40
EC31
10uF
*
12.5V, +/-20%
CTB
@M10
VDD_MEM2.5
MDB[40..47] 42,48
VDD_MEM_IO
R354
1K
+/-1%
R0402
@M10
BC469
0.1uF
C0402
@M10
VDD_MEM_IO
R356
1K
+/-1%
R0402
@M10
*
CLKB1#
M10
M12
CK
CK#
MAB0
MAB3
MAB2
B7
C6
B6
B5
C2
D3
D2
E2
F3
F2
K2
K3
B3
H3
B2
H2
B4
D4
E6
D6
D9
D5
E9
F5
H5
K5
J3
J2
J5
U44
@M10
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DM0
DM2
DQS0
DQS2
MCL
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
MAB1
VSSL5VSS
L10
D D
MDB[0..7] 42,48
MDB0
MDB1
MDB2
MDB3
MDB4
MDB5
MDB6
MDB7
MDB16
MDB17
MDB18
G3
MDB19
G2
MDB20
MDB21
MDB22
MDB23
DQMB0
C C
B B
DQMB2 DQMB1
M13
B11
D10
D11
F10
G5
G10
H10
J10
K10
MAB7
MAB6
MAB5
MAB4
N10A6N9A5M9A4N8A3N7A2M6A1N6A0N5
VSSK6VSS
VSSK8VSSE7VSSE8VSS
K7
K9
MAB9
MAB8
N11
A7
M8
A9
A8_AP
MAB10
L6
A10
RASB
CASB
CSB0
MAB12
N4
BA1M5BA0
N2
CS#
RAS#M2CAS#
CKEB
WEB
L2
N12
L3
WE#
MAB13
MAB11
M7
A11
8M x 32 DDR
FBGA 144
VSSE5VSS
F6
E10
CKE
CLKB0
M11
CLKB0#
M10
M12
CK
CK#
VDD_MEM_IOVDD_MEM2.5
BC472
1nF
C0402
@M10
BC473
BC474
0.1uF
C0402
@M10
*
EC21
10uF
12.5V, +/-20%
CTB
@M10
10nF
*
*
C0402
@M10
BC470
EC22
10uF
*
12.5V, +/-20%
CTB
A A
@M10
BC475
1nF
*
*
C0402
@M10
BC479
10nF
C0402
@M10
BC482
0.1uF
*
C0402
@M10
1uF
*
*
C0603
@M10
VDD_MEM2.5
EC33
10uF
*
12.5V, +/-20%
CTB
@M10
BC816
BC814
10nF
C0402
@M10
1nF
*
C0402
@M10
*
BC812
0.1uF
*
C0402
@M10
*
BC810
1uF
C0603
@M10
BC821
BC815
10nF
C0402
@M10
1nF
*
C0402
@M10
*
VDD_MEM_IO
EC32
BC824
10uF
0.1uF
*
*
C0402
@M10
12.5V, +/-20%
CTB
@M10
DQMB[0..7]42,48
MAB[0..13]42,48
QSB[0..7]42,48
TECHNOLOGY COPR.
Title
Document Number Rev
5
4
3
2
Date: Sheet
661S03
45 50Monday, August 16, 2004
1
A
of
Page 46

5
4
3
2
1
OTHER OPTION STRAPS ARE AVAILABLE IF REQUIRED
D D
C C
SEE DESIGN GUIDE
GPIO041
GPIO141
GPIO241
GPIO341
ROM_ID141
ROM_ID241
ROM_ID341
ROM_ID441
R832 10K
R0402 +/-1%
R828 10K
R0402 +/-1%
R834 10K
R0402 +/-1%
R835 10K
R0402 +/-1%
R843 10K
R0402 +/-1%
R840 10K
R0402 +/-1%
R842 10K
R0402 +/-1%
R844 10K
R0402 +/-1%
OPTIONAL SERIAL FLASH EEPROM
FOR VIDEO BIOS OUTSIDE SYSTEM BIOS
+3V
GPIO1
DNI DNI
GPIO3
DNI
ROM_ID4
DNI
10K
10K DNI
10K
10K 10K DNI DNI
10K DNI
10K 10K 10K
10K 10K
AGP 1X CLOCK FEEDBACK PHASE ADJUST WITH RESPECT TO REFCLK
GPIO0
REFCLK SLIGHTLY EARLIER THAN FEEDBACK
GPIO2
CLOCK PHASE ADJUSTMENT BETWEEN X1 AND X2 CLK
DNI
0 TAP DELAY
DNI
DNI
DNI 10K
SCLK41
SCS42
R332 0
R0402 +/-5%
+3V
*
(DEFAULT)
ROM_ID2ROM_ID3 ROM ID CONFIG
ROM_ID1
DNI
DNI
DNI
DNI
10K
DNI
10K 10K
R845
0R 0402
+/-5%Dummy
SCLK
SCS
BC456
0.1uF
16V, X7R, +/-10%
C0402
NO ROM
10K
SERIAL AT25F1024 (ATMEL) ROM
DNI
SERIAL AT2545DB011 (ATMEL) ROM
SERIAL M25P10 ( ST) ROM
SERIAL M25P05 ( ST) ROM
10K
SERIAL SST45LF010 ( SST) ROM
DNI
SERIAL SST25VF010 ( SST) ROM
SERIAL NX25F011B (NEXFLASH) ROM
U23
5
6
1
7
3
8
M25P10-A
D
C
S
HOLD
W
VCC
VSS
2
Q
TYPE 1
4
(DEFAULT)
(DEFAULT)
SOUTSIN
SOUT 41SIN41
SMBCLK10,13,14,19
SMBDAT10,13,14,19
INT-B9,41
INTERRUPT ALERT
PLUS PU TO AGP
R240 0
1% R0402
R241 0
1% R0402
R242 0
R0402 +/-5%
OPTIONAL OC
R243
20K
+/-5%
R0402
SCLK8VDD
7
SDATA
6
ALERT
5
GND
BC335
0.1uF
*
16V, X7R, +/-10%
C0402
U17
D+
D-
THERM
ADM1032A
+3V
BC336 2.2nF
1
2
3
4
C0402 50V. X7R, +/-10%
*
EXTERNAL THERMAL SENSOR
D+ 41
D- 41
B B
VDDQ
R219
324
+/-1%
Ra
R0603
Rb
1.02k@AGP2.0
R226
100
*
+/-1%
R0603
1.02k@AGP2.0
FOR M10 AND M9 AGP3.0 OR AGP2.0 IT IS NOW RECOMMENDED
BC303
10nF
TO USE LOCALLY GENERATED VREF FOR GRAPHICS CONTROLLER (AGPREF)
16V, X7R, +/-10%
C0402
AND OFF BOARD GENERATED VREF FOR MOTHERBOARD CHIPSET
AGPREF 5,41
AGP_TEST RESISTOR SELECTION
VDDQ
AGP MODE
AGP 2.0 (4X)
AGP 3.0 (8X)
A A
Rc
49.9R 1%
169R 1%
ON M9+ AND M10 AGPTEST IS PULLED UP TO VDDP
Rc
R718 169
R0603 +/-1%
R720 45.3
R0402 +/-1%
ON M9 AGPTEST IS PULLED DOWN
49.9@AGP2.0
M9 <> M10
AGP_TEST 41
AGPREF/VRE FGC RESISTOR SELECTION
Ra
1.02K 1%
324R 1%
Rb
1.02K 1%
100R 1%
AGP MODE
AGP 2.0 (4X) .75V
AGP 3.0 (8X) .35V
TECHNOLOGY COPR.
Title
5
Document Number Rev
4
3
2
Date: Sheet
661S03
46 50Friday, August 13, 2004
1
A
of
Page 47

5
BC448
22uF
6.3V, Y5V, + 80%/-20%
D D
VDD_MEM_IO
C C
C1206
@M10
*
+3V
4
R334
1K
+/-1%
R0402
@M10
R333
1K
+/-1%
R0402
@M10
U43
1
3
RT9173B
VIN
REFEN
@M10
VCNTL1
VCNTL2
VCNTL3
VCNTL4
VOUT
GND
3
8
7
6
5
4
2
R353
1K
+/-1%
R0402
@M10
+VTT
*
EC28
330uF
CTX
@M10
2
1
@M10
X141
X241
B B
A A
R729 0R0402 +/-5%
R728 0
R0402 +/-5%
@M10
XTAL-27MHz
R0402
+/-5%
X8
@M10
0
R716
@M10
BC697 22pF
C0402 50V, NPO, +/-5%
12
*
R707
1M
+/-5%@M10
R0402
BC695 22pF
C0402 50V, NPO, +/-5%
*
@M10
@M10
TECHNOLOGY COPR.
Title
5
Document Numbe r R e v
4
3
2
Date: Sheet
661S03
of
47 50Friday, August 13, 2004
1
A
Page 48

5
+VTT +VTT +VTT+VTT
4
3
2
1
MDA1
R198 121 R0603 @M10
MDA4
R683 121 R0603 @M10
MDA3
R685 121 R0603 @M10
MDA7
R214 121 R0603 @M10
MDA5
R210 121 R0603 @M10
MDA6
D D
C C
RASA42,44
B B
CASA42,44
CKEA42,44
CSA042,44
WEA42,44
CSA142,44
A A
R690 121 R0603 @M10
MDA2
R199 121 R0603 @M10
MDA0
R197 121 R0603 @M10
DQMA0
R684 121 R0603 @M10
MDA11
R225 121 R0603 @M10
MDA10
R709 121 R0603 @M10
MDA9
R717 121 R0603 @M10
MDA12
R704 121 R0603 @M10
MDA8
R712 121 R0603 @M10
MDA13
R216 121 R0603 @M10
MDA15
R695 121 R0603 @M10 R855 121 R0603 @M10
MDA14
R700 121 R0603 @M10
DQMA1
R218 121 R0603 @M10
MDA16
R217 121 R0603 @M10
MDA17
R711 121 R0603 @M10
MDA19
R708 121 R0603 @M10
MDA18
R220 121 R0603 @M10
MDA20
R231 121 R0603 @M10
MDA22
R733 121 R0603 @M10
MDA23
R237 121 R0603 @M10
MDA21
R724 121 R0603 @M10
DQMA2
R224 121 R0603 @M10
MDA25
R215 121 R0603 @M10
MDA27
R693 121 R0603 @M10
MDA28
R206 121 R0603 @M10
MDA24
R701 121 R0603 @M10
MDA31
R196 121 R0603 @M10
MDA26
R696 121 R0603 @M10
MDA29
R687 121 R0603 @M10
MDA30
R686 121 R0603 @M10
DQMA3
R213 121 R0603 @M10
RASA
R766 121 R0603 @M10
MAA11
R748 121 R0603 @M10
MAA8
R755 121 R0603 @M10
MAA3
R759 121 R0603 @M10
MAA0
R761 121 R0603 @M10
CASA
R770 121 R0603 @M10
CKEA
R753 121 R0603 @M10
CSA0
R764 121 R0603 @M10
MAA6
R757 121 R0603 @M10
MAA7
R756 121 R0603 @M10
MAA12
R762 121 R0603 @M10
WEA
R264 121 R0603 @M10
MAA9
R747 121 R0603 @M10
MAA10
R750 121 R0603 @M10
MAA5
R746 121 R0603 @M10
MAA4
R758 121 R0603 @M10
MAA13
R751 121 R0603 @M10
CSA1
R763 121 R0603 @M10
MAA1
R760 121 R0603 @M10
MAA2
R749 121 R0603 @M10
5
BC843
*
0.1uF
C0402
@M10
BC716
*
0.1uF
C0402
@M10
BC807
*
0.1uF
C0402
@M10
BC842
*
0.1uF
C0402
@M10
BC512
*
0.1uF
C0402
@M10
BC511
*
0.1uF
C0402
@M10
BC505
*
0.1uF
C0402
@M10
BC501
*
0.1uF
C0402
@M10
BC813
*
0.1uF
C0402
@M10
BC789
*
0.1uF
C0402
@M10
BC790
*
0.1uF
C0402
@M10
BC795
*
0.1uF
C0402
@M10
MDA32
MDA33
R816 121 R0603 @M10
MDA35
R817 121 R0603 @M10
MDA34
R815 121 R0603 @M10
MDA36
R802 121 R0603 @M10
MDA38
R796 121 R0603 @M10
MDA37
R295 121 R0603 @M10
MDA39
R790 121 R0603 @M10
DQMA4
R818 121 R0603 @M10
MDA40
R774 121 R0603 @M10
MDA41
R267 121 R0603 @M10
MDA47
R287 121 R0603 @M10
MDA42
R776 121 R0603 @M10
MDA43
R278 121 R0603 @M10
MDA44
R783 121 R0603 @M10
MDA45
R786 121 R0603 @M10
MDA46
R285 121 R0603 @M10
DQMA5
R281 121 R0603 @M10
MDA50
R286 121 R0603 @M10
MDA51
R782 121 R0603 @M10
MDA48
R289 121 R0603 @M10
MDA49
R784 121 R0603 @M10
MDA55
R265 121 R0603 @M10
MDA54
R773 121 R0603 @M10
MDA52
R276 121 R0603 @M10
MDA53
R775 121 R0603 @M10
DQMA6
R279 121 R0603 @M10
MDA63
R813 121 R0603 @M10
MDA62
R812 121 R0603 @M10
MDA61
R811 121 R0603 @M10
MDA58
R291 121 R0603 @M10
MDA56
R792 121 R0603 @M10
MDA57
R799 121 R0603 @M10
MDA60
R810 121 R0603 @M10
MDA59
R804 121 R0603 @M10
DQMA7
R809 121 R0603 @M10
R200 180 R0603@M10
R222 180 R0603@M10
R715 180 R0603@M10
R688 180 R0603@M10
R819 180 R0603@M10
R780 180 R0603@M10
R777 180 R0603@M10
R808 180 R0603@M10
4
QSA0
QSA1
QSA2
QSA3
QSA4
QSA5
QSA6
QSA7
BC465
*
0.1uF
C0402
@M10
BC464
*
0.1uF
C0402
@M10
BC499
*
0.1uF
C0402
@M10
BC495
*
0.1uF
C0402
@M10
BC822
*
0.1uF
C0402
@M10
BC676
*
0.1uF
C0402
@M10
BC811
*
0.1uF
C0402
@M10
BC827
*
0.1uF
C0402
@M10
WEB42,45
CKEB42,45
QSA[0..7]42,44
MDA[0..63]42,44
MDB[0..63]42,45
MAA[0..13]42, 44
MAB[0..13]42, 45
DQMA[0..7]42,44
DQMB[0..7]42,45
QSB[0..7]42,45
MDB6
R916 121 R0603 @M10
MDB5
R410 121 R0603 @M10
MDB4
R915 121 R0603 @M10
MDB3
R903 121 R0603 @M10
MDB1
R894 121 R0603 @M10
MDB2
R899 121 R0603 @M10
MDB0
R888 121 R0603 @M10
MDB7
R917 121 R0603 @M10
DQMB0
R908 121 R0603 @M10
MDB15
R351 121 R0603 @M10
MDB13
R350 121 R0603 @M10
MDB12
R852 121 R0603 @M10
MDB14
R851 121 R0603 @M10
MDB11
R348 121 R0603 @M10
MDB10
R854 121 R0603 @M10
MDB8
MDB9
R347 121 R0603 @M10
DQMB1
R349 121 R0603 @M10
MDB19
R919 121 R0603 @M10
MDB17
R918 121 R0603 @M10
MDB16
R409 121 R0603 @M10
MDB18
R408 121 R0603 @M10
MDB20
R406 121 R0603 @M10
MDB21
R921 121 R0603 @M10
MDB23
R405 121 R0603 @M10
MDB22
R922 121 R0603 @M10
DQMB2
R407 121 R0603 @M10
MDB29
R881 121 R0603 @M10
MDB31
R873 121 R0603 @M10
MDB26
R352 121 R0603 @M10
MDB24
R850 121 R0603 @M10
MDB28
R868 121 R0603 @M10
MDB30
R870 121 R0603 @M10
MDB25
R849 121 R0603 @M10
MDB27
R848 121 R0603 @M10
DQMB3
R860 121 R0603 @M10
MAB12
R900 121 R0603 @M10
CSB0
CSB042,45
RASB42,45
CSB142,45
CASB42,45
R399 121 R0603 @M10
MAB2
R877 121 R0603 @M10
WEB
R909 121 R0603 @M10
RASB
R398 121 R0603 @M10
MAB5
R884 121 R0603 @M10
MAB13
R897 121 R0603 @M10
MAB8
R369 121 R0603 @M10
MAB11
R895 121 R0603 @M10
MAB4
R377 121 R0603 @M10
MAB10
R883 121 R0603 @M10
MAB9
R889 121 R0603 @M10
CKEB
R361 121 R0603 @M10
MAB1
R901 121 R0603 @M10
CSB1
R904 121 R0603 @M10
MAB3
R379 121 R0603 @M10
MAB6
R371 121 R0603 @M10
MAB0
R890 121 R0603 @M10
MAB7
R876 121 R0603 @M10
CASB
R397 121 R0603 @M10
BC779
*
0.1uF
C0402
@M10
BC780
*
0.1uF
C0402
@M10
BC743
*
0.1uF
C0402
@M10
BC744
*
0.1uF
C0402
@M10
BC745
*
0.1uF
C0402
@M10
BC737
*
0.1uF
C0402
@M10
BC781
*
0.1uF
C0402
@M10
BC782
*
0.1uF
C0402
@M10
BC282
*
0.1uF
C0402
@M10
BC718
*
0.1uF
C0402
@M10
BC722
*
0.1uF
C0402
@M10
BC730
*
0.1uF
C0402
@M10
MDB38
R404 121 R0603 @M10R814 121 R0603 @M10
MDB39
R396 121 R0603 @M10
MDB36
R911 121 R0603 @M10
MDB37
R403 121 R0603 @M10
MDB33
R400 121 R0603 @M10
MDB34
R402 121 R0603 @M10
MDB32
R910 121 R0603 @M10
MDB35
R401 121 R0603 @M10
DQMB4
R913 121 R0603 @M10
MDB43
R346 121 R0603 @M10
MDB41
R336 121 R0603 @M10
MDB40
R337 121 R0603 @M10
MDB42
R335 121 R0603 @M10
MDB47
R869 121 R0603 @M10
MDB45
R867 121 R0603 @M10
MDB46
R342 121 R0603 @M10
MDB44
R343 121 R0603 @M10
DQMB5
R344 121 R0603 @M10
MDB48
R885 121 R0603 @M10
MDB49
R378 121 R0603 @M10
MDB50
R893 121 R0603 @M10
MDB51
R380 121 R0603 @M10
MDB53
R386 121 R0603 @M10
MDB55
R907 121 R0603 @M10
MDB54
R389 121 R0603 @M10
MDB52
R902 121 R0603 @M10
DQMB6
R898 121 R0603 @M10
MDB61
R366 121 R0603 @M10
MDB62
R370 121 R0603 @M10
MDB60
R360 121 R0603 @M10
MDB63
R372 121 R0603 @M10
MDB57
R340 121 R0603 @M10
MDB59
R339 121 R0603 @M10
MDB56
R341 121 R0603 @M10
MDB58
R859 121 R0603 @M10
DQMB7
R872 121 R0603 @M10
R914 180 R0603@M10
R853 180 R0603@M10
R920 180 R0603@M10
R847 180 R0603@M10
R912 180 R0603@M10
R345 180 R0603@M10
R384 180 R0603@M10
R338 180 R0603@M10
QSB0
QSB1
QSB2
QSB3
QSB4
QSB5
QSB6
QSB7
BC677
*
0.1uF
C0402
@M10
BC283
*
0.1uF
C0402
@M10
BC777
*
0.1uF
C0402
@M10
BC775
*
0.1uF
C0402
@M10
BC710
*
0.1uF
C0402
@M10
BC727
*
0.1uF
C0402
@M10
BC487
*
0.1uF
C0402
@M10
BC491
*
0.1uF
C0402
@M10
TECHNOLOGY COPR.
Title
Document Numbe r R e v
3
2
Date: Sheet
661S03
of
48 50Friday, August 13, 2004
1
A
Page 49

5
D D
4
BC340
BC341
10uF
10uF
*
*
C1210
@M10
C1210
@M10
3
VIN
+5V
2
BC243
BC244
10uF
C1210
@M10
10uF
*
C1210
@M10
*
1
D40
RB751V-40
2 1
BC309
@M10
0.1uF
*
25V, X7R, +/-10%
C0603
@M10
678
D1D1D2
D2
R232 1.02K
@M10
R228
10K
+/-5%
R0402
dummy
R0603+/-1%
R227
BC310
124K
10nF
+/-1%
*
C0402
R0603
@M10
@M10
G1G2S1
S2
Q18
123
4 5
R723 1K
+5VSUS
@M10
R0402 +/-5%
2.5V 4A
SHORT3
TC7
220uF
CTX
@M10
VDD_MEM2.5_BF
TC3
*
220uF
CTX
@M10
R721
17.8k
+/-1%
R0603
@M10
R230
10K
+/-1%
R0402
@M10
*
L19
*
4.7uH @M10
BC704
10nF
C0402
@M10
R722
0
+/-5%
R0402
dummy
R229
0
+/-5%
R0402
@M10
FDS6982S
@M10
22m Ohms
VDD_MEM2.5
C C
*
Vo_2.5V=0.9(R245+R296)/R296
R231=Ioc*Rds(on)max/75uA-0.14K
B B
R623=10.3V/(75uA+8uA)=124K
U14
@M10
1
GND
2
LGATE1
3
PGND1
4
PHASE1
5
UGATE1
6
BOOT1
7
ISEN1
8
EN1
9
VOUT1
10
VSEN1
11
OCSET1
12
SOFT1
13
DDR
14
VIN
ISL6227CA
VIN
VCC
LGATE2
PGND2
PHASE2
UGATE2
BOOT2
ISEN2
VOUT2
VSEN2
OCSET2
SOFT2
PG2/REF
PG1
28
27
26
25
24
23
22
21
EN2
20
19
18
17
16
15
BC275
4.7uF
*
6.3V, X5R, +/-10%
C0805
@M10
BC277
10nF
*
25V, X7R, +/-10%
C0402
@M10
R0603 +/-1%
@M10
R192 750
R193
10K
+/-5%
R0402
dummy
R674
124K
+/-1%
R0603
@M10
D39
RB751V-40
@M10
2 1
BC276
0.1uF
*
25V, X7R, +/-10%
C0603
@M10
R678 1K
R0402 +/-5%
@M10
FDS6982S
@M10
22m Ohms
+5VSUS
1.8V 3A
SHORT2
+V1.8
*
TC4
220uF
CTX
@M10
R675
10K
+/-1%
R0402
@M10
R187
10K
+/-1%
R0402
@M10
+V1.8_BF
*
TC2
220uF
CTX
@M10
678
Q14
S2
123
D1
D1D2D2
G1G2S1
4 5
L18 4.7uH @M10
*
BC273
R676
10nF
*
0
C0402
+/-5%
@M10
R0402
dummy
R194
0
+/-5%
R0402
@M10
Vo_1.8V=0.9(R625+R299)/R299
R232=Ioc*Rds(on)max/75uA-0.14K
R624=10.3V*/(75uA+8uA)=124K
Soft start time from Enable
to Power good indicate
Tsoft=1.5V*Csoft/5uA=3mS
DDR EN1 EN2 PIN14 Phase
0 1 1 4.2V<VIN<24V 180 degree
A A
TECHNOLOGY COPR.
of
49 50Friday, August 13, 2004
A
5
Title
2.5V & 1.8V FOR M10
Document Number Re v
4
3
2
Date: Sheet
661S03
1
Page 50

5
4
3
2
1
Adapter
19V DC, 3.96A, 65W
D D
Battery
3S2P 10.8V
ADIN
MBATA+
P=1/4 W
R14
+/-5%
10 R1206
1
2
D3
BAT54C
R15 10
3
R1206 +/-5%
P=1/4 W
Vref= 2.5V
R
U1
LM431ACM3
A C
C0603
16V,X7R,+/-20%
0.1uF
1 2
BC546
R16
2.2K
+/-5%
R0402
R17
1K
Vout=Vref*(1+R1/R2)
+/-5%
R0402
BC545
12
0.1uF
16V,X7R,+/-20%
C0603
MOSVCC
BC14
1uF
*
16V, X7R, +/-10%
C0805
8V
+3VALW
DC Working Peak Reserve 20V
C C
B B
ADIN
MBATA+
BC585
12
0.1uF
16V,X7R,+/-20%
C0603
BC587
12
0.1uF
16V,X7R,+/-20%
C0603
NBSWONJ15,18
R541 150
R0603 +/-5%
R542 150
R0603 +/-5%
R6=(19-5.9)/0.15=87Ohm
Q6 2SB1424
E C
R547 1K
R0402 +/-5%
NBSWONJ
packing SOT-89
B
Ic=3A>>150mA
R550
54.9
+/-1%
R0402
R954=(9-0.2-0.6)/0.15=54.9 Ohm
3VAUX_EN15,34
21
D25B320B
21
D5B320B
SOP8 PACKING
Pin 2 sense
pin 6 5V TAP
R582 1K
R0402 +/-5%
2
8
U5
5
3
MIC2951
ERROR
SD
4
VIN
SNS
1
VOUT
GND
FB7TAP
6
VREF=1.23V
VOUT=VREF*(1+R1/R2)
VINT VIN
R59 1K
R0402 +/-5%
R577
1K
R0402
+/-5%
B
Q9
FDS4435
1
S
2
3
G
4 5
Q55
MMBT3904
E C
8
D
7
6
R552
3.4K
+/-1%
R0603
R551
2K
+/-1%
R0603
R554 0
R0402 +/-5%
BC590
BC591
100pF
C0402
3.3uF
*
C0805
change 4.7 UF 0805 footprint
control by BOM
lonny -080504
*
D6
B320B
2 1
+3VALW_591
VOUT=3.3V
TO-92 Packing
Output 3.3V 150mA current
A A
update sch VINT for save power only battery mode lonny update
2004/07/17
TECHNOLOGY COPR.
50 50Friday, August 13, 2004
1
of
A
5
Title
SAVE POWER
Document Numbe r R e v
4
3
2
Date: Sheet
661S03