5
4
3
2
1
http://hobi-elektronika.net
D D
UMA & Optimus Schematics Document
Sandy Bridge
C C
Intel PCH
2010-08-16
REV : SB
B B
DY :None Installed
UMA:UMA platform installed
OPS:Optimus
A A
5
4
3
2
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Tuesday, September 07, 2010
Tuesday, September 07, 2010
Tuesday, September 07, 2010
Date: Sheet
Date: Sheet
Date: Sheet
Cover Page
Cover Page
Cover Page
LA470
LA470
LA470
Taipei Hsien 221, Taiwan, R.O.C.
11 0 3
11 0 3
11 0 3
of
of
1
of
SB
SB
SB
5
##OnMainBoard
Audio BD
POWER BD
VRAM
D D
Finger Printer BD
2GB/1GB/512MB
88,89,90,91
DDR3
800MHz
IO BD
(Cardreader+Audio+USB)
NVIDIA
LED BD
USB
C C
B B
SD/MMC+/MS/
MS Pro/xD
I/O BD
HDMI
LCD
CRT
Finger Print BD
74
51
49
50
Internal DMIC
HP1
I/O BD
A A
MIC IN
2CH SPEAKER
5
N12P-GE/GV
N12M-GE
Bluetooth
CAMERA
Finger Print
CardReader
Realtek
RTS5139
83.84,85,86,87
63
49
64
Azalia
CODEC
Codec_ALC272
4
Block Diagram
http://hobi-elektronika.net
3
(UMA/Optimus co-lay)
4
(Discrete only)
USB 2.0 x 1
29
4
PCIe x 16
HDMI
LVDS
RGB CRT
USB2.0 x 3
AZALIA
Intel CPU
Sandy Bridge
DDRIII: 1066/1333/1666 MHz
4,5,6,7,8,9,10
FDI x 4 x 2
(UMA only)
Intel
PCH
Cougar Point
14 USB 2.0/1.1 ports
ETHERNET (10/100/1000Mb)
High Definition Audio
SATA ports (6)
PCIE ports (8)
LPC I/F
ACPI 1.1
17,18,19,20,21,22,23,24,25
SPI
Flash ROM
G-Sensor
4MB
79
60
DMI x 4
KBC
NUVOTON
NPCE795G
Touch
PAD
69
LPC Bus
Project code : 91.4KZ01.001
PCB P/N : 48.4KZ01.0SB
Revision : 10250-SB
DDRIII 1066/1333/1666 Channel A
DDRIII 1066/1333/1666 Channel B
PCIE x 1
PCIE x 1/USB2.0 x 1
SATA x 1/USB2.0 x 1
USB 2.0 x 3
USB 2.0 x 1/SATA x 1
SATA x 2
LPC debug port
SMBus
27
Int.
KB
69 25
3
Thermal
EMC2103-2-AP
71
GLAN RJ45
RTL8111E
Mini-Card
WLAN
Mini-Card
WWAN
MB
USB x 3
E-SATA/USB
comb
Fan
28
31
65
66
57
28
2
DDRIII
Slot 0
1066/1333/1666
Slot 1 DDRIII
1066/1333/1666
CONN
SIM
66
HDD
56
ODD
56
2
1
SYSTEM DC/DC
RT8208A
INPUTS
DCBATOUT
OUTPUTS
0D85V_S0
48
CPU DC/DC
NCP6131
INPUTS
DCBATOUT
SYSTEM DC/DC
INPUTS
DCBATOUT
SYSTEM DC/DC
TPS51123
INPUTS
14
DCBATOUT 5V_S5
SYSTEM DC/DC
15
INPUTS
DCBATOUT
SYSTEM DC/DC
INPUTS
DCBATOUT
59
INPUTS
DCBATOUT
INPUTS
+DC_IN_S5
26
SYSTEM DC/DC
INPUTS OUTPUTS
3D3V_S5 1D8V_S0
SYSTEM DC/DC
G9091-180T11U
INPUTS OUTPUTS
26
3D3V_S5
3D3V_S0
INPUTS OUTPUTS
5V_S5
PCB LAYER
L1:Top
L2:GND
L3:Signal
<Core Design>
<Core Design>
<Core Design>
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Tuesday, September 07, 2010
Tuesday, September 07, 2010
Tuesday, September 07, 2010
Date: Sheet
Date: Sheet
Date: Sheet
Block Diagram
Block Diagram
Block Diagram
LA470
LA470
LA470
L4:Signal
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
1
42~44
OUTPUTS
VCC_CORE
TPS51218
OUTPUTS
1D05V_VTT
OUTPUTS
5V_AUX_S5
3D3V_AUX_S5
3D3V_S5
TPS51218
OUTPUTS
1D5V_S3
DDR_VREF_S3
NCP5911
OUTPUTS
VCC_GFXCORE
VGA
RT8208A
OUTPUTS
VGA_CORE
TI CHARGER
BQ24745
45
41
46
44
92
40
OUTPUTS
DCBATOUT +PBATT
1D5V_S5
0D75V_S0
47
24,93
46
SB
SB
SB
RT8015B
1D8V_VGA_S0
LDO
RT9026
L5:VCC
L6:Signal
L7:GND
L8:Signal
21 0 3
21 0 3
21 0 3
of
of
of
A
PCH Strapping
Name Schematics Notes
SPKR
INIT3_3V# Weak internal pull-up. Leave as "No Connect".
GNT3#/GPIO55
4 4
GNT2#/GPIO53
GNT1#/GPIO51
SPI_MOSI
NV_ALE
Reboot option at power-up
Internal weak Pull-down.
Default Mode:
Connect to Vcc3_3 with 8.2-kȍ
No Reboot Mode with TCO Disabled:
- 10-kȍ weak pull-up resistor.
GNT[3:0]# functionality is not available on Mobile.
Mobile: Used as GPIO only
Pull-up resistors are not required on these signals.
If pull-ups are used, they should be tied to the Vcc3_3power rail.
Enable Danbury:
Disable Danbury:
Enable Danbury:
Disable Danbury:
Huron River Schematic Checklist Rev.0_7
Connect to Vcc3_3 with 8.2-k? weak pull-up resistor.
Left floating, no pull-down required.
Connect to +NVRAM_VCCQ with 8.2-kohm
weak pull-up resistor [CRB has it pulled up
with 1-kohm no-stuff resistor]
Leave floating (internal pull-down)
B
http://hobi-elektronika.net
C
Processor Strapping
Pin Name Strap Description Configuration (Default value for each bit is
CFG[2]
PCI-Express Static
Lane Reversal
CFG[4]
CFG[6:5]
CFG[7]
PCI-Express
Port Bifurcation
Straps
PEG DEFER TRAINING
1 unless specified otherwise)
1:
Normal Operation.
Lane Numbers Reversed 15 -> 0, 14 -> 1, ...
0:
Disabled - No Physical Display Port attached to
1:
Embedded DisplayPort.
Enabled - An external Display Port device is
0:
connectd to the EMBEDDED display Port
11 : x16 - Device 1 functions 1 and 2 disabled
10 : x8, x8 - Device 1 function 1 enabled ;
function 2 disabled
01 : Reserved - (Device 1 function 1 disabled ;
function 2 enabled)
00 : x8, x4, x4 - Device 1 functions 1 and 2
enabled
1:
PEG Train immediately following xxRESETB de assertion
PEG Wait for BIOS for training
0:
D
Huron River Schematic Checklist Rev.0_7
Default
Value
1
0
11
1
E
NC_CLE DMI termination voltage. Weak internal pull-up. Do not pull low.
Low (0) - Flash Descriptor Security will be overridden. Also,
when this signals is sampled on the rising edge of PWROK
then it will also disable Intel ME and its features.
HAD_DOCK_EN#
/GPIO[33]
3 3
High (1) - Security measure defined in the Flash Descriptor will be enabled.
Platform design should provide appropriate pull-up or pull-down depending on
the desired settings. If a jumper option is used to tie this signal to GND as
required by the functional strap, the signal should be pulled low through a weak
pull-down in order to avoid asserting HDA_DOCK_EN# inadvertently.
Note: CRB recommends 1-kohm pull-down for FD Override. There is an internal
pull-up of 20 kohm for DA_DOCK_EN# which is only enabled at boot/reset for
strapping functions.
HDA_SDO Weak internal pull-down. Do not pull high. Sampled at rising edge of RSMRST#.
HDA_SYNC
GPIO15
GPIO8
2 2
GPIO27
Weak internal pull-down. Do not pull high. Sampled at rising edge of RSMRST#.
Low (1) - Intel ME Crypto Transport Layer Security (TLS) cipher suite with no
confidentiality High (1) - Intel ME Crypto Transport Layer Security (TLS) cipher
suite with confidentiality
Note : This is an un-muxed signal.
This signal has a weak internal pull-down of 20 kohm which is enabled when PWROK is low.
Sampled at rising edge of RSMRST#.
CRB has a 1-kohm pull-up on this signal to +3.3VA rail.
GPIO8 on PCH is the Integrated Clock Enable strap and is required to be pulled-down
using a 1k +/- 5% resistor. When this signal is sampled high at the rising edge of
RSMRST#, Integrated Clocking is enabled, When sampled low, Buffer Through Mode is
enabled.
Default = Do not connect (floating)
High(1) = Enables the internal VccVRM to have a clean supply for
analog rails. No need to use on-board filter circuit.
Low (0) = Disables the VccVRM. Need to use on-board filter
circuits for analog rails.
POWER PLANE
5V_S0
3D3V_S0
1D8V_S0
1D5V_S0
1D05V_VTT
0D85V_S0
0D75V_S0
VCC_CORE
VCC_GFXCORE
1D8V_VGA_S0
3D3V_VGA_S0
1V_VGA_S0
5V_USBX_S3
1D5V_S3
DDR_VREF_S3
BT+
DCBATOUT
5V_S5
5V_AUX_S5
3D3V_S5
3D3V_AUX_S5
3D3V_AUX_KBC
3D3V_AUX_S5
VOLTAGE DESCRIPTION
5V
3.3V
1.8V
1.5V
1.05V
0.95 - 0.85V
0.75V
0.35V to 1.5V
0.4 to 1.25V
1.8V
3.3V
1V
5V
1.5V
0.75V
6V-14.1V
6V-14.1V
5V
5V
3.3V
3.3V
3.3V 3D3V_LAN_S5
3.3V
3.3V
Voltage Rails
ACTIVE IN
S0
CPU Core Rail
Graphics Core Rail
S3
AC Brick Mode only
All S states
WOL_EN
DSW, Sx ON for supporting Deep Sleep states
G3, Sx
Legacy WOL
Powered by Li Coin Cell in G3
and +V3ALW in Sx
USB Table
Pair
PCIE Routing
0
1
LANE1 Mini Card2(WWAN)
LANE2
LANE3 Card Reader
LANE4 Mini Card1(WLAN)
1 1
LANE5
LANE6
LANE7
LANE8 New Card
Onboard LAN
USB3.0
Intel GBE LAN
Dock
SATA Table
SATA
Pair
0
1
2
3
4
5
Device
HDD1
HDD2
N/A
N/A
ODD
ESATA
2
3
4
5
6
7
8
9
10
11
12
13
Device
Touch Panel / 3G SIM
USB Ext. port 1 (HS)
Fingerprint
BLUETOOTH
Mini Card2 (WWAN)
CARD READER
X
X
USB Ext. port 4 / E-SATA /USB CHARGER
USB Ext. port 2
USB Ext. port 3
Mini Card1 (WLAN)
CAMERA
New Card
SMBus ADDRESSES
2
I C / SMBus Addresses
Device
EC SMBus 1
Battery
CHARGER
EC SMBus 2
PCH
eDP
PCH SMBus
SO-DIMMA (SPD)
SO-DIMMB (SPD)
Digital Pot
G-Sensor
MINI
HURON RIVER ORB
Address Hex Bus Ref Des
BAT_SCL/BAT_SDA
BAT_SCL/BAT_SDA
BAT_SCL/BAT_SDA
SML1_CLK/SML1_DATA
SML1_CLK/SML1_DATA
SML1_CLK/SML1_DATA
PCH_SMBDATA/PCH_SMBCLK
PCH_SMBDATA/PCH_SMBCLK
PCH_SMBDATA/PCH_SMBCLK
PCH_SMBDATA/PCH_SMBCLK
PCH_SMBDATA/PCH_SMBCLK
PCH_SMBDATA/PCH_SMBCLK
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Tuesday, September 07, 2010
Tuesday, September 07, 2010
Tuesday, September 07, 2010
Date: Sheet
Date: Sheet
Date: Sheet
Table of Content
Table of Content
Table of Content
LA470
LA470
LA470
Taipei Hsien 221, Taiwan, R.O.C.
3 103
3 103
3 103
of
of
of
SB
SB
SB
SSID = CPU
5
D D
C C
Note:
EDP_ICOMPO and EDP_COMPIO should not be left
floating.
1D05V_VTT
Signal Routing Guideline:
EDP_ICOMPO keep W/S=12/15 mils and routing
length less than 500 mils.
B B
EDP_COMPIO keep W/S=4/15 mils and routing
length less than 500 mils.
If HPD is disabled while eDP interface is still enabled,
connect it to CPU VCCIO via a 10-k ohm pull-up
resistor on the motherboard. This signal can be left as
no connect if entire eDP interface is disabled.
NOTE.
Processor strap CFG[4] should be pulled low to enable Embedded DisplayPort.
DMI_TXN[3:0] 19
DMI_TXP[3:0] 19
DMI_RXN[3:0] 19
DMI_RXP[3:0] 19
FDI_TXN[7:0] 19
FDI_TXP[7:0] 19
FDI_FSYNC0 19
FDI_FSYNC1 19
FDI_INT 19
FDI_LSYNC0 19
FDI_LSYNC1 19
R402 24D9R2F-L-GP R402 24D9R2F-L-GP
1 2
R403
R403
1 2
DY
DY
10KR2J-3-GP
10KR2J-3-GP
4
http://hobi-elektronika.net
CPU1A
CPU1A
SANDY
DMI_TXN0
DMI_TXN1
DMI_TXN2
DMI_TXN3
DMI_TXP0
DMI_TXP1
DMI_TXP2
DMI_TXP3
DMI_RXN0
DMI_RXN1
DMI_RXN2
DMI_RXN3
DMI_RXP0
DMI_RXP1
DMI_RXP2
DMI_RXP3
FDI_TXN0
FDI_TXN1
FDI_TXN2
FDI_TXN3
FDI_TXN4
FDI_TXN5
FDI_TXN6
FDI_TXN7
FDI_TXP0
FDI_TXP1
FDI_TXP2
FDI_TXP3
FDI_TXP4
FDI_TXP5
FDI_TXP6
FDI_TXP7
DP_COMP
eDP_HPD
B27
B25
A25
B24
B28
B26
A24
B23
G21
E22
F21
D21
G22
D22
F20
C21
A21
H19
E19
F18
B21
C20
D18
E17
A22
G19
E20
G18
B20
C19
D19
F17
J18
J17
H20
J19
H17
A18
A17
B16
C15
D15
C17
F16
C16
G15
C18
E16
D16
F15
SANDY
SANDY
2ND = 62.10040.771
2ND = 62.10040.771
DMI_RX#0
DMI_RX#1
DMI_RX#2
DMI_RX#3
DMI_RX0
DMI_RX1
DMI_RX2
DMI_RX3
DMI_TX#0
DMI_TX#1
DMI_TX#2
DMI_TX#3
DMI_TX0
DMI_TX1
DMI_TX2
DMI_TX3
FDI0_TX#0
FDI0_TX#1
FDI0_TX#2
FDI0_TX#3
FDI1_TX#0
FDI1_TX#1
FDI1_TX#2
FDI1_TX#3
FDI0_TX0
FDI0_TX1
FDI0_TX2
FDI0_TX3
FDI1_TX0
FDI1_TX1
FDI1_TX2
FDI1_TX3
FDI0_FSYNC
FDI1_FSYNC
FDI_INT
FDI0_LSYNC
FDI1_LSYNC
EDP_COMPIO
EDP_ICOMPO
EDP_HPD
EDP_AUX
EDP_AUX#
EDP_TX0
EDP_TX1
EDP_TX2
EDP_TX3
EDP_TX#0
EDP_TX#1
EDP_TX#2
EDP_TX#3
62.10055.421
62.10055.421
SANDY
DMI
DMI
Intel(R) FDI
Intel(R) FDI
eDP
eDP
3
Signal Routing Guideline:
PEG_ICOMPO keep W/S=12/15 mils and routing length less than 500 mils.
PEG_ICOMPI & PEG_RCOMPO keep W/S=4/15 mils and routing length less than 500 mils.
1 OF 9
1 OF 9
PEG_ICOMPI
PEG_ICOMPO
PEG_RCOMPO
PEG_RX#0
PEG_RX#1
PEG_RX#2
PEG_RX#3
PEG_RX#4
PEG_RX#5
PEG_RX#6
PEG_RX#7
PEG_RX#8
PEG_RX#9
PEG_RX#10
PEG_RX#11
PEG_RX#12
PEG_RX#13
PEG_RX#14
PEG_RX#15
PEG_RX0
PEG_RX1
PEG_RX2
PEG_RX3
PEG_RX4
PEG_RX5
PEG_RX6
PEG_RX7
PEG_RX8
PEG_RX9
PEG_RX10
PEG_RX11
PEG_RX12
PEG_RX13
PEG_RX14
PEG_RX15
PEG_TX#0
PEG_TX#1
PEG_TX#2
PEG_TX#3
PEG_TX#4
PEG_TX#5
PEG_TX#6
PEG_TX#7
PEG_TX#8
PEG_TX#9
PEG_TX#10
PEG_TX#11
PCI EXPRESS* - GRAPHICS
PCI EXPRESS* - GRAPHICS
PEG_TX#12
PEG_TX#13
PEG_TX#14
PEG_TX#15
PEG_TX0
PEG_TX1
PEG_TX2
PEG_TX3
PEG_TX4
PEG_TX5
PEG_TX6
PEG_TX7
PEG_TX8
PEG_TX9
PEG_TX10
PEG_TX11
PEG_TX12
PEG_TX13
PEG_TX14
PEG_TX15
J22
J21
H22
K33
M35
L34
J35
J32
H34
H31
G33
G30
F35
E34
E32
D33
D31
B33
C32
J33
L35
K34
H35
H32
G34
G31
F33
F30
E35
E33
F32
D34
E31
C33
B32
M29
M32
M31
L32
L29
K31
K28
J30
J28
H29
G27
E29
F27
D28
F26
E25
M28
M33
M30
L31
L28
K30
K27
J29
J27
H28
G28
E28
F28
D27
E26
D25
PEG_IRCOMP_R
PEG_RXN15
PEG_RXN14
PEG_RXN13
PEG_RXN12
PEG_RXN11
PEG_RXN10
PEG_RXN9
PEG_RXN8
PEG_RXN7
PEG_RXN6
PEG_RXN5
PEG_RXN4
PEG_RXN3
PEG_RXN2
PEG_RXN1
PEG_RXN0
PEG_RXP15
PEG_RXP14
PEG_RXP13
PEG_RXP12
PEG_RXP11
PEG_RXP10
PEG_RXP9
PEG_RXP8
PEG_RXP7
PEG_RXP6
PEG_RXP5
PEG_RXP4
PEG_RXP3
PEG_RXP2
PEG_RXP1
PEG_RXP0
PEG_C_TXN15
PEG_C_TXN14
PEG_C_TXN13
PEG_C_TXN12
PEG_C_TXN11
PEG_C_TXN10
PEG_C_TXN9
PEG_C_TXN8
PEG_C_TXN7
PEG_C_TXN6
PEG_C_TXN5
PEG_C_TXN4
PEG_C_TXN3
PEG_C_TXN2
PEG_C_TXN1
PEG_C_TXN0
PEG_C_TXP15
PEG_C_TXP14
PEG_C_TXP13
PEG_C_TXP12
PEG_C_TXP11
PEG_C_TXP10
PEG_C_TXP9
PEG_C_TXP8
PEG_C_TXP7
PEG_C_TXP6
PEG_C_TXP5
PEG_C_TXP4
PEG_C_TXP3
PEG_C_TXP2
PEG_C_TXP1
PEG_C_TXP0
R401 24D9R2F-L-GP R401 24D9R2F-L-GP
1 2
PEG_RXN[0..15]
PEG_RXP[0..15]
C401
C401
1 2
OPS
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
OPS
OPS
OPS
OPS
OPS
OPS
OPS
OPS
OPS
OPS
OPS
OPS
OPS
OPS
OPS
OPS
OPS
OPS
OPS
OPS
OPS
OPS
OPS
OPS
OPS
OPS
OPS
OPS
OPS
OPS
OPS
OPS
OPS
OPS
OPS
OPS
OPS
OPS
OPS
OPS
OPS
OPS
OPS
OPS
OPS
OPS
OPS
OPS
OPS
OPS
OPS
OPS
OPS
OPS
OPS
OPS
OPS
OPS
OPS
OPS
OPS
OPS
OPS
C402
C402
C403
C403
C404
C404
C405
C405
C406
C406
C407
C407
C408
C408
C409
C409
C410
C410
C411
C411
C412
C412
C413
C413
C414
C414
C415
C415
C416
C416
C417
C417
C418
C418
C419
C419
C420
C420
C421
C421
C422
C422
C423
C423
C424
C424
C425
C425
C426
C426
C427
C427
C428
C428
C429
C429
C430
C430
C431
C431
C432
C432
2
1D05V_VTT
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
PEG_RXN[0..15] 83
PEG_RXP[0..15] 83
PEG_TXN15
PEG_TXN14
PEG_TXN13
PEG_TXN12
PEG_TXN11
PEG_TXN10
PEG_TXN9
PEG_TXN8
PEG_TXN7
PEG_TXN6
PEG_TXN5
PEG_TXN4
PEG_TXN3
PEG_TXN2
PEG_TXN1
PEG_TXN0
PEG_TXP15
PEG_TXP14
PEG_TXP13
PEG_TXP12
PEG_TXP11
PEG_TXP10
PEG_TXP9
PEG_TXP8
PEG_TXP7
PEG_TXP6
PEG_TXP5
PEG_TXP4
PEG_TXP3
PEG_TXP2
PEG_TXP1
PEG_TXP0
PEG_TXN[0..15]
PEG_TXP[0..15]
1
PEG_TXN[0..15] 83
PEG_TXP[0..15] 83
<Core Design>
<Core Design>
A A
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Tuesday, September 07, 2010
Tuesday, September 07, 2010
Tuesday, September 07, 2010
Date: Sheet
Date: Sheet
Date: Sheet
CPU (PCIE/DMI/FDI)
CPU (PCIE/DMI/FDI)
CPU (PCIE/DMI/FDI)
LA470
LA470
LA470
Taipei Hsien 221, Taiwan, R.O.C.
4 103
4 103
4 103
of
of
of
SB
SB
SB
SSID = CPU
5
1D05V_VTT
R501
R501
1 2
62R2J-GP
D D
62R2J-GP
H_PROCHOT#
1 2
C502
C502
SC47P50V2JN-3GP
SC47P50V2JN-3GP
H_SNB_IVB# 18
1
TP501 TPAD14-GP TP501 TPAD14-GP
1
TP502 TPAD14-GP TP502 TPAD14-GP
H_PECI 22,27
R513
R513
H_PROCHOT# 27,42
H_THERMTRIP# 22,36
1 2
56R2J-4-GP
56R2J-4-GP
4
SKTOCC#_R
H_CATERR#
H_PROCHOT#_R
3
2 OF 9
CPU1B
CPU1B
http://hobi-elektronika.net
SANDY
SANDY
C26
SNB_IVB#
AN34
AL33
AN33
AL32
AN32
SKTOCC#
CATERR#
PECI
PROCHOT#
THERMTRIP#
MISC THERMAL PWR MANAGEMENT
MISC THERMAL PWR MANAGEMENT
DPLL_REF_SSCLK#
CLOCKS
CLOCKS
DDR3
MISC
DDR3
MISC
2 OF 9
BCLK
BCLK#
DPLL_REF_SSCLK
SM_DRAMRST#
SM_RCOMP0
SM_RCOMP1
SM_RCOMP2
A28
A27
CLK_DP_P_R
A16
CLK_DP_N_R
A15
R502
R502
R8
AK1
A5
A4
1 2
SM_RCOMP_0
SM_RCOMP_1
SM_RCOMP_2
Signal Routing Guideline:
SM_RCOMP keep routing length less than 500 mils.
CLK_EXP_P 20
CLK_EXP_N 20
CLK_DP_P_R 20
CLK_DP_N_R 20
4K99R2F-L-GP
4K99R2F-L-GP
R506 140R2F-GP R506 140R2F-GP
1 2
R507 25D5R2F-GP R507 25D5R2F-GP
1 2
R508 200R2F-L-GP R508 200R2F-L-GP
1 2
2
SM_DRAMRST# 37
Disabling Guidelines:
If motherboard only supports external graphics:
Connect DPLL_REF_SSCLK on Processor to GND through
1K +/- 5% resistor.
Connect DPLL_REF_SSCLK# on Processor to VCCP
through 1K +/- 5% resistorpower (~15 mW) may be
wasted.
CLK_DP_P_R
CLK_DP_N_R
RN502
RN502
1
2 3
SRN1KJ-7- GP
SRN1KJ-7-GP
DY
DY
SB_0830
1
4
1D05V_VTT
10KR2J-3-GP
10KR2J-3-GP
H_CPUPWRGD_R
PRDY#
PREQ#
TCK
H_PM_SYNC 19
H_CPUPWRGD_R
R504
R504
VDDPWRGOOD
1 2
R505
R505
1 2
DY
DY
0R2J-2-GP
0R2J-2-GP
VDDPWRGOOD
0R2J-2-GP
0R2J-2-GP
BUF_CPU_RST#
H_CPUPWRGD 11,22,36,97
PM_DRAM_PWRGD 19,37
VDDPWRGOOD 37
1
TP518 TPAD14-GP TP518 TPAD14-GP
AM34
PM_SYNC
AP33
UNCOREPWRGOOD
V8
SM_DRAMPWROK
AR33
RESET#
SANDY
SANDY
62.10055.421
62.10055.421
2ND = 62.10040.771
2ND = 62.10040.771
JTAG & BPM
JTAG & BPM
TMS
TRST#
TDO
DBR#
BPM#0
BPM#1
BPM#2
BPM#3
BPM#4
BPM#5
BPM#6
BPM#7
TDI
R503
R503
1 2
C C
AP29
AP27
AR26
AR27
AP30
AR28
AP26
AL35
AT28
AR29
AR30
AT30
AP32
AR31
AT31
AR32
XDP_PRDY#
XDP_PREQ#
XDP_TCLK
XDP_TMS
XDP_TRST#
XDP_TDI
XDP_TDO
XDP_DBRESET#
XDP_BPM0
XDP_BPM1
XDP_BPM2
XDP_BPM3
XDP_BPM4
XDP_BPM5
XDP_BPM6
XDP_BPM7
1
TP511 TPAD14-GP TP511 TPAD14-GP
1
TP512 TPAD14-GP TP512 TPAD14-GP
1
TP513 TPAD14-GP TP513 TPAD14-GP
1
TP514 TPAD14-GP TP514 TPAD14-GP
1
TP515 TPAD14-GP TP515 TPAD14-GP
1
TP516 TPAD14-GP TP516 TPAD14-GP
1
TP517 TPAD14-GP TP517 TPAD14-GP
1
TP503 TPAD14-GP TP503 TPAD14-GP
1
TP504 TPAD14-GP TP504 TPAD14-GP
1
TP505 TPAD14-GP TP505 TPAD14-GP
1
TP506 TPAD14-GP TP506 TPAD14-GP
1
TP507 TPAD14-GP TP507 TPAD14-GP
1
TP508 TPAD14-GP TP508 TPAD14-GP
1
TP509 TPAD14-GP TP509 TPAD14-GP
1
TP510 TPAD14-GP TP510 TPAD14-GP
SB_0820
1D05V_VTT
RN501
XDP_TDO
XDP_TMS
XDP_TDI
XDP_TCLK
XDP_TRST#
XDP_DBRESET# 22,36
XDP_DBRESET#
RN501
1
8
2
7
3
6
4 5
SRN51J-1-GP
SRN51J-1-GP
R511 51R2J-2-GP R511 51R2J-2-GP
1 2
1 2
R516 1KR2J-1-GP R516 1KR2J-1-GP
3D3V_S0
B B
R510
R510
PLT_RST# 11,18,27,31,36,65,66,71,83,97
1 2
1K5R2F-2-GP
1K5R2F-2-GP
1 2
BUF_CPU_RST#
R509
R509
750R2F-GP
750R2F-GP
SB_0805
<Core Design>
<Core Design>
A A
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet
Date: Sheet
CPU (THERMAL/CLOCK/PM )
CPU (THERMAL/CLOCK/PM )
CPU (THERMAL/CLOCK/PM )
LA470
LA470
Tuesday, September 07, 2010
Tuesday, September 07, 2010
Tuesday, September 07, 2010
LA470
Taipei Hsien 221, Taiwan, R.O.C.
5 103
5 103
5 103
of
of
of
SB
SB
SB
5
4
3
2
1
SSID = CPU
CPU1C
CPU1C
SANDY
SANDY
M_A_DQ[63:0] 14 M_B_DQ[63:0] 15
D D
C C
B B
M_A_DQ[63:0]
M_A_BS0 14
M_A_BS1 14
M_A_BS2 14
M_A_CAS# 14
M_A_RAS# 14
M_A_WE# 14
M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ4
M_A_DQ5
M_A_DQ6
M_A_DQ7
M_A_DQ8
M_A_DQ9
M_A_DQ10
M_A_DQ11
M_A_DQ12
M_A_DQ13
M_A_DQ14
M_A_DQ15
M_A_DQ16
M_A_DQ17
M_A_DQ18
M_A_DQ19
M_A_DQ20
M_A_DQ21
M_A_DQ22
M_A_DQ23
M_A_DQ24
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQ28
M_A_DQ29
M_A_DQ30
M_A_DQ31
M_A_DQ32
M_A_DQ33
M_A_DQ34
M_A_DQ35
M_A_DQ36
M_A_DQ37
M_A_DQ38
M_A_DQ39
M_A_DQ40
M_A_DQ41
M_A_DQ42
M_A_DQ43
M_A_DQ44
M_A_DQ45
M_A_DQ46
M_A_DQ47
M_A_DQ48
M_A_DQ49
M_A_DQ50
M_A_DQ51
M_A_DQ52
M_A_DQ53
M_A_DQ54
M_A_DQ55
M_A_DQ56
M_A_DQ57
M_A_DQ58
M_A_DQ59
M_A_DQ60
M_A_DQ61
M_A_DQ62
M_A_DQ63
F10
G10
N10
M10
AG6
AG5
AK6
AK5
AH5
AH6
AJ5
AJ6
AJ8
AK8
AJ9
AK9
AH8
AH9
AL9
AL8
AP11
AN11
AL12
AM12
AM11
AL11
AP12
AN12
AJ14
AH14
AL15
AK15
AL14
AK14
AJ15
AH15
AE10
AF10
AE8
AD9
AF9
C5
SA_DQ0
D5
SA_DQ1
D3
SA_DQ2
D2
SA_DQ3
D6
SA_DQ4
C6
SA_DQ5
C2
SA_DQ6
C3
SA_DQ7
SA_DQ8
F8
SA_DQ9
SA_DQ10
G9
SA_DQ11
F9
SA_DQ12
F7
SA_DQ13
G8
SA_DQ14
G7
SA_DQ15
K4
SA_DQ16
K5
SA_DQ17
K1
SA_DQ18
J1
SA_DQ19
J5
SA_DQ20
J4
SA_DQ21
J2
SA_DQ22
K2
SA_DQ23
M8
SA_DQ24
SA_DQ25
N8
SA_DQ26
N7
SA_DQ27
SA_DQ28
M9
SA_DQ29
N9
SA_DQ30
M7
SA_DQ31
SA_DQ32
SA_DQ33
SA_DQ34
SA_DQ35
SA_DQ36
SA_DQ37
SA_DQ38
SA_DQ39
SA_DQ40
SA_DQ41
SA_DQ42
SA_DQ43
SA_DQ44
SA_DQ45
SA_DQ46
SA_DQ47
SA_DQ48
SA_DQ49
SA_DQ50
SA_DQ51
SA_DQ52
SA_DQ53
SA_DQ54
SA_DQ55
SA_DQ56
SA_DQ57
SA_DQ58
SA_DQ59
SA_DQ60
SA_DQ61
SA_DQ62
SA_DQ63
SA_BS0
SA_BS1
V6
SA_BS2
SA_CAS#
SA_RAS#
SA_WE#
SA_CLK0
SA_CLK#0
SA_CKE0
SA_CLK1
SA_CLK#1
SA_CKE1
SA_CLK2
SA_CLK#2
SA_CKE2
SA_CLK3
SA_CLK#3
SA_CKE3
SA_CS#0
SA_CS#1
SA_CS#2
SA_CS#3
SA_ODT0
SA_ODT1
SA_ODT2
SA_ODT3
SA_DQS#0
SA_DQS#1
SA_DQS#2
SA_DQS#3
SA_DQS#4
SA_DQS#5
SA_DQS#6
SA_DQS#7
SA_DQS0
SA_DQS1
SA_DQS2
SA_DQS3
SA_DQS4
SA_DQS5
SA_DQS6
SA_DQS7
DDR SYSTEM MEMORY A
DDR SYSTEM MEMORY A
SA_MA0
SA_MA1
SA_MA2
SA_MA3
SA_MA4
SA_MA5
SA_MA6
SA_MA7
SA_MA8
SA_MA9
SA_MA10
SA_MA11
SA_MA12
SA_MA13
SA_MA14
SA_MA15
http://hobi-elektronika.net
3 OF 9
3 OF 9
AB6
AA6
V9
AA5
AB5
V10
AB4
AA4
W9
AB3
AA3
W10
AK3
AL3
AG1
AH1
AH3
AG3
AG2
AH2
C4
G6
J3
M6
AL6
AM8
AR12
AM15
D4
F6
K3
N6
AL5
AM9
AR11
AM14
AD10
W1
W2
W7
V3
V2
W3
W6
V1
W5
AD8
V4
W4
AF8
V5
V7
M_A_DQS#0
M_A_DQS#1
M_A_DQS#2
M_A_DQS#3
M_A_DQS#4
M_A_DQS#5
M_A_DQS#6
M_A_DQS#7
M_A_DQS0
M_A_DQS1
M_A_DQS2
M_A_DQS3
M_A_DQS4
M_A_DQS5
M_A_DQS6
M_A_DQS7
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15
M_A_DIM0_CLK_DDR0 14
M_A_DIM0_CLK_DDR#0 14
M_A_DIM0_CKE0 14
M_A_DIM0_CLK_DDR1 14
M_A_DIM0_CLK_DDR#1 14
M_A_DIM0_CKE1 14
M_A_DIM0_CS#0 14
M_A_DIM0_CS#1 14
M_A_DIM0_ODT0 14
M_A_DIM0_ODT1 14
M_A_DQS#[7:0] 14
M_A_DQS[7:0] 14
M_A_A[15:0] 14
M_B_DQ[63:0]
M_B_BS0 15
M_B_BS1 15
M_B_BS2 15
M_B_CAS# 15
M_B_RAS# 15
M_B_WE# 15
M_B_DQ0
M_B_DQ1
M_B_DQ2
M_B_DQ3
M_B_DQ4
M_B_DQ5
M_B_DQ6
M_B_DQ7
M_B_DQ8
M_B_DQ9
M_B_DQ10
M_B_DQ11
M_B_DQ12
M_B_DQ13
M_B_DQ14
M_B_DQ15
M_B_DQ16
M_B_DQ17
M_B_DQ18
M_B_DQ19
M_B_DQ20
M_B_DQ21
M_B_DQ22
M_B_DQ23
M_B_DQ24
M_B_DQ25
M_B_DQ26
M_B_DQ27
M_B_DQ28
M_B_DQ29
M_B_DQ30
M_B_DQ31
M_B_DQ32
M_B_DQ33
M_B_DQ34
M_B_DQ35
M_B_DQ36
M_B_DQ37
M_B_DQ38
M_B_DQ39
M_B_DQ40
M_B_DQ41
M_B_DQ42
M_B_DQ43
M_B_DQ44
M_B_DQ45
M_B_DQ46
M_B_DQ47
M_B_DQ48
M_B_DQ49
M_B_DQ50
M_B_DQ51
M_B_DQ52
M_B_DQ53
M_B_DQ54
M_B_DQ55
M_B_DQ56
M_B_DQ57
M_B_DQ58
M_B_DQ59
M_B_DQ60
M_B_DQ61
M_B_DQ62
M_B_DQ63
D10
K10
AM5
AM6
AR3
AP3
AN3
AN2
AN1
AP2
AP5
AN9
AT5
AT6
AP6
AN8
AR6
AR5
AR9
AJ11
AT8
AT9
AH11
AR8
AJ12
AH12
AT11
AN14
AR14
AT14
AT12
AN15
AR15
AT15
AA9
AA7
AA10
AB8
AB9
4 OF 9
CPU1D
CPU1D
SANDY
SANDY
C9
SB_DQ0
A7
SB_DQ1
SB_DQ2
C8
SB_DQ3
A9
SB_DQ4
A8
SB_DQ5
D9
SB_DQ6
D8
SB_DQ7
G4
SB_DQ8
F4
SB_DQ9
F1
SB_DQ10
G1
SB_DQ11
G5
SB_DQ12
F5
SB_DQ13
F2
SB_DQ14
G2
SB_DQ15
J7
SB_DQ16
J8
SB_DQ17
SB_DQ18
K9
SB_DQ19
J9
SB_DQ20
J10
SB_DQ21
K8
SB_DQ22
K7
SB_DQ23
M5
SB_DQ24
N4
SB_DQ25
N2
SB_DQ26
N1
SB_DQ27
M4
SB_DQ28
N5
SB_DQ29
M2
SB_DQ30
M1
SB_DQ31
SB_DQ32
SB_DQ33
SB_DQ34
SB_DQ35
SB_DQ36
SB_DQ37
SB_DQ38
SB_DQ39
SB_DQ40
SB_DQ41
SB_DQ42
SB_DQ43
SB_DQ44
SB_DQ45
SB_DQ46
SB_DQ47
SB_DQ48
SB_DQ49
SB_DQ50
SB_DQ51
SB_DQ52
SB_DQ53
SB_DQ54
R6
SB_DQ55
SB_DQ56
SB_DQ57
SB_DQ58
SB_DQ59
SB_DQ60
SB_DQ61
SB_DQ62
SB_DQ63
SB_BS0
SB_BS1
SB_BS2
SB_CAS#
SB_RAS#
SB_WE#
DDR SYSTEM MEMORY B
DDR SYSTEM MEMORY B
4 OF 9
SB_CLK0
SB_CLK#0
SB_CKE0
SB_CLK1
SB_CLK#1
SB_CKE1
SB_CLK2
SB_CLK#2
SB_CKE2
SB_CLK3
SB_CLK#3
SB_CKE3
SB_CS#0
SB_CS#1
SB_CS#2
SB_CS#3
SB_ODT0
SB_ODT1
SB_ODT2
SB_ODT3
SB_DQS#0
SB_DQS#1
SB_DQS#2
SB_DQS#3
SB_DQS#4
SB_DQS#5
SB_DQS#6
SB_DQS#7
SB_DQS0
SB_DQS1
SB_DQS2
SB_DQS3
SB_DQS4
SB_DQS5
SB_DQS6
SB_DQS7
SB_MA0
SB_MA1
SB_MA2
SB_MA3
SB_MA4
SB_MA5
SB_MA6
SB_MA7
SB_MA8
SB_MA9
SB_MA10
SB_MA11
SB_MA12
SB_MA13
SB_MA14
SB_MA15
AE2
AD2
R9
AE1
AD1
R10
AB2
AA2
T9
AA1
AB1
T10
AD3
AE3
AD6
AE6
AE4
AD4
AD5
AE5
D7
F3
K6
N3
AN5
AP9
AK12
AP15
C7
G3
J6
M3
AN6
AP8
AK11
AP14
AA8
T7
R7
T6
T2
T4
T3
R2
T5
R3
AB7
R1
T1
AB10
R5
R4
M_B_DQS#0
M_B_DQS#1
M_B_DQS#2
M_B_DQS#3
M_B_DQS#4
M_B_DQS#5
M_B_DQS#6
M_B_DQS#7
M_B_DQS0
M_B_DQS1
M_B_DQS2
M_B_DQS3
M_B_DQS4
M_B_DQS5
M_B_DQS6
M_B_DQS7
M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14
M_B_A15
M_B_DIM0_CLK_DDR0 15
M_B_DIM0_CLK_DDR#0 15
M_B_DIM0_CKE0 15
M_B_DIM0_CLK_DDR1 15
M_B_DIM0_CLK_DDR#1 15
M_B_DIM0_CKE1 15
M_B_DIM0_CS#0 15
M_B_DIM0_CS#1 15
M_B_DIM0_ODT0 15
M_B_DIM0_ODT1 15
M_B_DQS#[7:0] 15
M_B_DQS[7:0] 15
M_B_A[15:0] 15
SANDY
SANDY
SANDY
62.10055.421
62.10055.421
2ND = 62.10040.771
2ND = 62.10040.771
A A
5
4
3
SANDY
62.10055.421
62.10055.421
2ND = 62.10040.771
2ND = 62.10040.771
2
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Tuesday, September 07, 2010
Tuesday, September 07, 2010
Tuesday, September 07, 2010
Date: Sheet
Date: Sheet
Date: Sheet
CPU (DDR)
CPU (DDR)
CPU (DDR)
LA470
LA470
LA470
Taipei Hsien 221, Taiwan, R.O.C.
61 0 3
61 0 3
61 0 3
of
of
1
of
SB
SB
SB
5
SSID = CPU
SB_0820
D D
M3 - Processor Generated SO-DIMM VREF_DQ
DY
DY
R708 0R2J- 2-GP
R708 0R2J- 2-GP
1 2
DY
M_VREF_DQ_DIMM0
M_VREF_CA_DIMM0
C C
DY
R709 0R2J- 2-GP
R709 0R2J- 2-GP
1 2
SB: 20100727_SHR
20 mils
TP717 TPAD14-GP TP717 TPAD14-GP
SB_0830
TP715 TPAD14-GP TP715 TPAD14-GP
TP701 TPAD14-GP TP701 TPAD14-GP
TP702 TPAD14-GP TP702 TPAD14-GP
TP703 TPAD14-GP TP703 TPAD14-GP
TP704 TPAD14-GP TP704 TPAD14-GP
TP705 TPAD14-GP TP705 TPAD14-GP
TP706 TPAD14-GP TP706 TPAD14-GP
TP707 TPAD14-GP TP707 TPAD14-GP
TP708 TPAD14-GP TP708 TPAD14-GP
TP709 TPAD14-GP TP709 TPAD14-GP
TP710 TPAD14-GP TP710 TPAD14-GP
TP711 TPAD14-GP TP711 TPAD14-GP
TP712 TPAD14-GP TP712 TPAD14-GP
M_VREF_DQ_DIMM0_C
M_VREF_CA_DIMM0_C
4
1
2 3
H_VCCP_SEL
1
CFG0
1
CFG1
1
CFG2
CFG3
1
CFG4
CFG5
CFG6
CFG7
CFG8
1
CFG9
1
CFG10
1
CFG11
1
CFG12
1
CFG13
1
CFG14
1
CFG15
1
CFG16
1
CFG17
1
RN701
RN701
SRN1KJ-7-GP
SRN1KJ-7-GP
CPU1E
CPU1E
AK28
CFG0
AK29
CFG1
AL26
CFG2
AL27
CFG3
AK26
CFG4
AL29
CFG5
AL30
CFG6
AM31
CFG7
AM32
CFG8
AM30
CFG9
AM28
CFG10
AM26
CFG11
AN28
CFG12
AN31
CFG13
AN26
CFG14
AM27
CFG15
AK31
CFG16
AN29
CFG17
AJ31
RSVD#AJ31
AH31
RSVD#AH31
AJ33
RSVD#AJ33
AH33
RSVD#AH33
AJ26
RSVD#AJ26
B4
RSVD#B4
D1
RSVD#D1
F25
RSVD#F25
F24
RSVD#F24
F23
RSVD#F23
D24
RSVD#D24
G25
RSVD#G25
G24
RSVD#G24
E23
RSVD#E23
D23
RSVD#D23
C30
RSVD#C30
A31
RSVD#A31
B30
RSVD#B30
B29
RSVD#B29
D30
RSVD#D30
B31
RSVD#B31
A30
RSVD#A30
C29
RSVD#C29
J20
RSVD#J20
B18
RSVD#B18
A19
RSVD#A19
J15
RSVD#J15
SANDY
SANDY
62.10055.421
62.10055.421
2ND = 62.10040.771
2ND = 62.10040.771
SANDY
SANDY
4
5 OF 9
5 OF 9
RSVD#L7
RSVD#AG7
RSVD#AE7
RSVD#AK2
RSVD#W8
RSVD#AT26
RSVD#AM33
RSVD#AJ27
RSVD#T8
RSVD#J16
RSVD#H16
RSVD#G16
RSVD#AR35
RSVD#AT34
RSVD#AT33
RSVD#AP35
RSVD#AR34
RSVD#B34
RSVD#A33
RSVD#A34
RSVD#B35
RSVD#C35
RESERVED
RESERVED
RSVD#AJ32
RSVD#AK32
RSVD#AH27
RSVD#AN35
RSVD#AM35
RSVD#AT2
RSVD#AT1
RSVD#AR1
3
http://hobi-elektronika.net
L7
AG7
AE7
AK2
W8
AT26
AM33
AJ27
T8
J16
H16
G16
AR35
AT34
AT33
AP35
AR34
B34
A33
A34
B35
C35
AJ32
AK32
TP713
TP713
TPAD14-GP
TPAD14-GP
1
AH27
AN35
AM35
AT2
AT1
AR1
CLK_XDP_ITP_P
CLK_XDP_ITP_N
TP716 TPAD14-GP TP716 TPAD14-GP
1
TP714 TPAD14-GP TP714 TPAD14-GP
1
SB_0820
2
1
CFG2
B B
CFG5
CFG6
A A
CFG7
CFG4
1 2
R702
R702
1KR2J-1-GP
1KR2J-1-GP
OPS
OPS
1 2
1 2
R701
R701
R704
R704
DY
DY
DY
DY
1KR2J-1-GP
1KR2J-1-GP
1 2
R705
R705
1KR2J-1-GP
1KR2J-1-GP
DY
DY
PEG Static Lane Reversal
CFG2
1 2
R703
R703
1KR2J-1-GP
1KR2J-1-GP
DY
DY
PCIE Port Bifurcation Straps
CFG[6:5]
1KR2J-1-GP
1KR2J-1-GP
PEG DEFER TRAINING
CFG7
5
1: Normal Operation; Lane #
definition matches socket pin map definition
0:Lane Reversed
Display Port Presence Strap
CFG4
1: Disabled; No Physical Display Port
attached to Embedded Display Port
0: Enabled; An external Display Port device is
connected to the Embedded Display Port
11: x16 - Device 1 functions 1 and 2 disabled
10: x8, x8 - Device 1 function 1 enabled ; function 2 disabled
01: Reserved - (Device 1 function 1 disabled ; function 2 enabled)
00: x8,x4,x4 - Device 1 functions 1 and 2 enabled
1: PEG Train immediately following xxRESETB de assertion
0: PEG Wait for BIOS for training
<Core Design>
<Core Design>
<Core Design>
Wistron Corporat ion
Wistron Corporat ion
Wistron Corporat ion
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichi h,
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichi h,
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichi h,
Taipei Hsien 221, Taiw an, R.O.C.
Taipei Hsien 221, Taiw an, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A2
A2
A2
Tuesday, September 07, 2010
Tuesday, September 07, 2010
Tuesday, September 07, 2010
Date: Sheet
Date: Sheet
4
3
2
Date: Sheet
Taipei Hsien 221, Taiw an, R.O.C.
CPU (RESERVED)
CPU (RESERVED)
CPU (RESERVED)
LA470
LA470
LA470
1
71 0 3
71 0 3
71 0 3
SB
SB
SB
of
of
of
5
SSID = CPU
PROCESSOR CORE POWER
D D
C C
B B
A A
VCC_CORE
1 2
1 2
1 2
1 2
53A
1 2
1 2
C801
C801
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
1 2
C815
C815
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
1 2
C816
C816
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
1 2
C837
C837
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
5
C803
C803
C802
C802
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
1 2
C817
C817
C818
C818
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
1 2
C821
C821
C822
C822
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
1 2
C836
C836
C835
C835
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
1 2
1 2
1 2
1 2
1 2
C811
C811
C804
C804
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
1 2
C819
C819
C820
C820
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
1 2
C824
C824
C823
C823
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
1 2
C834
C834
C833
C833
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
1 2
1 2
1 2
C826
C826
C825
C825
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
1 2
C832
C832
C831
C831
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
4
http://hobi-elektronika.net
CPU1F
CPU1F
VCC_CORE
AG35
VCC
AG34
VCC
AG33
VCC
AG32
VCC
AG31
VCC
AG30
VCC
AG29
VCC
AG28
VCC
AG27
VCC
AG26
VCC
AF35
VCC
AF34
VCC
AF33
VCC
AF32
VCC
AF31
VCC
AF30
VCC
AF29
VCC
AF28
VCC
AF27
VCC
AF26
VCC
AD35
VCC
AD34
VCC
AD33
VCC
AD32
VCC
AD31
VCC
AD30
VCC
AD29
VCC
AD28
VCC
AD27
VCC
AD26
VCC
AC35
VCC
AC34
VCC
1 2
C827
C827
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
1 2
C828
C828
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
4
AC33
VCC
AC32
VCC
AC31
VCC
AC30
VCC
AC29
VCC
AC28
VCC
AC27
VCC
AC26
VCC
AA35
VCC
AA34
VCC
AA33
VCC
AA32
VCC
AA31
VCC
AA30
VCC
AA29
VCC
AA28
VCC
AA27
VCC
AA26
VCC
Y35
VCC
Y34
VCC
Y33
VCC
Y32
VCC
Y31
VCC
Y30
VCC
Y29
VCC
Y28
VCC
Y27
VCC
Y26
VCC
V35
VCC
V34
VCC
V33
VCC
V32
VCC
V31
VCC
V30
VCC
V29
VCC
V28
VCC
V27
VCC
V26
VCC
U35
VCC
U34
VCC
U33
VCC
U32
VCC
U31
VCC
U30
VCC
U29
VCC
U28
VCC
U27
VCC
U26
VCC
R35
VCC
R34
VCC
R33
VCC
R32
VCC
R31
VCC
R30
VCC
R29
VCC
R28
VCC
R27
VCC
R26
VCC
P35
VCC
P34
VCC
P33
VCC
P32
VCC
P31
VCC
P30
VCC
P29
VCC
P28
VCC
P27
VCC
P26
VCC
SANDY
SANDY
62.10055.421
62.10055.421
2ND = 62.10040.771
2ND = 62.10040.771
POWER
POWER
SANDY
SANDY
CORE SUPPLY
CORE SUPPLY
3
6 OF 9
6 OF 9
AH13
VCCIO
AH10
VCCIO
AG10
VCCIO
AC10
VCCIO
Y10
VCCIO
U10
VCCIO
P10
VCCIO
L10
VCCIO
J14
VCCIO
J13
VCCIO
J12
VCCIO
J11
VCCIO
H14
VCCIO
H12
VCCIO
H11
VCCIO
G14
VCCIO
G13
VCCIO
G12
VCCIO
F14
VCCIO
F13
VCCIO
F12
VCCIO
F11
VCCIO
E14
VCCIO
E12
VCCIO
E11
VCCIO
D14
VCCIO
D13
VCCIO
D12
VCCIO
D11
VCCIO
C14
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VIDALERT#
VIDSCLK
VIDSOUT
C13
C12
C11
B14
B12
A14
A13
A12
A11
J23
AJ29
AJ30
AJ28
AJ35
AJ34
B10
A10
PEG AND DDR
PEG AND DDR
VCC_SENSE
VSS_SENSE
VCCIO_SENSE
VSSIO_SENSE
SENSE LINES SVID
SENSE LINES SVID
3
H_CPU_SVIDALRT#
H_CPU_SVIDCLK_R
H_CPU_SVIDDAT_R
1 2
1 2
C806
C806
C805
C805
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
1 2
1 2
C813
C813
C812
C812
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
R803 43R2J-GP R803 43R2J-GP
1 2
R805 0R2J-2-GP R805 0R2J-2-GP
1 2
R806 0R2J-2-GP R806 0R2J-2-GP
1 2
VCCIO_SENSE 45
VSSIO_SENSE 45
1 2
1 2
2
1 2
1 2
C807
C807
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
1 2
C814
C814
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
C809
C809
C808
C808
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
1 2
C830
C830
C829
C829
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
R804 need to close to CPU
SB_0819
H_CPU_SVIDDAT_R
VR_SVID_ALERT# 42
H_CPU_SVIDCLK 42
SB_0819
VCC_CORE
R801, R802 need to close to CPU
1 2
R801
R801
100R2F-L1-GP-U
100R2F-L1-GP-U
1 2
R802
R802
100R2F-L1-GP-U
100R2F-L1-GP-U
2
1 2
1 2
C810
C810
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
1 2
1 2
C842
C842
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
R804 130R2F-1-GP R804 130R2F- 1-GP
H_CPU_SVIDDAT 42
1
1D05V_VTT
1 2
1 2
C839
C839
C838
C838
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
1D05V_VTT
1 2
C844
C844
C843
C843
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
1 2
VCCSENSE 42
VSSSENSE 42
<Core Des ign>
<Core Des ign>
<Core Des ign>
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Tuesday, September 07, 2010
Tuesday, September 07, 2010
Tuesday, September 07, 2010
Date: Sheet
Date: Sheet
Date: Sheet
1 2
C840
C840
C841
C841
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
1 2
C845
C845
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
1D05V_VTT
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
CPU (VCC_CORE)
CPU (VCC_CORE)
CPU (VCC_CORE)
LA470
LA470
LA470
1
81 0 3
81 0 3
81 0 3
of
of
of
SB
SB
SB
5
SSID = CPU
4
http://hobi-elektronika.net
3
2
1
Close to CPU
VCC_GFXCORE
VCC_GFXCORE
PROCESSOR VAXG: 24A
D D
C C
B B
1 2
C901
C901
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
1 2
C907
C907
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
1D8V_S0
1 2
C902
C902
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
1 2
C908
C908
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
1 2
1 2
1 2
C903
C903
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
1 2
1 2
C918
C918
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
1 2
C925
C925
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
C904
C904
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
C919
C919
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
PROCESSOR VCCPLL: 1.2A
C923
C923
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
1 2
C905
C905
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
1 2
C920
C920
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
1 2
C922
C922
SC1U10V2KX-1GP
SC1U10V2KX-1GP
1 2
1 2
C906
C906
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
1 2
1 2
C921
C921
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SB_0831
1 2
C924
C924
SC1U10V2KX-1GP
SC1U10V2KX-1GP
RC901
RC901
DY
DY
SC33P50 V2JN-3GP
SC33P50V2JN-3GP
RC902
RC902
DY
DY
SC33P50 V2JN-3GP
SC33P50V2JN-3GP
CPU1G
CPU1G
AT24
VAXG
AT23
VAXG
AT21
VAXG
AT20
VAXG
AT18
VAXG
AT17
VAXG
AR24
VAXG
AR23
VAXG
AR21
VAXG
AR20
VAXG
AR18
VAXG
AR17
VAXG
AP24
VAXG
AP23
VAXG
AP21
VAXG
AP20
VAXG
AP18
VAXG
AP17
VAXG
AN24
VAXG
AN23
VAXG
AN21
VAXG
AN20
VAXG
AN18
VAXG
AN17
VAXG
AM24
VAXG
AM23
VAXG
AM21
VAXG
AM20
VAXG
AM18
VAXG
AM17
VAXG
AL24
VAXG
AL23
VAXG
AL21
VAXG
AL20
VAXG
AL18
VAXG
AL17
VAXG
AK24
VAXG
AK23
VAXG
AK21
VAXG
AK20
VAXG
AK18
VAXG
AK17
VAXG
AJ24
VAXG
AJ23
VAXG
AJ21
VAXG
AJ20
VAXG
AJ18
VAXG
AJ17
VAXG
AH24
VAXG
AH23
VAXG
AH21
VAXG
AH20
VAXG
AH18
VAXG
AH17
VAXG
B6
VCCPLL
A6
VCCPLL
A2
VCCPLL
SANDY
SANDY
62.10055.421
62.10055.421
2ND = 62.10040.771
2ND = 62.10040.771
POWER
POWER
SANDY
SANDY
GRAPHICS
GRAPHICS
1.8V RAIL
1.8V RAIL
7 OF 9
7 OF 9
SM_VREF
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
AK35
AK34
+V_SM_VREF_CNT
AL1
AF7
AF4
AF1
AC7
AC4
AC1
Y7
Y4
Y1
U7
U4
U1
P7
P4
P1
Routing Guideline:
Power from DDR_VREF_S3 and +V_SM_VREF_CNT
should have 10 mils trace width.
VAXG_SENSE
VSSAXG_SENSE
SENSE
LINES
SENSE
LINES
VREF MISC
VREF MISC
PROCESSOR VCCSA: 6A
DDR3 -1.5V RAILS
DDR3 -1.5V RAILS
M27
VCCSA
M26
VCCSA
L26
VCCSA
J26
VCCSA
J25
VCCSA
J24
VCCSA
H26
VCCSA
H25
SA RAIL
SA RAIL
VCCSA
VCCSA_SENSE
FC_C22
VCCSA_VID1
H23
C22
C24
VCCSA_SENSE
H_FC_C22
VCCSA_SEL
VCC_AXG_SENSE 42
VSS_AXG_SENSE 42
PROCESSOR VDDQ: 10A
1 2
1 2
C909
C909
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
1 2
1 2
C916
C916
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
0D85V_S0
1 2
R902
R902
R902 need be close to pin H23.
10R2J-2-GP
10R2J-2-GP
1
2 3
RN901
RN901
SRN1KJ-7-GP
SRN1KJ-7-GP
4
+V_SM_VREF_CNT 37
1 2
C911
C911
C910
C910
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
1 2
C915
C915
C917
C917
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
VCCSA_SENSE 48
H_FC_C22 48
VCCSA_SEL 48
1 2
C912
C912
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
0D85V_S0
1 2
1 2
1 2
C913
C913
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
TC903
TC903
ST330U2VDM-4-GP
ST330U2VDM-4-GP
DY
DY
1D5V_DDR_S0
C914
C914
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
VCC_AXG_SENSE
VSS_AXG_SENSE
1 2
R906
R906
100R2F-L1-GP-U
100R2F-L1-GP-U
1 2
R907
R907
100R2F-L1-GP-U
100R2F-L1-GP-U
A A
5
4
3
2
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Tuesday, September 07, 2010
Tuesday, September 07, 2010
Tuesday, September 07, 2010
Date: Sheet
Date: Sheet
Date: Sheet
CPU (VCC_GFXCORE)
CPU (VCC_GFXCORE)
CPU (VCC_GFXCORE)
LA470
LA470
LA470
Taipei Hsien 221, Taiwan, R.O.C.
91 0 3
91 0 3
91 0 3
of
of
1
of
SB
SB
SB
5
4
3
2
1
SSID = CPU
CPU1H
CPU1H
AT35
VSS
AT32
VSS
AT29
VSS
AT27
VSS
AT25
VSS
AT22
VSS
D D
C C
B B
AT19
AT16
AT13
AT10
AR25
AR22
AR19
AR16
AR13
AR10
AP34
AP31
AP28
AP25
AP22
AP19
AP16
AP13
AP10
AN30
AN27
AN25
AN22
AN19
AN16
AN13
AN10
AM29
AM25
AM22
AM19
AM16
AM13
AM10
AM7
AM4
AM3
AM2
AM1
AL34
AL31
AL28
AL25
AL22
AL19
AL16
AL13
AL10
AK33
AK30
AK27
AK25
AK22
AK19
AK16
AK13
AK10
AJ25
AT7
AT4
AT3
AR7
AR4
AR2
AP7
AP4
AP1
AN7
AN4
AL7
AL4
AL2
AK7
AK4
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
SANDY
SANDY
VSS
VSS
http://hobi-elektronika.net
8 OF 9
8 OF 9
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AJ22
AJ19
AJ16
AJ13
AJ10
AJ7
AJ4
AJ3
AJ2
AJ1
AH35
AH34
AH32
AH30
AH29
AH28
AH26
AH25
AH22
AH19
AH16
AH7
AH4
AG9
AG8
AG4
AF6
AF5
AF3
AF2
AE35
AE34
AE33
AE32
AE31
AE30
AE29
AE28
AE27
AE26
AE9
AD7
AC9
AC8
AC6
AC5
AC3
AC2
AB35
AB34
AB33
AB32
AB31
AB30
AB29
AB28
AB27
AB26
Y9
Y8
Y6
Y5
Y3
Y2
W35
W34
W33
W32
W31
W30
W29
W28
W27
W26
U9
U8
U6
U5
U3
U2
N35
N34
N33
N32
N31
N30
N29
N28
N27
N26
M34
K35
K32
K29
K26
H33
H30
H27
H24
H21
H18
H15
H13
H10
G35
G32
G29
G26
G23
G20
G17
G11
F34
F31
F29
CPU1I
CPU1I
T35
VSS
T34
VSS
T33
VSS
T32
VSS
T31
VSS
T30
VSS
T29
VSS
T28
VSS
T27
VSS
T26
VSS
P9
VSS
P8
VSS
P6
VSS
P5
VSS
P3
VSS
P2
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
L33
VSS
L30
VSS
L27
VSS
L9
VSS
L8
VSS
L6
VSS
L5
VSS
L4
VSS
L3
VSS
L2
VSS
L1
VSS
VSS
VSS
VSS
VSS
J34
VSS
J31
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
H9
VSS
H8
VSS
H7
VSS
H6
VSS
H5
VSS
H4
VSS
H3
VSS
H2
VSS
H1
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
SANDY
SANDY
VSS
VSS
9 OF 9
9 OF 9
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
F22
F19
E30
E27
E24
E21
E18
E15
E13
E10
E9
E8
E7
E6
E5
E4
E3
E2
E1
D35
D32
D29
D26
D20
D17
C34
C31
C28
C27
C25
C23
C10
C1
B22
B19
B17
B15
B13
B11
B9
B8
B7
B5
B3
B2
A35
A32
A29
A26
A23
A20
A3
SANDY
SANDY
62.10055.421
62.10055.421
2ND = 62.10040.771
2ND = 62.10040.771
A A
5
4
3
SANDY
SANDY
62.10055.421
62.10055.421
2ND = 62.10040.771
2ND = 62.10040.771
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Tuesday, September 07, 2010
Tuesday, September 07, 2010
Tuesday, September 07, 2010
Date: Sheet
Date: Sheet
2
Date: Sheet
CPU (VSS)
CPU (VSS)
CPU (VSS)
LA470
LA470
LA470
Taipei Hsien 221, Taiwan, R.O.C.
10 103
10 103
10 103
of
of
1
of
SB
SB
SB
5
4
3
2
1
http://hobi-elektronika.net
D D
C C
B B
A A
5
4
3
2
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Tuesday, September 07, 2010
Tuesday, September 07, 2010
Tuesday, September 07, 2010
Date: Sheet
Date: Sheet
Date: Sheet
XDP
XDP
XDP
LA470
LA470
LA470
Taipei Hsien 221, Taiwan, R.O.C.
11 103
11 103
11 103
of
of
1
of
SB
SB
SB
5
4
3
2
1
http://hobi-elektronika.net
D D
C C
(Blanking)
B B
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
A A
Title
Title
Title
Reserved
Reserved
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A4
A4
A4
Tuesday, September 07, 2010
Tuesday, September 07, 2010
Tuesday, September 07, 2010
Date: Sheet
Date: Sheet
5
4
3
Date: Sheet
2
Reserved
LA470
LA470
LA470
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
SB
SB
12 103
12 103
12 103
of
of
of
1
SB
5
4
3
2
1
http://hobi-elektronika.net
D D
C C
(Blanking)
B B
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
A A
Title
Title
Title
Reserved
Reserved
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A4
A4
A4
Tuesday, September 07, 2010
Tuesday, September 07, 2010
Tuesday, September 07, 2010
Date: Sheet
Date: Sheet
5
4
3
Date: Sheet
2
Reserved
LA470
LA470
LA470
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
SB
SB
13 103
13 103
13 103
of
of
of
1
SB
5
SSID = MEMORY
DDR_VREF_S3
1 2
D D
1 2
DDR_VREF_S3
1 2
1 2
C C
0D75V_S0
B B
A A
R1405
R1405
0R2J-2-GP
0R2J-2-GP
C1423
C1423
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
R1404
R1404
0R2J-2-GP
0R2J-2-GP
C1411
C1411
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
1 2
C1419
C1419
DY
DY
DY
DY
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
M_VREF_CA_DIMM0
1 2
1 2
C1425
C1425
SC2D2U10V3KX-1GP
SC2D2U10V3KX-1GP
M_VREF_DQ_DIMM0
1 2
1 2
C1412
C1412
SC2D2U10V3KX-1GP
SC2D2U10V3KX-1GP
Place these caps
close to VTT1 and
VTT2.
1 2
1 2
C1420
C1420
DY
DY
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
5
C1424
C1424
C1413
C1413
C1421
C1421
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
1 2
DY
DY
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
M_A_A[15:0] 6
M_A_BS2 6
M_A_BS0 6
M_A_BS1 6
M_A_DQ[63:0] 6
1 2
C1422
C1422
C1418
C1418
DY
DY
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
M_A_DQS#[7:0] 6
M_A_DQS[7:0] 6
M_A_DIM0_ODT0 6
M_A_DIM0_ODT1 6
DDR3_DRAMRST# 15,37
0D75V_S0
M_VREF_CA_DIMM0
M_VREF_DQ_DIMM0
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15
M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ4
M_A_DQ5
M_A_DQ6
M_A_DQ7
M_A_DQ8
M_A_DQ9
M_A_DQ10
M_A_DQ11
M_A_DQ12
M_A_DQ13
M_A_DQ14
M_A_DQ15
M_A_DQ16
M_A_DQ17
M_A_DQ18
M_A_DQ19
M_A_DQ20
M_A_DQ21
M_A_DQ22
M_A_DQ23
M_A_DQ24
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQ28
M_A_DQ29
M_A_DQ30
M_A_DQ31
M_A_DQ32
M_A_DQ33
M_A_DQ34
M_A_DQ35
M_A_DQ36
M_A_DQ37
M_A_DQ38
M_A_DQ39
M_A_DQ40
M_A_DQ41
M_A_DQ42
M_A_DQ43
M_A_DQ44
M_A_DQ45
M_A_DQ46
M_A_DQ47
M_A_DQ48
M_A_DQ49
M_A_DQ50
M_A_DQ51
M_A_DQ52
M_A_DQ53
M_A_DQ54
M_A_DQ55
M_A_DQ56
M_A_DQ57
M_A_DQ58
M_A_DQ59
M_A_DQ60
M_A_DQ61
M_A_DQ62
M_A_DQ63
M_A_DQS#0
M_A_DQS#1
M_A_DQS#2
M_A_DQS#3
M_A_DQS#4
M_A_DQS#5
M_A_DQS#6
M_A_DQS#7
M_A_DQS0
M_A_DQS1
M_A_DQS2
M_A_DQS3
M_A_DQS4
M_A_DQS5
M_A_DQS6
M_A_DQS7
4
98
97
96
95
92
91
90
86
89
85
107
84
83
119
80
78
79
109
108
15
17
16
18
21
23
33
35
22
24
34
36
39
41
51
53
40
42
50
52
57
59
67
69
56
58
68
70
129
131
141
143
130
132
140
142
147
149
157
159
146
148
158
160
163
165
175
177
164
166
174
176
181
183
191
193
180
182
192
194
10
27
45
62
135
152
169
186
12
29
47
64
137
154
171
188
116
120
126
30
203
204
2nd = 62.10017.R91
2nd = 62.10017.R91
3rd = 62.10017.V61
3rd = 62.10017.V61
4
1D5V_S3
3
M_A_RAS# 6
M_A_WE# 6
M_A_CAS# 6
M_A_DIM0_CS#0 6
M_A_DIM0_CS#1 6
M_A_DIM0_CKE0 6
M_A_DIM0_CKE1 6
M_A_DIM0_CLK_DDR0 6
M_A_DIM0_CLK_DDR#0 6
M_A_DIM0_CLK_DDR1 6
M_A_DIM0_CLK_DDR#1 6
PCH_SMBDATA 15,20,65,66
PCH_SMBCLK 15,20,65,66
TS#_DIMM0_1 15
3
1 2
C1401
C1401
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
DY
DY
SC2D2U10V3KX-1GP
SC2D2U10V3KX-1GP
DM1
DM1
http://hobi-elektronika.net
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12
A13
A14
A15
A16/BA2
BA0
BA1
5
DQ0
7
DQ1
DQ2
DQ3
4
DQ4
6
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
DQS0#
DQS1#
DQS2#
DQS3#
DQS4#
DQS5#
DQS6#
DQS7#
DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
ODT0
ODT1
VREF_CA
1
VREF_DQ
RESET#
VTT1
VTT2
DDR3-204P-109-GP
DDR3-204P-109-GP
62.10017.X51
62.10017.X51
SB_0819
RAS#
WE#
CAS#
CS0#
CS1#
CKE0
CKE1
CK0#
CK1#
DM0
DM1
DM2
DM3
DM4
DM5
DM6
DM7
SDA
EVENT#
VDDSPD
NC#1
NC#2
NC#/TEST
VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9
VDD10
VDD11
VDD12
VDD13
VDD14
VDD15
VDD16
VDD17
VDD18
NP1
NP2
CK0
CK1
SCL
SA0
SA1
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
NP1
NP2
110
113
115
114
121
73
74
101
103
102
104
11
28
46
63
136
153
170
187
200
202
198
199
197
201
77
122
125
75
76
81
82
87
88
93
94
99
100
105
106
111
112
117
118
123
124
2
3
8
9
13
14
19
20
25
26
31
32
37
38
43
44
48
49
54
55
60
61
65
66
71
72
127
128
133
134
138
139
144
145
150
151
155
156
161
162
167
168
172
173
178
179
184
185
189
190
195
196
205
206
SA0_DIM0
SA1_DIM0
1 2
C1402
C1402
1D5V_S3
3D3V_S0
1 2
TC1401
TC1401
ST330U2VDM-4-GP
ST330U2VDM-4-GP
1 2
2
SODIMM A DECOUPLING
1 2
C1403
C1403
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
1 2
C1414
C1414
C1415
C1415
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
2
1 2
1 2
SA0_DIM0
SA1_DIM0
C1404
C1404
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
C1416
C1416
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
DY
DY
1
Note:
If SA0 DIM0 = 0, SA1_DIM0 = 0
1 2
R1401
R1401
10KR2J-3-GP
10KR2J-3-GP
1 2
SO-DIMMA SPD Address is 0xA0
SO-DIMMA TS Address is 0x30
R1402
R1402
10KR2J-3-GP
10KR2J-3-GP
If SA0 DIM0 = 1, SA1_DIM0 = 0
SO-DIMMA SPD Address is 0xA2
SO-DIMMA TS Address is 0x32
Thermal EVENT
TS#_DIMM0_1
1 2
1 2
1 2
C1406
C1406
C1405
C1405
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
C1417
C1417
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
<Core Design>
<Core Design>
<Core Design>
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
R1403
R1403
1 2
1 2
1 2
C1407
C1407
DY
DY
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
Tuesday, September 07, 2010
Tuesday, September 07, 2010
Tuesday, September 07, 2010
3D3V_S0
10KR2J-3-GP
10KR2J-3-GP
1 2
1 2
C1408
C1408
DY
DY
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
DDR3-SODIMM1
DDR3-SODIMM1
DDR3-SODIMM1
LA470
LA470
LA470
C1410
C1410
C1409
C1409
DY
DY
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsi chih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsi chih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsi chih,
Taipei Hsien 221, Taiwa n, R. O .C.
Taipei Hsien 221, Taiwa n, R. O .C.
Taipei Hsien 221, Taiwa n, R. O .C.
1
of
of
of
14 103
14 103
14 103
SB
SB
SB
5
SSID = MEMORY
M_B_A[15:0] 6
D D
M_B_BS2 6
M_B_BS0 6
M_B_BS1 6
M_B_DQ[63:0] 6
M_VREF_CA_DIMM0
1 2
C1523
C1523
DY
DY
C C
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
B B
A A
0D75V_S0
DY
DY
1 2
C1518
C1518
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
Place these caps
close to VTT1 and
VTT2.
1 2
C1519
C1519
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
5
1 2
1 2
DY
DY
C1524
C1524
SC2D2U10V3KX-1GP
SC2D2U10V3KX-1GP
1 2
C1520
C1520
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
C1522
C1522
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
1 2
C1521
C1521
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
M_B_DIM0_ODT0 6
M_B_DIM0_ODT1 6
M_VREF_CA_DIMM0
M_VREF_DQ_DIMM0
DDR3_DRAMRST# 14,37
M_B_DQS#[7:0] 6
M_B_DQS[7:0] 6
0D75V_S0
4
M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14
M_B_A15
M_B_DQ0
M_B_DQ1
M_B_DQ2
M_B_DQ3
M_B_DQ4
M_B_DQ5
M_B_DQ6
M_B_DQ7
M_B_DQ8
M_B_DQ9
M_B_DQ10
M_B_DQ11
M_B_DQ12
M_B_DQ13
M_B_DQ14
M_B_DQ15
M_B_DQ16
M_B_DQ17
M_B_DQ18
M_B_DQ19
M_B_DQ20
M_B_DQ21
M_B_DQ22
M_B_DQ23
M_B_DQ24
M_B_DQ25
M_B_DQ26
M_B_DQ27
M_B_DQ28
M_B_DQ29
M_B_DQ30
M_B_DQ31
M_B_DQ32
M_B_DQ33
M_B_DQ34
M_B_DQ35
M_B_DQ36
M_B_DQ37
M_B_DQ38
M_B_DQ39
M_B_DQ40
M_B_DQ41
M_B_DQ42
M_B_DQ43
M_B_DQ44
M_B_DQ45
M_B_DQ46
M_B_DQ47
M_B_DQ48
M_B_DQ49
M_B_DQ50
M_B_DQ51
M_B_DQ52
M_B_DQ53
M_B_DQ54
M_B_DQ55
M_B_DQ56
M_B_DQ57
M_B_DQ58
M_B_DQ59
M_B_DQ60
M_B_DQ61
M_B_DQ62
M_B_DQ63
M_B_DQS#0
M_B_DQS#1
M_B_DQS#2
M_B_DQS#3
M_B_DQS#4
M_B_DQS#5
M_B_DQS#6
M_B_DQS#7
M_B_DQS0
M_B_DQS1
M_B_DQS2
M_B_DQS3
M_B_DQS4
M_B_DQS5
M_B_DQS6
M_B_DQS7
4
H = 8mm
2nd = 62.10017.M51
2nd = 62.10017.M51
3rd = 62.10017.V51
3rd = 62.10017.V51
3
DM2
DM2
http://hobi-elektronika.net
98
A0
97
A1
96
A2
95
A3
92
A4
91
A5
90
A6
86
A7
89
A8
85
A9
107
A10/AP
84
A11
83
A12
119
A13
80
A14
78
A15
79
A16/BA2
109
BA0
108
BA1
5
DQ0
7
DQ1
15
DQ2
17
DQ3
4
DQ4
6
DQ5
16
DQ6
18
DQ7
21
DQ8
23
DQ9
33
DQ10
35
DQ11
22
DQ12
24
DQ13
34
DQ14
36
DQ15
39
DQ16
41
DQ17
51
DQ18
53
DQ19
40
DQ20
42
DQ21
50
DQ22
52
DQ23
57
DQ24
59
DQ25
67
DQ26
69
DQ27
56
DQ28
58
DQ29
68
DQ30
70
DQ31
129
DQ32
131
DQ33
141
DQ34
143
DQ35
130
DQ36
132
DQ37
140
DQ38
142
DQ39
147
DQ40
149
DQ41
157
DQ42
159
DQ43
146
DQ44
148
DQ45
158
DQ46
160
DQ47
163
DQ48
165
DQ49
175
DQ50
177
DQ51
164
DQ52
166
DQ53
174
DQ54
176
DQ55
181
DQ56
183
DQ57
191
DQ58
193
DQ59
180
DQ60
182
DQ61
192
DQ62
194
DQ63
10
DQS0#
27
DQS1#
45
DQS2#
62
DQS3#
135
DQS4#
152
DQS5#
169
DQS6#
186
DQS7#
12
DQS0
29
DQS1
47
DQS2
64
DQS3
137
DQS4
154
DQS5
171
DQS6
188
DQS7
116
ODT0
120
ODT1
126
VREF_CA
1
VREF_DQ
30
RESET#
203
VTT1
204
VTT2
DDR3-204P-108-GP
DDR3-204P-108-GP
62.10017.X41
62.10017.X41
NP1
NP2
RAS#
WE#
CAS#
CS0#
CS1#
CKE0
CKE1
CK0
CK0#
CK1
CK1#
DM0
DM1
DM2
DM3
DM4
DM5
DM6
DM7
SDA
SCL
EVENT#
VDDSPD
SA0
SA1
NC#1
NC#2
NC#/TEST
VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9
VDD10
VDD11
VDD12
VDD13
VDD14
VDD15
VDD16
VDD17
VDD18
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
SB_0819
NP1
NP2
110
113
115
114
121
73
74
101
103
102
104
11
28
46
63
136
153
170
187
200
202
198
199
197
201
77
122
125
75
76
81
82
87
88
93
94
99
100
105
106
111
112
117
118
123
124
2
3
8
9
13
14
19
20
25
26
31
32
37
38
43
44
48
49
54
55
60
61
65
66
71
72
127
128
133
134
138
139
144
145
150
151
155
156
161
162
167
168
172
173
178
179
184
185
189
190
195
196
205
206
SA0_DIM1
SA1_DIM1
1D5V_S3
M_B_RAS# 6
M_B_WE# 6
M_B_CAS# 6
M_B_DIM0_CS#0 6
M_B_DIM0_CS#1 6
M_B_DIM0_CKE0 6
M_B_DIM0_CKE1 6
M_B_DIM0_CLK_DDR0 6
M_B_DIM0_CLK_DDR#0 6
M_B_DIM0_CLK_DDR1 6
M_B_DIM0_CLK_DDR#1 6
PCH_SMBDATA 14,20,65,66
PCH_SMBCLK 14,20,65,66
TS#_DIMM0_1 14
3
DY
DY
1 2
C1501
C1501
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
2
3D3V_S0
1 2
R1501
R1501
10KR2J-3-GP
10KR2J-3-GP
SA1_DIM1
SA0_DIM1
1 2
R1502
R1502
10KR2J-3-GP
10KR2J-3-GP
3D3V_S0
1 2
C1502
C1502
SC2D2U10V3KX-1GP
SC2D2U10V3KX-1GP
1D5V_S3
SODIMM B DECOUPLING
DY
DY
1 2
C1503
C1503
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
1 2
C1511
C1511
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
2
DY
DY
1 2
1 2
C1504
C1504
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
1 2
1 2
C1512
C1512
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
1 2
C1505
C1505
C1506
C1506
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
1 2
C1514
C1514
C1513
C1513
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
<Core Design>
<Core Design>
<Core Design>
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Tuesday, September 07, 2010
Tuesday, September 07, 2010
Tuesday, September 07, 2010
Date: Sheet
Date: Sheet
Date: Sheet
Note:
SO-DIMMB SPD Address is 0xA4
SO-DIMMB TS Address is 0x34
SO-DIMMB is placed farther from
the Processor than SO-DIMMA
1 2
1 2
C1508
C1508
C1507
C1507
DY
DY
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
DDR3-SODIMM2
DDR3-SODIMM2
DDR3-SODIMM2
LA470
LA470
LA470
1
1 2
1 2
C1509
C1509
C1510
C1510
DY
DY
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsi chih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsi chih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsi chih,
Taipei Hsien 221, Taiwa n, R. O .C.
Taipei Hsien 221, Taiwa n, R. O .C.
Taipei Hsien 221, Taiwa n, R. O .C.
15 103
15 103
15 103
1
SB
SB
SB
of
of
of
5
4
3
2
1
http://hobi-elektronika.net
D D
C C
B B
A A
5
(Blanking)
4
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
DDR3-SODIMM2
DDR3-SODIMM2
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A4
A4
A4
Tuesday, September 07, 2010
Tuesday, September 07, 2010
Tuesday, September 07, 2010
Date: Sheet
Date: Sheet
3
Date: Sheet
2
DDR3-SODIMM2
LA470
LA470
LA470
16 103
16 103
16 103
SB
SB
of
of
of
1
SB
5
4
3
2
1
http://hobi-elektronika.net
D D
3D3V_S0
RN1701
RN1701
1
2 3
SRN2K2J-1-GP
SRN2K2J-1-GP
RN1702
RN1702
1
2 3
SRN100KJ- 6- G P
SRN100KJ-6-GP
C C
4
4
L_CTRL_DATA
L_CTRL_CLK
L_BKLT_EN
LVDS_VDD_EN
Place near PCH
1 2
R1701
R1701
2K37R2F-GP
2K37R2F-GP
L_BKLT_EN 49
LVDS_VDD_EN 49
L_BKLT_CTRL 49
LVDS_DDC_CLK_R 49
LVDS_DDC_DATA_R 49
TP1701 TPAD14-GP TP1701 TPAD14-GP
LVDSA_CLK# 49
LVDSA_CLK 49
LVDSA_DATA0# 49
LVDSA_DATA1# 49
LVDSA_DATA2# 49
LVDSA_DATA0 49
LVDSA_DATA1 49
LVDSA_DATA2 49
LVDS_DDC_CLK_R
LVDS_DDC_DATA_R
L_CTRL_CLK
L_CTRL_DATA
LVDS_IBG
LVDS_VBG
1
Close to PCH side
CRT_BLUE
CRT_GREEN
CRT_RED
B B
678
RN1705
RN1705
SRN150F-1-GP
SRN150F-1-GP
123
4 5
CRT_BLUE 50
CRT_GREEN 50
CRT_RED 50
CRT_DDC_CLK 50
CRT_DDC_DATA 50
CRT_HSYNC 50
CRT_VSYNC 50
DAC_IREF_R
1 2
R1702
R1702
1KR2D-1-GP
1KR2D-1-GP
PCH1D
PCH1D
J47
L_BKLTEN
M45
L_VDD_EN
P45
L_BKLTCTL
T40
L_DDC_CLK
K47
L_DDC_DATA
T45
L_CTRL_CLK
P39
L_CTRL_DATA
AF37
LVD_IBG
AF36
LVD_VBG
AE48
LVD_VREFH
AE47
LVD_VREFL
AK39
LVDSA_CLK#
AK40
LVDSA_CLK
AN48
LVDSA_DATA#0
AM47
LVDSA_DATA#1
AK47
LVDSA_DATA#2
AJ48
LVDSA_DATA#3
AN47
LVDSA_DATA0
AM49
LVDSA_DATA1
AK49
LVDSA_DATA2
AJ47
LVDSA_DATA3
AF40
LVDSB_CLK#
AF39
LVDSB_CLK
AH45
LVDSB_DATA#0
AH47
LVDSB_DATA#1
AF49
LVDSB_DATA#2
AF45
LVDSB_DATA#3
AH43
LVDSB_DATA0
AH49
LVDSB_DATA1
AF47
LVDSB_DATA2
AF43
LVDSB_DATA3
N48
CRT_BLUE
P49
CRT_GREEN
T49
CRT_RED
T39
CRT_DDC_CLK
M40
CRT_DDC_DATA
M47
CRT_HSYNC
M49
CRT_VSYNC
T43
DAC_IREF
T42
CRT_IRTN
COUGAR-GP-U2-NF
COUGAR-GP-U2-NF
Cougar
Cougar
Point
Point
LVDS
LVDS
CRT
CRT
Digital Display Interface
Digital Display Interface
4 OF 10
4 OF 10
SDVO_TVCLKINN
SDVO_TVCLKINP
SDVO_STALLN
SDVO_STALLP
SDVO_INTN
SDVO_INTP
SDVO_CTRLCLK
SDVO_CTRLDATA
DDPB_AUXN
DDPB_AUXP
DDPB_HPD
DDPB_0N
DDPB_0P
DDPB_1N
DDPB_1P
DDPB_2N
DDPB_2P
DDPB_3N
DDPB_3P
DDPC_CTRLCLK
DDPC_CTRLDATA
DDPC_AUXN
DDPC_AUXP
DDPC_HPD
DDPC_0N
DDPC_0P
DDPC_1N
DDPC_1P
DDPC_2N
DDPC_2P
DDPC_3N
DDPC_3P
DDPD_CTRLCLK
DDPD_CTRLDATA
DDPD_AUXN
DDPD_AUXP
DDPD_HPD
DDPD_0N
DDPD_0P
DDPD_1N
DDPD_1P
DDPD_2N
DDPD_2P
DDPD_3N
DDPD_3P
AP43
AP45
AM42
AM40
AP39
AP40
P38
M39
AT49
AT47
AT40
AV42
AV40
AV45
AV46
AU48
AU47
AV47
AV49
P46
P42
AP47
AP49
AT38
AY47
AY49
AY43
AY45
BA47
BA48
BB47
BB49
M43
M36
AT45
AT43
BH41
BB43
BB45
BF44
BE44
BF42
BE42
BJ42
BG42
DDBP_DATA2#
DDBP_DATA2
DDBP_DATA1#
DDBP_DATA1
DDBP_DATA0#
DDBP_DATA0
DDBP_CLK#
DDBP_CLK
SB_0823
Impedance:90 ohm
3D3V_S0
4
RN1706
RN1706
SRN2K2J-1-GP
SRN2K2J-1-GP
1
2 3
C1701 SCD1U10V2KX-5GP C1701 SCD1U10V2KX-5GP
1 2
C1702 SCD1U10V2KX-5GP C1702 SCD1U10V2KX-5GP
1 2
C1703 SCD1U10V2KX-5GP C1703 SCD1U10V2KX-5GP
1 2
C1704 SCD1U10V2KX-5GP C1704 SCD1U10V2KX-5GP
1 2
C1705 SCD1U10V2KX-5GP C1705 SCD1U10V2KX-5GP
1 2
C1706 SCD1U10V2KX-5GP C1706 SCD1U10V2KX-5GP
1 2
C1707 SCD1U10V2KX-5GP C1707 SCD1U10V2KX-5GP
1 2
C1708 SCD1U10V2KX-5GP C1708 SCD1U10V2KX-5GP
1 2
DDI Port B Detect:(SDVO_CTRL_ DATA)
1: Port B detected
0: Port B not detected
PCH_HDMI_CLK 51
PCH_HDMI_DATA 51
HDMI_PCH_DET 51
HDMI_DATA2_R# 51
HDMI_DATA2_R 51
HDMI_DATA1_R# 51
HDMI_DATA1_R 51
HDMI_DATA0_R# 51
HDMI_DATA0_R 51
HDMI_CLK_R# 51
HDMI_CLK_R 51
Impedance:100 ohm
A A
5
4
3
2
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Tuesday, September 07, 2010
Tuesday, September 07, 2010
Tuesday, September 07, 2010
Date: Sheet
Date: Sheet
Date: Sheet
PCH (LVDS/CRT/DDI)
PCH (LVDS/CRT/DDI)
PCH (LVDS/CRT/DDI)
LA470
LA470
LA470
Taipei Hsien 221, Taiwan, R.O.C.
17 103
17 103
17 103
of
of
1
of
SB
SB
SB
5
4
3
2
1
SSID = PCH
RN1801
D D
3D3V_S0
INT_PIRQH#
INT_PIRQB#
INT_PIRQF#
R1801 4K7R2J-2-GP
R1801 4K7R2J-2-GP
A16 swap override Strap/Top-Block
Swap Override jumper
PCI_GNT#3 Low = A16 swap
C C
GNT1#/GPIO51 BOOT BIOS Location SATA1GP/GPIO19
0 0 LPC
0 1 Reserved
B B
A A
PLT_RST# 1,27,31,36,65,66,71,83,97
RN1801
1
2
3
4
5 6
SRN8K2J-2-GP-U
SRN8K2J-2-GP-U
1 2
DY
DY
override/Top-Block
Swap Override enabled
High = Default
R1802
R1802
1 2
DY
DY
1KR2J-1-GP
1KR2J-1-GP
R1803
R1803
1 2
DY
DY
1KR2J-1-GP
1KR2J-1-GP
BOOT BIOS Strap
1 1
3D3V_S0
1 2
R1816
R1816
DY
DY
1 2
DY
DY
100KR2J- 1-GP
100KR2J-1-GP
5
10
INT_PIRQD#
9
INT_PIRQE#
8
INT_PIRQC# INT_PIRQA#
7
INT_PIRQG#
PCI_GNT3#
BBS_BIT1
BBS_BIT0
Reserved 0 1
SPI(Default)
U1801
U1801
VCC
DY
DY
Y
GND
74LVC1G08GW-1-GP
74LVC1G08GW-1-GP
73.01G08.L04
73.01G08.L04
R1807
R1807
1 2
B
A
0R2J-2-GP
0R2J-2-GP
5
4
C1801
C1801
SC220P50V2KX-3GP
SC220P50V2KX-3GP
3D3V_S0
RN1803
DGPU_HOLD_RST#
DGPU_PWR_EN#
BBS_BIT0 21
DGPU_HOLD_RST# 83
TP1805 TPAD14-GP TP1805 TPAD14-GP
DGPU_PWR_EN# 93
dGPU_LED 49
DBC_EN 49
SB_0728
1 2
C1802
C1802
DY
DY
SC220P50V2KX-3GP
SC220P50V2KX-3GP
TP1804 TPAD14-GP TP1804 TPAD14-GP
DY
DY
4
SB_0809
CLK_PCI_LPC 65,71
CLK_PCI_KBC 27
1
2
3
PCI_PLTRST#
DGPU_PWR_EN#
DGPU_PWM_SELECT#
1
TP1807 TPAD14-GP TP1807 TPAD14-GP
R1804 22R2J-2-GP R1804 22R2J-2-GP
1 2
R1805 22R2J-2-GP R1805 22R2J-2-GP
1 2
R1806 22R2J-2-GP R1806 22R2J-2-GP
1 2
EC1802
EC1802
EC1801
EC1801
DY
DY
1 2
1 2
SC4D7P50V2CN-1GP
SC4D7P50V2CN-1GP
RN1803
1
2 3
SRN10KJ-5-GP
SRN10KJ-5-GP
3D3V_S0
R1814
R1814
8K2R2J-3-GP
8K2R2J-3-GP
DY
DY
1 2
1
TP1801 TPAD14-GP TP1801 TPAD14-GP
R1812
R1812
1 2
1 2
SC4D7P50V2CN-1GP
SC4D7P50V2CN-1GP
R1810
R1810
1
TP1802 TPAD14-GP TP1802 TPAD14-GP
0R0402-PAD
0R0402-PAD
0R0402-PAD
0R0402-PAD
4
1
1
CLK_PCI_LPC_R
CLK_PCI_FB_R
CLK_PCI_KBC_R
INT_PIRQA#
INT_PIRQB#
INT_PIRQC#
INT_PIRQD#
DGPU_SELECT#
BBS_BIT1
PCI_GNT3#
INT_PIRQE#
INT_PIRQF#
INT_PIRQG#
INT_PIRQH#
PCI_PME#
PCI_PLTRST#
3D3V_S5
PCH1E
PCH1E
BG26
BJ26
BH25
BJ16
BG16
AH38
AH37
AK43
AK45
C18
N30
H3
AH12
AM4
AM5
Y13
K24
L24
AB46
AB45
B21
M20
AY16
BG46
BE28
BC30
BE32
BJ32
BC28
BE30
BF32
BG32
AV26
BB26
AU28
AY30
AU26
AY26
AV28
AW30
K40
K38
H38
G38
C46
C44
E40
D47
E42
F46
G42
G40
C42
D44
K10
C6
H49
H43
J48
K42
H40
COUGAR-GP-U2-NF
COUGAR-GP-U2-NF
Cougar
Cougar
TP1
Point
Point
TP2
TP3
TP4
TP5
TP6
TP7
TP8
TP9
TP10
TP11
TP12
TP13
TP14
TP15
TP16
TP17
TP18
TP19
TP20
TP21
TP22
TP23
TP24
TP25
TP26
TP27
TP28
TP29
TP30
TP31
TP32
TP33
TP34
TP35
TP36
TP37
TP38
TP39
TP40
PIRQA#
PIRQB#
PIRQC#
PIRQD#
REQ1#/GPIO50
REQ2#/GPIO52
REQ3#/GPIO54
GNT1#/GPIO51
GNT2#/GPIO53
GNT3#/GPIO55
PIRQE#/GPIO2
PIRQF#/GPIO3
PIRQG#/GPIO4
PIRQH#/GPIO5
PME#
PLTRST#
CLKOUT_PCI0
CLKOUT_PCI1
CLKOUT_PCI2
CLKOUT_PCI3
CLKOUT_PCI4
USB_OC#2_3
PCH_GPIO14
3
RSVD
RSVD
PCI
PCI
1
2
3
4
5 6
NVRAM
NVRAM
USB
USB
RN1802
RN1802
SRN10KJ-L3-GP
SRN10KJ-L3-GP
5 OF 10
5 OF 10
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
DF_TVS
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
USBP0N
USBP0P
USBP1N
USBP1P
USBP2N
USBP2P
USBP3N
USBP3P
USBP4N
USBP4P
USBP5N
USBP5P
USBP6N
USBP6P
USBP7N
USBP7P
USBP8N
USBP8P
USBP9N
USBP9P
USBP10N
USBP10P
USBP11N
USBP11P
USBP12N
USBP12P
USBP13N
USBP13P
USBRBIAS#
USBRBIAS
OC0#/GPIO59
OC1#/GPIO40
OC2#/GPIO41
OC3#/GPIO42
OC4#/GPIO43
OC5#/GPIO9
OC6#/GPIO10
OC7#/GPIO14
10
9
8
7
AY7
AV7
AU3
BG4
AT10
BC8
AU2
AT4
AT3
AT1
AY3
AT5
AV3
AV1
BB1
BA3
BB5
BB3
BB7
BE8
BD4
BF6
NV_ALE
AV5
NV_CLE
AY1
NV_RCOMP
AV10
AT8
AY5
BA2
AT12
BF3
C24
A24
C25
B25
C26
A26
K28
H28
E28
D28
C28
A28
C29
B29
N28
M28
L30
K30
G30
E30
C30
A30
L32
K32
G32
E32
C32
A32
USB_RBIAS
C33
B33
USB_OC#0_1
A14
USB_OC#2_3
K20
USB_OC#4_5
B17
USB_OC#6_7
C16
USB_OC#8_9
L16
USB_OC#10_11
A16
USB_OC#12_13
D14
PCH_GPIO14
C14
OC[3:0]# for Device 29 (Ports 0-7)
OC[7:4]# for Device 26 (Ports 8-13)
USB_OC#12_13
USB_OC#8_9 USB_OC#6_7
USB_OC#10_11 USB_OC#0_1
USB_OC#4_5
3D3V_S5
TP1806 TPAD14-GP TP1806 TPAD14-GP
1
TP1803 TPAD14-GP TP1803 TPAD14-GP
1
1 2
R1811
R1811
22D6R2F-L1-GP
22D6R2F-L1-GP
2
USB_PN1 82
USB_PP1 82
USB_PN2 64
USB_PP2 64
USB_PN3 63
USB_PP3 63
USB_PN4 66
USB_PP4 66
USB_PN5 82
USB_PP5 82
USB_PN8 57
USB_PP8 57
USB_PN9 82
USB_PP9 82
USB_PN10 82
USB_PP10 82
USB_PN11 65
USB_PP11 65
USB_PN12 49
USB_PP12 49
USB_OC#0_1 61
USB_OC#8_9 57,61 CLK_PCI_FB 20
USB_OC#10_11 61
USB_OC#12_13 61
<Cor e De s i gn>
<Cor e De s i gn>
<Cor e De s i gn>
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet
Date: Sheet
http://hobi-elektronika.net
SB_0816
NV_CLE
DMI & FDI Termination Voltage
NV_CLE
USB Table
Pair
0
1
2
3
4
5
6
7
8
9
10
11
12
13
PCH (PCI/USB/NVRAM)
PCH (PCI/USB/NVRAM)
PCH (PCI/USB/NVRAM)
LA470
LA470
Tuesday, September 07, 2010
Tuesday, September 07, 2010
Tuesday, September 07, 2010
LA470
+V_NVRAM_VCCQ
1 2
R1808
R1808
2K2R2J-2-GP
2K2R2J-2-GP
R1809
R1809
1 2
1KR2J-1-GP
1KR2J-1-GP
H_SNB_IVB# 5
Set to Vss when LOW
Set to Vcc when HIGH
Device
X
USB Ext. port 1 (HS)
Fingerprint
BLUETOOTH
Mini Card2 (WWAN)
CARD READER
X
X
SB Ext. port 4 / E-SATA /USB CHARGE
USB Ext. port 2
USB Ext. port 3
Mini Card1 (WLAN)
CAMERA
X
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
SB
SB
18 103
18 103
18 103
1
of
of
of
SB
5
4
3
2
1
SSID = PCH
Signal Routing Guideline:
D D
DMI_ZCOMP keep W=4 mils and
routing length less than 500
mils.
DMI_IRCOMP keep W=4 mils and
routing length less than 500
mils.
1D05V_VTT
R1901 49D9R2F-GP R1901 49D9R2F-GP
R1902 750R2F-GP R1902 750R2F-GP
SYS_PWROK
R1926
XDP_DBRESET# 5,11
S0_PWR_GOOD 27,36
PM_PWRBTN# 11,27,97
DY
DY
SYS_PWROK 11,36,37
RUNPWROK 36,45,46,47
3D3V_S5
R1926
R1904
R1904
3D3V_S0
5
PWROK
1 2
RN1901
RN1901
8
7
6
SRN10KJ-6-GP
SRN10KJ-6-GP
R1921 10KR2J-3-GP R1921 10KR2J-3-GP
R1922 10KR2J-3-GP
R1922 10KR2J-3-GP
DY
DY
R1920 10KR2J-3-GP R1920 10KR2J-3-GP
R1908 10KR2J-3-GP R1908 10KR2J-3-GP
1 2
10KR2J-3-GP
10KR2J-3-GP
C C
B B
A A
1 2
100KR2J-1-GP
100KR2J-1-GP
PM_DRAM_PWRGD 5,37
SUS_PWR_ACK 27
AC_PRESENT 27
DMI_RXN[3:0] 4
DMI_RXP[3:0] 4
DMI_TXN[3:0] 4
1 2
1 2
R1924
R1924
0R2J-2-GP
0R2J-2-GP
1
2
3
4 5
1 2
1 2
1 2
DMI_TXP[3:0] 4
DMI_RXN0 4
DMI_RXN1 4
DMI_RXN2 4
DMI_RXN3 4
DMI_RXP0 4
DMI_RXP1 4
DMI_RXP2 4
DMI_RXP3 4
DMI_TXN0 4
DMI_TXN1 4
DMI_TXN2 4
DMI_TXN3 4
DMI_TXP0 4
DMI_TXP1 4
DMI_TXP2 4
DMI_TXP3 4
R1903
R1903
0R0402-PAD
0R0402-PAD
DY
DY
R1925 0R2J-2-GP
R1925 0R2J-2-GP
1 2
1 2
PWROK
R1907
R1907
1 2
DY
DY
BATLOW#
PM_RI#
AC_PRESENT
SUS_PWR_ACK
PCIE_WAKE#
PM_PWRBTN#
PM_SLP_LAN#
DMI_COMP_R
RBIAS_CPY
SUSACK# SUS_PWR_ACK
1 2
R1905
R1905
10KR2J-3-GP
10KR2J-3-GP
R1923
R1923
1 2
0R2J-2-GP
0R2J-2-GP
DY
DY
R1906 0R2J-2-GP R1906 0R2J-2-GP
1 2
MEPWROK
0R2J-2-GP
0R2J-2-GP
PM_RSMRST#
BATLOW#
PM_RI#
SYS_RESET#
PCH1C
PCH1C
BC24
DMI0RXN
BE20
DMI1RXN
BG18
DMI2RXN
BG20
DMI3RXN
BE24
DMI0RXP
BC20
DMI1RXP
BJ18
DMI2RXP
BJ20
DMI3RXP
AW24
DMI0TXN
AW20
DMI1TXN
BB18
DMI2TXN
AV18
DMI3TXN
AY24
DMI0TXP
AY20
DMI1TXP
AY18
DMI2TXP
AU18
DMI3TXP
BJ24
DMI_ZCOMP
BG25
DMI_IRCOMP
BH21
DMI2RBIAS
C12
SUSACK#
K3
SYS_RESET#
P12
SYS_PWROK
L22
PWROK
L10
APWROK
B13
DRAMPWROK
C21
RSMRST#
K16
SUSWARN#/SUSPWRDNACK/GPIO30
E20
PWRBTN#
H20
ACPRESENT/GPIO31
E10
BATLOW#/GPIO72
A10
RI#
COUGAR-GP-U2-NF
COUGAR-GP-U2-NF
This signal has an internal pull-up resistor
1 2
PM_RSMRST#
4
http://hobi-elektronika.net
3 OF 10
3 OF 10
BJ14
Cougar
Cougar
Point
Point
DMI
DMI
System Power Management
System Power Management
3D3V_AUX_S5
FDI_RXN0
FDI_RXN1
FDI_RXN2
FDI_RXN3
FDI_RXN4
FDI_RXN5
FDI_RXN6
FDI_RXN7
FDI_RXP0
FDI_RXP1
FDI_RXP2
FDI_RXP3
FDI_RXP4
FDI_RXP5
FDI_RXP6
FDI
FDI
FDI_RXP7
FDI_INT
FDI_FSYNC0
FDI_FSYNC1
FDI_LSYNC0
FDI_LSYNC1
DSWVRMEN
DPWROK
CLKRUN#/GPIO32
SUS_STAT#/GPIO61
SUSCLK/GPIO62
SLP_S5#/GPIO63
SLP_S4#
SLP_S3#
SLP_SUS#
PMSYNCH
SLP_LAN#/GPIO29
R1909
R1909
100KR2J-1-GP
100KR2J-1-GP
R1916
R1916
10KR2J-3-GP
10KR2J-3-GP
1 2
3V_5V_POK_#
2nd = 84.DM601.03F
2nd = 84.DM601.03F
WAKE#
SLP_A#
1 2
5
6
AY14
BE14
BH13
BC12
BJ12
BG10
BG9
BG14
BB14
BF14
BG13
BE12
BG12
BJ10
BH9
AW16
AV12
BC10
AV14
BB10
A18
E22
B9
N3
G8
N14
D10
H4
F4
G10
G16
AP14
K14
Q1901
Q1901
3 4
2
1
2N7002KDW-GP
2N7002KDW-GP
84.2N702.A3F
84.2N702.A3F
DSWODVREN
PCH_DPWROK
PM_SUS_STAT#
SUS_CLK
PM_SLP_S5#
SLP_S4#_R
SLP_S3#_R
PM_SLP_A#
PM_SLP_SUS#
H_PM_SYNC
PM_SLP_LAN#
PM_RSMRST#
3
FDI_TXN[7:0] 4
FDI_TXP[7:0] 4
FDI_TXN0 4
FDI_TXN1 4
FDI_TXN2 4
FDI_TXN3 4
FDI_TXN4 4
FDI_TXN5 4
FDI_TXN6 4
FDI_TXN7 4
FDI_TXP0 4
FDI_TXP1 4
FDI_TXP2 4
FDI_TXP3 4
FDI_TXP4 4
FDI_TXP5 4
FDI_TXP6 4
FDI_TXP7 4
FDI_INT 4
FDI_FSYNC0 4
FDI_FSYNC1 4
FDI_LSYNC0 4
FDI_LSYNC1 4
DY
DY
1
1
1
1
1
R1912
R1912
1 2
1KR2J-1-GP
1KR2J-1-GP
R1910 0R2J-2-GP R1910 0R2J-2-GP
1 2
R1911 10KR2J-3-GP
R1911 10KR2J-3-GP
1 2
PCIE_WAKE# 31,65,66
PM_CLKRUN# 27
TP1901 TPAD14-GP TP1901 TPAD14-GP
R1913 0R2J-2-GP R1913 0R2J-2-GP
1 2
TP1902 TPAD14-GP TP1902 TPAD14-GP
R1914 0R2J-2-GP R1914 0R2J-2-GP
1 2
R1915 0R2J-2-GP R1915 0R2J-2-GP
1 2
TP1903TPAD14-GP TP1903TPAD14-GP
TP1904TPAD14-GP TP1904TPAD14-GP
H_PM_SYNC 5
TP1905TPAD14-GP TP1905TPAD14-GP
SLP_S3#_R
RSMRST#_KBC 27
3V_5V_POK 41
For platforms not supporting Deep S4/S5
1.VccSUS3_3 and VccDSW3_3 will rise at the same time (connected on board)
2.DPWROK and RSMRST# will rise at the same time (connected on board)
3.SLP_SUS# and SUSACK# are left as ‘no connect’
4.SUSWARN# used as SUSPWRDNACK/GPIO30
PM_RSMRST#
1
TP1906 TPAD14-GP TP1906 TPAD14-GP
RTC_AUX_S5
PCH_SUSCLK_KBC 27
PM_SLP_S4# 27,46
PM_SLP_S3# 27,36,37,47,92
2
DSWODVREN - On Die DSW VR Enable
HIGH Enabled (DEFAULT)
LOW Disabled
RTC_AUX_S5
R1917 330KR2J-L1-GP R1917 330KR2J-L1-GP
1 2
DSWODVREN
PM_CLKRUN#
<Core Design>
<Core Design>
<Core Design>
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Tuesday, September 07, 2010
Tuesday, September 07, 2010
Tuesday, September 07, 2010
Date: Sheet
Date: Sheet
Date: Sheet
R1918 330KR2J-L1-GP
R1918 330KR2J-L1-GP
1 2
DY
DY
R1919 8K2R2J-3-GP R1919 8K2R2J-3-GP
1 2
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
PCH (DM I/FDI/PM)
PCH (DM I/FDI/PM)
PCH (DM I/FDI/PM)
LA470
LA470
LA470
19 103
19 103
19 103
1
of
of
of
3D3V_S0
SB
SB
SB
5
SSID = PCH
PCIE_RXN1
PCIE_RXP1
PCIE_TXN1_C
PCIE_TXP1_C
PCIE_TXN2_C
PCIE_TXP2_C
PCIE_TXN4_C
PCIE_TXP4_C
CLK_PCIE_WWAN#
CLK_PCIE_WWAN
CLK_PCIE_WWAN_REQ#
PCIE_CLK_RQ2#
USB3_PEGB_CLKREQ#
PCIE_CLK_REQ5#
PEG_B_CLKRQ#
PCIE_CLK_REQ6#
CLK_PCIE_NEW_REQ#
PCIE_CLK_XDP_N
1
PCIE_CLK_XDP_P
1
1 2
1 2
1 2
1 2
SB_0820
1
1
1
1
1
1
TP2010 TPAD14-GP TP2010 TPAD14-GP
TP2011 TPAD14-GP TP2011 TPAD14-GP
TP2004 TPAD14-GP TP2004 TPAD14-GP
TP2005 TPAD14-GP TP2005 TPAD14-GP
TP2006 TPAD14-GP TP2006 TPAD14-GP
D D
C C
PCIE_RXN2 65
PCIE_RXP2 65
PCIE_TXN2 65
PCIE_TXP2 65
PCIE_RXN4 31
PCIE_RXP4 31
PCIE_TXN4 31
PCIE_TXP4 31
:/$1&/.
/$1&/.
B B
3D3V_S0
PCIECLKRQ1# and PCIECLKRQ2#
support S0 power only
A A
PCIE_CLK_LAN_REQ# 31
SB_0728
RN2018
RN2018
1
2 3
SRN10KJ- 5- G P
SRN10KJ-5-GP
TP2007 TPAD14-GP TP2007 TPAD14-GP
C2001 SCD1U10V2KX-5GP C2001 SCD1U10V2KX-5GP
C2002 SCD1U10V2KX-5GP C2002 SCD1U10V2KX-5GP
C2005 SCD1U10V2KX-5GP C2005 SCD1U10V2KX-5GP
C2006 SCD1U10V2KX-5GP C2006 SCD1U10V2KX-5GP
TP2008 TPAD14-GP TP2008 TPAD14-GP
TP2009 TPAD14-GP TP2009 TPAD14-GP
CLK_PCIE_WLAN# 65
CLK_PCIE_WLAN 65
CLK_PCIE_WLAN_REQ# 65
CLK_PCIE_LAN# 31
CLK_PCIE_LAN 31
PCIE_CLK_RQ2#
4
CLK_PCIE_WLAN_REQ# CLK_PCIE_WWAN_REQ#
5
4
PCH1B
PCH1B
BG34
PERN1
BJ34
PERP1
AV32
PETN1
AU32
PETP1
BE34
PERN2
BF34
PERP2
BB32
PETN2
AY32
PETP2
BG36
PERN3
BJ36
PERP3
AV34
PETN3
AU34
PETP3
BF36
PERN4
BE36
PERP4
AY34
PETN4
BB34
PETP4
BG37
PERN5
BH37
PERP5
AY36
PETN5
BB36
PETP5
BJ38
PERN6
BG38
PERP6
AU36
PETN6
AV36
PETP6
BG40
PERN7
BJ40
PERP7
AY40
PETN7
BB40
PETP7
BE38
PERN8
BC38
PERP8
AW38
PETN8
AY38
PETP8
Y40
CLKOUT_PCIE0N
Y39
CLKOUT_PCIE0P
J2
PCIECLKRQ0#/GPIO73
AB49
CLKOUT_PCIE1N
AB47
CLKOUT_PCIE1P
M1
PCIECLKRQ1#/GPIO18
AA48
CLKOUT_PCIE2N
AA47
CLKOUT_PCIE2P
V10
PCIECLKRQ2#/GPIO20
Y37
CLKOUT_PCIE3N
Y36
CLKOUT_PCIE3P
A8
PCIECLKRQ3#/GPIO25
Y43
CLKOUT_PCIE4N
Y45
CLKOUT_PCIE4P
L12
PCIECLKRQ4#/GPIO26
V45
CLKOUT_PCIE5N
V46
CLKOUT_PCIE5P
L14
PCIECLKRQ5#/GPIO44
AB42
CLKOUT_PEG_B_N
AB40
CLKOUT_PEG_B_P
E6
PEG_B_CLKRQ#/GPIO56
V40
CLKOUT_PCIE6N
V42
CLKOUT_PCIE6P
T13
PCIECLKRQ6#/GPIO45
V38
CLKOUT_PCIE7N
V37
CLKOUT_PCIE7P
K12
PCIECLKRQ7#/GPIO46
AK14
CLKOUT_ITPXDP_N
AK13
CLKOUT_ITPXDP_P
COUGAR-GP-U2-NF
COUGAR-GP-U2-NF
4
3
http://hobi-elektronika.net
2 OF 10
2 OF 10
Cougar
Cougar
Point
Point
W-WAN
WLAN
LAN
PCI-E*
PCI-E*
CLOCKS
CLOCKS
SMBALERT#/GPIO11
SMBDATA
SML0ALERT#/GPIO60
SMBUS Controller
SMBUS Controller
SML1ALERT#/PCHHOT#/GPIO74
Link
Link
FLEX CLOCKS
FLEX CLOCKS
SML0DATA
SML1CLK/GPIO58
SML1DATA/GPIO75
CL_DATA1
CL_RST1#
PEG_A_CLKRQ#/GPIO47
CLKOUT_PEG_A_N
CLKOUT_PEG_A_P
CLKOUT_DMI_N
CLKOUT_DMI_P
CLKOUT_DP_N
CLKOUT_DP_P
CLKIN_DMI_N
CLKIN_DMI_P
CLKIN_GND1_N
CLKIN_GND1_P
CLKIN_DOT_96N
CLKIN_DOT_96P
CLKIN_SATA_N
CLKIN_SATA_P
REFCLK14IN
CLKIN_PCILOOPBACK
XTAL25_IN
XTAL25_OUT
XCLK_RCOMP
CLKOUTFLEX0/GPIO64
CLKOUTFLEX1/GPIO65
CLKOUTFLEX2/GPIO66
CLKOUTFLEX3/GPIO67
SMBCLK
SML0CLK
CL_CLK1
E12
H14
C9
A12
C8
G12
C13
E14
M16
M7
T11
P10
M10
AB37
AB38
AV22
AU22
AM12
AM13
BF18
BE18
BJ30
BG30
G24
E24
AK7
AK5
K45
H45
V47
V49
Y47
K43
F47
H47
K49
3
PEG_CLKREQ#_R
JTAG_TCK
CLK_48_USB30
LAN_25M
DGPU_PRSNT#
EC_SWI#
SMB_CLK
SMB_DATA
DRAMRST_CNTRL_PCH
SML0_CLK
SML0_DATA
PCH_GPIO74
SML1_CLK
SML1_DATA
CL_CLK
1
TP2001 TPAD14-GP TP2001 TPAD14-GP
CL_DATA
1
TP2002 TPAD14-GP TP2002 TPAD14-GP
CL_RST#
1
TP2003 TPAD14-GP TP2003 TPAD14-GP
OPS
OPS
RN2017 SRN0J-6-GP
CLKOUT_DP_N
CLKOUT_DP_P
CLK_BUF_EXP_N
CLK_BUF_EXP_P
CLK_BUF_CPYCLK_N
CLK_BUF_CPYCLK_P
CLK_BUF_DOT96_N
CLK_BUF_DOT96_P
CLK_BUF_CKSSCD_N
CLK_BUF_CKSSCD_P
CLK_BUF_REF14
CLK_PCI_FB
XTAL25_IN
XTAL25_OUT
XCLK_RCOMP
RN2017 SRN0J-6-GP
90D9R2F- 1-GP
90D9R2F-1-GP
1 2
R2007
R2007
22R2J-2- GP
22R2J-2-GP
1 2
R2001
R2001
22R2J-2- GP
22R2J-2-GP
1 2
R2002
R2002
22R2J-2- GP
22R2J-2-GP
1 2
R2015
R2015
1 2
1
2 3
RN2008 SRN10KJ-5-GP RN2008 SRN10KJ-5-GP
EC_SWI# 27
DRAMRST_CNTRL_PCH 37
SML1_CLK 27
SML1_DATA 27
R2003
R2003
0R2J-2-GP
0R2J-2-GP
4
DY
DY
1
4
2 3
XTAL25_IN
XTAL25_OUT
CLK_PCI_FB 18
PL 10K FOR Integrated CLOCK GEN mode.
CLK_BUF_REF14
CLK_BUF_CKSSCD_N
CLK_BUF_CKSSCD_P
+VCCDIFFCLKN
DY
DY
VGA_CLK_27M_NSS 86
DY
DY
VGA_CLK_27M_SS 86
DY
DY
LAN_XI 31
2
PEG_CLKREQ#_R
SMB_DATA
SMB_CLK
PEG_CLKREQ#83
CLK_PCIE_VGA# 83
CLK_PCIE_VGA 83
CLK_EXP_N 5
CLK_EXP_P 5
CLK_DP_N_R 5
CLK_DP_P_R 5
1
TP2012 TPAD14-GP TP2012 TPAD14-GP
1
TP2013 TPAD14-GP TP2013 TPAD14-GP
2
3D3V_S5
1 2
R2004
R2004
10KR2J-3-GP
10KR2J-3-GP
1 2
R2005
R2005
DY
DY
10KR2J-3-GP
10KR2J-3-GP
3D3V_S0
RN2009
RN2009
1
2
3
4
5 6
SRN10KJ-L3-GP
SRN10KJ-L3-GP
need very close to PCH
RN2007
RN2007
2 3
1
SRN2K2J-1-GP
SRN2K2J-1-GP
6
5
XTAL25_IN
XTAL25_IN
XTAL25_OUT
3D3V_S03D3V_S0
10
CLK_BUF_EXP_N
9
CLK_BUF_EXP_P
8
CLK_BUF_DOT96_N
7
CLK_BUF_DOT96_P
<Core Design>
<Core Design>
<Core Design>
Title
Title
Title
PCH (PCI-E/SMBUS/CLOCK/CL)
PCH (PCI-E/SMBUS/CLOCK/CL)
PCH (PCI-E/SMBUS/CLOCK/CL)
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet
Date: Sheet
SMB_CLK
SMB_DATA
SML0_DATA
SML0_CLK
SML1_CLK
SML1_DATA
PCIE_CLK_REQ6#
PCH_GPIO74
DRAMRST_CNTRL_PCH
4
2nd = 84.DM601.03F
2nd = 84.DM601.03F
84.2N702.A3F
84.2N702.A3F
2N7002KDW-GP
2N7002KDW-GP
1
2
3 4
Q2001
Q2001
1 2
DY
DY
R2008 0R2J-2-GP
R2008 0R2J-2-GP
R2008 and C2008 CO-LAY
R2006
R2006
1M1R2J-GP
1M1R2J-GP
1 2
1 2
1 2
R2012
R2012
R2013
R2013
UMA
UMA
10KR2J- 3-GP
10KR2J-3-GP
10KR2J- 3-GP
10KR2J-3-GP
1 2
1 2
R2010
R2010
R2011
R2011
DY
DY
OPS
OPS
10KR2J- 3-GP
10KR2J-3-GP
10KR2J- 3-GP
10KR2J-3-GP
Tuesday, September 07, 2010
Tuesday, September 07, 2010
Tuesday, September 07, 2010
2nd = 82.30020.791
2nd = 82.30020.791
3rd = 82.30020.A31
3rd = 82.30020.A31
UMA_DIS#
DGPU_PRSNT#
3D3V_S5
LA470
LA470
LA470
1
1
4
2 3
2 3
1
4
2 3
1
4
1
4
2 3
R2009
R2009
1 2
1KR2J-1-GP
1KR2J-1-GP
SB_0817
PCH_SMBDATA 14,15,65,66
PCH_SMBCLK 14,15,65,66
C2008
C2008
SC12P50V2JN-3GP
SC12P50V2JN-3GP
X2001
X2001
XTAL-25MHZ-102-GP
XTAL-25MHZ-102-GP
1 2
82.30020.851
82.30020.851
UMA_DISCRETE#
UMA: 1 1
DIS :0 1
SG(PX) : 0 0
Optimus(Muxless) : 1 0
RN2001
RN2001
1
2
3
4 5
SRN10KJ- 6- G P
SRN10KJ-6-GP
RN2002
RN2002
1
2
3
4 5
SRN10KJ- 6- G P
SRN10KJ-6-GP
R2014
R2014
1 2
10KR2J-3-GP
10KR2J-3-GP
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
SC12P50V2JN-3GP
SC12P50V2JN-3GP
UMA_DIS# 22
8
7
PCIE_CLK_LAN_REQ#
6
USB3_PEGB_CLKREQ#
8
PCIE_CLK_REQ5#
7
CLK_PCIE_NEW_REQ#
6
PEG_B_CLKRQ#
EC_SWI#
1
C2007
C2007
20 103
20 103
20 103
3D3V_S5
RN2003
RN2003
SRN2K2J-1-GP
SRN2K2J-1-GP
RN2004
RN2004
SRN2K2J-1-GP
SRN2K2J-1-GP
RN2005
RN2005
SRN2K2J-1-GP
SRN2K2J-1-GP
RN2006
RN2006
SRN10KJ-5-GP
SRN10KJ-5-GP
CRB: 1K
CHKLT: 10K
1 2
1 2
of
of
of
SB_0728
SB
SB
SB
5
4
3
2
1
SSID = PCH
RTC_X1
1 2
R2101 10MR2J-L-GP R2101 10MR2J-L-GP
D D
1 2
SC12P50V2JN-3GP
SC12P50V2JN-3GP
C2101
C2101
HDA_CODEC_SYNC 29
HDA_CODEC_SDOUT 29
HDA_CODEC_RST# 29
HDA_CODEC_BITCLK 29
C C
X2101
X2101
1
2 3
X-32D768KHZ-34GPU
X-32D768KHZ-34GPU
4
RTC_X2
1 2
C2102
C2102
SC12P50V2JN-3GP
SC12P50V2JN-3GP
SHR_V1.4
SB_0809
R2122 33R2J-2-GP R2122 33R2J-2-GP
R2123 33R2J-2-GP R2123 33R2J-2-GP
RN2102
RN2102
1
2 3
SRN33J-5-GP- U
SRN33J-5-GP-U
1 2
1 2
4
HDA_RST#
HDA_BITCLK
RTC_AUX_S5
RN2104
RN2104
HDA_SYNC
HDA_SDOUT
2 3
1
4
SRN20KJ-GP-U
SRN20KJ-GP-U
C2104
C2104
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
1 2
1 2
Flash Descriptor Security Overide
Low = Default
High = Enable
No Reboot Strap
Low = Default
High = No Reboot
HDA_SYNC
HDA_SDOUT
HDA_SPKR
HDA_SDOUT
HDA_SPKR
+3VS_+1.5VS_HDA_IO
DY
DY
R2102 1KR2J-1-GP
R2102 1KR2J-1-GP
1 2
3D3V_S0
B B
NO REBOOT STRAP
DY
DY
R2106 1KR2J-1-GP
R2106 1KR2J-1-GP
1 2
+3VS_+1.5VS_HDA_IO
R2103 1KR2J-1-GP R2103 1KR2J-1-GP
This signal has a weak internal pull down.
On Die PLL VR is supplied by 1.5V when
sampled high, 1.8 V when sampled low.
Needs to be pulled High for Huron River platform.
co-operate with R2310
1 2
PLL ODVR VOLTAGE
HDA_SYNC
Low = 1.8V (Default)
High = 1.5V
http://hobi-elektronika.net
INTVRMEN- Integrated SUS
C2103
C2103
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
2 1
G2101
G2101
GAP-OPEN
GAP-OPEN
ME_UNLOCK 27
1.05V VRM Enable
High - Enable internal VRs
Low - Enable external VRs
RTC_AUX_S5
HDA_SPKR 29
HDA_SDIN0 29
R2107 1KR2J-1-GP R2107 1KR2J-1-GP
1 2
SPI_CLK_R 27,60
SPI_CS0#_R 27,60
SPI_SI_R 27,60
SPI_SO_R 27,60
1M1R2J-GP
1M1R2J-GP
R2104
R2104
1 2
1 2
R2105
R2105
330KR2F-L-GP
330KR2F-L-GP
HDA_SDOUT
TP2105 TPAD14-GP TP2105 TPAD14-GP
TP2101 TPAD14-GP TP2101 TPAD14-GP
1
TP2102 TPAD14-GP TP2102 TPAD14-GP
1
TP2103 TPAD14-GP TP2103 TPAD14-GP
1
TP2104 TPAD14-GP TP2104 TPAD14-GP
1
1 2
R2108 0R2J-2-GP R2108 0R2J-2-GP
1 2
R2109 0R2J-2-GP R2109 0R2J-2-GP
1 2
R2110 0R2J-2-GP R2110 0R2J-2-GP
RTC_X1
RTC_X2
RTC_RST#
SRTC_RST#
SM_INTRUDER#
PCH_INTVRMEN
HDA_BITCLK
HDA_SYNC
HDA_RST#
PCH_GPIO33
1
PCH_JTAG_TCK_BUF
PCH_JTAG_TMS
PCH_JTAG_TDI
PCH_JTAG_TDO
PCH_SPI_CLK
PCH_SPI_CS0#
PCH_SPI_SI
PCH1A
PCH1A
A20
RTCX1
C20
RTCX2
D20
RTCRST#
G22
SRTCRST#
K22
INTRUDER#
C17
INTVRMEN
N34
HDA_BCLK
L34
HDA_SYNC
T10
SPKR
K34
HDA_RST#
E34
HDA_SDIN0
G34
HDA_SDIN1
C34
HDA_SDIN2
A34
HDA_SDIN3
A36
HDA_SDO
C36
HDA_DOCK_EN#/GPIO33
N32
HDA_DOCK_RST#/GPIO13
J3
JTAG_TCK
H7
JTAG_TMS
K5
JTAG_TDI
H1
JTAG_TDO
T3
SPI_CLK
Y14
SPI_CS0#
T1
SPI_CS1#
V4
SPI_MOSI
U3
SPI_MISO
COUGAR-GP-U2-NF
COUGAR-GP-U2-NF
Cougar
Cougar
Point
Point
RTC IHDA
RTC IHDA
JTAG
JTAG
SPI
SPI
1 OF 10
1 OF 10
FWH0/LAD0
FWH1/LAD1
FWH2/LAD2
FWH3/LAD3
LPC
LPC
FWH4/LFRAME#
LDRQ0#
LDRQ1#/GPIO23
SERIRQ
SATA0RXN
SATA0RXP
SATA0TXN
SATA0TXP
SATA1RXN
SATA1RXP
SATA 6G
SATA 6G
SATA1TXN
SATA1TXP
SATA2RXN
SATA2RXP
SATA2TXN
SATA2TXP
SATA3RXN
SATA3RXP
SATA3TXN
SATA3TXP
SATA4RXN
SATA4RXP
SATA4TXN
SATA
SATA
SATA4TXP
SATA5RXN
SATA5RXP
SATA5TXN
SATA5TXP
SATAICOMPO
SATAICOMPI
SATA3RCOMPO
SATA3COMPI
SATA3RBIAS
SATALED#
SATA0GP/GPIO21
SATA1GP/GPIO19
C38
A38
B37
C37
D36
E36
K36
V5
AM3
AM1
AP7
AP5
AM10
AM8
AP11
AP10
AD7
AD5
AH5
AH4
AB8
AB10
AF3
AF1
Y7
Y5
AD3
AD1
Y3
Y1
AB3
AB1
Y11
Y10
AB12
AB13
AH1
P3
V14
P1
LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3
SATA_TXN0_C
SATA_TXP0_C
SATA_TXN1_C
SATA_TXP1_C
SATA_TXN4_C
SATA_TXP4_C
SATA_TXN5_C
SATA_TXP5_C
SATA_DET#0
BBS_BIT0
LPC_AD[0..3]
LPC_FRAME# 27,65,71
APS_LED_R 68
INT_SERIRQ 27
C2105 SCD01U16V2KX-3GP C2105 SCD01U16V2KX-3GP
1 2
C2106
C2106
1 2
C2112 SCD01U16V2KX-3GP C2112 SCD01U16V2KX-3GP
1 2
C2111
C2111
1 2
LPC_AD[0..3] 27,65,71
SCD01U16V2KX-3GP
SCD01U16V2KX-3GP
SCD01U16V2KX-3GP
SCD01U16V2KX-3GP
SATA_RXN0_C 56
SATA_RXP0_C 56
SATA_TXN0 56
SATA_TXP0 56
SATA_RXN1_C 66
SATA_RXP1_C 66
SATA_TXN1 66
SATA_TXP1 66
Move Cap close to Device or Connector.
SATA_RXN4_C 56
C2109 SCD01U16V2KX-3GP C2109 SCD01U16V2KX-3GP
1 2
C2110 SCD01U16V2KX-3GP C2110 SCD01U16V2KX-3GP
1 2
C2107 SCD01U16V2KX-3GP C2107 SCD01U16V2KX-3GP
1 2
C2108 SCD01U16V2KX-3GP C2108 SCD01U16V2KX-3GP
1 2
SATA_COMP
SATA3_COMP
RBIAS_SATA3
SATA_LED#
INT_SERIRQ
SATA_DET#0
R2112 37D4R2F-GP R2112 37D4R2F-GP
R2113 49D9R2F-GP R2113 49D9R2F-GP
R2114 806R2F-GP R2114 806R2F-GP
SATA_LED# 68
BBS_BIT0 18
RN2103
RN2103
1
2
3
4 5
SRN10KJ- 6- G P
SRN10KJ-6-GP
1 2
1 2
1 2
8
7
6
SB_0902
3D3V_S0
SATA_RXP4_C 56
SATA_TXN4 56
SATA_TXP4 56
SATA_RXN5_C 57
SATA_RXP5_C 57
SATA_TXN5 57
SATA_TXP5 57
1D05V_VTT
1D05V_VTT
HDD1
SATA
SSD
ODD
ESATA
SB_0817
A A
PCH_JTAG_TCK_BUF
5
4
R2121
R2121
1 2
4K7R2J-2-GP
4K7R2J-2-GP
PCH_GPIO33
3
R2125
R2125
1 2
1KR2J-1-GP
1KR2J-1-GP
DY
DY
2
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
PCH (SPI/RTC/LPC/SATA/IHDA)
PCH (SPI/RTC/LPC/SATA/IHDA)
PCH (SPI/RTC/LPC/SATA/IHDA)
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Tuesday, September 07, 2010
Tuesday, September 07, 2010
Tuesday, September 07, 2010
Date: Sheet
Date: Sheet
Date: Sheet
LA470
LA470
LA470
Taipei Hsien 221, Taiwan, R.O.C.
21 103
21 103
21 103
of
of
1
of
SB
SB
SB
5
4
3
2
1
3D3V_S0
Note:
For PCH debug with XDP, need to NO STUFF R2218
SATA_ODD_PRSNT# 56
Color_Engine# 49
SB_0728
NC_FP_DET#
1 2
R2220
R2220
10KR2J-3-GP
10KR2J-3-GP
3D3V_S0
2G
2G
1G_512M
1G_512M
3D3V_S0
R2224
R2224
10KR2J-3-GP
10KR2J-3-GP
1 2
PCH_TEMP_ALERT#
R2225
R2225
DY
DY
10KR2J-3-GP
10KR2J-3-GP
1 2
8
7
6
8
7
6
RN2205
RN2205
1
2
3
4 5
SRN10KJ- 6- G P
SRN10KJ-6-GP
R2201
R2201
1 2
1KR2J-1-GP
1KR2J-1-GP
R2221
R2221
1 2
10KR2J-3-GP
10KR2J-3-GP
R2226
R2226
1 2
10KR2J-3-GP
10KR2J-3-GP
SATA_ODD_PRSNT#
H_RCIN#
3D3V_S0
3D3V_S5
8
7
6
20100625 V1.2
20100705
R2202 200KR2F-L-GP R2202 200KR2F-L-GP
1 2
3D3V_S0
RN2203
RN2203
1
4
D D
GPIO27 has a weak[20K] internal pull up.
To enable on-die PLL Voltage regurator,
should not place external pull down.
C C
B B
2 3
SRN10KJ-5-GP
SRN10KJ-5-GP
PCH_GPIO27 PCH_GPIO27
R2223
R2223
DY
DY
10KR2J-3-GP
10KR2J-3-GP
1 2
PSW_CLR#
DGPU_HPD_INTR#
EC_SMI#
MFG_MODE
S_GPIO
EC_SCI#
PCH_GPIO22
PCH_GPIO48
PCH_GPIO12
USB3_PWR_ON
PCH_GPIO15
PCH_GPIO24
RN2201
RN2201
1
2
3
4 5
SRN10KJ- 6- G P
SRN10KJ-6-GP
RN2202
RN2202
1
2
3
4 5
SRN10KJ- 6- G P
SRN10KJ- 6-GP
1 2
R2227 10KR2J-3-GP R2227 10KR2J-3-GP
20100625 V1.2
PLL_ODVR_EN
A A
5
SSID = PCH
S_GPIO GPIO0
TPAD14-GP
TPAD14-GP
TPAD14-GP
TPAD14-GP
GAP-OPEN
GAP-OPEN
SB_0811
SHR_V1.5
1 2
1 2
R2216
R2216
R2214
R2214
1G
1G
10KR2J-3-GP
10KR2J-3-GP
10KR2J-3-GP
10KR2J-3-GP
1 2
1 2
R2215
R2215
R2217
R2217
2G_512M
2G_512M
10KR2J-3-GP
10KR2J-3-GP
10KR2J-3-GP
10KR2J-3-GP
4
http://hobi-elektronika.net
PCH1F
PCH1F
R2218
R2218
1 2
100R2J-2-GP
100R2J-2-GP
EC_SMI#
DGPU_HPD_INTR# H_A20GATE
0R2J-2-GP
0R2J-2-GP
0R2J-2-GP
0R2J-2-GP
TP2209
TP2209
TPAD14-GP
TPAD14-GP
TP2210 TPAD14-GP TP2210 TPAD14-GP
TP2211 TPAD14-GP TP2211 TPAD14-GP
TP2212 TPAD14-GP TP2212 TPAD14-GP
EC_SCI#
ICC_EN#
PCH_GPIO12
PCH_GPIO15
PCH_GPIO16
DGPU_PWROK
PCH_GPIO22
PCH_GPIO24
1
PCH_GPIO27
PLL_ODVR_EN
PSW_CLR#
NC_FP_DET#
1
DMI_OVRVLTG
FDI_OVRVLTG
MFG_MODE
GFX_CRB_DET
PCH_GPIO48
PCH_TEMP_ALERT#
1
USB3_PWR_ON
TP2205
TP2205
1
TP AD14-GP
TPAD14-GP
TP2206
TP2206
1
1
1
1
EC_SCI# 27
1 2
DGPU_PWROK 92,93
1 2
2 1
G2201
G2201
R2213
R2213
R2228
R2228
TP2202
TP2202
TP2204
TP2204
TPAD14-GP
TPAD14-GP
[VRAM_SIZE1:VRAM_SIZE2]
LL=512M / HL=1G / LH=2G
VRAM_SIZE1
VRAM_SIZE2
T7
BMBUSY#/GPIO0
A42
TACH1/GPIO1
H36
TACH2/GPIO6
E38
TACH3/GPIO7
C10
GPIO8
C4
LAN_PHY_PWR_CTRL/GPIO12
G2
GPIO15
U2
SATA4GP/GPIO16
D40
TACH0/GPIO17
T5
SCLOCK/GPIO22
E8
GPIO24/MEM_LED
E16
GPIO27
P8
GPIO28
K1
STP_PCI#/GPIO34
K4
GPIO35
V8
SATA2GP/GPIO36
M5
SATA3GP/GPIO37
N2
SLOAD/GPIO38
M3
SDATAOUT0/GPIO39
V13
SDATAOUT1/GPIO48
V3
SATA5GP/GPIO49
D6
GPIO57
A4
NCTF_VSS#A4
A44
NCTF_VSS#A44
A45
NCTF_VSS#A45
A46
NCTF_VSS#A46
A5
NCTF_VSS#A5
A6
NCTF_VSS#A6
B3
NCTF_VSS#B3
B47
NCTF_VSS#B47
BD1
NCTF_VSS#BD1
BD49
NCTF_VSS#BD49
BE1
NCTF_VSS#BE1
BE49
NCTF_VSS#BE49
BF1
NCTF_VSS#BF1
BF49
NCTF_VSS#BF49
COUGAR-GP-U2-NF
COUGAR-GP-U2-NF
Cougar
Cougar
Point
Point
GPIO
GPIO
CPU/MISC
CPU/MISC
NCTF_VSS#BG2
NCTF_VSS#BG48
NCTF_VSS#BH47
NCTF_VSS#BJ44
NCTF_VSS#BJ45
NCTF_VSS#BJ46
NCTF
NCTF
NCTF TEST PIN:
NCTF TEST PIN:
D1,D49,E1,E49,F1,F49
D1,D49,E1,E49,F1,F49
A4,A44,A45,A46,A5,A6,B3,B47,BD1,BD49,BE1,BE49,BF1,BF49
A4,A44,A45,A46,A5,A6,B3,B47,BD1,BD49,BE1,BE49,BF1,BF49
BG2,BG48,BH3,BH47,BJ4,BJ44,BJ45,BJ46,BJ5,BJ6,C2,C48
BG2,BG48,BH3,BH47,BJ4,BJ44,BJ45,BJ46,BJ5,BJ6,C2,C48
PLL ON DIE VR ENABLE
NOTE:This signal has a weak internal
pull-up 20K
ENABLED -- HIGH (R2212 UNSTUFFED) DEFAULT
DISABLED -- LOW (R2212 STUFFED)
PLL_ODVR_EN
3
6 OF 10
6 OF 10
TACH4/GPIO68
TACH5/GPIO69
TACH6/GPIO70
TACH7/GPIO71
A20GATE
PECI
RCIN#
PROCPWRGD
THRMTRIP#
INIT3_3V#
TS_VSS1
TS_VSS2
TS_VSS3
TS_VSS4
NC_1
NCTF_VSS#BH3
NCTF_VSS#BJ4
NCTF_VSS#BJ5
NCTF_VSS#BJ6
NCTF_VSS#C2
NCTF_VSS#C48
NCTF_VSS#D1
NCTF_VSS#D49
NCTF_VSS#E1
NCTF_VSS#E49
NCTF_VSS#F1
NCTF_VSS#F49
1 2
DY
DY
R2212
R2212
C40
B41
C41
A40
P4
AU16
P5
AY11
AY10
T14
AH8
AK11
AH10
AK10
P37
BG2
BG48
BH3
BH47
BJ4
BJ44
BJ45
BJ46
BJ5
BJ6
C2
C48
D1
D49
E1
E49
F1
F49
UMA_DIS#
VRAM_SIZE1
VRAM_SIZE2
H_PECI_R
PCH_THERMTRIP_R
INIT3_3V#
TS_VSS
3D3V_S0
TP2207
TP2207
1
TPAD14-GP
TPAD14-GP
TP2208
TP2208
1
TPAD14-GP
TPAD14-GP
3D3V_S0
ICC_EN#
1KR2J-1-GP
1KR2J-1-GP
R2219
R2219
1 2
0R0402-PAD
0R0402-PAD
1 2
DY
DY
FDI_OVRVLTG
1 2
1 2
R2209
R2209
10KR2J-3-GP
10KR2J-3-GP
DY
DY
DMI_OVRVLTG
1 2
R2210
R2210
10KR2J-3-GP
10KR2J-3-GP
R2211
R2211
1 2
SATA_ODD_PWRGT 56
UMA_DIS# 20
H_A20GATE 27
R2203
R2203
1 2
DY
DY
H_RCIN# 27
H_CPUPWRGD 5,11,36,97
R2204 390R2J-1-GP R2204 390R2J-1-GP
1 2
TP2201
TP2201
TPAD14-GP
1
R2207
R2207
10KR2J-3-GP
10KR2J-3-GP
R2208
R2208
10KR2J-3-GP
10KR2J-3-GP
TPAD14-GP
TS Signal Disable Guideline:
TS_VSS1, TS_VSS2, TS_VSS3 and TS_VSS4
should not float on the motherboard. They should
be tied to GND directly.
FDI TERMINATION VOLTAGE OVERRIDE
GPIO37
(FDI_OVRVLTG)
DMI TERMINATION VOLTAGE OVERRIDE
GPIO36
(DMI_OVRVLTG)
Integrated Clock Enable functionality is achieved
via soft-strap. The default is integrated clock
enable.
Integrated Clock Chip Enable
ICC_EN#
1KR2J-1-GP
1KR2J-1-GP
GPIO8 has a weak[20K] internal pull up.
Integrated Clock Enable functionality is achieved
via soft-strap. The default is integrated clock
enable.
2
INTERNAL GFX EXTERNAL GFX
R2205 DY 10K
R2206 100K DY
3D3V_S0
1 2
R2205
R2205
10KR2J-3-GP
10KR2J-3-GP
DY
DY
GFX_CRB_DET
R2222
R2222
DY
DY
56R2J-4-GP
56R2J-4-GP
1 2
1 2
R2206
R2206
100KR2J-1-GP
100KR2J-1-GP
0R2J-2-GP
0R2J-2-GP
H_PECI 5,27
H_THERMTRIP# 5,36
PCH_THERMTRIP_R
LOW - Tx, Rx terminated to same voltage
(DC Coupling Model DEFAULT)
LOW - Tx, Rx terminated to same voltage
(DC Coupling Model DEFAULT)
HIGH (R2211 DY)- DISABLED [DEFAULT]
LOW (R2211)- ENABLED
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Tuesday, September 07, 2010
Tuesday, September 07, 2010
Tuesday, September 07, 2010
Date: Sheet
Date: Sheet
Date: Sheet
PCH (GPIO/CPU)
PCH (GPIO/CPU)
PCH (GPIO/CPU)
LA470
LA470
LA470
Taipei Hsien 221, Taiwan, R.O.C.
22 103
22 103
22 103
of
of
1
of
1D05V_VTT
SB
SB
SB
5
4
3
2
1
SSID = PCH
D D
C C
20100625 V1.2
1D05V_VTT
L2302
L2302
1 2
IND-1UH-100-GP
IND-1UH-100-GP
B B
DY
DY
DY
DY
(10uFx1_0603)
(1uF x4)
VCCAPLLEXP
1 2
6A
1D05V_VTT
(1uFx3)
1D05V_VTT
2.925A(Total current of VCCIO)
1 2
C2305
C2305
C2324
C2324
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
0.266A (Totally VCC3_3 current)
0.159A(Totally current of VCCVRM)
0.042A (Totally current of VCCDMI)
1.3A
1 2
C2301
C2301
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
1 2
C2306
C2306
SC1U6D3V2KX-GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC1U6D3V2KX-GP
(0.1uF x1)
1D5V_S0_1D8V_S0
1 2
C2302
C2302
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
TP2301 TPAD14-GP TP2301 TPAD14-GP
1 2
C2307
C2307
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
TP2302 TPAD14-GP TP2302 TPAD14-GP
1D05V_VTT
1 2
C2303
C2303
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
1D05V_VTT
VCCAPLLEXP
1
(10uF x1)
1 2
C2308
C2308
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
3D3V_S0
1 2
R2302 0R3J-0-U-GP R2302 0R3J-0-U-GP
VCCFDIPLL
1
+1.05VS_VCC_DMI
1 2
C2304
C2304
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
1 2
C2309
C2309
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
1 2
C2310
C2310
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
VCCAFDI_VRM
http://hobi-elektronika.net
7 OF 10
PCH1G
PCH1G
AA23
VCCCORE
AC23
VCCCORE
AD21
VCCCORE
AD23
VCCCORE
AF21
VCCCORE
AF23
VCCCORE
AG21
VCCCORE
AG23
VCCCORE
AG24
VCCCORE
AG26
VCCCORE
AG27
VCCCORE
AG29
VCCCORE
AJ23
VCCCORE
AJ26
VCCCORE
AJ27
VCCCORE
AJ29
VCCCORE
AJ31
VCCCORE
AN19
VCCIO
BJ22
VCCAPLLEXP
AN16
VCCIO
AN17
VCCIO
AN21
VCCIO
AN26
VCCIO
AN27
VCCIO
AP21
VCCIO
AP23
VCCIO
AP24
VCCIO
AP26
VCCIO
AT24
VCCIO
AN33
VCCIO
AN34
VCCIO
BH29
VCC3_3
AP16
VCCVRM
BG6
VCCAFDIPLL
AP17
VCCIO
AU20
VCCDMI
COUGAR-GP-U2-NF
COUGAR-GP-U2-NF
POWER
POWER
Cougar
Cougar
Point
Point
VCC CORE
VCC CORE
VCCIO
VCCIO
FDI
FDI
CRT LVDS
CRT LVDS
DMI
DMI
NAND / SPI HVCMOS
NAND / SPI HVCMOS
7 OF 10
VCCADAC
VSSADAC
VCCALVDS
VSSALVDS
VCCTX_LVDS
VCCTX_LVDS
VCCTX_LVDS
VCCTX_LVDS
VCC3_3
VCC3_3
VCCVRM
VCCDMI
VCCCLKDMI
VccDFTERM
VccDFTERM
VccDFTERM
VccDFTERM
VCCSPI
+VCCA_DAC_1_2
U48
U47
+3VS_VCCA_LVDS
AK36
AK37
AM37
AM38
AP36
AP37
V33
V34
AT16
+1.05VS_VCC_DMI
AT20
AB36
+1.05VS_VCC_DMI_CCI
AG16
AG17
AJ16
AJ17
V1
(0.1uF/0.01uF x1)
(10uF x1_0603)
1 2
C2313
C2313
SCD01U16V2KX-3GP
SCD01U16V2KX-3GP
R2303
R2303
1 2
0R2J-2-GP
DY
DY
1 2
1 2
1 2
0R2J-2-GP
R2309
R2309
0R2J-2-GP
0R2J-2-GP
(0.1uFx1)
C2319
C2319
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
C2320
C2320
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
DY
DY
+1.8VS_VCCTX_LVDS
3D3V_S0_VCC3_3
0.02A
1 2
C2321
C2321
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
1 2
C2322
C2322
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
1 2
C2323
C2323
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
1 2
C2314
C2314
1 2
C2316
C2316
1 2
1 2
1 2
C2315
C2315
0.001A
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SC10U6D3V5KX-1G P
SC10U6D3V5KX-1GP
0.06A
1 2
SCD01U16V2KX-3GP
SCD01U16V2KX-3GP
SB_0830
1 2
R2315 0R2J-2-GP R2315 0R2J-2-GP
R2306
R2306
0R2J-2-GP
0R2J-2-GP
R2307
R2307
0R2J-2-GP
0R2J-2-GP
0.19A
0.02A
(1uFx1)
1 2
C2318
C2318
C2317
C2317
SCD01U16V2KX-3GP
SCD01U16V2KX-3GP
SC10U6D3V5KX-1G P
SC10U6D3V5KX-1GP
1D5V_S0_1D8V_S0
1D05V_VTT
(1uF x1)
1D05V_VTT
(1uFx1)
(10uFx1)
+V_NVRAM_VCCQ 1D8V_S0
VCCSPI
The same BIOS SPI ROM power
L2301
L2301
1 2
HCB1608KF-181-GP
HCB1608KF-181-GP
R2304
R2304
1 2
0R3J-0-U-GP
0R3J-0-U-GP
R2305
R2305
1 2
0R5J-5-GP
0R5J-5-GP
(0.01uF x2)
(22uF x1)
3D3V_S0
R2308
R2308
1 2
0R2J-2-GP
0R2J-2-GP
(0.1uFx1)
R2313
R2313
1 2
0R2J-2-GP
0R2J-2-GP
R2314
R2314
1 2
0R2J-2-GP
0R2J-2-GP
DY
DY
3D3V_DAC_S0
3D3V_S0
1D8V_S0
1 2
C2325
C2325
SB_0826
SC10U6D3V5KX-1G P
SC10U6D3V5KX-1GP
R2312
R2312
1 2
0R2J-2-GP
0R2J-2-GP
3D3V_S0
3.3V CRT LDO
5V_S0 3D3V_DAC_S0
1 2
DY
DY
C2311
C2311
SC1U10V2KX-1GP
SC1U10V2KX-1GP
3D3V_S5
3D3V_S0
U2301
U2301
DY
DY
1
VIN
2
VOUT
GND
EN3NC#4
G9091-330T11U-GP
G9091-330T11U-GP
74.09091.J3F
74.09091.J3F
2nd = 74.09198.G7F
2nd = 74.09198.G7F
5
4
1 2
DY
DY
C2312
C2312
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
VCCVRM(Internal PLL and VRMs):
A.1.5V for Mobile
B.1.8 V for Desktop
co-operate with R2103
A A
5
4
1D5V_S0
1 2
DY
DY
R2311 0R3J-0-U-GP
R2311 0R3J-0-U-GP
1 2
R2310 0R3J-0-U-GP R2310 0R3J-0-U-GP
1D5V_S0_1D8V_S0 1D8V_S0
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Tuesday, September 07, 2010
Tuesday, September 07, 2010
Tuesday, September 07, 2010
Date: Sheet
Date: Sheet
3
2
Date: Sheet
PCH (POWER1)
PCH (POWER1)
PCH (POWER1)
LA470
LA470
LA470
Taipei Hsien 221, Taiwan, R.O.C.
23 103
23 103
23 103
of
of
1
of
SB
SB
SB
5
4
3
2
1
SSID = PCH
TP2401 TPAD14-GP TP2401 TPAD14-GP
R2403
0.002A
3D3V_S5
(0.1uFx1)
D D
3D3V_S0
1 2
C C
1D05V_VTT
2nd = 68.10090.10B
2nd = 68.10090.10B
2nd = 68.10090.10B
2nd = 68.10090.10B
B B
1D05V_VTT
1D05V_VTT
A A
R2401
R2401
1 2
DY
DY
0R3J-0-U-GP
0R3J-0-U-GP
R2416
R2416
1R2F-GP
1R2F-GP
2nd = 68.10090.10B
2nd = 68.10090.10B
L2402
L2402
1 2
IND-10UH-218-GP
IND-10UH-218-GP
68.10050.10Y
68.10050.10Y
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
L2403
L2403
1 2
IND-10UH-218-GP
IND-10UH-218-GP
68.10050.10Y
68.10050.10Y
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
R2404
R2404
0R2J-2-GP
0R2J-2-GP
R2405
R2405
0R2J-2-GP
0R2J-2-GP
L2401
L2401
1 2
IND-10UH-218-GP
IND-10UH-218-GP
68.10050.10Y
68.10050.10Y
0.08A
+1.05VS_VCCA_A_DPL
+1.05VS_VCCA_A_DPL
1 2
C2443
C2443
DY
DY
0.08A
+1.05VS_VCCA_B_DPL
+1.05VS_VCCA_B_DPL
1 2
C2444
C2444
DY
DY
+VCCDIFFCLK
1 2
1 2
C2412
C2412
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
+V1.05S_SSCVCC
1 2
1 2
C2413
C2413
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
5
+V3.3S_VCC_CLKF33
1 2
(1uFx1)
(220uFx1)
1 2
1 2
(10uFx1)
(1uFx1)
C2401
C2401
1 2
C2402
C2402
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC10U6D3V5KX-1G P
SC10U6D3V5KX-1GP
C2409
C2409
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
(1uFx1)
(220uFx1)
C2410
C2410
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
1D05V_VTT
(1uFx1)
1D05V_VTT
1 2
C2411
C2411
(0.1uFx1)
R2406
R2406
1 2
0R3J-0-U-GP
0R3J-0-U-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
(0.1uFx1)
(1uFx1)
1D05V_VTT
0.001A
(0.1uFx2)
(4.7uFx1_0603)
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
RTC_AUX_S5
6uA
(0.1uFx2)
(1uFx1)
+VCCRTCEXT
C2414
C2414
C2417
C2417
R2403
1 2
0R3J-0-U-GP
0R3J-0-U-GP
TP2405 TPAD14-GP TP2405 TPAD14-GP
TP2404 TPAD14-GP TP2404 TPAD14-GP
1D05V_VTT
TP2402 TPAD14-GP TP2402 TPAD14-GP
1.01A (Total current of VCCASW)
C2404
C2404
C2403
C2403
1 2
1 2
SC10U6D3V5KX-1G P
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1G P
SC10U6D3V5KX-1GP
(22uFx2_0603)
(1uFx3)
0.16A (Totally current of VCCVRM
1D5V_S0_1D8V_S0
+VCCDIFFCLKN
0.055A
1 2
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
1 2
1 2
C2420
C2420
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
4
http://hobi-elektronika.net
VCCACLK
1
+VCCPDSW
DCPSUSBYP
1
+V3.3S_VCC_CLKF33
+VCCAPLL_CPY_PCH
1
(10uFx1)
+VCCSUS1
1
1 2
C2406
C2406
(1uFx1)
0.095A
C2415
C2415
1 2
TP2406 TPAD14-GP TP2406 TPAD14-GP
1 2
C2418
C2418
1 2
C2421
C2421
1 2
1 2
C2408
C2408
C2407
C2407
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
(1uFx1)
DCPSUS
1
1 2
C2419
C2419
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
1 2
C2422
C2422
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
+1.05VS_VCCA_A_DPL
+1.05VS_VCCA_B_DPL
+VCCDIFFCLK
+V1.05S_SSCVCC
+VCCSST
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
PCH1J
PCH1J
AD49
VCCACLK
T16
VCCDSW3_3
V12
DCPSUSBYP
T38
VCC3_3
BH23
VCCAPLLDMI2
AL29
VCCIO
AL24
DCPSUS
AA19
VCCASW
AA21
VCCASW
AA24
VCCASW
AA26
VCCASW
AA27
VCCASW
AA29
VCCASW
AA31
VCCASW
AC26
VCCASW
AC27
VCCASW
AC29
VCCASW
AC31
VCCASW
AD29
VCCASW
AD31
VCCASW
W21
VCCASW
W23
VCCASW
W24
VCCASW
W26
VCCASW
W29
VCCASW
W31
VCCASW
W33
VCCASW
N16
DCPRTC
Y49
VCCVRM
BD47
VCCADPLLA
BF47
VCCADPLLB
AF17
VCCIO
AF33
VCCDIFFCLKN
AF34
VCCDIFFCLKN
AG34
VCCDIFFCLKN
AG33
VCCSSC
V16
DCPSST
T17
DCPSUS
V19
DCPSUS
BJ8
V_PROC_IO
A22
VCCRTC
COUGAR-GP-U2-NF
COUGAR-GP-U2-NF
POWER
POWER
Cougar
Cougar
Point
Point
Clock and Miscellaneous
Clock and Miscellaneous
PCI/GPIO/LPC MISC
PCI/GPIO/LPC MISC
SATA USB
SATA USB
CPU RTC
CPU RTC
HDA
HDA
3
10 OF 10
10 OF 10
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCIO
V5REF_SUS
DCPSUS
VCCSUS3_3
V5REF
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCCIO
VCCIO
VCCIO
VCCIO
VCCAPLLSATA
VCCVRM
VCCIO
VCCIO
VCCIO
VCCASW
VCCASW
VCCASW
VCCSUSHDA
N26
P26
P28
T27
T29
T23
T24
V23
V24
P24
T26
M26
AN23
AN24
P34
N20
N22
P20
P22
AA16
W16
T34
AJ2
AF13
AH13
AH14
AF14
AK1
AF11
AC16
AC17
AD17
T21
V21
T19
P32
1 2
C2423
C2423
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
0.097A (Totally current of VCCSUS3_3)
(0.1uFx1)
1 2
C2424
C2424
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
1 2
C2425
1D05V_VTT
+5VA_PCH_VCC5REFSUS
+VCCA_USBSUS
+V3.3A_VCCPSUS
+5VS_PCH_VCC5REF
+V3.3A_VCCPSUS
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
+V1.05S_VCCAPLL_SATA3
1D5V_S0_1D8V_S0
+V1.05S_VCC_SATA
1D05V_VTT
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
C2428
C2428
C2430
C2430
C2429
C2429
C2432
C2432
C2435
C2435
C2425
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
TP2403 TPAD14-GP TP2403 TPAD14-GP
1
1 2
C2437
C2437
DY
DY
SC1U10V2KX-1GP
SC1U10V2KX-1GP
0.001A
1 2
1 2
0R3J-0-U-GP
0R3J-0-U-GP
1 2
1 2
1 2
1 2
0R3J-0-U-GP
0R3J-0-U-GP
1 2
1 2
0R3J-0-U-GP
0R3J-0-U-GP
+3VS_+1.5VS_HDA_IO
0.01A
(0.1uFx1)
1 2
C2433
C2433
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
2
1D05V_VTT
(1uFx1)
3D3V_S5
3D3V_S5
(0.1uFx1)
0.001A
R2410
R2410
(1uFx1)
(0.1uFx2)
1 2
C2431
C2431
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
(0.1uFx1)
(1uFx1)
R2411
R2411
DY
DY
(10uFx1)
R2412
R2412
(1uFx1)
3D3V_S5
2 1
D2401
D2401
CH751H-40PT-GP
CH751H-40PT-GP
83.R0304.A8F
2nd = 83.R2004.B8F
2nd = 83.R2004.B8F
2nd = 83.R2004.B8F
2nd = 83.R2004.B8F
3D3V_S5
3D3V_S0
3D3V_S0
1D05V_VTT
3D3V_S5
1D05V_VTT
1 2
C2436
1D05V_VTT
<Core Design>
<Core Design>
<Core Design>
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet
Date: Sheet
C2436
+3VS_+1.5VS_HDA_IO
Tuesday, September 07, 2010
Tuesday, September 07, 2010
Tuesday, September 07, 2010
83.R0304.A8F
R2408
R2408
1 2
10R2J-2-GP
10R2J-2-GP
1 2
C2426
C2426
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
3D3V_S0
2 1
D2402
D2402
CH751H-40PT-GP
CH751H-40PT-GP
83.R0304.A8F
83.R0304.A8F
1 2
10R2J-2-GP
10R2J-2-GP
1 2
C2427
C2427
SC1U10V2KX-1GP
SC1U10V2KX-1GP
U2401
U2401
1
VIN
2
GND
EN3NC#4
G9091-150T11U-GP
G9091-150T11U-GP
SC1U10V3ZY-6GP
SC1U10V3ZY-6GP
1 2
DY
DY
R2409 0R3J-0-U-GP
R2409 0R3J-0-U-GP
1 2
DY
DY
R2415 0R3J-0-U-GP
R2415 0R3J-0-U-GP
1 2
R2413 0R3J-0-U-GP R2413 0R3J-0-U-GP
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
PCH (POWER2)
PCH (POWER2)
PCH (POWER2)
LA470
LA470
LA470
R2407
R2407
5V_S5
(0.1uFx1)
5V_S0
(1uFx1)
5
VOUT
4
24 103
24 103
24 103
1
1D5V_S5
of
of
of
1 2
C2416
C2416
C2405
C2405
1 2
DY
DY
SC1U10V3ZY-6GP
SC1U10V3ZY-6GP
SC10U6D3V5KX-1G P
SC10U6D3V5KX-1GP
3D3V_S5
1D5V_S0
1D5V_S5
SB
SB
SB
5
4
3
2
1
SSID = PCH
D D
C C
B B
A A
5
PCH1H
PCH1H
H5
VSS
AA17
VSS
AA2
VSS
AA3
VSS
AA33
VSS
AA34
VSS
AB11
VSS
AB14
VSS
AB39
VSS
AB4
VSS
AB43
VSS
AB5
VSS
AB7
VSS
AC19
VSS
AC2
VSS
AC21
VSS
AC24
VSS
AC33
VSS
AC34
VSS
AC48
VSS
AD10
VSS
AD11
VSS
AD12
VSS
AD13
VSS
AD19
VSS
AD24
VSS
AD26
VSS
AD27
VSS
AD33
VSS
AD34
VSS
AD36
VSS
AD37
VSS
AD38
VSS
AD39
VSS
AD4
VSS
AD40
VSS
AD42
VSS
AD43
VSS
AD45
VSS
AD46
VSS
AD8
VSS
AE2
VSS
AE3
VSS
AF10
VSS
AF12
VSS
AD14
VSS
AD16
VSS
AF16
VSS
AF19
VSS
AF24
VSS
AF26
VSS
AF27
VSS
AF29
VSS
AF31
VSS
AF38
VSS
AF4
VSS
AF42
VSS
AF46
VSS
AF5
VSS
AF7
VSS
AF8
VSS
AG19
VSS
AG2
VSS
AG31
VSS
AG48
VSS
AH11
VSS
AH3
VSS
AH36
VSS
AH39
VSS
AH40
VSS
AH42
VSS
AH46
VSS
AH7
VSS
AJ19
VSS
AJ21
VSS
AJ24
VSS
AJ33
VSS
AJ34
VSS
AK12
VSS
AK3
VSS
COUGAR-GP-U2-NF
COUGAR-GP-U2-NF
Cougar
Cougar
Point
Point
8 OF 10
8 OF 10
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AK38
AK4
AK42
AK46
AK8
AL16
AL17
AL19
AL2
AL21
AL23
AL26
AL27
AL31
AL33
AL34
AL48
AM11
AM14
AM36
AM39
AM43
AM45
AM46
AM7
AN2
AN29
AN3
AN31
AP12
AP19
AP28
AP30
AP32
AP38
AP4
AP42
AP46
AP8
AR2
AR48
AT11
AT13
AT18
AT22
AT26
AT28
AT30
AT32
AT34
AT39
AT42
AT46
AT7
AU24
AU30
AV16
AV20
AV24
AV30
AV38
AV4
AV43
AV8
AW14
AW18
AW2
AW22
AW26
AW28
AW32
AW34
AW36
AW40
AW48
AV11
AY12
AY22
AY28
4
http://hobi-elektronika.net
PCH1I
PCH1I
AY4
VSS
AY42
VSS
AY46
VSS
AY8
VSS
B11
VSS
B15
VSS
B19
VSS
B23
VSS
B27
VSS
B31
VSS
B35
VSS
B39
VSS
B7
VSS
F45
VSS
BB12
VSS
BB16
VSS
BB20
VSS
BB22
VSS
BB24
VSS
BB28
VSS
BB30
VSS
BB38
VSS
BB4
VSS
BB46
VSS
BC14
VSS
BC18
VSS
BC2
VSS
BC22
VSS
BC26
VSS
BC32
VSS
BC34
VSS
BC36
VSS
BC40
VSS
BC42
VSS
BC48
VSS
BD46
VSS
BD5
VSS
BE22
VSS
BE26
VSS
BE40
VSS
BF10
VSS
BF12
VSS
BF16
VSS
BF20
VSS
BF22
VSS
BF24
VSS
BF26
VSS
BF28
VSS
BD3
VSS
BF30
VSS
BF38
VSS
BF40
VSS
BF8
VSS
BG17
VSS
BG21
VSS
BG33
VSS
BG44
VSS
BG8
VSS
BH11
VSS
BH15
VSS
BH17
VSS
BH19
VSS
H10
VSS
BH27
VSS
BH31
VSS
BH33
VSS
BH35
VSS
BH39
VSS
BH43
VSS
BH7
VSS
D3
VSS
D12
VSS
D16
VSS
D18
VSS
D22
VSS
D24
VSS
D26
VSS
D30
VSS
D32
VSS
D34
VSS
D38
VSS
D42
VSS
D8
VSS
E18
VSS
E26
VSS
G18
VSS
G20
VSS
G26
VSS
G28
VSS
G36
VSS
G48
VSS
H12
VSS
H18
VSS
H22
VSS
H24
VSS
H26
VSS
H30
VSS
H32
VSS
H34
VSS
F3
VSS
COUGAR-GP-U2-NF
COUGAR-GP-U2-NF
3
Cougar
Cougar
Point
Point
9 OF 10
9 OF 10
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
H46
K18
K26
K39
K46
K7
L18
L2
L20
L26
L28
L36
L48
M12
P16
M18
M22
M24
M30
M32
M34
M38
M4
M42
M46
M8
N18
P30
N47
P11
P18
T33
P40
P43
P47
P7
R2
R48
T12
T31
T37
T4
W34
T46
T47
T8
V11
V17
V26
V27
V29
V31
V36
V39
V43
V7
W17
W19
W2
W27
W48
Y12
Y38
Y4
Y42
Y46
Y8
BG29
N24
AJ3
AD47
B43
BE10
BG41
G14
H16
T36
BG22
BG24
C22
AP13
M14
AP3
AP1
BE16
BC16
BG28
BJ28
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Tuesday, September 07, 2010
Tuesday, September 07, 2010
Tuesday, September 07, 2010
Date: Sheet
Date: Sheet
2
Date: Sheet
PCH (VSS)
PCH (VSS)
PCH (VSS)
LA470
LA470
LA470
Taipei Hsien 221, Taiwan, R.O.C.
25 103
25 103
25 103
of
of
1
of
SB
SB
SB
5
4
3
2
1
http://hobi-elektronika.net
D D
C C
(Blanking)
B B
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
A A
Title
Title
Title
Reserved
Reserved
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A4
A4
A4
Tuesday, September 07, 2010
Tuesday, September 07, 2010
Tuesday, September 07, 2010
Date: Sheet
Date: Sheet
5
4
3
Date: Sheet
2
Reserved
LA470
LA470
LA470
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
SB
SB
26 103
26 103
26 103
of
of
of
1
SB
5
SSID = KBC
3D3V_AUX_KBC
C2710
C2710
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
R2715
R2715
1 2
0R2J-2-GP
0R2J-2-GP
D2701
D2701
1
2
BAS16-6-GP
BAS16-6-GP
83.00016.K11
83.00016.K11
2ND = 83.00016.F11
2ND = 83.00016.F11
R2716
R2716
1 2
0R2J-2-GP
0R2J-2-GP
1
2
BAS16-6-GP
BAS16-6-GP
2ND = 83.00016.F11
2ND = 83.00016.F11
U2701A
U2701A
104
VREF
97
GPIO90/AD0
98
GPIO91/AD1
99
GPIO92/AD2
100
GPIO93/AD3
101
GPIO94/DA0
105
GPIO95/DA1
106
GPIO96/DA2
79
GPIO2
95
GPIO3/AD6
96
GPIO4/AD5
108
GPIO5/AD4
93
PSL_IN2_GPI6#
94
GPIO7/AD7
114
GPIO16
6
GPIO24
109
GPIO30
14
GPIO34/CIRRXL
15
GPIO36
80
GPIO41
17
GPIO42/TCK
20
GPIO43/TMS
21
GPIO44/TDI
23
GPIO46/CIRRXM/TRST#
26
GPIO51
73
PSL_IN1_GPI70
74
PSL_OUT_GPIO71
75
VBKUP
82
GPIO75
83
GPO76/SHBM
84
GPIO77
91
GPIO81
110
GPO82/IOX_LDSH/TEST#
112
GPI/O84/IOX_SCLK/XORTR#
107
GPIO97
44
VCORF
NPCE795GA0DX-GP
NPCE795GA0DX-GP
DY
DY
3
DY
DY
D2704
D2704
3
83.00016.K11
83.00016.K11
VBAT
ECSWI#_KBC
VCC19VCC46VCC76VCC88VCC
GND18GND45GND78GND89GND
ECSCI#_KBC
115
GPIO52/PSDAT3/RDY#
GND5AGND
116
R2702 0R3J-0-U-GP R2702 0R3J-0-U-GP
1 2
RC2702
RC2702
12
12
DY
DY
SB_0831
D D
20100705
C C
AD_OFF
12
C2701
C2701
SC33P50V2JN-3GP
SC33P50V2JN-3GP
SC2D2U10V3KX-1GP
SC2D2U10V3KX-1GP
1KR2J-1-GP
1KR2J-1-GP
R2770
R2770
12
C2704
C2704
DY
DY
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
GSENSE_X 79
SB_0729
GSENSE_Y 79
TP2710 TPAD14-GP T P2710 TPAD14-GP
TP2706 TPAD14-GP TP2706 TPAD14-GP
TP2705 TPAD14-GP TP2705 TPAD14-GP
1 2
12
C2705
C2705
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
1
1
C2706
C2706
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
CPU_CURRENT 68
1
BLUETOOTH_EN 63
S0_PWR_GOOD 19,36
AC_PRESENT 19
12
12
C2708
C2708
C2707
C2707
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
AD_IA 40
C2714 SCD1U10V2KX-5GP
C2714 SCD1U10V2KX-5GP
1 2
DY
DY
CAMERA_EN 49
GSENSE_TST 79
3G_EN 66
SUS_PWR_ACK 19
TP2711 TPAD14-GP TP2711 TPAD14-GP
1
DC_BATFULL 68
AD_OFF 38
S5_ENABLE 36,97
WIRELESS_LED 68
BAT_IN# 39
LID_CLOSE# 70
RSMRST#_KBC 19
PM_SLP_S4# 19,46
ME_UNLOCK 21
NC_EC_ENABLE
RTC_AUX_S5
WIFI_RF_EN 65
USB_PWR_EN# 57,61
12
20100705
EC_SWI# 20
EC_SCI# 22
12
C2709
C2709
SC2D2U10V3KX-1GP
SC2D2U10V3KX-1GP
PCB_VER_AD
ADT_TYPE
MODEL_ID_AD
CHG_USB_DET#
KBC_PWRBTN_EC#
NC_KBC_GPIO30
NC_KBC_GPIO51
AC_IN_KBC
KBC_GPIO81
KBC_GPIO97
KBC_VCORF
C2712
C2712
SC1U10V3ZY-6GP
SC1U10V3ZY-6GP
12
SB_0809
4
102
VDD
AVCC
LRESET#
LFRAME#
SERIRQ
GPIO11/CLKRUN#
GPIO65/SMI#
ECSCI#/GPIO54
GPIO10/LPCPD#
GPIO67/PWUREQ#
GPIO85/GA20
KBRST#/GPIO86
GPIO50/PSCLK3/TDO
GPIO27/PSDAT2
GPIO26/PSCLK2
GPIO35/PSDAT1
GPIO37/PSCLK1
GPIO17/SCL1
GPIO22/SDA1
GPIO73/SCL2
GPIO74/SDA2
GPIO23/SCL3
GPIO31/SDA3
GPIO47/SCL4
GPIO53/SDA4
F_CS0#
F_SDI/F_SDIO1
F_SDIO/F_SDIO0
103
EC_AGND
1 2
3D3V_S0
12
C2702
C2702
1 OF 2
1 OF 2
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
PLT_RST#_EC
7
2
LCLK
3
LPC_AD3
1
LAD3
LPC_AD2
128
LAD2
LPC_AD1
127
LAD1
LPC_AD0
126
LAD0
125
8
9
ECSCI#_KBC
29
KBC_GPIO10
124
ECSWI#_KBC
123
121
122
27
25
11
10
71
72
70
69
67
68
119
GSENSOR_ID
120
PROCHOT_EC
24
28
EC_SPI_CS#_C
90
EC_SPI_CLK_C BAT_SCL
92
F_SCK
EC_SPI_DI_C
86
EC_SPI_DO_C
87
NOTE:
Locate resistors R2719 and R2722 close
to the NPCE791L.
NOTE:
Connect GND and AGND planes via either
0R resistor or one point layout connection.
R2711
R2711
0R2J-2-GP
0R2J-2-GP
4
SB_0831
RC2701
RC2701
C2703
C2703
12
12
DY
DY
DY
DY
SC33P50V2JN-3GP
SC33P50V2JN-3GP
SC2D2U10V3KX-1GP
SC2D2U10V3KX-1GP
DY
DY
C2711
C2711
1 2
SC220P50V 2 KX-3GP
SC220P50V2KX-3GP
R2735
R2735
1 2
0R2J-2-GP
0R2J-2-GP
CLK_PCI_KBC 18
LPC_FRAME# 21,65,71
INT_SE RIRQ 21
PM_CLKRUN# 19
PANEL_BLEN 49
R2777
R2777
1 2
0R2J-2-GP
0R2J-2-GP
H_A20GATE 22
H_RCIN# 22
BLON_OUT 49
PCIE_RST# 83
GSENSE_ON# 79
HDMI_IN# 51
TPDATA 69
TPCLK 69
BAT_SCL 39,40
BAT_SDA 39,40
SML1_CLK 20
SML1_DATA 20
LAN_PWR_ON 31
CHG_ON# 40
33R2J-2-GPR2736 33R2J-2-GPR2736
1 2
33R2J-2-GPR2719 33R2J-2-GPR2719
1 2
R2737 0R2J-2-GP R2737 0R2J-2-GP
1 2
R2722 33R2J-2-GP R2722 33R2J-2-GP
1 2
EC_GPIO47 High A ctive
PROCHOT_EC
1 2
R2732
R2732
100KR2J- 1-GP
100KR2J-1-GP
Q2702
Q2702
G
S
2N7002K-2-GP
2N7002K-2-GP
84.2N702.J31
84.2N702.J31
2ND = 84.2N702.031
2ND = 84.2N702.031
http://hobi-elektronika.net
SB_0729
PCB_VER_AD
PLT_RST# 5,11,18,31,36,65,66,71,83,97
LPC_AD[0..3] 21,65,71
VGA_SW# 6 8
<------ TP
<------ BATTERY / CHARGER
<------PCH / eDP
SPI_CS0#_R 21,60
SPI_CLK_R 21,60
SPI_SO_R 21,60
SPI_SI_R 21,60
EC_SPI_DI_C
1 2
R2773
R2773
100KR2J-1-GP
100KR2J-1-GP
R2733
R2733
H_PROCHOT#_EC
D
1 2
SB_0812
3D3V_AUX_KBC
0R2J-2-GP
0R2J-2-GP
1 2
1 2
1D05V_VTT
SB_0809
R2724
R2724
20KR2J-L2-GP
20KR2J-L2-GP
BOM Ctrl
BOM Ctrl
R2726
R2726
100KR2J-1-GP
100KR2J-1-GP
H_PROCHOT# 5,42
SATA_ODD_DA# 56
PM_PWRBTN# 11,19,97
WIRELESS_SW# 82
PM_SLP_S3# 19,36,37,47,92
CHARGE_LED 68
TP2703 TPAD14-GP TP2703 TPAD14-GP
1
STOP_CHG# 40
KBC_NOVO_BTN# 68
AD_DETECT 19
SB_0809
PCH_SUSCLK_KBC 19
H_PECI 5,22
R2701 and C2716
Need very close to EC
KBC_BEEP 29
TP2702 TPAD14-GP T P2702 TPAD14-GP
PWRLED 68
E51_RxD 65
E51_TxD 65
AMP_MUTE# 29
R2721 43R2J-GP R2721 43R2J-GP
1 2
R2720
R2720
1 2
0R2J-2-GP
0R2J-2-GP
PURE_HW_SHUTDOWN# 28,36,86
LED_Brightness
CHG_USB_OC#
1
ECRST#
SB_0809
PECI
EC_VTT
12
C2716
C2716
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
R2723
R2723
10KR2J-3-GP
10KR2J-3-GP
U2701B
U2701B
31
GPIO56/TA1
117
GPIO20/TA2/IOX_DIN_DIO
63
GPIO14/TB1
64
GPIO1/TB2
32
GPIO15/A_PWM
118
GPIO21/B_PWM
62
GPIO13/C_PWM
65
GPIO32/D_PWM
81
GPIO66/G_PWM
66
GPIO33/H_PWM
22
GPIO45/E_PWM
16
GPIO40/F_PWM
85
VCC_POR#
113
GPIO87/CIRRXM/SIN_CR
111
GPI/O83/SOUT_CR/TRIST#
30
GPIO55/CLKOUT/IOX_DIN_DIO
77
GPIO0/EXTCLK
13
PECI
12
VTT
NPCE795GA0DX-GP
NPCE795GA0DX-GP
1 2
B
2nd = 84.03906.F11
2nd = 84.03906.F11
3
KBSOUT15/GPIO61/XOR_OUT
ECRST#
12
E
MMBT3906-4-GP
MMBT3906-4-GP
DY
DY
Q2701
Q2701
C
84.T3906.A11
84.T3906.A11
65W_90W#
High: 65W / Low 90W
2 OF 2
2 OF 2
KCOL0
53
KBSOUT9/SDP_VIS#
KBSOUT10/P80_CLK
KBSOUT11/P80_DAT
KBSOUT12/GPIO64
KBSOUT13/GPIO63
KBSOUT14/GPIO62
GPIO60/KBSOUT16
GPIO57/KBSOUT17
C2715
C2715
KBSOUT0/JENK#
KBSOUT1/TCK
KBSOUT2/TMS
KBSOUT4/JEN0#
KBSOUT5/TDO
KBSOUT6/RDY#
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
KCOL1
52
KCOL2
51
KCOL3
50
KBSOUT3/TDI
KCOL4
49
KCOL5
48
KCOL6
47
KCOL7
43
KBSOUT7
KCOL8
42
KBSOUT8
KCOL9
41
KCOL10
40
KCOL11
39
KCOL12
38
KCOL13
37
KCOL14
36
KCOL15
35
KCOL16
34
KCOL17
33
KROW0
54
KBSIN0
KROW1
55
KBSIN1
KROW2
56
KBSIN2
KROW3
57
KBSIN3
KROW4
58
KBSIN4
KROW5
59
KBSIN5
KROW6
60
KBSIN6
KROW7
61
KBSIN7
Prevent BIOS data loss solution
3D3V_AUX_ S5
1 2
PURE_HW_SHUTDOWN#
R2705
R2705
10KR2J-3-GP
10KR2J-3-GP
1
1
ADT_TYPE
KCOL[0..15] 69
TP2708 TPAD14-GP T P2708 TPAD14-GP
TP2709 TPAD14-GP T P2709 TPAD14-GP
KROW[0..7] 69
U2702
U2702
1
DY
DY
GND
2
RESET#
G690L293T73UF-GP
G690L293T73UF-GP
74.00690.I7B
74.00690.I7B
3D3V_AUX_ KBC
1 2
R2707
R2707
UMA_65W
UMA_65W
100KR2J-1-GP
100KR2J-1-GP
1 2
R2701
R2701
OPS_90W
OPS_90W
100KR2J-1-GP
100KR2J-1-GP
3D3V_AUX_S5
3
VCC
20100707
2
GSENSOR_ID
EC GPIO standard PH/PL
BAT_SDA
BAT_IN#
S5_ENABLE
ECRST#
LID_CLOSE#
HDMI_IN#
PCIE_RST#
E51_RxD
BLUETOOTH_EN
DY
DY
RN2701
RN2701
SRN4K7J-8-GP
SRN4K7J-8-GP
RN2703
RN2703
SRN100KJ-6-GP
SRN100KJ-6-GP
RN2705
RN2705
8
7
SRN10KJ-6-GP
SRN10KJ-6-GP
RN2702
RN2702
SRN10KJ-5-GP
SRN10KJ-5-GP
1 2
RN2704
RN2704
SRN10KJ-5-GP
SRN10KJ-5-GP
AC_IN_KBC
1 2
R2706
R2706
100KR2J-1-GP
100KR2J-1-GP
DY
DY
12 34
12 34
1
2
34 56
12 34
R2708 10KR2J-3-GP
R2708 10KR2J-3-GP
12 34
DY
DY
SB_0809
3D3V_AUX_ KBC
1 2
1 2
3D3V_AUX_ KBC
3D3V_S0
R2718
R2718
100KR2J-1-GP
100KR2J-1-GP
R2710
R2710
DY
DY
100KR2J-1-GP
100KR2J-1-GP
1 2
R2712
R2712
0R0402-PAD
0R0402-PAD
G Sensor ID:
High: ST
Low:ADI
R2725
R2725
1 2
0R5J-5-GP
0R5J-5-GP
1
SB_0818
GAP-OPEN
GAP-OPEN
3D3V_AUX_ S5
1 2
R2704
R2704
10KR2J-3-GP
10KR2J-3-GP
KBC_PWRBTN_EC#
1 2
R2703
R2703
470R2J-2-GP
470R2J-2-GP
DY
R2774
R2774
100KR2J-1-GP
100KR2J-1-GP
R2714
R2714
10KR2J-3-GP
10KR2J-3-GP
1 2
R2717
R2717
10KR2J-3-GP
10KR2J-3-GP
KBC_NOVO_BTN#
SB_0823
CHG_USB_DET#
SB_0823
SB_0809
DY
12
C2717
C2717
SC220P50V2KX-3GP
SC220P50V2KX-3GP
1 2
G2701
G2701
2 1
3D3V_AUX_ KBC
1 2
3D3V_AUX_KBC
AC_IN 40
KBC_PWRBTN# 68
3D3V_AUX_S5 3D3V_AUX_KBC
LILI Multi GPIO setting
SML1_CLK
Q2703
Q2703
SML1_DATA
B B
KBC_GPIO81
R2775
R2775
KBC_GPIO97
1 2
R2776
R2776
1 2
0R2J-2-GP
0R2J-2-GP
0R2J-2-GP
0R2J-2-GP
NUM_LED 68
CAP_LED 68
3D3V_S0
23 45
1
6
DMN66D0LDW-7-GP
DMN66D0LDW-7-GP
84.DMN66.03F
84.DMN66.03F
2ND = 84.27002.F3F
2ND = 84.27002.F3F
SMBC_THERM
SMBD_THERM
RN48
RN48
SRN10KJ-5-GP
SRN10KJ-5-GP
SMBC_THERM 28,86
SMBD_THERM 28,86
12 34
3D3V_S0
20100705
MODEL_ID_AD
3D3V_AUX_ KBC
1 2
1 2
R2727
R2727
47KR2J-2-GP
47KR2J-2-GP
BOM Ctrl
BOM Ctrl
R2728
R2728
100KR2J-1-GP
100KR2J-1-GP
A A
<Core Design>
<Core Design>
<Core Design>
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A1
A1
A1
Tuesday, September 07, 2010
Tuesday, September 07, 2010
Tuesday, September 07, 2010
Date: Sheet
Date: Sheet
Date: Sheet
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
KBC Nuvoton NPCE795
KBC Nuvoton NPCE795
KBC Nuvoton NPCE795
LA470
LA470
LA470
of
of
of
27 103
27 103
27 103
SB
SB
SB
5
4
3
2
1
SSID = Thermal
Close to PCH on top side.
SA 0905 change to 390p
3
D D
C C
1
TP66
TP66
TPAD14-GP
TPAD14-GP
B B
E
C
Q6
Q6
MMBT3904WT1G-GP
MMBT3904WT1G-GP
2
E
C
Q42
Q42
MMBT3904WT1G-GP
MMBT3904WT1G-GP
between CPU, VGA and DIMM on bottom side
THERM_SCI#
pin6, ALERT# OD
pin7, SYS_SHDN# OD
SMBC_THERM 27,86
SMBD_THERM 27,86
B
B
H_THERMDA
H_THERMDC
REMOTE2+
REMOTE2-
SC 1203
1 2
C183
C183
SC390P50V2KX-GP
SC390P50V2KX-GP
1 2
C434
C434
SC390P50V2KX-GP
SC390P50V2KX-GP
DY
DY
Thermal sensor
C388
C388
2103_VDD
1 2
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
THERM_SYS_SHDN# SHDN_SEL
1 2
R272 0R0402-PAD R272 0R0402-PAD
THERM_SCI#_R
3D3V_S0
1 2
http://hobi-elektronika.net
T8
1
C
B
Q9
Q9
E
MMBT3904WT1G-GP
MMBT3904WT1G-GP
CPU backside or inside the socket
2200p close to smsc2103 chip
R260
R260
68R2-GP
68R2-GP
U31
U31
3
VDD
2
DP1
1
DN1
16
DP2/DN3
15
ND2/DP3
7
SYS_SHDN#
6
ALERT#
9
SMCLK
8
SMDATA
EMC2103-2-AP-GP
EMC2103-2-AP-GP
REMOTE2-
1 2
C569
C569
SC2200P50V2KX-2GP
SC2200P50V2KX-2GP
REMOTE2+
GPIO1
GPIO2
TACH
PWM
TRIP_SET
SHDN_SEL
GND
GND
4
5
10
11
14
13
12
17
3D3V_S0
1 2
SHDN_SEL
SHDN --> 2N3904 ON External diode
2103_4
1
2103_5
1
TRIP_SET
R276 2K05R2F-GP R276 2K05R2F-GP
1 2
CPU TEMP:
H_THERMDA and H_THERMDC routing 10mil trace width
and spacing. Locate Capacity near Thermal diode.
R280
R280
6K8R2J-GP
6K8R2J-GP
RN49
RN49
2 3
1
SRN10KJ-5-GP
TP65 TPAD14-GP TP65 TPAD14-GP
TP67 TPAD14-GP TP67 TPAD14-GP
SRN10KJ-5-GP
T8 = 105
83.R5003.C8F
83.R5003.C8F
2ND = 83.R5003.H8H
2ND = 83.R5003.H8H
3rd = 83.5R003.08F
3rd = 83.5R003.08F
3D3V_S0
4
D2802
D2802
CH551H-30PT-GP
CH551H-30PT-GP
2ND = 83.R5003.H8H
2ND = 83.R5003.H8H
3rd = 83.5R003.08F
3rd = 83.5R003.08F
83.R5003.C8F
83.R5003.C8F
2 1
FAN_TACH
FAN_PWM
SA 0905
2200p close to smsc2103 chip
4 WIRE PWM Fan Control circuit
Close to connector
D2801
D2801
CH551H-30PT-GP
CH551H-30PT-GP
FAN_TACH
2 1
DY
DY
R427
R427
0R0402-PAD
0R0402-PAD
20100707_EMI
SA 0905
C39
C39
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
1 2
SB_0819
1 2
SB_0825
1 2
C389
C389
SC2200P50V2KX-2GP
SC2200P50V2KX-2GP
5V_S0
1 2
EC2801
EC2801
SC1KP50V2KX-1GP
SC1KP50V2KX-1GP
DY
DY
AFTP2803 AFTP2803
AFTP2802 AFTP2802
AFTP2801 AFTP2801
H_THERMDA
H_THERMDC
R2801
R2801
1 2
EC2802
EC2802
1 2
R426
R426
10KR2J-3-GP
10KR2J-3-GP
0R3J-0-U-GP
0R3J-0-U-GP
1 2
SC1KP50V2KX-1GP
SC1KP50V2KX-1GP
DY
DY
1
1
1
5V_S0_FAN
FAN_PWM_C FAN_PWM
FAN_PWM_C
FAN_TACH
5V_S0_FAN
4
3
2
1
FAN1
FAN1
ACES-CON4-4-GP
ACES-CON4-4-GP
20.F0765.004
20.F0765.004
5 6
2nd = 20.F1808.004
2nd = 20.F1808.004
3D3V_AUX_S5
3
D2803
D2803
BAT54PT-GP
BAT54PT-GP
83.00054.T81
83.00054.T81
2ND = 83.BAT54.D81
2ND = 83.BAT54.D81
3rd = 83.BAT54.S81
3rd = 83.BAT54.S81
PURE_HW_SHUTDOW N# 27,36,86
A A
5
4
DY
DY
1 2
R2812
R2812
1
1 2
10KR2J-3- GP
10KR2J-3-GP
DY
DY
2
C2811
C2811
DY
DY
2ND = 84.2N702.031
2ND = 84.2N702.031
SCD1U10V2KX-5 GP
SCD1U10V2KX-5GP
3
Q2802
Q2802
D
2N7002K-2-GP
2N7002K-2-GP
84.2N702.J31
84.2N702.J31
THERM_SYS_SHDN#
S
G
SB_0812
R2810
R2810
1 2
DY
DY
R2811
R2811
1 2
3D3V_S0
1 2
0R2J-2-GP
0R2J-2-GP
0R2J-2-GP
0R2J-2-GP
R2809
R2809
100KR2J-1-GP
100KR2J-1-GP
3D3V_S0
IMVP_PWRGD 36,42
2
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
THERMAL SENSOR SMSC EMC2103
THERMAL SENSOR SMSC EMC2103
THERMAL SENSOR SMSC EMC2103
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Tuesday, September 07, 2010
Tuesday, September 07, 2010
Tuesday, September 07, 2010
Date: Sheet
Date: Sheet
Date: Sheet
LA470
LA470
LA470
Taipei Hsien 221, Taiwan, R.O.C.
28 103
28 103
28 103
of
of
1
of
SB
SB
SB
5
4
3
2
1
http://hobi-elektronika.net
R2901
R2901
1 2
0R3J-0-U-GP
0R3J-0-U-GP
D D
AUD_PORTA_R 82
AUD_PORTA_L 82
AUD_SENSE_PORT_A 82
SC33P50V2JN-3GP
SC33P50V2JN-3GP
HDA_CODEC_SYNC 21
ALC_AGND
ALC_AGND
C C
AUD_DMIC_CLK 58
B B
20100705_AUD SB_0817
A A
AUD_PORTA_R
AUD_PORTA_L
AUD_SENSE_PORT_A
20KR2F-L-GP
20KR2F-L-GP
AUD_DMIC_CLK
1 2
C2928
C2928
5
AUD_5VA
AUD_3VD 3D3V_S0 AUD_5VA 5V_S0
C2901
C2901
1 2
R2910
R2910
AUD_3VD
Q2902
Q2902
D
2N7002K-2-GP
2N7002K-2-GP
84.2N702.J31
84.2N702.J31
2ND = 84.2N702.031
2ND = 84.2N702.031
R2928
R2928
1 2
DY
DY
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
Place next to pin 1
JDREF
1 2
71.AL272.00G
71.AL272.00G
1 2
C2918
C2918
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
0R2J-2-GP
0R2J-2-GP
C2902
C2902
1 2
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
R2906 5K1R2F-2-GP R2906 5K1R2F-2-GP
1 2
L_LINE_IN_C
R_LINE_IN_C
35
36
U2901
U2901
37
MONO-OUT
38
AVDD2
39
40
41
42
43
44
45
46
47
48
G
S
LOUT1-R/PORT-D-R
LOUT2-L/PORT-A-L
JDREF
LOUT2-R/PORT-A-R
AVSS2
NC#43
DMIC-CLK3/4
SPDIFO2
DMIC-CLK1/2
EAPD
SPDIFO1
DVDD1GPIO0/DMIC-DATA1/22GPIO1/DMIC-DATA3/43DVSS4SDATA-OUT5BITCLK6DVSS7SDATA-IN8DVDD-IO9SYNC10RESET#11PCBEEP-IN
ALC272-GR-GP
ALC272-GR-GP
AUD_DMIC_1_2
AUD_SDATA_OUT
SC10P50V2JN-4GP
SC10P50V2JN-4GP
AUD_3VD AUD_3VD
1 2
R2926
R2926
33KR2F-GP
33KR2F-GP
AUD_SYNC
R2904 75R2J-1-GP R2904 75R2J-1-GP
R2905 75R2J-1-GP R2905 75R2J-1-GP
34
LOUT1-L/PORT-D-L
AUD_DMIC_1_2
1 2
1 2
SENSEB
HP_OUT_L_AUD
HP_OUT_R_AUD
33
SENSE-B
HPOUT-L/PORT-I-L
C2922
C2922
SC100P50V2JN-3GP
SC100P50V2JN-3GP
HDA_CODEC_SDOUT 21
ALC_AGND
ALC_AGND
C2908
C2908
SC2D2 U10V3ZY-1GP
SC2D2U10V3ZY-1GP
1 2
CPVEE
31
32
30
CPVEE
HPOUT-R/PORT-I-R
ALC272
ALC272
58
1 2
4
CBN
C2909
C2909
SC2D2U10V3ZY-1GP
SC2D2U10V3ZY-1GP
1 2
CBP
28
29
CBP
CBN
AUD_SDATAIN
C2929
C2929
DY
DY
G2901
G2901
GAP-CLOSE
GAP-CLOSE
1 2
MIC1_VREF
ACL_VREF
ALC_AGND
26
25
27
VREF
AVSS1
AVDD1
LINE1-R/PORT-C-R
MIC1-VREFO
LINE1-L/PORT-C-L
MIC1-R/PORT-B-R
MIC1-L/PORT-B-L
LINE2-VREFO
MIC2-VREFO
LINE1-VREFO
MIC2-R/PORT-F-R
MIC2-L/PORT-F-L
LINE2-R/PORT-E-R
LINE2-L/PORT-E-L
SENSE-A
12
AUD_PC_BEEP
AUD_SYNC
R2922 22R2J-2-GP R2922 22R2J-2-GP
1 2
D
R2929
R2929
1 2
MIC1_VREF 82
AUD_5VA
C2910
C2910
1 2
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
24
23
22
21
20
19
18
17
16
15
14
13
HDA_CODEC_RST# 21
1 2
1 2
R2923 0R0402-PAD R2923 0R0402-PAD
DY
DY
Q2903
Q2903
2N7002K-2-GP
2N7002K-2-GP
84.2N702.J31
84.2N702.J31
2ND = 84.2N702.031
2ND = 84.2N702.031
0R2J-2-GP
0R2J-2-GP
Place close
to Pin 25
C2912
C2912
1 2
C2911
C2911
1 2
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
ALC_AGND ALC_AGND
DY
DY
AUD_PORTC_R
AUD_PORTC_L
AUD_SENSE_PORT
1D5V_S0_AUD
C2919
C2919
1 2
HDA_SDIN0 21
HDA_CODEC_BITCLK 21
G
S
C2915 SC4D7U6D3V3KX-GP C2915 SC4D7U6D3V3KX-GP
C2916 SC4D7U6D3V3KX-GP C2916 SC4D7U6D3V3KX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
1 2
C2920
C2920
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
1 2
R2927
R2927
33KR2F-GP
33KR2F-GP
DY
DY
AUD_SDATA_OUT
12
C2903
C2903
SC1U10V2KX-1GP
SC1U10V2KX-1GP
Place close
to Pin 27
C2914
C2914
1 2
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
1 2
1 2
3
R2902
R2902
1 2
0R3J-0-U-GP
0R3J-0-U-GP
R2914
R2914
AUD_SENSE_PORT_C
1 2
20KR2F-L-GP
20KR2F-L-GP
RIN+
R_LINE_IN
SCD47U6D3V2KX-GP
SCD47U6D3V2KX-GP
SCD47U6D3V2KX-GP
SCD47U6D3V2KX-GP
ALC_AGND
C2904
C2904
1 2
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
ALC_AGND ALC_AGND
HDA_SPKR 21
KBC_BEEP 27
AUD_PORTC_R_C
AUD_PORTC_L_C
R2916 42K2R2F-L-GP R2916 42K2R2F-L-GP
1 2
R2918 42K2R2F-L-GP R2918 42K2R2F-L-GP
1 2
R2920 42K2R2F-L-GP R2920 42K2R2F-L-GP
1 2
R2921 42K2R2F-L-GP R2921 42K2R2F-L-GP
1 2
SB_0805
5VA_OP_S0
C2923 SCD1U10V2KX-4 GP C2923 SCD1U10V2KX-4GP
1 2
C2924 SC4D7U10V5ZY-3GP C2924 SC4D7U10V5ZY-3GP
1 2
C2926
C2926
RIN+_R
1 2
C2927
C2927
LIN+_R
1 2
5V_S0 5VA_OP_S0
C2905
C2905
1 2
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
R2907
R2907
1 2
10KR2J-3-GP
10KR2J-3-GP
R2908
R2908
1 2
10KR2J-3-GP
10KR2J-3-GP
AUD_SENSE_PORT_C 82
AUD_SPK_L+_L LIN+
AUD_SPK_L-_L L_LINE_IN
AUD_SPK_R+_L
AUD_SPK_R-_L
20KR2F-L-GP
20KR2F-L-GP
20KR2F-L-GP
20KR2F-L-GP
R2924
R2924
1 2
1 2
R_LINE_IN
R2925
R2925
R2903
R2903
1 2
0R3J-0-U-GP
0R3J-0-U-GP
SC100P50V2JN-3GP
SC100P50V2JN-3GP
AUD_PORTC_R_C 82
AUD_PORTC_L_C 82
U2902
U2902
2
VCC
11
VCC
7
LIN+
RIN-
8
RIN+
15
LIN-
16
LIN+
6
NC#6
13
NC#13
G1454R41U-GP
G1454R41U-GP
2
RIN+
L_LINE_IN
1D5V_S0 1D5V_S0_AUD
R2911
R2911
SC4D7 U10V5ZY-3GP
SC4D7U10V5ZY-3GP
1 2
C2906
C2906
1 2
C2907
1 2
C2913
C2913
R2915
R2915
10KR2J-3-GP
10KR2J-3-GP
2ND = 84.2N702.031
2ND = 84.2N702.031
R_LINE_IN_C
L_LINE_IN_C
SHUTDOWN
<Core Design>
<Core Design>
<Core Design>
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
C2907
1 2
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
R2909
R2909
4K7R2J-2-GP
4K7R2J-2-GP
10KR2J-3-GP
10KR2J-3-GP
1451_SD
1 2
DY
DY
2N7002K-2-GP
2N7002K-2-GP
84.2N702.J31
84.2N702.J31
C2917 SCD47U6D3V2KX-GPC2917 SCD47U6D3V2KX-GP
R_LINE_IN_R
1 2
C2921 SCD47U6D3V2KX-GP C2921 SCD47U6D3V2KX-GP
L_LINE_IN_R
1 2
5
BYPASS
14
1
LVO1
4
LVO2
12
RVO1
9
RVO2
3
VSS
10
VSS
17
GND
Tuesday, September 07, 20 10
Tuesday, September 07, 20 10
Tuesday, September 07, 20 10
1 2
0R3J-0-U-GP
0R3J-0-U-GP
3D3V_S0
R2913
R2913
1 2
0R3J-0-U-GP
0R3J-0-U-GP
DY
DY
AUD_PC_BEEP KBC_BEEP_R
5V_S0
3D3V_S0
1 2
R2912
R2912
S
1 2
1 2
BYPASS
AUD_SPK_L-_L
AUD_SPK_L+_L
AUD_SPK_R-_L
AUD_SPK_R+_L
Codec_ALC272
Codec_ALC272
Codec_ALC272
LA470
LA470
LA470
1 2
R2930
R2930
10KR2J-3-GP
10KR2J-3-GP
D
Q2901
Q2901
G
T1#
3
BAW56-5-GP
BAW56-5-GP
83.00056.Q11
83.00056.Q11
2nd = 83.00056.K11
2nd = 83.00056.K11
R2917 20KR2F-L-GP R2917 20KR2F-L-GP
R_LINE_IN
20KR2F-L-GP
20KR2F-L-GP
L_LINE_IN
R2919
R2919
C2925
C2925
1 2
1451_SD
ALC_AGND
SC4D7U10V5ZY-3GP
SC4D7U10V5ZY-3GP
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
D2901
D2901
2
1
29 103
29 103
29 103
1
AMP_MUTE# 27
ALC_EAPD ALC_EAPD
ALC_AGND
AUD_SPK_L-_L 58
AUD_SPK_L+_L 58
AUD_SPK_R-_L 58
AUD_SPK_R+_L 58
of
of
of
SB
SB
SB
5
4
3
2
1
http://hobi-elektronika.net
D D
C C
B B
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
A A
Title
Title
Title
Audio AMP
Audio AMP
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A4
A4
A4
Tuesday, September 07, 2010
Tuesday, September 07, 2010
Tuesday, September 07, 2010
Date: Sheet
Date: Sheet
5
4
3
Date: Sheet
2
Audio AMP
LA470
LA470
LA470
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
SB
SB
30 103
30 103
30 103
of
of
of
1
SB