Lenovo A898t schematic diagram and service manual
6 5 43 21
ANT1
ANT2
818001475
D
MT6582 Power
SHA2301
SHA-WIFI-SMART-T
1
GND
1
U1201-B
T13
T16
T17
T18
T21
M11
U11
U12
V11
V12
V13
T11
DVSS
R11
DVSS
DVSS
DVSS
DVSS
DVSS
DVSS
DVSS
R2
DVSS
G6
DVSS
G7
DVSS
G14
DVSS
G17
DVSS
G20
DVSS
H10
DVSS
M20
DVSS
N11
DVSS
A19
DVSS
A26
DVSS
B4
DVSS
B10
DVSS
E21
DVSS
F6
DVSS
B12
DVSS
B14
DVSS
B17
DVSS
B22
DVSS
B24
DVSS
C4
DVSS
C8
DVSS
C11
DVSS
C12
DVSS
C16
DVSS
C17
DVSS
C18
DVSS
C20
DVSS
C21
AVDD18
AVDD28_DAC
DVDD18_PLLGP
AVDD18_MEMPLL
AA21
AB21
AE21
AE19
AE22
AE18
AC21
AD22
AG26
AA18
AB19
C22
C23
C25
D4
D5
D7
D9
D11
D13
D15
D17
D21
D24
E5
E8
E10
E18
F18
P21
L10
AE5
V7
U7
W7
Y7
AB6
AB8
AC3
AC5
AC7
AD4
AE3
W20
U20
V20
V21
U21
W21
Y20
Y21
U17
U18
A2
R24
A3
V17
V18
AF3
AG1
DVSS
DVSS
DVSS
DVSS
DVSS
DVSS
DVSS
DVSS
DVSS
DVSS
DVSS
DVSS
DVSS
DVSS
DVSS
DVSS
DVSS
DVSS
DVSS
DVSS
DVSS
AVSS18_WBG
AVSS18_WBG
AVSS18_WBG
AVSS18_WBG
AVSS18_WBG
AVSS18_WBG
AVSS18_WBG
AVSS18_WBG
AVSS18_WBG
AVSS18_WBG
AVSS18_WBG
AVSS18_WBG
AVSS18_MD
AVSS18_MD
AVSS18_MD
AVSS18_MD
AVSS18_MD
AVSS18_MD
AVSS18_MD
AVSS18_MD
AVSS18_MD
AVSS18_MD
AVSS18_AP
AVSS18_AP
AVSS18_MEMPLL
AVSS33_USB
AVDD18_MD
AVDD18_AP
AVDD28_DAC
DVDD18_PLLGP
AVDD18_MEMPLL
AVSS18_MD
AVSS18_MD
AVSS18_MD
AVSS18_AP
AVSS18_AP
AVSS18_AP
AVSS18_AP
AVSS18_WBG
AVSS18_WBG
MT6592
DVSS
DVSS
DVSS
T12
K21
M16
C
B
VIO18_PMU
VTCXO_PMU
VIO18_PMU
VIO18_PMU
AVDD18_MEMPLL pin and AVSS18_MEMPLL pin should
be connected with PCB CAP first, and then connected
with PMU and PCB ground. CAP should be near MT6592
as possible as we can.
R1111
12
0R
12
0R
R1112
12
0R
R1115
100NF
C1131
12
R1109
12
0R
C1132
12
100NF
100NF
12
C1134
C1133
100NF
12
H18
DVDD12_EMI
H16
DVDD12_EMI
DVSS
DVSS
DVSS
DVSS
DVSS
H15
DVDD12_EMI
DVDD12_EMI
G9
DVDD12_EMI
G11
DVDD12_EMI
G13
DVDD12_EMI
G15
DVDD12_EMI
G16
DVDD12_EMI
G18
DVDD12_EMI
H8
DVDD12_EMI
E7
DVDD12_EMI
F7
DVDD12_EMI
F8
DVDD12_EMI
G8
DVDD12_EMI
H11
DVDD12_EMI
H13
DVDD12_EMI
DVDD28_MSDC1
E1
DVDD28_MSDC1
DVDD28_MSDC2
V1
DVDD28_MSDC2
DVDD28_BPI
AD26
DVDD28_BPI
U25
DVDD28_MD
G26
DVDD18_MSDC0
DVDD18_IO01234
L26
DVDD18_IO0
Y26
DVDD18_IO1
D1
DVDD18_IO2
W1
DVDD18_IO3
AG13
DVDD18_IO4
R10
VCCK
P9
VCCK
L11
VCCK
L12
VCCK
L13
VCCK
L14
VCCK
L15
VCCK
L16
VCCK
L17
VCCK
M10
VCCK
M18
VCCK
N10
VCCK
N18
VCCK
P18
VCCK
R9
VCCK
R18
VCCK
T10
VCCK
U10
VCCK
V10
VCCK
VCCK_VPROC
N12
VCCK_VPROC
N13
VCCK_VPROC
N14
VCCK_VPROC
N15
VCCK_VPROC
N16
VCCK_VPROC
N17
VCCK_VPROC
P14
VCCK_VPROC
R15
VCCK_VPROC
P15
VCCK_VPROC
R14
VCCK_VPROC
R13
VCCK_VPROC
R12
VCCK_VPROC
R16
VCCK_VPROC
R17
VCCK_VPROC
T14
VCCK_VPROC
T15
VCCK_VPROC
U15
VCCK_VPROC
U16
VCCK_VPROC
V15
VCCK_VPROC
V16
VCCK_VPROC
M15
DVSS
N21
DVSS
P10
DVSS
P11
DVSS
P12
DVSS
P13
DVSS
P16
DVSS
P17
DVSS
L18
DVSS
M14
DVSS
M13
DVSS
M12
DVSS
L2
DVDD18_MIPITX
DVDD18_MIPI
G1
DVDD18_MIPIIO
AVDD33_USB
T24
AVDD33_USB
AVDD18_USB
P26
AVDD18_USB
H4
DVSS18_MIPIIO
H5
DVSS18_MIPIIO
J5
DVSS18_MIPIIO
J7
DVSS18_MIPIIO
L4
DVSS18_MIPITX
M7
DVSS18_MIPITX
M8
DVSS18_MIPITX
N3
DVSS18_MIPITX
DVSS
DVSS
DVSS
DVSS
DVSS
DVSS
DVSS
J21
V14
H12
H20
H17
H14
M17
1.2V IO for DDR2
12
12
C1101
100NF
100NF
C1107 close to pin E1 (150mil)
C1106 close to pin G26 (150mil)
12
12
1uF
100NF
100NF
C1107
C1106
12
VCCK
12
12
12
C1114
C1115
100NF
100NF
100NF
Bottom CAP
12
12
12
100NF
100NF
100NF
C1121
C1122
C1123
Bottom CAP
(1)Remote-sense pin "Vproc_FB" connect to the nearest PTH of "T14"
(2)Remote-sense pin "GND_Vproc_FB" connect to the nearest PTH of "V18"
12
0R
12
0R
1uF
100NF
C1135
C1136
12
12
12
12
100NF
100NF
C1103
C1102
12
12
100NF
C1109
C1108
100NF
C1110
1uF
1uF
1uF
C1116
C1139
C1117
12
12
12
1uF
1uF
1uF
C1125
12
C1124
12
C1137
12
R1107
12
0R
12
0R
R1108
R1113
VUSB_PMU
R1114
VIO18_PMU
R1121
12
0R
DVDD12_EMI
R1122
12
12
10uF
C1104
C1105
12
0R
12
0R
12
0R
12
12
C1111
100NF
100NF
10uF
12
10uF
C1118
C1119
C1120
12
12
10uF
C1126
GND_VPROC_FB
VPROC_FB
1)Please make sure that the two traces should be laid differential pair
100NF
100NF
C1129
12
0R
12
n.m
C1140
R1123
R1104
12
0R
12
C1113
R1105
12
0R
12
12
10uF
C1141
R1106
12
12
12
10uF
10uF
C1128
C1142
To MT6322 GND_VPROC_FB pin
To MT6322 VPROC_FB pin
R1110
12
0R
12
0R
VIO18_PMU
10uF
R1101
R1103
R1102
C1112
100NF
10uF
12
C1138
10uF
C1127
with ground shielding remote sense to PMIC
(2)R1107/R1108 which is close to V18/T14 pin could be removed.
C1130
12
VCORE_SW_FB
n.m
R1120
12
BUCK1_FB
VM12_SW_PMU
VMC_PMU
VIO18_PMU
VIO18_PMU
VIO18_PMU
VCORE_SW_PMU
[3]
VM_PMU
VPROC_PMU
H6
HOLE-1.6-2.6
HOLE-1.6-2.6
1
H7
1
H8
HOLE-1.6-2.6
[2]
JTDI
[2]
JTMS
[2]
JTCK
[2]
JTDO
[2,3]
SYSRST_B
VIO18_PMU
[3,4]
VBUS
[2,4]
USB_DM
[2,4]
USB_DP
[3,7]
PWRKEY
VBAT
[2]
[2]
[2]
[2]
URXD1
[2]
UTXD2
[2]
UTXD3
[2]
URXD3
UTXD0
URXD0
UTXD1
818001475
CAM ESD接地弹片
1
H4
HOLE-2.8-3.2
1
H5
HOLE-2.8-3.2
* Shiled & Hole *
Test Points
TP1101
TP1102
TP1103
TP1104
TP1105
TP1106
TP1107
TP1122
TP1123
TP1108
TP1109
TP1110
TP1112
TP1111A
TP1111B
TP1113A
TP1113B
TP1114
TP1115
TP1116
TP1117
TP1118
TP1120
TP1121
Trace32
Debug port
MP Test Points
1
H2
HOLE-2.7-3.2
1
HOLE-1.1
1
H3
HOLE-2.8-3.2
A Shell conn to GND
H1
REVISION RECORD
DATE:APPROVED:LTR ECO NO:
D
C
B
A
liguo
CHECKED: DATED:
xiazh
RELEASED: DATED:
COMPANY:
TITLE:
DATED:DRAWN:
20130919
20130919
DATED:QUALITY CONTROL:
CODE: SIZE: REV:
SCALE: SHEET: OF
Lenovo MIDH_Phone
Smart-t+_MB
DRAWING NO:
11_MT6592_POWER H101
D
1
A
10
6 5 43 21
REVISION RECORD
DATE:APPROVED:LTR ECO NO:
D
CPU
C
B
C1205 Close to MT6592
AF19 should connect to C1205.1 first,
than connect to GND by via
Close to MT6592
D
U1201-D
ED31
C26
ED30
[2,6,7]
SCL0
[2,6,7]
SDA0
[2,3,6]
[1]
URXD3
URXD3
UTXD3
[1]
UTXD3
[4]
HI_Z_TPA6136
R23
AA3
AC8
AC9
AB9
AD7
AB3
AD8
AE7
AA2
AA1
AF10
AF8
AG8
AE10
SCL0
SCL1
SCL2
SDA0
SDA1
SDA2
URXD3
SPI_CS
GPIO114_LCD_BL_EN
GPIO115_FLASH_HWEN
[6]
[6]
[6] GPIO116_FLASH_STROBE
AC11
SPI_MI
EINT11
EINT14
EINT15
EINT16
EINT17
SPI_CK
SPI_MO
MSDC0_DAT7
MSDC0_DAT6
MSDC0_DAT5
MSDC0_DAT4
MSDC0_DAT3
F22
F24
E23
E26
G24
UTXD2
UTXD1
UTXD0
L25
N26
P25
R26
R25
N23
N24
W5
R5
R4
V5
U5
MT6592
U1201-C
CLK26M
RTC32K_CK
TESTMODE
FSOURCE_P
DVDD18_EFUSE
WATCHDOG
JTCK
JTDO
JTDI
JTMS
USB_VRT
USB_DP
USB_DM
CHD_DP
CHD_DM
I2S_BCK
I2S_LRCK
I2S_DATA_IN
AUX_IN0
AUX_IN1
AUX_XP
AUX_XM
AUX_YP
AUX_YM
REFP
AVSS_REFN
UTXD2
URXD1
UTXD1
URXD0
UTXD0
DVDD18_IO3
R1220
12
Y2
UTXD0
T23
W2
U2
V2
P23
P22
UTXD3
UTXD1
UTXD2
URXD0
URXD1
URXD2
DVDD28_MDDVDD18_IO3
DVDD28_MSDC2 DVDD28_MSDC1 DVDD18_MSDC0
MSDC2_DAT3T1MSDC2_DAT2T5MSDC2_DAT1T6MSDC2_DAT0R7MSDC2_CLKT3MSDC2_CMDD3MSDC1_DAT3C2MSDC1_DAT2D2MSDC1_DAT1E4MSDC1_DAT0C3MSDC1_CLKE3MSDC1_CMD
T2
[7]
GPIO117_PN547_EN
[4] GPIO119_SPK_EN
GPIO118_CAMDVDD_EN
[6]
[2]
FREQ_HOP
[1]
[1]
URXD1
[1]
[1]
URXD0
[1]
CLK1_BB
[8]
CLK1_BB
[3]
RTC32K_CK
[3]
WATCHDOG_B
5.1K
12
R1218
90 Ohm
differential
R1213
12
0R
R1214
12
0R
[1]
JTCK
[1]
JTDO
[1]
JTDI
[1]
JTMS
[1,4]
USB_DP
[1,4]
USB_DM
[3]
CHD_DP
[3]
CHD_DM
RTC32K_CK
TESTMODE
FSOURCE_P
FSOURCE_P
USB_VRT
AF26
AF11
AF12
AE12
AG11
AF13
stella add
[4]
GAIN_TPA6136
[2]
AC19
AUX_IN0
AD19
[2]
AUX_IN1
AF18
AG17
AF17
AG16
AG19
AF19
1uF
C1205
12
SCL1
[2,3,6]
SDA1
[2,6,7]
SCL2
[2,6,7]
SDA2
AC10
AD10
AE9
AB13
AC13
AD13
AE13
Y13
EINT20
EINT18
EINT19
KPCOL0
KPCOL1
KPCOL2
KPROW0
KPROW1
SYSRSTB
SRCLKENAI
SRCLKENA
PWRAP_SPI0_CSN
PWRAP_SPI0_CK
PWRAP_SPI0_MI
PWRAP_SPI0_MO
PWRAP_INT
AUD_CLK_MOSI
AUD_DAT_MISO
AUD_DAT_MOSI
GPIO12
GPIO13
SIM1_SCLK
SIM1_SIO
SIM1_SRST
SIM2_SCLK
SIM2_SIO
SIM2_SRST
EINT0
EINT1
EINT2
EINT3
EINT4
EINT5
EINT6
DVDD28_MD
EINT7
EINT8
EINT9
EINT10
PCM_CLK
PCM_RX
PCM_SYNC
PCM_TX
MSDC0_DAT2
MSDC0_DAT1
MSDC0_DAT0
MSDC0_CLK
MSDC0_CMD
MSDC0_RSTB
E25
E24
D26
G23
G22
G25
[7]
EINT11_G
[6]
GPIO14_CTP_RST
[4]
EARPHONE_CODEC_SDB
[6]
GPIO16_SUB_CMRST
[6]
GPIO18_SUB_CMPDN
[3]
GPIO19_CHG_EN
[4]
GPIO20_BLUE_LED_EN
AA13
KPROW2
M25
M24
N25
J23
H23
J24
H22
H24
K26
K25
J25
AG10
AF9
L21
K23
L23
L20
L24
K24
W22
V22
AA24
V24
W25
Y25
AA23
AA26
AA25
Y23
Y22
V23
V26
V25
U24
[5]
EMMC_RST
[5]
EMMC_CMD
[5]
EMMC_CLK
[5]
EMMC_DAT0
[5]
EMMC_DAT1
[5]
EMMC_DAT2
[5]
EMMC_DAT3
[5]
EMMC_DAT4
[5]
EMMC_DAT5
[5]
EMMC_DAT6
[5]
EMMC_DAT7
[5]
MC1CM
[5]
MC1CK
[5]
MC1DA0
[5]
MC1DA1
[5]
MC1DA2
[5]
MC1DA3
[7]
KCOL0
[7]
KROW0
[2]
GPIO167_HWID
[6]
LCM_ID
[7]
KCOL2
[2]
GPIO93_HWID
C1204 are for ESD ehnhace proposal.
It can be cancel for cost-down proposal
[7]
C1204
CLK_REQ_BB
[3,8]
SRCLKENA
[3]
PMIC_SPI_CS
[3]
PMIC_SPI_SCK
[3]
PMIC_SPI_MISO
[3]
PMIC_SPI_MOSI
[3]
EINT_PMIC
[3]
AUD_CLK
[3]
AUD_DAT_MISO
[3]AUD_DAT_MOSI
GPIO12_FLASH_TX
GPIO13_FLASH_RST
[3]
SIM1_SCLK
[3]
SIM1_SIO
[3]
SIM1_SRST
[3]
SIM2_SCLK
[3]
SIM2_SIO
[3]
SIM2_SRST
[3]
EINT0_MT6333
EINT1_P_SENSOR
[6]
EINT2_CTP
[7]
EITN3_PN547
[4]
EINT4_HP
EINT5_ECOMPASS
[7]
EINT6_M
EINT7_HALL_OUT
EINT8_G4_DRDY
GPIO9_MAIN_CAM_RST
GPIO10_CAM_PDN
SYSRST_B
n.m
[6]
[6]
[7]
[7]
[7]
[7]
[6]
[6]
HWID
VIO18_PMU
VIO18_PMU
12
12
39K
39K
R1222
AUX_IN0
[2]
12
100NF
n.m
R1223
R1208
C1231
[1,3]
VIO18_PMU
n.m
R1203
R1206
AUX_IN1
GPIO167_HWID
[2]
[2]
C1232
n.m
R1210
100NF
NCP15XH103F03RC
RF LCM & camera
[8]
WG_GGE_PA_VRAMP
[8]
TX_BBIP
[8]
TX_BBIN
[8]
TX_BBQP
[8]
TX_BBQN
[8]
RX_BBIP
[8]
RX_BBIN
[8]
RX_BBQP
[8]
RX_BBQN
[8]
DCOC_FLAG
TX_BBIP
TX_BBIN
TX_BBQP
TX_BBQN
RX_BBIP
RX_BBIN
RX_BBQP
RX_BBQN
WG_GGE_PA_VRAMP
AF22
UL_I_P
AF21
UL_I_N
AG20
UL_Q_P
AF20
UL_Q_N
AG25
DL_I_P
AG24
DL_I_N
AG22
DL_Q_P
AG23
DL_Q_N
AF25
VBIAS
AE24
APC
AE14
TXBPI
MT6592
I2C pull high
VIO18_PMU
n.m
R1205
GPIO93_HWID
[2]
n.m
R1209
I2C0:TP
I2C1:charger,sub camera,main camera
I2C2:sensor,flash driver,LCD driver
U1201-A
AB24
ASM_VCTRL_A
BPI_BUS0
AB23
ASM_VCTRL_B
BPI_BUS1
AD25
ASM_VCTRL_C
BPI_BUS2
AC24
WG_GGE_PA_ENABLE
BPI_BUS3
AC23
BPI_BUS4
AE25
BPI_BUS5
AD24
BPI_BUS6
AF16
BPI_BUS7
AA17
BPI_BUS8
AD16
BPI_BUS9
AC16
BPI_BUS10
AF15
BPI_BUS11
AC17
BPI_BUS12
AB17
BPI_BUS13
AC15
BPI_BUS14
Y15
BPI_BUS15
AG14
VM0
AF14
VM1
AD14
BSI-A_EN
BSI_EN
Y14
BSI-A_CK
BSI_CLK
AB14
BSI-A_DAT0
BSI_DATA0
DVDD18_IO4 DVDD28_BPI
AA14
BSI-A_DAT1
BSI_DATA1
AC14
BSI-A_DAT2DCOC_FLAG
BSI_DATA2
SCL2
SDA2
[2,6,7]
[2,6,7]
[2,3,6]
SCL1
[2,3,6]
SDA1
[2,6,7]
SCL0
[2,6,7]
SDA0
ASM_VCTRL_A
ASM_VCTRL_B
ASM_VCTRL_C
WG_GGE_PA_ENABLE
FREQ_HOP
W_PA_B1_EN
W_PA_B2_EN
W_PA_B5_EN
[9]
VM0
[9]
VM1
[8]
BSI-A_EN
[8]
BSI-A_CK
BSI-A_DAT0
BSI-A_DAT1
BSI-A_DAT2
VIO18_PMU
12
4.7K
R1201
VIO18_PMU
12
1K
R1211
VIO18_PMU
12
4.7K
R1216
[8]
[8]
[8]
[8]
[2]
[9]
[9]
[9]
[8]
[8]
[8]
DDR
DVDD12_EMI
12
4.7K
R1202
[2,5]
12
1K
R1212
12
4.7K
R1217
DVDD12_EMI
12
8.2K
C1201
R1204
100NF
EVREF
EVREF
12
1uF
8.2K
C1202
100NF
R1207
[6]
[6]
[6]
[6]
[6]
[6]
[6]
[6]
[6]
[6]
[6]
[6]
[6]
[6]
[6]
[6]
[6]
[6]
[6]
[6]
[6]
[6]
[6]
[6]
MIPI_SUBCAM_RCP
[6]
MIPI_SUBCAM_RCN
[6]
MIPI_SUBCAM_RDP0
MIPI_SUBCAM_RDN0
MIPI_SUBCAM_RDP1
MIPI_SUBCAM_RDN1
MIPI_LCD_TCP
MIPI_LCD_TCN
MIPI_LCD_TDP0
MIPI_LCD_TDN0
MIPI_LCD_TDP1
MIPI_LCD_TDN1
MIPI_LCD_TDP2
MIPI_LCD_TDN2
MIPI_LCD_TDP3
MIPI_LCD_TDN3
MIPI_CAM_RCP
MIPI_CAM_RCN
MIPI_CAM_RDP0
MIPI_CAM_RDN0
MIPI_CAM_RDP1
MIPI_CAM_RDN1
MIPI_CAM_RDP2
MIPI_CAM_RDN2
MIPI_CAM_RDP3
MIPI_CAM_RDN3
12
12
R1219
C1203
[2,5]
EVREF
TP1201
U1201-E
M3
TCP
M4
TCN
M1
TDP0
M2
TDN0
P2
TDP1
N2
TDN1
P1
TDP2
R1
TDN2
N5
TDP3
M5
TDN3
K6
RCP
K5
RCN
L3
RDP0
K3
RDN0
K1
RDP1
K2
RDN1
J1
RDP2_
J2
RDN2_
G2
RDP3_
H2
RDN3_
F5
RCP_A_
G5
RCN_A_
G4
RDP0_A
G3
RDN0_A
J3
RDP1_A
H3
RDN1_A
N1
MIPI_VRT
VRT
MT6592
1.5K
C24
ED29
A25
ED28
B25
ED27
B26
ED26
B23
ED25
A23
ED24
D25
ED23
A11
ED22
A14
ED21
A13
ED20
D12
ED19
A10
ED18
B13
ED17
C10
ED16
B11
ED15
D22
ED14
B20
ED13
D20
ED12
A22
ED11
C19
ED10
B19
ED9
A20
ED8
B21
ED7
B16
ED6
A17
ED5
B18
ED4
A16
ED3
B15
ED2
C15
ED1
D14
ED0
C14
F16
TP_MEMPLL
A1
U3
LCM_RST
Y3
DSI_TE
AD9
DISP_PWM
B2
CMMCLK
B1
CMPCLK
E2
CMDAT0
F2
CMDAT1
RDQ31
RDQ30
RDQ29
RDQ28
RDQ27
RDQ26
RDQ25
RDQ24
RDQ23
RDQ22
RDQ21
RDQ20
RDQ19
RDQ18
RDQ17
RDQ16
RDQ15
RDQ14
RDQ13
RDQ12
RDQ11
RDQ10
RDQ9
RDQ8
RDQ7
RDQ6
RDQ5
RDQ4
RDQ3
RDQ2
RDQ1
RDQ0
VREF
TP_MEMPLL
RCS0_B
RCS1_B
RCKE
RDQM0
RDQM1
RDQM2
RDQM3
RDQS0
RDQS1
RDQS2
RDQS3
RDQS0_B
RDQS1_B
RDQS2_B
RDQS3_B
RCLK0_B
RCLK0
RA0
RA1
RA2
RA3
RA4
RA5
RA6
RA7
RA8
RA9
REXTDN
[6]
LRSTB
[6]
LPTE
[6]
LCD_PWM
[6]
CMMCLK
TP1202
[5]
B7
ECS0_B
B6
[5]
ECS1_B
B5
[5]
ECKE
D16
[5]
EDQM0
D18
[5]
EDQM1
D10
[5]
EDQM2
D23
[5]
EDQM3
F15
[5]
EDQS0
F17
[5]
EDQS1
F12
[5]
EDQS2
E20
[5]
EDQS3
E15
[5]
EDQS0_B
E17
[5]
EDQS1_B
E12
[5]
EDQS2_B
F20
[5]
EDQS3_B
F9
[5]
EDCLK_B
E9
[5]
EDCLK
EA0
B8
EA1
B9
EA2
D8
EA3
A8
EA4
A7
EA5
C7
EA6
A5
EA7
D6
EA8
C6
EA9
A4
REXTDN
B3
1%
56R
R1215
12
C
B
Close to MT6592
A
CHECKED: DATED:
RELEASED: DATED:
COMPANY:
TITLE:
DATED:DRAWN:
1
20130919liguo
20130919xiazh
DATED:QUALITY CONTROL:
CODE: SIZE: REV:
SCALE: SHEET: OF
Lenovo MIDH_Phone
Smart-t+_MB
12_MT6592_BASEBAND
D
DRAWING NO:
102
A
H101
6 5 43 21
VBAT INPUT
BC 1.1
CHARGER
SIM LVS
U1302
K1
SPK_P
L1
SPK_N
H1
AU_HSP
G1
AU_HSN
H4
AU_HPL
J4
AU_HPR
E9
ISINK0
DRIVER
AUDIO
AUXADC
GND_LDOH9GND_LDO
GND_LDO
H8
H10
BUCK OUTPUT
ALDO OUTPUT
DLDO OUTPUT
RTC
GND_LDO
H5
VPROC_FB
GND_VPROC_FB
AVDD33_RTC
VEMC_3V3
VCAM_AF
GND_VREF
RTC_32K1V8
RTC_32K2V8
GND_ISINK
GND_VSYS
GND_VPA
GND_VPROC
GND_VPROC
GND_VPROC
GND_LDO
GND_LDO
GND_LDO
GND_LDO
GND_LDO
GND_LDO
GND_LDO
GND_LDO
GND_LDO
GND_LDOG8GND_LDOG9GND_LDOH6GND_LDOH7GND_LDO
G7
VCAM_IO
C9
ISINK1
E10
ISINK2
C10
ISINK3
C14
VPROC
D14
VPROC
E14
VPROC
B12
C12
A14
VPA_SW
VPA
B14
VPA
D12
W_PA_VCC
VPA_FB
H14
VSYS_SW
VSYS
M3
VA
N3
VCN28
R1314
12
L4
VTCXO
P3
VCAMA
M6
VCN33
C3
J13
VM
H11
VRF18
L12
VIO18
12
M4
VIO28
J12
VCN18
K14
VCAMD
L13
P7
L6
VMC
P4
VMCH
N6
VUSB
P9
VSIM1
N9
VSIM2
L8
VGP1
M7
VIBR
N8
VGP2
L14
VGP3
N7
P14
VREF
N14
D5
C4
32K_IN
A3
XIN
32K_OUT
A4
XOUT
B10
G11
E13
E11
F11
F10
K6
K8
F5
F6
F7
F8
F9
G5
G6
C1340
0R
R1320
100NF
12
C1325
[4]
AU_HSP
R1361
[4]
AU_HSN
12
[4]
AUDIOGND
0R
[4]
AU_HPL
R1361 must to be close to PMIC
[4]
AU_HPR
此GND 为音频地，需要单独走到PMIC 后再单独下到主地
[6]
ISINK0_KPLED_CENTER
[4]
ISINK1
L1302
C1314 are for VPROC_FB decoupling proposal.
0.68uH
C1341
n.m
C1339
n.m
It can be cancel for cost-down proposal
L1303
2.2uH
n.m
L1304
0.68uH
VA_PMU
VCN28_PMU
VTCXO_PMU
VCAMA_PMU
VCN33_PMU
VRTC
VM_PMU
VRF18_PMU
VIO18_PMU
VIO28_PMU
VCN18_PMU
VCAMD_PMU
VCAMD_IO_PMU
VEMC_3V3_PMU
VMC_PMU
VMCH_PMU
VUSB_PMU
VSIM1_PMU
VSIM2_PMU
VGP1_PMU_CTP
VIBR_PMU
VGP3_CAM_DVDD
VCAM_AF
[2]
RTC32K_CK
Close to MT6323
C1336
VCAMA_PMU
C1320
12
1uF
PMU side
VRTC
RTC
1K
R1325
12
C1324
+
n.m
-
BAT1301
X1301
32.768KHz
22PF
22PF
R1330
12
n.m
R1331
12
n.m
VPROC_PMU
12
4.7UF
C1314
VPROC_FB
GND_VPROC_FB
W_PA_VCC
12
C1317
2.2UF
VSYS_PMU
VA_PMU
C1319
12
1uF
C1323
100NF
C1337
PMU_32K
[8]
Please refer to MT6333 application notice
for R813<12R-0805> & U3 selection guide
I2C Address
FAN53555:0xC0
NCP6335D:0x1C
[10]
EXT_BUCK_EN
[10]
EXT_BUCK_VSEL
[2,3,6]
SDA1
[2,3,6]
SCL1
U1305
A5
CHRIN
B3
VBUS
A2
DRVCDT
C1
ISET
A4
VLED
E2
INT
A1
SCL
B1
SDA
E1
SLEEP_B
F1
BUCK_EN
MT6333
[2]
VIO18_PMU
EINT0_MT6333
[3]
VBUS_1
EXT_PMIC_EN
330K 1%
R1303
R1302
R1343
12
4.7K
[2,3,6]
[2,3,6]
SRCLKENA
[2,3,8]
1K
12
R1351
* VCDT rating: 1.268V *
R1304
1%
39K
3.3K
SCL1
SDA1
C1351
22PF
VCDT
[3]
CHR_LDO
[3]
MT6333(Reserve)
U1303 placement, please be close to MT6323
L1310 placement, please be close to L1302
[1,3,4,6,7,8,9]
VBAT
U1303
D1
AVIN
B4
AGND
PVIN
PVIN
A2
PVIN
EN
SW
A1
SW
VSEL
SW
B3
SW
PG
PGND
B2
PGND
INTB
PGND
B1
PGND
SDA
A3
FB
SCL
NCP6335D
D2
E1
E2
E3
E4
L1310
D3
D4
0.47uH
C1
C2
C3
C4
A4
C1350
12
4.7UF
[1,3]
VPROC_PMU
L1310 placement, please be close to L1302
[1,3]
VPROC_FB
C5
C4
CHR_GATE
PGND_CHR
Switching Charger
Buck Converter
PGND_BUCK
PGND_BUCK
F4
F3
[2]
GPIO19_CHG_EN
C3
D3
GND
AGND
BOOT
BATSNS
VBAT
VBAT
VMEM_LX
VMEM_FB
VCORE_LX
VCORE_FB
VRF_FBF2VRF_LX
D2
*I2C Address: 1101010*
* Write-0xD4,Read-0xD5 *
SDA1
[2,3,6]
SCL1
[2,3,6]
L1501 / L1502/ L1503 / L1504
Please use inductor recommand by MTK
Refer to MT6333 design notice
B4
LX
B5
LX
A3
D4
CS
D5
CS
VRF_SW_PMU
C2
E4
E5
E3
BUCK1_FB
B2
BUCK2_SW
F5
D1
L1307
2.2uH
VBAT
40mil
L1305
0.68uH
BUCK1_FB
L1306
0.68uH
VCORE_SW_FB
C338 / C339 are for VMEM_FB / VCORE_FB decoupling proposal.
It can be cancel for cost-down proposal
C1359
12
4.7UF
VBUS_1
C1301
40mil
U1301
A1
VBUS
A2
VBUS
4.7UF
C1306
*CHG_EN=0*
R1307
100K
SWCHR_STAT
*Charging: STAT=0*
*STOP: STAT=1*
R1310
OTG_54013
54013_PMID
B1
PMID
B2
PMID
B3
PMID
B4
SDA
A4
SCL
E2
DISABLE
D4
OTG
C4
STAT
[4]
[1,3,4,6,7,8,9]
[1]
FAN54015
R1309
A3
NC
Switching Charger
VBUS_1VBUS
R1301
12
0R
12
22PF
C1302
stella change
CHECKED: DATED:
RELEASED: DATED:
25V rating
liguo
xiazh
12
1uF
C1303
COMPANY:
TITLE:
DATED:DRAWN:
20130919
20130919
DATED:QUALITY CONTROL:
CODE: SIZE: REV:
SCALE: SHEET: OF
Lenovo MIDH_Phone
D
VBAT
R1306
12
P1
VBAT_SPK
1K
L2
BAT_ON
VCDT
AUXADC_REF
CHR_LDO
F2
G2
E4
F4
G3
G4
D2
D1
J2
D3
H2
E2
E1
P13
P12
K3
A12
M13
N13
M2
A1
K4
A9
A7
N12
N2
E7
E8
B6
A2
M1
D9
B7
D8
B8
F13
F14
G13
A13
H13
P8
P6
P5
P2
J14
M14
A8
A5
C2
B1
B2
A10
A11
B5
M11
E6
C5
K11
D6
M9
N11
M10
K9
L11
K10
MT6323
GND_SPK
AU_MICBIAS0
AU_MICBIAS1
AU_VIN0_P
AU_VIN0_N
AU_VIN1_P
AU_VIN1_N
AU_VIN2_P
AU_VIN2_N
AVDD28_ABB
AVDD28_AUXADC
GND_ABB
ACCDET
CLK26M
BATSNS
ISENSE
BATON
VCDT
VDRV
CHRLDO
CONTROL SIGNAL
PWRKEY
SYSRSTB
RESETB
FSOURCE
INT
EXT_PMIC_EN
PMU_TESTMODE
AUD_MOSI
AUD_CLK
AUD_MISO
SRCLKEN
FCHR_ENB
SPI_CLK
SPI_CSN
SPI_MOSI
SPI_MISO
VBAT_VPROC
VBAT_VPROC
VBAT_VPROC
VBAT_VPA
VBAT_VSYS
VBAT_LDOS3
VBAT_LDOS3
VBAT_LDOS2
VBAT_LDOS1
AVDD22_BUCK
AVDD22_BUCK
DVDD18_DIG
DVDD18_IO
AUXADC_VREF18
AUXADC_AUXIN_GPS
AVSS28_AUXADC
CHG_DM
CHG_DP
SIM1_AP_SCLK
SIMLS1_AP_SIO
SIM1_AP_SRST
SIM2_AP_SCLK
SIMLS2_AP_SIO
SIM2_AP_SRST
SIMLS1_SCLK
SIMLS1_SIO
SIMLS1_SRST
SIMLS2_SCLK
SIMLS2_SIO
SIMLS2_SRST
GND_LDO
GND_LDOJ8GND_LDOJ7GND_LDOJ6GND_LDO
J9
J10
12
2.2UF
12
C1310
100NF
C1312
12
[8]
connect to MT6166 x04 pin directly
TP1302
[2]
PMIC_SPI_SCK
[2]
PMIC_SPI_CS
[2]
PMIC_SPI_MOSI
[2]
PMIC_SPI_MISO
12
1uF
C1326
[4]
[4] AU_VIN0_N
[4]
[4]
CLK4_AUDIO
[3]
[2]
[2]
[2,3,8]
100NF
[7]
SIM1_CARD_SCLK
[7]
[7]
SIM1_CARD_SRST
[7]
SIM2_CARD_SCLK
[7]
[7]
SIM2_CARD_SRST
C1307
MICBIAS1
AU_VIN0_P
[4]
AU_VIN1_P
AU_VIN1_N
[4]
AU_VIN2_P
[4]
AU_VIN2_N
ACCDET
[2]
EINT_PMIC
EXT_PMIC_EN
AUD_DAT_MOSI
[2]
AUD_DAT_MISO
SRCLKENA
C1338
[2]
[2]
[2]
SIM1_SCLK
[2]
SIM1_SIO
[2]
SIM1_SRST
[2]
SIM2_SCLK
[2]
[2]
SIM2_SRST
SIM1_CARD_SIO
SIM2_CARD_SIO
AUD_CLK
SIM2_SIO
CHD_DM
CHD_DP
MICBIAS0
D
C
PMIC
[3]
CHR_LDO
VBAT
Vbat should connect to C1322 first,
then star-connetion to MT6323
50mil50mil 30mil
C1322
22uF
VSYS_PMU
T1303
VIO18_PMU
GND
1uF
Close to PMIC
Star-connection
30mil
20mil
20mil
30mil
C1318
12
R1321
12
R1322
12
R1323
12
R1324
12
R1326
12
R1328
12
12
VA_PMU
[1,3,4,6,7,8,9]
VBAT
[3]
ISENSE
[3]
BAT_ON
[3]
VCDT
[1,7]
PWRKEY
R1329
0R
C1327
4.7UF
C1331
C1328
C1329
C1330
12
12
12
12
12
4.7UF
4.7UF
4.7UF
1uF
R1316
12
12
C1333
C1332
10uF
10uF
1K
DVDD18_DIG
C1334
12
12
1uF
0R
1uF
C1311
12
R1335
12
n.m
R1336
12
0R
[2]
WATCHDOG_B
SYSRST_B
[1,2]
[3,8]
AUXADC_REF
[8]
THERM_ADC
C1326 must to be close
to MT6323 pin B1
GND_AUXADC
C1335
Connect TSX/XTAL GND
12
to AVSS28_AUXADC first
1uF
than connect to main GND
1uF
R1311
12
B
B
80mil
stella change
7
3
GND
6
GND
2
TEMP
5
GND
1
4
GND
J1301
0R
R1350
12
A
12
C1321
A
BAT. CONN.
VA_PMU AUXADC_REF
12
n.m
T1302
GND
C1315
R1312
33PF
R1313
R1317
12
2
D1301
1
PZ3D4V2H
16.9K
R1315
1K
30K
R1313,R1317 must to be close to
PMIC AUXADC_REF pin
VBAT
T1301
GND
[3]
BAT_ON
4mil is ok
REVISION RECORD
VBAT
C1345
C1346
12
12
10uF
10uF
C1347
4.7UF
12
C1348
4.7UF
VM12_SW_PMU
VCORE_SW_PMU
12
VRF_SW_PMU
C1304
n.m
SWTI_1
L1301
C1
SW
C2
SW
1uH
C3
SW
C1305
4.7UF
D3
PGND
D2
PGND
D1
PGND
E1
CSIN
VBAT
E4
VBAT
VREG_54013
E3
VREG
12
C1309
1uF
10K
Smart-t+_MB
DRAWING NO:
13_MT6323_PMIC_AUDIO
DATE:APPROVED:LTR ECO NO:
D
C
ISENSE
R1305
[3]
68mOHM
VBAT
[1,3,4,6,7,8,9]
B
VBAT
连接电池端
C1308
10uF
A
H101
10
3
Loading...