Lenovo 3000, G550 Schematics

A

1 1

B

C

D

E

2 2

KIWA7/A8

Schematics Document

Mobile Penryn uFCPGA with Intel

3 3

Cantiga_GM/PM+ICH9-M core logic

REV:0.4

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN C ONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN C ONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN C ONSENT OF COMPAL ELECTRONICS, INC.

2008/03/25 2008/04/

C

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Cover Sheet

Size Document Num ber Rev

B

KIWAX_LA-5082P

Date: Sheet of

D

Date: Sheet of

1 53Wednesday, March 18, 2009

E

0.4

A

Compal confidential

File Name :

B

ZZZ

15W_PCB_LA5082P

C

POWER Board

D

CAP SENSE LEDs Board

E

USB board

VRAM

1 1

64*16 DDRII

page21,22

PCI-E X16

NV10M-GS

page16,17,18,19,20

40nm

CONN

page24

Parade 8101T

page24

CRT & TV OUT

page26

2 2

LVDS Connector

page25

PCI-EHDMI

Intel Cantiga GMCH

LVDS I/F

Mobile Penryn

uFCPGA-478 CPU

H_A#(3..35)

H_D#(0..63)

PCBGA 1329

page 8,9,10,11,12,13

DMI

page5,6,7

FSB

667/800/1066MHz

C-Line

DDR3 -800

DDR3-1066

Dual Channel

Clock Gen.

SLG8SP556VTR ICS9LPRS387AKLFT

DDR3-SO-DIMM X2

BANK 0, 1, 2, 3

page23

page 14,15

AMP&Audio Jack

AZALIA

PCI Express Mini card Slot

page31

New Card

BCM5906 10/100/LAN

3 3

RJ45 CONN

page32

page33

6*PCI-E BUS

3.3V / 33 MHz

page40

Card Reader

RTS 5159

Card reader(XD/SD MMC/MS/MS-Pro

HD SD)

page38

Intel ICH9-M

mBGA-676

USB 2.0 BUS

page27,28,29,30

LPC BUS

EC ENE KB926

page37

Int.KBD

12*USB2.0

Audio Codec

CX20561

4*SATA serial

CMOS Camera

BlueTooth Conn

USB conn X2

page39

SATA HDD

Touch Pad

page39

BIOS

page40

Connector

SATA CDROM Connector

4 4

page36

page35

page41

page34

Key component Manufacturer Compal P/N R1 Desc

Northbridge Intel / Cantiga PM45 SA00002JJM0 S IC AC82PM45 QV11 A1 FCBGA 1329 PM C38

Intel / Cantiga GM 45 SA00002JTD0 S IC AC82GM45 SLB94 B3 FCBGA1329 GM C38!

SouthBridge Intel / ICH9M SA00002JH90 S IC AF82801IBM SLB8Q A3 676P ICH9M C38! (MP)

VGA Chip Nvidia / N10M SA00002V810 S IC N10M-GE1-S-U2(H) BGA 533P C38

VRAM DDR2/512MB SA00002MF00 (14") S IC D2 64M16/500 HYB18T1G161C2F-20

SA00002UH00 (15.6") S IC D2 64M16/500 H5PS1G63EFR-20L FBGA84

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2007/10/15 2008/10/15

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

MB Block Diagram

KIWAX_LA-5081P

2 53Wednesday, March 18, 2009

E

0.4

A

B

C

D

E

DDR3 Voltage Rails

1 1

power plane

+B

State

2 2

S0

S1

S3

S5 S4/AC

S5 S4/ Bat tery only

S5 S4/AC & Battery don't exis t

O

X

+5VALW

+3VALW

O

X

X X X

+1.5V

O

X X

X

+5VS

+3VS

+1.5VS

+0.75V

+VCCP

+CPU_CORE

+VGA_CORE

+1.8VS

OO

X

SMBUS, SPI and I2C C ontrol Tab le

SOURCE

HDMI BATTEEPROM

LVDS

EC_SMB_CK1 EC_SMB_DA1

EC_SMB_CK2 EC_SMB_DA2

ICH_SMBCLK ICH_SMBDAT ICH9

LVDS_SCL LVDS_SDA

GMCH_CRT_CLK GMCH_CRT_DAT

HDMICLK_NB HDMIDAT_NB

VGA_DDCCLK VGA_DDCDATA

VGA_LVDS_SCL VGA_LVDS_DAT

VGA_HDMI_SCL VGA_HDMI_DAT

HDCP_SMB_CK1 HDCP_SMB_DA1

FSEL#SPICS#_SB FRD#SPI_SO_SB SPI_CLK_SB FWR#SPI_SI_SB

FSEL#SPICS# FRD#SPI_SO SPI_CLK FWR#SPI_SI

KB926

X

KB926

X

Cantiga

X

V

Cantiga

X X X X X X X X X X X X

Cantiga

VGA

ICH9

KB926

X X X X X X X X X X X X

V

X

V

X

V

X

XXX

X

HDCP

SERIAL

CRT

X X X

X

X X X X

NEW

CARD

XXX

X

V V

X

X X

CLK

GEN

X X

Mini

CAP

sensor

X X

CARD1

X X

Mini

CARD2

X X

V V

X

V

X

THERMAL SENSOR (VGA)

XX

V

X

THERMAL SENSOR (CPU)

VV

V

X X X X X X X X X X

V

X

X X X X X X X X X X

X

V

X

X X

X X X X X X X X X

X X X X X X X

X

X X X X X X X

X

V

XXXXXXX

X X

X

3 3

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2007/10/15 2008/10/15

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

B

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

MB Notes List

KIWAX_LA-5082P

3 53Wednesday, March 18, 2009

E

0.4

A

B

C

D

E

VGA and DDR2 Voltage Rails (N10M)

power

1 1

plane

State

S0

S1

2 2

S3

S5 S4/AC

S5 S4/ Bat tery only

S5 S4/AC & Battery don't exis t

O

X

O

X

O

X X

X

X X X

+3VS

+VGA_CORE

+1.1VS (fo r 55nm)

+1.05VS (f or 40nm)

+1.8VS

OO

X

EDP at Tj = 97C*

Power Supply Rail

NVVDD Variable

FB_DLLAVDD 1.1

FB_PLLAVDD

IFPC_IOVDD

IFPD_IOVDD

IFPE_IOVDD

IFPF_IOVDD

PEX_IOVDD/Q

PEX_PLLVDD

PLLVDD

SP_PLLVDD

VID_PLLVDD

TOTAL

FBVDD/Q

IFPA_IOVDD

IFPB_IOVDD

IFPAB_PLLVDD

IFPCD_PLLVDD

IFPEF_PLLVDD

TOTAL

DACA_VDD

DACB_VDD

DACC_VDD

MIOA_VDDQ

MIOB_VDDQ

VDD33

TOTAL 3.3 0.445A

(V)

1.1

1.8

3.3

NB9M-GS

GDDR3 DDR2

11.22A 10.87A

25mA

10mA

385mA

1550mA

165mA

55mA

25mA

50mA

3.425A

2.24A

2.76A 2.575A 2.085A

1.65A 2.24A 1.75A

50mA

100mA

160mA

2.17A

110mA

125mA

110mA

10mA

80mA

N10M-GE1-S

GDDR3 DDR2

13.56A 13.47A

25mA

10mA

180mA

1550mA

65mA

30mA

10mA

25mA

2.435A

50mA

75mA

80mA

110mA

125mA

110mA

10mA

80mA

0.445A

POWER SQUENCE

The ramp time for any rail must be more than 40us

3 3

(+3VS)

(1.1VS or 1.05VS)

(+VGA_CORE)

4 4

A

B

(1.8VS)

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

VDD33

PEX_VDD

NVVDD

FBVDDQ

C

PEX_VDD can ramp up any time

tNVVDD>=0

tFBVDDQ>=0

Compal Secret Data

2008/03/24 2008/04/

Compal Secret Data

Deciphered Date

D

tNV-FB

Compal Electronics, Inc.

Title

Size Document Number Rev

B

Date: Sheet of

Compal Electronics, Inc.

VGA Notes List

KIWA5/6 LA-5081P

E

0.4

4 53Wednesday, March 18, 2009

0.4

5

4

3

2

1

XDP Reserve

XDP_DBR ESET#

XDP_TDI

D D

H_A#[3..16 ](8)

H_ADSTB #0(8)

H_REQ#0(8) H_REQ#1(8) H_REQ#2(8) H_REQ#3(8) H_REQ#4(8)

H_A#[17..3 5](8)

C C

H_ADSTB #1(8)

H_A20M#(27)

H_FERR#(27)

H_IGNNE#(2 7)

H_STPCL K#(27) H_INTR(27)

H_NMI(27) H_SMI#(27)

B B

RSVD pins on the CPU should be left as NO CONNECT

A A

H_ADSTB #0

H_REQ#0 H_REQ#1 H_REQ#2 H_REQ#3 H_REQ#4

5

H_A#3 H_A#4 H_A#5 H_A#6 H_A#7 H_A#8 H_A#9 H_A#10 H_A#11 H_A#12 H_A#13 H_A#14 H_A#15 H_A#16

H_A#17 H_A#18 H_A#19 H_A#20 H_A#21 H_A#22 H_A#23 H_A#24 H_A#25 H_A#26 H_A#27 H_A#28 H_A#29 H_A#30 H_A#31 H_A#32 H_A#33 H_A#34 H_A#35 H_ADSTB #1

H_A20M# H_FERR# H_IGNNE#

H_STPCL K# H_INTR H_NMI H_SMI#

AA4 AB2 AA3

D22

K5 M3 N2

N3 P5 P2

P4 P1 R1 M1

K3 H2 K2

Y2 U5 R3

W6

U4 Y5 U1 R4 T5

T3 W2 W5

Y4

U2

V4 W3

V1

A6

A5

C4

D5

C6

B4

A3

M4

N5

T2

V3

B2

D2

D3

F6

J4 L5 L4

J1

L2

J3 L1

CONN@

JCPUA

A[3]# A[4]# A[5]# A[6]# A[7]# A[8]# A[9]# A[10]# A[11]# A[12]# A[13]# A[14]# A[15]# A[16]# ADSTB[0]#

REQ[0]# REQ[1]# REQ[2]# REQ[3]# REQ[4]#

A[17]# A[18]# A[19]# A[20]# A[21]# A[22]# A[23]# A[24]# A[25]# A[26]# A[27]# A[28]# A[29]# A[30]# A[31]# A[32]# A[33]# A[34]# A[35]# ADSTB[1]#

A20M# FERR# IGNNE#

STPCLK# LINT0 LINT1 SMI#

RSVD[01] RSVD[02] RSVD[03] RSVD[04] RSVD[05] RSVD[06] RSVD[07] RSVD[08] RSVD[09]

Penryn

ADDR GROUP_0

ADDR GROUP_1

THERMAL

ICH

THERMTRIP#

RESERVED

ADS# BNR#

BPRI#

DEFER#

DRDY# DBSY#

BR0#

IERR#

INIT#

LOCK#

CONTROL

RESET#

RS[0]# RS[1]# RS[2]#

TRDY#

HIT#

HITM#

BPM[0]# BPM[1]# BPM[2]# BPM[3]#

PRDY# PREQ#

TCK

TDO TMS

TRST#

DBR#

XDP/ITP SIGNALS

PROCHOT#

THERMDA THERMDC

H CLK

BCLK[0] BCLK[1]

H_ADS#

H1

H_BNR#

E2

H_BPRI#

G5

H_DEFER #

H5

H_DRDY#

F21

H_DBSY#

E1

H_BR0#

F1

H_IERR#

D20

H_INIT#

B3

H_LOCK#

H4

H_RESET #

C1

H_RS#0

F3

H_RS#1

F4

H_RS#2

G3

H_TRDY#

G2

H_HIT#

G6

H_HITM#

E4

XDP_BPM #0

AD4

XDP_BPM #1

AD3

XDP_BPM #2

AD1

XDP_BPM #3

AC4

XDP_BPM #4

AC2

XDP_BPM #5

AC1

XDP_TCK

AC5

XDP_TDI

AA6

TDI

AB3 AB5 AB6 C20

D21 A24 B25

C7

A22 A21

XDP_TDO XDP_TMS XDP_TRS T#

XDP_DBR ESET#

H_PROCH OT#

H_THERM DA H_THERM DC

H_THERM TRIP#

CLK_CPU _BCLK CLK_CPU _BCLK#

H_ADS# (8) H_BNR# (8)

H_BPRI# (8)

H_DEFER # (8)

H_DRDY# (8) H_DBSY# (8)

H_BR0# (8)

H_THERMDA, H_THERMDC routing together, Trace width / Spacing = 10 / 10 mil

4

+VCCP

12

R83

R83 56_0402 _5%

56_0402 _5%

H_INIT# (27)

H_LOCK# (8)

H_RESET # (8) H_RS#0 (8) H_RS#1 (8) H_RS#2 (8) H_TRDY# (8 )

H_HIT# (8) H_HITM# (8)

XDP_DBR ESET# (28)

12

R84 68_0402 _5%R84 68_0402 _5%

H_THERM TRIP# (8,27)

CLK_CPU _BCLK (22) CLK_CPU _BCLK# (22)

EMC1402 SA00001Z700 ADT7421ARMZ SA00001UN00

C89

H_THERM DA

H_THERM DC

THERM#

Address:100_1100

+VCCP

H_PROCH OT#

2200p change to 1000p for ADT74 21

+3VS

C95

1 2

R94

1 2

10K_040 2_5%

+3VS

1

2

0.1U_0402_16V4Z

2200P_0 402_50V7K

G990 SA00002GW00 APL5605 SA00001Z900 RT9027 SA000022J00

+5VS

FAN solution RC (R=1Kohm,C=0.1uF)

EN_FAN1(36)

Security Class ification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2007/10/ 15 2008/10/ 15

3

EN_FAN1

Compal Secret Data

1 2

R667

R667 1K_0402 _5%

1K_0402 _5%

Deciphered Date

+VCC_FA N1 EN_FAN1 _R

1

C810

0.1U_040 2_16V4Z

2

FAN_SPE ED1(36)

2

U5

1

VDD

2

DP

3

DN

4

THERM#

EMC1402 -1-ACZL-TR_MSOP 8

U24

1 2 3 4

G990P11 U_SO8

+3VS

XDP_TMS

XDP_TDO

XDP_TRS T#

XDP_TCK

8

SMCLK

7

SMDATA

6

ALERT#

5

GND

FAN1 Conn

C594 10U_080 5_10V4ZC594 1 0U_0805_10V4 Z

1 2

VEN VIN VO VSET

12

R469

R469 10K_040 2_5%

10K_040 2_5%

1

C596

C596 1000P_0 402_50V7K

1000P_0 402_50V7K

2

8

GND

7

GND

6

GND

5

GND

+VCC_FA N1

Title

Size Document Nu mber Rev

B

Date: Sheet of

1 2

R43

R11 54.9_0402 _1%R11 54.9_0402 _1%

1 2

R14 54.9_0402 _1%R14 54.9_0402 _1%

1 2

R12 54.9_0402 _1%

1 2

@

R16 54.9_0402 _1%R16 54.9_0402 _1%

1 2

R15 54.9_0402 _1%R15 54.9_0402 _1%

1 2

+3VS

R95

R95 10K_040 2_5%

10K_040 2_5%

1 2

EC_SMB_ CK2

EC_SMB_ DA2

+5VS

12

D17

D17 1SS355T E-17_SOD323-2@

1SS355T E-17_SOD323-2@

D16

1 2

C595

1U_0603 _10V4Z

1 2

C597

0.1U_040 2_16V4Z

1 2

40mil

Compal Electronics, Inc.

Penryn (1/3)

KIWAX_LA-5082P

1K_0402 _5%@

EC_SMB_ CK2 (16,36)

EC_SMB_ DA2 (16,36)

BAS16_S OT23-3@

JP13

1

2

3

4

GND

5

GND

E&T_380 1-F03N-01R

ME@

1

+3VS

+VCCP

5 53Wednesd ay, March 18, 20 09

0.4

5

4

3

2

1

+CPU_CO RE +CPU_CO RE

CONN@

H_D#[0..15 ](8)

D D

H_DSTBN #0(8) H_DSTBP #0(8)

H_DINV#0(8)

H_D#[16..3 1](8)

C C

H_DSTBN #1(8) H_DSTBP #1(8)

H_DINV#1(8)

R45 1 K_0402_5%@R4 5 1K_0402 _5%@

1 2

R46 1K_0402_ 5%@R 46 1K_0402 _5%@

1 2

Trace Close CPU < 0.5'

Width=4 mil , Spacing: 15mil (55Ohm)

B B

CPU_BSE L0 CPU_BSEL1 CPU_BSEL2

1

2

C1163

0.01U_0402_16V7K

@

Layout note: Z0=55 ohm

0.5" max for GTLREF.

A A

+CPU_GT LREF

T16T16 T15T15 T14T14 T17T17 T10T10

CPU_BSE L0(22 ) CPU_BSE L1(22 ) CPU_BSE L2(22 )

1

2

C1164

0.01U_0402_16V7K

@

+VCCP

12

R471

R471 1K_0402 _1%

1K_0402 _1%

12

R470

R470 2K_0402 _1%

2K_0402 _1%

H_D#0 H_D#1 H_D#2 H_D#3 H_D#4 H_D#5 H_D#6 H_D#7 H_D#8 H_D#9 H_D#10 H_D#11 H_D#12 H_D#13 H_D#14 H_D#15 H_DSTBN #0 H_DSTBP #0 H_DINV#0

H_D#16 H_D#17 H_D#18 H_D#19 H_D#20 H_D#21 H_D#22 H_D#23 H_D#24 H_D#25 H_D#26 H_D#27 H_D#28 H_D#29 H_D#30 H_D#31 H_DSTBN #1 H_DSTBP #1 H_DINV#1

+CPU_GT LREF

TEST1 TEST2 TEST3 TEST4 TEST5 TEST6

TEST7 CPU_BSE L0 CPU_BSE L1 CPU_BSE L2

1

2

C1165

@

CONN@

JCPUB

E22

D[0]#

F24

D[1]#

E26

D[2]#

G22

D[3]#

F23

D[4]#

G25

D[5]#

E25

D[6]#

E23

D[7]#

K24

D[8]#

G24

D[9]#

J24

D[10]#

J23

D[11]#

H22

D[12]#

F26

D[13]#

K22

D[14]#

H23

D[15]#

J26

DSTBN[0]#

H26

DSTBP[0]#

H25

DINV[0]#

N22

D[16]#

K25

D[17]#

P26

D[18]#

R23

D[19]#

L23

D[20]#

M24

D[21]#

L22

D[22]#

M23

D[23]#

P25

D[24]#

P23

D[25]#

P22

D[26]#

T24

D[27]#

R24

D[28]#

L25

D[29]#

T25

D[30]#

N25

D[31]#

L26

DSTBN[1]#

M26

DSTBP[1]#

N24

DINV[1]#

AD26

GTLREF

C23

TEST1

D25

TEST2

C24

TEST3

AF26

TEST4

AF1

TEST5

A26

TEST6

C3

TEST7

B22

BSEL[0]

B23

BSEL[1]

C21

BSEL[2]

Penryn

H_DPRST P#_R H_DPRST P#

0.01U_0402_16V7K

MISC

DATA GRP 0

DATA GRP 1

D[32]# D[33]# D[34]# D[35]# D[36]# D[37]# D[38]# D[39]# D[40]#

DATA GRP 2DATA GRP 3

D[41]# D[42]# D[43]# D[44]# D[45]# D[46]#

D[47]# DSTBN[2]# DSTBP[2]#

DINV[2]#

D[48]#

D[49]#

D[50]#

D[51]#

D[52]#

D[53]#

D[54]#

D[55]#

D[56]#

D[57]#

D[58]#

D[59]#

D[60]#

D[61]#

D[62]#

D[63]# DSTBN[3]# DSTBP[3]#

DINV[3]#

COMP[0] COMP[1] COMP[2] COMP[3]

DPRSTP#

DPSLP#

DPWR#

PWRGOOD

SLP#

PSI#

R1089 0_0 402_5%R1089 0_0 402_5%

1

TRACE CLOSELY CPU < 0.5'

C1162

COMP0, COMP2 layout : Width 18mils and Space 25mils (27.4Ohms)

68P_040 2_50V8K

COMP1, COMP3 layout : Width 4mils and Space 25mils (55Ohms)

2

Y22 AB24 V24 V26 V23 T22 U25 U23 Y25 W22 Y23 W24 W25 AA23 AA24 AB25 Y26 AA26 U22

AE24 AD24 AA21 AB22 AB21 AC26 AD20 AE22 AF23 AC25 AE21 AD21 AC22 AD23 AF22 AC23 AE25 AF24 AC20

R26 U26 AA1 Y1

E5 B5 D24 D6 D7 AE6

COMP0 COMP1 COMP2 COMP3

12

H_D#32 H_D#33 H_D#34 H_D#35 H_D#36 H_D#37 H_D#38 H_D#39 H_D#40 H_D#41 H_D#42 H_D#43 H_D#44 H_D#45 H_D#46 H_D#47 H_DSTBN #2 H_DSTBP #2 H_DINV#2

H_D#48 H_D#49 H_D#50 H_D#51 H_D#52 H_D#53 H_D#54 H_D#55 H_D#56 H_D#57 H_D#58 H_D#59 H_D#60 H_D#61 H_D#62 H_D#63 H_DSTBN #3 H_DSTBP #3 H_DINV#3

R63 27.4_040 2_1%R63 27.4_040 2_1%

1 2

R64 54.9_040 2_1%R64 54.9_040 2_1%

1 2

R10 27.4_040 2_1%R10 27.4_040 2_1%

1 2

R9 54.9_04 02_1%R9 54.9_ 0402_1%

H_DPRST P#_R H_DPSLP # H_DPW R# H_PW RGOOD H_CPUSL P# H_PSI#

1 2

H_DPRST P# (27,49)H_DPRST P#_R(8)

H_D#[32..4 7] (8)

H_DSTBN #2 (8) H_DSTBP #2 (8) H_DINV#2 (8) H_D#[48..6 3] (8)

H_DSTBN #3 (8) H_DSTBP #3 (8) H_DINV#3 (8)

H_DPSLP # (27) H_DPW R# (8) H_PW RGOOD (27) H_CPUSL P# (8)

H_PSI# (49)

layout note: Route TEST3 & TEST5 traces on ground referenced layer to the TPs

FSB

BCLK BSEL2 BSEL1 BSEL0

533

667

800

133

166

200

0 0 1

110

1 00

1067 266 0 0 0

Close to CPU pin AD26 within 500mils.

5

4

Security Class ification

2007/10/ 15 2008/10/ 15

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2007/10/ 15 2008/10/ 15

3

Compal Secret Data

Deciphered Date

CONN@

JCPUC

AA10 AA12 AA13 AA15 AA17 AA18 AA20

AC10 AB10 AB12 AB14 AB15 AB17 AB18

A10 A12 A13 A15 A17 A18 A20

B10 B12 B14 B15 B17 B18 B20

C10 C12 C13 C15 C17 C18

D10 D12 D14 D15 D17 D18

E10 E12 E13 E15 E17 E18 E20

F10 F12 F14 F15 F17 F18 F20 AA7 AA9

AB9

A7

VCC[001]

A9

VCC[002] VCC[003] VCC[004] VCC[005] VCC[006] VCC[007] VCC[008] VCC[009]

B7

VCC[010]

B9

VCC[011] VCC[012] VCC[013] VCC[014] VCC[015] VCC[016] VCC[017] VCC[018]

C9

VCC[019] VCC[020] VCC[021] VCC[022] VCC[023] VCC[024] VCC[025]

D9

VCC[026] VCC[027] VCC[028] VCC[029] VCC[030] VCC[031] VCC[032]

E7

VCC[033]

E9

VCC[034] VCC[035] VCC[036] VCC[037] VCC[038] VCC[039] VCC[040] VCC[041]

F7

VCC[042]

F9

VCC[043] VCC[044] VCC[045] VCC[046] VCC[047] VCC[048] VCC[049] VCC[050] VCC[051] VCC[052] VCC[053] VCC[054] VCC[055] VCC[056] VCC[057] VCC[058] VCC[059] VCC[060] VCC[061] VCC[062] VCC[063] VCC[064]

VCCSENSE VCC[065] VCC[066] VCC[067]

VSSSENSE

Penryn

VCC[068] VCC[069] VCC[070] VCC[071] VCC[072] VCC[073] VCC[074] VCC[075] VCC[076] VCC[077] VCC[078] VCC[079] VCC[080] VCC[081] VCC[082] VCC[083] VCC[084] VCC[085] VCC[086] VCC[087] VCC[088] VCC[089] VCC[090] VCC[091] VCC[092] VCC[093] VCC[094] VCC[095] VCC[096] VCC[097] VCC[098] VCC[099] VCC[100]

VCCP[01] VCCP[02] VCCP[03] VCCP[04] VCCP[05] VCCP[06] VCCP[07] VCCP[08] VCCP[09] VCCP[10] VCCP[11] VCCP[12] VCCP[13] VCCP[14] VCCP[15] VCCP[16]

VCCA[01] VCCA[02]

VID[0] VID[1] VID[2] VID[3] VID[4] VID[5] VID[6]

AB20 AB7 AC7 AC9 AC12 AC13 AC15 AC17 AC18 AD7 AD9 AD10 AD12 AD14 AD15 AD17 AD18 AE9 AE10 AE12 AE13 AE15 AE17 AE18 AE20 AF9 AF10 AF12 AF14 AF15 AF17 AF18 AF20

R47 0_0402_ 5%R47 0_04 02_5%

G21 V6

R8 0 _0402_5%R8 0_0402_ 5%

J6 K6 M6 J21 K21 M21 N21 N6 R21 R6 T21 T6 V21 W21

B26 C26

AD6 AF5 AE5 AF4 AE3 AF3 AE2

AF7

AE7

.

For testing purpose only

12 12

VCCSENS E

VSSSENS E

Length match within 25 mils. The trace width/space/other is 16/7/25.

Layout Note: Route VCCSENSE and VSSSENSE traces at

27.4 Ohms with 50 mil spacing. Place PU and PD within 1 inch of CPU. Length matched to within 25 mils.

Title

Size Document Nu mber Rev

B

Date: Sheet of

2

Date: Sheet of

+VCCP

Near pin B26

20mils

CPU_VID0 (49) CPU_VID1 (49) CPU_VID2 (49) CPU_VID3 (49) CPU_VID4 (49) CPU_VID5 (49) CPU_VID6 (49)

VCCSENS E (49)

VSSSENS E (49)

+CPU_CO RE

1

C599

2

R23

R23 100_040 2_1%

100_040 2_1%

1 2

R24

R24 100_040 2_1%

100_040 2_1%

1 2

10U_0805_10V4Z

+1.5VS

1

C598

2

0.01U_0402_16V7K

VCCSENS E

VSSSENS E

Close to CPU pin within 500mils.

Compal Electronics, Inc.

Penryn (2/3)

KIWAX_LA-5082P

6 53Wednesd ay, March 18, 20 09

1

0.4

5

CONN@

JCPUD

A4

VSS[001]

A8

VSS[002]

A11

VSS[003]

A14

VSS[004]

A16

VSS[005]

A19

VSS[006]

A23

VSS[007]

D D

C C

B B

AF2

VSS[008]

B6

VSS[009]

B8

VSS[010]

B11

VSS[011]

B13

VSS[012]

B16

VSS[013]

B19

VSS[014]

B21

VSS[015]

B24

VSS[016]

C5

VSS[017]

C8

VSS[018]

C11

VSS[019]

C14

VSS[020]

C16

VSS[021]

C19

VSS[022]

C2

VSS[023]

C22

VSS[024]

C25

VSS[025]

D1

VSS[026]

D4

VSS[027]

D8

VSS[028]

D11

VSS[029]

D13

VSS[030]

D16

VSS[031]

D19

VSS[032]

D23

VSS[033]

D26

VSS[034]

E3

VSS[035]

E6

VSS[036]

E8

VSS[037]

E11

VSS[038]

E14

VSS[039]

E16

VSS[040]

E19

VSS[041]

E21

VSS[042]

E24

VSS[043]

F5

VSS[044]

F8

VSS[045]

F11

VSS[046]

F13

VSS[047]

F16

VSS[048]

F19

VSS[049]

F2

VSS[050]

F22

VSS[051]

F25

VSS[052]

G4

VSS[053]

G1

VSS[054]

G23

VSS[055]

G26

VSS[056]

H3

VSS[057]

H6

VSS[058]

H21

VSS[059]

H24

VSS[060]

J2

VSS[061]

J5

VSS[062]

J22

VSS[063]

J25

VSS[064]

K1

VSS[065]

K4

VSS[066]

K23

VSS[067]

K26

VSS[068]

L3

VSS[069]

L6

VSS[070]

L21

VSS[071]

L24

VSS[072]

M2

VSS[073]

M5

VSS[074]

M22

VSS[075]

M25

VSS[076]

N1

VSS[077]

N4

VSS[078]

N23

VSS[079]

N26

VSS[080] VSS[081]P3VSS[162]

Penryn

VSS[082] VSS[083] VSS[084] VSS[085] VSS[086] VSS[087] VSS[088] VSS[089] VSS[090] VSS[091] VSS[092] VSS[093] VSS[094] VSS[095] VSS[096] VSS[097] VSS[098] VSS[099] VSS[100] VSS[101] VSS[102] VSS[103] VSS[104] VSS[105] VSS[106] VSS[107] VSS[108] VSS[109] VSS[110] VSS[111] VSS[112] VSS[113] VSS[114] VSS[115] VSS[116] VSS[117] VSS[118] VSS[119] VSS[120] VSS[121] VSS[122] VSS[123] VSS[124] VSS[125] VSS[126] VSS[127] VSS[128] VSS[129] VSS[130] VSS[131] VSS[132] VSS[133] VSS[134] VSS[135] VSS[136] VSS[137] VSS[138] VSS[139] VSS[140] VSS[141] VSS[142] VSS[143] VSS[144] VSS[145] VSS[146] VSS[147] VSS[148] VSS[149] VSS[150] VSS[151] VSS[152] VSS[153] VSS[154] VSS[155] VSS[156] VSS[157] VSS[158] VSS[159] VSS[160] VSS[161]

VSS[163]

P6 P21 P24 R2 R5 R22 R25 T1 T4 T23 T26 U3 U6 U21 U24 V2 V5 V22 V25 W1 W4 W23 W26 Y3 Y6 Y21 Y24 AA2 AA5 AA8 AA11 AA14 AA16 AA19 AA22 AA25 AB1 AB4 AB8 AB11 AB13 AB16 AB19 AB23 AB26 AC3 AC6 AC8 AC11 AC14 AC16 AC19 AC21 AC24 AD2 AD5 AD8 AD11 AD13 AD16 AD19 AD22 AD25 AE1 AE4 AE8 AE11 AE14 AE16 AE19 AE23 AE26 A2 AF6 AF8 AF11 AF13 AF16 AF19 AF21 A25 AF25

.

REMOVE?

220U_D2 _4VM

4

Place these capacitors on L8 (North side,Secondary Layer)

Place these capacitors on L8 (Sorth side,Secondary Layer)

+VCCP

1

+

C8

2

1

C11

0.1U_040 2_16V4Z

2

+CPU_CO RE

1

C13

C13 10U_080 5_6.3V6M

10U_080 5_6.3V6M

2

+CPU_CO RE

1

@

C28

C28 10U_080 5_6.3V6M

10U_080 5_6.3V6M

2

+CPU_CO RE

1

C583

C583 10U_080 5_6.3V6M

10U_080 5_6.3V6M

2

+CPU_CO RE

1

C588

C588 10U_080 5_6.3V6M

10U_080 5_6.3V6M

2

South Side Secondary

1

C10

0.1U_040 2_16V4Z

2

1

C39

C39 10U_080 5_6.3V6M

10U_080 5_6.3V6M

2

1

@

C24

C24 10U_080 5_6.3V6M

10U_080 5_6.3V6M

2

1

C585

C585 10U_080 5_6.3V6M

10U_080 5_6.3V6M

2

1

C587

C587 10U_080 5_6.3V6M

10U_080 5_6.3V6M

2

+CPU_CO RE

C47

1

2

3

1

+

2

330U_D2_2.5VY_R9M

C51

0.1U_040 2_16V4Z

1

C36

C36 10U_080 5_6.3V6M

10U_080 5_6.3V6M

2

1

C40

C40 10U_080 5_6.3V6M

10U_080 5_6.3V6M

2

1

C586

C586 10U_080 5_6.3V6M

10U_080 5_6.3V6M

2

1

C590

C590 10U_080 5_6.3V6M

10U_080 5_6.3V6M

2

1

+

C17

2

330U_D2_2.5VY_R9M

1

2

@

1

+

C41

2

330U_D2_2.5VY_R9M

C50

0.1U_040 2_16V4Z

1

C30

C30 10U_080 5_6.3V6M

10U_080 5_6.3V6M

2

1

C37

C37 10U_080 5_6.3V6M

10U_080 5_6.3V6M

2

1

C589

C589 10U_080 5_6.3V6M

10U_080 5_6.3V6M

2

1

C592

C592 10U_080 5_6.3V6M

10U_080 5_6.3V6M

2

1

+

C16

2

330U_D2_2.5VY_R9M

1

2

C48

0.1U_040 2_16V4Z

2

1

C27

C27 10U_080 5_6.3V6M

10U_080 5_6.3V6M

2

1

C31

C31 10U_080 5_6.3V6M

10U_080 5_6.3V6M

2

1

C591

C591 10U_080 5_6.3V6M

10U_080 5_6.3V6M

2

1

C35

C35 10U_080 5_6.3V6M

10U_080 5_6.3V6M

2

North Side Secondary

1

C9

0.1U_040 2_16V4Z

2

1

C19

C19 10U_080 5_6.3V6M

10U_080 5_6.3V6M

2

1

C26

C26 10U_080 5_6.3V6M

10U_080 5_6.3V6M

2

1

C593

C593 10U_080 5_6.3V6M

10U_080 5_6.3V6M

2

1

@

C29

C29 10U_080 5_6.3V6M

10U_080 5_6.3V6M

2

Place these inside socket cavity on L8 (North side Secondary)

1

C14

C14 10U_080 5_6.3V6M

10U_080 5_6.3V6M

2

1

C20

C20 10U_080 5_6.3V6M

10U_080 5_6.3V6M

2

1

C582

C582 10U_080 5_6.3V6M

10U_080 5_6.3V6M

2

1

C25

C25 10U_080 5_6.3V6M

10U_080 5_6.3V6M

2

1

C12

C12 10U_080 5_6.3V6M

10U_080 5_6.3V6M

2

1

C15

C15 10U_080 5_6.3V6M

10U_080 5_6.3V6M

2

1

C584

C584 10U_080 5_6.3V6M

10U_080 5_6.3V6M

2

1

C33

C33 10U_080 5_6.3V6M

10U_080 5_6.3V6M

2

Mid Frequence Decoupling

ESR <= 1.5m ohm Capacitor > 1980uF

1

@

A A

Security Class ification

2007/10/ 15 2008/10/ 15

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2007/10/ 15 2008/10/ 15

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Nu mber Rev

B

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

Penryn (3/3)

KIWAX_LA-5082P

7 53Wednesd ay, March 18, 20 09

1

0.4

5

H_D#[0..63](6)

D D

C C

H_SWNG H_RCOMP

H_RESET#(5) H_CPUSLP#(6)

layout note:

Route H_SCOMP and H_SCOMP# with trace width spacing and impedance (55 ohm) same as FSB data traces

B B

+VCCP

12

R493

12

R488

H_RESET# H_CPUSLP#

H_VREF

Layout Note: H_RCOMP / H_VREF / H_SWNG

trace width and spacing is 10/20

1K_0402_1%

0.1U_0402_16V4Z

1

C623

2

2K_0402_1%

within 100 mils from NB

H_D#0 H_D#1 H_D#2 H_D#3 H_D#4 H_D#5 H_D#6 H_D#7 H_D#8 H_D#9 H_D#10 H_D#11 H_D#12 H_D#13 H_D#14 H_D#15 H_D#16 H_D#17 H_D#18 H_D#19 H_D#20 H_D#21 H_D#22 H_D#23 H_D#24 H_D#25 H_D#26 H_D#27 H_D#28 H_D#29 H_D#30 H_D#31 H_D#32 H_D#33 H_D#34 H_D#35 H_D#36 H_D#37 H_D#38 H_D#39 H_D#40 H_D#41 H_D#42 H_D#43 H_D#44 H_D#45 H_D#46 H_D#47 H_D#48 H_D#49 H_D#50 H_D#51 H_D#52 H_D#53 H_D#54 H_D#55 H_D#56 H_D#57 H_D#58 H_D#59 H_D#60 H_D#61 H_D#62 H_D#63

R89

U26A

F2

H_D#_0

G8

H_D#_1

F8

H_D#_2

E6

H_D#_3

G2

H_D#_4

H6

H_D#_5

H2

H_D#_6

F6

H_D#_7

D4

H_D#_8

H3

H_D#_9

M9

H_D#_10

M11

H_D#_11

J1

H_D#_12

J2

H_D#_13

N12

H_D#_14

J6

H_D#_15

P2

H_D#_16

L2

H_D#_17

R2

H_D#_18

N9

H_D#_19

L6

H_D#_20

M5

H_D#_21

J3

H_D#_22

N2

H_D#_23

R1

H_D#_24

N5

H_D#_25

N6

H_D#_26

P13

H_D#_27

N8

H_D#_28

L7

H_D#_29

N10

H_D#_30

M3

H_D#_31

Y3

H_D#_32

AD14

H_D#_33

Y6

H_D#_34

Y10

H_D#_35

Y12

H_D#_36

Y14

H_D#_37

Y7

H_D#_38

W2

H_D#_39

AA8

H_D#_40

Y9

H_D#_41

AA13

H_D#_42

AA9

H_D#_43

AA11

H_D#_44

AD11

H_D#_45

AD10

H_D#_46

AD13

H_D#_47

AE12

H_D#_48

AE9

H_D#_49

AA2

H_D#_50

AD8

H_D#_51

AA3

H_D#_52

AD3

H_D#_53

AD7

H_D#_54

AE14

H_D#_55

AF3

H_D#_56

AC1

H_D#_57

AE3

H_D#_58

AC3

H_D#_59

AE11

H_D#_60

AE8

H_D#_61

AG2

H_D#_62

AD6

H_D#_63

C5

H_SWING

E3

H_RCOMP

C12

H_CPURST#

E11

H_CPUSLP#

A11

H_AVREF

B11

H_DVREF

GM45@

H_RCOMP H_SWNGH_VREF

12

24.9_0402_1%

H_A#_3 H_A#_4 H_A#_5 H_A#_6 H_A#_7 H_A#_8

H_A#_9 H_A#_10 H_A#_11 H_A#_12 H_A#_13 H_A#_14 H_A#_15 H_A#_16 H_A#_17 H_A#_18 H_A#_19 H_A#_20 H_A#_21 H_A#_22 H_A#_23 H_A#_24 H_A#_25 H_A#_26 H_A#_27 H_A#_28 H_A#_29 H_A#_30 H_A#_31 H_A#_32 H_A#_33 H_A#_34 H_A#_35

H_ADS#

H_ADSTB#_0 H_ADSTB#_1

H_BNR#

H_BPRI#

H_BREQ#

H_DEFER#

HOST

H_DBSY#

HPLL_CLK

HPLL_CLK#

H_DPWR#

H_DRDY#

H_HITM#

H_LOCK# H_TRDY#

H_DINV#_0 H_DINV#_1 H_DINV#_2 H_DINV#_3

H_DSTBN#_0 H_DSTBN#_1 H_DSTBN#_2 H_DSTBN#_3

H_DSTBP#_0 H_DSTBP#_1 H_DSTBP#_2 H_DSTBP#_3

H_REQ#_0 H_REQ#_1 H_REQ#_2 H_REQ#_3 H_REQ#_4

H_RS#_0 H_RS#_1 H_RS#_2

CANTIGA ES_FCBGA1329

+VCCP

12

R482

221_0603_1%

12

R484

100_0402_1%

H_HIT#

H_A#3

A14

H_A#4

C15

H_A#5

F16

H_A#6

H13

H_A#7

C18

H_A#8

M16

H_A#9

J13

H_A#10

P16

H_A#11

R16

H_A#12

N17

H_A#13

M13

H_A#14

E17

H_A#15

P17

H_A#16

F17

H_A#17

G20

H_A#18

B19

H_A#19

J16

H_A#20

E20

H_A#21

H16

H_A#22

J20

H_A#23

L17

H_A#24

A17

H_A#25

B17

H_A#26

L16

H_A#27

C21

H_A#28

J17

H_A#29

H20

H_A#30

B18

H_A#31

K17

H_A#32

B20

H_A#33

F21

H_A#34

K21

H_A#35

L20

H_ADS#

H12

H_ADSTB#0

B16

H_ADSTB#1

G17

H_BNR#

A9

H_BPRI#

F11

H_BR0#

G12

H_DEFER#

E9

H_DBSY#

B10

CLK_MCH_BCLK

AH7

CLK_MCH_BCLK#

AH6

H_DPWR#

J11

H_DRDY#

F9

H_HIT#

H9

H_HITM#

E12

H_LOCK#

H11

H_TRDY#

C9

H_DINV#0

J8

H_DINV#1

L3

H_DINV#2

Y13

H_DINV#3

Y1

H_DSTBN#0

L10

H_DSTBN#1

M7

H_DSTBN#2

AA5

H_DSTBN#3

AE6

H_DSTBP#0

L9

H_DSTBP#1

M8

H_DSTBP#2

AA6

H_DSTBP#3

AE5

H_REQ#0

B15

H_REQ#1

K13

H_REQ#2

F13

H_REQ#3

B13

H_REQ#4

B14

H_RS#0

B6

H_RS#1

F12

H_RS#2

C8

1

C616

2

0.1U_0402_16V4Z

Near B3 pin

4

H_A#[3..35] (5)

H_ADS# (5) H_ADSTB#0 (5) H_ADSTB#1 (5) H_BNR# (5) H_BPRI# (5) H_BR0# (5) H_DEFER# (5) H_DBSY# (5) CLK_MCH_BCLK (22) CLK_MCH_BCLK# (22) H_DPWR# (6) H_DRDY# (5) H_HIT# (5) H_HITM# (5) H_LOCK# (5) H_TRDY# (5)

H_DINV#0 (6) H_DINV#1 (6) H_DINV#2 (6) H_DINV#3 (6)

H_DSTBN#0 (6) H_DSTBN#1 (6) H_DSTBN#2 (6) H_DSTBN#3 (6)

H_DSTBP#0 (6) H_DSTBP#1 (6) H_DSTBP#2 (6) H_DSTBP#3 (6)

H_REQ#0 (5) H_REQ#1 (5) H_REQ#2 (5) H_REQ#3 (5) H_REQ#4 (5)

H_RS#0 (5) H_RS#1 (5) H_RS#2 (5)

ICH_POK(28,36)

PLT_RST#(16,26,30,31)

+DDR_MCH_REF

+3VS

R206

10K_0402_5%

VGATE(28,49)

Layout Note: V_DDR_MCH_REF trace width and spacing is 20/20.

C641

2.2U_0603_6.3V4Z

SMRCOMP_VOH

SMRCOMP_VOL

C635

2.2U_0603_6.3V4Z

12

R217

R217 10K_0402_5%

10K_0402_5%

12

R177 0_0402_5%R177 0_0402_5%

12

R178 0_0402_5%@R178 0_0402_5%@

1 2

R103 100_0402_5%R103 100_0402_5%

+DDR_MCH_REF

1

10K_0402_5%

C273

2

0.1U_0402_16V4Z

2

1

C640

1

2

C636

PM_EXTTS#0

PM_EXTTS#1

R162

+1.5V

0.01U_0402_16V7K

PM_POK_R

0309 add

PLT_RST#_R

12

R185

R185 10K_0402_5%

10K_0402_5%

12

R126

1K_0402_1%

12

R501

3.01K_0402_1%

NA lead free

12

R500

1K_0402_1%

MCH_CLKSEL0(22) MCH_CLKSEL1(22) MCH_CLKSEL2(22)

PM_BMBUSY#(28)

H_DPRSTP#_R(6) PM_EXTTS#0(14,15) PM_EXTTS#1

H_THERMTRIP#(5,27)

DPRSLPVR(28,49)

CFG5

3

MCH_CLKSEL0 MCH_CLKSEL1 MCH_CLKSEL2

CFG5 CFG6

T48T48

CFG7

T47T47

CFG8

T45T45

CFG9

T41T41

CFG10

T50T50

CFG11

T49T49

CFG12

T39T39

CFG13

T43T43

CFG14

T38T38

CFG15

T37T37

CFG16

T46T46

CFG17

T42T42

CFG18

T55T55

CFG19

T53T53

CFG20

T54T54

PM_BMBUSY# H_DPRSTP#_R PM_EXTTS#0 PM_EXTTS#1 PM_POK_R PLT_RST#_R H_THERMTRIP# DPRSLPVR

U26B

M36

T69T69

RSVD1

N36

T70T70

RSVD2

R33

T58T58

RSVD3

T33

T66T66

RSVD4

AH9

T23T23

RSVD5

AH10

T25T25

RSVD6

AH12

T27T27

RSVD7

AH13

T30T30

RSVD8

K12

T26T26

RSVD9

AL34

T62T62

RSVD10

AK34

T61T61

RSVD11

AN35

T67T67

RSVD12

AM35

T68T68

RSVD13

T24

T44T44

RSVD14

B31

T56T56

RSVD15

B2

T84T84

RSVD16

M1

T83T83

RSVD17

AY21

T40T40

RSVD20

BG23

T87T87

RSVD22

BF23

T88T88

RSVD23

BH18

T34T34

RSVD24

BF18

T35T35

RSVD25

T25

CFG_0

R25

CFG_1

P25

CFG_2

P20

CFG_3

P24

CFG_4

C25

CFG_5

N24

CFG_6

M24

CFG_7

E21

CFG_8

C23

CFG_9

C24

CFG_10

N21

CFG_11

P21

CFG_12

T21

CFG_13

R20

CFG_14

M20

CFG_15

L21

CFG_16

H21

CFG_17

P29

CFG_18

R28

CFG_19

T28

CFG_20

R29

PM_SYNC#

B7

PM_DPRSTP#

N33

PM_EXT_TS#_0

P32

PM_EXT_TS#_1

AT40

PWROK

AT11

RSTIN#

T20

THERMTRIP#

R32

DPRSLPVR

BG48

NC_1

BF48

NC_2

BD48

NC_3

BC48

NC_4

BH47

NC_5

BG47

NC_6

BE47

NC_7

BH46

NC_8

BF46

NC_9

BG45

NC_10

BH44

NC_11

BH43

NC_12

BH6

NC_13

BH5

NC_14

BG4

NC_15

BH3

NC_16

BF3

NC_17

BH2

NC_18

BG2

NC_19

BE2

NC_20

BG1

NC_21

BF1

NC_22

BD1

NC_23

BC1

NC_24

F1

NC_25

A47

NC_26

GM45@

RSVD CFG PM NC

SM_RCOMP_VOH SM_RCOMP_VOL

DDR CLK/ CONTROL/ COMPENSATIONHDA

DPLL_REF_SSCLK

DPLL_REF_SSCLK#

CLKDMIGRAPHICS VIDMEMISC

DDPC_CTRLDATA

SDVO_CTRLDATA

CANTIGA ES_FCBGA1329

SA_CK_0 SA_CK_1 SB_CK_0 SB_CK_1

SA_CK#_0 SA_CK#_1 SB_CK#_0 SB_CK#_1

SA_CKE_0 SA_CKE_1 SB_CKE_0 SB_CKE_1

SA_CS#_0 SA_CS#_1 SB_CS#_0 SB_CS#_1

SA_ODT_0 SA_ODT_1 SB_ODT_O SB_ODT_1

SM_RCOMP

SM_RCOMP#

SM_VREF

SM_PWROK

SM_REXT

SM_DRAMRST#

DPLL_REF_CLK

DPLL_REF_CLK#

PEG_CLK

PEG_CLK#

DMI_RXN_0 DMI_RXN_1 DMI_RXN_2 DMI_RXN_3

DMI_RXP_0 DMI_RXP_1 DMI_RXP_2 DMI_RXP_3

DMI_TXN_0 DMI_TXN_1 DMI_TXN_2 DMI_TXN_3

DMI_TXP_0 DMI_TXP_1 DMI_TXP_2 DMI_TXP_3

GFX_VID_0 GFX_VID_1 GFX_VID_2 GFX_VID_3 GFX_VID_4

GFX_VR_EN

CL_CLK

CL_DATA

CL_PWROK

CL_RST#

CL_VREF

DDPC_CTRLCLK

SDVO_CTRLCLK

CLKREQ#

ICH_SYNC#

TSATN#

HDA_BCLK HDA_RST#

HDA_SDI

HDA_SDO

HDA_SYNC

2

M_CLK_DDR0

AP24

M_CLK_DDR1

AT21

M_CLK_DDR2

AV24

M_CLK_DDR3

AU20

M_CLK_DDR#0

AR24

M_CLK_DDR#1

AR21

M_CLK_DDR#2

AU24

M_CLK_DDR#3

AV20

DDR_CKE0_DIMMA

BC28

DDR_CKE1_DIMMA

AY28

DDR_CKE2_DIMMB

AY36

DDR_CKE3_DIMMB

BB36

DDR_CS0_DIMMA#

BA17

DDR_CS1_DIMMA#

AY16

DDR_CS2_DIMMB#

AV16

DDR_CS3_DIMMB#

AR13

M_ODT0

BD17

M_ODT1

AY17

M_ODT2

BF15

M_ODT3

AY13

SMRCOMP

BG22

SMRCOMP#

BH21

SMRCOMP_VOH

BF28

SMRCOMP_VOL

BH28

+DDR_MCH_REF

AV42

SM_PWROK

AR36

SM_REXT

BF17

TP_SM_DRAMRST#

BC36

CLK_MCH_DREFCLK

B38

CLK_MCH_DREFCLK#

A38

MCH_SSCDREFCLK

E41

MCH_SSCDREFCLK#

F41

CLK_MCH_3GPLL

F43

CLK_MCH_3GPLL#

E43

DMI_TXN0

AE41

DMI_TXN1

AE37

DMI_TXN2

AE47

DMI_TXN3

AH39

DMI_TXP0

AE40

DMI_TXP1

AE38

DMI_TXP2

AE48

DMI_TXP3

AH40

DMI_RXN0

AE35

DMI_RXN1

AE43

DMI_RXN2

AE46

DMI_RXN3

AH42

DMI_RXP0

AD35

DMI_RXP1

AE44

DMI_RXP2

AF46

DMI_RXP3

AH43

B33

T90 PADT90 PAD

B32

T89 PADT89 PAD

G33

T65 PADT65 PAD

F33

T64 PADT64 PAD

E33

T63 PADT63 PAD

C34

T91T91

For AMT function

CL_CLK0

AH37

CL_DATA0

AH36 AN36

CL_RST#

AJ35

CL_VREF

AH34

N28 M28

HDMICLK_NB

G36

HDMIDAT_NB

E36

MCH_CLKREQ#

K36

MCH_ICH_SYNC#

H36

B12

MCH_HDA_BCLK

B28

MCH_HDA_RST#

B30

MCH_HDA_SDIN

B29

MCH_HDA_SDOUT

C29

MCH_HDA_SYNC

A28

M_CLK_DDR0 (14) M_CLK_DDR1 (14) M_CLK_DDR2 (15) M_CLK_DDR3 (15)

M_CLK_DDR#0 (14) M_CLK_DDR#1 (14) M_CLK_DDR#2 (15) M_CLK_DDR#3 (15)

DDR_CKE0_DIMMA (14) DDR_CKE1_DIMMA (14) DDR_CKE2_DIMMB (15) DDR_CKE3_DIMMB (15)

DDR_CS0_DIMMA# (14) DDR_CS1_DIMMA# (14) DDR_CS2_DIMMB# (15) DDR_CS3_DIMMB# (15)

M_ODT0 (14) M_ODT1 (14) M_ODT2 (15) M_ODT3 (15)

R497 80.6_0402_1%R497 80.6_0402_1%

1 2

SM_DRAMRST# (14,15)

DDR3

CLK_MCH_DREFCLK (22) CLK_MCH_DREFCLK# (22)

MCH_SSCDREFCLK (22)

MCH_SSCDREFCLK# (22)

CLK_MCH_3GPLL (22) CLK_MCH_3GPLL# (22)

DMI_TXN0 (28) DMI_TXN1 (28) DMI_TXN2 (28) DMI_TXN3 (28)

DMI_TXP0 (28) DMI_TXP1 (28) DMI_TXP2 (28) DMI_TXP3 (28)

DMI_RXN0 (28) DMI_RXN1 (28) DMI_RXN2 (28) DMI_RXN3 (28)

DMI_RXP0 (28) DMI_RXP1 (28) DMI_RXP2 (28) DMI_RXP3 (28)

connect to power CPU_CORE

CL_CLK0 (28) CL_DATA0 (28)

M_PWROK (28) CL_RST# (28)

T52T52 T51T51

1 2

56_0402_5%

R105

R80 0_0402_5%GM_HDMI@R80 0_0402_5%GM_HDMI@

1 2

R82 0_0402_5%GM_HDMI@R82 0_0402_5%GM_HDMI@

1 2

R79 33_0402_5%GM_HDMI@R79 33_0402_5%GM_HDMI@

1 2

R85 0_0402_5%GM_HDMI@R85 0_0402_5%GM_HDMI@

1 2

R81 0_0402_5%GM_HDMI@R81 0_0402_5%GM_HDMI@

1 2

Notice: Please check HDA power rail to select HDA controller.

20mil

R483 0_0402_5%R483 0_0402_5%

1 2

R175 12K_0402_5%

1 2

@

R148 10K_0402_5%@R148 10K_0402_5%@

1 2 1 2

0.1U_0402_16V4Z

C238

HDMICLK_NB (23) HDMIDAT_NB (23)

C238

MCH_CLKREQ# (22) MCH_ICH_SYNC# (28)

TSATN# (36)

+VCCP

1

+1.5V

R125

80.6_0402_1%

1 2

For Crestline: 20ohm For Calero: 80.6ohm For Cantiga: 80.6ohm

R111

R111 499_0402_1%

499_0402_1%

MCH_HDA_BCLK

+VCCP

12

R143

1K_0402_1%

1

R147

R147 499_0402_1%

499_0402_1%

2

HDA_BITCLK_CODEC (16,27,34)

HDA_RST_CODEC# (16,27,34) HDA_SDIN0 (27) HDA_SDOUT_CODEC (16,27,34)

HDA_SYNC_CODEC (16,27,34)

1.5V_PGOOD (47) DDR3_SM_PWROK (36)

C646

10P_0402_50V8J

@

1

2

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

5

4

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

3

2007/10/15 2008/10/15

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Document Number Rev

C

Date: Sheet of

Compal Electronics, Inc.

Cantiga GMCH(1/6)-GTL

KIWAX_LA-5082P

1

8 53Wednesday, March 18, 2009

0.4

5

D D

4

3

2

1

DDR_A_D [0..63](14) DDR_B_D [0..63](15)

C C

B B

DDR_A_D 0 DDR_A_D 1 DDR_A_D 2 DDR_A_D 3 DDR_A_D 4 DDR_A_D 5 DDR_A_D 6 DDR_A_D 7 DDR_A_D 8

DDR_A_D 9 DDR_A_D 10 DDR_A_D 11 DDR_A_D 12 DDR_A_D 13 DDR_A_D 14 DDR_A_D 15 DDR_A_D 16 DDR_A_D 17 DDR_A_D 18 DDR_A_D 19 DDR_A_D 20 DDR_A_D 21 DDR_A_D 22 DDR_A_D 23 DDR_A_D 24 DDR_A_D 25 DDR_A_D 26 DDR_A_D 27 DDR_A_D 28 DDR_A_D 29 DDR_A_D 30 DDR_A_D 31 DDR_A_D 32 DDR_A_D 33 DDR_A_D 34 DDR_A_D 35 DDR_A_D 36 DDR_A_D 37 DDR_A_D 38 DDR_A_D 39 DDR_A_D 40 DDR_A_D 41 DDR_A_D 42 DDR_A_D 43 DDR_A_D 44 DDR_A_D 45 DDR_A_D 46 DDR_A_D 47 DDR_A_D 48 DDR_A_D 49 DDR_A_D 50 DDR_A_D 51 DDR_A_D 52 DDR_A_D 53 DDR_A_D 54 DDR_A_D 55 DDR_A_D 56 DDR_A_D 57 DDR_A_D 58 DDR_A_D 59 DDR_A_D 60 DDR_A_D 61 DDR_A_D 62 DDR_A_D 63

AJ38

AJ41 AN38 AM38

AJ36

AJ40 AM44 AM42 AN43 AN44 AU40

AT38 AN41 AN39 AU44 AU42 AV39 AY44 BA40 BD43 AV41 AY43 BB41 BC40 AY37 BD38 AV37

AT36 AY38 BB38 AV36

AW36

BD13 AU11 BC11 BA12 AU13 AV13 BD12 BC12

BB9 BA9

AU10

AV9

BA11

BD9 AY8 BA6 AV5 AV7 AT9 AN8 AU5 AU6

AT5 AN10 AM11

AM5

AN12 AM13

AJ11 AJ12

AJ9 AJ8

U26D

SA_DQ_0 SA_DQ_1 SA_DQ_2 SA_DQ_3 SA_DQ_4 SA_DQ_5 SA_DQ_6 SA_DQ_7 SA_DQ_8 SA_DQ_9 SA_DQ_10 SA_DQ_11 SA_DQ_12 SA_DQ_13 SA_DQ_14 SA_DQ_15 SA_DQ_16 SA_DQ_17 SA_DQ_18 SA_DQ_19 SA_DQ_20 SA_DQ_21 SA_DQ_22 SA_DQ_23 SA_DQ_24 SA_DQ_25 SA_DQ_26 SA_DQ_27 SA_DQ_28 SA_DQ_29 SA_DQ_30 SA_DQ_31 SA_DQ_32 SA_DQ_33 SA_DQ_34 SA_DQ_35 SA_DQ_36 SA_DQ_37 SA_DQ_38 SA_DQ_39 SA_DQ_40 SA_DQ_41 SA_DQ_42 SA_DQ_43 SA_DQ_44 SA_DQ_45 SA_DQ_46 SA_DQ_47 SA_DQ_48 SA_DQ_49 SA_DQ_50 SA_DQ_51 SA_DQ_52 SA_DQ_53 SA_DQ_54 SA_DQ_55 SA_DQ_56 SA_DQ_57 SA_DQ_58 SA_DQ_59 SA_DQ_60 SA_DQ_61 SA_DQ_62 SA_DQ_63

DDR_A_B S#0

BD21

SA_BS_0 SA_BS_1 SA_BS_2

SA_RAS# SA_CAS#

SA_WE#

SA_DM_0 SA_DM_1 SA_DM_2 SA_DM_3 SA_DM_4 SA_DM_5 SA_DM_6 SA_DM_7

SA_DQS_0 SA_DQS_1 SA_DQS_2 SA_DQS_3 SA_DQS_4 SA_DQS_5 SA_DQS_6 SA_DQS_7

SA_DQS#_0 SA_DQS#_1 SA_DQS#_2 SA_DQS#_3 SA_DQS#_4 SA_DQS#_5 SA_DQS#_6 SA_DQS#_7

SA_MA_0 SA_MA_1 SA_MA_2 SA_MA_3

DDR SYSTEM MEMORY A

SA_MA_4 SA_MA_5 SA_MA_6 SA_MA_7 SA_MA_8

SA_MA_9 SA_MA_10 SA_MA_11 SA_MA_12 SA_MA_13 SA_MA_14

CANTIGA ES _FCBGA1329GM45@

DDR_A_B S#1

BG18

DDR_A_B S#2

AT25

DDR_A_R AS#

BB20

DDR_A_C AS#

BD20

DDR_A_W E# DDR_B_C AS#

AY20

DDR_A_D M0

AM37

DDR_A_D M1

AT41

DDR_A_D M2

AY41

DDR_A_D M3

AU39

DDR_A_D M4

BB12

DDR_A_D M5

AY6

DDR_A_D M6

AT7

DDR_A_D M7

AJ5

DDR_A_D QS0

AJ44

DDR_A_D QS1

AT44

DDR_A_D QS2

BA43

DDR_A_D QS3

BC37

DDR_A_D QS4

AW12

DDR_A_D QS5

BC8

DDR_A_D QS6

AU8

DDR_A_D QS7

AM7

DDR_A_D QS#0

AJ43

DDR_A_D QS#1

AT43

DDR_A_D QS#2

BA44

DDR_A_D QS#3

BD37

DDR_A_D QS#4

AY12

DDR_A_D QS#5

BD8

DDR_A_D QS#6

AU9

DDR_A_D QS#7

AM8

DDR_A_M A0

BA21

DDR_A_M A1

BC24

DDR_A_M A2

BG24

DDR_A_M A3

BH24

DDR_A_M A4

BG25

DDR_A_M A5

BA24

DDR_A_M A6

BD24

DDR_A_M A7

BG27

DDR_A_M A8

BF25

DDR_A_M A9

AW24

DDR_A_M A10

BC21

DDR_A_M A11

BG26

DDR_A_M A12

BH26

DDR_A_M A13

BH17

DDR_A_M A14

AY25

DDR_A_B S#0 (14 ) DDR_A_B S#1 (14 ) DDR_A_B S#2 (14 )

DDR_A_R AS# (14) DDR_A_C AS# (14) DDR_A_W E# (14)

DDR_A_D M[0..7] (14)

DDR_A_D QS[0..7] (14)

DDR_A_D QS#[0..7] (14)

DDR_A_M A[0..14] (1 4)

DDR_B_D 0 DDR_B_D 1 DDR_B_D 2 DDR_B_D 3 DDR_B_D 4 DDR_B_D 5 DDR_B_D 6 DDR_B_D 7 DDR_B_D 8

DDR_B_D 9 DDR_B_D 10 DDR_B_D 11 DDR_B_D 12 DDR_B_D 13 DDR_B_D 14 DDR_B_D 15 DDR_B_D 16 DDR_B_D 17 DDR_B_D 18 DDR_B_D 19 DDR_B_D 20 DDR_B_D 21 DDR_B_D 22 DDR_B_D 23 DDR_B_D 24 DDR_B_D 25 DDR_B_D 26 DDR_B_D 27 DDR_B_D 28 DDR_B_D 29 DDR_B_D 30 DDR_B_D 31 DDR_B_D 32 DDR_B_D 33 DDR_B_D 34 DDR_B_D 35 DDR_B_D 36 DDR_B_D 37 DDR_B_D 38 DDR_B_D 39 DDR_B_D 40 DDR_B_D 41 DDR_B_D 42 DDR_B_D 43 DDR_B_D 44 DDR_B_D 45 DDR_B_D 46 DDR_B_D 47 DDR_B_D 48 DDR_B_D 49 DDR_B_D 50 DDR_B_D 51 DDR_B_D 52 DDR_B_D 53 DDR_B_D 54 DDR_B_D 55 DDR_B_D 56 DDR_B_D 57 DDR_B_D 58 DDR_B_D 59 DDR_B_D 60 DDR_B_D 61 DDR_B_D 62 DDR_B_D 63

AK47 AH46 AP47 AP46

AJ46

AJ48 AM48 AP48 AU47 AU46 BA48 AY48

AT47 AR47 BA47 BC47 BC46 BC44 BG43

BF43 BE45 BC41

BF40

BF41 BG38

BF38 BH35 BG35 BH40 BG39 BG34 BH34 BH14 BG12 BH11

BG8

BH12

BF11

BF8 BG7 BC5 BC6 AY3 AY1

BF6

BF5 BA1 BD3 AV2 AU3 AR3 AN2 AY2 AV1 AP3 AR1

AL1

AL2

AJ1 AH1 AM2 AM3 AH3

AJ3

U26E

SB_DQ_0 SB_DQ_1 SB_DQ_2 SB_DQ_3 SB_DQ_4 SB_DQ_5 SB_DQ_6 SB_DQ_7 SB_DQ_8 SB_DQ_9 SB_DQ_10 SB_DQ_11 SB_DQ_12 SB_DQ_13 SB_DQ_14 SB_DQ_15 SB_DQ_16 SB_DQ_17 SB_DQ_18 SB_DQ_19 SB_DQ_20 SB_DQ_21 SB_DQ_22 SB_DQ_23 SB_DQ_24 SB_DQ_25 SB_DQ_26 SB_DQ_27 SB_DQ_28 SB_DQ_29 SB_DQ_30 SB_DQ_31 SB_DQ_32 SB_DQ_33 SB_DQ_34 SB_DQ_35 SB_DQ_36 SB_DQ_37 SB_DQ_38 SB_DQ_39 SB_DQ_40 SB_DQ_41 SB_DQ_42 SB_DQ_43 SB_DQ_44 SB_DQ_45 SB_DQ_46 SB_DQ_47 SB_DQ_48 SB_DQ_49 SB_DQ_50 SB_DQ_51 SB_DQ_52 SB_DQ_53 SB_DQ_54 SB_DQ_55 SB_DQ_56 SB_DQ_57 SB_DQ_58 SB_DQ_59 SB_DQ_60 SB_DQ_61 SB_DQ_62 SB_DQ_63

DDR_B_BS#0

BC16

SB_BS_0 SB_BS_1 SB_BS_2

SB_RAS# SB_CAS#

SB_WE#

SB_DM_0 SB_DM_1 SB_DM_2 SB_DM_3 SB_DM_4 SB_DM_5 SB_DM_6 SB_DM_7

SB_DQS_0 SB_DQS_1 SB_DQS_2 SB_DQS_3 SB_DQS_4 SB_DQS_5 SB_DQS_6 SB_DQS_7

SB_DQS#_0 SB_DQS#_1 SB_DQS#_2 SB_DQS#_3 SB_DQS#_4 SB_DQS#_5 SB_DQS#_6 SB_DQS#_7

SB_MA_0 SB_MA_1 SB_MA_2

DDR SYSTEM MEMORY B

SB_MA_3 SB_MA_4 SB_MA_5 SB_MA_6 SB_MA_7 SB_MA_8

SB_MA_9 SB_MA_10 SB_MA_11 SB_MA_12 SB_MA_13 SB_MA_14

CANTIGA ES _FCBGA1329GM45@

BB17 BB33

AU17 BG16 BF14

AM47 AY47 BD40 BF35 BG11 BA3 AP1 AK2

AL47 AV48 BG41 BG37 BH9 BB2 AU1 AN6

AL46 AV47 BH41 BH37 BG9 BC2 AT2 AN5

AV17 BA25 BC25 AU25 AW25 BB28 AU28 AW28 AT33 BD33 BB16 AW33 AY33 BH15 AU33

DDR_B_B S#1 DDR_B_B S#2

DDR_B_R AS#

DDR_B_W E#

DDR_B_D M0 DDR_B_D M1 DDR_B_D M2 DDR_B_D M3 DDR_B_D M4 DDR_B_D M5 DDR_B_D M6 DDR_B_D M7

DDR_B_D QS0 DDR_B_D QS1 DDR_B_D QS2 DDR_B_D QS3 DDR_B_D QS4 DDR_B_D QS5 DDR_B_D QS6 DDR_B_D QS7

DDR_B_D QS#0 DDR_B_D QS#1 DDR_B_D QS#2 DDR_B_D QS#3 DDR_B_D QS#4 DDR_B_D QS#5 DDR_B_D QS#6 DDR_B_D QS#7

DDR_B_M A0 DDR_B_M A1 DDR_B_M A2 DDR_B_M A3 DDR_B_M A4 DDR_B_M A5 DDR_B_M A6 DDR_B_M A7 DDR_B_M A8

DDR_B_M A9 DDR_B_M A10 DDR_B_M A11 DDR_B_M A12 DDR_B_M A13 DDR_B_M A14

DDR_B_B S#0 (15 ) DDR_B_B S#1 (15 ) DDR_B_B S#2 (15 )

DDR_B_R AS# (15) DDR_B_C AS# (15) DDR_B_W E# (15)

DDR_B_D M[0..7] (15)

DDR_B_D QS[0..7] (15)

DDR_B_D QS#[0..7] (15)

DDR_B_M A[0..14] (1 5)

A A

Security Class ification

2007/10/ 15 2008/10/ 15

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2007/10/ 15 2008/10/ 15

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Nu mber Rev

B

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

Cantiga GMCH (2/6)-DDRII

KIWAX_LA-5082P

9 53Wednesd ay, March 18, 20 09

1

0.4

5

4

3

2

1

Strap Pin Table

CFG[2:0] FSB Freq select

PCIE_MTX_C_GRX_N[0. .15]

PCIE_MTX_C_GRX_P[0. .15]

R90 2.2K_0402_5%G M@R90 2.2K_0402_5%GM@

D D

C C

B B

A A

+3VS

For Cantiga:2.37kohm For Crestline:2.4kohm For Calero: 1.5Kohm

Note: All LVDS data signals/and it's compliments should be routed Differentially

Layout Note: Place 150 Ohmtermination resistors close to GMCH

R121

PM@

0_0402_5%

R127 75_0402_5%

R121 75_0402_5%

R122 75_0402_5%

R132

PM@

0_0402_5%

1 2

R132 150_0402_1%

1 2

R124 150_0402_1%

1 2

R123 150_0402_1%

GMCH_CRT_HSYNC(25)

GMCH_CRT_VSYNC(25)

1 2

R91 2.2K_0402_5%

1 2

GM@

GMCH_ENBKL(24)

LVDS_SCL(24) LVDS_SDA(24) GM_ENVDD( 24)

R122

GM@

R122

0_0402_5%

R127

PM@

0_0402_5%

12

R124

PM@

0_0402_5%

GMCH_CRT_R

GMCH_CRT_G

GMCH_CRT_B

R203 33_0402_1%GM@R203 33_0402_1%GM @

R204 33_0402_1%GM@R204 33_0402_1%GM @

For Cantiga:1.02kohm For Crestline:1.3kohm For Calero: 255ohm

5

+3VS

PM@

R123

0_0402_5%

LVDS_SCL LVDS_SDA

R213 10K_0402_5%R213 10K_0402_5% R159 10K_0402_5%R159 10K_0402_5%

LVDS_SCL LVDS_SDA

1 2

R167 2.37K_0402_1%R167 2.37K_0402_1%

LVDS_ACLK#(24) LVDS_ACLK(24)

LVDS_A0#(24) LVDS_A1#(24) LVDS_A2#(24)

LVDS_A0(24) LVDS_A1(24) LVDS_A2(24)

TVA_DAC

TVB_DAC

TVC_DAC

PM@

GMCH_CRT_B(25)

GMCH_CRT_G(25)

GMCH_CRT_R(25)

GMCH_CRT_CLK(25) GMCH_CRT_DATA(25)

R139

0_0402_5%

PM@

1 2 1 2

GM_ENVDD

0_0402_5%

GMCH_ENBKL

LVDS_ACLK# LVDS_ACLK

LVDS_A0# LVDS_A1# LVDS_A2#

LVDS_A0 LVDS_A1 LVDS_A2

TVA_DAC TVB_DAC TVC_DAC

GMCH_CRT_B

GMCH_CRT_G

GMCH_CRT_R

GMCH_CRT_CLK GMCH_CRT_DATA

R140

PM@

T1T1

T93T93

T94T94

T72T72

T73T73

20mil

12

U26C

L32

L_BKLT_CTRL

G32

L_BKLT_EN

M32

L_CTRL_CLK

M33

L_CTRL_DATA

K33

L_DDC_CLK

J33

L_DDC_DATA

M29

L_VDD_EN

C44

LVDS_IBG

B43

LVDS_VBG

E37

LVDS_VREFH

E38

LVDS_VREFL

C41

LVDSA_CLK#

C40

LVDSA_CLK

B37

LVDSB_CLK#

A37

LVDSB_CLK

H47

LVDSA_DATA#_0

E46

LVDSA_DATA#_1

G40

LVDSA_DATA#_2

A40

LVDSA_DATA#_3

H48

LVDSA_DATA_0

D45

LVDSA_DATA_1

F40

LVDSA_DATA_2

B40

LVDSA_DATA_3

A41

LVDSB_DATA#_0

H38

LVDSB_DATA#_1

G37

LVDSB_DATA#_2

J37

LVDSB_DATA#_3

B42

LVDSB_DATA_0

G38

LVDSB_DATA_1

F37

LVDSB_DATA_2

K37

LVDSB_DATA_3

F25

TVA_DAC

H25

TVB_DAC

K25

TVC_DAC

H24

TV_RTN

C31

TV_DCONSEL_0

E32

TV_DCONSEL_1

E28

CRT_BLUE

G28

CRT_GREEN

J28

CRT_RED

G29

CRT_IRTN

H32

CRT_DDC_CLK

J32

CRT_DDC_DATA

J29

CRT_HSYNC

E29

CRT_TVO_IREF

L29

CRT_VSYNC

CANTIGA ES_FCBGA13 29

R138

GM45@

1.02K_0402_1%

GM@

R138

0_0402_5%

PM@

4

PEG_COMPI

PEG_COMPO

PEG_RX#_0 PEG_RX#_1 PEG_RX#_2 PEG_RX#_3 PEG_RX#_4 PEG_RX#_5 PEG_RX#_6 PEG_RX#_7 PEG_RX#_8 PEG_RX#_9

PCI-EXPRESS GRAPHICS

PEG_RX#_10 PEG_RX#_11 PEG_RX#_12 PEG_RX#_13 PEG_RX#_14 PEG_RX#_15

PEG_RX_0 PEG_RX_1 PEG_RX_2 PEG_RX_3 PEG_RX_4 PEG_RX_5 PEG_RX_6 PEG_RX_7 PEG_RX_8

PEG_RX_9 PEG_RX_10 PEG_RX_11 PEG_RX_12 PEG_RX_13 PEG_RX_14 PEG_RX_15

PEG_TX#_0 PEG_TX#_1 PEG_TX#_2 PEG_TX#_3 PEG_TX#_4 PEG_TX#_5 PEG_TX#_6 PEG_TX#_7 PEG_TX#_8

PEG_TX#_9 PEG_TX#_10 PEG_TX#_11 PEG_TX#_12 PEG_TX#_13 PEG_TX#_14 PEG_TX#_15

PEG_TX_0 PEG_TX_1 PEG_TX_2 PEG_TX_3 PEG_TX_4 PEG_TX_5 PEG_TX_6 PEG_TX_7 PEG_TX_8

PEG_TX_9 PEG_TX_10 PEG_TX_11 PEG_TX_12 PEG_TX_13 PEG_TX_14 PEG_TX_15

LVDS TV VGA

PCIE_GTX_C_MRX_N[0. .15]

PCIE_GTX_C_MRX_P[0. .15]

Place the resistor within 500mils (1.27mm)of the (G)MCH

PEGCOMP trace width and spacing is 20/25 mils.

T37

PEGCOMP

R163

T36

PCIE_GTX_C_MRX_N0

H44

PCIE_GTX_C_MRX_N1

J46

PCIE_GTX_C_MRX_N2

L44

PCIE_GTX_C_MRX_N3

L40

PCIE_GTX_C_MRX_N4

N41

PCIE_GTX_C_MRX_N5

P48

PCIE_GTX_C_MRX_N6

N44

PCIE_GTX_C_MRX_N7

T43

PCIE_GTX_C_MRX_N8

U43

PCIE_GTX_C_MRX_N9

Y43

PCIE_GTX_C_MRX_N10

Y48

PCIE_GTX_C_MRX_N11

Y36

PCIE_GTX_C_MRX_N12

AA43

PCIE_GTX_C_MRX_N13

AD37

PCIE_GTX_C_MRX_N14

AC47

PCIE_GTX_C_MRX_N15

AD39

PCIE_GTX_C_MRX_P0

H43

PCIE_GTX_C_MRX_P1

J44

PCIE_GTX_C_MRX_P2

L43

PCIE_GTX_C_MRX_P3

L41

PCIE_GTX_C_MRX_P4

N40

PCIE_GTX_C_MRX_P5

P47

PCIE_GTX_C_MRX_P6

N43

PCIE_GTX_C_MRX_P7

T42

PCIE_GTX_C_MRX_P8

U42

PCIE_GTX_C_MRX_P9

Y42

PCIE_GTX_C_MRX_P10

W47

PCIE_GTX_C_MRX_P11

Y37

PCIE_GTX_C_MRX_P12

AA42

PCIE_GTX_C_MRX_P13

AD36

PCIE_GTX_C_MRX_P14

AC48

PCIE_GTX_C_MRX_P15

AD40

PCIE_MTX_GRX_N0

J41

PCIE_MTX_GRX_N1

M46

PCIE_MTX_GRX_N2

M47

PCIE_MTX_GRX_N3

M40

PCIE_MTX_GRX_N4

M42

PCIE_MTX_GRX_N5

R48

PCIE_MTX_GRX_N6

N38

PCIE_MTX_GRX_N7

T40

PCIE_MTX_GRX_N8

U37

PCIE_MTX_GRX_N9

U40

PCIE_MTX_GRX_N10

Y40

PCIE_MTX_GRX_N11

AA46

PCIE_MTX_GRX_N12

AA37

PCIE_MTX_GRX_N13

AA40

PCIE_MTX_GRX_N14

AD43

PCIE_MTX_GRX_N15

AC46

PCIE_MTX_GRX_P0

J42

PCIE_MTX_GRX_P1

L46

PCIE_MTX_GRX_P2

M48

PCIE_MTX_GRX_P3

M39

PCIE_MTX_GRX_P4

M43

PCIE_MTX_GRX_P5

R47

PCIE_MTX_GRX_P6

N37

PCIE_MTX_GRX_P7

T39

PCIE_MTX_GRX_P8

U36

PCIE_MTX_GRX_P9

U39

PCIE_MTX_GRX_P10

Y39

PCIE_MTX_GRX_P11

Y46

PCIE_MTX_GRX_P12

AA36

PCIE_MTX_GRX_P13

AA39

PCIE_MTX_GRX_P14

AD42

PCIE_MTX_GRX_P15

AD46

PCIE_MTX_GRX_P3 PCIE_MTX_GRX_N3 PCIE_MTX_GRX_P2 PCIE_MTX_GRX_N2 PCIE_MTX_GRX_P1 PCIE_MTX_GRX_N1 PCIE_MTX_GRX_P0 PCIE_MTX_GRX_N0

PCIE_GTX_C_MRX_P3

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

R163

3

PCIE_MTX_C_GRX_N[0. .15] (16)

PCIE_MTX_C_GRX_P[0. .15] (16)

PCIE_GTX_C_MRX_N[0. .15] (16)

PCIE_GTX_C_MRX_P[0. .15] (1 6)

+VCC_PEG

49.9_0402_1%

1 2

Please check Power source if want support IAMT

C277 0.1U_0402_10V7KPM @C277 0.1U_0402_10V7KPM@

1 2

C303 0.1U_0402_10V7KPM @C303 0.1U_0402_10V7KPM@

1 2

C317 0.1U_0402_10V7KPM @C317 0.1U_0402_10V7KPM@

1 2

C315 0.1U_0402_10V7KPM @C315 0.1U_0402_10V7KPM@

1 2

C325 0.1U_0402_10V7KPM @C325 0.1U_0402_10V7KPM@

1 2

C343 0.1U_0402_10V7KPM @C343 0.1U_0402_10V7KPM@

1 2

C358 0.1U_0402_10V7KPM @C358 0.1U_0402_10V7KPM@

1 2

C349 0.1U_0402_10V7KPM @C349 0.1U_0402_10V7KPM@

1 2

C368 0.1U_0402_10V7KPM @C368 0.1U_0402_10V7KPM@

1 2

C354 0.1U_0402_10V7KPM @C354 0.1U_0402_10V7KPM@

1 2

C371 0.1U_0402_10V7KPM @C371 0.1U_0402_10V7KPM@

1 2

C356 0.1U_0402_10V7KPM @C356 0.1U_0402_10V7KPM@

1 2

C372 0.1U_0402_10V7KPM @C372 0.1U_0402_10V7KPM@

1 2

C364 0.1U_0402_10V7KPM @C364 0.1U_0402 _10V7KPM@

1 2

C375 0.1U_0402_10V7KPM @C375 0.1U_0402_10V7KPM@

1 2

C348 0.1U_0402_10V7KPM@C348 0.1U _0402_10V7KPM@

1 2

C271 0.1U_0402_10V7KPM @C271 0.1U_0402_10V7KPM@

1 2

C296 0.1U_0402_10V7KPM @C296 0.1U_0402_10V7KPM@

1 2

C314 0.1U_0402_10V7KPM @C314 0.1U_0402_10V7KPM@

1 2

C311 0.1U_0402_10V7KPM @C311 0.1U_0402_10V7KPM@

1 2

C322 0.1U_0402_10V7KPM @C322 0.1U_0402 _10V7KPM@

1 2

C336 0.1U_0402_10V7KPM @C336 0.1U_0402_10V7KPM@

1 2

C352 0.1U_0402_10V7KPM @C352 0.1U_0402_10V7KPM@

1 2

C344 0.1U_0402_10V7KPM @C344 0.1U_0402_10V7KPM@

1 2

C363 0.1U_0402_10V7KPM @C363 0.1U_0402_10V7KPM@

1 2

C346 0.1U_0402_10V7KPM @C346 0.1U_0402_10V7KPM@

1 2

C366 0.1U_0402_10V7KPM @C366 0.1U_0402_10V7KPM@

1 2

C351 0.1U_0402_10V7KPM @C351 0.1U_0402_10V7KPM@

1 2

C367 0.1U_0402_10V7KPM @C367 0.1U_0402_10V7KPM@

1 2

C359 0.1U_0402_10V7KPM @C359 0.1U_0402_10V7KPM@

1 2

C373 0.1U_0402_10V7KPM @C373 0.1U_0402_10V7KPM@

1 2

C347 0.1U_0402_10V7KPM @C347 0.1U_0402_10V7KPM@

1 2

C670 0.1U_0402_10V7KGM_HDMI@C670 0.1U_0402_10V7KGM_HDMI@

1 2

C674 0.1U_0402_10V7KGM_HDMI@C674 0.1U_0402_10V7KGM_HDMI@

1 2

C669 0.1U_0402_10V7KGM_HDMI@C669 0.1U_0402_10V7KGM_HDMI@

1 2

C673 0.1U_0402_10V7KGM_HDMI@C673 0.1U_0402_10V7KGM_HDMI@

1 2

C662 0.1U_0402_10V7KGM_HDMI@C662 0.1U_0402_10V7KGM_HDMI@

1 2

C663 0.1U_0402_10V7KGM_HDMI@C663 0.1U_0402_10V7KGM_HDMI@

1 2

C658 0.1U_0402_10V7KGM_HDMI@C658 0.1U_0402_10V7KGM_HDMI@

1 2

C661 0.1U_0402_10V7KGM_HDMI@C661 0.1U_0402_10V7KGM_HDMI@

1 2

R640 0_0402_5%

1 2

GM_HDMI@

2007/10/15 2008/10/15

PCIE_MTX_C_GRX_N0 PCIE_MTX_C_GRX_N1 PCIE_MTX_C_GRX_N2 PCIE_MTX_C_GRX_N3 PCIE_MTX_C_GRX_N4 PCIE_MTX_C_GRX_N5 PCIE_MTX_C_GRX_N6 PCIE_MTX_C_GRX_N7 PCIE_MTX_C_GRX_N8

PCIE_MTX_C_GRX_N9 PCIE_MTX_C_GRX_N10 PCIE_MTX_C_GRX_N11 PCIE_MTX_C_GRX_N12 PCIE_MTX_C_GRX_N13 PCIE_MTX_C_GRX_N14 PCIE_MTX_C_GRX_N15

PCIE_MTX_C_GRX_P0

PCIE_MTX_C_GRX_P1

PCIE_MTX_C_GRX_P2

PCIE_MTX_C_GRX_P3

PCIE_MTX_C_GRX_P4

PCIE_MTX_C_GRX_P5

PCIE_MTX_C_GRX_P6

PCIE_MTX_C_GRX_P7

PCIE_MTX_C_GRX_P8

PCIE_MTX_C_GRX_P9 PCIE_MTX_C_GRX_P10 PCIE_MTX_C_GRX_P11 PCIE_MTX_C_GRX_P12 PCIE_MTX_C_GRX_P13 PCIE_MTX_C_GRX_P14 PCIE_MTX_C_GRX_P15

Compal Secret Data

Deciphered Date

TMDS_B_CLK (23) TMDS_B_CLK# (23) TMDS_B_DATA0 (23) TMDS_B_DATA0# (23) TMDS_B_DATA1 (23) TMDS_B_DATA1# (23) TMDS_B_DATA2 (23) TMDS_B_DATA2# (23)

TMDS_B_HPD# (23)

2

CFG[4:3] Reserved

CFG5 (DMI select)

CFG6

CFG7 (Intel Management Engine Crypto strap)

CFG8

CFG9

(PCIE Graphics Lane Reversal)

CFG10 (PCIE Lookback enable)

CFG11

CFG[13:12] (XOR/ALLZ)

CFG16 (FSB Dynamic ODT)

CFG19 (DMI Lane Reversal)

CFG20 (PCIE/SDVO concurrent)

Title

Size D ocument Number Rev

Custom

Date: Sheet

Date: Sheet of

000 = FSB 1066MHz 010 = FSB 800MHz 011 = FSB 667MHz Others = Reserved

0 = DMI x 2 1 = DMI x 4 0 = The iTPM Host Interface is enable

1 = The iTPM Host Interface is disable

0 =(TLS)chiper suite with no confidentiality

*

1 =(TLS)chiper suite with confidentiality

Reserved

0 = Reverse Lane,15->0, 14->1

1 = Normal Operation,Lane Number in order

0 = Enable

1 = Disable

Reserved

00 = Reserved 01 = XOR Mode Enabled 10 = All Z Mode Enabled

*

ReservedCFG[15:14]

(Default)11 = Normal Operation

*

0 = Disabled

1 = Enabled

*

ReservedCFG[18:17]

0 = Normal Operation

(Lane number in Order)

*

1 = Reverse Lane

0 = Only PCIE or SDVO is operational.

*

1 = PCIE/SDVO are operating simu.

Compal Electronics, Inc.

Cantiga GMCH (3/6)-VGA/LVDS/TV

KIWAX_LA-5082P

1

of

10 53W ednesday, March 18, 2009

0.4

5

GM@

+3VS_DAC_CRT

0.1U_0402_16V4Z

1

2

0.022U_0402_16V7K

0.022U_0402_16V7K 10U_0805_10V4Z

10U_0805_10V4Z

C644

1

C206

C213

2

GM@

@

2

VCCA_CRT_DAC: 73mA (0.1UF*1, 0.01UF*1)

+3VS

R120

1 2

0_0603_5%

GM@

VCCA_DAC_BG: 2.68mA (0.1UF*1, 0.01UF*1)

0.1U_0402_16V4Z

GM@

R117

1 2

0_0603_5%

0.022U_0402_16V7K

C181

0_0402_5%

PM@

+3VS_DAC_BG

1

C637

2

C181

1

C638

2

1

2

0.022U_0402_16V7K

+VCCP

+3VS_TVDAC

GM@

10U_0805_10V4Z

GM@

C639

1

2

C206

0_0402_5%

PM@

220U_D2_4VY_R15M

1

C171

0.1U_0402_16V4Z

2

GM@

+1.5VS_PEG_BG: 0.414mA (0.1UF*1)

1

+

C605

2

@

+1.5VS

0_0603_5%

R108

1 2

0_0805_5%

C87

10U_0805_10V4Z

R134

12

0_0603_5%

C194

+1.5VS

0_0603_5%

VCC_HDA: 50mA (0.1UF*1)

R2

0_0402_5%

GM_NOHDMI@

R166

1

2

+1.05VS_A_SM_CK

1U_0402_6.3V4Z

1

2

GM_HDMI@

R1

1 2

0_0402_5%

PM@

+1.5VS_PEG_BG

12

4.7U_0805_10V4Z

4.7U_0805_10V4Z C96

C96

10U_0805_10V4Z

1

C211

2

+1.5VS_HDA

0.1U_0402_16V4Z

12

R2

+3VS

D D

C C

B B

R115

1 2

0_0603_5%

GM@

C637

0_0402_5%

PM@

VCCA_SM:720mA (22UF*2, 4.7UF*1, 1UF*1)

VCCA_SM_CK: 220mA (22UF*1, 2.2UF*1, 0.1UF*1)

+3VS

4

+3VS_DAC_CRT

+3VS_DAC_BG

+1.05VS_DPLLA

+1.05VS_DPLLB

+1.05VS_HPLL

+1.05VS_MPLL

+1.8V_TXLVDS

1000P_0402_50V7K

1

C301

0.1U_0402_16V4Z

2

C214

1

2

+3VS_TVDAC: 40mA (0.1UF*1, 0.01UF*1 for each DAC)

C1

1

GM_HDMI@

2

@C300

@

+1.05VS_PEGPLL

+1.05VS_A_SM

1

1U_0603_10V4Z

2

1U_0603_10V4Z

C210

+3VS_TVDAC

+1.05VS_PEGPLL

1

C300

2

0.1U_0402_16V4Z

1

2

+1.5VS_TVDAC

+1.5VS_QDAC

+1.05VS_HPLL

+1.8V_LVDS

20 mils

1

C102

2

U26H

B27

VCCA_CRT_DAC_1

A26

VCCA_CRT_DAC_2

A25

VCCA_DAC_BG

B25

VSSA_DAC_BG

F47

VCCA_DPLLA

L48

VCCA_DPLLB

AD1

VCCA_HPLL

AE1

VCCA_MPLL

J48

VCCA_LVDS

J47

VSSA_LVDS

AD48

VCCA_PEG_BG

AA48

VCCA_PEG_PLL

AR20

VCCA_SM_1

AP20

VCCA_SM_2

AN20

VCCA_SM_3

AR17

VCCA_SM_4

AP17

VCCA_SM_5

AN17

VCCA_SM_6

AT16

VCCA_SM_7

AR16

VCCA_SM_8

AP16

VCCA_SM_9

AP28

VCCA_SM_CK_1

AN28

VCCA_SM_CK_2

AP25

VCCA_SM_CK_3

AN25

VCCA_SM_CK_4

AN24

VCCA_SM_CK_5

AM28

VCCA_SM_CK_NC TF_1

AM26

VCCA_SM_CK_NC TF_2

AM25

VCCA_SM_CK_NC TF_3

AL25

VCCA_SM_CK_NC TF_4

AM24

VCCA_SM_CK_NC TF_5

AL24

VCCA_SM_CK_NC TF_6

AM23

VCCA_SM_CK_NC TF_7

AL23

VCCA_SM_CK_NC TF_8

B24

VCCA_TV_DAC_1

A24

VCCA_TV_DAC_2

A32

VCC_HDA

M25

VCCD_TVDAC

L28

VCCD_QDAC

AF1

VCCD_HPLL

AA47

VCCD_PEG_PLL

M38

VCCD_LVDS_1

L37

VCCD_LVDS_2

GM45@

POWER

HDA

A SM

CRTPLLA LVDSA PEG

TV

VTT

VCC_AXF_1 VCC_AXF_2 VCC_AXF_3

AXF

VCC_SM_CK_1 VCC_SM_CK_2 VCC_SM_CK_3 VCC_SM_CK_4

SM CK

VCC_TX_LVDS

A CK

HV

VCC_PEG_1 VCC_PEG_2 VCC_PEG_3 VCC_PEG_4 VCC_PEG_5

VCC_DMI_1 VCC_DMI_2 VCC_DMI_3 VCC_DMI_4

DMI PEG

VTT_1 VTT_2 VTT_3 VTT_4 VTT_5 VTT_6 VTT_7 VTT_8

VTT_9 VTT_10 VTT_11 VTT_12 VTT_13 VTT_14 VTT_15 VTT_16 VTT_17 VTT_18 VTT_19 VTT_20 VTT_21 VTT_22 VTT_23 VTT_24 VTT_25

VCC_HV_1 VCC_HV_2 VCC_HV_3

U13 T13 U12 T12 U11 T11 U10 T10 U9 T9 U8 T8 U7 T7 U6 T6 U5 T5 V3 U3 V2 U2 T2 V1 U1

B22 B21 A21

BF21 BH20 BG20 BF20

K47

C35 B35 A35

V48 U48 V47 U47 U46

AH48 AF48 AH47 AG47

3

+VCCP

+1.8V_TXLVDS

+VCC_PEG

+VCC_DMI

VCC_DMI: 456mA (0.1UF*1)

220U_D2_4VM

1

+

C747

2

1

C1260.47U_0402_6.3V6K C1260.47U_0402_6.3V6K

2

+V1.05VS_AXF

+1.5V_SM_CK

C265

C136

+3VS_HV

C649

4.7U_0805_10V4Z

1

2

4.7U_0805_10V4Z

1

2

0.1U_0402_16V4Z

1

2

+1.05VS_DPLLA

0.1U_0402_16V4Z

+1.05VS_PEGPLL

+1.05VS_HPLL

C609

+1.05VS_MPLL

C608

0.1U_0402_16V4Z

C278

1

2

GM@

+1.05VS_DPLLB

0.1U_0402_16V4Z

C312

1

2

GM@

1

2

1

2

0.1U_0402_16V4Z

C342

1

2

1 2

10U_0805_10V4Z

MCK3225151YZF 1210

1

C275

2

GM@

+1.05VS_DPLLA +1.05VS_DPLLB: 64.8mA (470UF*1, 0.1UF*1)

R191

1 2

10U_0805_10V4Z

MCK3225151YZF 1210

1

GM@

C310

2

GM@

R474

MBK2012121YZF_0805

1

C604

2.2U_0603_6.3V4Z

2

R473

MBK2012121YZF_0805

1

C603

2.2U_0603_6.3V4Z

2

BLM18PG121SN1D_0603

1

C355

2.2U_0603_6.3V4Z

2

R151

+VCCP

GM@

+VCCP

+1.05VS_HPLL: 24mA (4.7UF*1, 0.1UF*1)

12

+VCCP

1.05VS_MPLL: 139.2mA (22UF*1, 0.1UF*1)

12

+VCCP

+1.5VS_PEG_PLL: 50mA (0.1UF*1)

L1

12

+VCCP

C278

0_0402_5%

PM@

C312

0_0402_5%

PM@

C299

0_0402_5%

PM@

C180

0_0402_5%

PM@

0316 add

+V1.05VS_AXF

10U_0805_10V4Z

1

2

+1.5VS_TVDAC

1

C180

2

GM@

+1.8V_TXLVDS

40 mils

1000P_0402_50V7K

1

C299

GM@

2

+VCC_PEG

220U_D2_4VM

1

C339

+

2

C629

+1.5V_SM_CK

0.022U_0402_16V7K

C195

GM@

C370

1

2

C323

1

2

C627

1

2

10U_0805_10V4Z

1U_0603_10V4Z

1

2

1

2

0.1U_0402_16V4Z

C198

R208

0_0603_5%

GM@

1

VCC_AXF: 321.35mA (10UF*1, 1UF*1)

1 2

R495

0_0603_5%

0_0603_5% C631

C631

VCC_SM_CK: 119.85mA (10UF*1, 0.1UF*1)

0.1U_0402_16V4Z

10U_0805_10V4Z

1

2

10U_0805_10V4Z

1

VCCD_TVDAC: 58.696mA

2

(0.1UF*1, 0.01UF*1)

GM@

12

+1.8V_TXLVDS: 118.8mA (22UF*1, 1000PF*1)

+VCCP

R496

1 2

0_0805_5%

C628

R136

0_0603_5%

GM@

+1.8VS

+1.5V

+1.5VS

12

20mils

R202

0_0805_5%

+VCCP

12

0316 add

+VCC_DMI

C337

10U_0805_10V4Z

1U_0603_10V4Z

C353

1

2

10U_0805_10V4Z

C795

1

2

A8

VTTLF1

L1

VTTLF2

AB2

VTTLF3

VTTLF

LVDS D TV/CRT

CANTIGA ES_FCBGA1329

U26

0.47U_0402_6.3V6K

1

C94

2

0.47U_0402_6.3V6K

1

C618

C611

2

+VCCP

+3VS

+VCCP_D

D1

@D1

@

2 1

CH751H-40PT_SOD323-2

R158

10_0402_5%

@R158

@

R157

12

0_0402_5%

12

+3VS_HV

PM

GL40

PM@

GL40@

1

C208

C207

2

VCCD_QDAC: 48.363mA (0.1UF*1, 0.01UF*1)

R142

0_0603_5%

0_0603_5% 10U_0805_10V4Z

10U_0805_10V4Z

0.1U_0402_16V4Z

1

C221

GM@

2

5

12

+1.5VS

C208

0.01U_0402_16V7K

PM@

+1.8V_LVDS

10U_0805_10V4Z

C226

GM@

1

2

+1.5VS_QDAC

1U_0402_6.3V4Z

A A

GM@

1.8V_LVDS: 60.311111mA (1UF*1)

R137

0_0603_5%

0_0603_5% 1U_0603_10V4Z

1U_0603_10V4Z

GM@

C237

1

2

GM@

12

C237

0_0603_5%

PM@

4

+1.8VS

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DR AWING IS THE PR OPRIETARY PROPERT Y OF COMPAL ELECT RONICS, INC. AND CONTAINS CON FIDENTIAL

THIS SHEET OF ENGINEERING DR AWING IS THE PR OPRIETARY PROPERT Y OF COMPAL ELECT RONICS, INC. AND CONTAINS CON FIDENTIAL AND TRAD E SECRET INFOR MATION. THIS SHEET M AY NOT BE TRANSF ERED FROM T HE CUSTODY OF THE COMPETEN T DIVISION OF R&D

AND TRAD E SECRET INFOR MATION. THIS SHEET M AY NOT BE TRANSF ERED FROM T HE CUSTODY OF THE COMPETEN T DIVISION OF R&D

AND TRAD E SECRET INFOR MATION. THIS SHEET M AY NOT BE TRANSF ERED FROM T HE CUSTODY OF THE COMPETEN T DIVISION OF R&D DEPARTMEN T EXCEPT AS AUT HORIZED BY COMPA L ELECTRONICS, INC . NEITHER THIS SHE ET NOR THE INF ORMATION IT CONT AINS

DEPARTMEN T EXCEPT AS AUT HORIZED BY COMPA L ELECTRONICS, INC . NEITHER THIS SHE ET NOR THE INF ORMATION IT CONT AINS

DEPARTMEN T EXCEPT AS AUT HORIZED BY COMPA L ELECTRONICS, INC . NEITHER THIS SHE ET NOR THE INF ORMATION IT CONT AINS MAY BE USED BY OR DISCLOSED TO ANY TH IRD PARTY WITHOUT PRIOR WRI TTEN CONSENT OF COMPAL ELECTRONICS, IN C.

MAY BE USED BY OR DISCLOSED TO ANY TH IRD PARTY WITHOUT PRIOR WRI TTEN CONSENT OF COMPAL ELECTRONICS, IN C.

3

2007/10/15 2008/10/15

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

Crestline GMCH (4/6)-VCC

Custom

Crestline GMCH (4/6)-VCC

KIWAX_LA-5082P

11 53Wednesday, March 18, 2009

1

11 53Wednesday, March 18, 2009

0.4

5

D D

0.22U_0402_10V4Z

10U_0805_10V4Z

C C

B B

A A

0.22U_0402_10V4Z

C193

1

C178

2

1

2

+VCCP

0.1U_0402_16V4Z

C175

C220

1

2

AG34 AC34 AB34 AA34

AM33

AK33

AJ33 AG33 AF33

AE33 AC33 AA33

W33

AH28 AF28 AC28 AA28

AJ26 AG26 AE26 AC26 AH25 AG25 AF25 AG24

AJ23 AH23 AF23

U26G

VCC_1 VCC_2 VCC_3 VCC_4

Y34

VCC_5

V34

VCC_6

U34

VCC_7 VCC_8 VCC_9 VCC_10 VCC_11 VCC_12

VCC_13 VCC_14 VCC_15

Y33

VCC_16 VCC_17

V33

VCC_18

U33

VCC_19 VCC_20 VCC_21 VCC_22 VCC_23 VCC_24 VCC_25 VCC_26 VCC_27 VCC_28 VCC_29 VCC_30 VCC_31 VCC_32 VCC_33 VCC_34

T32

VCC_35

GM45@

VCC CORE

POWER

VCC NCTF

CANTIGA ES_FCBGA1329

4

VCC_NCTF_1 VCC_NCTF_2 VCC_NCTF_3 VCC_NCTF_4 VCC_NCTF_5 VCC_NCTF_6 VCC_NCTF_7 VCC_NCTF_8

VCC_NCTF_9 VCC_NCTF_10 VCC_NCTF_11 VCC_NCTF_12 VCC_NCTF_13 VCC_NCTF_14 VCC_NCTF_15 VCC_NCTF_16 VCC_NCTF_17 VCC_NCTF_18 VCC_NCTF_19 VCC_NCTF_20 VCC_NCTF_21 VCC_NCTF_22 VCC_NCTF_23 VCC_NCTF_24 VCC_NCTF_25 VCC_NCTF_26 VCC_NCTF_27 VCC_NCTF_28 VCC_NCTF_29 VCC_NCTF_30 VCC_NCTF_31 VCC_NCTF_32 VCC_NCTF_33 VCC_NCTF_34 VCC_NCTF_35 VCC_NCTF_36 VCC_NCTF_37 VCC_NCTF_38 VCC_NCTF_39 VCC_NCTF_40 VCC_NCTF_41 VCC_NCTF_42 VCC_NCTF_43 VCC_NCTF_44

AM32 AL32 AK32 AJ32 AH32 AG32 AE32 AC32 AA32 Y32 W32 U32 AM30 AL30 AK30 AH30 AG30 AF30 AE30 AC30 AB30 AA30 Y30 W30 V30 U30 AL29 AK29 AJ29 AH29 AG29 AE29 AC29 AA29 Y29 W29 V29 AL28 AK28 AL26 AK26 AK25 AK24 AK23

+VCCP

1782mA

+1.5V

+VCCP +AXG_CORE

GM@

1

C84

C149

1U_0603_10V4Z

2

220U_D2_4VM_R15

3

220U_D2_4VM_R15

1

C177

+

2

@

J4

112

JUMP_43X118

10U_0805_10V4Z

1

GM@

+

C104

2

1

2

GM@

1

C157

2

10U_0805_10V4Z

C157

0_0805_5%

PM@

10U_0805_10V4Z

C643

0.1U_0402_16V4Z

GM@

1

C167

2

0.01U_0402_16V7K

2

1

+AXG_CORE

1

2

U26F

AP33

VCC_SM_1

AN33

VCC_SM_2

BH32

VCC_SM_3

BG32

VCC_SM_4

BF32

VCC_SM_5

BD32

VCC_SM_6

BC32

C645

T32T32 T31T31

BB32 BA32 AY32

AW32

AV32 AU32 AT32 AR32 AP32 AN32 BH31 BG31 BF31 BG30 BH29 BG29 BF29 BD29 BC29 BB29 BA29 AY29

AW29

AV29 AU29 AT29 AR29 AP29

BA36 BB24 BD16

BB21 AW16 AW13

AT13

AE25

AB25

AA25

AE24

AC24

AA24

AE23

AC23

AB23

AA23

AJ21 AG21 AE21 AC21 AA21

AH20 AF20 AE20 AC20 AB20 AA20

AM15

AL15 AE15

AJ15 AH15 AG15 AF15 AB15 AA15

AN14 AM14

AJ14 AH14

Y26

Y24

Y21

T17 T16

Y15 V15 U15

U14 T14

VCC_SM_7 VCC_SM_8 VCC_SM_9 VCC_SM_10 VCC_SM_11 VCC_SM_12 VCC_SM_13 VCC_SM_14 VCC_SM_15 VCC_SM_16 VCC_SM_17 VCC_SM_18 VCC_SM_19 VCC_SM_20 VCC_SM_21 VCC_SM_22 VCC_SM_23 VCC_SM_24 VCC_SM_25 VCC_SM_26 VCC_SM_27 VCC_SM_28 VCC_SM_29 VCC_SM_30 VCC_SM_31 VCC_SM_32 VCC_SM_33 VCC_SM_34 VCC_SM_35

VCC_SM_36/NC VCC_SM_37/NC VCC_SM_38/NC VCC_SM_39/NC VCC_SM_40/NC VCC_SM_41/NC VCC_SM_42/NC

VCC_AXG_1 VCC_AXG_2 VCC_AXG_3 VCC_AXG_4 VCC_AXG_5 VCC_AXG_6 VCC_AXG_7 VCC_AXG_8 VCC_AXG_9 VCC_AXG_10 VCC_AXG_11 VCC_AXG_12 VCC_AXG_13 VCC_AXG_14 VCC_AXG_15 VCC_AXG_16 VCC_AXG_17 VCC_AXG_18 VCC_AXG_19 VCC_AXG_20 VCC_AXG_21 VCC_AXG_22 VCC_AXG_23 VCC_AXG_24 VCC_AXG_25 VCC_AXG_26 VCC_AXG_27 VCC_AXG_28 VCC_AXG_29 VCC_AXG_30 VCC_AXG_31 VCC_AXG_32 VCC_AXG_33 VCC_AXG_34 VCC_AXG_35 VCC_AXG_36 VCC_AXG_37 VCC_AXG_38 VCC_AXG_39 VCC_AXG_40 VCC_AXG_41 VCC_AXG_42

VCC_AXG_SENSE VSS_AXG_SENSE

GM45@

VCC_AXG_NTCF_1 VCC_AXG_NCTF_2 VCC_AXG_NCTF_3 VCC_AXG_NCTF_4 VCC_AXG_NCTF_5 VCC_AXG_NCTF_6 VCC_AXG_NCTF_7 VCC_AXG_NCTF_8

VCC SM

VCC_AXG_NCTF_9 VCC_AXG_NCTF_10 VCC_AXG_NCTF_11 VCC_AXG_NCTF_12 VCC_AXG_NCTF_13 VCC_AXG_NCTF_14 VCC_AXG_NCTF_15 VCC_AXG_NCTF_16 VCC_AXG_NCTF_17 VCC_AXG_NCTF_18 VCC_AXG_NCTF_19 VCC_AXG_NCTF_20 VCC_AXG_NCTF_21 VCC_AXG_NCTF_22 VCC_AXG_NCTF_23 VCC_AXG_NCTF_24 VCC_AXG_NCTF_25 VCC_AXG_NCTF_26 VCC_AXG_NCTF_27 VCC_AXG_NCTF_28 VCC_AXG_NCTF_29 VCC_AXG_NCTF_30 VCC_AXG_NCTF_31 VCC_AXG_NCTF_32 VCC_AXG_NCTF_33 VCC_AXG_NCTF_34 VCC_AXG_NCTF_35 VCC_AXG_NCTF_36 VCC_AXG_NCTF_37 VCC_AXG_NCTF_38 VCC_AXG_NCTF_39 VCC_AXG_NCTF_40 VCC_AXG_NCTF_41 VCC_AXG_NCTF_42 VCC_AXG_NCTF_43

VCC GFX NCTF

VCC_AXG_NCTF_44 VCC_AXG_NCTF_45 VCC_AXG_NCTF_46 VCC_AXG_NCTF_47 VCC_AXG_NCTF_48 VCC_AXG_NCTF_49 VCC_AXG_NCTF_50 VCC_AXG_NCTF_51 VCC_AXG_NCTF_52

POWER

VCC_AXG_NCTF_53 VCC_AXG_NCTF_54 VCC_AXG_NCTF_55 VCC_AXG_NCTF_56 VCC_AXG_NCTF_57 VCC_AXG_NCTF_58 VCC_AXG_NCTF_59 VCC_AXG_NCTF_60

VCC GFX

VCC SM LF

CANTIGA ES_FCBGA1329

VCC_SM_LF1 VCC_SM_LF2 VCC_SM_LF3 VCC_SM_LF4 VCC_SM_LF5 VCC_SM_LF6 VCC_SM_LF7

W28 V28 W26 V26 W25 V25 W24 V24 W23 V23 AM21 AL21 AK21 W21 V21 U21 AM20 AK20 W20 U20 AM19 AL19 AK19 AJ19 AH19 AG19 AF19 AE19 AB19 AA19 Y19 W19 V19 U19 AM17 AK17 AH17 AG17 AF17 AE17 AC17 AB17 Y17 W17 V17 AM16 AL16 AK16 AJ16 AH16 AG16 AF16 AE16 AC16 AB16 AA16 Y16 W16 V16 U16

AV44 BA37 AM40 AV21 AY5 AM10 BB13

+AXG_CORE

VCCSM_LF1 VCCSM_LF2 VCCSM_LF3 VCCSM_LF4 VCCSM_LF5 VCCSM_LF6 VCCSM_LF7

Check : power

0.1U_0402_16V4Z

C197

1

GM@

2

C121 0.1U_0402_16V4ZC 121 0.1U_0402_16V4Z

C114 0.1U_0402_16V4ZC 114 0.1U_0402_16V4Z

1

2

1

C129

1

GM@

2

0.22U_0402_10V4Z

C99

0_0603_5%

PM@

C101 0.22U_0402_10V4 ZC101 0.22U_0402_10V4Z

C159 0.22U_0402_10V4 ZC159 0.22U_0402_10V4Z

1

2

4.7U_0603_6.3V6K

C99

1

GM@

2

C264 0.47U_0402_6.3V6KC264 0.47U_0402_6.3V6K

C243 1U_0402_6.3V4ZC243 1U_0402_6.3V4Z

1

2

C297 1U_0402_6.3V4ZC297 1U_0402_6.3V4Z

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2007/10/15 2008/10/15

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

Crestline GMCH (5/6)-VCC

KIWAX_LA-5082P

1

of

12 53Wednesday, March 18, 2009

0.4

5

U26I

AU48

VSS_1

AR48

VSS_2

AL48

VSS_3

BB47

VSS_4

AW47

VSS_5

AN47

VSS_6

AJ47

VSS_7

AF47

VSS_8

AD47

VSS_9

AB47

VSS_10

Y47

VSS_11

T47

BD46 BA46

AY46 AV46 AR46 AM46

BF44 AH44 AD44 AA44

BC43 AV43 AU43 AM43

BG42

AY42

AT42 AN42

AJ42 AE42

BD41 AU41 AM41 AH41 AD41 AA41

BG40 BB40 AV40 AN40

AT39 AM39

AJ39 AE39

BH38 BC38 BA38 AU38 AH38 AD38 AA38

BF37 BB37

AW37

AT37 AN37

AJ37

BG36 BD36 AK15 AU36

G47

V46 R46 P46 H46 F46

Y44 U44 T44 M44 F44

C43

N42

Y41 U41 T41 M41 G41 B41

H40 E40

N39

B39

Y38 U38 T38

F38 C38

H37 C37

VSS_12

N47

VSS_13

L47

VSS_14 VSS_15 VSS_16 VSS_17 VSS_18 VSS_19 VSS_20 VSS_21 VSS_22 VSS_23 VSS_24 VSS_25 VSS_26 VSS_27 VSS_28 VSS_29 VSS_30 VSS_31 VSS_32 VSS_33 VSS_34 VSS_35 VSS_36 VSS_37 VSS_38 VSS_39

J43

VSS_40 VSS_41 VSS_42 VSS_43 VSS_44 VSS_45 VSS_46 VSS_47 VSS_48

L42

VSS_49 VSS_50 VSS_51 VSS_52 VSS_53 VSS_54 VSS_55 VSS_56 VSS_57 VSS_58 VSS_59 VSS_60 VSS_61 VSS_62 VSS_63 VSS_64 VSS_65 VSS_66 VSS_67 VSS_68 VSS_69 VSS_70 VSS_71 VSS_72

L39

VSS_73 VSS_74 VSS_75 VSS_76 VSS_77 VSS_78 VSS_79 VSS_80 VSS_81 VSS_82 VSS_83 VSS_84

J38

VSS_85 VSS_86 VSS_87 VSS_88 VSS_89 VSS_90 VSS_91 VSS_92 VSS_93 VSS_94 VSS_95 VSS_96 VSS_97 VSS_98 VSS_99

GM45@

VSS

D D

C C

B B

A A

VSS_100 VSS_101 VSS_102 VSS_103 VSS_104 VSS_105 VSS_106 VSS_107 VSS_108 VSS_109 VSS_110 VSS_111 VSS_112 VSS_113 VSS_114 VSS_115 VSS_116 VSS_117 VSS_118 VSS_119 VSS_120 VSS_121 VSS_122 VSS_123 VSS_124 VSS_125 VSS_126 VSS_127 VSS_128 VSS_129 VSS_130 VSS_131 VSS_132 VSS_133 VSS_134 VSS_135 VSS_136 VSS_137 VSS_138 VSS_139 VSS_140 VSS_141 VSS_142 VSS_143 VSS_144 VSS_145 VSS_146 VSS_147 VSS_148 VSS_149 VSS_150 VSS_151 VSS_152 VSS_153 VSS_154 VSS_155 VSS_156 VSS_157 VSS_158 VSS_159 VSS_160 VSS_161 VSS_162 VSS_163 VSS_164 VSS_165 VSS_166 VSS_167 VSS_168 VSS_169 VSS_170 VSS_171 VSS_172 VSS_173 VSS_174 VSS_175 VSS_176 VSS_177 VSS_178 VSS_179 VSS_180 VSS_181 VSS_182 VSS_183 VSS_184 VSS_185 VSS_186 VSS_187 VSS_188 VSS_189 VSS_190 VSS_191 VSS_192 VSS_193 VSS_194 VSS_195 VSS_196 VSS_197 VSS_198 VSS_199

CANTIGA ES_FCBGA1329

AM36 AE36 P36 L36 J36 F36 B36 AH35 AA35 Y35 U35 T35 BF34 AM34 AJ34 AF34 AE34 W34 B34 A34 BG33 BC33 BA33 AV33 AR33 AL33 AH33 AB33 P33 L33 H33 N32 K32 F32 C32 A31 AN29 T29 N29 K29 H29 F29 A29 BG28 BD28 BA28 AV28 AT28 AR28 AJ28 AG28 AE28 AB28 Y28 P28 K28 H28 F28 C28 BF26 AH26 AF26 AB26 AA26 C26 B26 BH25 BD25 BB25 AV25 AR25 AJ25 AC25 Y25 N25 L25 J25 G25 E25 BF24 AD12 AY24 AT24 AJ24 AH24 AF24 AB24 R24 L24 K24 J24 G24 F24 E24 BH23 AG23 Y23 B23 A23 AJ6

4

U26J

BG21

VSS_199

L12

VSS_200

AW21

VSS_201

AU21

VSS_202

AP21

VSS_203

AN21

VSS_204

AH21

VSS_205

AF21

VSS_206

AB21

VSS_207

R21

VSS_208

M21

VSS_209

J21

VSS_210

G21

VSS_211

BC20

VSS_212

BA20

VSS_213

AW20

VSS_214

AT20

VSS_215

AJ20

VSS_216

AG20

VSS_217

Y20

VSS_218

N20

VSS_219

K20

VSS_220

F20

VSS_221

C20

VSS_222

A20

VSS_223

BG19

VSS_224

A18

VSS_225

BG17

VSS_226

BC17

VSS_227

AW17

VSS_228

AT17

VSS_229

R17

VSS_230

M17

VSS_231

H17

VSS_232

C17

VSS_233

BA16

VSS_235

AU16

VSS_237

AN16

VSS_238

N16

VSS_239

K16

VSS_240

G16

VSS_241

E16

VSS_242

BG15

VSS_243

AC15

VSS_244

W15

VSS_245

A15

VSS_246

BG14

VSS_247

AA14

VSS_248

C14

VSS_249

BG13

VSS_250

BC13

VSS_251

BA13

VSS_252

AN13

VSS_255

AJ13

VSS_256

AE13

VSS_257

N13

VSS_258

L13

VSS_259

G13

VSS_260

E13

VSS_261

BF12

VSS_262

AV12

VSS_263

AT12

VSS_264

AM12

VSS_265

AA12

VSS_266

J12

VSS_267

A12

VSS_268

BD11

VSS_269

BB11

VSS_270

AY11

VSS_271

AN11

VSS_272

AH11

VSS_273

Y11

VSS_275

N11

VSS_276

G11

VSS_277

C11

VSS_278

BG10

VSS_279

AV10

VSS_280

AT10

VSS_281

AJ10

VSS_282

AE10

VSS_283

AA10

VSS_284

M10

VSS_285

BF9

VSS_286

BC9

VSS_287

AN9

VSS_288

AM9

VSS_289

AD9

VSS_290

G9

VSS_291

B9

VSS_292

BH8

VSS_293

BB8

VSS_294

AV8

VSS_295

AT8

VSS_296

GM45@

VSS

3

VSS_297 VSS_298 VSS_299 VSS_300 VSS_301 VSS_302 VSS_303 VSS_304 VSS_305 VSS_306 VSS_307 VSS_308 VSS_309 VSS_310 VSS_311 VSS_312 VSS_313 VSS_314 VSS_315 VSS_316 VSS_317 VSS_318 VSS_319 VSS_320 VSS_321 VSS_322 VSS_323 VSS_324 VSS_325

VSS_327 VSS_328 VSS_329 VSS_330 VSS_331 VSS_332 VSS_333 VSS_334 VSS_335 VSS_336 VSS_337 VSS_338 VSS_339 VSS_340 VSS_341 VSS_342 VSS_343 VSS_344 VSS_345 VSS_346 VSS_347 VSS_348 VSS_349 VSS_350

VSS_351 VSS_352 VSS_353 VSS_354

VSS_NCTF_1 VSS_NCTF_2 VSS_NCTF_3 VSS_NCTF_4 VSS_NCTF_5 VSS_NCTF_6 VSS_NCTF_7 VSS_NCTF_8 VSS_NCTF_9

VSS_NCTF_10

VSS NCTF

VSS_NCTF_11 VSS_NCTF_12 VSS_NCTF_13 VSS_NCTF_14 VSS_NCTF_15 VSS_NCTF_16

VSS_SCB_1 VSS_SCB_2 VSS_SCB_3 VSS_SCB_4 VSS_SCB_5

VSS SCB

NC_26 NC_27 NC_28 NC_29 NC_30 NC_31 NC_32 NC_33 NC_34

NC

NC_35 NC_36 NC_37 NC_38 NC_39 NC_40 NC_41 NC_42

CANTIGA ES_FCBGA1329

AH8 Y8 L8 E8 B8 AY7 AU7 AN7 AJ7 AE7 AA7 N7 J7 BG6 BD6 AV6 AT6 AM6 M6 C6 BA5 AH5 AD5 Y5 L5 J5 H5 F5 BE4

BC3 AV3 AL3 R3 P3 F3 BA2 AW2 AU2 AR2 AP2 AJ2 AH2 AF2 AE2 AD2 AC2 Y2 M2 K2 AM1 AA1 P1 H1

U24 U28 U25 U29

AF32 AB32 V32 AJ30 AM29 AF29 AB29 U26 U23 AL20 V20 AC19 AL17 AJ17 AA17 U17

BH48 BH1 A48 C1 A3

E1 D2 C3 B4 A5 A6 A43 A44 B45 C46 D47 B47 A46 F48 E48 C48 B48

2

1

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2007/10/15 2008/10/15

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

Cantiga GMCH (6/6)-GND

KIWAX_LA-5082P

13 53Wednesday, March 18, 2009

1

0.4

5

DDR_A_DQS#[0..7](9)

DDR_A_D[0..63](9)

DDR_A_DM[0..7](9)

DDR_A_DQS[0..7](9)

DDR_A_MA[0..14](9)

D D

Layout Note:

C C

Layout Note: Place near JP4.20 3 & JP4.204

B B

A A

Place near JP4

+1.5V

10U_0805_6.3V6M

1

C766

C768

2

1

2

+0.75VS

1U_0603_10V4Z

Layout Note: Place these 4 Caps near Command and Control signals of DIMMA

0.1U_0402_16V4Z

10U_0805_6.3V6M

2

C778

1

C763

C764

C767

2

1U_0603_10V4Z

2

1

5

C764

2

1U_0603_10V4Z

2

C776

C779

1

10U_0805_6.3V6M

1

C765

2

10U_0805_6.3V6M

1

C777

2

1

2

C762

0.1U_0402_16V4Z

C750

C752

1

2

1

C755

2

0.1U_0402_16V4Z

C749

1

2

4

+1.5V

0.1U_0402_16V4Z

C753

1

2

4

12

R625

R625 100_0402_1%

100_0402_1%

12

R626

100_0402_1%

1

+

2

+V_DDR3_DIMM_REF

C787

C787 470U_D2_2.5VM_R15

470U_D2_2.5VM_R15

@

3

+V_DDR3_DIMM_REF

DDR_A_D0 DDR_A_D1

DDR_A_DM0

DDR_A_D2 DDR_A_D3

DDR_A_D8 DDR_A_D9

DDR_A_DQS#1 DDR_A_DQS1

DDR_A_D10 DDR_A_D11

DDR_A_D16 DDR_A_D17

DDR_A_DQS#2 DDR_A_DQS2

DDR_A_D18 DDR_A_D19

DDR_A_D24 DDR_A_D25

DDR_A_DM3

DDR_A_D26 DDR_A_D27

1

2

2.2U_0603_6.3V4Z

C754

3

10K_0402_5%

1

2

DDR_CKE0_DIMMA

DDR_A_BS2

DDR_A_MA12 DDR_A_MA9

DDR_A_MA8 DDR_A_MA5

DDR_A_MA3 DDR_A_MA1

M_CLK_DDR0 M_CLK_DDR#0

DDR_A_MA10 DDR_A_BS0

DDR_A_WE# DDR_A_CAS#

DDR_A_MA13 DDR_CS1_DIMMA#

DDR_A_D32 DDR_A_D33

DDR_A_DQS#4 DDR_A_DQS4

DDR_A_D34 DDR_A_D35

DDR_A_D40 DDR_A_D41

DDR_A_DM5

DDR_A_D42 DDR_A_D43

DDR_A_D48 DDR_A_D49

DDR_A_DQS#6 DDR_A_DQS6

DDR_A_D50 DDR_A_D51

DDR_A_D56 DDR_A_D57

DDR_A_DM7

DDR_A_D58 DDR_A_D59

R627

1 2

0.1U_0402_16V4Z

DDR_CKE0_DIMMA(8)

DDR_A_BS#2(9)

M_CLK_DDR0(8) M_CLK_DDR#0(8)

DDR_A_BS#0(9)

DDR_A_WE#(9)

DDR_A_CAS#(9) M_ODT0 (8)

DDR_CS1_DIMMA#(8)

+3VS

C784

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

+1.5V +1.5V

JP17

VREF_DQ1VSS1

3

VSS2

5

DQ0

7

DQ1

9

VSS4

11

DM0

13

VSS5

15

DQ2

17

DQ3

19

VSS7

21

DQ8

23

DQ9

25

VSS9

27

DQS#1 DQS129RESET# VSS1131VSS12

33

DQ10

35

DQ11 VSS1337VSS14

39

DQ16

41

DQ17 VSS1543VSS16

45

DQS#2

47

DQS2

49

VSS18

51

DQ18

53

DQ19

55

VSS20

57

DQ24

59

DQ25 VSS2261DQS#3

63

DM3 VSS2365VSS24

67

DQ26

69

DQ27 VSS2571VSS26

73

CKE0

75

VDD1

77

NC1

79

BA2

81

VDD3

83

A12/BC#

85

A9

87

VDD5

89

A8

91

A5

93

VDD7

95

A3

97

A1

99

VDD9

101

CK0

103

CK0#

105

VDD11

107

A10/AP

109

BA0

111

VDD13

113

WE#

115

CAS#

117

VDD15

119

A13

121

S1#

123

VDD17

125

NCTEST

127

VSS27

129

DQ32

131

DQ33

133

VSS29

135

DQS#4

137

DQS4

139

VSS32

141

DQ34

143

DQ35

145

VSS34

147

DQ40

149

DQ41

151

VSS36

153

DM5

155

VSS37

157

DQ42

159

DQ43

161

VSS39

163

DQ48

165

DQ49

167

VSS41

169

DQS#6

171

DQS6

173

VSS44

175

DQ50

177

DQ51

179

VSS46

181

DQ56

183

DQ57

185

VSS48

187

DM7

189

VSS49

191

DQ58

193

DQ59

195

VSS51

197

SA0

199

VDDSPD

201

SA1

203

12

R628

10K_0402_5%

2007/09/29 2007/09/29

VTT1

205

G1

FOX_AS0A626-U2RN-7F

ME@

Compal Secret Data

DQ4 DQ5

VSS3

DQS#0

DQS0

VSS6

DQ6

DQ7 VSS8 DQ12 DQ13

VSS10

DM1

DQ14 DQ15

DQ20 DQ21

DM2

VSS17

DQ22 DQ23

VSS19

DQ28 DQ29

VSS21

DQS3

DQ30 DQ31

CKE1

VDD2

A15 A14

VDD4

A11

A7

VDD6

A6 A4

VDD8

A2 A0

VDD10

CK1 CK1#

VDD12

BA1 RAS#

VDD14

S0#

ODT0

VDD16

ODT1

NC2

VDD18

VREF_CA

VSS28

DQ36 DQ37

VSS30

DM4

VSS31

DQ38 DQ39

VSS33

DQ44 DQ45

VSS35 DQS#5

DQS5

VSS38

DQ46 DQ47

VSS40

DQ52 DQ53

VSS42

DM6

VSS43

DQ54 DQ55

VSS45

DQ60 DQ61

VSS47 DQS#7

DQS7

VSS50

DQ62 DQ63

VSS52

EVENT#

SDA

SCL

VTT2

G2

Deciphered Date

2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72

74 76 78 80 82 84 86 88 90 92 94 96 98 100 102 104 106 108 110 112 114 116 118 120 122 124 126 128 130 132 134 136 138 140 142 144 146 148 150 152 154 156 158 160 162 164 166 168 170 172 174 176 178 180 182 184 186 188 190 192 194 196 198 200 202 204

206

2

DDR_A_D4 DDR_A_D5

DDR_A_DQS#0 DDR_A_DQS0

DDR_A_D6 DDR_A_D7

DDR_A_D12 DDR_A_D13

DDR_A_DM1 SM_DRAMRST#

DDR_A_D14 DDR_A_D15

DDR_A_D20 DDR_A_D21

DDR_A_DM2

DDR_A_D22 DDR_A_D23

DDR_A_D28 DDR_A_D29

DDR_A_DQS#3 DDR_A_DQS3

DDR_A_D30 DDR_A_D31

DDR_CKE1_DIMMA

DDR_A_MA14

DDR_A_MA11 DDR_A_MA7

DDR_A_MA6 DDR_A_MA4

DDR_A_MA2 DDR_A_MA0

M_CLK_DDR1 M_CLK_DDR#1

DDR_A_BS1 DDR_A_RAS#

DDR_CS0_DIMMA# M_ODT0

M_ODT1

DDR_VREF_CA_DIMMA

DDR_A_D36 DDR_A_D37

DDR_A_DM4

DDR_A_D38 DDR_A_D39

DDR_A_D44 DDR_A_D45

DDR_A_DQS#5 DDR_A_DQS5

DDR_A_D46 DDR_A_D47

DDR_A_D52 DDR_A_D53

DDR_A_DM6

DDR_A_D54 DDR_A_D55

DDR_A_D60 DDR_A_D61

DDR_A_DQS#7 DDR_A_DQS7

DDR_A_D62 DDR_A_D63

PM_EXTTS#0 CLK_SMBDATA CLK_SMBCLK

+0.75VS

2

SM_DRAMRST# (8,15)

DDR_CKE1_DIMMA (8)

M_CLK_DDR1 (8) M_CLK_DDR#1 (8)

DDR_A_BS#1 (9) DDR_A_RAS# (9)

DDR_CS0_DIMMA# (8)

M_ODT1 (8)

R623

1 2

0_0402_5%

PM_EXTTS#0 (8,15)

CLK_SMBDATA (15,22) CLK_SMBCLK (15,22)

Title

Size Document Number Rev

Custom

Date: Sheet of

+V_DDR3_DIMM_REF

2.2U_0603_6.3V4Z

0.1U_0402_16V4Z

1

C785

C751

2

DDR3 SO-DIMM A REVERSE

Compal Electronics, Inc.

DDRIII-SODIMM SLOT1

KIWAX_LA-5082P

1

0.4

14 53Wednesday, March 18, 2009

1

0.4

5

DDR_B_DQS#[0..7](9)

DDR_B_D[0..63](9)

DDR_B_DM[0..7](9)

DDR_B_DQS[0..7](9)

DDR_B_MA[0..14](9)

D D

Layout Note: Place near JP5

Layout Note: Place these 4 Caps near Command and Control signals of DIMMA

+1.5V

0.1U_0402_16V4Z

10U_0805_6.3V6M

1

C771

C C

B B

A A

2

Layout Note: Place near JP5.20 3 & JP5.204

+0.75VS

1U_0603_10V4Z

C772

C775

2

1U_0603_10V4Z

2

C780

C781

1

10U_0805_6.3V6M

1

C769

C774

2

10U_0805_6.3V6M

1U_0603_10V4Z

1

2

C782

C783

1

5

2

1

10U_0805_6.3V6M

1

C773

2

C770

1

2

C756

1

2

0.1U_0402_16V4Z

C757

1

2

1

2

0.1U_0402_16V4Z

C760

4

1

C759

1

2

4

+

C788

C788 470U_D2_2.5VM_R15

470U_D2_2.5VM_R15

@

3

+1.5V +1.5V

+V_DDR3_DIMM_REF

JP16

VREF_DQ1VSS1

3

DDR_B_D0 DDR_B_D1

DDR_B_DM0

DDR_B_D2 DDR_B_D3

DDR_B_D8 DDR_B_D9

DDR_B_DQS#1 DDR_B_DQS1

DDR_B_D10 DDR_B_D11

DDR_B_D16 DDR_B_D17

DDR_B_DQS#2 DDR_B_DQS2

DDR_B_D18 DDR_B_D19

DDR_B_D24 DDR_B_D25

DDR_B_DM3

DDR_B_D26 DDR_B_D27

DDR_CKE2_DIMMB

10K_0402_5%

1

C761

2

0.1U_0402_16V4Z

Issued Date

DDR_B_BS2

DDR_B_MA12 DDR_B_MA9

DDR_B_MA8 DDR_B_MA5

DDR_B_MA3 DDR_B_MA1

M_CLK_DDR2 M_CLK_DDR#2

DDR_B_MA10 DDR_B_BS0

DDR_B_WE# DDR_B_CAS#

DDR_B_MA13 DDR_CS3_DIMMB#

DDR_B_D32 DDR_B_D33

DDR_B_DQS#4 DDR_B_DQS4

DDR_B_D34 DDR_B_D35

DDR_B_D40 DDR_B_D41

DDR_B_DM5

DDR_B_D42 DDR_B_D43

DDR_B_D48 DDR_B_D49

DDR_B_DQS#6 DDR_B_DQS6

DDR_B_D50 DDR_B_D51

DDR_B_D56 DDR_B_D57

DDR_B_DM7

DDR_B_D58 DDR_B_D59

R630

1 2

R629

10K_0402_5%

3

DDR_B_BS#2(9)

M_CLK_DDR2(8) M_CLK_DDR#2(8)

DDR_B_BS#0(9)

DDR_B_WE#(9)

DDR_B_CAS#(9) M_ODT2 (8)

DDR_CS3_DIMMB#(8)

+3VS

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

VSS2

5

DQ0

7

DQ1

9

VSS4

11

DM0

13

VSS5

15

DQ2

17

DQ3

19

VSS7

21

DQ8

23

DQ9

25

VSS9

27

DQS#1 DQS129RESET#

31

VSS11

33

DQ10

35

DQ11

37

VSS13

39

DQ16

41

DQ17

43

VSS15

45

DQS#2

47

DQS2

49

VSS18

51

DQ18

53

DQ19

55

VSS20

57

DQ24

59

DQ25 VSS2261DQS#3

63

DM3

65

VSS23

67

DQ26

69

DQ27

71

VSS25

73

CKE0

75

VDD1

77

NC1

79

BA2

81

VDD3

83

A12/BC#

85

A9

87

VDD5

89

A8

91

A5

93

VDD7

95

A3

97

A1

99

VDD9

101

CK0

103

CK0#

105

VDD11

107

A10/AP

109

BA0

111

VDD13

113

WE#

115

CAS#

117

VDD15

119

A13

121

S1#

123

VDD17

125

NCTEST

127

VSS27

129

DQ32

131

DQ33

133

VSS29

135

DQS#4

137

DQS4

139

VSS32

141

DQ34

143

DQ35

145

VSS34

147

DQ40

149

DQ41

151

VSS36

153

DM5

155

VSS37

157

DQ42

159

DQ43

161

VSS39

163

DQ48

165

DQ49

167

VSS41

169

DQS#6

171

DQS6

173

VSS44

175

DQ50

177

DQ51

179

VSS46

181

DQ56

183

DQ57

185

VSS48

187

DM7

189

VSS49

191

DQ58

193

DQ59

195

VSS51

197

SA0

199

VDDSPD

201

SA1

203

VTT1

205

G1

FOX_AS0A626-UARN-7F

FOX_AS0A626-UARN-7F ME@

ME@

2007/09/29 2007/09/29

2 4

DQ4

6

DQ5

8

VSS3

10

DQS#0

12

DQS0

14

VSS6

16

DQ6

18

DQ7

20

VSS8

22

DQ12

24

DQ13

26

VSS10

28

DM1

30 32

VSS12

34

DQ14

36

DQ15

38

VSS14

40

DQ20

42

DQ21

44

VSS16

46

DM2

48

VSS17

50

DQ22

52

DQ23

54

VSS19

56

DQ28

58

DQ29

60

VSS21

62 64

DQS3

66

VSS24

68

DQ30

70

DQ31

72

VSS26

74

CKE1

76

VDD2

78

A15

80

A14

82

VDD4

84

A11

86

A7

88

VDD6

90

A6

92

A4

94

VDD8

96

A2

98

A0

100

VDD10

102

CK1

104

CK1#

106

VDD12

108

BA1

110

RAS#

112

VDD14

114

S0#

116

ODT0

118

VDD16

120

ODT1

122

NC2

124

VDD18

126

VREF_CA

128

VSS28

130

DQ36

132

DQ37

134

VSS30

136

DM4

138

VSS31

140

DQ38

142

DQ39

144

VSS33

146

DQ44

148

DQ45

150

VSS35

152

DQS#5

154

DQS5

156

VSS38

158

DQ46

160

DQ47

162

VSS40

164

DQ52

166

DQ53

168

VSS42

170

DM6

172

VSS43

174

DQ54

176

DQ55

178

VSS45

180

DQ60

182

DQ61

184

VSS47

186

DQS#7

188

DQS7

190

VSS50

192

DQ62

194

DQ63

196

VSS52

198

EVENT#

200

SDA

202

SCL

204

VTT2

206

G2

Compal Secret Data

Deciphered Date

2

DDR_B_D4 DDR_B_D5

DDR_B_DQS#0 DDR_B_DQS0

DDR_B_D6 DDR_B_D7

DDR_B_D12 DDR_B_D13

DDR_B_DM1 SM_DRAMRST#

DDR_B_D14 DDR_B_D15

DDR_B_D20 DDR_B_D21

DDR_B_DM2

DDR_B_D22 DDR_B_D23

DDR_B_D28 DDR_B_D29

DDR_B_DQS#3 DDR_B_DQS3

DDR_B_D30 DDR_B_D31

DDR_CKE3_DIMMB

DDR_B_MA14

DDR_B_MA11 DDR_B_MA7

DDR_B_MA6 DDR_B_MA4

DDR_B_MA2 DDR_B_MA0

M_CLK_DDR3 M_CLK_DDR#3

DDR_B_BS1 DDR_B_RAS#

DDR_CS2_DIMMB# M_ODT2

M_ODT3

DDR_VREF_CA_DIMMB

DDR_B_D36 DDR_B_D37

DDR_B_DM4

DDR_B_D38 DDR_B_D39

DDR_B_D44 DDR_B_D45

DDR_B_DQS#5 DDR_B_DQS5

DDR_B_D46 DDR_B_D47

DDR_B_D52 DDR_B_D53

DDR_B_DM6

DDR_B_D54 DDR_B_D55

DDR_B_D60 DDR_B_D61

DDR_B_DQS#7 DDR_B_DQS7

DDR_B_D62 DDR_B_D63

PM_EXTTS#0 CLK_SMBDATA CLK_SMBCLK

+0.75VS

2

SM_DRAMRST# (8,14)

DDR_CKE3_DIMMB (8)DDR_CKE2_DIMMB(8)

M_CLK_DDR3 (8) M_CLK_DDR#3 (8)

DDR_B_BS#1 (9) DDR_B_RAS# (9)

DDR_CS2_DIMMB# (8)

M_ODT3 (8)

R624

1 2

same with intel DDR3 CRB connection

PM_EXTTS#0 (8,14)

CLK_SMBDATA (14,22) CLK_SMBCLK (14,22)

1

+V_DDR3_DIMM_REF

0_0402_5%

2.2U_0603_6.3V4Z

0.1U_0402_16V4Z

1

C786

C758

2

DDR3 SO-DIMM B REVERSE

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

DDRIII-SODIMM SLOT2

KIWAX_LA-5082P

1

0.4

15 53Wednesday, March 18, 2009

0.4

5

PCIE_MTX_C_GRX_P0

PCIE_MTX_C_GRX_N[0..15](10)

PCIE_MTX_C_GRX_P[0..15](10)

PCIE_GTX_C_MRX_N[0..15](10)

PCIE_GTX_C_MRX_P[0..15](10)

D D

PCIE_GTX_C_MRX_P0 PCIE_GTX_C_MRX_N0 PCIE_GTX_C_MRX_P1 PCIE_GTX_C_MRX_N1 PCIE_GTX_C_MRX_P2 PCIE_GTX_C_MRX_N2 PCIE_GTX_C_MRX_P3 PCIE_GTX_C_MRX_N3 PCIE_GTX_C_MRX_P4

C C

PCIE_GTX_C_MRX_N4 PCIE_GTX_MRX_N4 PCIE_GTX_C_MRX_P5 PCIE_GTX_C_MRX_N5 PCIE_GTX_C_MRX_P6 PCIE_GTX_C_MRX_N6 PCIE_GTX_C_MRX_P7 PCIE_GTX_C_MRX_N7 PCIE_GTX_C_MRX_P8 PCIE_GTX_C_MRX_N8 PCIE_GTX_C_MRX_P9 PCIE_GTX_C_MRX_N9 PCIE_GTX_C_MRX_P10 PCIE_GTX_C_MRX_N10 PCIE_GTX_C_MRX_P11 PCIE_GTX_C_MRX_N11 PCIE_GTX_C_MRX_P12 PCIE_GTX_C_MRX_N12 PCIE_GTX_C_MRX_P13 PCIE_GTX_C_MRX_N13 PCIE_GTX_C_MRX_P14 PCIE_GTX_C_MRX_N14 PCIE_GTX_C_MRX_P15 PCIE_GTX_C_MRX_N15

B B

OSC_SPREAD OSC_OUT

R966

10K_0402_5%

PM@

If External Spread Spectrum not stuff than stuff resistor

PCIE_MTX_C_GRX_N[0..15]

PCIE_MTX_C_GRX_P[0..15]

PCIE_GTX_C_MRX_N[0..15]

PCIE_GTX_C_MRX_P[0..15]

C930 0.1U_0402_10V7KPM@C930 0.1U_0402_10V7KPM@ C931 0.1U_0402_10V7KPM@C931 0.1U_0402_10V7KPM@ C932 0.1U_0402_10V7KPM@C932 0.1U_0402_10V7KPM@ C933 0.1U_0402_10V7KPM@C933 0.1U_0402_10V7KPM@ C934 0.1U_0402_10V7KPM@C934 0.1U_0402_10V7KPM@ C935 0.1U_0402_10V7KPM@C935 0.1U_0402_10V7KPM@ C936 0.1U_0402_10V7KPM@C936 0.1U_0402_10V7KPM@ C937 0.1U_0402_10V7KPM@C937 0.1U_0402_10V7KPM@ C938 0.1U_0402_10V7KPM@C938 0.1U_0402_10V7KPM@ C939 0.1U_0402_10V7KPM@C939 0.1U_0402_10V7KPM@ C940 0.1U_0402_10V7KPM@C940 0.1U_0402_10V7KPM@ C941 0.1U_0402_10V7KPM@C941 0.1U_0402_10V7KPM@ C942 0.1U_0402_10V7KPM@C942 0.1U_0402_10V7KPM@ C943 0.1U_0402_10V7KPM@C943 0.1U_0402_10V7KPM@ C944 0.1U_0402_10V7KPM@C944 0.1U_0402_10V7KPM@ C945 0.1U_0402_10V7KPM@C945 0.1U_0402_10V7KPM@ C946 0.1U_0402_10V7KPM@C946 0.1U_0402_10V7KPM@ C947 0.1U_0402_10V7KPM@C947 0.1U_0402_10V7KPM@ C948 0.1U_0402_10V7KPM@C948 0.1U_0402_10V7KPM@ C949 0.1U_0402_10V7KPM@C949 0.1U_0402_10V7KPM@ C950 0.1U_0402_10V7KPM@C950 0.1U_0402_10V7KPM@ C951 0.1U_0402_10V7KPM@C951 0.1U_0402_10V7KPM@ C952 0.1U_0402_10V7KPM@C952 0.1U_0402_10V7KPM@ C953 0.1U_0402_10V7KPM@C953 0.1U_0402_10V7KPM@ C954 0.1U_0402_10V7K

C954 0.1U_0402_10V7K C955 0.1U_0402_10V7K

C955 0.1U_0402_10V7K C956 0.1U_0402_10V7KPM@C956 0.1U_0402_10V7KPM@ C957 0.1U_0402_10V7KPM@C957 0.1U_0402_10V7KPM@ C958 0.1U_0402_10V7KPM@C958 0.1U_0402_10V7KPM@ C959 0.1U_0402_10V7KPM@C959 0.1U_0402_10V7KPM@ C960 0.1U_0402_10V7KPM@C960 0.1U_0402_10V7KPM@ C961 0.1U_0402_10V7KPM@C961 0.1U_0402_10V7KPM@

12

PM@

PM@ PM@

PM@

1 2

R963 22_0402_5%@ R963 22_0402_5%@

1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2

12

R967

R967 10K_0402_5%

10K_0402_5%

PM@

CLK_PCIE_VGA(22) CLK_PCIE_VGA#(22)

PLT_RST#(8,26,30,31)

PCIE_MTX_C_GRX_N0 PCIE_MTX_C_GRX_P1 PCIE_MTX_C_GRX_N1 PCIE_MTX_C_GRX_P2 PCIE_MTX_C_GRX_N2 PCIE_MTX_C_GRX_P3 PCIE_MTX_C_GRX_N3 PCIE_MTX_C_GRX_P4 PCIE_MTX_C_GRX_N4 PCIE_MTX_C_GRX_P5 PCIE_MTX_C_GRX_N5 PCIE_MTX_C_GRX_P6 PCIE_MTX_C_GRX_N6 PCIE_MTX_C_GRX_P7 PCIE_MTX_C_GRX_N7 PCIE_MTX_C_GRX_P8 PCIE_MTX_C_GRX_N8 PCIE_MTX_C_GRX_P9 PCIE_MTX_C_GRX_N9 PCIE_MTX_C_GRX_P10 PCIE_MTX_C_GRX_N10 PCIE_MTX_C_GRX_P11 PCIE_MTX_C_GRX_N11 PCIE_MTX_C_GRX_P12 PCIE_MTX_C_GRX_N12 PCIE_MTX_C_GRX_P13 PCIE_MTX_C_GRX_N13 PCIE_MTX_C_GRX_P14 PCIE_MTX_C_GRX_N14 PCIE_MTX_C_GRX_P15 PCIE_MTX_C_GRX_N15

CLK_PCIE_VGA CLK_PCIE_VGA#

1 2

R958 200_0402_5% @R958 200_0402_5% @

1 2

R959 2.49K_0402_1% PM@R959 2.49K_0402_1% PM@

PLT_RST#

10K_0402_5%

1 2

R962

@R962

@

PCIE_GTX_MRX_P0 PCIE_GTX_MRX_N0 PCIE_GTX_MRX_P1 PCIE_GTX_MRX_N1 PCIE_GTX_MRX_P2 PCIE_GTX_MRX_N2 PCIE_GTX_MRX_P3 PCIE_GTX_MRX_N3 PCIE_GTX_MRX_P4

PCIE_GTX_MRX_P5 PCIE_GTX_MRX_N5 PCIE_GTX_MRX_P6 PCIE_GTX_MRX_N6 PCIE_GTX_MRX_P7 PCIE_GTX_MRX_N7 PCIE_GTX_MRX_P8 PCIE_GTX_MRX_N8 PCIE_GTX_MRX_P9 PCIE_GTX_MRX_N9 PCIE_GTX_MRX_P10 PCIE_GTX_MRX_N10 PCIE_GTX_MRX_P11 PCIE_GTX_MRX_N11 PCIE_GTX_MRX_P12 PCIE_GTX_MRX_N12 PCIE_GTX_MRX_P13 PCIE_GTX_MRX_N13 PCIE_GTX_MRX_P14 PCIE_GTX_MRX_N14 PCIE_GTX_MRX_P15 PCIE_GTX_MRX_N15

XTALOUT XTALIN

4

U59A

AE12

PEX_RX0

AF12

PEX_RX0_N

AG12

PEX_RX1

AG13

PEX_RX1_N

AF13

PEX_RX2

AE13

PEX_RX2_N

AE15

PEX_RX3

AF15

PEX_RX3_N

AG15

PEX_RX4

AG16

PEX_RX4_N

AF16

PEX_RX5

AE16

PEX_RX5_N

AE18

PEX_RX6

AF18

PEX_RX6_N

AG18

PEX_RX7

AG19

PEX_RX7_N

AF19

PEX_RX8

AE19

PEX_RX8_N

AE21

PEX_RX9

AF21

PEX_RX9_N

AG21

PEX_RX10

AG22

PEX_RX10_N

AF22

PEX_RX11

AE22

PEX_RX11_N

AE24

PEX_RX12

AF24

PEX_RX12_N

AG24

PEX_RX13

AF25

PEX_RX13_N

AG25

PEX_RX14

AG26

PEX_RX14_N

AF27

PEX_RX15

AE27

PEX_RX15_N

AD10

PEX_TX0

AD11

PEX_TX0_N

AD12

PEX_TX1

AC12

PEX_TX1_N

AB11

PEX_TX2

AB12

PEX_TX2_N

AD13

PEX_TX3

AD14

PEX_TX3_N

AD15

PEX_TX4

AC15

PEX_TX4_N

AB14

PEX_TX5

AB15

PEX_TX5_N

AC16

PEX_TX6

AD16

PEX_TX6_N

AD17

PEX_TX7

AD18

PEX_TX7_N

AC18

PEX_TX8

AB18

PEX_TX8_N

AB19

PEX_TX9

AB20

PEX_TX9_N

AD19

PEX_TX10

AD20

PEX_TX10_N

AD21

PEX_TX11

AC21

PEX_TX11_N

AB21

PEX_TX12

AB22

PEX_TX12_N

AC22

PEX_TX13

AD22

PEX_TX13_N

AD23

PEX_TX14

AD24

PEX_TX14_N

AE25

PEX_TX15

AE26

PEX_TX15_N

AB10

PEX_REFCLK

AC10

PEX_REFCLK_N

AF10

PEX_TSTCLK_OUT

AE10

PEX_TSTCLK_OUT_N

AG10

PEX_TERMP

AD9

PEX_RST_N

D11

XTAL_SSIN

E9

XTAL_OUTBUFF

E10

XTAL_OUT

D10

XTAL_IN

NB9M-GS_BGA533

PM@

Part 1 of 5

PCI EXPRESS

CLK

GPIO10 GPIO11

GPIO

GPIO12 GPIO13 GPIO14 GPIO15 GPIO16 GPIO17 GPIO18 GPIO19

DACA_HSYNC DACA_VSYNC

DACA_RED

DACA_BLUE

DACA_GREEN

DACA_VREF DACA_RSET

DACB_CSYNC

DACB_RED

DACB_BLUE

DACB_GREEN

DACBI2CHDA DACADACC

DACB_VREF DACB_RSET

DACC_HSYNC

DACC_VSYNC

DACC_RED

DACC_BLUE

DACC_GREEN

DACC_VREF DACC_RSET

I2CA_SCL I2CA_SDA I2CB_SCL I2CB_SDA I2CC_SCL I2CC_SDA I2CD_SCL I2CD_SDA I2CE_SCL I2CE_SDA I2CH_SCL I2CH_SDA I2CS_SCL I2CS_SDA

JTAG_TCK

JTAG_TDI

JTAG_TDO JTAG_TMS

JTAG_TRST_N

TEST

TESTMODE

VDD_SENSE

HDA_RST_N

HDA_SDI

HDA_SDO

HDA_SYNC

HDA_BCLK

GPIO0 GPIO1 GPIO2 GPIO3 GPIO4 GPIO5 GPIO6 GPIO7 GPIO8 GPIO9

SPDIF

N1 G1 C1 M2 M3 K3 K2 J2 C2 M1 D2 D1 J3 J1 K1 F3 G3 G2 F1 F2

AD2 AD1

AE2 AD3 AE3

AF1 AE1

D6

F7 E6 E7

G6 F8

U6 U4

T5 R4 T4

R6 V6

R1 T3 R2 R3 A2 B1 N2 N3 Y6 W6 A3 A4 T1 T2

AF3 AG4 AE4 AF4 AG3 AD25

F9 W15

C6 A6 B6 B7 A7

NV_INVTPWM VGA_ENVDD VGA_ENBKL

1 2

R936 0_0402_5%PM@R936 0_0402_5%PM@

1 2

R937 0_0402_5%PM@R937 0_0402_5%PM@

VGA_GPIO11

VGA_GPIO14

VGA_HSYNC VGA_VSYNC

VGA_CRT_R VGA_CRT_B VGA_CRT_G

DACA_VREF DACA_RSET

VGA_DDCCLK_C VGA_DDCDATA_C

VGA_LVDS_SCL_C VGA_LVDS_SDA_C

I2CD_SCL I2CD_SDA I2CE_SCL

I2CE_SDA HDCP_SMB_CK1 HDCP_SMB_DAI EC_SMB_CK2 EC_SMB_DA2

JTAG_TCK JTAG_TDI JTAG_TDO JTAG_TMS JTAG_TRST_N TESTMODE

SPDIF_IN

VGA_HDA_RST_CODEC# HDA_SDIN1_R VGA_HDA_SDOUT_CODEC VGA_HDA_SYNC_CODEC VGA_HDA_BITCLK_CODEC

3

PAD

T158

R945 124_0402_1%PM@R945 124_0402_1%PM@

VGA_LVDS_SCL_C VGA_LVDS_SDA_C

VGA_HDMI_SCL_R VGA_HDMI_SDA_R

PAD

1 2

R964 0_0402_5%55NM@R964 0_0402_5%55NM@

HDMI_DETECT_VGA (23)

PAD

T157

VGA_ENVDD (24) VGA_ENBKL (24)

VGA_HSYNC (25) VGA_VSYNC (25)

VGA_CRT_R (25) VGA_CRT_B (25) VGA_CRT_G (25)

PM@

12

C929 0.1U_0402_16V4Z

VGA_HDMI_SCL_R

VGA_HDMI_SDA_R

0_0402_5%

R951

1 2 1 2

R952

0_0402_5%

R953 2.2K_0402_5% PM@R953 2.2K_0402_5% PM@

1 2

R955 2.2K_0402_5% PM@R955 2.2K_0402_5% PM@

1 2

R956 2.2K_0402_5% PM@R956 2.2K_0402_5% PM@

1 2

R957 2.2K_0402_5% PM@R957 2.2K_0402_5% PM@

1 2

R960

PM@R960

PM@

1 2

R961 10K_0402_5%PM@R9 61 10K_0402_5%PM@

T163

R965 0_0402_5%55NM_HDM I@R965 0_0402 _5%55NM_HDM I@

1 2

R968 10_0402_5%55 NM_HDMI@R968 10_0402_5%55 NM_HDMI@

1 2

R969 0_0402_5%55NM_HDM I@R969 0_0402 _5%55NM_HDM I@

1 2

R970 0_0402_5%55NM_HDM I@R970 0_0402 _5%55NM_HDM I@

1 2

R971 0_0402_5%55NM_HDM I@R971 0_0402 _5%55NM_HDM I@

1 2

R947

R947 R948

R948

R949 2.2K_0402_5%40NM @R949 2.2K_0402_5%40NM@

R950 2.2K_0402_5%40NM @R950 2.2K_0402_5%40NM@

55NM_HDMI@R951

55NM_HDMI@

55NM_HDMI@R952

55NM_HDMI@

EC_SMB_CK2 (5,36) EC_SMB_DA2 (5,36)

PAD

T159

PAD

T160

PAD

T161

PAD

T162

10K_0402_5%

+VGASENSE

@

GPU_VID1 GPU_VID0

2.2K_0402_5%PM@

VGA_HDMI_SCL VGA_HDMI_SDA

HDA_RST_CODEC#

HDA_SDOUT_CODEC HDA_SYNC_CODEC HDA_BITCLK_CODEC

12

R972

R972 33_0402_5%

33_0402_5%

2

GPU_VID1 GPU_VID0 VGA_CORE

0

1

0

GPU_VID1 (48) GPU_VID0 (48)

VGA_GPIO11 VGA_GPIO14

12

R940

10K_0402_5%

40NM@

CRT OUT

12 12

+3VS

+VGASENSE (17,48)

0

1

+3VS

0.9V

1.20V

1.09V

12

R939

R939 10K_0402_5%

10K_0402_5%

40NM@

HDCP_SMB_CK1 HDCP_SMB_DAI

VGA_HDMI_SCL (17,23) VGA_HDMI_SDA (17,23)

VGA_DDCCLK_C VGA_DDCDATA_C

VGA_LVDS_SCL_C VGA_LVDS_SDA_C

HDA_RST_CODEC# (8,27,34) HDA_SDIN1 (27) HDA_SDOUT_CODEC (8,27,34) HDA_SYNC_CODEC (8,27,34) HDA_BITCLK_CODEC (8,27,34)

P-State

10,12

0

8

For N10M 40NM

R941

2.2K_0402_5%

PM@

NB9M-GS

N10M-GE1-S (55nm)

VGA_CRT_R VGA_CRT_G VGA_CRT_B

+3VS

R942

2.2K_0402_5%

PM@

R944

2.2K_0402_5%

@

R933 150_0402_1%PM@R933 150_0402_1%PM@ R934 150_0402_1%PM@R934 150_0402_1%PM@ R935 150_0402_1%PM@R935 150_0402_1%PM@

12

R943

R943 10K_0402_5%

10K_0402_5%

@

Device ID

0x06E9

0x6EC

L23 MBK1608121YZF_0603PM@L23 MBK1608121YZF_0603PM@

1 2 1 2

L24 MBK1608121YZF_0603PM@L24 MBK1608121YZF_0603PM@

L25

L26 MBK1608121YZF_0603PM@L26 MBK1608121YZF_0603PM@

1 2 1 2

12P_0402_50V8J

MBK1608121YZF_0603PM@

PM@

C962

1

12P_0402_50V8J

2

External Spread Spectrum

1 2 1 2 1 2

1

C963

PM@

2

12P_0402_50V8J

1

55NM_HDMI@

C928

0.1U_0402_16V4Z

1 2

U60

8

VCC

7

WP

6

SCL

5

SDA

AT24C16AN-10SU-2.7_SO8

55NM_HDMI@

1

C964

PM@

1

C965

PM@

2

1

A0

2

A1

3

A2

4

GND

12

R946

100K_0402_1% 55NM_HD MI@

VGA_DDCCLK (25) VGA_DDCDATA (25)

VGA_LVDS_SCL (24) VGA_LVDS_SDA (24)

12P_0402_50V8J

1

C966

Y7

OUT

GND

PM@

GND

Y7

4

1

IN

1

C968

C968 20P_0402_50V8

20P_0402_50V8

2

PM@

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2007/10/15 2008/10/15

3

2

27MHZ_16PF_X7S027000BG1H-U

A A

20P_0402_50V8

5

C967

PM@

1

2

C966

22P_0402_50V8J@

2

EMI

Compal Secret Data

Deciphered Date

OSC_OUT

2

U61

1

REFOUT

2

XOUT

3

XIN/CLKIN

ASM3P2872AF-06OR_TSOT-23-6@

Title

N10M PCIE,LVDS,GPIO,CLK

Size Document Number Rev

B

Date: Sheet of

6

VSS

MODOUT

VDD

Compal Electronics, Inc.

KIWA5/6 LA-5081P

5

4

@

OSC_SPREAD

1 2

R973 22_0402_5%

1

+3VS

2

C969

0.1U_0402_16V4Z

1

@

16 53Wednesday, March 18, 2009

0.4

5

4

3

2

1

FBAD[0..63]

FBAA[0..13]

FBBA[2..5]

FBADQM#[0..7]

FBADQS[0..7]

FBADQS#[0..7]

D D

FBAD[0..63] (20,21)

FBAA[0..13] (20,21)

FBBA[2..5] (21)

FBADQM#[0..7] (20,21)

FBADQS[0..7] (20,21)

FBADQS#[0..7] (20,21)

cs0ODTCKE

R131 & R132 Pull-down for initialization

U59B

FBAD0 FBAD1 FBAD2 FBAD3 FBAD4 FBAD5 FBAD6 FBAD7 FBAD8 FBAD9 FBAD10 FBAD11 FBAD12 FBAD13 FBAD14 FBAD15 FBAD16 FBAD17 FBAD18 FBAD19 FBAD20

C C

B B

A A

FBAD21 FBAD22 FBAD23 FBAD24 FBAD25 FBAD26 FBAD27 FBAD28 FBAD29 FBAD30 FBAD31 FBAD32 FBAD33 FBAD34 FBAD35 FBAD36 FBAD37 FBAD38 FBAD39 FBAD40 FBAD41 FBAD42 FBAD43 FBAD44 FBAD45 FBAD46 FBAD47 FBAD48 FBAD49 FBAD50 FBAD51 FBAD52 FBAD53 FBAD54 FBAD55 FBAD56 FBAD57 FBAD58 FBAD59 FBAD60 FBAD61 FBAD62 FBAD63

U59B

D21 C22 B22 A22 C24 B25 A25 A26 D22 E22 E24 D24 D26 D27 C27 B27 D16 E16 D17 F18 D20 F20 E21 F21 C16 B18 C18 D18 C19 C21 B21 A21 P22 P24 R23 R24 T23 U24 V23 V24 N25 N26 R25 R26 T25 V26 V25 V27

V22 W22 W23 W24

AA22 AB23 AB24 AC24

W25 W26 W27

AA25 AB25 AB26 AD26 AD27

NB9M-GS_BGA533

PM@

FBA_D0 FBA_D1 FBA_D2 FBA_D3 FBA_D4 FBA_D5 FBA_D6 FBA_D7 FBA_D8 FBA_D9 FBA_D10 FBA_D11 FBA_D12 FBA_D13 FBA_D14 FBA_D15 FBA_D16 FBA_D17 FBA_D18 FBA_D19 FBA_D20 FBA_D21 FBA_D22 FBA_D23 FBA_D24 FBA_D25 FBA_D26 FBA_D27 FBA_D28 FBA_D29 FBA_D30 FBA_D31 FBA_D32 FBA_D33 FBA_D34 FBA_D35 FBA_D36 FBA_D37 FBA_D38 FBA_D39 FBA_D40 FBA_D41 FBA_D42 FBA_D43 FBA_D44 FBA_D45 FBA_D46 FBA_D47 FBA_D48 FBA_D49 FBA_D50 FBA_D51 FBA_D52 FBA_D53 FBA_D54 FBA_D55 FBA_D56 FBA_D57 FBA_D58 FBA_D59 FBA_D60 FBA_D61 FBA_D62 FBA_D63

Part 2 of 5

FBA_CMD0 FBA_CMD1 FBA_CMD2 FBA_CMD3 FBA_CMD4 FBA_CMD5 FBA_CMD6 FBA_CMD7 FBA_CMD8

FBA_CMD9 FBA_CMD10 FBA_CMD11 FBA_CMD12 FBA_CMD13 FBA_CMD14 FBA_CMD15 FBA_CMD16 FBA_CMD17 FBA_CMD18 FBA_CMD19 FBA_CMD20 FBA_CMD21 FBA_CMD22 FBA_CMD23 FBA_CMD24 FBA_CMD25 FBA_CMD26 FBA_CMD27 FBA_CMD28

FBA_DQM0

FBA_DQM1

FBA_DQM2

FBA_DQM3

FBA_DQM4

FBA_DQM5

FBA_DQM6

FBA_DQM7

FBA_DQS_RN0 FBA_DQS_RN1

MEMORY INTERFACE

FBA_DQS_RN2 FBA_DQS_RN3 FBA_DQS_RN4 FBA_DQS_RN5 FBA_DQS_RN6 FBA_DQS_RN7

FBA_DQS_WP0 FBA_DQS_WP1 FBA_DQS_WP2 FBA_DQS_WP3 FBA_DQS_WP4 FBA_DQS_WP5 FBA_DQS_WP6 FBA_DQS_WP7

FBA_CLK0

FBA_CLK0_N

FBA_CLK1

FBA_CLK1_N

FBA_DEBUG

FB_VREF

F26 J24 F25 M23 N27 M27 K26 J25 J27 G23 G26 J23 M25 K27 G25 L24 K23 K24 G22 K25 H22 M26 H24 F27 J26 G24 G27 M24 K22

D23 C26 D19 B19 T24 T26 AA23 AB27

B24 D25 E18 A18 R22 R27 Y24 AA27

A24 C25 E19 A19 T22 T27 AA24 AA26

A16

F24 F23

N24 N23

M22

FBAA4 FBARAS# FBAA5 FBA_BA1 FBBA2 FBBA4 FBBA3 FBB_CKE FBB_CS0# FBAA11 FBA_CAS# FBA_WE# FBA_BA0 FBBA5 FBAA12 FB_ODT FBAA7 FBAA10 FBA_CKE FBAA0 FBAA9 FBAA6 FBAA2 FBAA8 FBAA3 FBAA1

FBA_BA2 FBB_ODT

FBADQM#0 FBADQM#1 FBADQM#2 FBADQM#3 FBADQM#4 FBADQM#5 FBADQM#6 FBADQM#7

FBADQS#0 FBADQS#1 FBADQS#2 FBADQS#3 FBADQS#4 FBADQS#5 FBADQS#6 FBADQS#7

FBADQS0 FBADQS1 FBADQS2 FBADQS3 FBADQS4 FBADQS5 FBADQS6 FBADQS7

FB_VREF1

FBA_DEBUG

R992 60.4_0402_1%

CKE & RESET/ODT

FBA_RAS# (20,21)

FBA_BA1 (20,21)

FBB_CS0# (20,21)

FBA_CAS# (20,21) FBA_WE# (20,21) FBA_BA0 (20,21)

FB_ODT (20,21)

FBA_BA2 (20,21) FBB_ODT (21)

FBACLK0 (20) FBACLK0# (20)

FBACLK1 (21) FBACLK1# (21)

1 2

PM@

12

R118

R118 10K_0402_5%

10K_0402_5%

40NM@

12

R119

R119 10K_0402_5%

10K_0402_5%

PM@

FB_ODT FBB_ODT FBA_ODT

12

R130

40NM@

10K_0402_5%

40NM@

1.27V~0.9V

+1.8VS

12

R128

R129

10K_0402_5%

FBB_CKE (21)

FBA_CKE (20,21)

12

55NM@

10K_0402_5%

10mil

1

C970

0.01U_0402_16V7K

@

2

VGA_HDMI_TX2(23) VGA_HDMI_TX2#(23) VGA_HDMI_TX1(23) VGA_HDMI_TX1#(23) VGA_HDMI_TX0(23) VGA_HDMI_TX0#(23) VGA_HDMI_CLK(23) VGA_HDMI_CLK#(23)

+1.8VS

VGA_LVDS_ACLK(24) VGA_LVDS_ACLK#(24) VGA_LVDS_A0(24) VGA_LVDS_A0#(24) VGA_LVDS_A1(24) VGA_LVDS_A1#(24) VGA_LVDS_A2(24) VGA_LVDS_A2#(24)

R985 1K_0402_5%@R985 1K_0402_5%@

1 2

R986 1K_0402_5%@R986 1K_0402_5%@

1 2

R987 1K_0402_5%

1 2

12

R988

1.3K_0402_1%

@

12

R991

1.3K_0402_1%

@

VGA_LVDS_ACLK VGA_LVDS_ACLK# VGA_LVDS_A0 VGA_LVDS_A0# VGA_LVDS_A1 VGA_LVDS_A1# VGA_LVDS_A2 VGA_LVDS_A2#

VGA_HDMI_TX2+ VGA_HDMI_TX2VGA_HDMI_TX1+ VGA_HDMI_TX1VGA_HDMI_TX0+ VGA_HDMI_TX0VGA_HDMI_CLK+ VGA_HDMI_CLK-

PM@

U59C

AC4

IFPA_TXC

AD4

IFPA_TXC_N

V5

IFPA_TXD0

V4

IFPA_TXD0_N

AA5

IFPA_TXD1

AA4

IFPA_TXD1_N

W4

IFPA_TXD2

Y4

IFPA_TXD2_N

AB4

IFPA_TXD3

AB5

IFPA_TXD3_N

AB3

IFPB_TXC

AB2

IFPB_TXC_N

W1

IFPB_TXD4

V1

IFPB_TXD4_N

W3

IFPB_TXD5

W2

IFPB_TXD5_N

AA2

IFPB_TXD6

AA3

IFPB_TXD6_N

AB1

IFPB_TXD7

AA1

IFPB_TXD7_N

P4

IFPC_L0

N4

IFPC_L0_N

M5

IFPC_L1

M4

IFPC_L1_N

L4

IFPC_L2

K4

IFPC_L2_N

H4

IFPC_L3

J4

IFPC_L3_N

F5

IFPE_L0

F4

IFPE_L0_N

E4

IFPE_L1

D5

IFPE_L1_N

C3

IFPE_L2

C4

IFPE_L2_N

B3

IFPE_L3

B4

IFPE_L3_N

AB6

IFPAB_RSET

M6

IFPE_RSET

R5

IFPC_RSET

NB9M-GS_BGA533

PM@

Part 3 of 5

NC

STARP_REF_MIOB

STARP_REF_3V3

BUFRST_N

THERMDN

THERMDP

GENERAL STRAP

ROM_CS_N

ROM_SCLK

L V D S / T M D S

SERIAL

IFPE_AUX_N

IFPE_AUX

IFPC_AUX_N

IFPC_AUX

IFPC_AUX_N

NC NC NC NC NC NC NC NC NC NC NC NC

STRAP0 STRAP1 STRAP2

ROM_SI

ROM_SO

4.7K_0402_5%

40NM_HDMI@

4.7K_0402_5%

40NM_HDMI@

C15 D15 E15 F6 J5 J22 L22 T6 AA6 AC19 AE9 AG9

C7 B9 A9

F10 F11

N5

D8

D9

B10

C9

A10

C10

D4 D3 G5 G4

R989

R993

1 2

R974 0_0402_5%40NM@R974 0_0402_5%40NM@

FBA_CS0# FBA_ODT

R978

R978 0_0402_5%

0_0402_5%

STRAP0 STRAP1 STRAP2

PAD

T164

PAD

T165

PAD

T167

ROM_SCLK

ROM_SI

ROM_SO

IFPC_AUX_N IFPC_AUX

1 2

Q42A

2N7002DW-T/R7_SOT363-6

Q42B

1 2

For N10M

+VGASENSE

40NM@

1 2

FBA_CS0# (20) FBA_ODT (20)

STRAP0 (19) STRAP1 (19) STRAP2 (19)

12

R982

40.2K_0402_1%

PM@

ROM_SCLK (19)

ROM_SI (19)

ROM_SO (19)

+VGASENSE (16,48)

+FB_PLLAVDD

for GT21x request

+3VS

2

40NM_HDMI@Q42A

40NM_HDMI@

4

+3VS

40NM_HDMI@Q42B

40NM_HDMI@

5

61

3

VGA_HDMI_SCL (16,23)

VGA_HDMI_SDA (16,23)

+3VS

R975

R975 0_0402_5%

0_0402_5%

1 2

12

R983

40.2K_0402_1%

PM@

+1.1VS

40NM@

1 2

R976

R976 0_0402_5%

0_0402_5%

@

5V PULL UP IN CONNECTER SIDE

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2007/10/15 2008/10/15

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

B

Date: Sheet

Date: Sheet of

2

Date: Sheet of

N10M Memory

KIWA5/6 LA-5081P

1

0.4

of

17 53Wednesday, March 18, 2009

5

4

3

2

1

FOR N10M 40NM , 1.1VS needs to be changed to 1.05VS

+VGA_CORE

13.56A NEAR BALL

0.1U_0402_16V4Z

220U_D2_4VM

PM@

220U_D2_4VM

C977

D D

C C

80mA

+1.8VS

110mA NEAR BGA

B B

+1.8VS

+3VS

+1.1VS

A A

L28

MBK1608121YZF_0603

1 2

PM@

4.7U 6.3V K X5R 0603

L31

MBK1608121YZF_0603

1 2

PM@

4.7U 6.3V K X5R 0603

IFPC_PLLVDD: please add option to support both 1.8V (for G9X) and 3.3V(for GT21X)

MBK1608121YZF_0603

1 2

55NM_HDMI@

L37

1 2

40NM_HDMI@

MBK1608121YZF_0603

L40

MBK1608121YZF_0603

PM_HDMI@

1 2

NEAR BGA

1

2

1

2

L35

4.7U 6.3V K X5R 0603

4700P_0402_25V7K

C1019

PM@

4700P_0402_25V7K

C1025

PM@

1

C1035

PM_HDMI@

2

1

C1042

PM_HDMI@

2

5

0.1U_0402_16V4Z

1

+

C978

PM@

2

0.1U_0402_16V4Z

0.47U_0402_6.3V6K

1

C990

PM@

2

0.47U_0402_6.3V6K

+3VS

2

C1011

PM@

1

C1020

PM@

2

1

C1026

PM@

2

4700P_0402_25V7K

1

2

4700P_0402_25V7K

1

2

C979

PM@

C991

PM@

1U_0603_10V4Z

NEAR BALL

C1036

PM_HDMI@

C1043

PM_HDMI@

470P_0402_50V7K

0.1U_0402_16V4Z

1

2

1

2

0.47U_0402_6.3V6K

1

2

4.7U 6.3V K X5R 0603

0.1U_0402_16V4Z

470P_0402_50V7K

C980

PM@

0.47U_0402_6.3V6K

1

C993

C992

PM@

2

4.7U 6.3V K X5R 0603

1

C1001

C1002

PM@

2

1

C1012

PM@

2

C1021

PM@

C1027

PM@

1

C1044

PM_HDMI@

2

NEAR BGA

NEAR BALLNEAR BGA

C1013

PM@

0.1U_0402_16V4Z

+IFPC_PLLVDD

0_0402_5%

PM_NOHDMI@

+IFPC_IOVDD

0.1U_0402_16V4Z

1

C981

PM@

2

0.1U_0402_16V4Z

1

C994

PM@

2

0.47U_0402_6.3V6K

1

2

12~16mil

C1036

C1044

0_0402_5%

PM_NOHDMI@

1

C982

C983

PM@

2

0.1U_0402_16V4Z

1

C995

PM@

2

0.47U_0402_6.3V6K

+IFPA_IOVDD

NEAR BALL

4

1

2

+IFPB_IOVDD +IFPC_IOVDD

R99410K_0402_5%

+IFPAB_PLLVDD

R99710K_0402_5%

+PEX_PLLVDD

NEAR BALL

260mA

+1.8VS

MBK1608121YZF_0603

55NM@

1 2

+1.1VS

L39

1 2

40NM@

MBK1608121YZF_0603

IFPAB_PLLVDD: please add option to support both 1.8V(for G9X) and 1.05V(for GT21X)

J9 J10 J12 J13

L9

M9 M11 M17

N9 N11 N12 N13 N14 N15 N16 N17 N19 P11 P12 P13 P14 P15 P16 P17

R9 R11 R12 R13 R14 R15 R16 R17

T9 T11 T17

U9

U19

W9 W10 W12 W13 W18 W19

A12 B12 C12 D12 E12 F12

V3 V2 J6

PM@

12

H6

AD5

P6

PM@

N6

12

0.01U_0402_16V7K

NEAR BGA

L36

4.7U 6.3V K X5R 0603

U59D

VDD VDD VDD VDD VDD VDD

Part 4 of 5

VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD

VDD33 VDD33 VDD33 VDD33 VDD33 VDD33

IFPA_IOVDO IFPB_IOVDD IFPC_IOVDD

IFPE_IOVDD

IFPAB_PLLVDD IFPC_PLLVDD IFPE_PLLVDD

NB9M-GS_BGA533

PM@

0.1U_0402_16V4Z

1

C1028

PM@

2

4700P_0402_25V7K

1

C1037

PM@

2

A13

FBVDDQ

B13

FBVDDQ

C13

FBVDDQ

D13

FBVDDQ

D14

FBVDDQ

E13

FBVDDQ

F13

FBVDDQ

F14

FBVDDQ

F15

FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ

PEX_IOVDDQ PEX_IOVDDQ

POWER

PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ

PEX_IOVDD PEX_IOVDD PEX_IOVDD PEX_IOVDD PEX_IOVDD PEX_IOVDD

PEX_PLLVDD

VID_PLLVDD

SP_PLLVDD

PLLVDD

FB_PLLAVDD

FB_DLLAVDD

DACA_VDD DACB_VDD DACC_VDD

FB_CAL_PD_VDDQ

1

C1030

C1029

PM@

2

1U_0402_6.3V4Z

1

2

F16 F17 F19 F22 H23 H26 J15 J16 J18 J19 L19 L23 L26 M19 N22 U22 Y22

AG6 AF6 AE6 AD6 AC13 AC7 AB17 AB16 AB13 AB9 AB8 AB7 AG7 AF7 AE7 AD8 AD7 AC9

AF9 K6 L6 K5

R19

T19

AG2 D7 W5

B15

10U_0805_10V4Z

PM@

+PEX_PLLVDD

12~16mil

+FB_PLLAVDD

+FB_DLLAVDD

+DACA_VDD +DACB_VDD +DACC_VDD+IFPC_PLLVDD

1 2

1

C1031

PM@

2

4700P_0402_25V7K

+1.1VS_PLL

MBK1608121YZF_0603

NEAR BGA

1

2

+IFPAB_PLLVDD

C1038

PM@

NEAR BALL

Security Classification

Issued Date

THIS SHEET OF ENGINEER ING DRAWING IS THE PROPRIETARY PROPERT Y OF COMPAL ELECTRONICS, INC. AND CONTAINS CON FIDENTIAL

THIS SHEET OF ENGINEER ING DRAWING IS THE PROPRIETARY PROPERT Y OF COMPAL ELECTRONICS, INC. AND CONTAINS CON FIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

0.022U_0402_16V7K

1

C971

PM@

2

0.022U_0402_16V7K

C972

PM@

1

2

1

C973

PM@

2

0.1U_0402_16V4Z

1

C974

PM@

2

4.7U 6.3V K X5R 0603

PLACE BELOW GPU

4700P_0402_25V7K

1

C984

PM@

2

4700P_0402_25V7K

1

C996

PM@

2

4700P_0402_25V7K

PM@

0.1U_0402_16V4Z

1U_0402_6.3V4Z

PM@

1 2

R995 10K_0402_5%

1 2

R996 10K_0402_5%@R996 10K_0402_5%@

R998

30.1_0402_1%PM@

L32

1 2

PM@

2007/10/15 2008/10/15

C985

PM@

2

0.022U_0402_16V7K

1

C997

PM@

2

0.1U_0402_16V4Z

1

C1003

PM@

2

1

C1007

PM@

2

0.1U_0402_16V4Z

1

C1014

PM@

2

0.1U_0402_16V4Z

+1.8VS

+1.1VS

37.4_0402_1%

40NM@

C986

PM@

C998

PM@

1

C1004

2

1

C1015

PM@

2

R996

Compal Secret Data

C987

PM@

2

0.022U_0402_16V7K

1

2

1

2

1U_0402_6.3V6K

Deciphered Date

1

2

0.47U_0402_6.3V6K

1

C1005

PM@

2

0.47U_0402_6.3V6K

NEAR BALL

1U_0402_6.3V6K

1

C1017

C1016

PM@

2

+FB_PLLAVDD

+FB_DLLAVDD

4.7U 6.3V K X5R 0603

1

C975

@

2

C976

PM@

1

2

FBAVDDQ=2.24A

1U_0603_10V4Z

1

C989

C988

PM@

2

0.1U_0402_16V4Z

PM@

1U_0402_6.3V6K

1

C999

PM@

2

1

C1006

2

4.7U 6.3V K X5R 0603

MBK1608121YZF_0603

1

NEAR BALL

C1018

PM@

2

+FB_PLLAVDD

1

2

0.01U_0402_16V7K

1

2

0.01U_0402_16V7K

1U_0603_10V4Z

C1000

PM@

1

C1008

PM@

2

L27

C1022

PM@

C1032

PM@

110mA

2

PLACE NEAR BGA

+1.8VS

1

2

+1.8VS

1

2

PEX_IOVDDQ=1.6A PEX_IOVDD=500mA PEX_PLLVDD=100mA

10U_0805_10V4Z

1

C1009

PM@L27

PM@

C1009

PM@

10U_0805_10V4Z

+1.1VS

12

C1010

PM@

2

PLLVDD=65mA SP_PLLVDD=25mA VID_PLLVDD=50mA

0.1U_0402_16V4Z

1

C1023

PM@

2

0.1U_0402_16V4Z

1

C1033

PM@

2

+DACA_VDD

4.7U 6.3V K X5R 0603

470P_0402_50V7K

Title

Size Document Number Rev

Custom

Date: Sheet of

MBK1608121YZF_0603

1

C1024

PM@

2

MBK1608121YZF_0603

1

C1034

PM@

2

4700P_0402_25V7K

1

C1039

PM@

2

Compal Electronics, Inc.

+1.1VS

1

2

L30

1 2

PM@

L34

1 2

PM@

4.7U 6.3V K X5R 0603

1

C1040

PM@

2

NB10M Power

KIWA5/6 LA-5081P

1

+1.1VS

L38

1

2

C1041

PM@

L38

PM@

18 53Wednesday, March 18, 2009

MBK1608121YZF_0603

+3VS

12

0.4

5

4

3

2

1

A total of 8 signals are required for GB1 strapping this includes

2 reference signals

6 physical strapping pins

4 logical strapping bits

U59E

B2

GND

Part 5 of 5

B5

GND

B8

GND

B11

GND

B14

GND

B17

D D

C C

GND

B20

GND

B23

GND

B26

GND

E2

GND

E5

GND

E8

GND

E11

GND

E14

GND

E17

GND

E20

GND

E23

GND

E26

GND

H2

GND

H5

GND

J11

GND

J14

GND

J17

GND

K9

GND

K19

GND

L2

GND

L5

GND

L11

GND

L12

GND

L13

GND

L14

GND

L15

GND

L16

GND

L17

GND

M12

GND

M13

GND

M14

GND

M15

GND

M16

GND

P2

GND

P5

GND

P9

GND

P19

GND

P23

GND

P26

GND

T12

GND

T13

GND

NB9M-GS_BGA533

55NM@

Memory/PKG

GND_SENSE

FB_CAL_PU_GND

FB_CAL_TERM_GND

FBCAL_PU_GND FBCAL_PD_VDDQ FBCAL_TERM_GND

DDR2

GDDR3

U2

GND

U5

GND

U11

GND

U12

GND

U13

GND

U14

GND

U15

GND

U16

GND

U17

GND

U23

GND

U26

GND

V9

GND

V19

GND

W11

GND

W14

GND

W17

GND

Y2

GND

Y5

GND

Y23

GND

Y26

GND

AC2

GND

AC5

GND

AC6

GND

AC8

GND

AC11

GND

AC14

GND

AC17

GND

AC20

GND

AC23

GND

AC26

GND

AF2

GND

AF5

GND

AF8

GND

AF11

GND

AF14

GND

AF17

GND

AF20

GND

AF23

GND

AF26

GND

T16

GND

T15

GND

T14

GND

R1011 0_0402_5%PM@R1011 0_0402_5%PM@

W16

R1012 30.1_0402_1%55NM@R1012 30.1_0402_1%55NM@

A15

R1013 40.2_0402_1%

B16

1 2

30.1ohm

33.2ohm 40.2ohm44.2ohm

1 2

@

NC30.1ohm

40.2_0402_1%

40NM@

40NM@R1013 40.2_0402_1%

A total of 24 logical strapping bits are available

+3VS

12

R999

R148 pop 25K ohm when use N10M-GE1-S(55nm)

STRAP2(17) STRAP1(17) STRAP0(17) ROM_SCLK(17)

ROM_SI(17)

ROM_SO(17)

R1002

15K_0402_1%

40NM@

R1012

44.2_0402_1%

40NM@

R1013

N10M-GE1-S (0x6EC) 55nm

STRAP2 STRAP1 STRAP0 ROM_SCLK ROM_SI ROM_SO

R1005

24.9K_0402_1%

40NM@

FB Memory (DDR2)

Samsung

Hynix

Qimonda

@

64Mx16

R999

12

R1005

@

12

R1000

@

10K_0402_5%

10K_0402_1%

10K_0402_5%

12

R1006

PM@

10K_0402_5%

10K_0402_1%

ROM_SO

PU 5K PU 5K

12

R1001

45.3K_0402_1%

R1007

@

PM@

R1002

@

12

R1008

55NM@

10K_0402_5%

ROM_SCLK ROM_SIGPU STRAP2 STRAP1 STRAP0

PD 15K

PU 5K PD 15K PD 10K PU 45KPU 5K

PU 5K

PD 15K

12

R1003

R1004

@

55NM@

2K_0402_5%

10K_0402_5%

12

R1009

X76@

20K_0402_1%

15K_0402_1%

12

R1010

4.99K_0402_1%

40NM@

10K_0402_1%

R999

24.9K_0402_1%

55NM@

X76GB1 Family GPU Strap Qptions

PD 10K

PD 5K

PD 15K

PU 5K

PD 10K

PU 45K

To update for NV PUN-03304-001_V06 (2008/4/01)

FB Memory (DDR2)

U59

B B

U59

NB10M-GS-S

40NM@

N10M-GS (0x6EC) 40nm

Samsung

Hynix

Qimonda

64Mx16

ROM_SO

PD 10K

PD 10K PD 15K PD 10K PU 45KPU 10K

PD 10K

ROM_SCLK ROM_SIGPU STRAP2 STRAP1 STRAP0

PD 15K

PD 10K

PU 10K

PD 10K

PU 45K

PD 5K

PD 15K

PU 10K

PD 10K

PU 45K

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2007/10/15 2008/10/15

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

B

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

N10M GND & STRAP

KIWA5/6 LA-5081P

19 53Thursday, March 19, 2009

1

0.4

5

FBA_BA0 FBA_BA1

FBAA12 FBAA11 FBAA10 FBAA9 FBAA8 FBAA7 FBAA6 FBAA5 FBAA4 FBAA3

D D

+1.8VS

12

R480

C C

+VRAM_VREFA +VRAM_VREFA

R479

1K_0402_1%

PM@

R480

1K_0402_1%

PM@

12

C613

1

0.047U_0402_16V4Z

PM@

Close to U6 Close to U28

2

FBAA2 FBAA1 FBAA0

FBACLK0# FBACLK0

FBA_CKE

FBACS0#_V

FBAWE#

FBARAS#

FBACAS#

FBADQM#1 FBADQM#0

FBAODT_V

FBADQS1 FBADQS#1

FBADQS0 FBADQS#0

(SSTL-1.8) VREF = .5* VDDQ

FBABA2 FBABA2

U6

L2

BA0

L3

BA1

R2

A12

P7

A11

M2

A10/AP

P3

A9

P8

A8

P2

A7

N7

A6

N3

A5

N8

A4

N2

A3

M7

A2

M3

A1

M8

A0

K8

CK

J8

CK

K2

CKE

L8

CS

K3

WE

K7

RAS

L7

CAS

F3

LDM

B3

UDM

K9

ODT

F7

LDQS

E8

LDQS

B7

UDQS

A8

UDQS

J2

VREF

A2

NC#A2

E2

NC#E2

L1

BA2

R3

NC#R3

R7

NC#R7

R8

NC#R8

HYB18T1G161C2F-20_PG-TFBGA84

X76@

DQ15 DQ14 DQ13 DQ12 DQ11 DQ10

DQ9 DQ8 DQ7 DQ6 DQ5 DQ4 DQ3 DQ2 DQ1 DQ0

VDDQ1 VDDQ2 VDDQ3 VDDQ4 VDDQ5 VDDQ6 VDDQ7 VDDQ8 VDDQ9

VDDQ10

VDD1 VDD2 VDD3 VDD4 VDD5

VDDL

VSSDL

VSSQ1 VSSQ2 VSSQ3 VSSQ4 VSSQ5 VSSQ6 VSSQ7 VSSQ8 VSSQ9

VSSQ10

VSS1 VSS2 VSS3 VSS4 VSS5

DDR2 BGA MEMORY

+1.8VS

0.01U_0402_16V7K

1

C621

PM@

2

1000P_0402_50V7K

B B

1000P_0402_50V7K

1

C622

C624

PM@

2

0.01U_0402_16V7K

0.1U_0402_16V4Z

1

C626

PM@

2

1U_0402_6.3V4Z

0.1U_0402_16V4Z

1

C625

PM@

2

1

C619

PM@

2

0.1U_0402_16V4Z

4

FBAD7

B9

FBAD3

B1

FBAD4

D9

FBAD0

D1

FBAD1

D3

FBAD6

D7

FBAD2

C2

FBAD5

C8

FBAD10

F9

FBAD15

F1

FBAD8

H9

FBAD13

H1

FBAD12

H3

FBAD9

H7

FBAD14

G2

FBAD11

G8

A9 C1 C3 C7 C9 E9 G1 G3 G7 G9

A1 E1 J9 M9 R1

J1 J7

A7 B2 B8 D2 D8 E7 F2 F8 H2 H8

A3 E3 J3 N1 P9

1

C620

PM@

2

+1.8VS +1.8VS

1

+

C184

PM@

C184

PM@

220U_D2_4VM_R15

2

1

C630

0.1U_0402_16V4Z

PM@

2

1

C615

PM@

2

0.01U_0402_16V7K

1

C617

C617 1U_0402_6.3V4Z

1U_0402_6.3V4Z

PM@

2

0.047U_0402_16V4Z

PM@

1

C91

2

1000P_0402_50V7K

(SSTL-1.8) VREF = .5* VDDQ

+1.8VS

0.01U_0402_16V7K

1

C110

PM@

2

FBA_BA0 FBA_BA1

FBAA12 FBAA11 FBAA10 FBAA9 FBAA8 FBAA7 FBAA6 FBAA5 FBAA4 FBAA3 FBAA2 FBAA1 FBAA0

FBACLK0# FBACLK0

FBA_CKE

FBACS0#_V

FBAWE#

FBARAS#

FBACAS#

FBADQM#2 FBADQM#3

FBAODT_V

FBADQS2 FBADQS#2

FBADQS3 FBADQS#3

1

C113

PM@

2

0.01U_0402_16V7K

3

U28

L2

BA0

L3

BA1

R2

A12

P7

A11

M2

A10/AP

P3

A9

P8

A8

P2

A7

N7

A6

N3

A5

N8

A4

N2

A3

M7

A2

M3

A1

M8

A0

K8

CK

J8

CK

K2

CKE

L8

CS

K3

WE

K7

RAS

L7

CAS

F3

LDM

B3

UDM

K9

ODT

F7

LDQS

E8

LDQS

B7

UDQS

A8

UDQS

J2

VREF

A2

NC#A2

E2

NC#E2

L1

BA2

R3

NC#R3

R7

NC#R7

R8

NC#R8

HYB18T1G161C2F-20_PG-TFBGA84

X76@

DDR2 BGA MEMORY

0.1U_0402_16V4Z

1

C137

C130

PM@

2

1U_0402_6.3V4Z

VDDQ1 VDDQ2 VDDQ3 VDDQ4 VDDQ5 VDDQ6 VDDQ7 VDDQ8 VDDQ9

VDDQ10

VSSDL

VSSQ1 VSSQ2 VSSQ3 VSSQ4 VSSQ5 VSSQ6 VSSQ7 VSSQ8 VSSQ9

VSSQ10

0.1U_0402_16V4Z

1

C143

PM@

2

DQ15 DQ14 DQ13 DQ12 DQ11 DQ10

DQ9 DQ8 DQ7 DQ6 DQ5 DQ4 DQ3 DQ2 DQ1 DQ0

VDD1 VDD2 VDD3 VDD4 VDD5

VDDL

VSS1 VSS2 VSS3 VSS4 VSS5

1

C103

PM@

2

0.1U_0402_16V4Z

2

FBAD25

B9

FBAD29

B1

FBAD24

D9

FBAD31

D1

FBAD28

D3

FBAD27

D7

FBAD30

C2

FBAD26

C8

FBAD18

F9

FBAD23

F1

FBAD17

H9

FBAD21

H1

FBAD19

H3

FBAD16

H7

FBAD22

G2

FBAD20

G8

A9 C1 C3 C7 C9 E9 G1 G3 G7 G9

A1 E1 J9 M9 R1

J1 J7

1

C92

0.1U_0402_16V4Z

PM@

2

A7 B2 B8 D2 D8 E7 F2 F8 H2 H8

A3 E3 J3 N1 P9

1

C158

C100

PM@

2

0.01U_0402_16V7K

R104

220_0402_1%

40NM@

1

C98

C98 1U_0402_6.3V4Z

1U_0402_6.3V4Z

PM@

2

FBACLK0(17)

FBACLK0#(17)

FBA_ODT(17)

FB_ODT(17,21)

FBA_CS0#(17)

FBB_CS0#(17,21)

FBBA[2..5](17,21)

FBAD[0..63](17,21)

FBAA[0..12](17,21)

FBADQS[0..7](17,21)

FBADQS#[0..7](17,21)

FBADQM#[0..7](17,21)

FBA_BA0(17,21)

FBA_BA1(17,21)

FBA_CKE(17,21)

FBA_RAS#(17,21)

FBA_CAS#(17,21)

FBA_WE#(17,21)

FBA_BA2(17,21)

Close to U5

12

R104

R104 475_0402_1%

475_0402_1%

55NM@

FBBA[2..5]

FBAD[0..63]

FBAA[0..12]

FBADQS[0..7]

FBADQS#[0..7]

FBADQM#[0..7]

FBA_BA0

FBA_BA1

FBA_CKE

FBARAS#

FBACAS#

FBAWE#

FBABA2

1 2

0_0402_5%

FB_ODT

0_0402_5%

1 2

0_0402_5%

FBA_CS0# FBACS0#_V

1 2

0_0402_5%

FBB_CS0#

1 2

0_0402_5%

R196

40NM@

R193

55NM@

R194

40NM@

R195

55NM@

FBACLK0

FBACLK0#

1

FBAODT_VFBA_ODT

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2007/10/15 2008/10/15

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

VRAM DDRA

KIWA5/6 LA-5081P

20 53Wednesday, March 18, 2009

1

0.4

5

FBA_BA0 FBA_BA1

FBAA12 FBAA11 FBAA10 FBAA9 FBAA8 FBAA7 FBAA6 FBBA5 FBBA4 FBBA3

D D

+1.8VS

12

R184

12

R184

1K_0402_1%

PM@

C319

1

0.047U_0402_16V4Z

PM@

Close to U29

2

C C

+VRAM_VREFB

R190

1K_0402_1%

PM@

FBBA2 FBAA1 FBAA0

FBACLK1# FBACLK1

FBB_CKE_V

FBBCS0#

FBAWE#

FBARAS#

FBACAS#

FBADQM#7 FBADQM#5

FBBODT_V

FBADQS7 FBADQS#7

FBADQS5 FBADQS#5

(SSTL-1.8) VREF = .5* VDDQ

FBABA2 FBABA2

U29

L2

BA0

L3

BA1

R2

A12

P7

A11

M2

A10/AP

P3

A9

P8

A8

P2

A7

N7

A6

N3

A5

N8

A4

N2

A3

M7

A2

M3

A1

M8

A0

K8

CK

J8

CK

K2

CKE

L8

CS

K3

WE

K7

RAS

L7

CAS

F3

LDM

B3

UDM

K9

ODT

F7

LDQS

E8

LDQS

B7

UDQS

A8

UDQS

J2

VREF

A2

NC#A2

E2

NC#E2

L1

BA2

R3

NC#R3

R7

NC#R7

R8

NC#R8

HYB18T1G161C2F-20_PG-TFBGA84

X76@

DQ15 DQ14 DQ13 DQ12 DQ11 DQ10

VDDQ1 VDDQ2 VDDQ3 VDDQ4 VDDQ5 VDDQ6 VDDQ7 VDDQ8 VDDQ9

VDDQ10

VDD1 VDD2 VDD3 VDD4 VDD5

VDDL

VSSDL

VSSQ1 VSSQ2 VSSQ3 VSSQ4 VSSQ5 VSSQ6 VSSQ7 VSSQ8 VSSQ9

VSSQ10

VSS1 VSS2 VSS3 VSS4 VSS5

DQ9 DQ8 DQ7 DQ6 DQ5 DQ4 DQ3 DQ2 DQ1 DQ0

DDR2 BGA MEMORY

+1.8VS

0.01U_0402_16V7K

1

C272

PM@

2

B B

1000P_0402_50V7K

2

1

C225

C234

PM@

2

0.01U_0402_16V7K

0.1U_0402_16V4Z

1

2

1

C304

PM@

2

1U_0402_6.3V4Z

0.1U_0402_16V4Z

1

C269

PM@

2

C263

PM@

0.1U_0402_16V4Z

B9 B1 D9 D1 D3 D7 C2 C8 F9 F1 H9 H1 H3 H7 G2 G8

A9 C1 C3 C7 C9 E9 G1 G3 G7 G9

A1 E1 J9 M9 R1

J1 J7

A7 B2 B8 D2 D8 E7 F2 F8 H2 H8

A3 E3 J3 N1 P9

1

2

C239

PM@

4

FBAD40 FBAD45 FBAD41 FBAD46 FBAD47 FBAD43 FBAD44 FBAD42 FBAD61 FBAD62 FBAD58 FBAD56 FBAD59 FBAD57 FBAD63 FBAD60

1

C305

0.1U_0402_16V4Z

PM@

2

1

C233

PM@

2

0.01U_0402_16V7K

1

2

C672

0.047U_0402_16V4Z

PM@

Close to U7

C224

C224 1U_0402_6.3V4Z

1U_0402_6.3V4Z

PM@

+VRAM_VREFB

1

2

(SSTL-1.8) VREF = .5* VDDQ

+1.8VS

0.01U_0402_16V7K

1

C668

PM@

2

1000P_0402_50V7K

FBA_BA0 FBA_BA1

FBAA12 FBAA11 FBAA10 FBAA9 FBAA8 FBAA7 FBAA6 FBBA5 FBBA4 FBBA3 FBBA2 FBAA1 FBAA0

FBACLK1# FBACLK1

FBB_CKE_V

FBBCS0#

FBAWE#

FBARAS#

FBACAS#

FBADQM#6 FBADQM#4

FBBODT_V

FBADQS6 FBADQS#6

FBADQS4 FBADQS#4

1

C666

PM@

2

0.01U_0402_16V7K

3

U7

L2

BA0

L3

BA1

R2

A12

P7

A11

M2

A10/AP

P3

A9

P8

A8

P2

A7

N7

A6

N3

A5

N8

A4

N2

A3

M7

A2

M3

A1

M8

A0

K8

CK

J8

CK

K2

CKE

L8

CS

K3

WE

K7

RAS

L7

CAS

F3

LDM

B3

UDM

K9

ODT

F7

LDQS

E8

LDQS

B7

UDQS

A8

UDQS

J2

VREF

A2

NC#A2

E2

NC#E2

L1

BA2

R3

NC#R3

R7

NC#R7

R8

NC#R8

HYB18T1G161C2F-20_PG-TFBGA84

X76@

DDR2 BGA MEMORY

0.1U_0402_16V4Z

1

C665

C659

PM@

2

1U_0402_6.3V4Z

DQ15 DQ14 DQ13 DQ12 DQ11 DQ10

DQ9 DQ8 DQ7 DQ6 DQ5 DQ4 DQ3 DQ2 DQ1 DQ0

VDDQ1 VDDQ2 VDDQ3 VDDQ4 VDDQ5 VDDQ6 VDDQ7 VDDQ8 VDDQ9

VDDQ10

VDD1 VDD2 VDD3 VDD4 VDD5

VDDL

VSSDL

VSSQ1 VSSQ2 VSSQ3 VSSQ4 VSSQ5 VSSQ6 VSSQ7 VSSQ8 VSSQ9

VSSQ10

VSS1 VSS2 VSS3 VSS4 VSS5

0.1U_0402_16V4Z

1

C656

PM@

2

B9 B1 D9 D1 D3 D7 C2 C8 F9 F1 H9 H1 H3 H7 G2 G8

A9 C1 C3 C7 C9 E9 G1 G3 G7 G9

A1 E1 J9 M9 R1

J1 J7

A7 B2 B8 D2 D8 E7 F2 F8 H2 H8

A3 E3 J3 N1 P9

1

C647

PM@

2

0.1U_0402_16V4Z

FBAD39 FBAD34 FBAD38 FBAD35 FBAD32 FBAD36 FBAD33 FBAD37 FBAD55 FBAD51 FBAD52 FBAD50 FBAD49 FBAD54 FBAD48 FBAD53

1

C654

0.1U_0402_16V4Z

PM@

2

1

C642

PM@

2

+1.8VS+1.8VS

1

C667

PM@

2

0.01U_0402_16V7K

2

1

C655

C655 1U_0402_6.3V4Z

1U_0402_6.3V4Z

PM@

2

1

FBAD[0..63](17,20)

FBAA[0..12](17,20)

FBBA[2..5](17)

FBADQS[0..7](17,20)

FBADQS#[0..7](17,20)

FBADQM#[0..7](17,20)

FBA_BA0(17,20)

FBA_BA1(17,20)

FBA_RAS#(17,20)

FBA_CAS#(17,20)

FBA_WE#(17,20)

FBB_CS0#(17,20)

FBA_BA2(17,20)

FBB_ODT(17)

FB_ODT(17,20)

FBA_CKE(17,20)

FBB_CKE(17)

FBACLK1(17)

FBACLK1#(17)

FBB_ODT

FB_ODT

FBB_CKE

12

R154

R154 475_0402_1%

475_0402_1%

55NM@

Close to U7

FBAD[0..63]

FBAA[0..12]

FBBA[2..5]

FBADQS[0..7]

FBADQS#[0..7]

FBADQM#[0..7]

FBA_BA0

FBA_BA1

FBARAS#

FBACAS#

FBAWE#

FBBCS0#

FBABA2

R198

1 2

0_0402_5%

40NM@

R197

1 2

0_0402_5%

55NM@

R199

1 2

0_0402_5%

55NM@

R200

1 2

0_0402_5%

40NM@

FBACLK1

FBACLK1#

FBBODT_V

FBB_CKE_VFBA_CKE

R154

220_0402_1%

40NM@

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2007/10/15 2008/10/15

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

VRAM DDRB

KIWA5/6 LA-5081P

21 53Wednesday, March 18, 2009

1

0.4

5

PCI

SRC

CPU

CLKSEL1

0

FSA

CLKSEL0

MHz

266

MHz

1000

MHz

33.30

14.318 96.0 48.0

DOT_96 MHz

USB MHz

FSC FSB REF

CLKSEL2

0 1000 133 33.31 14.318 96.0 48.0

0 1001 200 33.30 14.318 96.0 48.0

D D

0 1001 166 33.31 14.318 96.0 48.0

1 1000 333 33.30 14.318 96.0 48.0

1 1000 100 33.31 14.318 96.0 48.0

1 1001 400 33.30 14.318 96.0 48.0

1 1 1

R680 2.2K_0402_5%R680 2 .2K_0402_5%

FSA

CPU_BSEL0( 6)

C C

CPU_BSEL1( 6)

B B

CPU_BSEL2( 6)

12

@

R707

R707 10K_0402_5%

10K_0402_5%

12

R710

A A

10K_0402_5%

R678 0_0402_5%R678 0_040 2_5%

R690 0_0402_5%R690 0_040 2_5%

R696 10K_0402_5%R696 10K_0402_5%

FSC

R699 0_0402_5%

+3VS+3VS +3VS

12

PM@

R708

R708 10K_0402_5%

10K_0402_5%

12

GM@

R711

R711 10K_0402_5%

10K_0402_5%

1 2

12

FSB

12

R709

R709 10K_0402_5%

10K_0402_5%

12

@

R712

R712 10K_0402_5%

10K_0402_5%

Reserved

+VCCP

@

R675

R675 56_0402_5%

56_0402_5%

1 2

R676 1K_0402_5%R676 1K_0402_5%

1 2

12

@

R679

R679 1K_0402_5%

1K_0402_5%

+VCCP

12

@

R686

R686 1K_0402_5%

1K_0402_5%

R688 1K_0402_5%R688 1K_0402_5%

1 2

12

@

R691

R691 0_0402_5%

0_0402_5%

+VCCP

12

@

R692

R692 1K_0402_5%

1K_0402_5%

R697 1K_0402_5%R697 1K_0402_5%

1 2

12

@

R704

R704 0_0402_5%

0_0402_5%

14.31818MHZ_16PF _DSX840GA

C825 22P_0402_50V8JC825 22P_0 402_50V8J

C828 22P_0402_50V8JC828 22P_0 402_50V8J

MCH_CLKSEL0 (8)

MCH_CLKSEL1 (8)

MCH_CLKSEL2 (8)

Y4

Routing the trace at least 10mil

For ITP_EN, 0 =SRC8/SRC8#; 1 = ITP/ITP#

For PCI4_SEL, 0 = Pin24/25 : DOT96 / DOT96# Pin28/29 : LCDCLK / LCDCLK# 1 = Pin24/25 : SRC_0 / SRC_0# Pin28/29 : 27M/27M_SS

5

CLK_XTAL_INITP_EN PCI4_SEL PCI2 _TME

12

CLK_XTAL_OUT

4

R668 0_ 0805_5%R668 0_0805_5%

+3VS

R672 0_ 0805_5%@R672 0_0805_5%@

+1.5VS

R673 0_ 0805_5%R673 0_0805_5%

+VCCP

CLK_48M_CR(3 7)

CLK_48M_ICH(28)

CLK_14M_ICH(28)

CLK_14M_SIO(38)

CK_PWRGD(28)

H_STP_CPU#(28)

H_STP_PCI#(28)

CLK_PCI_DB(38)

CLK_PCI_LPC(36)

CLK_PCI_ICH(26)

4

+3VSM_CK505

1 2

1

C811

C811 10U_0805_10V4Z

10U_0805_10V4Z

2

+VDD_CK505

1

C818

C818 10U_0805_10V4Z

10U_0805_10V4Z

2

SA000020K00 (Silego : SLG8SP556VTR ) SA000020H00 (ICS : ICS9LPRS387AKLFT)

CARD@

R684 12 _0402_5%

1 2

R685 12 _0402_5%R685 12 _0402_5%

1 2

R687 33 _0402_5%R687 33 _0402_5%

1 2

R689 33 _0402_5%@R689 33_0402_5%@

1 2

R700 33 _0402_5%@R700 33_0402_5%@

1 2

R705 33 _0402_5%R705 33 _0402_5%

1 2

R706 33 _0402_5%R706 33 _0402_5%

1 2

CLK_48M_CR

CLK_48M_ICH

CLK_14M_ICH

C829 22P_0402_50V8J@C829 22P_0402_50V8J

C826 22P_0402_50V8J@C826 22P_0402_50V8J

1

@

2

place CAPs near Resistors of U10 For 3G RF noise .

CLK_14M_SIO

C830 22P_0402_50V8J@C830 22P_0402_50V8J

C827 22P_0402_50V8J@C827 22P_0402_50V8J

1

@

2

1

C812

0.1U_0402_16V4Z

2

1

C819

0.1U_0402_16V4Z

2

+VDD_CK505

CK_PWRGD

PM_STP_CPU#

PM_STP_PCI#

CLK_XTAL_IN

CLK_XTAL_OUT

3

1

C813

0.1U_0402_16V4Z

2

+3VSM_CK505

U30

55

6

12

72

19

27

66

31

62

52

23

38

FSA

20

FSB

2

FSC

7

8

1

11

53

54

5

4

13

PCI2_TME

14

15

PCI4_SEL

16

ITP_EN

17

18

3

22

26

69

30

34

59

42

73

SLG8SP556VTR_QFN72_10X10

Security Classification

Issued Date

THIS SHEET OF ENGINEERING D RAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING D RAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

1

C820

0.1U_0402_16V4Z

2

VDD_SRC

VDD_REF

VDD_PCI

VDD_CPU

VDD_48

VDD_PLL3

VDD_CPU_IO

VDD_PLL3_IO

VDD_SRC_IO

VDD_IO

VDD_SRC_IO

USB_0/FS_A

FS_B/TEST_MODE

REF_0/FS_C/TEST_

REF_1

CKPWRGD/PD#

NC

CPU_STOP#

PCI_STOP#

XTAL_IN

XTAL_OUT

PCI_1

PCI_2

PCI_3

PCI_4/SEL_LCDCL

PCIF_5/ITP_EN

VSS_PCI

VSS_REF

VSS_48

VSS_IO

VSS_CPU

VSS_PLL3

VSS_SRC

VSS

1

C814

0.1U_0402_16V4Z

2

1

C815

0.1U_0402_16V4Z

2

1

C821

0.1U_0402_16V4Z

2

SRC_0#/DOT_96#

LCDCLK#/27M_SS

SRC_8#/CPU_ITP#

USB_1/CLKREQ_A#

2008/03/25 2008/04/

1

C822

0.1U_0402_16V4Z

2

CPU_0

CPU_0#

CPU_1

CPU_1#

SRC_0/DOT_96

LCDCLK/27M

SRC_2

SRC_2#

SRC_3

SRC_3#

SRC_4

SRC_4#

SRC_6

SRC_6#

SRC_7

SRC_7#

SRC_8/CPU_ITP

SRC_9

SRC_9#

SRC_10

SRC_10#

SRC_11

SRC_11#

CLKREQ_3#

CLKREQ_4#

CLKREQ_6#

CLKREQ_7#

CLKREQ_9#

SLKREQ_10#

CLKREQ_11#

Compal Secret Data

1

C816

0.1U_0402_16V4Z

2

9

SDA

10

SCL

71

70

68

67

24

25

28

29

32

33

35

36

39

40

57

56

61

60

64

63

44

45

50

51

48

47

37

41

58

65

43

49

46

21

1

2

Deciphered Date

1

C817

0.1U_0402_16V4Z

2

C823

0.1U_0402_16V4Z

CLK_SMBDATA

CLK_SMBCLK

CLK_CPU_BCLK

CLK_CPU_BCLK#

CLK_MCH_BCLK

CLK_MCH_BCLK#

R_CLK_DOT

R_CLK_DOT#

CLK_MCH_3GPLL

CLK_MCH_3GPLL#

CLK_PCIE_EXP

CLK_PCIE_EXP#

CLK_PCIE_WLAN2

CLK_PCIE_WLAN2#

CLK_PCIE_WLAN

CLK_PCIE_WLAN#

CLK_PCIE_WLAN1

CLK_PCIE_WLAN1#

CLK_PCIE_LAN

CLK_PCIE_LAN#

CLK_PCIE_ICH

CLK_PCIE_ICH#

CLK_PCIE_SATA

CLK_PCIE_SATA#

EXP_CLKREQ#

WLAN_CLKREQ2#

WLAN_CLKREQ#

WLAN_CLKREQ1#

CLKREQ_LAN#

SATA_CLKREQ#_R

MCH_CLKREQ#_R

2

1

C824

0.1U_0402_16V4Z

2

R677 0_0 402_5%GM@R677 0_0402_5%G M@

1 2

R681 0_0 402_5%PM@R681 0_0402_5%PM@

1 2

R682 0_0 402_5%GM@R682 0_0402_5%G M@

1 2

R683 0_0 402_5%PM@R683 0_0402_5%PM@

1 2

R713 0_0402_5%R713 0_0402_ 5%

R714 0_0402_5%R714 0_0402_ 5%

2

CLK_SMBDATA (14,1 5)

CLK_SMBCLK (1 4,15)

CLK_CPU_BCLK (5)

CLK_CPU_BCLK# (5)

CLK_MCH_BCLK (8)

CLK_MCH_BCLK# (8)

MCH_SSCDREFCLK (8)

MCH_SSCDREFCLK# (8)

CLK_MCH_3GPLL (8)

CLK_MCH_3GPLL# (8)

CLK_PCIE_EXP (3 0)

CLK_PCIE_EXP# (30)

CLK_PCIE_WLAN2 (30)

CLK_PCIE_WLAN2# (30)

T155T155

T156T156

CLK_PCIE_WLAN1

CLK_PCIE_WLAN1#

CLK_PCIE_LAN (31)

CLK_PCIE_LAN# (31)

CLK_PCIE_ICH (28)

CLK_PCIE_ICH# (28)

CLK_PCIE_SATA (27)

CLK_PCIE_SATA# (27)

EXP_CLKREQ# (30)

WLAN_CLKREQ2# (3 0)

WLAN_CLKREQ#

WLAN_CLKREQ1#

CLKREQ_LAN# (31)

1 2

1

+3VS

ICH_SMBDATA(28,3 0)

ICH_SMBCLK(28,30 )

R669 0_0402_5%R669 0_040 2_5%

1 2

2N7002DW-T/R7_SOT36 3-6

6 1

@ Q1A

@

+3VS

@ Q1B

@

3

2N7002DW-T/R7_SOT36 3-6

R674 0_0402_5%R674 0_0402_ 5%

1 2

CLK_MCH_DREFCLK (8)

CLK_PCIE_VGA (16)

CLK_MCH_DREFCLK# (8)

CLK_PCIE_VGA# (16)

2

5

@

R670

2.2K_0402_5%

Q1A

Q1B

4

SRC PORT LIST

DEVICEPORT

SRC0 SRC2 SRC3

MCH_DREFCLK MCH_3GPLL

PCIE_EXP# SRC4 SRC6 SRC7

PCIE_WLAN

PCIE_WLAN1 SRC8 SRC9 SRC10 SRC11

SATA_CLKREQ#_R EXP_CLKREQ# WLAN_CLKREQ1# MCH_CLKREQ#_R CLKREQ_LAN# WLAN_CLKREQ# WLAN_CLKREQ2#

REQ PORT LIST

REQ_3# REQ_4# REQ_6# REQ_7# REQ_9#

PCIE_LAN

PCIE_ICH

PCIE_SATA

R693 10K_0402_5%R693 10K_0402_5%

R694 10K_0402_5%R694 10K_0402_5%

R695 10K_0402_5%@R695 10K_0402_5%@

R698 10K_0402_5%R698 10K_0402_5%

R701 10K_0402_5%R701 10K_0402_5%

R702 10K_0402_5%@R702 10K_0402_5%@

R703 10K_0402_5%R703 10K_0402_5%

PCIE_EXP#

PCIE_WLAN2

PCIE_WLAN PCIE_WLAN1

PCIE_LAN REQ_10# REQ_11# REQ_A#

SATA_CLKREQ# (2 8)

MCH_CLKREQ# (8)

Compal Electronics, Inc.

Title

Clock Generator CK505

Size Document Number Rev

Custom

Date: Sheet of

KIWA5/6 LA-5081P

PCIE_SATA

MCH_3GPLL

1

DEVICEPORT

@

R671

2.2K_0402_5%

CLK_SMBDATA

CLK_SMBCLK

12 12 12 12 12 12 12

22 5 3Wednesday, March 18, 2009

+3VS

0.4

5

10/30 update PS8171 co-lay circuit

+3VS

D D

C C

PIN1

PIN3

PIN4

PIN7

PIN10

PIN11

PIN12

PIN27

PIN33

PIN34

PIN35

R722

4.7K_0402_5%

8101T@

1 2

R914

4.7K_0402_5%

@

1 2

PC0PC1

8101T

GND

PC0

PC1

HPD#

RE_EN#

VCC

GND

VCC

DDCBUF_EN

CFG

R724

4.7K_0402_5%

@

1 2

R915

4.7K_0402_5%

8171@

1 2

8171PIN NUM

ASQ0

PEQ

PIO

HPDX

CEXT

ASQ1

APD

EMI0

EMI1

DDCBUF

PRE

12

R717

4.7K_0402_5%

GM_HDMI@

12

@

R720

R720 0_0402_5%

0_0402_5%

+3VS

R725

1442T@

4.7K_0402_5%

TMDS_B_CLK(10) TMDS_B_CLK#(10)

TMDS_B_DATA0(10) TMDS_B_DATA0#(10)

TMDS_B_DATA1(10) TMDS_B_DATA1#(10)

TMDS_B_DATA2(10) TMDS_B_DATA2#(10)

TMDS pull down (500ohm) resistors for ATI M92-S2 XT

R731 499_0402_1%

HDMI_CLK+_CONN

HDMI_CLK-_CONN

HDMI_TX0+_CONN

HDMI_TX0-_CONN

HDMI_TX1+_CONN

HDMI_TX1-_CONN

HDMI_TX2+_CONN

B B

HDMI_TX2-_CONN

NEAR CONNECTOR

HDMI_CLK-

HDMI_CLK+

HDMI_TX0-

HDMI_TX0+

HDMI_TX1-

HDMI_TX1+

HDMI_TX2-

A A

HDMI_TX2+

HDMI_CLK+ HDMI_CLKHDMI_TX0+ HDMI_TX0HDMI_TX1+ HDMI_TX1HDMI_TX2+ HDMI_TX2-

R731 499_0402_1%

1 2

PM_HDMI@

R730 499_0402_1%

R733 499_0402_1%

R732 499_0402_1%

R735 499_0402_1%

R734 499_0402_1%

R737 499_0402_1%

R736 499_0402_1%

4

1

4

1

4

1

4

1

R751 0_0402_5%

R751 0_0402_5% R752 0_0402_5%1442T@R752 0_0402_5%1442T@ R753 0_0402_5%1442T@R753 0_0402_5%1442T@ R754 0_0402_5%1442T@R754 0_0402_5%1442T@ R755 0_0402_5%1442T@R755 0_0402_5%1442T@ R756 0_0402_5%1442T@R756 0_0402_5%1442T@ R757 0_0402_5%1442T@R757 0_0402_5%1442T@ R758 0_0402_5%1442T@R758 0_0402_5%1442T@

PM_HDMI@

1 2

PM_HDMI@

1 2

PM_HDMI@

1 2

PM_HDMI@

1 2

PM_HDMI@

1 2

PM_HDMI@

1 2

PM_HDMI@

1 2

PM_HDMI@

WCM-2012-900T_4P

4

1

L2

8101T@

WCM-2012-900T_4P

4

1

L3

8101T@

WCM-2012-900T_4P

4

1

L4

8101T@

WCM-2012-900T_4P

4

1

L5

8101T@

1442T@

1442T@ 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2

5

3

2

3

2

3

2

3

2

HDMI_CLK-_CONN

HDMI_CLK+_CONN

HDMI_TX0-_CONN

HDMI_TX0+_CONN

HDMI_TX1-_CONN

HDMI_TX1+_CONN

HDMI_TX2-_CONN

HDMI_TX2+_CONN

PM_HDMI@

Q2

13

D

2N7002W-T/R7_SOT323-3

S

HDMI_CLK+_CONN HDMI_CLK-_CONN HDMI_TX0+_CONN HDMI_TX0-_CONN HDMI_TX1+_CONN HDMI_TX1-_CONN HDMI_TX2+_CONN HDMI_TX2-_CONN

2

G

1 2

4

+3VS

12

@

R716

R716 0_0402_5%

0_0402_5%

12

1442T@

R719

R719 0_0402_5%

0_0402_5%

R721 4.7K_0402_5%8171@R721 4.7K_0402_5%8171@

1 2

R723 4.7K_0402_5%@R723 4.7K_0402_5%@

1 2

4.7K_0402_5%

For 8171 net name:

EMI0, EMI1

HDMICLK_R

HDMIDAT_R

HDMI_DETECT

internal pull down internal pull down

R725

R726

4.7K_0402_5%

8171@

@

1 2

ASQ0, ASQ1

APD

For 8171

R920

APD

1 2

0_0402_5%

R923

4.7K_0402_5%

+3VS

R741

R741 100K_0402_5%

100K_0402_5%

@

HDMI_DETECT_VGA(16)

U31

ASM1442T

1442T@

4.7K_0402_5%

8171@

1 2

4

3

P/N:SA00002D700 (8101T) P/N:SA00001U920 (CH7318C)

U31

25

OE#

28

SCL_SINK

29

SDA_SINK

30

HPD_SINK

32

DDC_EN

34

CFG0

35

CFG1

48

IN_D4+

47

IN_D4-

45

IN_D3+

44

IN_D3-

42

IN_D2+

41

IN_D2-

39

IN_D1+

38

IN_D1-

PS8101TQFN48G_QFN48_7X7

GM_HDMI@

8101T@R920

8101T@

GM_HDMI@

@

D45

D45 RB751V_SOD323

RB751V_SOD323

2 1

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

For 8171

ASQ0

PM_HDMI@

R1078

1 2

1K_0402_1%

12

PM_HDMI@

R1079

R1079 10K_0402_1%

10K_0402_1%

R921

1 2

R922

R922 0_0402_5%

0_0402_5%

8101T@

1 2

4.7K_0402_5%

3

+3VS

1

GM_HDMI@

C831

0.1U_0402_16V4Z

2

1

2

For 8171For 8171

2

VCC VCC VCC VCC VCC VCC VCC VCC

PC1 PC0

REXT

HPD#

SDA

SCL

RT_EN#

OUT_D4+

OUT_D4-

OUT_D3+

OUT_D3-

OUT_D2+

OUT_D2-

OUT_D1+

OUT_D1-

GND GND GND GND GND GND GND GND GND GND PAD

+3VS+3VS

@

2008/03/25 2008/04/

R922

4.7K_0402_5%

8171@

HDMI_DETECT

L43

PM_HDMI@L43

PM_HDMI@

1 2

FBML10160808121LMT_0603

Compal Secret Data

APD

R912

11 15 21 26 33 40 46

4 3

6

7

8

9

10

13 14

16 17

19 20

22 23

1 5 12 18 24 27 31 36 37 43 49

2

C267

HDMI@

330P_0402_50V7K

1

+5VS

3

2

Deciphered Date

R912 0_0402_5%

0_0402_5%

8101T@

1 2

EMI1

PC1 PC0

1.2k for CH7318C

R727 499_0402_1%

1 2

TMDS_B_HPD#

8171@

4.7U_0805_10V4Z

4.7U_0805_10V4Z C925

C925

HDMI_CLK+ HDMI_CLK-

HDMI_TX0+ HDMI_TX0-

HDMI_TX1+ HDMI_TX1-

HDMI_TX2+ HDMI_TX2-

ASQ0

R916

1 2

ASQ1

EMI0

R919

R919 0_0402_5%

0_0402_5%

8101T@

1 2

R744 0_0402_5%

GM_HDMI@

1 2

R745 0_0402_5%

PM_HDMI@

HDMIDAT_R

1

@

D21

D21 BAT54S-7-F_SOT23-3

BAT54S-7-F_SOT23-3

GM_HDMI@

TMDS_B_HPD# (10)

1

2

4.7K_0402_5%

1 2

R918

R918 0_0402_5%

0_0402_5%

8101T@

1 2

+5VS

2

GM_HDMI@

C832

0.1U_0402_16V4Z

R913

12

4.7K_0402_5%

8171@

@

VGA_HDMI_CLK#(17) VGA_HDMI_CLK(17)

VGA_HDMI_TX0#(17) VGA_HDMI_TX0(17)

VGA_HDMI_TX1#(17) VGA_HDMI_TX1(17)

VGA_HDMI_TX2#(17) VGA_HDMI_TX2(17)

+3VS

For 8171

8171@

R917

8171@R917

8171@

4.7K_0402_5%

2

3

@

1

D20

D20 BAT54S-7-F_SOT23-3

BAT54S-7-F_SOT23-3

+5VS

3

2

1

GM_HDMI@

C833

0.1U_0402_16V4Z

2

12

R10954.7K_0402_5%@R10954.7K_0402_5%

for NV request 0515

HDMIDAT_R HDMICLK_R

@

D22

D22 BAT54S-7-F_SOT23-3

BAT54S-7-F_SOT23-3

1

GM_HDMI@

C834

C834 10U_0805_10V4Z

10U_0805_10V4Z

2

R727

3.01K_0402_1%

1442T@

+3VS

12

GM_HDMI@

R728

2.2K_0402_5%

C835 0.1U_0402_10V7KPM_HDM I@C835 0.1U_0402_10V7KPM_HDMI@ C836 0.1U_0402_10V7KPM_HDM I@C836 0.1U_0402_10V7KPM_HDMI@

C837 0.1U_0402_10V7KPM_HDM I@C837 0.1U_0402_10V7KPM_HDMI@ C838 0.1U_0402_10V7KPM_HDM I@C838 0.1U_0402_10V7KPM_HDMI@

C839 0.1U_0402_10V7KPM_HDM I@C839 0.1U_0402_10V7KPM_HDMI@ C840 0.1U_0402_10V7KPM_HDM I@C840 0.1U_0402_10V7KPM_HDMI@

C841 0.1U_0402_10V7KPM_HDM I@C841 0.1U_0402_10V7KPM_HDMI@ C842 0.1U_0402_10V7KPM_HDM I@C842 0.1U_0402_10V7KPM_HDMI@

VGA_HDMI_SDA(16,17) VGA_HDMI_SCL(16,17)

place those component near JP?

R738

@ R738

@

0_0805_5%

R742

2.2K_0402_5%

HDMI@

1 2

HDMI_CLK-_CONN

HDMI_CLK+_CONN HDMI_TX0-_CONN

HDMI_TX0+_CONN HDMI_TX1-_CONN

HDMI_TX1+_CONN HDMI_TX2-_CONN

HDMI_TX2+_CONN

HDMICLK_R

1

12

GM_HDMI@

R729

2.2K_0402_5%

1 2 1 2

L41 MBK1608121YZF_0603PM_HDMI@L41 MBK1608121YZF_0603PM_HDMI@

L42 MBK1608121YZF_0603PM_HDMI@L42 MBK1608121YZF_0603PM_HDMI@

R743

2.2K_0402_5%

HDMI@

1 2

TMDS_B_HPD#

Reserved for CH7318C

1 2 1 2

1

C1156

PM_HDMI@

+5VS

21

2

HDMI@

D18

D18 RB491D_SC59-3

RB491D_SC59-3

+5VS_HDMI

19 18 17 16 15 14 13 12 11 10

12P_0402_50V8J

KIWB3/B4_LA4551P

Compal Electronics, Inc.

Title

Level Shiftter_PS8101T

Size Document Number Rev

Custom

Date: Sheet of

KIWAX_LA-5082P

1

+3VS

12

@

R715

R715 20K_0402_1%

20K_0402_1%

12

@

R718

7.5K_0402_1%

HDMIDAT_NB (8)

HDMICLK_NB (8)

HDMI_CLKHDMI_CLK+

HDMI_TX0HDMI_TX0+

HDMI_TX1HDMI_TX1+

HDMI_TX2HDMI_TX2+

HDMIDAT_R HDMICLK_R

1

C1157

PM_HDMI@

2

12P_0402_50V8J

+5VS_HDMI

1

C845

0.1U_0402_16V4Z

2

HDMI@

JHDMI1

HP_DET +5V DDC/CEC_GND SDA SCL Reserved CEC CK-

GND

CK_shield

GND

CK+

9 8 7 6 5 4 3 2 1

GND

D0-

GND D0_shield D0+ D1D1_shield D1+ D2D2_shield D2+

SUYIN_100042MR019S153ZL

ME@

23 53W ednesday, March 18, 2009

1

20 21 22 23

0.4

5

4

3

2

1

LCD POWER CIRCUIT

+LCDVDD

12

13

D

D D

2N7002_SOT23

GM_ENVDD(10)

VGA_ENVDD(16)

C C

R230 0_0402_5%GM@R230 0_0402_5%GM@

R231 0_0402_5%PM@R231 0_0402_5%PM @

D

Q3

S

12

R759

R759 150_0603_1%

150_0603_1%

2

G

DTC124EK

2

IN

+5VALW

12

1

3

R760

R760 100K_0402_5%

100K_0402_5%

OUT

GND

R761 220K_0402_5%R761 220K_0402_5%

1 2

Q5

Q5 DTC124EKAT146_SC59-3

DTC124EKAT146_SC59-3

+3VS

W=60mils

S

G

2

SI2301BDS-T1-E3_SOT23-3

C851 0.1U_0402_16V4ZC 851 0.1U_0402_16V4Z

1

2

D

Q4

1 3

SI2301BDS-T1-E3_SOT23-3

+LCDVDD

LCD/PANEL BD. Conn.

W=60mils

1

C852

2

@

For EMI

1

C853

2

@

INVT_PWM

DAC_BRIG

DISPOFF#

1

C854

2

470P_0402_50V7K

@

+3VS

12

R762

4.7K_0402_5%

D23

BKOFF#(36)

GMCH_ENBKL(10)

VGA_ENBKL(16)

BKOFF# DISPOFF#

D23

21

CH751H-40PT_SOD323-2

R763 0_0402_5%GM@R763 0_0402_5%GM@

R764 0_0402_5%PM@R764 0_0402_5%PM @

12

4.7K_0402_5%

ENBKL

R765

100K_0402_1%

1 2

change from 10K to 100K 5/8 by checklist

ENBKL (36)

470P_0402_50V7K

LCD/PANEL BD. Conn. FOR DIS

FOR UMA

280mA

(60 MIL)

B+

L7

FBMA-L11-201209-221LMA30T_0805

400mA

L7

4.7U_0805_25V6-K

12

C855

+LEDVDD

1

2

B B

+LCDVDD_L

JLVDS1

FBMA-L11-201209-221LMA30T_0805

+LCDVDD

(60 MIL)

A A

L6

12

4.7U_0805_10V4Z

5

1

C49

2

1

C46

0.1U_0402_16V4Z

2

+LCDVDD_L

LVDS_ACLK#(10) LVDS_ACLK(10)

LVDS_A0#(10) LVDS_A0(10)

LVDS_A1#(10)

LVDS_A1(10) LVDS_A2#(10) LVDS_A2(10)

LVDS_ACLK# LVDS_ACLK LVDS_A0# LVDS_A0 LVDS_A1# LVDS_A1 LVDS_A2# LVDS_A2

4

JLVDS1

2 4 6 8

10 12

111112

14

131314

16

151516

18

171718

20

191920

22

212122

24

232324

26

252526

28

272728

30

292930

32

GND31GND

ACES_87142-3041

ME@

112 334 556 778 9910

+LEDVDD

Issued Date

+3VS

DAC_BRIG (36)

INVT_PWM (36)

LVDS_SDA (10) LVDS_SCL (10)

3

DAC_BRIG

DISPOFF#

LVDS_SDA LVDS_SCL

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

+LCDVDD_L

+3VS+3VS

Deciphered Date

VGA_LVDS_ACLK#

VGA_LVDS_ACLK VGA_LVDS_A0# VGA_LVDS_A0

VGA_LVDS_A1#

VGA_LVDS_A1 VGA_LVDS_A2# VGA_LVDS_A2

2

VGA_LVDS_ACLK#(17) VGA_LVDS_ACLK(17)

VGA_LVDS_A0#(17) VGA_LVDS_A0(17) VGA_LVDS_A1#(17) VGA_LVDS_A1(17) VGA_LVDS_A2#(17) VGA_LVDS_A2(17)

Compal Secret Data

2007/10/15 2008/10/15

Compal Secret Data

JLVDS2

2 4 6 8

10 12

111112

14

131314

16

151516

18

171718

20

191920

22

212122

24

232324

26

252526

28

272728

30

292930

32

GND31GND

ACES_87142-3041

ME@

112 334 556 778 9910

Title

Size Document Number Rev

B

Date: Sheet of

+LEDVDD

DAC_BRIG

DISPOFF#

VGA_LVDS_SDA

VGA_LVDS_SCL

Compal Electronics, Inc.

LVDS & DVI Connector

KIWA5/6 LA-5081P

+3VS DAC_BRIG (36) INVT_PWM (36)

VGA_LVDS_SDA (16)

VGA_LVDS_SCL (16)

1

24 53Wednesday, March 18, 2009

0.4

A

B

C

D

E

CRT Connector

CLOSE TO CONN

R766 0_0402_ 5%PM@R76 6 0_0402_ 5%PM@

VGA_CRT _R(16)

GMCH_CR T_R(10)

1 1

VGA_CRT _G(16)

GMCH_CR T_G(10)

VGA_CRT _B(16)

GMCH_CR T_B(10)

2 2

VGA_HSYNC(16)

GMCH_CR T_HSYNC(10)

VGA_VSYNC(16)

3 3

4 4

GMCH_CR T_VSYNC(1 0)

VGA_DDC DATA(16 )

GMCH_CR T_DATA(10)

GMCH_CR T_CLK(10)

VGA_DDC CLK(16)

1 2

R767 0_0402_ 5%GM@R767 0_0402_5 %GM@

1 2

R768 0_0402_ 5%PM@R76 8 0_0402_ 5%PM@

1 2

R769 0_0402_ 5%GM@R769 0_0402_5 %GM@

1 2

R770 0_0402_ 5%PM@R77 0 0_0402_ 5%PM@

1 2

R771 0_0402_ 5%GM@R771 0_0402_5 %GM@

1 2

CLOSE TO CONN

R776 0_0402_ 5%PM@R77 6 0_0402_ 5%PM@

1 2

R777 0_0402_ 5%GM@R777 0_0402_5 %GM@

1 2

CLOSE TO CONN

R778 0_0402_ 5%PM@R77 8 0_0402_ 5%PM@

1 2

R779 0_0402_ 5%GM@R779 0_0402_5 %GM@

1 2

CLOSE TO CONN

12

R772

R772 150_040 2_1%

150_040 2_1%

1

C863

0.1U_040 2_16V4Z

2

CRT_HSYNC

1

C866

0.1U_040 2_16V4Z

2

CRT_VSYNC

2.2K

R502 0 _0402_5%PM@R502 0_0402_5%PM@

1 2

R785 0_0402_ 5%GM@R785 0_0402_5 %GM@

1 2

R786 0 _0402_5%GM@R78 6 0_0402_5%GM@

1 2

R787 0_0402_ 5%PM@R78 7 0_0402_ 5%PM@

1 2

12

+CRT_VC C

2.2K_040 2_5%

12

R773

R773 150_040 2_1%

150_040 2_1%

5

A2Y

3

5

A2Y

3

+3VS

R86

R774

R774 150_040 2_1%

150_040 2_1%

1

P

4

OE#

G

U32

U32 SN74AHC T1G125DCKR_S C70-5

SN74AHC T1G125DCKR_S C70-5

1

P

4

OE#

G

U33

U33 SN74AHC T1G125DCKR_S C70-5

SN74AHC T1G125DCKR_S C70-5

12

R87

2.2K_040 2_5%

CRT_R_1

CRT_G_1

CRT_B_1

12

R775

R775 1K_0402 _5%

1K_0402 _5%

CRT_HSYNC _1

CRT_VSYNC _1

+3VS

5

4

2

Q6A

Q6A 2N7002D W-T/R7_SOT3 63-6

2N7002D W-T/R7_SOT3 63-6

3

Q6B

Q6B 2N7002D W-T/R7_SOT3 63-6

2N7002D W-T/R7_SOT3 63-6

61

1

@

C856

C856 10P_040 2_50V8J

10P_040 2_50V8J

2

+CRT_VC C

1

@

C857

C857 10P_040 2_50V8J

10P_040 2_50V8J

2

+5VS +5VS +5VS

3

2

@

D25

D25 BAT54S-7 -F_SOT23-3

BAT54S-7 -F_SOT23-3

+5VS +5VS

3

2

@

D28

D28 BAT54S-7 -F_SOT23-3

BAT54S-7 -F_SOT23-3

2.2K

12

R783

2.2K_040 2_5%

L8 FCM160 8CF-121T03_2P

1 2

L9 FCM160 8CF-121T03_2P

1 2

L10 FCM1608 CF-121T03_2P

1 2

1

@

C858

C858 10P_040 2_50V8J

10P_040 2_50V8J

2

3

1

2

3

1

2

L11 F CM1608CF-121T 03_2P

1 2

L12 F CM1608CF-121T 03_2P

1 2

12

R784

2.2K_040 2_5%

1

@

C867

C867 100P_04 02_50V8J

100P_04 02_50V8J

2

@

D26

D26 BAT54S-7 -F_SOT23-3

BAT54S-7 -F_SOT23-3

@

D29

D29 BAT54S-7 -F_SOT23-3

BAT54S-7 -F_SOT23-3

CRT_DDC _DAT

CRT_DDC _CLK

1

@

C868

C868 68P_040 2_50V8K

68P_040 2_50V8K

2

1

JVGA_VSJVGA_HS

1

2

1

C859

C859 10P_040 2_50V8J

10P_040 2_50V8J

2

3

2

@

C864

C864 10P_040 2_50V8J

10P_040 2_50V8J

1

C860

C860 10P_040 2_50V8J

10P_040 2_50V8J

2

REDGREENBLUE

1

@

D27

D27 BAT54S-7 -F_SOT23-3

BAT54S-7 -F_SOT23-3

JVGA_HS

JVGA_VS

1

C865

@C 865

@

10P_040 2_50V8J

2

RED

GREEN

BLUE

1

C861

C861 10P_040 2_50V8J

10P_040 2_50V8J

2

+5VS

D24

2 1

RB491D_ SC59-3

W=40mils

RED

CRT_DDC _DAT GREEN

JVGA_HS BLUE

JVGA_VS

CRT_DDC _CLK

PIN ASSIGMENT

D-SUB FUNCTION

9 1 6 2

7

5, 3 8

14 10 GND 13 11 12 15

4

+CRT_VC C

21

F1

11

1.1A_6V_SMD1812P110TFF11.1A_6V_SMD1812P110TF

12

13

14

10 15

1

C862

0.1U_040 2_16V4Z

2

+CRT_VCC

RED GND

GREEN

GND

BLUE

GND

VSYNC

HSYNC

SENSE SM_DAT SM_CLK

PIN4

JCRT1

6

1 7

2 8

3 9

4

5

16

G

17

G

ALLTO_C 10534-91507-L

ME@

Security Class ification

2007/10/ 15 2008/10/ 15

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2007/10/ 15 2008/10/ 15

C

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Nu mber Rev

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

CRT & TV-OUT Connector

Custom

KIWA5/6 LA-5081P

0.4

25 53Wednesday, March 18, 2009

E

5

4

3

2

1

D D

C C

+3VS

1 2

R788 8.2K_0402_5%R788 8.2K_0402_5%

1 2

R789 8.2K_0402_5%R789 8.2K_0402_5%

1 2

R790 8.2K_0402_5%R790 8.2K_0402_5%

1 2

R791 8.2K_0402_5%R791 8.2K_0402_5%

1 2

R792 8.2K_0402_5%R792 8.2K_0402_5%

1 2

R793 8.2K_0402_5%R793 8.2K_0402_5%

1 2

R794 8.2K_0402_5%R794 8.2K_0402_5%

1 2

R795 8.2K_0402_5%R795 8.2K_0402_5%

+3VS

1 2

R796 8.2K_0402_5%R796 8.2K_0402_5%

1 2

R797 8.2K_0402_5%R797 8.2K_0402_5%

1 2

R798 8.2K_0402_5%R798 8.2K_0402_5%

1 2

R799 8.2K_0402_5%R799 8.2K_0402_5%

1 2

R800 8.2K_0402_5%R800 8.2K_0402_5%

1 2

R801 8.2K_0402_5%R801 8.2K_0402_5%

1 2

R802 8.2K_0402_5%R802 8.2K_0402_5%

1 2

R803 8.2K_0402_5%R803 8.2K_0402_5%

1 2

R805 8.2K_0402_5%R805 8.2K_0402_5%

1 2

R806 8.2K_0402_5%R806 8.2K_0402_5%

1 2

R807 8.2K_0402_5%R807 8.2K_0402_5%

1 2

R808 8.2K_0402_5%R808 8.2K_0402_5%

PCI_DEVSEL#

PCI_STOP#

PCI_TRDY#

PCI_FRAME#

PCI_PLOCK#

PCI_IRDY#

PCI_SERR#

PCI_PERR#

PCI_PIRQA#

PCI_PIRQB#

PCI_PIRQC#

PCI_PIRQD#

PCI_PIRQE#

PCI_PIRQF#

PCI_PIRQG#

PCI_PIRQH#

PCI_REQ0#

PCI_REQ1#

PCI_REQ2#

PCI_REQ3#

PCI_AD0 PCI_AD1 PCI_AD2 PCI_AD3 PCI_AD4 PCI_AD5 PCI_AD6 PCI_AD7 PCI_AD8 PCI_AD9 PCI_AD10 PCI_AD11 PCI_AD12 PCI_AD13 PCI_AD14 PCI_AD15 PCI_AD16 PCI_AD17 PCI_AD18 PCI_AD19 PCI_AD20 PCI_AD21 PCI_AD22 PCI_AD23 PCI_AD24 PCI_AD25 PCI_AD26 PCI_AD27 PCI_AD28 PCI_AD29 PCI_AD30 PCI_AD31

PCI_PIRQA# PCI_PIRQB# PCI_PIRQC# PCI_PIRQD#

U34B

D11

AD0

C8

AD1

D9

AD2

E12

AD3

E9

AD4

C9

AD5

E10

AD6

B7

AD7

C7

AD8

C5

AD9

G11

AD10

F8

AD11

F11

AD12

E7

AD13

A3

AD14

D2

AD15

F10

AD16

D5

AD17

D10

AD18

B3

AD19

F7

AD20

C3

AD21

F3

AD22

F4

AD23

C1

AD24

G7

AD25

H7

AD26

D1

AD27

G5

AD28

H6

AD29

G1

AD30

H3

AD31

Interrupt I/F

J5

PIRQA#

E1

PIRQB#

J6

PIRQC#

C4

PIRQD#

ICH9-M ES_FCBGA676

PCI

REQ0#

GNT0# REQ1#/GPIO50 GNT1#/GPIO51 REQ2#/GPIO52 GNT2#/GPIO53 REQ3#/GPIO54 GNT3#/GPIO55

C/BE0# C/BE1# C/BE2# C/BE3#

IRDY#

PAR

PCIRST#

DEVSEL#

PERR#

PLOCK#

SERR# STOP#

TRDY#

FRAME#

PLTRST#

PCICLK

PME#

PIRQE#/GPIO2 PIRQF#/GPIO3 PIRQG#/GPIO4 PIRQH#/GPIO5

PCI_REQ0#

F1

PCI_GNT0#

G4

PCI_REQ1#

B6

PCI_GNT1#

A7

PCI_REQ2#

F13

PCI_GNT2#

F12

PCI_REQ3#

E6

PCI_GNT3#

F6

PCI_CBE#0

D8

PCI_CBE#1

B4

PCI_CBE#2

D6

PCI_CBE#3

A5

PCI_IRDY#

D3

PCI_PAR

E3

PCI_RST#

R1

PCI_DEVSEL#

C6

PCI_PERR#

E4

PCI_PLOCK#

C2

PCI_SERR#

J4

PCI_STOP#

A4

PCI_TRDY#

F5

PCI_FRAME#

D7

PLT_RST#

C14

CLK_PCI_ICH

D4

PCI_PME#

R2

1 2

R804 10K_0402_5%@R804 10K_0402_5%@

PCI_PIRQE#

H4

PCI_PIRQF#

K6

PCI_PIRQG#

F2

PCI_PIRQH#

G2

PCI_CBE#3 (31)

CLK_PCI_ICH (22) PCI_PME# (36)

+3VALW

Place closely pin D4

PCI_GNT0#

12

@

R809

1 2

R812 1K_0402_5%@R812 1K_0402_5%@

B B

PCI_GNT3#

R809 1K_0402_5%

1K_0402_5%

SB_SPI_CS#1(28)

SB_SPI_CS#1

12

@

R810

R810 1K_0402_5%

1K_0402_5%

Pull high?

CLK_PCI_ICH

R811

R811 0_0402_5%

0_0402_5%

1 2

1

C869

C869 18P_0402_50V8J

18P_0402_50V8J

2

Boot BIOS Strap

A16 Swap Override Strap

PCI_GNT#3

A A

Low= A16 swap override Enable High= Default*

5

PCI_GNT#0 SPI_CS#1 Boot BIOS Loaction

0

1 1

4

1 SPI

01

PCI

LPC*

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Compal Secret Data

2007/10/15 2008/10/15

3

Compal Secret Data

Deciphered Date

2

PCI_RST#

PLT_RST#

12

Title

Size Document Number Rev

Date: Sheet of

PCI_RST# (36,38)

R813

R813 100K_0402_5%

100K_0402_5%

PLT_RST# (8,16,30,31)

R814

R814 100K_0402_5%

100K_0402_5%

Compal Electronics, Inc.

ICH9M(1/4)-PCI

KIWA5/6 LA-5081P

1

0.4

26 53Wednesday, March 18, 2009

0.4

5

+RTCVCC

R816 330K_0402_1%R816 330K_0402_1%

LAN100_SLP

1 2

R818 1M_0402_5%R818 1M_0402_5%

SM_INTRUDER#

1 2

R820 330K_0402_1%R820 330K_0402_1%

D D

C C

1 2

ICH_INTVRMEN

+RTCVCC

HDD

ODD

1 2

2

C872

0.1U_0402_16V4Z

1

R823

100_0603_1%

DRIVE_LED#(39)

SATA_DTX_C_IRX_N0(33) SATA_DTX_C_IRX_P0(33)

SATA_ITX_DRX_N0(33) SATA_ITX_DRX_P0(33)

SATA_DTX_C_IRX_N1(33) SATA_DTX_C_IRX_P1(33)

SATA_ITX_DRX_N1(33) SATA_ITX_DRX_P1(33)

32.768KHZ_12.5P_1TJS125BJ2A251

+RTCBATT

DRIVE_LED#

SATA_DTX_C_IRX_N0 SATA_DTX_C_IRX_P0 SATA_ITX_DRX_N0

SATA_DTX_C_IRX_N1 SATA_DTX_C_IRX_P1 SATA_ITX_DRX_N1 SATA_ITX_DRX_P1

+RTCVCC

HDA_BITCLK_CODEC(8,16,34)

HDA_SYNC_CODEC(8,16,34)

HDA_RST_CODEC#(8,16,34)

HDA_SDOUT_CODEC(8,16,34)

HDA_SDIN0(8) HDA_SDIN1(16) HDA_SDIN2(34)

+3VS

4

1 2

C870 15P_0402_50V8JC870 15P_0402_50V8J

Y5

2

3

1 2

C871 15P_0402_50V8JC871 15P_0402_50V8J

1 2

R822 20K_0402_5%R822 20K_0402_5%

@

1

IN

NC

4

OUT

NC

CLRP1

2 1

2MM

1 2

C873 1U_0603_10V4ZC873 1U_0603_10V4Z

close to RAM door

+1.5VS

1 2

R828 24.9_0402_1%R 828 24.9_0402_1%

1 2

R829 33_0402_5%R 829 33_0402_5%

1 2

R831 33_0402_5%R 831 33_0402_5%

1 2

R832 33_0402_5%R 832 33_0402_5%

15" MODEM

1 2

R834 33_0402_5%R 834 33_0402_5%

1 2

R835 10K_0402_5%R835 10K_0402_5%

1 2 1 2

SATA_LED#

D30RB751V_SOD323 D30RB751V_SOD323

2 1

C874 0.01U_0402_16V7KC874 0.01U_0402_16V7K C875 0.01U_0402_16V7KC875 0.01U_0402_16V7K

C876 0.01U_0402_16V7KC876 0.01U_0402_16V7K C877 0.01U_0402_16V7KC877 0.01U_0402_16V7K

12

R819

R819 10M_0402_5%

10M_0402_5%

SATA_ITX_C_DRX_N0 SATA_ITX_C_DRX_P0SATA_ITX_DRX_P0

SATA_ITX_C_DRX_N1 SATA_ITX_C_DRX_P1

ICH_RTCX1

ICH_RTCX2

ICH_RTCRST# ICH_SRTCRST# SM_INTRUDER#

ICH_INTVRMEN LAN100_SLP

GLAN_COMP

HDA_BITCLK_R

HDA_SYNC_R

HDA_RST_R#

HDA_SDOUT_R

U34A

C23

RTCX1

C24

RTCX2

A25

RTCRST#

F20

SRTCRST#

C22

INTRUDER#

B22

INTVRMEN

A22

LAN100_SLP

E25

GLAN_CLK

C13

LAN_RSTSYNC

F14

LAN_RXD0

G13

LAN_RXD1

D14

LAN_RXD2

D13

LAN_TXD_0

D12

LAN_TXD_1

E13

LAN_TXD_2

B10

GPIO56

B28

GLAN_COMPI

B27

GLAN_COMPO

AF6

HDA_BIT_CLK

AH4

HDA_SYNC

AE7

HDA_RST#

AF4

HDA_SDIN0

AG4

HDA_SDIN1

AH3

HDA_SDIN2

AE5

HDA_SDIN3

AG5

HDA_SDOUT

AG7

HDA_DOCK_EN#/GPIO33

AE8

HDA_DOCK_RST#/GPIO34

AG8

SATALED#

AJ16

SATA0RXN

AH16

SATA0RXP

AF17

SATA0TXN

AG17

SATA0TXP

AH13

SATA1RXN

AJ13

SATA1RXP

AG14

SATA1TXN

AF14

SATA1TXP

ICH9-M ES_FCBGA676

3

LPC_AD0

K5

FWH0/LAD0 FWH1/LAD1 FWH2/LAD2 FWH3/LAD3

FWH4/LFRAME#

RTC

LPCCPU

LAN / GLAN

IHDA

SATA

LDRQ0#

LDRQ1#/GPIO23

A20GATE

A20M#

DPRSTP#

DPSLP#

FERR#

CPUPWRGD

IGNNE#

INIT#

INTR

RCIN#

SMI#

STPCLK#

THRMTRIP#

TP12

SATA4RXN

SATA4RXP SATA4TXN SATA4TXP

SATA5RXN

SATA5RXP SATA5TXN SATA5TXP

SATA_CLKN SATA_CLKP

SATARBIAS#

SATARBIAS

LPC_AD1

K4

LPC_AD2

L6

LPC_AD3

K2

LPC_FRAME#

K3

LPC_DRQ0#

J3 J1

GATEA20

N7

H_A20M#

AJ27

AJ25

H_DPSLP#

AE23

H_FERR#_S

AJ26

H_PWRGOOD

AD22

H_IGNNE#

AF25

H_INIT#

AE22

H_INTR

AG25

KB_RST#

L3

H_NMI

AF23

NMI

AF24

AH27

AG26

AG27

AH11 AJ11 AG12 AF12

AH9 AJ9 AE10 AF10

AH18 AJ18 AJ7 AH7

H_SMI#

H_STPCLK#

THRMTRIP_ICH#

R836 1K_0402_5%@R836 1K_0402_5%@ R837 1K_0402_5%@R837 1K_0402_5%@

CLK_PCIE_SATA# CLK_PCIE_SATA

SATARBIAS

2

LPC_AD[0..3] (36,38)

LPC_FRAME# (36,38)

LPC_DRQ0# (38)

GATEA20 (36) H_A20M# (5)

R825 0_0402_5%R825 0_0402_5%

1 2 1 2

R838 24.9_0402_1%R838 24.9_0402_1%

12

R827 56_0402_5%R827 56_0402_5%

H_PWRGOOD (6)

H_IGNNE# (5)

H_INIT# (5) H_INTR (5)

KB_RST# (36)

H_NMI (5) H_SMI# (5)

H_STPCLK# (5)

R833 54.9_0402_1%R833 54.9_0402_1%

1 2

CLK_PCIE_SATA# (22) CLK_PCIE_SATA (22)

1 2

H_DPRSTP#H_DPRS TP_R#

1 2

+VCCP

R362 need to pl ace within 2" o f ICH9M

12

R360 must be pl ace within 2" o f R362 w/o stu b.

R830

R830 56_0402_5%

56_0402_5%

10mils width less than 500mils

H_DPRSTP# (6,49) H_DPSLP# (6)

H_THERMTRIP#

1

GATEA20

KB_RST#

H_DPRSTP#

H_DPSLP#

+VCCP

12

R826

R826 56_0402_5%

56_0402_5%

H_THERMTRIP# (5,8)

R815

10K_0402_5%

R817

10K_0402_5%

R821

56_0402_5%

R824

56_0402_5%

H_FERR# (5)

+3VS

12

+VCCP

@R821

@

12

@R824

@

12

SATA PORT LIST

B B

HDA_SDOUT_R

Need check

+3VS

R839

R839 1K_0402_5%

1K_0402_5%

@

1 2

XOR Chain Entrance Strap

HDA_SDOUTICH_TP3 Description

0

1

0

1

0

11

0 1 4 5

RSVD

Enter XOR Chain

Normal Operation

Set PCIE port config bit 1

DEVICEPORT

HDD ODD E-SATA

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2007/10/15 2008/10/15

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

ICH9M(2/4)-LAN,IDELPC,RTC

KIWA5/6 LA-5081P

27 53Wednesday, March 18, 2009

1

0.4

5

4

3

2

1

+3VS

R840 10K_0402_5%R 840 10K_0402_5%

1 2

R841 8.2K_0402_5%R841 8.2K_0402_5%

1 2

R842 10K_0402_5%@R842 10K_0402_5%@

1 2

R843 8.2K_0402_5%@R843 8.2K_0402_5%@

1 2

R848 10K_0402_5%R 848 10K_0402_5%

D D

C C

B B

A A

1 2

R851 8.2K_0402_5%@R851 8.2K_0402_5%@

1 2

R858 10K_0402_5%@R858 10K_0402_5%@

1 2

R852 10K_0402_5%R 852 10K_0402_5%

1 2

+3VALW

R856 10K_0402_5%R 856 10K_0402_5%

1 2

R861 10K_0402_5%@R861 10K_0402_5%@

1 2

R864 10K_0402_5%R 864 10K_0402_5%

1 2

R866 10K_0402_5%R 866 10K_0402_5%

1 2

R867 1K_0402_5%R867 1K_0402_5%

1 2

R868 8.2K_0402_5%R868 8.2K_0402_5%

1 2

R870 10K_0402_5%R 870 10K_0402_5%

1 2

R872 10K_0402_5%R 872 10K_0402_5%

1 2

+3VS

R876 10K_0402_5%R 876 10K_0402_5%

1 2

R878 10K_0402_5%R 878 10K_0402_5%

1 2

R879 10K_0402_5%@R879 10K_0402_5%@

1 2

R880 10K_0402_5%@R880 10K_0402_5%@

1 2

R882 10K_0402_5%R 882 10K_0402_5%

1 2

R883 10K_0402_5%R 883 10K_0402_5%

1 2

+3VS

1 2

R889 100K_0402_5%@R889 100K_0402_5%@

1 2

R890 100K_0402_5%@R890 100K_0402_5%@

1 2

R891 1K_0402_5%@R891 1K_0402_5%@

1 2

+3VALW

RP1

45 36 27 18

10K_1206_8P4R_5%

RP2

45 36 27 18

10K_1206_8P4R_5%

RP3

45 36 27 18

10K_1206_8P4R_5%

CLK_ENABLE#(49)

USB_OC#6 USB_OC#1 USB_OC#2 USB_OC#4

USB_OC#5 USB_OC#7 USB_OC#9 USB_OC#0

USB_OC#8 USB_OC#3 USB_OC#10 USB_OC#11

+3VS

1 2

13

D

2

G

S

SERIRQ

PCI_CLKRUN#

GPIO38

EC_THERM#

OCP#

PM_BMBUSY#

GPIO39

GPIO48

LINKALERT#

CL_RST#

XDP_DBRESET#

ICH_RI#

ICH_PCIE_WAKE#

ICH_LOW_BAT#

LID_OUT#

WOL_EN

GPIO7

GPIO13

GPIO17

GPIO18

GPIO20

GPIO22

SB_SPKR

GPIO57

DPRSLPVR

ICH_RSVD

@

R898

R898 330_0402_5%

330_0402_5%

R899 0_0402_5%@R899 0_0402_5%@

1 2

@

Q9

Q9 RHU002N06_SOT323

RHU002N06_SOT323

H_STP_PCI#(22) H_STP_CPU#(22)

low-->default

High -->No boot

VRMPWRGD

+3VALW

12

R849

R849 10K_0402_5%

10K_0402_5%

NEW CARD

LAN

12

R847

+3VS

1 2

R847 10K_0402_5%

10K_0402_5%

@

R853

R853 10K_0402_5%

10K_0402_5%

12

VGATE(8,49)

ICH_SMBCLK(22,30)

ICH_SMBDATA(22,30)

@

R859

R859 10K_0402_5%

10K_0402_5%

EC_LID_OUT#(36)

R862 0_0402_5%R862 0_0402_5%

1 2

ICH_PCIE_WAKE#(30,31)

R869 0_0402_5%R869 0_0402_5%

1 2

R884 1K_0402_5%@R884 1K_0402_5%@

1 2

MCH_ICH_SYNC#(8)

XDP_DBRESET#(5)

PM_BMBUSY#(8)

SATA_CLKREQ#(22)

SB_SPKR(34)

AC decoupling cap range of 75nF to 220nF

PCIE_RXN3

PCIE_RXP3

WLAN

PCIE_TXN3 PCIE_TXP3

PCIE_RXN4(30) PCIE_RXP4(30) PCIE_TXN4(30)

PCIE_TXP4(30)

PCIE_IRX_PTX_N6(31) PCIE_IRX_PTX_P6(31) PCIE_ITX_C_PRX_N6(31) PCIE_ITX_C_PRX_P6(31)

SPI not used, Left NC

SB_SPI_CS#1(26)

C2 0.1U_0402_10V7KC2 0.1U_0402_10V7K C3 0.1U_0402_10V7KC3 0.1U_0402_10V7K

C887 0.1U_0402_10V7KC887 0.1U_0402_10V7K C888 0.1U_0402_10V7KC888 0.1U_0402_10V7K

C891 0.1U_0402_10V7KC891 0.1U_0402_10V7K C892 0.1U_0402_10V7KC892 0.1U_0402_10V7K

R900 22.6_0402_1%R900 22.6_0402_1%

SERIRQ(36,38)

EC_THERM#(36)

CPUSB#(30,36)

EC_SMI#(36) EC_SCI#(36)

1 2

+3VALW

12

R844

2.2K_0402_5%

1 2

R855 0_0402_5%R855 0_0402_5%

T96T96

OCP#

T98T98

T99T99R888 10K_0402_5%@R888 10K_0402_5%@ T100T100 T101T101

USB_OC#0(40) USB_OC#1(40)

USB_OC#4(40)

Within 500 mils

12

LINKALERT# ME__EC_CLK1 ME__EC_DATA1

ICH_RI#

XDP_DBRESET#

PM_BMBUSY#

LID_OUT#

H_STP_PCI# R_STP_CPU#

PCI_CLKRUN#

ICH_PCIE_WAKE# SERIRQ EC_THERM#

VRMPWRGD

SST_CTL

OCP#

GPIO7 EC_SMI# EC_SCI# GPIO13 GPIO17 GPIO18 GPIO20 GPIO22 GPIO27

SATA_CLKREQ# GPIO38 GPIO39 GPIO48 GPIO49 GPIO57

SB_SPKR MCH_ICH_SYNC# ICH_RSVD

PCIE_RXN3

PCIE_RXP3

PCIE_C_TXN3

PCIE_C_TXP3

PCIE_RXN4

PCIE_RXP4

PCIE_C_TXN4

PCIE_C_TXP4

PCIE_IRX_PTX_N6 PCIE_IRX_PTX_P6 PCIE_ITX_PRX_N6 PCIE_ITX_PRX_P6

SB_SPI_CS#1

USB_OC#0

USB_OC#1

USB_OC#2

USB_OC#3

USB_OC#4

USB_OC#5

USB_OC#6

USB_OC#7

USB_OC#8

USB_OC#9

USB_OC#10

USB_OC#11

USBRBIAS

R845

2.2K_0402_5%

2.2K_0402_5% U34C

U34C

G16

SMBCLK

A13

SMBDATA

E17

LINKALERT#/GPIO60/CLGPIO4

C17

SMLINK0

B18

SMLINK1

F19

RI#

R4

SUS_STAT#/LPCPD#

G19

SYS_RESET#

M6

PMSYNC#/GPIO0

A17

SMBALERT#/GPIO11

A14

STP_PCI#

E19

STP_CPU#

L4

CLKRUN#

E20

WAKE#

M5

SERIRQ

AJ23

THRM#

D21

VRMPWRGD

A20

TP11

AG19

GPIO1

AH21

GPIO6

AG21

GPIO7

A21

GPIO8

C12

GPIO12

C21

GPIO13

AE18

GPIO17

K1

GPIO18

AF8

GPIO20

AJ22

SCLOCK/GPIO22

A9

GPIO27

D19

GPIO28

L1

SATACLKREQ#/GPIO35

AE19

SLOAD/GPIO38

AG22

SDATAOUT0/GPIO39

AF21

SDATAOUT1/GPIO48

AH24

GPIO49

A8

GPIO57/CLGPIO5

M7

SPKR

AJ24

MCH_SYNC#

B21

TP3

AH20

TP8

AJ20

TP9

AJ21

TP10

ICH9-M ES_FCBGA676

U34D

N29

PERN1

N28

PERP1

P27

PETN1

P26

PETP1

L29

PERN2

L28

PERP2

M27

PETN2

M26

PETP2

J29

PERN3

J28

PERP3

K27

PETN3

K26

PETP3

G29

PERN4

G28

PERP4

H27

PETN4

H26

PETP4

E29

PERN5

E28

PERP5

F27

PETN5

F26

PETP5

C29

PERN6/GLAN_RXN

C28

PERP6/GLAN_RXP

D27

PETN6/GLAN_TXN

D26

PETP6/GLAN_TXP

D23

SPI_CLK

D24

SPI_CS0#

F23

SPI_CS1#GPIO58/CLGPIO6

D25

SPI_MOSI

E23

SPI_MISO

N4

OC0#/GPIO59

N5

OC1#/GPIO40

N6

OC2#/GPIO41

P6

OC3#/GPIO42

M1

OC4#/GPIO43

N2

OC5#/GPIO29

M4

OC6#/GPIO30

M3

OC7#/GPIO31

N3

OC8#/GPIO44

N1

OC9#/GPIO45

P5

OC10#/GPIO46

P3

OC11#/GPIO47

AG2

USBRBIAS

AG1

USBRBIAS#

ICH9-M ES_FCBGA676

SPI

USB

SMB

PCI - Express

SATA

GPIO

SATA

GPIO

clocks

SYS / GPIOGPIOMISC

Power MGT

GPIO10/SUS_PWR_ACK

GPIO14/AC_PRESENT

Controller Link

DMI0RXN DMI0RXP DMI0TXN DMI0TXP

DMI1RXN DMI1RXP DMI1TXN DMI1TXP

DMI2RXN DMI2RXP DMI2TXN DMI2TXP

DMI3RXN DMI3RXP DMI3TXN DMI3TXP

DMI_CLKN DMI_CLKP

DMI_ZCOMP

Direct Media In terface

DMI_IRCOMP

USBP0N USBP0P USBP1N USBP1P USBP2N USBP2P USBP3N USBP3P USBP4N USBP4P USBP5N USBP5P USBP6N USBP6P USBP7N USBP7P USBP8N USBP8P USBP9N

USBP9P USBP10N USBP10P USBP11N USBP11P

SATA0GP/GPIO21 SATA1GP/GPIO19 SATA4GP/GPIO36 SATA5GP/GPIO37

CLK14 CLK48

SUSCLK

SLP_S3# SLP_S4# SLP_S5#

S4_STATE#/GPIO26

PWROK

DPRSLPVR/GPIO16

BATLOW#

PWRBTN#

LAN_RST#

RSMRST#

CK_PWRGD

CLPWROK

SLP_M#

CL_CLK0 CL_CLK1

CL_DATA0 CL_DATA1

CL_VREF0 CL_VREF1

CL_RST0# CL_RST1#

MEM_LED/GPIO24

WOL_EN/GPIO9

DMI_RXN0

V27

DMI_RXP0

V26

DMI_TXN0

U29

DMI_TXP0

U28

DMI_RXN1

Y27

DMI_RXP1

Y26

DMI_TXN1

W29

DMI_TXP1

W28

DMI_RXN2

AB27

DMI_RXP2

AB26

DMI_TXN2

AA29

DMI_TXP2

AA28

DMI_RXN3

AD27

DMI_RXP3

AD26

DMI_TXN3

AC29

DMI_TXP3

AC28

CLK_PCIE_ICH#

T26

CLK_PCIE_ICH

T25

AF29 AF28

USB20_N0

AC5

USB20_P0

AC4

USB20_N1

AD3

USB20_P1

AD2

USB20_N2

AC1

USB20_P2

AC2

USB20_N3

AA5

USB20_P3

AA4

USB20_N4

AB2

USB20_P4

AB3

USB20_N5

AA1

USB20_P5

AA2

USB20_N6

W5

USB20_P6

W4

USB20_N7

Y3

USB20_P7

Y2

USB20_N8

W1

USB20_P8

W2

USB20_N9

V2

USB20_P9

V3

USB20_N10

U5

USB20_P10

U4

USB20_N11

U1

USB20_P11

U2

+3VS

R846

8.2K_0402_5%

AH23 AF19 AE21 AD20

H1 AF3

P1

C16 E16 G17

C10

G20

M2

B13

R3

D20

D22

R5

R6

B16

F24 B19

F22 C19

C25 A19

F21 D18

A16 C18 C11 C20

8.2K_0402_5%

1 2

CLK_14M_ICH CLK_48M_ICH

ICH_SUSCLK

SLP_S3# SLP_S4# SLP_S5#

S4_STATE#

ICH_POK

R865 499_0402_1%R865 499_0402_1%

ICH_LOW_BAT#

PBTN_OUT#

CK_PWRGD_R CK_PWRGD

M_PWROK

CL_VREF0_ICH CL_VREF1_ICH

CL_RST#

GPIO14

WOL_EN

1 2

R873 0_0402_5%R873 0_0402_5%

R874 0_0402_5%R874 0_0402_5%

SB_INT_FLASH_SEL (39)

+3VALW

R886

CLK_14M_ICH (22) CLK_48M_ICH (22)

T95T95

SLP_S3# (36) SLP_S4# (36) SLP_S5# (36)

PBTN_OUT# (36)

1 2

T97T97

CL_CLK0 (8) CL_CLK1

CL_DATA0 (8) CL_DATA1

CL_RST# (8)

10K_0402_5%@

change from 100k to 10k ohm 5/8

DMI_RXN0 (8) DMI_RXP0 (8) DMI_TXN0 (8) DMI_TXP0 (8)

DMI_RXN1 (8) DMI_RXP1 (8) DMI_TXN1 (8) DMI_TXP1 (8)

DMI_RXN2 (8) DMI_RXP2 (8) DMI_TXN2 (8) DMI_TXP2 (8)

DMI_RXN3 (8) DMI_RXP3 (8) DMI_TXN3 (8) DMI_TXP3 (8)

CLK_PCIE_ICH# (22)

DMI_IRCOMP

CLK_PCIE_ICH (22)

R897 24.9_0402_1%R897 24.9_0402_1%

1 2

USB20_N0 (40) USB20_P0 (40) USB20_N1 (40) USB20_P1 (40) USB20_N2 (40) USB20_P2 (40) USB20_N3 (30) USB20_P3 (30) USB20_N4 (40) USB20_P4 (40) USB20_N5 USB20_P5 USB20_N6 (40) USB20_P6 (40) USB20_N7 (37) USB20_P7 (37) USB20_N8 USB20_P8 USB20_N9 USB20_P9 USB20_N10 (30) USB20_P10 (30) USB20_N11 USB20_P11

Within 500 mils

LEFT USB1 LEFT USB2 CMOS WLAN2 RIGHT USB

BT Card Reader WLAN TV Tuner New Card

DPRSLPVR

D31 RB751V_SOD323

2 1

12

R887 0_0402_5%@R887 0_0402_5%@

+1.5VS

+3VALW

12

@

R854

R854 10K_0402_5%

10K_0402_5%

R860 100_0402_5%@R860 100_0402_5%@

1 2

DPRSLPVR (8,49)

EC_RSMRST#REC_RSMRST#R

@

ACIN

12

M_PWROK (8) VGATE (8,49)

EC_RSMRST#(36)

R871 10K_0402_5%R 871 10K_0402_5%

PCIE PORT LIST

1 2 3 4 5 6

Place closely pin B2 Place closely pin AC1

12

1

2

ICH_POK (8,36)

1 2

CK_PWRGD (22)

1

C881

0.1U_0402_16V4Z

2

1

C882

0.1U_0402_16V4Z

2

ACIN (36,43,45)

RSMRST circuit

BAV99DW-7_SOT363

R896

1 2

2.2K_0402_5%

DEVICEPORT

D32B

5

3

@

R895

2.2K_0402_5%

1 2

WLAN2

WLAN NEW CARD

LAN

R850

R850 22_0402_5%

22_0402_5%

C879

C879 10P_0402_50V8J

10P_0402_50V8J

M_PWROK

R863

10K_0402_5%@

R875 3.24K_0402_1%R875 3.24K_0402_1%

12

R877

R877 453_0402_1%

453_0402_1%

R881 3.24K_0402_1%R881 3.24K_0402_1%

12

R885

R885 453_0402_1%

453_0402_1%

R892

@R892

@

0_0402_5%

1 2

C

123

E

Q8

Q8 MMBT3906_SOT23-3

MMBT3906_SOT23-3

B

R894 4.7K_0402_5%R894 4.7K_0402_5%

4

1

2

D32A

D32A BAV99DW-7_SOT363

BAV99DW-7_SOT363

6

CLK_14M_ICHCLK_48M_ICH

12

R857

R857 10_0402_5%

10_0402_5%

@

1

C878

C878 10P_0402_50V8J

10P_0402_50V8J

@

2

M_PWROK

1

C880

@

1000P_0402_50V7K

2

1 2

R893

@R893

@

0_0402_5%

1 2

EC_RSMRST#R

1 2

POK (46)

+3VALW

USB PORT LIST

DEVICEPORT

0

LEFT SIDE1

1

LEFT SIDE2 CMOS

2

WLAN2

3 4

RIGHT SIDE

5

BT

6 7

CARD READER

WIRELESS

8 9

NEW CARD

10 11

+3VS

+3VALW

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

5

4

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

3

2007/10/15 2008/10/15

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

ICH9M(3/4)-USB,GPIO,PCIE

Size Document Number Rev

C

Date: Sheet of

ICH9M(3/4)-USB,GPIO,PCIE

KIWA5/6 LA-5081P

1

28 53Wednesday, March 18, 2009

0.4

5

+RTCVCC

0.1U_0402_16V4Z

D D

R901

100_0402_5%

R903

100_0402_5%

C C

R904

1 2

+1.5VS

0_0805_5%

220U_D2_4VM

R907

1 2

+1.5VS

CHB1608U301_0603

B B

+1.5VS

C800

0.1U_0402_16V4Z

+3VS

1

C802

0.1U_0402_16V4Z

A A

+1.5VS

2

R911

1 2

CHB1608U301_0603

1

C898

C894

+5VS +3VS

C898

0.1U_0402_16V4Z

2

21

D33

D33 CH751H-40PT_SOD323-2

CH751H-40PT_SOD323-2

ICH_V5REF_RUN

1

C893

1U_0603_10V4Z

2

+3VALW+5VALW

21

D34

D34 CH751H-40PT_SOD323-2

CH751H-40PT_SOD323-2

ICH_V5REF_SUS

1

C905

1U_0603_10V4Z

2

40 mils

1

+

C910

C908

2

10U_0805_10V4Z

1

C919

C918

2

1U_0603_10V4Z

+1.5VS

1

0.1U_0402_16V4Z

2

close to AC7

+1.5VS

(10UF*1, 2.2UF*1)

4.7U_0805_10V4Z

1

C806

2

5

20 mils

10U_0805_10V4Z

1

C911

2

1

2

10U_0805_10V4Z

1

C801

2

CHB1608U301_0603

1 2

R910

C804

20 mils

ICH_V5REF_RUN

ICH_V5REF_SUS

1

C912

2

2.2U_0603_6.3V4Z

+1.5VS

1

C917

1U_0603_10V4Z

+1.5VS

1U_0603_10V4Z

T104T104 T105T105

2.2U_0603_6.3V4Z

1

C805

2

10U_0805_10V4Z

2

+1.5VS

1

C921

2

1

C924

2

VCC_LAN1_05_INT_ICH_1 VCC_LAN1_05_INT_ICH_2 VCCCL1_05_ICH

1

2

+3VS

4

U34F

A23

VCCRTC

A6

V5REF

AE1

V5REF_SUS

AA24

VCC1_5_B[01]

AA25

VCC1_5_B[02]

AB24

VCC1_5_B[03]

AB25

VCC1_5_B[04]

AC24

VCC1_5_B[05]

AC25

VCC1_5_B[06]

AD24

VCC1_5_B[07]

AD25

VCC1_5_B[08]

AE25

VCC1_5_B[09]

AE26

VCC1_5_B[10]

AE27

VCC1_5_B[11]

AE28

VCC1_5_B[12]

AE29

VCC1_5_B[13]

F25

VCC1_5_B[14]

G25

VCC1_5_B[15]

H24

VCC1_5_B[16]

H25

VCC1_5_B[17]

J24

VCC1_5_B[18]

J25

VCC1_5_B[19]

K24

VCC1_5_B[20]

K25

VCC1_5_B[21]

L23

VCC1_5_B[22]

L24

VCC1_5_B[23]

L25

VCC1_5_B[24]

M24

VCC1_5_B[25]

M25

VCC1_5_B[26]

N23

VCC1_5_B[27]

N24

VCC1_5_B[28]

N25

VCC1_5_B[29]

P24

VCC1_5_B[30]

P25

VCC1_5_B[31]

R24

VCC1_5_B[32]

R25

VCC1_5_B[33]

R26

VCC1_5_B[34]

R27

VCC1_5_B[35]

T24

VCC1_5_B[36]

T27

VCC1_5_B[37]

T28

VCC1_5_B[38]

T29

VCC1_5_B[39]

U24

VCC1_5_B[40]

U25

VCC1_5_B[41]

V24

VCC1_5_B[42]

V25

VCC1_5_B[43]

U23

VCC1_5_B[44]

W24

VCC1_5_B[45]

W25

VCC1_5_B[46]

K23

VCC1_5_B[47]

Y24

VCC1_5_B[48]

Y25

VCC1_5_B[49]

AJ19

VCCSATAPLL

AC16

VCC1_5_A[01]

AD15

VCC1_5_A[02]

AD16

VCC1_5_A[03]

AE15

VCC1_5_A[04]

AF15

VCC1_5_A[05]

AG15

VCC1_5_A[06]

AH15

VCC1_5_A[07]

AJ15

VCC1_5_A[08]

AC11

VCC1_5_A[09]

AD11

VCC1_5_A[10]

AE11

VCC1_5_A[11]

AF11

VCC1_5_A[12]

AG10

VCC1_5_A[13]

AG11

VCC1_5_A[14]

AH10

VCC1_5_A[15]

AJ10

VCC1_5_A[16]

AC9

VCC1_5_A[17]

AC18

VCC1_5_A[18]

AC19

VCC1_5_A[19]

AC21

VCC1_5_A[20]

G10

VCC1_5_A[21]

G9

VCC1_5_A[22]

AC12

VCC1_5_A[23]

AC13

VCC1_5_A[24]

AC14

VCC1_5_A[25]

AJ5

VCCUSBPLL

AA7

VCC1_5_A[26]

AB6

VCC1_5_A[27]

AB7

VCC1_5_A[28]

AC6

VCC1_5_A[29]

AC7

VCC1_5_A[30]

A10

VCCLAN1_05[1]

A11

VCCLAN1_05[2]

A12

VCCLAN3_3[1]

B12

VCCLAN3_3[2]

A27

VCCGLANPLL

D28

VCCGLAN1_5[1]

D29

VCCGLAN1_5[2]

E26

VCCGLAN1_5[3]

E27

VCCGLAN1_5[4]

A26

VCCGLAN3_3

ICH9-M ES_FCBGA676

4

1

C895

0.1U_0402_16V4Z

2

+3VS

0.1U_0402_16V4Z

1

C907

2

T102T102 T103T103

0.1U_0402_16V4Z

+3VALW

+3VS

3

1

C899 0.1U_0402_16V4ZC 899 0.1U_0402_16V4Z

2

0.01U_0402_16V7K

1

C896

C897 10U_0805_6.3V6MC897 10U_0805_6.3V6 M

2

C900 10U_0805_10V4ZC900 10U_0805_1 0V4Z

1

C909

0.1U_0402_16V4Z

2

0.1U_0402_16V4Z

R908

R908 0_0402_5%

0_0402_5%

GM@

+3VALW

1

C922

C923

0.1U_0402_16V4Z

2

1

C799

4.7U_0603_6.3V6K

2

T106T106

1

C803

C803 1U_0603_10V4Z@

1U_0603_10V4Z@

2

2007/10/15 2008/10/15

3

1 2

CHB1608U301_0603

1

2

+VCCP

1

2

1

C906

0.1U_0402_16V4Z

2

C916

12

R902

+3VS

(SATA)

1

C913

0.1U_0402_16V4Z

2

1

2

1 2

1

C920

4.7U_0603_6.3V6M

2

Compal Secret Data

+1.5VS

+3VS

1

C901

0.1U_0402_16V4Z

2

1

2

R909

R909 0_0402_5%

0_0402_5%

PM@

Deciphered Date

(DMI)

+3VS

1

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z C915

C915

+3VALW

+VCCP

VCCDMIPLL

VCC_DMI[1] VCC_DMI[2]

VCC3_3[01] VCC3_3[02] VCC3_3[07]

VCC3_3[03] VCC3_3[04] VCC3_3[05] VCC3_3[06]

VCC3_3[08] VCC3_3[09] VCC3_3[10] VCC3_3[11] VCC3_3[12] VCC3_3[13] VCC3_3[14]

VCCHDA

VCCCL1_05

VCCCL1_5

A15 B15 C15 D15 E15 F15 L11 L12 L14 L16 L17 L18 M11 M18 P11 P18 T11 T18 U11 U18 V11 V12 V14 V16 V17 V18

R29

W23 Y23

AB23 AC23

AG29 AJ6 AC10

AD19 AF20 AG24 AC20

B9 F9 G3 G6 J2 J7 K7

AJ4

AJ3

AC8 F17

VCCSUS1_5_ICH_1

AD8

VCCSUS1_5_ICH_2

F18

A18 D16 D17 E22

AF1

T1 T2 T3 T4 T5 T6 U6 U7 V6 V7 W6 W7 Y6 Y7 T7

G22 G23

A24 B24

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

VCC1_05[01] VCC1_05[02] VCC1_05[03] VCC1_05[04] VCC1_05[05] VCC1_05[06] VCC1_05[07] VCC1_05[08] VCC1_05[09] VCC1_05[10] VCC1_05[11] VCC1_05[12] VCC1_05[13] VCC1_05[14] VCC1_05[15] VCC1_05[16]

CORE

VCC1_05[17] VCC1_05[18] VCC1_05[19] VCC1_05[20] VCC1_05[21] VCC1_05[22] VCC1_05[23] VCC1_05[24]

VCCA3GP

VCC1_05[25] VCC1_05[26]

V_CPU_IO[1] V_CPU_IO[2]

VCCP_CORE

PCI

VCCSUSHDA

VCCSUS1_05[1] VCCSUS1_05[2]

ARX

VCCSUS1_5[1]

VCCSUS1_5[2]

VCCSUS3_3[01] VCCSUS3_3[02] VCCSUS3_3[03] VCCSUS3_3[04]

ATX

ATXARX

VCCPSUS

VCCSUS3_3[05]

VCCSUS3_3[06] VCCSUS3_3[07] VCCSUS3_3[08] VCCSUS3_3[09] VCCSUS3_3[10] VCCSUS3_3[11] VCCSUS3_3[12] VCCSUS3_3[13] VCCSUS3_3[14] VCCSUS3_3[15] VCCSUS3_3[16]

VCCPUSB

USB CORE

VCCSUS3_3[17] VCCSUS3_3[18] VCCSUS3_3[19] VCCSUS3_3[20]

VCCCL3_3[1]

GLAN POWER

VCCCL3_3[2]

+VCCP

4.7U_0603_6.3V6M

C902

1

2

C914

0.1U_0402_16V4Z

2

0.1U_0402_16V4Z

1

2

R905

PM@

0_0402_5%

2

1

U34E

AA26

VSS[001]

AA27

VSS[002]

AA3

VSS[003]

AA6

VSS[004]

AB1

VSS[005]

AA23

VSS[006]

AB28

VSS[007]

AB29

VSS[008]

AB4

VSS[009]

AB5

VSS[010]

AC17

VSS[011]

AC26

VSS[012]

AC27

VSS[013]

AC3

VSS[014]

AD1

VSS[015]

AD10

VSS[016]

AD12

VSS[017]

AD13

VSS[018]

AD14

VSS[019]

AD17

VSS[020]

AD18

VSS[021]

AD21

VSS[022]

AD28

VSS[023]

AD29

VSS[024]

AD4

VSS[025]

AD5

VSS[026]

AD6

VSS[027]

AD7

VSS[028]

AD9

VSS[029]

AE12

VSS[030]

AE13

VSS[031]

AE14

VSS[032]

AE16

VSS[033]

AE17

VSS[034]

AE2

VSS[035]

0.1U_0402_16V4Z

C904

C903

1

2

+1.5VS+3VS

GM@

R906

R906 0_0402_5%

0_0402_5%

1 2

AE20

VSS[036]

AE24

VSS[037]

AE3

VSS[038]

AE4

VSS[039]

AE6

VSS[040]

AE9

VSS[041]

AF13

VSS[042]

AF16

VSS[043]

AF18

VSS[044]

AF22

VSS[045]

AH26

VSS[046]

AF26

VSS[047]

AF27

VSS[048]

AF5

VSS[049]

AF7

VSS[050]

AF9

VSS[051]

AG13

VSS[052]

AG16

VSS[053]

AG18

VSS[054]

AG20

VSS[055]

AG23

VSS[056]

AG3

VSS[057]

AG6

VSS[058]

AG9

VSS[059]

AH12

VSS[060]

AH14

VSS[061]

AH17

VSS[062]

AH19

VSS[063]

AH2

VSS[064]

AH22

VSS[065]

AH25

VSS[066]

AH28

VSS[067]

AH5

VSS[068]

AH8

VSS[069]

AJ12

VSS[070]

AJ14

VSS[071]

AJ17

VSS[072]

AJ8

VSS[073]

B11

VSS[074]

B14

VSS[075]

B17

VSS[076]

B2

VSS[077]

B20

VSS[078]

B23

VSS[079]

B5

VSS[080]

B8

VSS[081]

C26

VSS[082]

C27

VSS[083]

E11

VSS[084]

E14

VSS[085]

E18

VSS[086]

E2

VSS[087]

E21

VSS[088]

E24

VSS[089]

E5

VSS[090]

E8

VSS[091]

F16

VSS[092]

F28

VSS[093]

F29

VSS[094]

G12

VSS[095]

G14

VSS[096]

G18

VSS[097]

G21

VSS[098]

G24

VSS[099]

G26

VSS[100]

G27

VSS[101]

G8

VSS[102]

H2

VSS[103]

H23

VSS[104]

H28

VSS[105]

H29

VSS[106]

ICH9-M ES_FCBGA676

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

ICH9M(4/4)-POWER&GND

VSS_NCTF[01] VSS_NCTF[02] VSS_NCTF[03] VSS_NCTF[04] VSS_NCTF[05] VSS_NCTF[06] VSS_NCTF[07] VSS_NCTF[08] VSS_NCTF[09] VSS_NCTF[10] VSS_NCTF[11] VSS_NCTF[12]

KIWA5/6 LA-5081P

VSS[107] VSS[108] VSS[109] VSS[110] VSS[111] VSS[112] VSS[113] VSS[114] VSS[115] VSS[116] VSS[117] VSS[118] VSS[119] VSS[120] VSS[121] VSS[122] VSS[123] VSS[124] VSS[125] VSS[126] VSS[127] VSS[128] VSS[129] VSS[130] VSS[131] VSS[132] VSS[133] VSS[134] VSS[135] VSS[136] VSS[137] VSS[138] VSS[139] VSS[140] VSS[141] VSS[142] VSS[143] VSS[144] VSS[145] VSS[146] VSS[147] VSS[148] VSS[149] VSS[150] VSS[151] VSS[152] VSS[153] VSS[154] VSS[155] VSS[156] VSS[157] VSS[158] VSS[159] VSS[160] VSS[161] VSS[162] VSS[163] VSS[164] VSS[165] VSS[166] VSS[167] VSS[168] VSS[169] VSS[170] VSS[171] VSS[172] VSS[173] VSS[174] VSS[175] VSS[176] VSS[177] VSS[178] VSS[179] VSS[180] VSS[181] VSS[182] VSS[183] VSS[184] VSS[185] VSS[186] VSS[187] VSS[188] VSS[189] VSS[190] VSS[191] VSS[192] VSS[193] VSS[194] VSS[195] VSS[196] VSS[197] VSS[198]

1

H5 J23 J26 J27 AC22 K28 K29 L13 L15 L2 L26 L27 L5 L7 M12 M13 M14 M15 M16 M17 M23 M28 M29 N11 N12 N13 N14 N15 N16 N17 N18 N26 N27 P12 P13 P14 P15 P16 P17 P2 P23 P28 P29 P4 P7 R11 R12 R13 R14 R15 R16 R17 R18 R28 T12 T13 T14 T15 T16 T17 T23 B26 U12 U13 U14 U15 U16 U17 AD23 U26 U27 U3 V1 V13 V15 V23 V28 V29 V4 V5 W26 W27 W3 Y1 Y28 Y29 Y4 Y5 AG28 AH6 AF2 B25

A1 A2 A28 A29 AH1 AH29 AJ1 AJ2 AJ28 AJ29 B1 B29

0.4

29 53Wednesday, March 18, 2009

0.4

A

1 1

2 2

Mini-Express Card(Slot 2-WIRELESS) 5.2mm high

ICH_PCIE_WAKE#(28,31)

BT_ACTIVE(40) WLAN_ACTIVE(40)

WLAN_CLKREQ2#(22)

3 3

EC_TX_P80_DATA(36,38) EC_RX_P80_CLK(36,38)

ICH_PCIE_WAKE# BT_ACTIVE WLAN_ACTIVE WLAN_CLKREQ2#

CLK_PCIE_WLAN2#(22)

CLK_PCIE_WLAN2(22)

PCIE_RXN3(28) PCIE_RXP3(28)

PCIE_TXN3(28)

PCIE_TXP3(28)

+3VS

P80 port Debug

R98 0_0402_5%@R98 0_0402_5%@

1 2

R99 0_0402_5%@R99 0_0402_5%@

1 2

100_0402_5%

R100

1 2 1 2

R101

100_0402_5%

12

R1094

R1094 100K_0402_5%

100K_0402_5%

@

EC_TX_P80_DATA_R3EC_TX_P80_DATA EC_RX_P80_CLK_R3EC_RX_P80 _CLK

B

1218 change

JP12

1

WAKE#

3

NC

5

NC

7

CLKREQ#

9

GND

11

REFCLK-

13

REFCLK+

15

GND

17

NC

19

NC

21

GND

23

PERn0

25 27 29 31 33 35 37 39 41 43 45 47 49 51

53

+3.3Vaux PERp0 GND GND

SMB_CLK

PETn0

SMB_DATA PETp0 GND NC NC NC

LED_WWAN #

NC

LED_WLAN#

NC

LED_WPAN# NC NC NC

GND

TAITW_PFPET0-AFGLBG1ZZ4N0

ME@

3.3V

GND

1.5V

GND

PERST#

GND

+1.5V

GND

USB_D-

USB_D+

GND

+1.5V

GND

+3.3V

GND

C

+3VS +1.5VS

1

2

+1.5VS_CARD1

40mil

60mil

+3VS_CARD1

40mil

2005/09/27 modified. Base on OPTION GTM351E Datasheet Rev0.1

Vcc 3.3V +/- 8% Peak Icc 2750mA with max supply droop 50mA Average Icc 1000mA

+3VS

2 4 6 8

NC

10

NC

12

NC

14

NC

16

NC

18 20

NC

22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52

54

+1.5VS

2Watt

R26 0_0402_5%

1 2

WLAN@

R27 0_0402_5%@R27 0_0402_5%@

1 2

R28 0_0402_5%@R28 0_0402_5%@

1 2

R29 0_0402_5%@R29 0_0402_5%@

1 2

R30 0_0402_5%@R30 0_0402_5%@

1 2

WLAN@

R31 300_0402_5%

1 2 1 2

R97 300_0402_5%

WLAN@

2005/09/27 modified. Base on OPTION GTM351E Datasheet Rev0.1

Vcc 3.3V +/- 8% Peak Icc 2750mA with max supply droop 50mA Average Icc 1000mA

WLAN_LED#

+3VALW +3VS

ICH_SMBCLK (22,28) ICH_SMBDATA (22,28)

USB20_N3 (28) USB20_P3 (28)

WLAN_LED# (39)

WL_OFF# (36) PLT_RST# (8,16,26,31)

+3VALW_CARD1

Express Card Power Switch

Imax = 0.75A

1

NEWCARD@

C689

C689 10U_0805_10V4Z

10U_0805_10V4Z

2

Imax = 1.35A

1

NEWCARD@

C692

C692 10U_0805_10V4Z

10U_0805_10V4Z

2

Imax = 0.275A

1

@

C695

C695 10U_0805_10V4Z

10U_0805_10V4Z

2

+1.5VS

1

2

+3VS

1

2

+3VALW

1

2

C678

WLAN@

0.1U_0402_16V4Z

1

C690

0.1U_0402_16V4Z

2

NEWCARD@

1

C693

0.1U_0402_16V4Z

2

NEWCARD@

1

C696

0.1U_0402_16V4Z

2

NEWCARD@

C688

0.1U_0402_16V4Z

NEWCARD@

C691

0.1U_0402_16V4Z

NEWCARD@

C694

0.1U_0402_16V4Z

NEWCARD@

D

1

WLAN@

C680

0.1U_0402_16V4Z

2

+3VALW

ICH_SMBCLK(22,28) ICH_SMBDATA(22,28)

+1.5VS_CARD1

ICH_PCIE_WAKE#(28,31)

+3VALW_CARD1

EXP_CLKREQ#(22)

CLK_PCIE_EXP#(22) CLK_PCIE_EXP(22)

+3VS

R394

NEWCARD@

NEWCARD@ 1 2

0_1206_5%

+3VALW

PLT_RST#(8,16,26,31)

SYSON(36,42,47)

SUSP#(34,36,42,47,48)

R395 100K_0402_5%@R395 100K_0402_5%@

1 2

CPUSB#(28,36)

USB20_N10(28)

USB20_P10(28)

+3VS_CARD1

PCIE_RXN4(28) PCIE_RXP4(28)

PCIE_TXN4(28) PCIE_TXP4(28)

+1.5VS

PLT_RST#

SYSON

SUSP#

CPUSB#

USB20_N10_R USB20_P10_R

CPUSB#

PERST#

CPUSB#

U38

12

1.5Vin

14

1.5Vin

2

3.3Vin

4

3.3Vin

AUX_IN17AUX_OUT

6

SYSRST#

20

SHDN#

1

STBY#

10

CPPE#

9

CPUSB#

18

RCLKEN

P2231NL_QFN20

NEWCARD@

E

JEXP1

1

GND

2

USB_D-

3

USB_D+

4

CPUSB#

5

RSV

6

RSV

7

SMB_CLK

8

SMB_DATA

9

+1.5V

10

+1.5V

11

WAKE#

12

+3.3VAUX

13

PERST#

14

+3.3V

15

+3.3V

16

CLKREQ#

17

CPPE#

18

REFCLK-

19

REFCLK+

20

GND

21

PERn0

22

PERp0

23

GND

24

PETn0

25

PETp0

26

GND

27

GND

28

GND

SANTA_130801-5_RT

ME@

(NEW)

1.5Vout

3.3Vout

OC#

PERST#

NC

GND

PAD

+1.5VS_CARD1

11 13

+3VS_CARD1

3 5

+3VALW_CARD1

15

19

PERST#

8

16

7

21

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2007/10/15 2008/10/15

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

Mini-Card/3G/TV /BT

KIWAX_LA-5082P

30 53Wednesday, March 18, 2009

E

0.4

5

Layout Notice : Filter place as close chip as possible.

+2.5V_LAN

D D

C C

B B

A A

L14

MBK1608601YZF_2P

+1.2V_LAN

L17 MBK1608601YZF_2PL17 MBK1608601YZF_2P

L18 MBK1608601YZF_2PL18 MBK1608601YZF_2P

L19 MBK1608601YZF_2PL19 MBK1608601YZF_2P

L20 MBK1608601YZF_2PL20 MBK1608601YZF_2P

Layout Notice : Place as close chip as possible.

0.1U_0402_16V4Z

C726

12

0.1U_0402_16V4Z

L15

12

0.047U_0402_16V4Z

L16

12

1U_0603_10V4Z

4.7U_0805_10V4Z

C722

4.7U_0805_10V4Z

1U_0603_10V4Z

+2.5V_LAN

2

C727

1

10U_0805_10V4Z

C697

0.047U_0402_16V4Z

12

C714

12

C717

12

C724

C728

C709

21.5

1

2

1

2

1

2

0.1U_0402_16V4Z

2

1

+XTALVDD

2

1

2

C710

1

+LAN_BIASVDD

1

C713

0.1U_0402_16V4Z

2

C716

0.1U_0402_16V4Z

1

2

C718

0.1U_0402_16V4Z

1

2

C723

0.1U_0402_16V4Z

1

2

C725

0.1U_0402_16V4Z

1

2

1

+AVDDL

+GPHY_PLLVDD

+PCIE_PLLVDD

+PCIE_VDD

+LAN_AVDD

C711

0.01U_0402_16V7K

EN_WOL(36)

(CLKREQ#) and (ENERGY_DET) are only supported in BCM5787M

2

C729

1

27P_0402_50V8J

R417

Y6

1 2

25MHZ_20P

2N7002_SOT23

200_0402_1%

12

EN_WOL

4

L13

@L13

@

FBM-L11-321611-260-LMT_1206

1 2

R401

R401 33K_0402_5%

33K_0402_5%

+3VS

+3V_LAN

PLT_RST#(8,16,26,30)

1 2

R414 4.7K_0402_5%@R414 4.7K_0402_5%@

1 2

R415 4.7K_0402_5%@R415 4.7K_0402_5%@

+3VALW

2

C712

0.1U_0402_16V4Z

1

0.1U_0402_16V7K

+3V_LAN

+5VALW

12

13

D

2

G

Q13

S

CLK_PCIE_LAN#(22)

CLK_PCIE_LAN(22)

CLKREQ_LAN#(22)

PCI_CBE#3(26)

PCIE_ITX_C_PRX_N6(28)

PCIE_ITX_C_PRX_P6(28)

PCIE_IRX_PTX_N6(28)

PCIE_IRX_PTX_P6(28)

ICH_PCIE_WAKE#(28,30) LAN_WAKE#(36)

XTALO

XTALI

2

C730

1

27P_0402_50V8J

D

S

D

S

Q12

1 3

AO3414_SOT23-3

G

2

1 2

R403 0_0402_5%@R403 0_0402_5%@

1 2

R404 1K_0402_5%R404 1K_0402_5%

1 2

R402 1K_0402_5%R402 1K_0402_5%

R408

1 2

0_0402_5%@

+GPHY_PLLVDD

PCIE_MRX_C_LTX_N6

C720

PCIE_MRX_C_LTX_P6

C721

@

1 2

R410 0_0402_5%

1 2

R411 47K_0402_5%@R411 47K_0402_5%@

1 2

R412 47K_0402_5%@R412 47K_0402_5%@

1 2

R413 0_0402_5%R413 0_0402_5%

LAN_WP

GPIO2

1 2

R416 0_0402_5%@R416 0_0402_5%@

XTALI

XTALO

3

Layout Notice : Place as close chip as possible.

+3V_LAN

2

C698

1

10U_0805_10V4Z

U40U40

28

29

11

3

53

54

59

35

32

31

25

26

10

12

58

57

4

7

8

9

21

22

16

24

2

C699

C700

1

0.1U_0402_16V4Z

PCIE_REFCLK_N

PCIE_REFCLK_P

CLKREQ

LOW PWR

VMAIN_PRSNT

VAUX_PRSNT

ENERGY_DET

GPHY_PLLVDD

PCIE_RXD_N

PCIE_RXD_P

PCIE_TXD_N

PCIE_TXD_P

PERST

WAKE

SMB_CLK

SMB_DATA

GPIO_0(SERIAL_DO)

GPIO_1(SERIAL_DI)

GPIO_2

UART_MODE

XTALI

XTALO

REG_GND

PCIE_GND

SCLK(EECLK)

PCIE_PLLVDD

1

C701

C701 1U_0603_10V4Z

1U_0603_10V4Z

2

TRD0_N TRD0_P TRD1_N TRD1_P TRD2_N TRD2_P TRD3_N TRD3_P

LINKLED

SPD100LED SPD1000LED TRAFFICLED

SO(EEDATA)

REGCTL12 REGCTL25

RDAC

XTALVDD

VDDIO VDDIO VDDIO VDDIO VDDIO

VDDP VDDP

VDDC VDDC VDDC VDDC VDDC VDDC

BIASVDD

PCIE_VDD PCIE_VDD

AVDD AVDD AVDD

AVDDL AVDDL AVDDL AVDDL

GND

69

LAN_TX0-

41

LAN_TX0+

40

LAN_RX1-

42

LAN_RX1+

43 48

T109T109

47

T110T110

49

T107T107

50

T108T108

R405 0_0402_5%R405 0_0402_5%

2

1 2

R406 0_0402_5%R406 0_0402_5%

1 2

1

R407 0_0402_5%@R407 0_0402_5%@

67

1 2

66

LAN_CLK

65 63

SI

CS

4.7K_0402_5%

LAN_DATA

64 62

CTL12

14

CTL25

18 37

1 2

R409 1K_0402_5%R409 1K_0402_5%

23

+XTALVDD

6 15 19 56 61

17

+2.5V_LAN

68

5

+1.2V_LAN

13 20 34 55 60

+LAN_BIASVDD

36 30

+PCIE_PLLVDD

27

+PCIE_VDD

33

38

+LAN_AVDD

45 52

39

+AVDDL

44 46 51

12

R418

LAN_WP LAN_CLK LAN_DATA

LAN_TX0- (32) LAN_TX0+ (32) LAN_RX1- (32) LAN_RX1+ (32)

+3V_LAN

12

R419

4.7K_0402_5%

LAN_CLK

1 2

R420 4.7K_0402_5%R420 4.7K_0402_5%

2

1 2

C731

0.1U_0402_16V4Z

U41

8

VCC

7

WP

6

SCL

5

SDA

AT24C02_SO8

Layout Notice : 1.2V filter. Place as close chip as possible.

+1.2V_LAN

2

C702

C703

C704

1

0.1U_0402_16V4Z

CTL12

LINKLED# (32)

ACTIVITY# (32)

1

A0

2

A1

3

NC

4

GND

4.7U_0805_10V4Z

1

2

C705

1

0.1U_0402_16V4Z

1

Q14

CTL25

+2.5V_LAN

2

C707

C706

1

0.1U_0402_16V4Z

+3V_LAN

C715 0.1U_0402_16V4ZC715 0.1U_0402_16V4Z

MMJT9435T1G_SOT223

2 3

4

MBT35200MT1G_TSOP6

2

C708

1

0.1U_0402_16V4Z

1 2

+1.2V_LAN

1

C719

10U_0805_10V4Z

2

+3V_LAN

41

Q15

3

256

Notice : 4.7u 6.3V capactor Thic kness 1.25mm

Layout Notice : Filter place as close chip as possible.

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2007/10/15 2008/10/15

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

Date: Sheet of

2

Date: Sheet of

BCM5787MKML

KIWA5/6 LA-5081P

1

0.4

of

31 53Wednesday, March 18, 2009

5

4

3

2

1

+2.5V_LAN

EMI request

C732 0.1U_0402_16V4ZC732 0.1U_0402_16V4Z

1 2

D D

C733 0.1U_0402_16V4ZC733 0.1U_0402_16V4Z

1 2

C735 0.1U_0402_16V4Z

1 2

@

Change C468,C470,C473,C474,C475,C476 from 0.01uF to 0.1uF

C C

12

R422

R422 0_0402_5%

0_0402_5%

LAN_RX1+(31) LAN_RX1-(31)

LAN_TX0+(31)

LAN_TX0-(31)

LAN_RX1-

R426 49.9_0402_1%R 426 49.9_0402_1%

LAN_RX1+

R427 49.9_0402_1%R 427 49.9_0402_1%

LAN_TX0-

R429 49.9_0402_1%R429 49.9_0402_1%

LAN_TX0+

R430 49.9_0402_1%R430 49.9_0402_1%

U42

LAN_RX1+

LAN_RX1-

LAN_TX0+

12

TCT

LAN_TX0- MDO0-

C737

0.1U_0402_16V4Z

1 2

C739

0.1U_0402_16V4Z

1 2

U42

1

RD+

2

RD-

3

CT

4

NC

5

NC

6

CT

7

TD+ TD-8TX-

350uH_NS0013LF

RX+

TX+

+3V_LAN

220P_0402_50V7K

RX-

CT NC NC CT

MCT0

14 13 12

MCT1

11

MDO0+

10 9

R423 75_0402_5%R423 75_0402_5%

R424 75_0402_5%R424 75_0402_5%

12

RJ45_PR

MDO1+

16

MDO1-

15

220P_0402_50V7K

+3V_LAN

C736

220P_0402_50V7K

C734

ACTIVITY#(31)

2

1

LINKLED#(31)

1

2

RJ45 CONN

R421

330_0402_5%

12

MDO1-

MDO1+

MDO0-

MDO0+

R425

330_0402_5%

12

RJ45_PR

1 2

C738

1000P_1206_2KV7K

JRJ45

12

Amber LED-

11

Amber LED+

8

PR4-

7

PR4+

6

PR2-

5

PR3-

4

PR3+

3

PR2+

2

PR1-

1

PR1+

10

Green LED-

9

Green LED+

FOX_JM36113-P2221-7F

ME@

R428

R428 0_0402_5%

0_0402_5%

1 2

SHLD4

SHLD3

SHLD2

SHLD1

16

15

14

13

near LAN controller

B B

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2007/10/15 2008/10/15

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

LAN CONTROLLER

KIWA5/6 LA-5081P

32 53Wednesday, March 18, 2009

1

0.4

A

1 1

B

C

D

E

+5VS +3VS

1

C740

C740 1000P_0402_50V7K

1000P_0402_50V7K

2

1

C741

0.1U_0402_16V4Z

2

1

C742

C742 1U_0603_10V4Z

1U_0603_10V4Z

2

F

1

C743

C743 10U_0805_10V4Z

10U_0805_10V4Z

2

1

C744

C744 10U_0805_10V4Z

10U_0805_10V4Z

2

G

1

@

C745

0.1U_0402_16V4Z

2

H

SATA HDD Conn.

JP21

1

SATA_ITX_DRX_P0(27)

2 2

SATA_DTX_C_IRX_N0(27) SATA_DTX_C_IRX_P0(27)

3 3

SATA_DTX_C_IRX_N0 SATA_DTX_C_IRX_P0

SATA_ITX_DRX_N0(27)

C796 0.01U_0402_16V7KC796 0.01U_0402_16V7K

1 2

C797 0.01U_0402_16V7KC797 0.01U_0402_16V7K

1 2

SATA_ITX_DRX_P0 SATA_ITX_DRX_N0

SATA_DTX_IRX_N0 SATA_DTX_IRX_P0

+3VS

+5VS

GND

2

A+

3

A-

4

GND

5

B-

6

B+

7

GND

8

VCC3.3

9

VCC3.3

10

VCC3.3

11

GND

12

GND

13

GND

14

VCC5

15

VCC5

16

VCC5

17

GND

18

RESERVED

19

GND

20

VCC12

21

VCC12

22

VCC12

23

G1

24

G2

OCTEK_SAT-22SB1G_RV

ME@

SATA ODD Conn.

SATA_DTX_C_IRX_N1(27) SATA_DTX_C_IRX_P1(27)

SATA_ITX_DRX_P1(27)

SATA_DTX_C_IRX_N1 SATA_DTX_C_IRX_P1 SATA_DTX_IRX_P1

SATA_ITX_DRX_N1(27)

C746 0.01U_0402_16V7KC746 0.01U_0402_16V7K

1 2

C798 0.01U_0402_16V7KC798 0.01U_0402_16V7K

1 2

SATA_ITX_DRX_P1 SATA_ITX_DRX_N1

SATA_DTX_IRX_N1

+5VS

JP22

1 2 3 4 5 6 7

8

9 10 11 12 13

OCTEK_SLS-13SD1G_NR

ME@

GND A+ AGND BB+ GND

DP +5V +5V MD GND GND

GND GND

14 15

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

C

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

D

2007/10/15 2008/10/15

E

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

B

Date: Sheet of

F

Date: Sheet of

Compal Electronics, Inc.

HDD & ODD Connector

KIWA5/6 LA-5081P

G

0.4

33 53Wednesday, March 18, 2009

H

0.4

A

B

C

D

E

0308_Change R29 4 and R295 from 0 ohm to bead , C363 from 10u F to 680pF, C36 5 and C368 from 0.1uF to 680p

In order for the modem wake on ring feature to function, the CODEC must be powered by a rail that is not removed when the system is in standby.

R1031

1 2

1 1

+3VDD_CODEC

R1036

4.7K_0603_5%

@

1 2

R1043

3.9K_0603_1%

@

1 2

CX20548

2 2

AMOM DAA

3 3

+3VS

MBV2012301YZF_0805

MBV2012301YZF_0805 R1033

R1033

1 2

+3VALW

MBV2012301YZF_0805

@

R1036

0_0603_5%

PM@

HDA_RST_CODEC#(8,16,27)

HDA_BITCLK_CODEC(8,16,27)

HDA_SYNC_CODEC(8,16,27)

HDA_SDIN2(27) HDA_SDOUT_CODEC(8,16,27)

DIBP_HS DIBN_HS

11/20 update

PC_BEEP dB control

1 2

R1052 10K_0402_5%R1052 10K_0402_5%

1 2

R1053 10K_0402_5%R1053 10K_0402_5%

12

R1056

47_0402_5%

1

C1089

33P_0402_50V8K

0216_Change val ue.

2

1

2

C1068

680P_0402_50V7K

1

C1077

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z R1037 0_0402_5%

+1.5VS

R1049 0_0402_5%

R1049 0_0402_5% R1051 0_0402_5%

R1051 0_0402_5%

HDA_BITCLK_CODEC

R1037 0_0402_5%

R1042 33_0402_5%R1042 33_0402_5%

R1044 33_0402_5%R1044 33_0402_5% R1045 33_0402_5%R1045 33_0402_5% R1046 33_0402_5%R1046 33_0402_5% R1047 33_0402_5%R1047 33_0402_5%

@

@ 1 2 1 2

R3

@

100K_0402_5%

1

2

C1069

1U_0603_10V4Z

1

C1159 0.1U_0402_16V4Z

C1078

2

C1160 0.01U_0402_16V7K

10U_0805_10V4Z

GM@

1 2

1 2 1 2 1 2 1 2

DIBP_C DIBN_C

PC_BEEP

1 2

EAPD(36)

1

2

C1070

680P_0402_50V7K

12

DIGITAL ANALOG

C1092

1 2

0.1U_0402_16V4Z

C1094

1 2

0.1U_0402_16V4Z

C1095

1 2

0.1U_0402_16V4Z

C1097

1 2

0.1U_0402_16V4Z

R1063

1 2

0_0402_5%

R1064

1 2

0_0402_5%

4 4

Place these C and R around AGND and DGND, then choose the one which is close to Codec to populate

R1065

1 2

A

0_0402_5%

GNDAGND

AUDIO CODEC

1

2

C1072

0.1U_0402_16V4Z

C1071

0.1U_0402_16V4Z

C1071

0.1U_0402_16V4Z

@ C1072

@

9

U65

RESET#

6

BIT_CLK SYNC

8

SDATA_IN

5

SDATA_OUT

DIB_P DIB_N

PC_BEEP

S/PDIF

GPIO2 GPIO1 EAPD/GPIO0

1

DMIC_CLOCK

2

DMIC_1/2

BEEP#(36)

0.1U_0402_16V4Z@

SB_SPKR(28)

C1101

B

VDD_IO

11

10

43 42

12

48

45 46 47

For Layout:

Place decoupling caps nea r the power pins of SmartAMC device.

+3VAMP_CODEC+3VDD_CODEC

1

2

C1073

680P_0402_50V7K

4

3

26

36

40

44

AVEE

PORTA_L

AVDD_26

AVDD_40

DVDD_44

DVDD_1-8

DVDD_3-3

DVSS_7

7

41

C1098

1

2

1U_0603_10V4Z

PORTA_R

MICBIASB

PORTB_L

PORTB_R

MICBIASC

PORTC_L

PORTC_R

PORTD_L

PORTD_R

MIC_L

MIC_R

MONO STEREO_L STEREO_R

SENSEA

VREF

FLY_P

FLY_N

VREF_LO

VREF_HI RESERVED_32 RESERVED_33

AVSS_3838DVSS_41

AVSS_25

CX20561-12Z_LQFP48_7X7

25

R1061

12

1 2

560_0402_5%

1U_0603_10V4Z

C1102

R1066

12

1 2

560_0402_5%

10K_0402_5%

R1067

C1074

0.1U_0402_16V4Z

C1074

0.1U_0402_16V4Z

C1079

34 35

19 14 15

18 16 17

27 28

20 21

29 30 31

13

24

39 37

22 23 32 33

2

1 2

12

1

2

1

2

R44

0_0402_5%

@

B

R1030

MBV2012301YZF_0805

C1064 4.7U_0805_10V4ZC1064 4.7U_0805_10V4Z

R1032

12

MBV2012301YZF_0805

1

@

2

1U_0603_10V4Z

C1075

1

C1080

2

10U_0805_10V4Z

0.1U_0402_16V4Z

MIC_C_BIAS

MIC_EXTL MIC_EXTR

MIC_INL MIC_INR

SENSE

VC_REFA

VREF_HI VREF_LO

1 2

C1086 1U_0603_10V4ZC1086 1U_0603_10V4Z

1

2

1U_0603_10V4Z

C1091

C1090

+3VS

12

R1058

R1058 10K_0402_1%

10K_0402_1%

C1093

12

1U_0603_10V4Z

R1059

R1059 10K_0402_1%

10K_0402_1%

1

C

E

3

D44 RB751V_SOD323

RB751V_SOD323

2 1

PC_BEEP1 PC_BEEP

1 2

R1060 20K_0402_ 5%R1060 20K_0402_5%

Q46

Q46 2SC2411KT146_SOT23-3

2SC2411KT146_SOT23-3

@D44

@

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

+3VS

12

1 2

+VDDA_CODEC

C1082 2.2U_0603_6.3V4ZC 1082 2.2U_0603_6.3V4Z

1 2 1 2

C4 2.2U_0603_6.3V4ZC 4 2.2U_0603_6.3V4Z

C1084 2.2U_0603_6.3V4ZC 1084 2.2U_0603_6.3V4Z

1 2

For Vista

1

C1088

C1087

2

0.1U_0402_16V4Z

1

2

@

0.1U_0402_16V4Z

C1096 1U_0603 _10V4ZC1096 1U_0603_10V4Z

12

R1062

R1062 20K_0402_5%

20K_0402_5%

1 2

2007/10/15 2008/10/15

HP_OUTL (35) HP_OUTR (35)

LINE_OUTL (35) LINE_OUTR (35)

1

2

10U_0805_10V4Z

2.2kohm for MICL + MICR

4.7kohm for MICL or MICR

MIC_C_BIAS

R194.7K_0402_5% R194.7K_0402_5%

R10384.7K_0402_5% R10384.7K_0 402_5%

1 2

11/20 update

Compal Secret Data

Deciphered Date

R1048

100_0402_5%

R17 100_0402_5%R17 100_0402_5%

1 2

R1054 5.1K_0402_1%R1054 5.1K_0402_1%

1 2

R1055 5.1K_0402_1%R1055 5.1K_0402_1%

1 2

R1057 20K_0402_5%R 1057 20K_0 402_5%

MIC1

WM-64PCY_2P

45@

12 12

D

W=40Mil

1 2

+5VALW

@

1 2

C1065 0.1U_0402_16V4Z

SUSP#(30,36,42,47,48)

+3VAMP_CODEC

R1034

1K_0402_5%

1 2

R10414.7K_0402_5% R10414.7K_0402_5%

C1081

1 2

INT_MICL

GNDA

CODEC POWER

U64

1

VIN

OUT

2

GND

SHDN#3BP

APE8805A-33Y5P_SOT23-5

@

0.1U_0402_16V4Z

1

2

10U_0805_10V4Z

EXT_MIC_L (35) EXT_MIC_R (35)

Internal MIC / Array MIC

Internal WOOFER

Internal SPKR.

+3VAMP_CODEC

PLUG_IN (35)

MIC_JD (35)

port A : 5.11K ohm port B : 10.0K ohm port C : 20.0K ohm port D : 39.2K ohm

12

1

C1158

C1158 47P_0402_50V8J

47P_0402_50V8J

2

GNDA

R10770_0603_5% R10770_0603_5%

Title

Size Document Number Rev

Custom

Date: Sheet of

+VDDA_CODEC

5

1

C1066

@ C1066

@

0.1U_0402_16V4Z

4

2 1 @

@

C1076

2

external MIC

Port A

Port C

INT_MICL

Compal Electronics, Inc.

CX20561-AMOM Codec

KIWA5/6 LA-5081P

E

(3.33V) 250mW

1

C1067

@ C1067

@

4.7U_0805_10V4Z

2

34 53Wednesday, March 18, 2009

0.4

Speaker Connector

5

4

3

2

1

+5VAMP+5VS

+3VALW

W=40mil

R33

12

R320_060 3_5% R320_0 603_5%

C568

D D

LINE_OUTL(34)

LINE_OUTR(34)

C C

SPK_R1SPK_R2+ SPK_L1SPK_L2+

20MIL

LINE_OUTL

LINE_OUTR

12

R410_0603_5 % R410_ 0603_5%

12

R420_0603_5 % R420_ 0603_5%

12

R480_0603_5 % R480_ 0603_5%

12

R490_0603_5 % R490_ 0603_5%

0.1U_040 2_16V4Z

R_SPK_R 1R_SPK_R 2+ R_SPK_L 1R_SPK_L 2+

C568

1 2

ACES_85 204-0400N

Near JP14

1

C569

4.7U_080 5_10V4Z

2

GAIN0

GAIN1

C5700 .033U_0402_16 V7K C5700.033U _0402_16V7K

C5710 .033U_0402_16 V7K C5710.033U _0402_16V7K

@

12

R38

R37

10K_0402_5%

@

4

3

2

1

JP23

ME@

LIN

RIN

1

10K_0402_5%

C572

0.1U_040 2_16V4Z

2

1

2

U45

16

VDD

6

PVDD

15

PVDD

2

GAIN0

3

GAIN1

5

LIN-

17

RIN-

9

LIN+

7

RIN+

C574

0.1U_040 2_16V4Z

R_SPK_R 1-

R_SPK_R 2+

R_SPK_L 1-

R_SPK_L 2+

SHUTDOWN

BYPASS

APA2031 RI-TRL_TSSOP20

D8

2

3

PJDLC05 _SOT23-3@D8PJDLC05 _SOT23-3@

D9

2

3

PJDLC05 _SOT23-3@D9PJDLC05 _SOT23-3@

10K_040 2_5%

NC

LOUT-

ROUT-

LOUT+

ROUT+

GND GND GND GND GND

R33

@

1 2

12

AMP_OFF # EC_MUTE#

19

8

14

4

18

1 11 13 20 21

10

1

SPK_L1-

SPK_R1-

SPK_L2+

SPK_R2+

R34

1 2

1

C573

4.7U_080 5_10V4Z

2

0_0402_ 5%

20mil

EC_MUTE # (36)

GAIN0 GAIN1 0 0 6dB 0 1 10dB 1 0 15.6dB 1 1 21.6dB

+5VAMP +5VAMP

R35

@ R35

@

100K_04 02_1%

1 2

R39

100K_04 02_1%

1 2

100K_04 02_1%

1 2

100K_04 02_1%

1 2

R36

R40

GAIN1GAIN0

@

Audio Jack

SM01001 8110

220P_04 02_50V7K

12

R51

@R 51

GNDA

@

1K_0402 _5%

GNDA

SM01001 8110

1 2

R55 S SUPP RE_ KC FBMA-L10-1 60808-800LMT 0 603

SM01001 8110

1 2

R54 S SUPP RE_ KC FBMA-L10-1 60808-800LMT 0 603

R52

@R 52

@

1K_0402 _5%

B B

HP_OUTL(34)

HP_OUTR(34)

PLUG_IN(34)

HP_OUTL

HP_OUTR

PLUG_IN

1 2

GNDA

PL-OUT

PR-OUT

C576

220P_04 02_50V7K

C575

1 2

Headphone

JHP1

1 2 6 3

4

5

FOX_JA6 333L-B3S0-7F

ME@

EXT_MIC_L(34)

EXT_MIC_R(34)

MIC_JD(34)

EXT_MIC_L

EXT_MIC_R

MIC_JD

SM01001 8110

1 2

R50 S SUPP RE_ KC FBMA-L10-1 60808-800LMT 0 603

1

C577

47P_040 2_50V8J

2

GNDA

SM01001 8110

1 2

R53 S SUPPRE _ KC FBMA-L10-160 808-800LMT 060 3

1

C579

47P_040 2_50V8J

2

GNDA

1

C578

@C 578

@

10P_040 2_50V8J

2

GNDA

EXT_MIC_R -2

1

C580

10P_040 2_50V8J

2

@

GNDA

1

2

GNDA

C58110P_040 2_50V8J@C58110P_040 2_50V8J

@

EXT_MIC_L -2

Audio Jack

MIC IN

JMIC1

1 2 6 3

4

GNDA

5

FOX_JA6 333L-B3S0-7F

ME@

A A

Security Class ification

2008/03/ 25 2008/04/

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2008/03/ 25 2008/04/

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

AMP,Audio speaker CONN

Size Document Nu mber Rev

Custom

Date: Sheet of

2

Date: Sheet of

KIWA5/6 LA-5081P

1

35 53Wednesd ay, March 18, 20 09

0.4

L21

+3VALW +EC_AVCC

+3VALW

47K_0402_5%

LAN_WAKE#(31)

PCI_PME#(26)

+3VALW

+5VALW

+3VS

12

1

2

1 2

FBM-11-160808-601-T_0603

0.1U_0402_16V4Z

1 2

L22 FBM-11-160808-601-T_0603L22 FBM-11-160808-601-T_0603

12

C525 22P_0402_50V 8J@C525 2 2P_0402_50V8J@

1 2

R57 47K_0402_5%R57 47K_0402_5%

0.1U_0402_16V4Z

+3VALW

12

R931

1 2

R70 0_0402_5%R70 0_0402_5%

1 2

R71 0_0402_5%@R71 0_0402_5%@

S

+3VALW

1 2

R74 100K_0402_1%@R74 100K_04 02_1%@

1 2

R75 100K_0402_1%@R75 100K_04 02_1%@

1 2

R77 10K_0402_5%@R77 10K_0402 _5%@

1 2

R78 4.7K_0402_5%R78 4.7K_0402_5%

1 2

R219 4.7K_0402_5%R219 4.7K_0402_5%

R222

2.7K_0402_5%

@

C533

C533 100P_0402_50V8J

100P_0402_50V8J

FRD#SPI_SO

FSEL#SPICS#

KSO17

EC_SMB_CK1

EC_SMB_DA1

12

R223

2.7K_0402_5%

EC_SMB_CK2 EC_SMB_DA2

1

@

C534

C534 100P_0402_50V8J

100P_0402_50V8J

2

C521

KB_RST#(27)

C524

R932

R932 47K_0402_5%

47K_0402_5%

KSO1

KSO2

G

2N7002_SOT23

2

1

2

ECAGND

RB751V_SOD323

2

1

+3VALW

1 2

D

13

Q17

@

Q17

@

32.768KHZ_12.5PF_1TJS125BJ4A421P

C522

1000P_0402_50V7K

1 2

R56 0_0402_5%R56 0_0402_5%

D38

2 1

@

12

10_0402_5%@

R58

KSO[0..15](38)

KSI[0..7](38)

R69

R69 10K_0402_5%

10K_0402_5%

EC_PME#

+3VALW

1 2

R76 100K_0402_1%

+3VS

1 2

R218 2.2K_0402_5%

ENE@

1 2

R220 2.2K_0402_5%

ENE@

3

2

C516

0.1U_0402_16V4Z

C516

0.1U_0402_16V4Z

1

2

GATEA20(27)

SERIRQ(28,38)

LPC_FRAME#(27,38)

LPC_AD3(27,38) LPC_AD2(27,38) LPC_AD1(27,38) LPC_AD0(27,38)

CLK_PCI_LPC(22)

PCI_RST#(26,38)

EC_SCI#(28)

KSO[0..15]

KSI[0..7]

EC_SMB_CK1(44) EC_SMB_DA1(44)

EC_SMB_CK2(5,16) EC_SMB_DA2(5,16)

SLP_S3#(28) SLP_S5#(28)

EC_SMI#(28)

LID_SW#(41)

KILL_SW#(41)

FAN_SPEED1(5)

EC_TX_P80_DATA(30,38) EC_RX_P80_CLK(30,38)

ON/OFF#(41)

PWR_LED_SC#(39)

LID_SW#

@

ESB_CK_R

ESB_DA_R

12

C532 15P_0402_50V8JC532 15P_0402_50V8J

X1

4

OUT

NC

1

IN

NC

12

C535 15P_0402_50V8JC535 15P_0402_50V8J

C517

0.1U_0402_16V4Z

C517

0.1U_0402_16V4Z

+3VALW

C519

0.1U_0402_16V4Z

C519

0.1U_0402_16V4Z

C518

0.1U_0402_16V4Z

C518

0.1U_0402_16V4Z

1

2

KSI0 KSI1 KSI2 KSI3 KSI4 KSI5 KSI6 KSI7 KSO0 KSO1 KSO2 KSO3 KSO4 KSO5 KSO6 KSO7 KSO8 KSO9 KSO10 KSO11 KSO12 KSO13 KSO14 KSO15

EC_SMI# LID_SW# ESB_CK_R ESB_DA_R

FAN_SPEED1

EC_TX_P80_DATA EC_RX_P80_CLK

NUM_LED#

XCLKI XCLKO

1

2

KB_RST#_EC

LPC_AD3 LPC_AD2 LPC_AD1 BATT_TEMP LPC_AD0

EC_RST# EC_SCI#

KSO16 KSO17

EC_SMB_CK1 EC_SMB_DA1 EC_SMB_CK2 EC_SMB_DA2

10

12 13 37 20 38

55 56 57 58 59 60 61 62 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 81 82

77 78 79 80

14 15 16 17 18 19 25 28 29 30 31 32 34 36

122 123

C523

1000P_0402_50V7K

C523

1000P_0402_50V7K

C520

1000P_0402_50V7K

C520

1000P_0402_50V7K

1 2 3 4 5 7 8

6

KB926QFA1_LQFP128

1

2

U46

GA20/GPIO00 KBRST#/GPIO01 SERIRQ# LFRAME# LAD3 LAD2 LAD1

LPC & MISC

LAD0

PCICLK PCIRST#/GPIO05 ECRST# SCI#/GPIO0E CLKRUN#/GPIO1D

KSI0/GPIO30 KSI1/GPIO31 KSI2/GPIO32 KSI3/GPIO33 KSI4/GPIO34 KSI5/GPIO35 KSI6/GPIO36 KSI7/GPIO37 KSO0/GPIO20 KSO1/GPIO21 KSO2/GPIO22 KSO3/GPIO23 KSO4/GPIO24

Int. K/B

KSO5/GPIO25

Matrix

KSO6/GPIO26 KSO7/GPIO27 KSO8/GPIO28 KSO9/GPIO29 KSO10/GPIO2A KSO11/GPIO2B KSO12/GPIO2C KSO13/GPIO2D KSO14/GPIO2E KSO15/GPIO2F KSO16/GPIO48 KSO17/GPIO49

SCL1/GPIO44 SDA1/GPIO45 SCL2/GPIO46 SDA2/GPIO47

PM_SLP_S3#/GPIO04 PM_SLP_S5#/GPIO07 EC_SMI#/GPIO08 LID_SW#/GPIO0A SUSP#/GPIO0B PBTN_OUT#/GPIO0C EC_PME#/GPIO0D EC_THERM#/GPIO11 FAN_SPEED1/FANFB1/GPIO14 FANFB2/GPIO15 EC_TX/GPIO16 EC_RX/GPIO17 ON_OFF/GPIO18 PWR_LED#/GPIO19 NUMLED#/GPIO1A

XCLK1 XCLK0

SM Bus

+EC_AVCC

9

22

33

96

111

125

VCC

PWM Output

AD Input

DA Output

PS2 Interface

SPI Device Interface

SPI Flash ROM

GPIO

GPO

GPIO

GPI

GND

11

24

35

94

113

67

AVCC

INVT_PWM/PWM 1/GPIO0F

BEEP#/PWM2/GPIO10

FANPWM1/GPIO12

ACOFF/FANPWM2/GPIO13

BATT_TEMP/AD0/GPIO38

BATT_OVP/AD1/GPIO39

ADP_I/AD2/GPIO3A

AD3/GPIO3B AD4/GPIO42

SELIO2#/AD5/GPIO43

DAC_BRIG/DA0/GPIO3C

EN_DFAN1/DA1/GPIO3D

IREF/DA2/GPIO3E

DA3/GPIO3F

PSCLK1/GPIO4A PSDAT1/GPIO4B PSCLK2/GPIO4C

PSDAT2/GPIO4D

TP_CLK/PSCLK3/GPIO4E

TP_DATA/PSDAT3/GPIO4F

SDICS#/GPXOA00 SDICLK/GPXOA01

SDIDO/GPXOA02

SDIDI/GPXID0

SPIDI/RD#

SPIDO/WR#

SPICLK/GPIO58

SPICS#

CIR_RX/GPIO40

CIR_RLC_TX/GPIO41

FSTCHG/SELIO#/GPIO50

BATT_CHGI_LED#/GPIO52

CAPS_LED#/GPIO53

BATT_LOW_LED#/GPIO54

SUSP_LED#/GPIO55

SYSON/GPIO56

VR_ON/XCLK32K/GPIO57

AC_IN/GPIO59

EC_RSMRST#/GPXO03 EC_LID_OUT#/GPXO04

EC_ON/GPXO05

EC_SWI#/GPXO06

ICH_PWROK/GPXO06

BKOFF#/GPXO08

WL_OFF#/GPXO09

GPXO10 GPXO11

PM_SLP_S4#/GPXID1

ENBKL/GPXID2

GPXID3 GPXID4 GPXID5 GPXID6 GPXID7

V18R

AGND

69

D3 version SA00001J580

ECAGND

SPI_CLK

12

R221

R221 0_0402_5%

0_0402_5%

1

C531

10P_0402_50V8J

2

XCLKO

12

@

R224

R224 20M_0603_5%

20M_0603_5%

XCLKI

For SED Team

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

INVT_PWM

21

BEEP#

23 26

ACOFF

27

63

BATT_OVP

64 65

CPUSB#

66 75

TSATN#_EC

76

DAC_BRIG

68

EN_FAN1

70

IREF

71 72

83

USB_ON

84 85 86

TP_CLK

87

TP_DATA

88

97 98 99 109

FRD#SPI_SO

119

FWR#SPI_SI

120

SPI_CLK

126

FSEL#SPICS#

128

73

I2C_INT

74 89

CHARGE_LED0#

90

CAPS_LED#

91

CHARGE_LED1#

92 93

SYSON

95 121

ACIN

127

EC_RSMRST#

100

EC_LID_OUT#

101

EC_ON

102 103

ICH_POK_EC ICH_POK

104

BKOFF#

105 106 107 108

110 112 114

EC_THERM#

115

SUSP#

116

PBTN_OUT#

117 118

124

1

C529

C529 1U_0603_10V4Z

1U_0603_10V4Z

2

2007/10/15 2008/10/15

INVT_PWM (24) BEEP# (34) NOVO# (41) ACOFF (45)

BATT_TEMPA (44)

BATT_OVP (45) ADP_I (45)

CPUSB# (28,30)

R59 0_0603_5%@R59 0_0603_5%@

1 2

DAC_BRIG (24) EN_FAN1 (5) IREF (45) CHGVADJ (45)

EC_MUTE#

EC_MUTE# (35)

USB_ON (40)

TP_CLK (38)

TP_DATA (38)

EN_WOL (31) BATT_SEL_EC (45) CMOS_OFF# (40)

FRD#SPI_SO (39)

FWR#SPI_SI (39)

FSEL#SPICS# (39)

I2C_INT (41)

FSTCHG (45)

CHARGE_LED0# (39)

CHARGE_LED1# (39)

SYSON (30,42,47) VR_ON (49) ACIN (28,43,45)

EC_RSMRST# (28) EC_LID_OUT# (28) EC_ON (41)

BKOFF# (24) WL_OFF# (30) DDR3_SM_PWROK (8)

SLP_S4# (28)

ENBKL (24)

EAPD (34)

EC_THERM# (28)

SUSP# (30,34,42,47,48) PBTN_OUT# (28) BT_OFF# (40)

SUSP#

1

@

C530

1000P_0402_50V7K

2

Compal Secret Data

R65 10K_0402_5%@R65 10K_0402_5%@

R67 4.7K_0402_5%@R67 4.7K_0402_5%@

1 2

SPI_CLK (39)

D39 RB751V_S OD323D3 9 RB 751V_SOD323

1

C927

C927 1U_0603_10V4Z

1U_0603_10V4Z

2

@

Deciphered Date

1 2

USB_ON

I2C_INT

21

1 2

R72 0_0402_5 %

@

TSATN# (8)

+3VALW

R66 10K_0402_5%@R66 10K_0402_5%@

1 2

+3VS

12

R68

R68 10K_0402_5%

10K_0402_5%

1 2

R73 4.7K_0402_5%R73 4.7K_0402_5%

CAPS_LED#

KB926 SPI STRAP PIN

+3VALW

12

EC_RSMRST#

ICH_POK (8,28)

+3VS

1 2

R1090 0_0402_5%

ENE@

1 2

R1091 0_0402_5%

NOSB@

ESB_DA_R

1 2

R1092 0_0402_5%

ENE@

NUM_LED#

ENE@

1 2

R1093 0_0402_5%

NOSB@

Title

Size Document Number Rev

Custom

Date: Sheet of

TP_CLK

R61 4.7K_0402_5%R61 4.7K_0402_5%

TP_DATA

BATT_OVP

BATT_TEMP

ACIN

R21

R21 10K_0402_5%

10K_0402_5%

@

ESB_CKESB_CK_R

ESB_DA

Compal Electronics, Inc.

1 2

R62 4.7K_0402_5%R62 4.7K_0402_5%

1 2

C526 100P_0402_50V8JC526 100P_0402_50V8J

1 2

C527 100P_0402_50V8JC527 100P_0402_50V8J

1 2

C528 100P_0402_50V8JC528 100P_0402_50V8J

ESB_CK (41)

ESB_DA (41)

BIOS & EC I/O Port

KIWA5/6 LA-5081P

+5VS

0.4

36 53Wednesday, March 18, 2009

0.4

5

D D

4

3

2

1

+VCC_3IN1

CARD@

C506

+3VALW

0.1U_0402_16V4Z

Trace width:20mil

1

C507

CARD@

+3VALW

0.1U_0402_16V4Z

+3VALW

0.1U_0402_16V4Z

1

C512

C C

C511

C511 10U_0805_6.3V6M

10U_0805_6.3V6M

2

CARD@

12

CARD@

C512

CARD@

2

R252

R252 0_0402_5%

0_0402_5%

2

Trace width:20mil

1

C509

CARD@

2

Trace width:20mil

1

C600

C600 47P_0402_50V8J

47P_0402_50V8J

2

@

close to U47

CLK_48M_CR

12

R928

22.1_0402_1%

CARD@

B B

RTS5159 application notes V1.0 2008/09/30 by Ryan Chen

CARD@

2

C601

10P_0402_50V8J

1

CARD@

C506

12

0.1U_0402_16V4Z

CLK_48M_CR(22)

CLK_48M_CR

USB20_N7(28) USB20_P7( 28)

6.19K_0402_1%

CARD@

Trace width:20mil

T3T3

T2T2

RST# MODE SEL

USB20_N7 USB20_P7

R229

1 2

C508 0.1U_0402_16V4Z

1 2

CARD@

U47

1

AV_PLL

3

NC

7

NC

9

CARD_3V3

11

D3V3

33

D3V3

8

3V3_IN

44

RST#

45

MODE_SEL

47

XTLO

48

XTLI

4

DM

5

DP

14

GPIO0

2

RREF

12

DGND

32

DGND

6

AGND

46

AGND

RTS5159-GR_LQFP48_7X7

CARD@

VREG

MS_D4

XD_CLE_SP19 XD_CE#_SP18 XD_ALE_SP17

SD_DAT2/XD_RE#_SP16

SD_DAT3/XD_WE#_SP15

SD_DAT4/XD_WP#/MS_D7_SP13

XD_RDY_SP14

SD_DAT5/XD_D0/MS_D6_SP12 SD_CLK/XD_D1/MS_CLK_SP11 SD_DAT6/XD_D7/MS_D3_SP10

MS_INS#_SP9 SD_DAT7/XD_D2/MS_D2_SP8 SD_DAT0/XD_D6/MS_D0_SP7 SD_DAT1/XD_D3/MS_D1_SP6

XD_D5_SP5

XD_D4/SD_DAT1_SP4

SD_CD#_SP3 SD_WP_SP2 XD_CD#_SP1

EEDI

XTAL_CTR

MS_D5

EEDO EECS EESK

SD_CMD

+3VALW

C513

CARD@

1U_0603_10V4Z~D

10 22 30

NC

43 42 41 40 39 38 37

SD_DATA5_XD_DATA0_MS_DATA6

35 34

SD_DATA6_XD_DATA7_MS_DATA3

31 29

SD_DATA7_XD_DATA2_MS_DATA2

28

SD_DATA0_XD_DATA6_MS_DATA0

27 26 25 23 21 20 19 18

13 24

15 16 17 36

12

R226

CARD@

100K_0402_5%

12

1

2

C510

1 2

1U_0603_10V4Z

XD_CLE XD_CE#

XD_ALE SD_DATA2_XD_RE# SD_DATA3_XD_WE#

SD_DATA4_XD_WP#_MS_DATA7

R96

R930

R930 510K_0402_1%

510K_0402_1%

@

XD_RDY

MS_INS#

XD_DATA3_MS_DATA1

XD_DATA5_MS_BS

XD_DATA4_SD_DATA1

SD_CD#

SD_WP

XD_CD#

1 2

0_0402_5%

20mil

CARD@

SD_CMD

RST#

+3VALW

R227

close to connector (JP34)

CARD@

1 2

22_0402_5%

R228

1 2

22_0402_5%

CARD@

@

C606

10P_0402_50V8J

Card reader(XD/SD/MMC/MS/MS-Pro HD SD)

11/04 new added

SD_DATA5_XD_DATA0_MS_DATA6 SD_CLK_XD_DATA1_MS_CLK SD_DATA7_XD_DATA2_MS_DATA2 XD_DATA3_MS_DATA1 XD_DATA4_SD_DATA1 XD_DATA5_MS_BS SD_DATA0_XD_DATA6_MS_DATA0 SD_DATA6_XD_DATA7_MS_DATA3

SD_DATA3_XD_WE# SD_DATA4_XD_WP#_MS_DATA7 XD_ALE XD_CD# XD_RDY SD_DATA2_XD_RE# XD_CE#

MS_CLKSD_CLK_XD_DATA1_MS_CLK

SD_CLK

2

@

C607

1

C607

10P_0402_50V8J

1

XD_CLE

C926

@

12

10U_0805_6.3V6M

+VCC_3IN1

Trace width:20mil

3

32 10

9 8 7 6 5 4

34 33 35 40 39 38 37 36

11 31

41 42

0.1U_0402_16V4Z

1

C514

CARD@

2

7 in 1 Card Reader

JP34

XD-VCC

XD-D0

7 IN 1 CONN

XD-D1 XD-D2 XD-D3 XD-D4 XD-D5 XD-D6 XD-D7

XD-WE XD-WP XD-ALE XD-CD XD-R/B XD-RE XD-CE XD-CLE

7IN1 GND 7IN1 GND

TAITW_R015-B10-LM_NR

ME@

SD-VCC MS-VCC

SD_CLK SD-DAT0 SD-DAT1 SD-DAT2 SD-DAT3 SD-DAT4 SD-DAT5 SD-DAT6 SD-DAT7

SD-CMD

SD-CD-SW

SD-WP-SW

MS-SCLK MS-DATA0 MS-DATA1 MS-DATA2 MS-DATA3

MS-INS

MS-BS

1 2

100K_0402_1%

21 28

20 14 12 30 29 27 23 18 16 25 1

2

26 17 15 19 24 22 13

100K_0402_1%

SD_DATA0_XD_DATA6_MS_DATA0

XD_DATA4_SD_DATA1

SD_DATA2_XD_RE#

SD_DATA3_XD_WE#

SD_DATA4_XD_WP#_MS_DATA7 SD_DATA5_XD_DATA0_MS_DATA6 SD_DATA6_XD_DATA7_MS_DATA3 SD_DATA7_XD_DATA2_MS_DATA2

SD_DATA0_XD_DATA6_MS_DATA0

XD_DATA3_MS_DATA1 SD_DATA7_XD_DATA2_MS_DATA2 SD_DATA6_XD_DATA7_MS_DATA3

XD_DATA5_MS_BS

0.1U_0402_16V4Z

1

C515

CARD@

2

R929

@

SD_CLK

SD_CMD

SD_CD#

SD_WP

MS_CLK

MS_INS#

R252 C600 USB Auto De-link(*1) MS Formatter(*2) Description

0 NC

NC

47pF

NC

680pF

10K

180pF

10K

A A

680pF

Yes

Recommended

Compatible with RTS5158E

LED ON (*3)

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2008/06/10 2008/12/31

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

USB_CR board

KIWAX_LA-5082P

1

37 53Wednesday, March 18, 2009

0.4

5

4

3

2

1

Source:SP01000IE00 2nd source:SP01000IF00 30 pin

INT_KBD Conn.

KSI[0..7]

D D

C C

KSO[0..15]

KSO2

C478 1 00P_0402_50V 8J@C4 78 100P_0402 _50V8J@

KSO15

C480 1 00P_0402_50V 8J@C4 80 100P_0402 _50V8J@

KSO6

C481 1 00P_0402_50V 8J@C4 81 100P_0402 _50V8J@

KSO8

C483 1 00P_0402_50V 8J@C4 83 100P_0402 _50V8J@

KSO13

C485 1 00P_0402_50V 8J@C4 85 100P_0402 _50V8J@

KSO12

C487 1 00P_0402_50V 8J@C4 87 100P_0402 _50V8J@

KSO11

C489 1 00P_0402_50V 8J@C4 89 100P_0402 _50V8J@

KSO10

C491 1 00P_0402_50V 8J@C4 91 100P_0402 _50V8J@

KSO3

C493 1 00P_0402_50V 8J@C4 93 100P_0402 _50V8J@

KSO4

C495 1 00P_0402_50V 8J@C4 95 100P_0402 _50V8J@

KSI0

C497 1 00P_0402_50V 8J@C4 97 100P_0402 _50V8J@

KSO0

C499 1 00P_0402_50V 8J@C4 99 100P_0402 _50V8J@

CONN PIN define need double check

1 2

KSI[0..7] (36)

KSO[0..15] (36)

KSO1

KSO7

KSI2

KSO5

KSI3

KSO14

KSI7

KSI6

KSI5

KSI4

KSO9

KSI1

C479 1 00P_0402_50V 8J@C4 79 100P_0402 _50V8J@

1 2

C477 1 00P_0402_50V 8J@C4 77 100P_0402 _50V8J@

1 2

C482 1 00P_0402_50V 8J@C4 82 100P_0402 _50V8J@

1 2

C484 1 00P_0402_50V 8J@C4 84 100P_0402 _50V8J@

1 2

C486 1 00P_0402_50V 8J@C4 86 100P_0402 _50V8J@

1 2

C488 1 00P_0402_50V 8J@C4 88 100P_0402 _50V8J@

1 2

C490 1 00P_0402_50V 8J@C4 90 100P_0402 _50V8J@

1 2

C492 1 00P_0402_50V 8J@C4 92 100P_0402 _50V8J@

1 2

C494 1 00P_0402_50V 8J@C4 94 100P_0402 _50V8J@

1 2

C496 1 00P_0402_50V 8J@C4 96 100P_0402 _50V8J@

1 2

C498 1 00P_0402_50V 8J@C4 98 100P_0402 _50V8J@

1 2

C500 1 00P_0402_50V 8J@C5 00 100P_0402 _50V8J@

1 2

SW/L

FOR LPC SIO DEBUG PORT

JP28

1

2

3

4

5

6

7

8

9

10

11

12

13

B B

13

14

15

16

17

18

19

20

ACES_85 201-2005

ME@

+5VS

LPC_AD0 LPC_AD1 LPC_AD2 LPC_AD3 LPC_FRA ME# LPC_DRQ 0# PCI_RST#

CLK_PCI_D B SERIRQ

+3VS

CLK_14M _SIO (22) LPC_AD0 (27 ,36) LPC_AD1 (27 ,36) LPC_AD2 (27 ,36) LPC_AD3 (27 ,36)

LPC_FRA ME# (27,36) LPC_DRQ 0# (27) PCI_RST# (26,36)

CLK_PCI_D B (22)

SERIRQ (28,36)

R232 10K_040 2_5%

12

@

SW/R

KSI1 KSI7 KSI6 KSO9 KSI4 KSI5 KSO0 KSI2 KSI3 KSO5 KSO1 KSI0 KSO2 KSO4 KSO7 KSO8 KSO6 KSO3 KSO12 KSO13 KSO14 KSO11 KSO10 KSO15

1 2 3 4 5 6 7 8

9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24

6

2

1

SW1

SW1 EVQPLHA 15_4P

EVQPLHA 15_4P

6

2

1

SW2

SW2 EVQPLHA 15_4P

EVQPLHA 15_4P

JP26

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24

26

GND2

25

GND1

E-T_6905 -E24N-01R

ME@

5

4

3

5

4

3

TP_CLK(36) TP_DATA(36)

EC_TX_P 80_DATA(3 0,36) EC_RX_P 80_CLK(3 0,36)

+5VS

C503

0.1U_040 2_16V4Z

TP_CLK

EC DEBUG PORT

+3VALW

EC_TX_P 80_DATA EC_RX_P 80_CLK

TP_CLK TP_DATA SW/L SW/R

TP_DATA

C501 1 00P_0402_50V 8J@C5 01 100P_0402 _50V8J@

C502 1 00P_0402_50V 8J@C5 02 100P_0402 _50V8J@

2

3

1

1 2

TP_DATA

D40

D40 PJDLC05 _SOT23-3

PJDLC05 _SOT23-3

@

TP_CLK

1 2 3 4

ACES_85 205-0400

JP27

1

2

3

4

5

6

7

GND

8

GND

ACES_85 201-06051

ME@

JP25

1 2 3 4

ME@

A A

Security Class ification

2007/10/ 15 2008/10/ 15

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2007/10/ 15 2008/10/ 15

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Nu mber Rev

B

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

KB /SW /LPC Debug Conn.

KIWA5/6 LA-5081P

38 53Wednesday, March 18, 2009

1

0.4

FOR EC 16M SPI ROM

INPUT

A B

L L

H L

L H

H H

+3VALW

1

C504

0.1U_0402_16V4Z

2

FRD#SPI_SO(36)

FRD#SPI_SO SPI_SO

R234 15_0402_5%R234 15_0402_5%

1 2

OUTPUT Y

L

INT_SPI_CS#

H

INT_SPI_CS#

R239 15_0402_5%R239 15_0402_5%

1 2

MC74VHC1G32DFT2G_SC70-5

OR Gate

20mils

10K_0402_5%

U48

1

CS#

2

SO

3

WP#

4

GND

MX25L1605AM2C-12G_SO8

10K_0402_5%

VCC

HOLD#

SCLK

SI

+3VALW

5

U49

P

INB

4

O

INA

G

3

R233

1 2 8 7 6 5

INT_FLASH_EN#

1

2

R235 15_0402_5%R235 15_0402_5%

SPI_SI FWR#SPI_SI

FSEL#SPICS#

1 2

R236 15_0402_5%R236 15_0402_5%

1 2

R238

100K_0402_5%

R238

1 2

FSEL#SPICS# (36)

SPI_CLKSPI_CLK_R

SPI_CLK (36)

FWR#SPI_SI (36)

SPI_CLK_R

R237

33_0402_5%

C505

22P_0402_50V8J

12

1

2

H

FSEL#SPICS#

SB_INT_FLASH_SEL(28)

+5VS

+5VALW

SPI_SO

1 2

R240 22_0402_5%@ R240 22_0402_5%@

+3VALW

JP29

2

112 334 556 778

E&T_2941-G08N-00E~DME@

4 6 8

INT_FLASH_EN#

SPI_CLK_R

SPI_SI

LED Green

1

FD1FD1

H1 HOLEAH1HOLEA

1

FD2FD2

H2 HOLEAH2HOLEA

1

FD3FD3

H3 HOLEAH3HOLEA

1

FD4FD4

1

H4 HOLEAH4HOLEA

1

+3VALW

LED2

1 2

R241 300_0402_5%R241 300_0402_5%

S LED 19-215SUBC/S280/TR8 0603 BLUE

1 2

R242 470_0402_5%R242 470_0402_5%

1 2

R243 470_0402_5%R243 470_0402_5%

R244

1 2

300_0402_5%

R245

1 2

499_0402_1%

LED2

2 1

LED3

2 1

S LED 19-215SUBC/S280/TR8 0603 BLUE

LED4

2 1

S LED 19-215SUBC/S280/TR8 0603 BLUE

S LED 19-215SUBC/S280/TR8 0603 BLUE LED5

LED5

2 1

S LED 19-215SUBC/S280/TR8 0603 BLUE

LED6

S LED 19-217/S2C-FM2P1VY/3T 0603 ORANGE

R22 0_0402_5%

R25 0_0402_5%WLAN@R25 0 _0402_5%WLAN@

Blue

Amber

12

BT@

1 2

CHARGE_LED0#

BT_LED# (40)

WLAN_LED# (30)

DRIVE_LED# (27)

PWR_LED_SC# (36)

CHARGE_LED0# (36)

7.3mA

CHARGE_LED1#

6mA

CHARGE_LED1# (36)

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTR ONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2007/10/15 2008/10/15

Compal Secret Data

Deciphered Date

H5 HOLEAH5HOLEA

1

H11

H11 HOLEA

HOLEA

1

H23

H23 HOLEA

HOLEA

1

H6 HOLEAH6HOLEA

1

H13

H12

HOLEA

1

H20

H21

HOLEA

1

Title

Size Document Number Rev

B

Date: Sheet of

H7 HOLEAH7HOLEA

1

H15

H14

HOLEA

1

H19

H19 HOLEA

HOLEA

1

Compal Electronics, Inc.

LED/EC SPI ROM

H8 HOLEAH8HOLEA

1

H16

H16 HOLEA

HOLEA

1

H9 HOLEAH9HOLEA

1

H17

H17 HOLEA

HOLEA

1

KIWA5/6 LA-5081P

39 53Wednesday, March 18, 2009

H10

H10 HOLEA

HOLEA

1

0.4

A

+5VALW

U50

1

GND

C440 0.1U_0402_16V4ZC440 0.1U_0402_16V4Z

1 1

USB20_P0

USB20_N0

12

USB_ON(36)

2

3

D6

PJDLC05_SOT23-3

@

USB_ON

2 3 4

1

OUT

IN

OUT OUT

IN

OC#

EN

G545A1P1U_SO8

8 7 6 5

USB20_P1

USB20_N1

+USB_VCCA

D7

2

3

PJDLC05_SOT23-3

@

1

2

C444

1000P_0402_50V7K@

B

USB_OC#0 (28)

USB_OC#1 (28)

1

LIFT USB CONN. 1

+USB_VCCA

1

+

C443

C443 150U_B2_6.3VM_R35M

150U_B2_6.3VM_R35M

2

USB20_N0(28)

USB20_P0(28)

Source:DC233001X00 2nd source:DC233002C00

W=60mils

1

C441

C441 470P_0402_50V7K

470P_0402_50V7K

2

USB20_N0 USB20_P0

C

D

E

LIFT USB CONN. 2

JUSB1

1

VCC

2

D-

3

D+

4

GND

5

GND1

6

GND2

7

GND3

8

GND4

SUYIN_020173MR004G579ZR

ME@

+USB_VCCA

1

C442

C442 470P_0402_50V7K

470P_0402_50V7K

2

USB20_N1(28)

USB20_P1(28)

Source:DC233001X00 2nd source:DC233002C00

W=60mils

USB20_N1 USB20_P1

JUSB2

1

VCC

2

D-

3

D+

4

GND

5

GND1

6

GND2

7

GND3

8

GND4

SUYIN_020173MR004G579ZR

ME@

CMOS Camera Conn

BT_LED#(39)

2 2

CMOS_OFF#(36)

3 3

LIFT USB CONN. 1

+USB_VCCC

4 4

USB20_P4(28)

USB20_N4(28)

+5VS

12

R246

R246 10K_0402_5%

10K_0402_5%

1

IN

3

OUT

GND

Q21

Q21 DTC124EKAT146_SC59-3

DTC124EKAT146_SC59-3

USB20_P4 USB20_N4

2

CMOS1

ACES_85201-06051

S

D

13

G

Q19

2

SI2301BDS-T1-E3_SOT23-3

USB20_N2(28) USB20_P2(28)

JP10

8

GND

7

GND

6

5

4

3

2

1

ME@

USB20_N2 USB20_P2

C450 0.1U_0402_16V4ZC450 0.1U_0402_16V4Z

USB_ON(36)

12

R247

R247 0_0603_5%

0_0603_5%

1

C447

C447 10U_0805_10V4Z

10U_0805_10V4Z

2

+5VALW

12

U53

1 2 3 4

G545A1P1U_SO8

12

R20

R20 100K_0402_5%

100K_0402_5%

@

1

C445

0.1U_0402_16V4Z

2

JP31

1

2

3

4

5

6

GND1

7

GND2

ACES_88266-05001

ME@

GND IN IN EN

OUT OUT OUT

OC#

+USB_VCCC

8 7 6 5

1

C451

2

BT_OFF#(36)

USB_OC#4 (28)

1000P_0402_50V7K@

+5VS

2

IN

1

+

C449

C449 150U_B2_6.3VM_R35M

150U_B2_6.3VM_R35M

@

2

Q18

1

DTC124EKAT146_SC59-3

OUT

IN

GND

3

12

R248

R248 10K_0402_1%

10K_0402_1%

1

OUT

Q22

Q22 DTC124EKAT146_SC59-3

DTC124EKAT146_SC59-3

GND

3

1

C448

C448 470P_0402_50V7K

470P_0402_50V7K

2

+3VS

S

G

2

SI2301BDS-T1-E3_SOT23-3

BT MODULE CONN

BTON_LED

WLAN_ACTIVE(30) BT_ACTIVE(30)

USB20_P6(28) USB20_N6(28)

+3VS_BT

D

13

Q20

USB20_N4

USB20_P4

WLAN_ACTIVE BT_ACTIVE USB20_P6 USB20_N6

30mils

1

C446

0.1U_0402_16V4Z

2

change pin define for new symbol (JP22) on C test

D5

2

3

PJDLC05_SOT23-3

@

1

JP30

1

2

3

4

5

6

7

8

9

GND1

10

GND2

MOLEX_53780-0870

ME@

Security Classification

2006/08/18 2007/8/18

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPER TY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPER TY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN C ONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN C ONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN C ONSENT OF COMPAL ELECTRONICS, INC.

2006/08/18 2007/8/18

Compal Secret Data

C

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

Power OK, Reset and RTC Circuit, TP

0.4

KIWA5/6 LA-5081P

E

40 53Wednesday, March 18, 2009

0.4

100K_04 02_5%

NOVO#(36)

51_ON#(43)

NOVO#

ON/OFF switch

Power Button

J5 JOPEN@J 5 JOPEN@

J6 JOPEN@J 6 JOPEN@

Bottom Side

ON/OFFBT N#

EC_ON(36)

EC_ON

R251

10K_040 2_5%

+3VALW

R250

51_ON#

SW3

1

2

5

6

TOP Side

12

+3VALW

12

R261

@

R261

@

4.7K_0402_5%

1 2

D41

2

3

DAN202U T106_SC70-3

3

4

SMT1-05_ 4P

1

DAN202U T106_SC70-3

D42

1

NOVO_BT N#

3

2

G

+3VALW

1 2

13

R260

R260 100K_04 02_5%

100K_04 02_5%

D

Q23

2N7002_ SOT23

S

ON/OFF#

51_ON#

2

@

C457

C457 1000P_0 402_50V7K

1000P_0 402_50V7K

1

ON/OFF# (3 6)

51_ON# (43)

12

D43

D43 RLZTE11 20A LL34@

RLZTE11 20A LL34@

+5VS

+3VS

R13

R249

0_0603_ 5%

D10

ON/OFFBT N#

NOVO_BT N# ON/OFFBT N#

D10

2

1

3

PJSOT24 C_SOT23-3

@

No switch board :

CAPS_LED# =>ESB _CK

NUM_LED# =>ESB_ DA

0_0603_ 5%

ESB_CK(36) ESB_DA(36) I2C_INT(36 )

R256

0_0402_ 5%

ENE@

NOSB@

R13 0_0603_ 5%

0_0603_ 5%

1 2

R256 300 _0402_5%

1 2

R258 300 _0402_5%

1 2

ENE@

R259 0_0 402_5%

ENE@

ENE@ ENE@

ENE@

18P_040 2_50V8J

NOSB@

18P_040 2_50V8J

R258

0_0402_ 5%

Switch Board Conn.

NOVO_BT N#

ESB_CK_ C ESB_DA_ C I2C_INT_C

2

ENE@

2

C456

18P_040 2_50V8J

1

C455

R256, R258 change SD028300080 to SM010027780

02/26 remove SMbus for CY

Kill Switch

WLA N@

+3VALW

KILL_SW #(36)

WLA N@

12

R18 100 K_0402_5%

KILL_SW#

SW4

3

2

1

1BS003-1 211L_3P

WLA N@

ENE@C4 56

ENE@

ON/OFFBT N#

NOVO_BT N#

I2C_INT_C

done

1

C452

2

@

JP33

10

9 8 7 6 5 4 3 2 1

ACES_87 151-0807G

ME@

1

C453

2

@

0.1U_0402_16V4Z

GND GND 8 7 6 5 4 3 2 1

@

0.1U_0402_25V6

2

C454

1

0.1U_0402_25V6

+3VALW

Lid Switch

1 2

R283 0_0402_5 %R283 0_0402_ 5%

C475

0.1U_040 2_16V4Z

+VCC_LID

1

2

R284 100 K_0402_5%R2 84 100 K_0402_5%

1 2

2

A3212EL HLT-T_SOT23W -3

VDD

3

OUTPUT

GND

U58

1

2

C476

10P_040 2_50V8J

1

LID_SW # (36)

Security Class ification

2008/03/ 25 2008/04/

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2008/03/ 25 2008/04/

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Audio Jack & SW connector

Size Document Nu mber Rev

Custom

Date: Sheet

Date: Sheet of

KIWA5/6 LA-5081P

of

41 53Wednesd ay, March 18, 20 09

0.4

A

B

C

D

E

+3VALW TO +3VS+5VALW TO +5VS

+5VALW

U54

8

D

1

C458

C458 10U_0805_10V4Z

2

G

B+

13

D

S

2

R266

R266 20K_0402_5%

20K_0402_5%

5VS_GATE

10U_0805_10V4Z

Q28

Q28 2N7002_SOT23

2N7002_SOT23

1 1

SUSP

7

D

6

D

5

D

SI4800BDY-T1-E3_SO8

R269

R269 0_0402_5%

0_0402_5%

1 2

+5VS

1

S

2

1

S

3

S

C459

4

G

10U_0805_10V4Z

2

1

C467

0.1U_0603_25V7K

2

@

1

C460

C460 1U_0603_10V4Z

1U_0603_10V4Z

2

12

R263

R263 470_0603_5%

470_0603_5%

13

D

S

SUSP

2

G

Q25

Q25 2N7002_SOT23

2N7002_SOT23

SUSP

B+

2

G

1

C461

C461 10U_0805_10V4Z

10U_0805_10V4Z

2

12

R267

R267 47K_0402_5%

47K_0402_5%

13

D

Q29

Q29 2N7002_SOT23

2N7002_SOT23

S

+3VALW

U55

8 7 6 5

SI4800BDY-T1-E3_SO8

1 2

D D D D

R270

R270 0_0402_5%

0_0402_5%

@

S S S

G

+3VS

1 2 3 4

1

C468

0.1U_0603_25V7K

2

1

C462

C462 10U_0805_10V4Z

10U_0805_10V4Z

2

1

C463

C463 1U_0603_10V4Z

1U_0603_10V4Z

2

12

R264

R264 470_0603_5%

470_0603_5%

13

D

S

SUSP

2

G

Q26

Q26 2N7002_SOT23

2N7002_SOT23

+5VS

1

C55

0.1U_0402_16V4Z

2

1

C53

0.1U_0402_16V4Z

2

1

C52

0.1U_0402_16V4Z

2

1

C54

0.1U_0402_16V4Z

2

+1.5V to +1.5VS

2 2

B+

R277

R277 150K_0402_5%

150K_0402_5%

Q36

13

D

2

G

2N7002_SOT23

D

S

SUSP#(30,34,36,47,48)

SUSP

3 3

4 4

1

C470

C470 10U_0805_10V4Z

10U_0805_10V4Z

2

1 2

SUSP(47,48)

+1.5V

U57

8

D

7

D

6

D

5

D

SI4800BDY-T1-E3_SO8

1.5VS_GATE

1

R278

R278 0_0402_5%

0_0402_5%

@

C473

2

@

0.1U_0603_25V7K

RTCVREF

12

SUSP

DTC124EKAT146_SC59-3

1

2

C1167

0.01U_0402_16V7K

@

+1.5VS

1

S

2

S

3

S

4

G

1

C474

0.1U_0603_25V7K

2

R279

R279 10K_0402_5%

10K_0402_5%

Q37

2

IN

1

C471

C471 10U_0805_10V4Z

10U_0805_10V4Z

2

+5VALW

12

@

R280

R280 100K_0402_5%

100K_0402_5%

1

OUT

GND

3

C1166

@

1

C472

C472 1U_0603_10V4Z

1U_0603_10V4Z

2

1

2

0.01U_0402_16V7K

12

R272

R272 470_0603_5%

470_0603_5%

13

D

Q31

S

2N7002_SOT23

+1.5V +VCCP +0.75VS

12

R274

R274 470_0603_5%

12

R281

R281 100K_0402_5%

100K_0402_5%

1

OUT

GND

3

470_0603_5%

13

D

SYSON# SUSP SUSP

2

G

Q33

S

2N7002_SOT23

SUSP

2

G

+5VALW

SYSON#

SYSON(30,36,47)

SYSON#

DTC124EKAT146_SC59-3

SYSON

Q38

2

IN

12

R275

R275 470_0603_5%

470_0603_5%

13

D

S

2

G

Q34

Q34 2N7002_SOT23

2N7002_SOT23

12

R276

R276 470_0603_5%

470_0603_5%

13

D

S

2

G

Q35

Q35 2N7002_SOT23

2N7002_SOT23

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COM PETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COM PETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COM PETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

2006/08/18 2007/8/18

C

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

DC Interface

KIWA5/6 LA-5081P

42 53Wednesday, March 18, 2009

E

0.4

A

PJ101

1 1

2 2

DC030006J00

JDCIN

JDCIN 4602-Q04C-09R 4P P 2.5@

4602-Q04C-09R 4P P 2.5@

APDIN

4

3

2

1

7A_24VDC_429007.W RML

112

@

JUMP_43X118

PF101

2

SMB3025500YA_2P

21

APDIN1

1 2

12

PC112

0.018U_0603_50V7J@

PC102

PC101

1000P_0402_50V7K

PL101

100P_0402_50V8J

B

VIN

C

Vin Detector

D

High 17.944 17.706 17.470 Low 16.242 16.027 15.808

PR102

PR102 1M_0402_1%

1M_0402_1%

VINDE-2

0.1U_0402_16V7K

1 2

VS

3

+

2

-

PR109

PR109 10K_0402_1%

10K_0402_1%

8

P

O

G

PU102A

PU102A LM393DG_SO8

LM393DG_SO8

4

12

RTCVREF

VIN

12

PC105

0.01U_0402_25V7K

1

12

PR105

12

PR108

PR105 10K_0402_1%

10K_0402_1%

1 2

PACIN

10K_0402_1%

ACIN (28,36,45)

PACIN

PR104

10K_0805_5%

12

PD102

RLZ4.3B_LL34

3.3V

12

VIN

100P_0402_50V8J

PC103

PC113

0.018U_0603_50V7J@

PC104

1000P_0402_50V7K

PC106

1000P_0603_50V7K

12

VINDE-1

12

PR103

84.5K_0402_1%

12

PR107

PR106

90.9K_0402_1%

1 2

22K_0402_1%

VINDE-3

12

PC107

VIN

PD103

LL4148_LL34-2

PD101

LL4148_LL34-2

PR101

200_0603_5%

1 2

100K_0402_1%

PR113

22K_0402_1%

1 2

12

PR112

68_1206_5%

PQ101

TP0610K-T1-E3_SOT23- 3

51ON-2

12

PC108

1 2

0.22U_0603_25V7K

51ON-3

2

BATT+

3 3

CHGRTCP

51_ON#(41)

RTC Battery

JRTC

- +

MAXEL_ML1220T10@

4 4

A

12

PD104

1 2

RB751V-40TE17_SOD323- 2

B

+RTCBATT

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

+CHGRTC

PR115

560_0603_5%

RTCVREF-1

1 2

2007/09/20 2008/09/20

RTCVREF

PR116

560_0603_5%

1 2

3.3V

12

Compal Secret Data

Deciphered Date

C

G920AT24U_SOT89-3

3

OUT

PC110

PC110 10U_0805_6.3V6M

10U_0805_6.3V6M

PU101

GND

CHGRTCIN

2

IN

1

12

PC111

PC111 1U_0805_25V4Z

1U_0805_25V4Z

LL4148_LL34-2

1 2

51ON-1

12

PR110

13

12

PR114

PR114 200_0603_5%

200_0603_5%

12

PR111

PR111 68_1206_5%

68_1206_5%

VS

12

PC109

0.1U_0603_25V7K

Compal Electronics, Inc.

Title

Size D ocument Number Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

DCIN & DETECTOR

43 53W ednesday, March 18, 2009

D

43 53W ednesday, March 18, 2009

0.4

A

1 1

B

C

D

PJ201

2

112

@

JUMP_43X118

VMB2

JBATT

1

2

EC_SMCA

3

2 2

3 3

3

EC_SMDA

4

TS

5

6

7

8

GND

9

GND

TYCO_1775789-1@

JUMP_43X118

PF201

21

12A_65V_451012MRL

PR204

100_0402_5%

PR209

6.49K_0402_1%

PR211

PR211 10K_0402_1%

10K_0402_1%

12

1 2

PR206

100_0402_5%

VMB

SMB3025500YA_2P

12

PC201

PC201 1000P_0402_50V7K

1000P_0402_50V7K

+3VALWP

BATT_TEMPA (36)

BATT_SEL_HW (45)

PL201

1 2

BATT+

12

PC202

0.01U_0402_25V7K

EC_SMB_CK1 ( 36)

EC_SMB_DA1 ( 36)

A/D

100K_0603_1%_TH11-4H104FT

PH1 under CPU botten side :

CPU thermal protection at 92 degree C Recovery at 56 degree C

7

O

PU102B

LM393DG_SO8

12

VL

PR202

PR202 47K_0402_1%

47K_0402_1%

1 2

TM-3

VL

12

PH201

PR205

13.7K_0402_1%

TM-1

12

PC203

0.22U_0603_25V7K

1 2

12

PR207

15.4K_0402_1%

TM_REF1

PC204

1000P_0402_50V7K

PR203

47K_0402_1%

TM-2

1 2

5

+

6

-

PR208

12

100K_0402_1%

PR210

PR210 100K_0402_1%

100K_0402_1%

8

P

G

4

2

G

13

D

PQ201

PQ201 2N7002KW_S OT323-3

2N7002KW_S OT323-3

S

MAINPWO N (46)

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Compal Secret Data

Deciphered Date

C

Compal Electronics, Inc.

Title

2008/6/222007/6/22

Title

Size D ocument Number Rev

Date: Sheet of

Compal Electronics, Inc.

BATTERY CONN / OTP

44 53Wednesday, March 18, 2009

D

44 53Wednesday, March 18, 2009

0.4

A

PQ301

PQ301 FDS6675BZ_SO8

FDS6675BZ_SO8

1 2

8 7

5

PR306

PR306 340K_0402_1%

340K_0402_1%

1 2

PR310

54.9K_0402_1%

1 2

PR316

100K_0402_1%

1 2

4

SI2301BDS-T1-E3_SOT23- 3

VIN

PR301

3.3_1210_5%

1 1

2.2U_0805_25V6K

2 2

CP Point Setting

CP point=Iadapter*85% 90W adapter Vacset=3.3*(127K/(84.5K+127K))=1.885V CP Point=(Vacset/Vvdac)*(0.1/PR302)=4A

65W adapter Vacset=3.3*(115K/(165K+115K))=1.355V CP Point=(Vacset/Vvdac)*(0.1/PR302)=2.74A

PR305

3.3_1210_5%

PC311

BK-1 BK-2

1 2

1 2 12

54.9K_0402_1%

1 2

PC301

0.01U_0402_25V7K

PR309

340K_0402_1%

PR314

Input OVP : 22.3V

ACIN detect : 17.26V

PQ302

PQ302 FDS6675BZ_SO8

FDS6675BZ_SO8

1

2

36

3 6

4

12

PC306

1 2

0.01U_0402_25V7K

100K_0402_1%

PR304

PR311

84.5K_0402_1%

24751_VREF A CSET

1 2

PC315

0.01U_0402_25V7K@

CP setting

PQ306

2

Fsw : 300KHz

1 3

24751_VREF

PR320

100K_0402_1%

3 3

ACOFF 24751_O CP-1

1 2

PC326

0.1U_0402_16V7K

0.1U_0402_16V7K PR323

PR323

340K_0402_1%

24751_VREF

12

PR318

PR318 200K_0402_1%

2

G

200K_0402_1%

24751_OCP-2

13

D

PQ308

PQ308 2N7002KW_S OT323-3

2N7002KW_S OT323-3

S

2

G

12

ACSET

24751_OCP-3 24751_ACGOOD#

13

D

S

1 2

PC324

0.1U_0603_25V7K

PQ307

PQ307 2N7002KW_S OT323-3

2N7002KW_S OT323-3

VMB2

VS

12

1

OVP-3

0

8

3

P

+

2

-

G

PU302A

4

LM358DR_SO8

PR330

PR330 10K_0402_1%

10K_0402_1%

BATT_OVP(36)

12

A/D

4 4

A

12

PR327

OVP-1

340K_0402_1%

12

PC329

PR329

0.01U_0402_25V7K

0.01U_0402_25V7K 499K_0402_1%

499K_0402_1%

OVP-2

12

PR331

105K_0402_1%

CHGVADJ(36)

12

PC330

0.01U_0402_25V7K

7

B

24751_PVCC

PR302

0.015_1206_1%

1

2

PC307

0.1U_0402_16V7K

1 2

12

PR313

127K_0402_1%

12

+EC_AVCC

PR326

210K_0402_1%

1 2

PR302

4

3

12

24751_ACN

24751_ACP

24751_ACDRV#

24751_ACOP

1 2

PC317

0.47U_0603_16V7K

24751_OVPSET

1 2

PR336

PR336 0_0402_5%

0_0402_5%

VADJ

/BATDRV

REGN

CHGEN#

PU301

1

CHGEN

PC309

0.1U_0603_25V7K@

2

ACN

3

ACP

4

ACDRV

ACDET

5

ACDET

6

ACSET

7

ACOP

8

OVPSET

9

AGND

10

VREF

PR337

0_0402_5%@

PR337

0_0402_5%@

24751_VDAC

11

1 2

VDAC

12

VADJ

13

ACGOOD

14

BATDRV

BQ24751ARHDR_QFN28_5 X5

12

PR324

PR324 0_0402_5%@

0_0402_5%@

VADJ

12

PR328

PC328

499K_0402_1%

1000P_0402_50V7K

"CHGVADJ" connect to EC DA pin

PVCC

BTST

HIDRV

PH

REGN

LODRV

PGND

LEARN

CELLS

SRP

SRN

BAT

SRSET

IADAPT

CHGVADJ Pre Cell

3.3V 4.35V

0V 4V

28

27

26

25

24

23

22

21

20

19

18

17

29

TP

16

15

100P_0402_50V8J

8 7

B+_IN CHG_B+

5

PC308

0.1U_0603_25V7K

12

24751_VREF

PC322

1U_0603_6.3V6M

24751_BTST-1

24751_HIDRV

24751_PH

REGN

12

PC316

PC316 1U_0603_10V6K

1U_0603_10V6K

24751_LODRV

ACOFF

CELLS

24751_SRP

24751_SRN

12

SRSET

IADAPT

1 2

PR321

10_0603_5%

B+

PC310

0.1U_0603_25V7K

1 2

PR307

0_0402_5%

1 2

24751_BTST

12

PD301

LL4148_LL34-2

ACOFF ( 36)

12

2N7002KW_S OT323-3

PC323

0.1U_0603_25V7K

12

PC327

C

PJ301

2

112

JUMP_43X118@

1 2

PC312

0.1U_0603_25V7K

24751_VREF

PQ312

PR334

PR334 0_0402_5%@

0_0402_5%@

ICHG setting

12

PR322

PR322 180K_0402_1%

180K_0402_1%

ADP_I (36)

1 2

13

D

S

LI-3S :13.5V----BATT-OVP=1.5V BATT-OVP=0.1112*BATT+

8

5

P

+

0

OVP-4

6

-

G

PU302B

4

LM358DR_SO8

B

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Compal Secret Data

Deciphered Date

C

1 2

PQ303

3 5

241

SI7326DN-T1-E3_PAK1212-8

PQ305

3 5

241

SI7326DN-T1-E3_PAK1212-8

24751_VREF

PR338

PR338 100K_0402_1%

100K_0402_1%

12

G

D

2

S

PR319

54.9K_0402_1%

PC325

0.01U_0402_25V7K

@

1 2

13

PR315

PR315 100K_0402_1%

100K_0402_1%

12

IREF Current

2.842V 3.3A

1 2

PC304

PC303

4.7U_1206_25V6K

PL202

10U_LF919AS-100M-P3_4. 5A_20%

1 2

12

PR312

4.7_1206_5%

24751_SNB

12

PC318

680P_0402_50V7K

PQ310

PQ310 2N7002KW_S OT323-3

2N7002KW_S OT323-3

BAT_SEL

2

PR332

G

0_0402_5%@

PR333

PR333 0_0402_5%@

0_0402_5%@

IREF (36)

2009/05/212008/05/21

0.01U_0402_25V7K

1 2

PC305

4.7U_1206_25V6K

24751_SW- 1

BATT_SEL_HW ( 44)

12

BATT_SEL_EC (36)

12

D

12

PR303

PR303 100K_0402_1%

PC302

/BATDRV

12

PC331

10U_1206_25V6M

12

PC320

0.1U_0603_25V7K

24751_ACGOOD#

FSTCHG(36)

Title

Size D ocument Number Rev

Date: Sheet of

100K_0402_1%

1 2

PR308

0.02_1206_1%

1

2

0.1U_0402_16V7K

RTCVREF

PR317

4

3

PC319

1 2

12

PC321

0.1U_0603_25V7K

@

24751_VREF

12

100K_0402_1%

Compal Electronics, Inc.

CHARGER

PR335

100K_0402_1%

@

2

G

24751_VREF

2

G

D

12

13

D

S

PR325

PR325 100K_0402_1%

100K_0402_1%

1 2

13

D

S

36

241

PQ304

PQ304 FDS6675BZ_SO8

FDS6675BZ_SO8

578

BATT+

12

PC313

10U_1206_25V6M

PQ311

PQ311 2N7002KW_S OT323-3@

2N7002KW_S OT323-3@

CHGEN#

PQ309

PQ309 2N7002KW_S OT323-3

2N7002KW_S OT323-3

45 53Wednesday, March 18, 2009

12

PC314

ACIN (28,36, 43)

10U_1206_25V6M

0.4

5

4

3

2

1

ISL6237_B+

12

PC404

PC405

4.7U_1206_25V6K

PL402

4.7UH_PCMC063T-4R 7MN_5.5A_20%

SI7326DN-T1-E3_PAK1212-8

12

PR404

4.7_1206_5%

5V_SNB

12

PC415

680P_0402_50V7K

SI7716DN-T1-E3_PAK1212-8

PJ402

2

JUMP_43X118@

PJ403

2

JUMP_43X118@

12

PC406

2200P_0402_50V7K

+5VALWP

12

1

+

PC413

2

220U_6.3V_M

PR407

61.9K_0402_1%@

1 2

PR409

1 2

0_0402_5%

112

12

0_0402_5%

PQ401

SI7326DN-T1-E3_PAK1212-8

PQ403

SI7716DN-T1-E3_PAK1212-8

100K_0402_1%

1 2

PR418

ISL6237_B+

3 5

241

3 5

241

PR412

PR413

12

200K_0402_5%

1 2

BST3A-1

PC411

0.1U_0603_25V7K

1 2

PC417

0.22U_0603_25V7K

1 2

VL

PR417

1 2

806K_0603_1%

12

PR401

0_0402_5%

1 2

PR403

PR403 0_0603_5%

0_0603_5%

2VREF_ISL6237

PR419

47K_0402_5%@

1 2

PC419

0.047U_0402_16V7K

0.1U_0603_25V7K

UG3

BST3A

12

SW3

LG3

FB3

VL

1 2

PC416

0.22U_0603_25V7K

EN_LDO

3/5V_EN1

3/5V_EN2

12

PC420

0.047U_0402_16V7K@

PC407

PR416

PR416 0_0402_5%

0_0402_5%

1 2

2VREF_ISL6237

33

26

24

25

23

30

32

1

8

20

4

14

27

1 2

TP

UGATE2

BOOT2

PHASE2

LGATE2

OUT2

REFIN2

REF

LDOREFIN

NC

EN_LDO

EN1

EN2

PC418

1U_0603_6.3V6M

VL

1 2

PC408

3/5V_VIN

3/5V_VCC

3

6

VIN

VCC

TON

NC

2

5

3/5V_NC

12

3/5V_TON

12

PR420

PR420 0_0402_5%

0_0402_5%

12

1U_0603_10V6K

PC409

7

19

PVCC

LDO

15

UGATE1

17

BOOT1

16

PHASE1

18

LGATE1

22

PGND

10

OUT1

11

FB1

9

BYP

29

SKIP

28

POK2

13

POK1

12

ILIM1

31

ILIM2

GND

PU401

21

ISL6237IRZ-T_QFN32_5X5

4.7U_0603_6.3V6M

HG5

BST5A

PR405

PR405 0_0603_5%

0_0603_5%

SW5

LG5

FB5

5V_SKIP

ILM1

ILIM2

PC410

1U_0603_10V6K

1 2

PC412

0.1U_0603_25V7K

PR410

PR410 0_0402_5%@

0_0402_5%@

1 2

PR411

PR411 0_0402_5%

0_0402_5%

BST5A-1

12

1 2

12

PR414

PR414 301K_0402_1%

301K_0402_1%

PR415

PR415 301K_0402_1%

301K_0402_1%

12

PQ402

3 5

241

PQ404

3 5

241

VL

POK (28)

+3VALWP +3VALW

B+

PJ401

PJ401 JUMP_43X118@

JUMP_43X118@

2

112

D D

PC401

4.7UH_PCMC063T-4R 7MN_5.5A_20%

1 2

PR406

0_0402_5%

PR406

0_0402_5%

PR408

10K_0402_1%

@

PD402

RLZ5.1B_LL34

1 2

+3VALWP

1

PC421

+

2

220U_6.3V_M

C C

VS

B B

12

PC402

4.7U_1206_25V6K

PL401

PR402

4.7_1206_5%

PC414

680P_0402_50V7K

EN_LDO-1

MAINPWO N (44)

12

PC403

2200P_0402_50V7K

12

3V_SNB

12

PD401

RB751V-40TE17_SOD323- 2

1 2

PD403

RB751V-40TE17_SOD323- 2

1 2

+5VALWP +5VALW

2VREF_ISL6237

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2007/06/22 2008/06/22

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

3VALW/5VALW

Size D ocument Number Rev

Wednesday, March 18, 2009

Date: Sheet of

2

Date: Sheet of

46 53

1

0.4Custom

5

1.5V_TON

PR502

0_0402_5%

D D

SYSON(30,36,42)

+5VALW

C C

SUSP#

+5VS

B B

A A

0_0402_5%

1 2

PR504

422_0603_1%

1 2

1U_0603_10V6K

PR510

0_0402_5%

1 2

PR513

422_0603_1%

1 2

PC519

1U_0603_10V6K

SUSP(42,48)

12

PC508

PR508

21K_0402_1%

12

PC515

0.1U_0402_16V7K

12

0.1U_0402_16V7K

@

5

PC504

0.1U_0402_16V7K

47P_0402_50V8J@

21K_0402_1%

1 2

12

PC520

47P_0402_50V8J@

1 2

PR515

13.3K_0402_1%

1 2

PR516

30.1K_0402_1%

1 2

4.7U_0603_6.3V6M

PR518

0_0402_5%

1 2

PC527

PC509

1 2

PR507

+1.5VP

12

PC523

1 2

PR521

PR521 100K_0402_1%

100K_0402_1%

VCCP_V5FILT

+1.5V

1

2

12

13

2

G

1.5V_V5FILT

1.5V_FB

VCCP_TON

VCCP_EN

VCCP_FB

1

2

D

S

PQ505

1.5V_EN

12

@

PJ503

PJ503 JUMP_43X79

JUMP_43X79

@

PR517

1K_0402_1%

PR520

1K_0402_1%

2N7002KW_SOT323-3

2

3

4

5

6

PC528

0.1U_0402_16V7K

2

TON

3

VOUT

4

V5FILT

5

VFB

6

PGOOD

12

0.75V_REF

12

0.1U_0402_16V7K

240K_0402_5%

1

TON

VOUT

V5FILT

VFB

PGOOD

1.5V_PGOOD (8)

240K_0402_5%

1 2

1

EN_PSV

GND7PGND

0.75V_IN

PC525

4

PR501

1 2

BST_1.5V

14TP15

VBST

EN_PSV

DRVH

LL

TRIP

V5DRV

DRVL

GND7PGND

8

PU501

PU501 TPS51117RGYR_QFN14_3. 5x3.5

TPS51117RGYR_QFN14_3. 5x3.5

PR509

BST_VCCP

14TP15

VBST

DRVH

LL

TRIP

V5DRV

DRVL

8

PU502

PU502 TPS51117RGYR_QFN14_3. 5x3.5

TPS51117RGYR_QFN14_3. 5x3.5

2

3

4

12

PC526

PC526 10U_0805_6.3V6M

10U_0805_6.3V6M

4

PR503

0_0603_5%

BST_1.5V-1

1 2

UG_1.5V

13

SW_1.5V

12

1.5V_TRIP

11

1 2

PR505

17.8K_0402_1%

10

LG_1.5V

9

PR511

0_0603_5%

BST_VCCP-1

1 2

13

12

11

10

9

PU503

VIN1VCNTL

GND

VREF

VOUT

APL5331KAC-TRL_SO8

UG_VCCP

SW_VCC P

VCCP_TRIP

1 2

12K_0402_1%

LG_VCCP

+0.75VSP

PR514

NC

TP

0.1U_0603_25V7K

PD501

PD501 1SS355_SOD323-2@

1SS355_SOD323-2@

1 2

PC503

1 2

0.1U_0603_25V7K

PD502

PD502 1SS355_SOD323-2@

1SS355_SOD323-2@

1 2

PC514

1 2

+5VS

6

5

7

8

9

3

PJ501

1.5V_IN

12

+5VALW

PQ501

3 5

241

SI7326DN-T1-E3_PAK1212-8

+5VALW

PQ502

3 5

12

PC511

4.7U_0805_10V6K

+5VS

12

PC521

4.7U_0805_10V6K

+3VALW

12

PC524

PC524 1U_0603_6.3V6M

1U_0603_6.3V6M

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

241

SI7716DN-T1-E3_PAK1212-8

VCCP_IN

578

5

4

12

PC534

1000P_0402_50V7K@

PQ503

3 6

241

SI4686DY-T1-E3_SO8

786

PQ504

123

SI4634DY-T1-E3_SO8

3

PC502

PC532

PC531

1000P_0402_50V7K@

4.7U_1206_25V6K

4.7U_1206_25V6K@

1.5UH_PCMC063T-1R 5MN_9A_20%

1 2

12

PR506

4.7_1206_5%

1.5V_SNB

12

PC510

680P_0402_50V7K

12

PC513

PC533

PC512

4.7U_1206_25V6K@

4.7U_1206_25V6K

PL502

1.5UH_PCMC063T-1R 5MN_9A_20%

1 2

12

PR512

4.7_1206_5%

VCCP_SNB

12

PC522

680P_0402_50V7K

PJ501

2

JUMP_43X79@

12

HCB4532KF-800T90_1812@

1 2

PC501

4.7U_1206_25V6K

PL501

PJ502

2

112

JUMP_43X79@

PL504

HCB4532KF-800T90_1812@

1 2

4.7U_1206_25V6K

Compal Secret Data

Deciphered Date

PL503

B+

112

1

12

+

PC505

2

220U_D2_4VY_R15M

B+

1

12

+

PC516

2

220U_D2_4VY_R15M

2

+1.5VP

12

PC507

PC506

10U_0805_6.3V6M

1000P_0402_50V7K

+VCCPP +VCCP

+1.5VP +1.5V

+VCCPP

12

PC517

PC518

10U_0805_6.3V6M

1000P_0402_50V7K

Compal Electronics, Inc.

Title

2008/11/122007/11/12

2

Title

Size D ocument Number Rev

Date: Sheet of

Compal Electronics, Inc.

1.5V / 0.9V / VCCP

PJ504

2

JUMP_43X118

@

PJ505

2

JUMP_43X118

@

PJ506

2

JUMP_43X79@

1

112

1

+0.75VS+0.75VSP

0.4

47 53Wednesday, March 18, 2009

0.4

5

1.8V_TON

PR631

40.2K_0402_1%

PC637

0.1U_0402_16V7K@

12

PC613

0.1U_0402_16V7K@

0_0402_5%

1U_0603_10V6K

PR629

PR621

1 2

PR605

422_0603_1%

1 2

1U_0603_10V6K

PR610

0_0402_5%@

1 2

12

PR626

1 2

PC636

0.1U_0402_16V7K@

12

422_0603_1%

1 2

PC617

0.1U_0402_16V7K@

PR630

12

10K_0402_1%

12

PR624

PR624 10K_0402_1%

10K_0402_1%

PC607

PR613

100K_0402_1%

PC529

12

PC604

0.1U_0402_16V7K

12

2

G

PR522

12

GVID1-1

2

G

12

PC625

0.022U_0402_16V7K

GVID0-1

12

PC632

0.022U_0402_16V7K

PC609

47P_0402_50V8J@

1 2

PR607

30.1K_0402_1%

1 2

PR608

PR608 21K_0402_1%

21K_0402_1%

13

D

PQ610

PQ610 2N7002KW_S OT323-3

2N7002KW_S OT323-3

S

+3VS

1 2

PR620

PR620 91K_0402_1%

91K_0402_1%

1 2

GVID1-2

13

D

PQ606

S

2N7002KW_SOT323-3

2

G

PR633

PR633 0_0402_5%

0_0402_5%

47P_0402_50V8J@

1 2

GVID0-2

13

D

S

D D

SUSP#

+5VS

C C

SUSP#

SUSP

+5VS

B B

VGA_PW ROK

GPU_VID1

10K_0402_1%

GPU_VID0

10K_0402_1%

A A

For N10M-GE1 GPIO15 GPIO20

GPU_VID1 GPU_VID0 VGA_CORE

0

1

0

1

0.95V

1.0V

1.2V

For N10M-GS

PR616=>9.09K PR622=>2.21K PR629,PR630,PC625,PQ606,PR620=>un-pop

1.8V_EN

1.8V_V5FILT

1.8V_FB

VGA_VOUT+VGA_COREP

12

VGA_V5FILT

VGA_FB

12

PC619

1 2

PR616

13.3K_0402_1%

1 2

PR619

39.2K_0402_1%

PR618

PR618 113K_0402_1%

113K_0402_1%

PQ607

PQ607 2N7002KW_S OT323-3

2N7002KW_S OT323-3

SUSP( 42,47)

0.1U_0402_16V7K

VGA_TON

VGA_EN

2

3

4

5

6

PR634

0_0402_5%@

VGA_FB1

PR625

30.1K_0402_1%

1 2

2

3

4

5

6

4.7U_0603_6.3V6M

PC630

PR621,PR624,PC632,PQ607,PR618=>un-pop

5

TON

VOUT

V5FILT

VFB

PGOOD

TON

VOUT

V5FILT

VFB

PGOOD

1.1V_EN

4

PR601

240K_0402_5%

1 2

1

EN_PSV

GND7PGND

PR609

205K_0402_1%

1 2

1

EN_PSV

GND7PGND

+1.8VSP

PC621

2

G

12

4

8

3

PJ601

1.8V_IN

PD602

PD602 1SS355_SOD323-2@

1SS355_SOD323-2@

1 2

PR603

0_0603_5%

BST_1.8V

14TP15

VBST

DRVH

LL

TRIP

V5DRV

DRVL

8

PU601

PU601 TPS51117RGYR_QFN14_3. 5x3.5

TPS51117RGYR_QFN14_3. 5x3.5

BST_VGA

1 2

14TP15

VBST

13

DRVH

12

LL

11

TRIP

10

V5DRV

9

DRVL

PU602

PU602 TPS51117RGYR_QFN14_3. 5x3.5

TPS51117RGYR_QFN14_3. 5x3.5

1

PJ607

1

JUMP_43X79

@

2

1.1V_IN LDO_1.8V_IN

12

1.91K_0402_1%

1.1V_REF

13

D

3.16K_0402_1%

S

PQ608

2N7002KW_SOT323-3

1 2

13

12

11

10

9

PR611

0_0603_5%

UG_VGA

SW_VGA

VGA_TRIP

1 2

9.1K_0402_1%

LG_VGA

PR622

PR627

BST_1.8V-1

UG_1.8V

SW_1.8V

1.8V_TRIP

1 2

PR606

16.5K_0402_1%

LG_1.8V

BST_VGA-1

0.1U_0603_25V7K

PR614

12

PC626

0.1U_0402_16V7K

0.1U_0603_25V7K

PD601

PD601 1SS355_SOD323-2

1SS355_SOD323-2

1 2

+5VALW

PC603

1 2

3 5

241

+5VS

12

PC610

4.7U_0805_10V6K

+5VS

PC614

+5VS

12

PC620

4.7U_0805_10V6K

PU603

VIN1VCNTL

2

GND

3

VREF

4

VOUT

APL5331KAC-TRL_SO8

12

+1.1VSP

12

PC628

PC628 10U_0805_6.3V6M

10U_0805_6.3V6M

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3 5

241

578

PQ603

PQ603 SI4686DY-T1-E3_SO8

SI4686DY-T1-E3_SO8

3 6

241

786

5

4

PQ604

123

6

5

NC

7

NC

8

NC

9

TP

3

12

PC602

4.7U_1206_25V6K

PQ601

PL601

2.2UH_PCMC063T-2R 2MN_8A_20%

SI7326DN-T1-E3_PAK1212-8

1 2

12

PR604

4.7_1206_5%

1.8V_SNB

PQ602

12

PC608

SI7716DN-T1-E3_PAK1212-8

680P_0402_50V7K

VGA_IN

12

PC611

10U_1206_25V6M

786

5

4

PQ605

123

SI4634DY-T1-E3_SO8

+5VS

12

PC622

PC622 1U_0603_6.3V6M

1U_0603_6.3V6M

SUSP( 42,47)

SI4634DY-T1-E3_SO8

PJ601

2

112

JUMP_43X79@

12

PC601

4.7U_1206_25V6K

1

+

PC605

2

220U_D2_4VY_R15M

PJ605

2

112

JUMP_43X79@

PC612

10U_1206_25V6M

PL602

1UH_PCMB103E-1R0M S_20A_20%

1 2

12

PR612

4.7_1206_5%

VGA_SNB

12

PC618

680P_0402_50V7K

4.7U_0603_6.3V6M@

PR632

31.6K_0402_1%@

1 2

PC631

0.1U_0402_16V7K@

Compal Secret Data

Deciphered Date

12

2

B+

+1.8VSP

12

PC635

PC606

10U_0805_6.3V6M

1000P_0402_50V7K

B+

1

12

PR615

10_0402_5%

PC623

12

+

2

PR617

PR617 0_0402_5%

0_0402_5%

2

G

12

PC615

330U_D2_2.5VY_R15M

12

+3VS

1

PJ608

1

JUMP_43X79

@

2

12

1K_0402_1%@

13

D

S

PQ609

2N7002KW_SOT323-3@

2008/11/122007/11/12

2

+VGA_COREP +VGA_CORE

12

PC633

PC616

10U_0805_6.3V6M

+VGASENSE (16, 17)

12

PR623

LDO_1.8V_REF

12

PR628

0.1U_0402_16V7K@

1.24K_0402_1%@

1

PJ602

2

112

JUMP_43X118@

PJ603

2

112

JUMP_43X118@

PJ604

2

112

JUMP_43X79@

PJ606

2

112

JUMP_43X79@

+VGA_COREP

12

PC634

10U_0805_6.3V6M

PU604

VIN1VCNTL

2

3

4

12

PC627

12

PC629

PC629 10U_0805_6.3V6M

10U_0805_6.3V6M

@

Title

Size D ocument Number Rev

Date: Sheet of

NC

GND

VREF

NC

VOUT

NC

TP

APL5331KAC-TRL_SO8@

+1.8VSP

Compal Electronics, Inc.

VGA_CORE/1.8V/1.1VS

+1.1VS+1.1VSP

+1.8VS+1.8VSP

6

5

7

8

9

1

12

@

48 53Wednesday, March 18, 2009

PC624

PC624 1U_0603_6.3V6M

1U_0603_6.3V6M

+5VS

0.4

5

+3VS

12

PR830

PC824

1

2

3

4

5

6

7

8

9

10

PR849

PR849 20K_0402_5%

20K_0402_5%

(6)

PR830

1.91K_0402_1%

+3VS +5VS

PR834

0_0402_5%@

PR834

0_0402_5%@

12

CPU_V5FILT

40

41

GND

V5FILT

DROOP

VREF

GND

CSP1

CSN1

CSN2

CSP2

GNDSNS

VSNS

THERM

VR_TT#11DPRSTP#12PSI#13VID614VID515VID416VID317VID218VID119VID0

12

PC840 0.033U_0402_16V7K@P C840 0.033U_0402_16V7K@

VGATE(8,28)

1 2

CPU_GNDSNS

CPU_VSNS

12

PR844

0_0402_5%

PR844

0_0402_5%

VCCSENSE

1 2

PR832

PR832 0_0402_5%@

0_0402_5%@

1U_0603_10V6K

CPU_DROOP

CPU_VREF

CPU_CSP1-2

CPU_CSN1-1

CPU_CSN2-1

CPU_CSP2-2

CPU_THERM

12

PR845

0_0402_5%

PR845

0_0402_5%

12

PR847

PR847 100_0402_5%

100_0402_5%

(6)

+CPU_CORE

PC836

PC837

100_0402_5%

CLK_ENABLE#(28)

CPU_VREF

PR839

5.76K_0402_1%

PC825 68P_0402_50V8JPC825 68P_0402_50V8J

PC826 0.22U_0603_10V7KPC826 0.22U_0603_10V7K

1 2

PR843

PC828 33P_0402_50V8KPC828 33P_0402_50V8K

PC830 33P_0402_50V8KPC830 33P_0402_50V8K

PC832 33P_0402_50V8KPC832 33P_0402_50V8K

PC833 33P_0402_50V8KPC833 33P_0402_50V8K

12

VSSSENSE

D D

C C

CPU_CSP1

PR861 470_0402_1%PR861 470_0402_1%

CPU_CSN1

PR862 470_0402_1%PR862 470_0402_1%

CPU_CSN2

PR863 470_0402_1%PR863 470_0402_1%

CPU_CSP2

PR864 470_0402_1%PR864 470_0402_1%

B B

12

100P_0402_50V8J

12

100P_0402_50V8J

12

4

PR831

10K_0402_5%@

12

PR865

0_0402_5%

PR865

0_0402_5%

12

CPU_VREF

12

PR833 124K_0402_1%PR833 124K_0402_1%

PR836 0_0402_5%PR836 0_0402_5%

PR835 0_0402_5%PR835 0_0402_5%

CPU_TONSEL

CPU_TRIPSEL

CPU_ISLEW

CPU_OSRSEL

36

37

38

39

ISLEW

TONSEL

OSRSEL

TRIPSEL

PU801

TPS51620RHAR_QFN40_6X6

VID5

VID6

PSI#

CPU_DPRSTP#

12

1 2

PR854 0_0402_5%PR854 0_0402_5%

PR855 0_0402_5%PR855 0_0402_5%

PR853 0_0402_5%PR853 0_0402_5%

PR852 0_0402_5%PR852 0_0402_5%

H_PSI#

CPU_VID5

CPU_VID6

H_DPRSTP#

3

(8,28)

VR_ON

12

PR837 0_0402_5%PR837 0_0402_5%

CPU_VR_ON

34

35

VR_ON

PWRMON

VID3

VID4

1 2

PR857 0_0402_5%PR857 0_0402_5%

PR856 0_0402_5%PR856 0_0402_5%

(6)

(6,27)

CPU_VID3

CPU_VID4

(36)

DPRSLPVR

12

PC808

10U_1206_25V6M

3 5

241

786

123

3 5

241

786

5

10U_1206_25V6M

PQ801

PQ801 SI7686DP-T1-E3_SO8

SI7686DP-T1-E3_SO8

12

PR819

4.7_1206_5%

CPU1_SNB

12

PQ803

PC815

PC815 680P_0402_50V7K

680P_0402_50V7K

SI4634DY-T1-E3_SO8

12

PC817

PQ804

PQ804 SI7686DP-T1-E3_SO8

SI7686DP-T1-E3_SO8

PQ806

SI4634DY-T1-E3_SO8

123

1 2

PR838 0_0402_5%PR838 0_0402_5%

786

+5VS

5

4

5

4

CPU_DPRSLPVR

CPU_CLK_EN#

31

32

33

VBST

V5IN

PGND

PR860 0_0402_5%PR860 0_0402_5%

30

29

28

LL1

27

26

25

24

23

LL2

22

21

(6)

UGATE_CPU1

BOOT_CPU1

PHASE_CPU1

LGATE_CPU1

1 2

PC831 10U_0805_6.3V6M

LGATE_CPU2

PHASE_CPU2

BOOT_CPU2

UGATE_CPU2

(6)

PGOOD DRVH1

CLK_EN#

DPRSLPVR

DRVL1

DRVL2

VBST2

DRVH2

20

VID0

VID1

VID2

1 2

PR859 0_0402_5%PR859 0_0402_5%

PR858 0_0402_5%PR858 0_0402_5%

(6)

CPU_VID2

CPU_VID1

CPU_VID0

PR841

1 2

0_0603_5%

PR846

1 2

0_0603_5%

+5VS

PD801

PD801 1SS355_SOD323-2

1SS355_SOD323-2

1 2

BOOT_CPU1-1

1 2

PC827

0.22U_0603_10V7K

+5VS

BOOT_CPU2-1

1 2

PC834

0.22U_0603_10V7K

1 2

PD802

PD802 1SS355_SOD323-2

1SS355_SOD323-2

5

4

PQ802

123

SI4634DY-T1-E3_SO8

786

4

PQ805

SI4634DY-T1-E3_SO8

123

12

PC804

10U_1206_25V6M

12

PC818

10U_1206_25V6M

12

PR829

4.7_1206_5%

CPU2_SNB

12

PC823

PC823 680P_0402_50V7K

680P_0402_50V7K

10U_1206_25V6M

2

PC809

2200P_0402_50V7K

+CPU_B+

12

PC839

+CPU_B+

12

PC838

1000P_0402_50V7K

PL802

0.36UH_PCMC104T-R 36MN1R17_30A_20%

1

CPU_CSP1-1

2

12

PR801

1 2

17.8K_0402_1%

1 2

PR842

28.7K_0402_1%

1 2

PC829

0.033U_0402_16V7K

CPU_CSP1

1000P_0402_50V7K

PL803

0.36UH_PCMC104T-R 36MN1R17_30A_20%

1

CPU_CSP2-1

2

12

PR848

1 2

17.8K_0402_1%

1 2

PR851

28.7K_0402_1%

1 2

PC835

0.033U_0402_16V7K

CPU_CSP2

HCB4532KF-800T90_1812

1 2

4

3

PR840

69.8K_0402_1%

CPU_SN-1

1 2

4

3

PR850

69.8K_0402_1%

CPU_SN-2

1 2

PL801

PC805

220U_25V_M

PH801

100K_0603_1%_TH11-4H104FT

CPU_CSN1

PH803

100K_0603_1%_TH11-4H104FT

CPU_CSN2

1

+

2

1

B+

+CPU_CORE

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2008/05/21 2009/05/21

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size D ocument Number Rev

Custom

Date: Sheet of

2

Date: Sheet of

+CPU_CORE

Wednesday, March 18, 2009

0.4

49 53

1

0.4

5

4

3

2

Version change list (P.I.R. List) Page 1 of 2

for PWR

Reason for change Rev. PG# Modify List Date PhaseFixed IssueItem

1

D D

1

2

modify battery select circuit add PQ312 and PR338

change +1.1VS voltage to +1.05V change P622 to 2.21K only for N10M-GS(40nm)

2009.01.14

3

4

5

6

C C

8

9

10

11

B B

12

13

14

15

16

17

18

19

A A

20

21

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2007/09/20 2008/09/20

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size D ocument Number Rev

Custom

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

PIR (PWR)

KIWAX_LA-5082P

0.4

50 53W ednesday, March 18, 2009

1

0.4

5

4

3

2

1

NO DATE PAGE MODIFICATION LIST PURPOSE

-----------------------------------------------------------------------------------------------------------------------------------------------

1

12/10 39 Remove D11, and add R22, R25

12/10 36 change PWR_LED_SC# from U46.38 to U46.34

D D

C C

B B

A A

Title

Size Docum ent Number Rev

B

Date: Sheet of

5

4

3

2

Date: Sheet of

Compal Electronics, Inc.

HW PIR

KIWAX_LA-5082P 0.4

51 53Wednesday, March 18, 2009

1

5

4

3

2

1

NO DATE PAGE MODIFICATION LIST PURPOSE

-----------------------------------------------------------------------------------------------------------------------------------------------

1 1/15 39 modify H19 hold size, and change the H5、H6 and H19 hold type.

add 4 CAPs C52, C53, C54 and C55 for EMI.42

35 change C572 and C574 footprint from 0603 to 0402.

D D

2 1/16 30 Remove one Mini-PCIE function! (Connector Side)

28

C C

add R44 for BEEP# test34

Remove component is JP18, R363, R364, R367, R369, R371, R373, R375, R377, R378, R379, R380 and R383 Remove 3G function!

Remove component is JP14, D12, R6, C6, C7, R7 and D13 Remove one Mini-PCIE function!(SB side)

Remove component is C884 and C885

B B

A A

Title

Size Docum ent Number Rev

B

Date: Sheet of

5

4

3

2

Date: Sheet of

Compal Electronics, Inc.

HW PIR

KIWAX_LA-5082P 0 .4

52 53Wednesday, March 18, 2009

1

5

4

3

2

1

NO DATE PAGE MODIFICATION LIST PURPOSE

-----------------------------------------------------------------------------------------------------------------------------------------------

1 3/16 06 add R1089, C1162 and H_DPRSTP#_R

add C1163, C1164,and C1165 for EMC request.

D D

2 3/16 28 change PCIE Port1 to Port3

C C

08 change H_DPRSTP# to H_DPRSTP#_R

P19 add Bom structure 40nm@ GPU and 55nm@ GPU19

R999 change to 24.9K

23 add R1095 pull high

swap HP_OUTL and HP_OUTR35

36 add R1090, R1091, R1092, R1093

CAPS_LED#, NUJM_LED#, ESB_CK_R, and ESB_DA_R

41 add R256, R258 Bom configuration

Remove CY SMBus

42 add C1166, C1167 for EMC request.

30 change PCIE Port1 to Port3

B B

A A

Title

Size Docum ent Number Rev

B

Date: Sheet of

5

4

3

2

Date: Sheet of

Compal Electronics, Inc.

HW PIR

KIWAX_LA-5082P 0 .4

53 53Wednesday, March 18, 2009

1

Lenovo 3000, G550 Schematics

Specifications and Main Features

Frequently Asked Questions

User Manual