
Rev. 01c
LD7535/LD7535A
12/11/2007
Green-Mode PWM Controller with Integrated Protections
General Description
The LD7535/LD7535A are low cost, low startup current,
current mode PWM controllers with green-mode power-
saving operation. The integrated functions include the
leading-edge blanking of the current sensing, internal slope
compensation and the tiny package of SOT-26. They
provide the users a superior AC/DC power application of
higher efficiency, low external component counts, and lower
cost solution.
Furthermore, LD7535/LD7535A features more protections
like OLP (Over Load Protection) and OVP (Over Voltage
Protection) to eliminate the external protection circuits. And
to satisfy different designs, 2 versions of OVP levels are
implemented as ---
z LD7535 --- 28.0V ± 1.5V.
z LD7535A --- 21.0V ± 1.5V.
Typical Application
Features
z High-Voltage CMOS Process with Excellent ESD
protection
z Very Low Startup Current (<20μA)
z Current Mode Control
z Non-audible-noise Green Mode Control
z UVLO (Under Voltage Lockout)
z LEB (Leading-Edge Blanking) on CS Pin
z Programmable Switching Frequency
z Internal Slope Compensation
z OVP (Over Voltage Protection) on Vcc Pin
z OLP (Over Load Protection)
z 300mA Driving Capability
Applications
z Switching AC/DC Adaptor and Battery Charger
z Open Frame Switching Power Supply
z 384X Replacement
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LD7535&LD7535A-DS-01c December 2007

LD7535/LD7535A
Pin Configuration (LD7535)
DIP-8 (TOP VIEW)
GND
COMP
7 6 5
TOP MARK
YYWW##
1 8 2 3 4
OUT
VCC
YY, Y : Year code (D: 2004, E: 2005…..)
WW, W: Week code
P : LD75..
## : Production code
Pin Configuration (LD7535A)
DIP-8 (TOP VIEW)
GND
COMP
7 6 5
TOP MARK
YYWW##
NC
RT
CS
NC
(Product family code)
NC
RT
SOT-26 (TOP VIEW)
456
35
WP
Y
123
The PB free package is identified
Y
in embossed font while green
package in regular font.
SOT-26 (TOP VIEW)
35A
WP
Y
123
456
1 8 2 3 4
CS
OUT
YY, Y : Year code (D: 2004, E: 2005…..)
WW, W: Week code
P : LD75..
## : Production code
NC
VCC
(Product family code)
Y
Ordering Information
Part number Package TOP MARK Shipping
LD7535 BL SOT-26 PB Free YWP/35 3000 /tape & reel
LD7535 GL SOT-26 Green Package YWP/35 3000 /tape & reel
LD7535 BN DIP-8 PB Free LD7535BN 3600 /tube /Carton
LD7535A BL SOT-26 PB Free YWP/35A 3000 /tape & reel
LD7535A GL SOT-26 Green Package YWP/35A 3000 /tape & reel
LD7535A BN DIP-8 PB Free LD7535ABN 3600 /tube /Carton
The LD7535/ LD7535A are ROHS Complaint/ Green Package.
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LD7535&LD7535A-DS-01c December 2007
The PB free package is identified
in embossed font while green
package in regular font.

Pin Descriptions
PIN NAME FUNCTION
1 GND Ground
2 COMP
3 RT
4 CS Current sense pin, connect to sense the MOSFET current
5 VCC Supply voltage pin
6 OUT Gate drive output to drive the external MOSFET
LD7535/LD7535A
Voltage feedback pin (same as the COMP pin in UC384X), By connecting
a photo-coupler to close the control loop and achieve the regulation.
This pin is to program the switching frequency. By connecting a resistor
to ground to set the switching frequency.
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LD7535&LD7535A-DS-01c December 2007

Block Diagram
LD7535/LD7535A
*
Note: OLP delay is 60mS when the switching frequency is set as 65KHz.
The OLP delay time is proportional to the period of switching cycle.
1
That is,
TT =∝
.
sdelay_OLP
f
s
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LD7535&LD7535A-DS-01c December 2007

LD7535/LD7535A
Absolute Maximum Ratings
Supply Voltage VCC 30V
COMP, RT, CS
Junction Temperature
Operating Ambient Temperature
Storage Temperature Range
Package Thermal Resistance (SOT-26)
Package Thermal Resistance (DIP-8)
Power Dissipation (SOT-26, at Ambient Temperature = 85°C)
Power Dissipation (DIP-8, at Ambient Temperature = 85°C)
Lead temperature (Soldering, 10sec)
ESD Voltage Protection, Human Body Model
ESD Voltage Protection, Machine Model
Gate Output Current 300mA
-0.3 ~7V
150°C
-40°C to 85°C
-65°C to 150°C
250°C/W
100°C/W
250mW
650mW
260°C
3KV
250V
Caution:
Stresses beyond the ratings specified in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only
rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not
implied.
Recommended Operating Conditions
Item Min. Max. Unit
Supply Voltage Vcc (LD7535) 11 25 V
Supply Voltage Vcc (LD7535A) 11 18 V
Switching Frequency 50 130 KHz
Startup Resistor Value 1.2 4.4 MΩ
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LD7535&LD7535A-DS-01c December 2007

LD7535/LD7535A
Electrical Characteristics
(TA = +25oC unless otherwise stated, VCC=15.0V)
PARAMETER CONDITIONS MIN TYP MAX UNITS
Supply Voltage (Vcc Pin)
Startup Current 8 20 μA
V
=0V 2.0 3.0 mA
Operating Current
(with 1nF load on OUT pin)
UVLO (off) 9.0 10.0 11.0 V
UVLO (on) 15.0 16.0 17.0 V
OVP Level
Voltage Feedback (Comp Pin)
Short Circuit Current V
Open Loop Voltage COMP pin open 6.0 V
Green Mode Threshold VCOMP 2.35 V
Current Sensing (CS Pin)
Maximum Input Voltage, Vcs(off) 0.80 0.85 0.90 V
Leading Edge Blanking Time 350 nS
Input impedance 1 MΩ
Delay to Output 100 nS
Oscillator (RT pin)
Frequency RT=100KΩ 60 65 70 KHz
Green Mode Frequency Fs=65KHz 20 KHz
Temp. Stability (-40°C ~105°C) 3 %
Voltage Stability (VCC=11V-25V) 1 %
Gate Drive Output (OUT Pin)
Output Low Level VCC=15V, Io=20mA 1 V
Output High Level VCC=15V, Io=20mA 8 V
Rising Time Load Capacitance=1000pF 50 200 nS
Falling Time Load Capacitance=1000pF 30 100 nS
OLP (Over Load Protection)
OLP Trip Level V
OLP Delay Time (note) Fs=65KHz 60 mS
Note: The OLP delay time is proportional to the period of switching cycle. So that, the lower RT value will set the higher switching
frequency and the shorter OLP delay time.
COMP
V
=3V 2.5 mA
COMP
Protection tripped (OLP, OVP) 0.5 mA
LD7535 26.5 28.0 29.5 V
LD7535A 19.5 21.0 22.5 V
=0V 1.5 2.2 mA
COMP
(OLP) 5.0 V
COMP
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LD7535&LD7535A-DS-01c December 2007

LD7535/LD7535A
Typical Performance Characteristics
18.0
17.2
16.4
15.6
UVLO (on) (V)
14.8
14.0
-40 0 40 80 120 125
Temperature (°C)
Fig. 1 UVLO (on) vs. Temperature
70
68
66
64
12
11. 2
10.4
9.6
UVLO (off) (V)
8.8
8
-40
0
40 80 120 125
Temperature (°C)
Fig. 2 UVLO (off ) vs. Temperature
26
24
22
20
Frequency (KHz)
62
18
Green Mode Frequency (KHz)
60
-40
0 40 80 120 125
Temperature (°C)
Fig. 3 Frequency vs. Temperature
70
68
66
64
Frequency (KHz)
62
60
12 14 16 18 20 22 24
11 25
Vcc (V)
Fig. 5 Frequency vs. Vcc
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LD7535&LD7535A-DS-01c December 2007
16
-40
0
40 80
120 125
Temperature (°C)
Fig. 4 Green Mode Frequency vs. Temperature
25
23
21
19
17
Green Mode Frequency (KHz)
15
12 14 16 18 20 22 2411 25
Vcc (V)
Fig. 6 Green Mode Frequency vs. Vcc

LD7535/LD7535A
85
0.90
80
75
70
Max Duty (%)
65
60
-40 0 40 80 120 125
Temperature (°C)
Fig. 7 Max Duty vs. Temperature
12
10
8
6
Istartup (μA)
4
2
0.88
0.86
(off) (V)
CS
V
0.84
0.82
0.80
-40 0 40 80 120 125
Temperature (°C)
35
30
25
20
Fig. 8 V
(off) vs. Temperature
CS
LD7535
LD7535A
VCC OVP (V)
15
0
-40 0 40 80 120 125
Temperature (°C)
Fig. 9 Startup Current (Istartup) vs. Temperature
7.0
6.5
6.0
10
-40 0 40 80 120 125
Temperature (°C)
Fig. 10 VCC OVP vs. Temperature
6.0
5.5
5.0
(V)
COMP
5.5
V
5.0
4.5
-40 0 40 80 120 125
Temperature (°C)
Fig. 11 V
open loop voltage vs. Temperature
COMP
OLP (V)
4.5
4.0
3.5
-40 0 40
Fig. 12 OLP-Trip Level vs. Temperature
Temperature (°C)
80
120 125
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LD7535/LD7535A
Application Information
Operation Overview
The LD7535/LD7535A meet the green-power requirement
and are intended for the use in those modern switching
power suppliers and adaptors which demand higher power
efficiency and power-saving. They integrated more functions
to reduce the external component counts and the size. Their
major features are described as below.
Under Voltage Lockout (UVLO)
An UVLO comparator is implemented in it to detect the
voltage on the VCC pin. It would assure the supply voltage
enough to turn on the LD7535/LD7535A PWM controller
and further to drive the power MOSFET. As shown in Fig.
13, a hysteresis is built in to prevent the shutdown from the
voltage dip during startup. The turn-on and turn-off
threshold level are set at 16.0V and 10.0V, respectively.
PWM controller will help to increase the value of R1 and
then reduce the power consumption on R1. By using CMOS
process and the special circuit design, the maximum startup
current of LD7535/LD7535A is only 20μA.
If a higher resistance value of the R1 is chosen, it usually
takes more time to start up. To carefully select the value of
R1 and C1 will optimize the power consumption and startup
time.
Vcc
UVLO(on)
UVLO(off)
t
I(Vcc)
startup current
(~uA)
operating current
(~ mA)
t
Fig. 13
Startup Current and Startup Circuit
The typical startup circuit to generate the LD7535/LD7535A
Vcc is shown in Fig. 14. During the startup transient, the
Vcc is lower than the UVLO threshold thus there is no gate
pulse produced from LD7535/LD7535A to drive power
MOSFET. Therefore, the current through R1 will provide
the startup current and to charge the capacitor C1.
Whenever the Vcc voltage is high enough to turn on the
LD7535/LD7535A and further to deliver the gate drive signal,
the supply current is provided from the auxiliary winding of
the transformer. Lower startup current requirement on the
Fig. 14
Current Sensing and Leading-edge Blanking
The typical current mode of PWM controller feedbacks both
current signal and voltage signal to close the control loop
and achieve regulation. As shown in Fig. 15, the
LD7535/LD7535A detect the primary MOSFET current from
the CS pin, which is not only for the peak current mode
control but also for the pulse-by-pulse current limit. The
maximum voltage threshold of the current sensing pin is set
at 0.85V. From above, the MOSFET peak current can be
obtained from below.
V85.0
I =
)MAX(PEAK
R
S
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LD7535&LD7535A-DS-01c December 2007

LD7535/LD7535A
Fig. 15
A 350nS leading-edge blanking (LEB) time is included in the
input of CS pin to prevent the false-trigger from the current
spike. In the low power application, if the total pulse width of
the turn-on spikes is less than 350nS and the negative spike
on the CS pin doesn’t exceed -0.3V, it could eliminated the
R-C filter (as shown in the figure16).
However, the total pulse width of the turn-on spike is
decided by the output power, circuit design and PCB layout.
It is strongly recommended to adopt a smaller R-C filter (as
shown in figure 17) for higher power application to avoid the
CS pin being damaged by the negative turn-on spike.
Fig. 16
Output Stage and Maximum Duty-Cycle
An output stage of a CMOS buffer, with typical 300mA
driving capability, is incorporated to drive a power MOSFET
directly. And the maximum duty-cycle of LD7535/LD7535A
is limited to 75% to avoid the transformer saturation.
Oscillator and Switching Frequency
Connect a resistor from RT pin to GND according to the
equation below to program the normal switching frequency:
RT
0.65
×=
)K(
Ω
f
SW
The operating frequency range for the LD7535/LD7535A is
recommended to set between 50KHz and 130KHz.
)KHz(100
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LD7535&LD7535A-DS-01c December 2007
Fig. 17
Voltage Feedback Loop
The voltage feedback signal is provided from the TL431 at
the secondary side through the photo-coupler to the COMP
pin of the LD7535/LD7535A. Similar to UC3842, the
LD7535/LD7535A would carry 2 diodes voltage offset at the
stage to feed the voltage divider at the ratio of 1/3, that is,

LD7535/LD7535A
V
−
COMPARATOR
A pull-high resistor is embedded internally and can be
eliminated externally.
1
3
Internal Slope Compensation
In the conventional application, the problem of the stability is
a critical issue for current mode controlling, when it operates
in higher than 50% of the duty-cycle. As UC384X, It takes
slope compensation from injecting the ramp signal of the
RT/CT pin through a coupling capacitor. It therefore requires
no extra design for the LD7535/LD7535A since it has
integrated it already.
On/Off Control
The LD7535/LD7535A can be turned off by pulling COMP
pin lower than 1.2V. The gate output pin of the
LD7535/LD7535A will be disabled immediately under such
condition. The off-mode can be released when the pull-low
signal is removed.
Dual-Oscillator Green-Mode Operation
There are many different topologies has been implemented
in different chips for the green-mode or power saving
requirements such as “burst-mode control”, “skipping-cycle
mode”, “variable off-time control “…etc. The basic operation
theory of all these approaches intended to reduce the
switching cycles under light-load or no-load condition either
by skipping some switching pulses or reduce the switching
frequency.
By using this dual-oscillator control, the green-mode
frequency can be well controlled and further to avoid the
generation of audible noise.
OVP (Over Voltage Protection) on Vcc
The VGS ratings of the nowadays power MOSFETs are often
limited up to max. 30V. To prevent the V
condition, LD7535/LD7535A are implemented an OVP
function on Vcc. Whenever the Vcc voltage is higher than
the OVP threshold voltage, the output gate drive circuit will
be shutdown simultaneously thus to stop the switching of
the power MOSFET until the next UVLO(on).
GS
)V2V(
−×=
FCOMP)PWM(
from the fault
The Vcc OVP function in LD7535/LD7535A is an
auto-recovery type protection. If the OVP condition,
usually caused by the feedback loop opened, is not
released, the Vcc will tripped the OVP level again and
re-shutdown the output. The Vcc is working as a hiccup
mode. The Figure. 18 shows its operation.
On the other hand, if the OVP condition is removed, the Vcc
level will get back to normal level and the output will
automatically return to the normal operation.
Fig. 18
The OVP levels are ---
z LD7535 --- 28.0V ± 1.5V.
z LD7535A --- 21.0V ± 1.5V.
Over Load Protection (OLP)
To protect the circuit from being damaged under over load
condition or short condition, a smart OLP function is
implemented in the LD7535/LD7535A. The figure 20 shows
the waveforms of the OLP operation. In this case, the
feedback system will force the voltage loop proceed toward
the saturation and then pull up the voltage on COMP pin
(V
). Whenever the V
COMP
5V and stays longer than 60mS, the protection will activate
and then turn off the gate output to stop the switching of
power circuit. The 60mS delay time is to prevent the false
trigger from the power-on and turn-off transient.
By such protection mechanism, the average input power
can be reduced to very low level so that the component
temperature and stress can be controlled within the safe
operating area.
trips up to the OLP threshold
COMP
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LD7535&LD7535A-DS-01c December 2007

UVLO(on)
UVLO(off)
VCC
OLP
COMP
60mS
5.0V
OUT
Switching SwitchingNon-Switching
UVLO(off)
OLP Reset
OLP trip Level
Fig. 19
LD7535/LD7535A
Under the conditions listed below, the gate output will turn
off immediately to protect the power circuit ---
y RT pin short to ground
y RT pin floating
y CS pin floating
t
t
t
Fault Protection
There are several critical protections were integrated in the
LD7535/LD7535A to prevent the power supply or adapter
from being damaged. Those damages usually come from
open or short condition on the pins of LD7535/LD7535A.
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LD7535/LD7535A
Reference Application Circuit --- 10W (5V/2A) Adapter
Schematic
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LD7535&LD7535A-DS-01c December 2007

LD7535/LD7535A
Reference Application Circuit --- 10W (5V/2A) Adapter
BOM
P/N Component Value Original
R1A N/A
R1B N/A
R2A 750KΩ, 1206
R2B 750KΩ, 1206
R4A 39KΩ, 1206
R4B 39KΩ, 1206
R6 10Ω, 1206
R7 10Ω, 1206
R8 10KΩ, 1206
RS1 2.70Ω, 1206, 1%
RS2 2.70Ω, 1206, 1%
RT 100KΩ, 0805, 1%
R51A 100Ω, 1206
R51B 100Ω, 1206
R52 2.49KΩ, 0805, 1%
R53 2.49KΩ, 0805, 1%
R54 220Ω, 0805
R55 10KΩ, 0805
R56A 510Ω, 1206
R56B N/A
NTC1 08SP005
FL1 20mH UU9.8
T1 EI-22
L51 2.7μH
P/N Component Value Note
C1 22μF, 400V L-tec
C2 10μF, 50V
C4 1000pF, 1000V, 1206 Holystone
C5 0.01μF, 16V, 0805
C51 1000pF, 50V, 0805
C52 1000μF, 10V L-tec
C54 470μF, 10V L-tec
C55 0.01μF, 16V, 0805
CX1 0.1μF X-cap
CY1 2200pF Y-cap
D1A 1N4007
D1B 1N4007
D1C 1N4007
D1D 1N4007
D2 PS102R
D4 1N4007
Q1 2N60B 600V/2A
CR51 SB540
ZD51 6V2C
IC1 LD7535/LD7535A BL SOT-26
IC2 EL817B
IC51 TL431 1%
F1 250V, 1A
Z1 N/A
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LD7535&LD7535A-DS-01c December 2007

LD7535/LD7535A
Reference Application Circuit #2 --- 10W Adapter with 2-Stage Startup Circuit
Pin < 0.25W when Pout = 0W
2-stage Startup
Circuit
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LD7535&LD7535A-DS-01c December 2007

LD7535/LD7535A
Reference Application Circuit #2 --- 10W Adapter with 2-Stage Startup Circuit
BOM
P/N Component Value Original
R1A N/A
R1B N/A
R2A 2.2MΩ, 1206
R2B 2.2MΩ, 1206
R4A 39KΩ, 1206
R4B 39KΩ, 1206
R6 2.2Ω, 1206
R7 10Ω, 1206
R8 10KΩ, 1206
RS1 2.70Ω, 1206, 1%
RS2 2.70Ω, 1206, 1%
RT 100KΩ, 0805, 1%
R51A 100Ω, 1206
R51B 100Ω, 1206
R52 2.49KΩ, 0805, 1%
R53 2.49KΩ, 0805, 1%
R54 220Ω, 0805
R55 10KΩ, 0805
R56A 1KΩ, 1206
R56B N/A
NTC1 5Ω, 3A 08SP005
FL1 20mH UU9.8
T1 EI-22
L51 2.7μH
P/N Component Value Note
C1 22μF, 400V L-tec
C2 10μF, 50V L-tec
C3 2.2μF, 50V
C4 1000pF, 1000V, 1206 Holystone
C5 0.01μF, 16V, 0805
C51 1000pF, 50V, 0805
C52 1000μF, 10V L-tec
C54 470μF, 10V L-tec
C55 0.01μF, 16V, 0805
CX1 0.1μF X-cap
CY1 2200pF Y-cap
D1A 1N4007
D1B 1N4007
D1C 1N4007
D1D 1N4007
D2 PS102R
D3 1N4148
D4 1N4007
Q1 2N60B 600V/2A
CR51 SB540
ZD51 6V2C
IC1 LD7535/LD7535A IL SOT-26
IC2 EL817B
IC51 TL431 1%
F1 250V, 1A
Z1 N/A
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LD7535&LD7535A-DS-01c December 2007

Package Information
SOT-26
LD7535/LD7535A
Symbol
A 2.692 3.099 0.106 0.122
B 1.397 1.803 0.055 0.071
C ------- 1.450 ------- 0.058
D 0.300 0.550 0.012 0.022
F 0.838 1.041 0.033 0.041
H 0.080 0.254 0.003 0.010
I 0.050 0.150 0.002 0.006
J 2.600 3.000 0.102 0.118
M 0.300 0.600 0.012 0.024
θ 0° 10° 0° 10°
Dimension in Millimeters Dim en s ions in Inches
Min Max Min Max
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LD7535&LD7535A-DS-01c December 2007

Package Information
DIP-8
LD7535/LD7535A
Symbol
A 9.017 10.160 0.355 0.400
B 6.096 7.112 0.240 0.280
C ----- 5.334 ------ 0.210
D 0.356 0.584 0.014 0.023
E 1.143 1.778 0.045 0.070
F 2.337 2.743 0.092 0.108
I 2.921 3.556 0.115 0.140
J 7.366 8.255 0.290 0.325
L 0.381 ------ 0.015 --------
Dimension in Millimeters Dim en s ions in Inches
Min Max Min Max
Important Notice
Leadtrend Technology Corp. reserves the right to make changes or corrections to its products at any time without notice. Customers should
verify the datasheets are current and complete before placing order.
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LD7535&LD7535A-DS-01c December 2007

Revision History
Rev. Date Change Notice
00 03/01/’06 Renew from the LD7535 spec. (Rev=0) by adding the LD7535A related descriptions and
01 01/11/07 Revision: Block Diagram and Characteristic
01a 5/17/07 Revision: Marking description
01b 11/29/07 Revision: green package option
01c 12/11/07 Revision: Block Diagram/ LD7535A OVP
LD7535/LD7535A
data. The revision number is reset from 0.
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LD7535&LD7535A-DS-01c December 2007