
User Guide
FPGA-UG-02057 Version 1.0
June 2018
iCE40 UltraPlus 6:1 MIC Aggregation over SPI
Demo

iCE40 UltraPlus 6:1 MIC Aggregation over SPI Demo
User Guide
Contents
Acronymns in This Document ........................................................................................................................................ 3
1. Introduction .......................................................................................................................................................... 4
2. Functional Description ........................................................................................................................................... 4
2.1. Demo Design Overview ................................................................................................................................ 4
3. Demo Setup .......................................................................................................................................................... 5
3.1. Hardware Requirements ............................................................................................................................... 5
3.2. Software Requirements ................................................................................................................................ 5
3.3. Configuring the MDP Board .......................................................................................................................... 5
3.3.1. Setting Jumpers and Switches ................................................................................................................... 5
4. Programming the Demo ........................................................................................................................................ 7
4.1. Programming the Bitstream to the iCE40 UltraPlus MDP ............................................................................... 7
5. Running the Demo ................................................................................................................................................. 9
5.1. Using Windows Application .......................................................................................................................... 9
5.2. Oscilloscope Connection Points .................................................................................................................. 10
Appendix A. Schematic Diagram .................................................................................................................................. 11
Appendix B. Bill of Materials ........................................................................................................................................ 12
Technical Support ....................................................................................................................................................... 13
Revision History .......................................................................................................................................................... 13
Figures
Figure 2.1. iCE40 UltraPlus 6:1 MIC Aggregation over SPI Demo Overview ..................................................................... 4
Figure 2.2. iCE40 UltraPlus 6:1 MIC Aggregation over SPI Demo Block Diagram .............................................................. 4
Figure 3.1. iCE40 UltraPlus MDP Configuration .............................................................................................................. 5
Figure 3.2. 8 to 1 Mic Aggregator Board (Daughter Board) ............................................................................................. 6
Figure 3.3. iCE40 UltraPlus MDP and 8 to 1 Mic Aggregator Board ................................................................................. 6
Figure 4.1. Device Properties ......................................................................................................................................... 7
Figure 5.1. J30 Section on MDP Board ......................................................................................................................... 10
Figure 5.2. Header to Connect to the Oscilloscope ....................................................................................................... 10
Tables
Table 3.1. Detailed Information of the Board Configuration ........................................................................................... 6
All other brand or product names are trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.
2 FPGA-UG-02057-1.0
© 2018 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal.

iCE40 UltraPlus 6:1 MIC Aggregation over SPI Demo
Field-Programmable Gate Array
Mobile Development Platform
Serial Peripheral Interface
User Guide
Acronymns in This Document
A list of acronyms used in this document.
All other brand or product names are trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.
FPGA-UG-02057-1.0 3
© 2018 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal.

iCE40 UltraPlus 6:1 MIC Aggregation over SPI Demo
iCE40
UltraPlus
Device
6 PDM
microph ones
Applications
SPI
PDM2PCM
CIC Filter 1
CIC Filter 2
CIC Filter 3
CIC Filter 4
CIC Filter 5
CIC Filter 6
Compensation Filter 1
Compensation Filter 2
Compensation Filter 3
Compensation Filter 4
Compensation Filter 5
Compensation Filter 6
PDM data from
daughter board’s
6 microphones
iCE40 UltraPlus
Audio
Buffer
SPI Bus
Applications
(SPI master)
Control
Signals
PCM
Data
SPI
Signals
User Guide
1. Introduction
I²S (Inter-IC Sound) bus is widely used to communicate Pulse Code Modulation (PCM) audio data between integrated
circuits in an electronic device. The standard I²S protocol, however, is designed to transfer only two channels (LEFT and
RIGHT) on a data line. This limitation can be addressed by using Serial Peripheral Interface (SPI), an interface bus
commonly used to send data between microcontrollers and small peripherals.
The iCE40 UltraPlus™ 6:1 MIC Aggregation over SPI demo addresses a market opportunity to transfer up to six
microphones channels using an SPI bus.
2. Functional Description
2.1. Demo Design Overview
The iCE40 UltraPlus 6:1 MIC Aggregation over SPI demo implements an SPI bus using the iCE40 UltraPlus FPGA. The
demo uses FPGA-B on the primary iCE40 UltraPlus Mobile Development Platform (MDP), plus a daughter board with six
Pulse Density Modulation (PDM) microphones for the input sources. Sound generated by the microphones can be
captured and heard through Windows applications. This version of the the project design uses the Lattice Radiant
Software tool.
Figure 2.1 shows an overview diagram of the iCE40 UltraPlus 6:1 MIC Aggregation over SPI demo.
Figure 2.2 shows the iCE40 UltraPlus 6:1 MIC Aggregation over SPI demo block diagram.
Figure 2.1. iCE40 UltraPlus 6:1 MIC Aggregation over SPI Demo Overview
Figure 2.2. iCE40 UltraPlus 6:1 MIC Aggregation over SPI Demo Block Diagram
All other brand or product names are trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.
© 2018 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal.
4 FPGA-UG-02057-1.0

iCE40 UltraPlus 6:1 MIC Aggregation over SPI Demo
J23 Pins 2-3
SW5-1 ON
SW5-2 OFF
J28 – Disconnect
J27 Pins 9-10
J26 Pins 9-10
R30
J25 Pins 1-2
J25 Pins 5-6
J19 Pins 1-2 and
Pins 3-4 (Horizontal)
J17 Pins 9-10
User Guide
3. Demo Setup
The following hardware and software are required to run the iCE40 UltraPlus 6:1 MIC Aggregation over SPI demo.
3.1. Hardware Requirements
iCE40 UltraPlus MDP (PN: iCE40UP5K-MDP-EVN)
8 to 1 Mic Aggregator Board (Daughter Board) (PN: LF-81AGG-EVN)
3.2. Software Requirements
Lattice Radiant 1.0
Radiant Programmer (Version 1.0 or later)
System Solution Platform (SSP)
Note: SSP installer and installation guide are included with this solution under SSP folder. Follow the instructions in the
guide to install this application properly.
3.3. Configuring the MDP Board
3.3.1. Setting Jumpers and Switches
Board reconfiguration is needed before running this demo. Figure 3 highlights (in orange boxes) all switches and
jumpers need to be verified or reconfigured on Mobile Development Platform (MDP) board.
Figure 3.1. iCE40 UltraPlus MDP Configuration
Note: This demo uses FPGA-B.
All other brand or product names are trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.
FPGA-UG-02057-1.0 5
© 2018 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal.