Larcan MX1000U, MX1000UX User Manual

Publication TSM 20-319
TECHNICAL MANUAL
1KW UHF INTERNALLY D IPLEXED TV TRANSMITTER
MX1000U SERIES
LARCAN INC. 228 AMBASSADOR DRIVE MISSISSAUGA, ONTARIO CANADA L5T 2J2
PHONE: (905) 564 -9222 FAX: (905) 564 -9244
Rev 1: March 2003
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INTRODUCTION
This manual describes the LARCAN model MX1000U, internally diplexed UHF television transmitter.
LARCAN all -solid-state 1 kW UHF transmitters are designed to operate conservatively at 1 kW peak sync visual/vision RF power and 100W average aural/sound single carrier RF power, with superb performance, reliability and operating economy. The MX1000U transmitter accepts an on-channel internally diplexed (in a 10:1 ratio vis to aur/snd) composite driving signal of 10 mW peak visual RF, as input to its RF chain.
The 1 kW transmitter is self-contained within a single 19" cabinet with an integral cooling fan and filtered rear door air intake. The simplicity of design, the employment of modular subassemblies, and the use of standard readily available components, also enhances serviceability.
Important transmitter parameters are monitored, and can be displayed on the meters built into the transmitter control panel. Additionally, telemetry readings are made available as DC signals for monitoring by remote control systems. The MX1000U, like all other LARCAN transmitting equipment, is suitable for unattended remote-control operation.
AMPLIFIER CHAIN (REFER TO FIGURE 1)
The Aural signal of the transmitter is diplexed (at IF) with the visual/vision signal within the exciter (hence the term "internally diplexed), and is amplified in common with the visual signal in the above amplifier chain (hence the term common amplification).
The internally diplexed composite RF output of the exciter/translator is fed to a 4-way active splitter. The 4 outputs of the splitter are fed to conservatively designed broadband solid-state amplifiers. The outputs from the four PA modules are combined for the tot al transmitter output power. These amplifiers require no tuning or adjustment. Phasing for the four PA modules is done at the splitter level. Internal cable lengths and precise production tolerances allow for a very small adjustment range for phasing. Simplicity of operation, reduced maintenance costs and increased reliability are a few of the major benefits derived from this modular amplifier design. The modules are operated well below their maximum ratings.
Each RF power amplifier (PA module) is fully modular within itself and each module has a gain equivalent to the entire gain of the transmitter (see Figure 2). Each PA module has it's own preamplifier, Intermediate PA, Driver and PA section. The front end preamplifier on the PA module monitors an d provides soft startup, overdrive and VSWR protection for the module itself (independent of the transmitter protection). The output stage of the module consists of three amplifier "pallets" each consisting of two push-pull LDMOS FET amplifiers that operate in class AB, and are combined in quadrature. The outputs of these pallets are further combined in a 3­way combiner. The amplifier module is rated for 350 watts, and in the present four PA module system is operated at a total transmitter power of 1 kW sync peak + 100 watts aural/sound. The module is provided with a test jack for monitoring.
The amplifier output is fed to the bandpass filter and a directional coupler, which provides a small sample of forward and reflected output power for metering, AGC and VSWR supervisory functions. An additional sample is available for monitoring and transmitter setup. The transmitter output then passes to the antenna system.
TRANSMITTER CONTROL
The control circuitry in this solid state transmitter is straightforward and simple. The use of latching type relays ensures that the transmitter state (on/off, or trip status) is “remembered” under power failure conditions. Interlocking is provided for loss of airflow and for over temperature conditions. An additional interlock connection point is provided for interlocking the transmitter to an external patch panel.
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Facilities are provided on the control board for telemetry, status, and control connections to and from a remote control system. Thes e are available on 25 pin D-sub connector.
For remote control operation, simply press the REMOTE switch (LED illuminated). This places +12V on Remote Enable line and allows the transmitter to be turned on and off via remote control. In this mode the tra nsmitter cannot be turned on locally but for safety purposes, the transmitter can always be turned off locally while in REMOTE.
The Remote Enable +12V appears as an arming signal at J5-5. A momentary connection of this +12V to J5 -13 turns the transmitter ON, and momentary connection of the +12V to J5-8; turns the transmitter OFF.
Control circuit power for the transmitter is supplied by two redundant power supplies wired in parallel. The failure of either power supply will not affect the operation of the transmitter.
The transmitter's power supply consists of two ferro-resonant transformers each with dual secondary windings. Each transformer secondary feeds a rectifier/filter and linear regulator combination. The regulator modules are located inside the rear door of the transmitter and can be removed for servicing by first disconnecting the two cables and then unplugging the module. This can be done without turning off the transmitter.
A two pole fused disconnect or breaker is required for transmitter connection from line-to-line. The transmitter is wired per Figure 5.
Press the OFF button on the control panel. Pull out the regulators so they are no longer mating with their respective AC power connectors. Turn on the power supply breakers. Press the ON button. Looking into the back of the transmitter DS6 and DS7 on the AC distribution board should be illuminated (refer to figure 3). If the blower comes on and DS6 and DS7do not, then the AC Distribution board needs to be bench tested.
Press the OFF button again. Install the regulators but disconnect the cables that mate at the top of each regulator (connecting the regulators to the PAs). Turn on the transmitter. Measure the voltage on the output connectors of the regulators. The voltage should be 28V
(±0.5V) for each regulator. Note: Since the regulators have no load, when the transmitter is subsequently turned off it will take a while for the voltage to decay down to zero.
Turn off the transmitter. Reconnect the cables to the regulators. Turn the RF drive level down as far as it will go at the appropriate OUTPUT LEVEL/RF OUTPUT adjustment on the exciter. Alternatively, disconnect the drive from the output of the exciter. Turn on the transmitter. Using a clamp-on current meter, measure the current going from the regulators to the PA's. Measure the current going through the +28V supply cables and not the return cables (some of the ground current may return through the transmitter chassis as opposed to the return wires, causing the current reading to be lower than it actually is). The 28V supply cables are the two lower wires in the cable assembly (Figure 4). These are accessible by pushing back the protective covering on the cable. The front panel current meter (the digital LCD meter) can now be calibrated for each PA module. (Remember that the modules are numbered 1-4 from left to right across the front of the transmitter. This will be reversed when looking into the rear of the cabinet.) The corresponding adjustment pot on the control panel (PC board 20C2065G1) is listed below.
PA1 Pot R221 PA2 Pot R225
PA3 Pot R229 PA4 Pot R223 These adjustments can be accessed by opening the hinged control panel on the front of the transmitter.
Disable the AGC using the front panel AGC Enable switch. Note: the AGC is disabled when the LED on the enable switch is off. Increase the output power from the exciter until 100%
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operating power in achieved. Use a thru-line type Wattmeter to measure the transmitter power. Select FWD on the analog meter select switch and adjust R164 on the control board until the forward power meter (analog meter) reads 100%.
To calibrate the aural power, refer to the RF detector board description and setup procedure.
Calibration of the reflected power metering and the VSWR cutback and trip is detailed next.
Note, this setup was done at the factory initially, and should not be adjusted unless absolutely necessary. Conditions that would warrant this adjustment include the replacement of the RF detector assembly or the control PC board.
Turn R130 fully CW and R138, and R128 fully CCW
The Reflected power meter reading corresponds to 10X the actual power reflected. That is,
when the reflected power meter reads 100%, this means 10% of the output power is being reflected (ie: there is a VSWR of 1.9:1 at the transmitter output). (10dB match). To calibrate the meter for this level, the forward sample port that feeds the RF detector circuitry for metering is fed through a 10dB attenuator back to the reflected power input on the RF detector board. To do this, disconnect the cable at the forward port of the output directional couple and connect Reflected power sample cable through a 10dB pad to the forward power port. This simulates having a 10dB mismatch on the output of the transmitter. Not e: AGC must be disabled during this procedure. Adjust R117 until a 100% reading is achieved on the RFL power setting of the analog meter.
Change the attenuation from 10dB to 16db of the forward power into the reflected port on the metering board. Adjust R138 so that the power just starts to cutback slightly
Adjust R130 so that the VSWR CUTBACK LED just turns on.
Change the attenuation to 13dB. The cutback circuit should cut the power way back. Adjust
R128 so that the transmitter trips and locks out with VSWR.
Now change the attenuation to 14 dB of forward power into the reflected port on the metering board. Adjust R128 so that the transmitter does not trip and lockout with VSWR. You may have to press reset, adjust the pot, press reset, adjust the pot, et c. Then repeat the previous step to verify that the transmitter still trips with 13 dB of reflected power.
Reconnect the forward and reflected sample cables to the directional coupler as they were before. Verify that the AGC buttons can raise and lower the power levels.
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TABLE OF CONTENTS
1. INTRODUCTION .........................................................................................................................1
2. CIRCUIT DESCRIPTION..............................................................................................................2
Visual Forward And Combined Reflected Circuit Description..............................................................2
Aural Forward Metering ....................................................................................................................3
3. TEST AND CALIBRATION...........................................................................................................3
Test Equipment For Board Tests On The Bench: ...............................................................................3
Test Procedure ................................................................................................................................4
4. PARTS LIST...................................................................................Error! Bookmark not defined.
LIST OF FIGURES
Fig Title 1 RF Detector Board (Photo) 2 Test Equipment Setup for Bench Test 3 Assembly Drawing 41D1607 4 Schematic Diagram 41D1607S
1. INTRODUCTION
RF Power levels throughout the transmitter are sampled in directional couplers, and the resulting RF samples are detected and appropriately processed to provide DC outputs corresponding to the amplitude of the desired parameter of the input signal. These DC outputs contribute to the AGC/VSWR supervision of the transmitter as well as the front panel metering.
The 41D1607G1 and 41D1607G3 dual RF detectors are designed for measuring forward visual/vision signal, forward aural/sound signal and reflected combined visual and aural signal. Group 1 is for NTSC and group 3 is for PAL. The circuitry provides DC outputs corresponding to the instantaneous visual/vision forward and reflected RF levels at the back porch (blanking level) of the modulated signal, so that the DC output remains proportionally constant regardless of the video signals to the transmitter. Two virtually identical detector circuits reside on a single board for visual forward and reflected metering. Detection sensitivity of the circuitry for reflected visual/vision power is approximately 10 dB greater than for the visual/vision forward RF detector circuit. Group 1, (for NTSC) and group 3, (for PAL) differ only in their colour subcarrier frequency, consequently in a few component values.
The aural/sound metering circuit takes a sample of detected video signal from forward port and provides DC level proportional to the amplitude of the aural carrier. The sample of this DC level is used to compensate visual forward reading affected by presence of the aural carrier at the forward po rt. The reflected port does not have this compensation circuit so in reality reflected reading is combined visual and aural power.
The 41D1607G2 and 41D1607G4 dual RF detectors are similar, but have identical detection sensitivities for each circuit. They are designed for use in parallel amplifier systems. Group 2 is for NTSC and group 4 is for PAL; again, these differ only in colour subcarrier frequencies. The two ports J2 and J3 are not identical. J2 has aural metering circuit and compensation circuit for the presence of aural carrier at J2 port. J3 will measure combined visual and aural power unless special trap is used to reject aural carrier
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Figure 1: RF Detector Board
2. CIRCUIT DESCRIPTION
Drawing references: 41D1607 sheet 1 (Figure 3), and 41D1607S sheet 1 (Figure 4). The visual/aural RF Detector board is fitted with two RF detectors, which respond to RF samples fed from
RF directional couplers mounted on transmission lines in the amplifier cabinets and/or on external probe sections. The modulation envelope blanking level is measured because it remains constant, regardless of the picture content of the transmission. Measurement sampling occurs during the back porch.
Both sections of the board are almost identically configured, except for the component numbering, system gains and the function names given in schematic Figure 2. Because the same discussion applies to both circuits, we will describe the first one only, but refer to the second one during the description by enclosing the relevant component numbers in parentheses ( ).
VISUAL FORWARD AND COMBINED REFLECTED CIRCUIT DESCRIPTION
(REFER TO 41D1607S SHEET 1) The RF sample is applied to input J2 (J3) and is terminated by R2 (R34). CR1 (CR3) and Q1 (Q6) form an envelope detector. CR1 (CR3) is forward biased slightly by R1 (R33) and R3 (R35) to overcome CR1 (CR3) conduction threshold voltage, thereby improving detection linearity. Q1 (Q6) is forward biased by R3 (R35) as well, and when RF is applied, Q1(Q6) is driven in the direction of turn off during each positive-going half cycle, thus causing its emitter voltage to become more positive, and in effect forming a linear envelope detector.
C50 (C51) utilizes the lead inductances of CR1 (CR3) and Q1(Q6) to form a Tee network, which provides a matching section that improves the UHF signal transfer between the devices.
Q1(Q6) and CR1 (CR3) have similar temperature coefficients, and the opposing connection of the two in this back-to-back configuration, provides temperature compensation.
Finally, Q1(Q6) serves as a low impedance video source to drive the colour traps FL2, FL4 and aural traps FL1, FL3 which remove the colour subcarrier burst and aural carrier from the back porch. Subsequent downstream sampling circuits monitor the blanking level, therefore require a clean back
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porch. The detected video signal is phase split by Q2 (Q7) to produce two 180 ° out of phase signals. The inverted video signal, after being buffered by Q11(Q13), is fed to input pin 11 of sync separator Ul (U8).
Ul (U8), pin 7 is an open collector "mute" output, which switches off when adequate horizontal sync pulses matching the setting of R28 (R57) are present, lighting CR2 (CR4) the "sync ok" LED. If a TV sync signal is not detected, pin 7 collector goes low, and CR2 (CR4) is turned off. When sync is detected, the sync output at pin 9 delivers a positive-going composite sync pulse, which turns on Q5 (Q10) whose collector then goes low. If no sync is detected by Ul (U8), its pin 9 remains LOW, and Q5 (Q10) remains off.
After the pin 9 pulse has finished, Q5 (Q10) turns off and its collector output goes high. This low -to-high transition activates blanking multivibrator U2 (U7), and an active low pulse is fed to Q3 (Q8), turning it on.
Q4, C5, and U4A (Q9, C22, and U6B) form a sample -and-hold circuit that samples the signal originating from the emitter of Q2 (Q7) and which is buffered by Q12 (Q14). Sampling occurs during the back porch, and holds during the subsequent horizontal line. This DC sample is amplified in U4A (U6B).
Because a "single supply" op-amp is used at U4 (U6), the output seen on TP9 (TP10) will contain a small DC offset which must be minimized because low level signals are near ground/earth potential. With no RF input, this offset voltage is adjusted by potentiometer R10 (R42) as near as possible to zero. A residual voltage offset of 10 to 20 millivolts can be expected.
Outputs from unity gain op -amps U4A, U4B(U5A, U5B) drive the forward (reflected) power metering circuits, and provide telemetry and AGC (VSWR) signals.
Bench test calibration consists of adjusting the level to U4A (U5A) on R13 (R43) with calibrated, properly modulated input: The forward input at J2 should be 200 mW in 50, (J3 Reflected input 20 mW for both the 41Dl607G1 ,3 boards, or for 41D1607G2,4 boards the J3 Combined input 200 mW), and the voltage observed at TP1 (TP2) should read 4.0 volts DC for full scale calibration.
AURAL FORWARD M ETERING
A sample of the signal detected by CR1 from J2 is buffered by Ql and high -pass filtered by R90, C55 and the input impedance of Q15. R92 and R91 set the base bias for Q15 while R93 and R94 set the gain of the stage to approximately 4.7 for the 4.5 MHz (5.5 MHz) aural intercarrier signal. The wideband visual/aural signal drives FL1, an aural bandpass filter. This filter is chosen to match the broadcast standard used. C59 couples the filtered aural signal to common emitter amplifier Q17 which is direct coupled to common base amplifier Q16. The bias for these stages is set by resistors R95, R96, R97. C57 and C58 provide bypassing. Q16 is a current amplifier with L7 as the collector load and C60 provides frequency compensation.
The aural signal is then fed to a peak voltage detector consisting of CR6, C63 and R102. U9A provides DC amplification of the detected signal. Amplifier gain is set by potentiometer R104 such that the DC level at TP8 is in the range of 7VDC. This provides eno ugh "safety" range for the signal not to saturate yet enough level to reliably give a 4VDC calibration at TP3.
3. TEST AND CALIBRATION
TEST EQUIPMENT FOR BOARD TESTS ON THE BENCH :
RF Detector test fixture, comprising a 12 volt DC power supply, suitable connectors for the board to be tested, a signal generator, a modulator, and an amplifier good for 200 milliwatts output. An exciter will suffice for the generator and modulator, but its output is good for a maximum +10 dBm (10 mW) therefore
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TEST EQUIPMENT REQUIRED
requires an external amplifier, and the exciter aural output may be used as an unmodulated source if required (A LARCAN exciter visual/vision section can not deliver unmodulated RF).
TEST PROCEDURE
For test setup, see Figure 2.
1. Connect board under test to power supply. Apply
ground on pin 7 & 8 of J2 and apply +12v (± 0.2 V) to pins 3 & 4. Do not apply RF to J2 and J3 yet.
2. Adjust R111 max CW.
3. Adjust R10 to get a min voltage at Ul0-1 (TP9).
4. Check the voltage between U10 -2 and U10-3. It
should be no more than 10 mV.
12 V power supply
UHF preamplifier (approx
200mWo/p).
Video Generator.
Modulator.
UHFUpconverter.
Oscilloscope.
Spectrum Analyzer.
VHF / UHF Two Way Splitter.
5. Adjust R42 to get a minimum voltage at U6-7 (TP10).
6. Check the voltage between U6-6 and U6 -5. It should
be no more than 10 mV.
7. Set R104 in mid position.
8. Apply staircase modulated RF signal from UHF upconverter to J2 and J3 through splitter
according to Table 1. The signal should include aural carrier 10 dB lower than visual sync peak. Check this level on the spectrum analyzer. Note: Make sure to set spectrum analyzer resolution
RBW to 300 kHz to see sync peak level.
Assembly Group G1/G3 G2/G4 Connector J2 J3 J2 J3
Visual Peak
23 13 20 20 Signal [dBm]
TABLE 1. 9 Adjust R104 for 7.5 ± 0.5 V at TP8.
10 Adjust R107 for 4V at TP3. 11 Adjust R28 so that CR2 lights up. 12 Adjust R57 so that CR4 lights up. 13 Using the oscilloscope, check that there are positive 12V pulses at TP4 and TP5. 14 Check DC voltage at TP9. 15 V
should be within 4.5V to 9.5V.
TP9
16 Check DC voltage at TP10. 17 V
should be within 4.5V to 9.5V.
TP1O
18 Turn off the aural carrier. 19 Adjust R13for4VatTP1. 20 Turn on the aural carrier. 21 Adjust R111 for4V at TPl. 22 Repeat steps 12 and 13 until voltage at TP1 stays the same with and without aural carrier. 23 Adjust R43 for 4 V at TP2 with aural carrier on.
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Figure 2. Test Setup For Visual + Aural RF Detector Assembly.
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TABLE OF CONTENTS
1. INTRODUCTION .........................................................................................................................1
2. CIRCUIT DESCRIPTION..............................................................................................................1
Front End Preamp. ........................................................................................................................1
IPA Module ....................................................................................................................................2
Pallet ..............................................................................................................................................3
Module Interface Board....................................................................................................................4
3-Way Splitter .................................................................................................................................4
3-Way Combiner .............................................................................................................................4
3. TESTING AND TROUBLESHOOTING ..........................................................................................4
Front-End Preamp ...........................................................................................................................5
Intermediate Amplifier (IPA) ............................................................................................................5
4. PARTS LIST...................................................................................Error! Bookmark not defined.
1. INTRODUCTION
The PA module for the MX1000 is a high gain linear amplifier. Each PA module includes its own preamplifier, intermediate amplifier, driver amplifier and power amplifiers. The gain of the module is equal to the gain of the entire transmitter. Every PA module has its own on -board protection against overdrive, excessive VSWR and over temperature. A single LED on the front panel indicates the status of the module. Any fault will cause this LED to turn off.
2. CIRCUIT DESCRIPTION
FRONT END PREAMP.
The RF input to the module is via J1. U1 provides the amplification of the signal for this stage. This IC is an 18dB gain broadband hybrid amplifier. The output of this stage to the following amplifier (IPA) stage is through J2. A directional coupler HY1 provides a sample of the input power for a detector CR1, C2 through C4 and buffer amplifier U6B and associated components. A PIN attenuator circuit consisting of CR2, CR3, R8 through R13 and C5 and C6 provides the means for controlling the signal gain through the front-end stage. A higher voltage applied to this attenuator through L1 results in less attenuation through the PIN attenuator and hence, more gain through the preamp unit. A further coupler HY2 provides an output sample to a detector and buffer circuit (CR4 and U6C). The maximum gain of the front -end preamplifier is approximately 8dB, however, in practice, the gain is adjusted to compensate for gain differences in other stages such that the gain of each PA module is the same.
The three -way combiner circuit for the PA module incorporates a bi-directional coupler with detectors for forward and reflected power on the module. These detected voltage samples for forward and reflected power are fed into the front -end preamp through J4-7 and 14. Comparator circuitry is used to detect either overdrive conditions or VSWR conditions. Since the circuitry is identical for both forward and reflected, a circuit description will be given for the forward power circuit only.
U3D is configured as a comparator with the reference voltag e being provided by the voltage divider consisting of R44, 45, 46. Note: this level is preset. Values for this voltage divider should not be
Figure 1: PA Module, MX1000
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modified. Doing so without prior authorization from factory service personnel will void any warranty. When the detected voltage rises above the preset level, the output of the comparator U3D goes high, and forces transistor Q1 to the "on" state through diode CR7. Other inputs to Q1 include the reflected (VSWR) signal, an external mute signal and a power-up delay circuit consisting of U5D configured as a comparator along with R47 through R50 and C20. The action of turning on Q1 causes the voltage on the PIN attenuator, preset by R25, to be shunted through the transistor, thus increasing the attenuation of the PIN attenuator.
Additional circuitry on the front -end preamplifier also drives the logic for the Green LED on the front panel of the PA module. Output samples from each of the power amplifier pallets are monitored and compared with preset voltages through comparators U2C, U2D and U3C. A failure of the output of any one of these pallets will cause the output of U5A to drop and the LED (connected to J6) to be extinguished. Note: this applies if the input RF signal is removed and thus results in no output from the module (as well as in the case of an overdrive situation or VSWR cutback situation).
There are buffered signals for the various stages on the PA module that are brought to the front-end preamp and routed through to the interface board on the rear of the PA module. These signals are present on the 25 pin connector (intended as an on-site troubleshooting port). In the MX 1000 application, these signals are present but most are not monitored by the transmitter's control circuitry.
IPA MODULE
The intermediate amplifier consists of two FET amplifiers, type MRF181 paralleled in RF phase quadrature, and operated in class A. Amplifier static bias control and over-current protection is provided by an industry -standard type µA723 regulator IC, U1. The overall gain of the Intermediate Amplifier is a nominal 15 dB over the band.
The input signal is split evenly by quadrature hybrid splitter HY1. Each FET gate is matched with the equivalent of an L network followed by a π network. Capacitors C100 and C110 provide DC blocking of the gate voltage. A couple of low impedance microstripline sections along with adjustable capacitor (C101 or C111) to ground and the gate capacitance of the FET form the L-C-L-C matching network for the input circuit. This matching arrangement is good for operation from 470 through 860 MHz, adjustable capacitors C101 and/or C111 provides for a flat frequency response over the range.
The output circuit is similar except it uses narrower (higher impedance) microstriplines because the drain impedance of the FET is higher. The output matching network is adjustable with variable capacitor C103 or C113. Again, this capacitor is adjusted only to provide flat response over the 470 to 860 MHz range. An output coupling capacitor C104 or C114 completes the match to 50 ohms; two amplifier outputs are combined in a quadrature hybrid HY2.
Bias to the gates of the FETs passes through R100 or R110 from balance controls RV100 or RV110. The bias regulator Ul uses an µA723 (MC1723CD) to provide approximately 6½ volts to the gate bias controls
RV100 & RV110. Voltage divider R5, R6 provides the inverting input of the regulator error amplifier with a sample of the output voltage, and the wiper of RV3 provides the non inverting input with its reference
signal which is an adjustable fraction of the 7.15 V built -in reference of the µA723. The adjustment of RV3 therefore should be able to give an output within the range from zero to approximately 9 volts. R4, C2, C1, R3, and C4 provide frequency-compensation and maintain regulator stability.
Figure 2: IPA Module
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Drain current of the two FETs is sampled by the voltage drop across R7. When this voltage exceeds approximately 0.5V at normal operating temperature (about 1.5 amps total FET current), Q3 begins conduction and feeds voltage to pin 2 of the regulator to start its current foldback/limiter circuit. The regulator reduces its output voltage, which in turn reduces the bias on the FETs, they decrease their drain currents, reducing the voltage drop across R7 and over-current protection is achieved. CR1 protects Q3 emitter -base junction from current inrush to C3 and C107 charging during start-up.
PALLET
The following description applies to the driver amplifier as well as the circuitry used in each of the three sub-modules comprising the final PA stage of the PA module. The difference being that the driver consists of a single device amplifier (called a “half-pallet”) while the final stage are based on dual FET amplifiers with an integral 3dB hybrid combiner. Referring to the schematic diagrams (figures 14 and 16) one will notice that even the component numbering is similar. The following description is for the dual FET version of Figure 4: Driver the amplifier (refer to fig 16).
The stripline balun developed at LARCAN is a practical implementation of the coaxial cable based solution on a broadside-coupled horizontal stripline structure. It is made up of three printed circuit boards of high dielectric material bolted together. Using this structure, very tight coupling can be achieved, thus emulating the properties of a coaxial transmission line balun. With this arrangement, the characteristic impedance and degree of coupling can be controlled through geometric dimensions. This circuit is the subject of a patent application.
The amplifier pallet (full-pallet) couplers also include hybrid 3dB couplers as part of the multi-layer stripline circuit. The resultant output of the coupler assembly is two pairs of equal and opposite phase
signals 90 degrees out of phase (that is, a set of signals at 0° and 180 °, and a set of signals at 90° and 270°).
Transistors Q1 and Q2 are Lateral N-Channel Broadband Push-Pull Power MOSFETs. One side of the amplifier is described.
Components C6 through C11 and C52 along with the associated printed circuit traces form the matching network to the gate of the push pull transistor Q1. L2 and R2 along with L3 and R3 are low frequency parasitic arrestors. Similarly, C14 through C15 and C53 along with associated stripline traces provide output matching on the drain of the device. C6, C8, C16 and C18 also provide DC blocking of the supply and bias voltage. C7 is factory adjusted for a flat frequency response from 470 to 860 MHz.
DC power enters the module through a screw terminal connection and is fed to the main circuit board through a series of jumpers. 28V is fed to the drains of the FETs via L5 and L6 with bypass capacitors C13, C25, C20, C22 and C28. Bias for the devices is via L1/L4 with bypass capacitors C1, C2, C5 and C12. The bias voltage is adjusted via R12 and R11, from a regulated source provided by Ul. R12 sets the overall bias and R11
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provides adjustment for balance between Q1 and Q2. Thermistors R21 and R22 provide therm al stability for the bias.
MODULE I NTERFACE BOARD.
This PC board is located on the rear of each PA module. The RF input and DC input to the module enters via this interface board. Four fuses are located on this board. Three fuses are in line with the 3 output PA pallets and one with the front end, IPA and driver modules. These fuses serve to protect the circuitry from damage in the event of a device failing in the short circuit condition. This is part of the “soft failure" mechanism of the PA modules. Because the normal failure mode of a transistor is a short circuit, and we desire to keep the rest of the PA module functioning in the event of a failure, the fuse effectively disconnects the failed circuit from the regulator, allowing it to supply the rest of the module. The interface board performs a number of other signal routing functions. Various signals from the different stages of the module are routed through this board to connectors. In the case of the MX1000, many of these signals are not routed any further, but are present on the connector (J3).
3-WAY SPLITTER
The three -way splitter is a stripline implementations of a 1.76dB hybrid/3 dB hybrid combination. It is a mechanical structure consisting of 3 PC boards sandwiched together to form the stripline structure. The middle layer board thickness along with the trace locations determine to the largest extent the coupling. J4 feeds a 1.76dB splitter. The input power to this splitter is divided 1/3 – 2/3 between the two outputs. The 1/3 output is fed to J3 and the 2/3 output is fed to a further 3dB hybrid coupler. The two outputs of this coupler are fed to J1 and J2. The termination load for the reject port of the 1.76dB splitter is at the far end of the board from J4 and the termination load for the 3dB coupler is located at the edge of the board between J2 and J3. J5 is connected to a directional coupler on the input to the splitter and is not used in this configuration.
3-WAY COMBINER
The three -way combiner is essentially the mirror of the 3-way splitter. J1 and J2 are coupled to the inputs of a 3 dB hybrid coupler. The output of this combiner is fed to the input of a 4.77dB hybrid coupler along with the input from J3. The output of this coupler appears at J4. R6 serves as the balance load for the 3dB coupler while R7 serves as the balance load for the 4.77 dB coupler. Each of the inputs to this combiner have a directional coupler and detector circuit that feeds a DC sample of the output of each pallet to the sensing circuitry on the front -end module. As well, a directional coupler on the output of the combiner has detectors for both the forward and reflected power samples of the output. All the information fed back to the front -end appears at J11. Additionally, a second directional coupler provides an RF sample that is fed to a front panel test point via J5.
3. TESTING AND TROUBLES HOOTING
Basic troubleshooting of a PA module is as follows. The front panel LED is extinguished if one or more output amplifier pallet levels are lower than nominal preset level. As mentioned earlier, if the drive is removed from the module(s), the output of the amplifiers also satisfy this condition and thus the LED will be off. In this case, there is nothing wrong with the amplifier. Therefore, if all the LEDs are off, the first place to look is at the output of the exciter.
If a fault condition exists (LED off) on a single module, the first place to check is the PA module interconnect board where all the fuses are installed. A blown fuse will most often indicate a defective amplifier pallet. Most times, this will be the problem and replacing the defective amplifier and fuse will rectify the problem. If, however, there are no blown fuses, there are other areas to check. Figure 6: Fuses
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The front panel current meter will give an indication of the current drawn by the modules in comparison to one another both under drive conditions and under static bias conditions. Check the current under drive conditions for overdrive situations and under static bias conditions (no drive) for amplifier stage failure.
Check for potential connector problems causing either no drive to a module (input connector) or VSWR (output connector) problems. Also, if you suspect an over temperature condition, be extremely careful when pulling out a module as the heatsink may be too hot to hold onto comfortably.
The following procedures are essentially the same procedures used during factory testing. Basically, if there is no suspected problem with a particular stage, we would recommend not performing these procedures.
FRONT-END P REAMP
Short Pin J4-10 to ground (this can be accomplished by placing a small jumper across J4-10 and J4-
8). This simulates a good thermal switch.
Connect a +28V power supply to E1 and ground.
Apply a 0dBm (1mW) RF input to the amplifier.
Turn R25 fully clockwise. The preamp should have minimum gain (approx. 7dB). Adjusting R25 from
one extreme to the other should vary the gain 4dB.
Check RF output telemetry. There should be 1.5V ±0.5V at J3 -12.
Check the RF input telemetry. There should be 1.0 ±0.2 V at J3-13.
Check the RF attenuator voltage telemetry. There should be 5.4V ±0.2V at J3 -1
Check Thermal switch status indication. J3-4 should be 0V.
Remove the jumper from J4-10 to J4 -8. (This simulates the thermal switch opening). The voltage at
J3-4 should be high (4 Volts ±0.5V) and J3-1 should be 0V.
Replace the jumper across J4 -10 and J4-8.
RF Mute check: Connect a variable supply, to J3-2. Gradually increase the voltage until the gain
drops by 30dB or more. The applied voltage should be approximately 2.5 volts.
Reflected Power Cutback check: Connect the variable supply to J4-9. Increase the voltage gradually
until the gain drops by 30dB or more. The voltage should be approximately 4.0Volts ±0.2V. This same voltage should also be present at J3-14. J3 -6 should be 4.0 volts.
Overdrive Cutback check: Connect the variable supply to J3-7. Increase the voltage until the gain
drops by 30dB or more. The voltage should be 7 volts ±0.5V. The voltage at J3 -11 should be the same and the voltage at J3 -7 should be 4.0 volts.
Set the adjustable supply to 2 volts. Connect this voltage to J4-1, J4 -3 and J4-5 simultaneously. J2-
6 and J3 -5 should be high. Disconnecting any one or more of J4-1,3 or 5 should cause both J2 -6 and J3-5 to go low (0V).
INTERMEDIATE AMPLIFIER (IPA) BENCH TEST PROCEDURE :
This amplifier must be mounted on a properly sized heatsink for testing.
Connect a suitable load to the output of the IPA.
On the IPA under test, set RV200 fully clockwise and set RV110 fully counter-clockwise.
Set variable power supply to 28.0 volts and set its current limit to 1 ampere.
Apply the +28V to the feedthrough capacitor of the IPA shield box.
Adjust RV3 to achieve 6.5 ±0.2 volts at the junction of R5 and RV100.
Adjust RV200 to achieve total current draw of 500 ±20 mA.
Check that the junction of R100 and CR100 measures between 3.5 and 5.5 volts.
Adjust RV110 to raise total current draw to 1000 ±50 mA.
Check that the junction of R110 and CR110 measures between 3.5 and 5.5 volts.
Increase the power supply current limiting to 2.2 Amps.
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Increase RV3 clockwise slowly and check that the maximum current limits itself at 1.6 ±0.1 Amp but
do not allow current to go above 2 amps while performing this test.
Reset RV3 to achieve 6.5 ±0.2 volts measured at the junction of R5 and RV100.
Check balance of the two transistors with a voltmeter connected between the hot sides of C105 and
C115; difference voltage should be less than 3 mV.
Apply RF drive (max. +18dBm to IPA) and adjust C101, C103, C111, and C113 for minimum
frequency response ri pple and flat response. Gain should be a minimum of 15 dB with maximum variation less than 0.5 dB over the frequency range 470 MHz through 860 MHz (Note: IPA output will then be about +33dBm or 2 Watts, so make sure you properly protect your test equipment).
If roll off at the higher frequencies prevents meeting this gain-bandwidth specification, it may be necessary to
replace either C103 or C113 or both with a higher value; use variable capacitor made by Johanson, part # 16E2320-2, which is 2.5 to 10pF.
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