Hardware Platforms for Embedded and Industrial Computing
VES-220
V1.0
>>
User's Manual
Publication date:2014-05-15
About
About
Overview
Icon Descriptions
The icons are used in the manual to serve as an indication
of interest topics or important messages. Below is a
description of these icons:
NOTE: This check mark indicates that
there is a note of interest and is something
that you should pay special attention to
while using the product.
Online Resources
The listed websites are links to the on-line product
information and technical support.
ResourceWebsite
Lannerhttp://www.lannerinc.com
Product Resources
RMAhttp://eRMA.lannerinc.com
WARNING: This exclamation point
indicates that there is a caution or
warning and it is something that could
damage your property or product.
http://www.lannerinc.com/
download-center/
Acknowledgement
Intel, Pentium and Celeron are registered trademarks of
Intel Corp.
Microsoft Windows and MS-DOS are registered trademarks
of Microsoft Corp.
All other product names or trademarks are properties of
their respective owners.
Compliances and Certification
CE Certication
This product has passed the CE test for environmental
specifications. Test conditions for passing included the
equipment being operated within an industrial enclosure.
In order to protect the product from being damaged by
ESD (Electrostatic Discharge) and EMI leakage, we strongly
recommend the use of CE-compliant industrial enclosure
products.
FCC Class A Certication
This equipment has been tested and found to comply
with the limits for a Class A digital device, pursuant to Part
15 of the FCC Rules. These limits are designed to provide
reasonable protection against harmful interference when
the equipment is operated in a commercial environment.
This equipment generates, uses and can radiate radio
frequency energy and, if not installed and used in
accordance with the instruction manual, may cause
harmful interference to radio communications. Operation
of this equipment in a residential area is likely to cause
harmful interference in which case the user will be required
to correct the interference at his own expense.
No part of this manual may be reproduced, copied,
translated or transmitted in any form or by any means
without the prior written permission of the original
manufacturer. Information provided in this manual is
intended to be accurate and reliable. However, the original
manufacturer assumes no responsibility for its use, nor for
any infringements upon the rights of third parties that
may result from such use.
Thank you for choosing the VES-220. The VES-220 is
Lanner’s flagship COM Express R2.0 Type 2 module. It
features the new D2550 processor with NM10 chipset.
This COM Express module provides a rich I/O capabilities
via high-bandwidth interfaces such as PCI, PCI Express,
Serial ATA (3Gb/s), Parallel ATA, LPC, and Hi-Speed USB 2.0
connectivity.
Other I/O capabilities include general-purpose I/O (GPIO),
SMbus, and 2-ch 24-bit LVDS, and audio and VGA display
ports as well as Intel® 82574L (PHY) Gigabit Ethernet.
One 204-pin SODIMM Socket, Supports Up to 4 GB
DDR3 800 / 1066 SDRAM
I/O
Display
D2550 Integrated Graphics
One CH-7511B Onboard
VGA Mode: 1920 x 1200
LVDS Mode: 1920 x 1080
Audio Interface
Ethernet
Mechanical & Environmental
Single Power ATX Support S0, S3, S4, S5, ACPI 3.0
Compliant
Embedded and Industrial Computing
Ordering Information
VES-220COM Express® R2.0 Type 2 Module with Intel® AtomTM D2550
CPU and NM10 Chipset
1
Chapter 1
Package Contents
Your package contains the following items:
VES-220 Embedded Board•
Drivers and User’s Manual CD•
Introduction
Embedded and Industrial Computing
2
Chapter 2
Chapter 2:
System Components
System Drawing
Mechanical dimensions of the VES-220.
Unit: mm
System Components
Embedded and Industrial Computing
3
Chapter 2
System Components
Embedded and Industrial Computing
4
Chapter 2
CG82NM10
Intel
Cedarview
M/D
(N2800, N2600
D2550, D2500)
GLAN
82574L
SW2
GLAN
DDR3
800/1066MHz
SO-DIMM
Memory
SPI
SPI
DMI
DDI1
PCIe sw
PEX8605
SW3
JMB368
PCIe3
PCIE0~2
PATA
DIO4*4
SMB
LVDS
SMB
SATA0~1
AUDIO
Control
CRT
COM Express conn R2.0 Type2
DIO4*4
SW1
PCIE3
eDP to LVDS
CH7511B
SW1
PCIE3
EX_SPI
Block Diagram: The MainBoard
The block diagram depicts the relationships among the
interfaces and modules on the motherboard.
System Components
Embedded and Industrial Computing
5
Chapter 3
Chapter 3:
Motherboard Information
Motherboard Layout- Top View
The motherboard layout shows the connectors and
jumpers on the board. Refer to the following picture
as a reference of the pin assignments and the internal
connectors.
Motherboard Information
SPI1
SW1
Embedded and Industrial Computing
DIMM1
6
Chapter 3
Motherboard Layout-Bottom View
Motherboard Information
CN1A
CN1B
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Chapter 3
Motherboard Information
Connectors and Jumpers List
The tables below list the function of each of the board
jumpers and connectors by labels shown in the above
section. The next section in this chapter gives pin
definitions and instructions on setting jumpers.
Table 3.1 Connector List for VES-220
LabelsFunctionPin Denition Reference Page
SPI1
CN1A
CN1B
SW1
Serial Peripheral Interface
COM Express Connector 1
COM Express Connector 2
AT/ATX Mode Selector
Reserved for Factory Use
P10
P12
P8
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Chapter 3
52 2
511
Motherboard Information
Jumper Settings
AT/ATX Mode Selector (SW1): It is for selecting the
power supply between AT and ATX mode.
Pin No.Function
1 On 2 Off AT mode: This mode
supports AT power
supply, no need to
press power button
to enable power on/
Gigabit Ethernet Controller 0: Media
Dependent Interface Dierential Pairs
0,1,2,3. The MDI can operate in 1000,
100 and 10 Mbit/sec modes. Some
pairs are unused in some modes, per
the following:
1000B-T 100B-T10B-T
MDI[0]+/- B1_DA+/ TX+/-TX+/MDI[1]+/B1_DB+/ RX+/-RX+/MDI[2]+/B1_DC+/ XX
MDI[3]+/B1_
DD+/
indicator, active low.
cator, active low.
/sec link indicator, active low.
Mbit/sec link indicator, active low.
XX
Signal Descriptions of the CN1A:
Audio•
SignalSignal Description
AC_SYNCHD Audio Sync
AC_RST#HD Audio Reset
AC_SDIN[0:2]Audio CODEC Serial Data
AC_BITCLKHD Audio Clock
AC_SDOUTHD Audio Data
Flat Panel LVDS Signals•
SignalSignal Description
BIASONControls panel contrast voltage.
DIGONControls panel digital power.
ENBKL#Controls backlight power enable.
2
I
C_DAT,
I2C_CLK
LPC Signals•
SignalSignal Description
LPC_FRAME# LPC frame indicates the start of an LPC
I2C interface for panel parameter EEPROM.
This EERPOM is mounted on the LVDS
receiver. The data in the EEPROM allows
the EXT module to automatically set the
proper timing parameters for a specic
LCD panel.
cycle
data bus
LPC serial DMA request
Embedded and Industrial Computing
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Chapter 3
Motherboard Information
Miscellaneous Signals•
SignalSignal Description
2
I
C_CKGeneral purpose I2C port clock output
2
I
C_DATGeneral purpose I2C port data I/O line
SPKROutput for audio enunciator - the
"speaker" in PC-AT systems
KBD_RST#Input to Module from (optional) exter-
nal keyboard controller that can force
a reset.
KBD_A20GATEInput to Module from (optional) ex-
ternal keyboard controller that can be
used to control the CPU A20 gate line.
BIOS_DIS0#
BIOS_DIS1#
See Electrical Specications for allowable
input range. If VCC5_SBY is used, all available VCC_5V_SBY pins on the connectors
must be used. Only used for standby and
suspend functions. May be left unconnected if these functions are not used in
the system design.
VCC_RTCReal-time clock circuit-power input. Nomi-
nally +3.0V.
Power and System Management Signals•
SignalSignal Description
SUS_S3#Indicates system is in Suspend to RAM
state. Active low output.
SUS_S4#Indicates system is in Suspend to Disk
state. Active low output.
SUS_S5#Indicates system is in Soft O state.
BATLOW#Indicates that external battery is low
PWRBTN#Power button to bring system out of S5
(soft o), active on rising edge.
SMB_CKSystem Management Bus bidirectional
clock line.
SMB_DTASystem Management Bus bidirectional
data line.
SMB_ALERT# System Management Bus Alert - input
can be used to generate an SMI# (System
Management Interrupt) or to wake the
system.
SUS_STAT#Indicates imminent suspend operation.
PWR_OKPower OK from main power supply
THRMTRIP#Active low output indicating that the CPU
has entered thermal shutdown.
THRM#Input from o-module temp sensor indi-
cating and over-temp situation.
SYS_RESET# Reset button input. Active low input.
WAKE0#PCI Express wake up signal.
WAKE1#General purpose wake up signal.
SATA Signals•
PCI Express Signals•
SignalSignal Description
PCIE_TX[0:3]
+/PCIE_RX[0:3]
+/PCIE0_CK_
REF+/-
Embedded and Industrial Computing
PCI Express Dierential Transmit Pair 0-3
PCI Express Dierential Receive Pair 0-3
Reference clock output for PCI Express
lanes 0-7 and for PCI Express Graphics
lanes 0-15
SignalSignal Discription
SATA[0:1]_TX +/- Serial ATA Channel 0-1 transmit dif-
ferential pair.
SATA[0:1]_RX +/- Serial ATA Channel 0-1 receive dif-
ferential pair.
ATA_ACT#ATA (parallel and serial) activity indica-
tor, active low.
11
Chapter 3
52 2
511
Motherboard Information
VGA Signals•
SignalSignal Discription
VGA_REDRed for monitor. Analog DAC output.
VGA_GRNGreen for monitor. Analog DAC output.
VGA_BLUBlue for monitor. Analog DAC output.
VGA_HSYNC Horizontal sync output to VGA monitor
VGA_VSYNC Vertical sync output to VGA monitor
2
VGA_ I
VGA_ I
DAT
SignalSignal Description
USB[0:7] +/- USB dierential pairs, channels 0 through 7
USB_0_1_
OC#
USB_2_3_
OC#
USB_4_5_
OC#
USB_6_7_
OC#
COM Express Connector 2 (CN1B)
C_CK DDC clock line (I2C port dedicated to iden-
2
USB Signals•
tify VGA monitor capabilities)
C_
DDC data line.
USB over-current sense, USB channels 0
and 1
USB over-current sense, USB channels 2
and 3
USB over-current sense, USB channels 4
and 5
USB over-current sense, USB channels 6
and 7
SignalSignal Description
PCI_AD[0:31]PCI bus multiplexed ad-
dress and data lines.
PCI_C/BE[0:3]#PCI bus byte enable lines,
active low.
PCI_DEVSEL#PCI bus Device Select,
active low.
PCI_FRAME#PCI bus Frame control
line, active low.
PCI_IRDY#PCI bus Initiator Ready
control line, active low.
PCI_TRDY#PCI bus Target Ready
control line, active low.
PCI_STOP#PCI bus STOP control
line, active low, driven by
cycle initiator.
PCI_PARPCI bus parity.
PCI_PERR#Parity Error: An external
PCI device drives PERR#
when it receives data that
has a parity error.
PCI_REQ[0:3]#PCI bus master request
input lines, active low.
PCI_ GNT[0:3]#PCI bus master grant out-
put lines, active low.
PCI_RESET#PCI Reset output, active
low.
PCI_LOCK#PCI Lock control line, ac-
tive low.
PCI_SERR#System Error: SERR# may
be pulsed active by any
PCI device that detects a
system error condition.
PCI_PME#PCI Power Management
Event: PCI peripher-
als drive PME# to wake
system from low-power
states S1-S5.
PCI_CLKRUN#Bidirectional pin used
to support PCI clock
run protocol for mobile
systems.
PCI_IRQ[A:D]#PCI interrupt request
lines.
PCI_CLKPCI 33MHz clock output.
Embedded and Industrial Computing
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Chapter 3
IDE Signals•
SignalSignal Description
IDE_D[0:15]Bidirectional data to /
from IDE device.
IDE_A[0:2]Address lines to IDE
device.
IDE_LOW#I/O write line to IDE
device. Data latched on
trailing (rising) edge.
IDE_IOR#I/O read line to IDE
device.
IDE_REQIDE Device DMA Request.
It is asserted by the IDE
device to request a data
transfer.
IDE_ACK#IDE Device DMA Ac-
knowledge.
IDE_CS1#IDE Device Chip Select
for 1F0h to 1FFh range.
IDE_CS3#IDE Device Chip Select
for 3F0h to 3FFh range.
IDE_IORDYIDE device I/O ready
input. Pulled low by the
IDE device to extend the
cycle.
IDE_RESET#Reset output to IDE de-
vice, active low.
IDE_IRQInterrupt request from
IDE device.
IDE_CBLID#Input from o-Module
hardware indicating the
type of IDE cable being
used.
Motherboard Information
Embedded and Industrial Computing
14
Appendix A
Terms and Conditions
Appendix A:
Terms and Conditions
Warranty Policy
All products are under warranty against defects in 1.
materials and workmanship for a period of one year
from the date of purchase.
The buyer will bear the return freight charges for 2.
goods returned for repair within the warranty period;
whereas the manufacturer will bear the after service
freight charges for goods returned to the user.
The buyer will pay for repair (for replaced components 3.
plus service time) and transportation charges (both
ways) for items after the expiration of the warranty
period.
If the RMA Service Request Form does not meet the 4.
stated requirement as listed on “RMA Service,” RMA
goods will be returned at customer’s expense.
The following conditions are excluded from this 5.
warranty:
RMA Service
Requesting a RMA#
To obtain a RMA number, simply fill out and fax the 1.
“RMA Request Form” to your supplier.
The customer is required to fill out the problem code 2.
as listed. If your problem is not among the codes listed,
please write the symptom description in the remarks
box.
Ship the defective unit(s) on freight prepaid terms. 3.
Use the original packing materials when possible.
Mark the RMA# clearly on the box. 4.
Note: Customer is responsible for shipping
damage(s) resulting from inadequate/loose
packing of the defective unit(s). All RMA# are valid
for 30 days only; RMA goods received after the
effective RMA# period will be rejected.
Improper or inadequate maintenance by the customer
Unauthorized modification, misuse, or reversed
engineering of the product Operation outside of the
environmental specifications for the product.
Embedded and Industrial Computing
15
Appendix A
RMA Service Request Form
When requesting RMA service, please fill out the following form. Without
this form enclosed, your RMA cannot be processed.
RMA No:
Reasons to Return: Ŀ Repair(Please include failure details)
Ŀ Testing Purpose