Page 1
If it’s embedded, it’s Kontron
KTQM67 Users Guide
KTQM67/mITX
KTQM67/Flex
KTQM67/ATXP
KTD-N0819-K
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KTD-N0819-K Page 2
Revision
Date
By
Comment
Correction “ETH3 Configuration (Lower)”. Correction of Mic2 and
3.47. Correct i5 3610ME data.
J
Dec 27th 2013
MLA
Correction to the Chipset > NB PCIe Configurati on Me nu.
CPU list revised. BIOS part upgraded in according to BIOS
Revision Release note (KTQM6715.bin)
Major revision. Updated CPU list. Updated Memory list. Updated
BIOS part. Added much info and many corrections.
Added USB port/EHCI relation. Added normal beep info. Added
support of PCIe x2.
D-F - MLA
Comments removed in revision I.
A -C
-
MLA
Comments removed in revision G.
0
Jun 8th 2011
MLA
Preliminary version
Document details
Document revis ion history.
K Jan 21st 2015 MLA
I Dec 23rd 2013 MLA
H Jun 13th 2013 MLA
G July 10th 2012 MLA
Line2 location. mSATA description improved. EXT_BAT max.
info about backside label. Ivy Bridge support added. Note for
Copyright Notice:
Copyright 2011, KONTRON Technology A/S, ALL RIGHTS RESERVED.
No part of this document may be reproduced or transmitted in any form or by any means, electronically
or mechanically, for any purpose, without the express written permission of KONTRON Technology A/S.
Trademark Acknow ledgemen t:
Brand and product names are trademarks or registered trademarks of their respective owners.
Disclaimer:
KONTRON Technology A/S reserves the right to make changes, without notice, to any product,
including circuits and/or software described or contained in this manual in order to improve design
and/or performance.
Specifications listed in this manual are subject to change without notice. KONTRON Technology
assumes no responsibility or liability for the use of the described product(s), conveys no license or title
under any patent, copyright, or mask work rights to these products, and makes no representations or
warranties that these products are free from patent, copyright, or mask work right infringement, unless
otherwise specified. Applications that are described in this manual are for illustration purposes only.
KONTRON Technology A/S makes no representation or warranty that such application will be suitable
for the specified use without further testing or modification.
Life Support Polic y
KONTRON Technology’s PRODUCTS ARE NOT FOR USE AS CRITICAL COMPONENTS IN LIFE
SUPPORT DEVICES OR SYSTEMS WITHOUT EXPRESS WRITTEN APPROVAL OF THE GENERAL
MANAGER OF KONTRON Technology A/S.
As used herein:
Life support devices or systems are devices or systems which, (a) are intended for surgical implant into
body, or (b) support or sustain life and whose failure to perform, when properly used in accordance with
instructions for use provided in the labelling, can be reasonably expected to result in significant injury to
the user.
A critical component is any component of a life support device or system whose failure to perform can
be reasonably expected to cause the failure of the life support device or system, or to affect its safety or
effectiveness.
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Document details
KONTRON Technology Technical Support and
Services
If you have questions about installing or using your KONTRON Technology Product, check this User’s
Manual first – you will find answers to most questions here. To obtain support, please contact your local
Distributor or Field Application Engineer (FAE).
Before Contacting Support: Please be prepared to provide as much information as possible:
• CPU Board
1. Type.
2. Part Number (find PN on label)
3. Serial Number if available (find SN on label)
• Configuration
1. CPU Type, Clock speed
2. DRAM Type and Size.
3. BIOS Revision (Find the Version Info in the BIOS Setup).
4. BIOS Settings different than Default Settings (Refer to the BIOS Setup Section).
• System
1. O/S Make and Version.
2. Driver Version numbers (Graphics, Network, and Audio).
3. Attached Hardware: Harddisks, CD-rom, LCD Panels etc.
Warranty
KONTRON Technology warrants its products to be free from defects in material and workmanship
during the warrant y period. If a pr oduct proves to be defective in material or workmanship during the
warranty period, KONTRON Technology will, at its sole option, repair or replace the product with a
similar product.
Replacement Product or parts may include remanufactured or refurbished parts or components.
The warranty does not cover:
1. Damage, deterioration or malfunction resulting from:
A. Accident, misuse, neg lect, fire, water, lightning, or oth er acts of nature, una uthorized produc t
modification, or failure to follow instructions supplied with the product.
B. Repair or attempted repair by anyone not authorized by KONTRON Technology.
C. Causes external to the product, such as electric power fluctuations or failure.
D. Normal wear and tear.
E. Any other causes which does not relate to a product defect.
2. Removal, installation, and set -up service charges.
Exclusion of damages:
KONTRON TECHNOLOGY LIABILIT Y IS LIMITED TO THE COST OF REPAIR OR REPLACEMENT
OF THE PRODUCT. KONTRON TECHNOLOGY SHALL NOT BE LIABLE FOR:
1. DAMAGE TO OTHER PROPERTY CAUSED BY ANY DEFECTS IN THE PRODUCT,
DAMAGES BASED UPON INCONVE NIENCE, LOS S OF USE OF TH E PRODUCT, LOSS OF
TIME, LOSS OF PROFITS, LOSS OF BUSINESS OPPORTUNITY, LOSS OF GOODWILL,
INTERFERENCE WITH BUSINESS RELATIONSHIPS, OR OTHER COMMERCIAL LOSS,
EVEN IF ADVISED OF THEIR POSSIBILITY OF SUCH DAMAGES.
2. ANY OTHER DAMAGES, WHETHER INCIDENTAL, CONSEQUENTIAL OR OTHERWISE.
3. ANY CLAIM AGAINST THE CUSTOMER BY ANY OTHER PARTY.
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Contents
Contents
Introduction ............................................................................................. 7
1 Installation procedure ........................................................................ 8
1.1 Installing the board .......................................................................................................................... 8
1.2 Requirement according to IEC60950 ................................................................................................... 9
2 System Specification ........................................................................ 10
2.1 Component main data ..................................................................................................................... 10
2.2 System overview ............................................................................................................................. 14
2.3 Processor Support Table .................................................................................................................. 16
2.4 System Memory support ................................................................................................................... 19
2.5 KTQM67 Graphics Subsystem ............................................................................................................ 20
2.5.1 Intel HD Graphics 4000 .................................................................................................................. 20
2.5.2 Intel® HD Graphics 3000 ................................................................................................................ 20
2.5.3 LVDS and DVI ................................................................................................................................ 21
2.5.4 Graphics Adapters ......................................................................................................................... 21
2.6 Power Consumption ........................................................................................................................ 22
3 Connector Locations ......................................................................... 30
3.1 KTQM67/mITX – frontside ................................................................................................................ 30
3.2 KTQM67/mITX – IO Bracket area .................................................................................................... 31
3.3 KTQM67/mITX - backside ................................................................................................................. 31
3.4 KTQM67/Flex .................................................................................................................................. 32
3.5 KTQM67/Flex - backside ................................................................................................................... 33
3.6 KTQM67/ATXP ................................................................................................................................. 34
3.7 KTQM67/ATXP - backside ................................................................................................................. 35
4 Connector Definitions ....................................................................... 36
5 IO-Area Connectors ........................................................................... 37
5.1 Display connectors (IO Area) ............................................................................................................ 37
5.1.1 DVI Connector (DVI-I) (J41) ........................................................................................................... 37
5.1.2 DP Connectors (DP0/DP1) (J40/J39) ............................................................................................... 38
5.2 Ethernet Connectors ....................................................................................................................... 39
5.3 USB Connectors (IO Area) ................................................................................................................ 40
5.3.1 USB Connector 0/1 (USB0/1) ......................................................................................................... 40
5.3.2 USB Connector 2/3 (USB2/3) ......................................................................................................... 41
5.3.3 USB Connector 4/5 (USB4/5) ......................................................................................................... 41
5.4 Audio Connector (IO Area) ............................................................................................................... 42
6 Internal Connectors .......................................................................... 43
6.1 Power Connector (ATX/BTXPWR) ....................................................................................................... 43
6.2 Fan Connectors (FAN_CPU) (J28) and (FAN_SYS) (J29) ....................................................................... 44
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6.3 PS/2 Keyboard and Mouse connector (KBDMSE) (J27)......................................................................... 45
6.4 Display connectors (Internal) ........................................................................................................... 46
6.4.1 eDP connector (EDP) (J38) ............................................................................................................. 46
6.4.2 LVDS Flat Panel Connector (LVDS) (J20) ........................................................................................... 47
6.5 SATA (Serial ATA) Disk interface (J21 – J26) ...................................................................................... 48
6.6 USB Connectors (USB) ..................................................................................................................... 50
6.6.1 USB Connector 6/7 ........................................................................................................................ 50
6.6.2 USB Connector 8/9 (USB8/9) (J10) ................................................................................................. 50
6.6.3 USB Connector 10/11 (USB10/11) (J11) .......................................................................................... 51
6.6.4 USB Connector 12/13 (USB12/13) (J12) .......................................................................................... 51
6.7 Firewire/IEEE1394 connectors (J13,J14) ........................................................................................... 52
6.7.1 IEEE1394 connector (IEEE1394_0) (J14) ......................................................................................... 52
6.7.2 IEEE1394 connector (IEEE1394_1) (J13) ......................................................................................... 52
6.8 Serial COM1 – COM4 Ports (J15, J16, J17, J18) ................................................................................... 53
6.9 LPT (Line Print Terminal – Parallel port) (J44) .................................................................................... 54
6.10 Audio Connectors............................................................................................................................ 55
6.10.1 CDROM Audio Input (CDROM) (J3) ................................................................................................... 55
6.10.2 Line2 and Mic2 .............................................................................................................................. 55
6.10.3 Audio Header Connector (AUDIO_HEAD) (J31) ................................................................................. 56
6.11 Front Panel Connector (FRONTPNL) (J19) .......................................................................................... 57
6.12 Feature Connector (FEATURE) (J30) .................................................................................................. 58
6.13 “Load Default BIOS Settings” Jumper (J37) ....................................................................................... 61
6.14 SPI Recover Jumper (J4) .................................................................................................................. 62
6.15 SPI Connector (SPI) (J5) .................................................................................................................. 63
6.16 XDP-CPU (Debug Port for CPU) (J32) ................................................................................................. 64
6.17 XDP-PCH (Debug Port for Chipset) (J33) ............................................................................................ 65
7 Slot Connectors (PCIe, miniPCIe, PCI) ................................................ 66
7.1 PCIe Connectors.............................................................................................................................. 66
7.1.1 PCI-Express x16 Connector (PCIe x16).............................................................................................. 66
7.1.2 miniPCI-Express mPCIe0 (J34) ........................................................................................................ 68
7.1.3 miniPCI-Express mPCIe1 (J35) ........................................................................................................ 69
7.1.4 PCI-Express x1 Connector (PCIe x1) (J36) ........................................................................................ 70
7.2 PCI Slot Connectors ........................................................................................................................ 71
7.2.1 Signal Description – PCI Slot Connector ........................................................................................... 72
7.2.2 KTQM67 PCI IRQ & INT routing ......................................................................................................... 73
8 On-board - & mating connector types ................................................. 74
9 System Resources ............................................................................. 75
9.1 Memory Map ................................................................................................................................... 75
9.2 PCI Devices .................................................................................................................................... 76
9.3 Interrupt Usage .............................................................................................................................. 77
9.4 IO Map ........................................................................................................................................... 78
10 BIOS ................................................................................................ 80
10.1 Main .............................................................................................................................................. 80
10.2 Advanced ....................................................................................................................................... 81
10.2.1 Advanced - PCI Subsystem Settings ................................................................................................ 82
10.2.2 Advanced - APCI Settings .............................................................................................................. 85
10.2.3 Advanced - Trusted Computing ...................................................................................................... 86
10.2.4 Advanced - CPU Configuration ....................................................................................................... 87
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10.2.5 Advanced - SATA Configuration ...................................................................................................... 89
10.2.6 Advanced - Intel TXT (LT) Configuration .......................................................................................... 93
10.2.7 Advanced - AMT Configuration ....................................................................................................... 94
10.2.8 Advanced - Acoustic Management Configuration ............................................................................. 96
10.2.9 Advanced - USB Configuration ....................................................................................................... 97
10.2.10 Advanced - SMART Settings ........................................................................................................... 98
10.2.11 Advanced - Super IO Configuration................................................................................................. 99
10.2.12 Advanced - Voltage Monitor ........................................................................................................ 105
10.2.13 Advanced - Hardware Health Configuration ................................................................................... 106
10.2.14 Advanced - Displayblock Setup .................................................................................................... 108
10.2.15 Advanced - LAN Configuration ..................................................................................................... 109
10.2.16 Advanced - Delay Startup ............................................................................................................ 111
10.2.17 Advanced - Serial Port Console Redirection ................................................................................... 112
10.2.18 Advanced - CPU PPM Configuration............................................................................................... 116
10.3 Chipset ........................................................................................................................................ 118
10.3.1 PCH-IO Configuration ................................................................................................................... 119
10.3.2 System Agent (SA) Configuration .................................................................................................. 124
10.4 Boot ............................................................................................................................................ 138
10.4.1 Force Boot Setup ......................................................................................................................... 140
10.4.2 CSM parameters ........................................................................................................................... 141
10.5 Security ....................................................................................................................................... 142
10.5.1 Image Execution Policy ................................................................................................................ 143
10.5.2 Key Management ......................................................................................................................... 144
10.5.3 HDD Security Configuration .......................................................................................................... 145
10.6 Save & Exit ................................................................................................................................... 146
11 AMI BIOS Beep Codes ...................................................................... 147
12 OS Setup ........................................................................................ 148
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KTQM67 variants
Format
PCI
LPT
SODIMM Sockets
Single +12V Power Supply
-
1
1
Introduction
Introduction
This manual describes the KTQM67/mITX, KTQM67/Flex and KTQM67/ATXP boards made by
KONTRON Technology A/S. The boards will also be denoted KTQM67 family if no differentiation is
required.
nd
The KTQM67 boards, all based on the QM67 chipset, support 2
2Core and 4Core processor and the Celeron B810 2Core, see “Processor Support Table for more
specific details.
The KTQM67 family consist on members having different form factors, and the same functionality
except for the functions listed in the table below.
and 3rd generation Intel® i7 -, i5 -, i3
KTQM67/mITX mITX -
KTQM67/Flex Flex 3
KTQM67/ATXP ATX 6
Use of this Users Guide implies a basic knowledge of PC-AT hard- and software. This manual is
focused on describing the KTQM67 board’s special features and is not intended to be a standard PC-AT
textbook.
New users are recom mended to study the short inst allation procedure stated in the f ollowing chapter
before switching-on the power.
All configuration and setup of the CPU board is either done automaticall y or manu ally b y the user via
the CMOS setup menus. Only exception is the “Load Default BIOS Settings” Jumper.
2 Yes
4 No
4 No
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Warning: Turn off PSU (Power Supply Unit) completely (no mains power connected to the
running the board without 3.3V will damage the board within minutes.
!
!
Warning: When mounting the board to chassis etc. please notice that the board contains
without reasonable care. A damaged component can result in malfunction or no function at all.
Installation procedure
Note: To clear all BIOS settings, including Password protection, activate “Load Default BIOS Settings”
Jumper for ~10 sec (without power connected).
1 Installation procedure
1.1 Installing the board
To get the board running, follow these steps. If the board shipped from KONTRON has already
components like RAM, CPU and cooler mounted, then relevant steps below, can be skipped.
1. Turn off the PSU (Power Supply Unit)
2. Insert the DDR3 DIMM 204pin SODIMM module(s)
Be careful to pus h it in the slot(s) before lock ing the tabs. For a list of appr oved DDR3 SODIMMs
contact your Distributor or FAE. See also chapter “System Memory Support”.
3. Install the processor
The CPU is ke yed and will only mount in the C PU socket in one wa y. Use suitable screwdriver to
open/ close the CPU socket. Refer to supported processor overview for details.
4. Cooler Installation
Use heat paste or adhesive pads between CPU and cooler and connect the Fan electrically to the
FAN_CPU connector.
5. Connecting Interfaces
Insert all external cables for hard disk , keyboard etc. A monitor m ust be connected in order t o be
able change CMOS settings.
6. Connect and turn on PSU
Connect PSU to the board by the ATX/BTXPWR and the 4-pin ATX+12V connectors. For the
KTQM67/mITX alternativel y use only the 4-pin ATX+12V con nector if single voltage operation (+12V
+/-5%) is requested.
7. Power Button
Depending on BIOS setting, the PW RBTN _IN mus t be toggl ed to st art the P ower s uppl y; this is do ne
by shorting pins 16 (PWRBTN _IN) and pin 18 (GND) on the FRONTPN L connector (see Connector
description). A “normally open” switch can be connected via the FRONTPNL connector.
8. BIOS Setup
Enter the BIOS setup by pressing the <Del> key during boot up.
Enter Exit Menu and Load Optimal Defaults.
Refer to the “BIOS Configuration / Setup“ section of this manual for details on BIOS setup .
9. Mounting the board to chassis
When fixing the Motherb oard on a chassis it is recomm ended using screws with integrated washer and
having diameter of ~7mm.
Note: Do not use washers with teeth, as they can damage the PCB and may cause short circuits.
PSU) or leave the Power Connectors unconnected while configuring the board. Otherwise
components (RAM, LAN cards etc.) might get damaged. If not using KTQM67/mITX and single
12V power input make sure PSU has 3.3V monitoring watchdog (standard ATX PSU feature),
components on both sides of the PCB which can easily be damaged if board is handled
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ADVARSEL
When an interface/connector has a VCC (or other power) pin, which is directly connected to a power
Installation procedure
1.2 Requirement according to IEC60950
Users of KTQM67 family boards should take care when designing chassis interface connectors in order
to fulfil the IEC60950 standard:
plane like the VCC plane:
To protect the external power lines of the peripheral devices, the customer has to take care about:
• That the wires have suitable rating to withstand the maximum available power.
• That the enclosure of the peripheral device fulfils the fire protecting requirements of IEC60950.
Lithium Battery precautions:
CAUTION!
Danger of explosion if battery is incorrectly
replaced.
Replace only with same or equivalent type
recommended by manufacturer.
Dispose of used batteries according
to the manufacturer’s instructions.
ADVARSEL!
Lithiumbatteri – Eksplosionsfare ved fejlagtig
håndtering.
Udskiftning må kun ske med batteri
af samme fabrikat og type.
Levér det brugte batteri tilbage til leverandøren.
VARNING
Explosionsfara vid felaktigt batteribyte.
Använd samma batterityp eller en ekvivalent
typ som rekommenderas av apparattillverkaren.
Kassera använt batteri enligt fabrikantens
instruktion.
VORSICHT!
Explosionsgefahr bei unsachgemäßem
Austausch der Batterie.
Ersatz nur durch den selben oder einen vom
Hersteller empfohlenen gleichwertigen Typ.
Entsorgung gebrauchter Ba tterie n nach
Angaben des Herstellers.
Eksplosjonsfare ved feilaktig skifte av batteri.
Benytt samme batteritype eller en tilsvarende
type anbefalt av apparatfabrikanten.
Brukte batterier kasseres i henhold til
fabrikantens
instruksjoner.
VAROITUS
Paristo voi räjähtää, jos se on virheellisesti
asennettu.
Vaihda paristo ainoastaan laltevalmistajan
suosittelemaan
tyyppiin. Hävitä käytetty paristo valmistajan
ohjeiden
mukaisesti.
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Form factor
KTQM67/mITX: miniITX (170,18 mm by 170,18 mm)
Processor
Support 2nd and 3rd Generation Intel® Core™ (Sandy Bridge M and Ivy Bridge M
Memory
• DDR3 SODIMM 204pin socket (2 sockets on mITX and 4 sockets on Flex/ATXP)
Chipset
Intel QM67 PCH (Platform Controller Hub)
Security
• Intel® Integrated TPM 1.2 support
Management
• Intel® Active Management T ec hnology (Intel® AMT) 8.0
Audio
Audio, 7.1 Channel High Definition Audio Codec using the VIA 1708B codec
System Specification
2 System Specification
2.1 Component main data
The table below summarizes the features of the KTQM67/mITX, KTQM67/Flex and KTQM67/ATXP
embedded motherboards.
KTQM67/Flex: Flex-ATX (190,5 mm by 228,6 mm)
KTQM67/ATXP: ATX (190,5 mm by 304,0 mm)
respectively) and Intel® Celeron® processors via Socket G2 (rPGA 988B ) ZIF Socket
• Intel® Core™ i7
• Intel® Core™ i5
• Intel® Core™ i3
• Intel® Celeron® B810
Up to 1333MHz system bus and 2/3/4/6MB internal cache.
• Support single and dual ranks DDR3 1066/1333/1600MT/s
(PC3-8500/PC3-10600/PC3-12800)
• Support system memory from 256MB and up to 4x 8GB (2x 8GB on mITX).
Notes: Only some of the processors support 4 SODIMM slots.
Less than 4GB displayed in System Properties using 32bit OS
(Shared Video Memory/PCI resources is subtracted)
• ECC not supported (PGA processors do not support ECC)
• Intel ® VT-d (Virtualisation Technology for Directed I/O)
• Intel ® TXT (Trusted Execution Technology)
• Intel ® vPRO
• Intel ® AMT (Active Management Technology) version 8.0
• Intel ® AT (Anti-Theft Technology)
• Intel ® HD Audio Technology
• Intel ® RST (Rapid Storage Technology)
• Intel ® RRT (Rapid Recover Technology)
• SATA (Serial ATA) 6Gb/s and 3Gb/s.
• USB revision 2.0
• PCI Express revision 2.0
• ACPI 3.0b compliant
• Dual Display support (Dual Graphic Pipes)
• Blue-ray HD video playbac k
• Line-out
• Line-in
• Surround output: SIDE, LFE, CEN, BACK and FRONT
• Microphone: MIC1 and MIC2
• CDROM in
• SPDIF (electrical Interface only)
• On-board speaker (Electromagnetic Sound Generator like Hycom HY-05LF)
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Video
Intel i3, i5 & i7 3rd Generation Mobile processors support Intel HD Graphics 4000.
I/O Control
Via ITE IT8516E Embedde d Controller and Nuvoton W83627DHG I /O Controll er (both
Peripheral
• Six USB 2.0 ports on I/O area
LAN
• 1x 10/100/1000Mbits/s LAN (ETHER1) using Intel® Lewisville 82579LM Gigabit
Expansion
• PCI Bus routed to PCI slot(s) (PCI Local Bus Specification Revision 3.0, 33MH z)
System Specification
(Note that triple independent pipes are not supported on QM67 chipset)
Intel i3, i5 & i7 2nd Generation Mobile processor supports Intel HD Graphics 3000.
Intel Celeron Processor B810 supports Intel HD Graphics.
eDP (Embedded DisplayPort) directly from processor.
Analogue VGA and digital display ports (DVI, 2x DP, LVDS) via the Mobile Intel ®
QM67 Chipset.
• VGA (analogue panel) via DVI-I (sharing DVI-I connector with DVI-D)
• DVI-D (sharing DVI-I connector with analogue VGA)
• DP (DisplayPorts) dual, comply with DisplayPort 1.1a specification.
• LVDS panel support up to 24 bit, 2 pixels/clock and 1920x1200.
• HDMI panel support via DP to HDMI Adapter Converter.
• Second VGA panel support via DP to VGA Adapter Converter
• Second DVI panel support via DP to DVI Adapter Converter
• Dual independent pipes for Mirror and Dual independent display support
(exception is combination LVDS and eDP)
via LPC Bus interface)
interfaces
Support
Capabilities
• Eight USB 2.0 ports on internal pinrows
• Two IEEE 1394a-2000 (up to 400M bits/s) on internal pinrows
• Four Serial ports (RS232) on internal pinrows
• LPT via single in line connector (only KTQM67/Flex and KTQM67/ATXP)
• Two Serial ATA-600 IDE interfaces
• Four Serial ATA-300 IDE interfaces
• RAID 0/1/5/10 support
• mSATA via mPCIe_0 connector
• PS/2 keyboard and mouse ports via pinrow
PHY connected to QM67 supporting AMT 8.0
• 2x 10/100/1000Mbits/s LAN (ETHER2/ETHER3)using Intel® Hartwell 82574L PCI
Express controllers
• PXE Netboot supported.
• Wake On LAN (WOL) supported
o KTQM67/mITX: None.
o KTQM67/Flex: 3
o KTQM67/ATXP: 6
• PCI-Express slot(s):
o 1 slot PCIex16 (PCIe 2.0) ( also PCIe 2.0 when using Ivy Bridge CPU)
o 1 slot PCIex1 (PCIe 2.0),
o 1 slot miniPCI-Express (PCI Express or mSATA signals, no USB signals)
o 1 slot miniPCI-Express (PCI Express signals, no mSATA or USB signals)
• SMBus, compatible with ACCES BUS and I2C BUS, (via Feature connector)
• SPI bus routed to SPI connector
• DDC Bus routed to DVI-I connector
• 18 x GPIOs (General Purpose I/Os), (via Feature connector)
• DAC, ADC, PWM and TIMER (Multiplexed), (via Feature connector)
• WAKE UP / Interrupt Inputs (Multiplexed), (via Feature connector)
• 3 Wire Bus for GPIO Expansion (up to 152 GPIOs), (via Feature connector)
• 8 bit Timer output, (via Feature connector)
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Hardware
• Smart Fan control system, support Thermal® and Speed® cruise for two on-board
Power
ATX/BTX (w. ATX+12V) PSU for full PCI/PCIe load.
Battery
Dispose of used batteries according to the manufacturer’s instructions.
BIOS
• Kontron Technology / AMI BIOS (EFI core version)
• RAID Support (RAID modes 0,1, 5 and 10)
Operating
• WinXP (32b + 64b *)
System Specification
Monitor
Subsystem
Supply Unit
Fan connectors: CPU Fan (on-board) and System Fan (on-board)
• Smart Fan control system, support Speed® cruise for two off-board Fans
(Fan3/Fan4) via Feature Connector.
• Three thermal inputs: CPU Die temperature (precis i on +/- 3ºC), System
temperature (precisio n +/- 3ºC) and System Temperature External via Feature
Connector (precision +/- 1ºC).
• Voltage monitoring
• Intrusion (Case Open) detect input, (via Feature connector)
• Sleep S5# Indication, (via Feature connector)
• System Powergood Signal, (via Feature connector)
Alternatively (mITX version only): +12V single supply via ATX+12V (4-pole) connector,
but with limitation to power load (especially +5V for USB).
Exchangeable 3.0V Lithium battery for on-board Real Time Clock and CMOS RAM.
Manufacturer Panasonic / Part-number CR-2032L/BN, CR2032N/BN or CR-2032L/BE.
Approximate 6.2 years retention.
Current draw is 4.1µA when PSU is disconnected and 0 µA in S0 – S5.
CAUTION: Danger of explosion if the battery is incorrectly replaced. Replace
only with the same or equivalent type recommended by the manufacturer.
• Support for ACPI 3.0 ( Advanced Configuration and Power Interface), Plug & Play
o Suspend (S1 mode)
o Suspend To Ram (S3 mode)
o Suspend To Disk (S4 mode)
• “Always On” BIOS power setting
Systems
Support
• Vista (32b * + 64b *)
• Windows 7 (32b + 64b *)
• Linux
• VxWorks
• Windows Server 2003 r2 (32b * + 64b *)
• Windows Server 2008 r2 (32b * + 64b *)
• WES7 (32b + 64b)
*= Out Of The Box installation test only.
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Environmental
Only Japanese brand Solid capacitors rated for 100 ºC used on board
System Specification
Conditions
Operating:
0°C – 60°C operating temperature (forced cooling). It is the customer’s
responsibility to provide sufficient airflow around each of the components to keep
them within allowed temperature range.
10% - 90% relative humidity (non-condensing)
Storage:
-20°C – 70°C; lower limit of storage temperature is defined by specification
restriction of on-board CR2032 battery. Board with batt er y has been verif ie d for
storage temperature down to -40°C by Kontron.
5% - 95% relative humidit y (non-condensing)
Electro Static Discharge (ESD) / Radiated Emissions (EMI):
All Peripheral interfaces intended for connection to external equipment are ESD/
EMI protected.
EN 61000-4-2:2000 ESD Immunity
EN55022:1998 class B Generic Emission Standard.
Safety:
IEC 60950-1: 2005, 2nd Edition
UL 60950-1
CSA C22.2 No. 60950-1
Product Category: Information Technology Equipment Including Electrical
Business Equipment
Product Category CCN: NWGQ2, NWGQ8
File number: E194252
Theoretical MTBF:
268.956 / 131.729 hours @ 40ºC / 60ºC for the KTQM67/mITX
253.955 / 122.738 hours @ 40ºC / 60ºC for the KTQM67/Flex
236.956 / 113.462 hours @ 40ºC / 60ºC for the KTQM67/ATXP
Restriction of Hazardous Substances (RoHS):
All boards in the KTQM67 family are RoHS compliant.
Capacitor utilization:
No Tantalum capacitors on board
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System Specification
2.2 System overview
The block diagram below shows the architecture and main components of the KTQM67. The key
component on the board is the Intel
Some components (PCI slots) are optional depending on board type.
®
QM67 (Cougar Point) Mob il e Expr ess Chipset.
More detailed block diagram on next page.
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System Specification
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Core™ i7
3.0
3.7 2 4
1333/1600
4
3540M
SR0X6
L1
105/35
4
3rd gen.
2.9
3.6 2 4
1333/1600
4
3520M
SR0MU
L1
105/35
4 2.8
3.8 4 8
1333/1600
8
3840QM
SR0UT
E1
105/45
4 2.7
3.7 4 8
1333/1600
8
3820QM
SR0MK
E1
105/45
4 2.7
3.7 4 8
1333/1600
6
3740QM
SR0UV
E1
105/45
4 2.6
3.6 4 8
1333/1600
6
3720QM
SR0ML
E1
105/45
4 2.4
3.4
4 6 1333/1600
6
3630QM
SR0UX
E1
105/45
4 2.3
3.3 4 8
1333/1600
6
3610QM
SR0MN
E1
105/45
4
2.3
3.3 4 8
1333/1600
6
3610QE*
SR0NP
E1
105/45 4
2.2
3.2
4 8 1333/1600
6
3632QM
SR0V0
E1
105/35
4 2.1
3.1 4 8
1333/1600
6
3612QM
SR0MQ
E1
105/35
4
Core™ i7
2.8
3.5 2 4
1066/1333
4
2640M
SR03R
J1
100/35
2
2nd gen.
2.7
3.4 2 4
1066/1333
4
2620M
SR03F
J1
100/35 2
2.5
3.6 4 8
1066/1333/1600
8
2860QM
SR02X
D2
100/45
4 2.5
3.5 4 8
1066/1333/1600
8
2920XM
SR02E
D2
100/55
4 2.4
3.5 4 8
1066/1333/1600
6
2760QM
SR02W
D2
100/45
4 2.3
3.4 4 8
1066/1333/1600
8
2820QM
SR012
D2
100/45
4 2.2
3.1 4 8
1066/1333
6
2670QM
SR02N
D2
100/45
4
2.2
3.4 4 8
1066/1333/1600
6
2720QM
SR014
D2
100/45 4
2.1
3.0 4 8
1066/1333/1600
6
2710QE*
SR02T
D2
100/45 4
2.0
2.9 4 8
1066/1333
6
2630QM
SR02Y
D2
100/45
2
Core™ i5
2.9
3.6
2 4 1333/1600
3
3380M
SR0X7
L1
105/35
4
3rd gen.
2.8
3.5 2 4
1333/1600
3
3360M
SR0MV
L1
105/35
4 2.7
3.4
2 4 1333/1600
3
3340M
SR0XA
L1
105/35
4
2.7
3.3 2 4
1333/1600
3
3610ME*
SR0QJ
L1
105/35 2
2.6
3.3 2 4
1333/1600
3
3320M
SR0MX
L1
105/35
4 2.6
3.2
2 4 1333/1600
3
3230M
SR0WY
L1
105/35
4 2.5
3.1 2 4
1333/1600
3
3210M
SR0MZ
L1
105/35
4
Core™ i5
2.6
3.3 2 4
1066/1333
3
2540M
SR044
J1
100/35
2
2nd gen.
2.5
3.2 2 4
1066/1333
3
2520M
SR048
J1
100/35 2
2.5
3.1 2 4
1066/1333
3
2510E*
SR02U
D2
100/35 2
2.3
2.9 2 4
1066/1333
3
2410M
SR04B
J1
100/35
2
System Specification
2.3 Processor Support Table
KTQM67 is designed to support the following PGA 988 processors (up to 60W power consumption):
nd
& 3rd generation Intel® Core™ i7 processor
2
nd
2
& 3rd generation Intel® Core™ i5 processor
nd
2
& 3rd generation Intel® Core™ i3 processor
Intel® Celeron® processor
In the following list you will find all CPU’s supported by the chipset in according to Intel but also other
CPU’s if successfully tested.
Embedded CPU’s are indic ated by green text, successfully tested CPU’s are in dicated by highlighted
text, successfully tested embedded CPU’s are indicated by green and highlighted text and failed
CPU’s are indicated by red text.
Some processors in the l ist are distributed from Kontron, thos e CPU’s are marked by an * (asterisk ).
However please notice that this marking is only guide line and maybe not fully updated.
Processor
Brand
Clock
Speed
Turbo
GHz GHz
Speed
Cores
Threads
Bus
Speed
MHz MB
Cache
CPU
Number
sSpec
number
Stepping
Thermal
Design
Power
ºC/W
SODIMM Qty
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Core™ i3
2.6 - 2 4 1333/1600
3
3130M
SR0XC
L1
90/35
4
3rd gen.
2.5 - 2 4 1333/1600
3
3120M
SR0TX
L1
90/35
4
2.4 - 2 4 1333/1600
3
3120ME*
SR0QM
L1
105/35 2
2.4 - 2 4 1333/1600
3
3110M
SR0N2
L1
105/35
4
Core™ i3
2.4 - 2 4 1066/1333
3
2370M
SR0DP
J1
85/35
2
2nd gen.
2.3 - 2 4 1066/1333
3
2350M
SR0DN
J1
85/35
2
2.2 - 2 4 1066/1333
3
2330E*
SR02V
D2
100/35 2
2.2 - 2 4 1066/1333
3
2330M
SR04J
J1
85/35
2 2.2 - 2 4 1066/1333
3
2328M
SR0TC
J1
85/35
2 2.1 - 2 4 1066/1333
3
2312M
SR09S
J1
85/35
2 2.1 - 2 4 1066/1333
3
2310M
SR04R
J1
100/35
2
Celeron®
1.6 - 2 2 1066/1333
2
B810*
SR088
Q0
100/35 2
1.6 - 1 1 1066/1333
1.5
B710
100/35
2
System Specification
System Specification
Processor
Brand
Notes:
Using Ivy Bridge CPU increase Graphical performance (Intel ® HD Graphics 4000), and maybe also
increase CPU perform ance. PCIe x1, PCIe x2, PCIe x4, PCIe x8 and PCIe x 16 are supported on the
PCIe x16 slot, however PCIe x2 is only supported when using 3rd generation Int el® Core™ processor
(Ivy Bridge). Using Ivy Bridge CPU do not implement support for 3 simultaneous displays, do not
implement support f or USB 3.0 and do not implem ent support for PCIe 3.0. If any of these features are
required, then maybe KTQM77/mITX might be a solution.
When using Ivy Bridge CPU, make sure BIOS version is 10 or above.
Sufficient cooling must be applied to the CPU in order to remove the effect as listed in above table
(Thermal Guideline). The sufficient cooling is also depending on the maximum (worst-case) ambient
operating temperature and the actual load of processor.
The Kontron PN 1044-9447 is “Active Cooler for KTQM67/KTQM77”
capable of being use d for processors (fully load ed) having Thermal
Guideline up to 45W @ 60ºC am bient temperature. MT BF is 70.000
hours @ 40ºC.
The Kontron PN 1052-6345 “Cooler Active KTQM67 35W 33mm
longlife” is capabl e of being used for proc essors (full y loaded) having
Thermal Guideline up to 35W @ 60ºC ambient temperature. It
support 1U and has long life (MTBF is 200.000 hours @ 60ºC).
All the processors in the list abov e, inclusive the Celeron processor , are supporting the Enhanced Intel®
SpeedStep® which is improved SpeedStep technology for faster transition between voltage (power
saving states) and frequency states with the result of improved power/performance balance.
Intel® Turbo Boost T echnology 2.0 is supported b y i5 and i7, as indicat ed in above list of proces sors,
and is enabling overclocking of all cores, when operated within the limits of thermal design power,
temperature and current.
Intel® vPro Technology is supported by some i5 and i7 (not by Core i3 and Celeron).
PCIex2 is only supported on the PCIex16 slot if using 3rd Generation Core2 CPU’s (Ivy Bridge).
Clock
Speed
Turbo
GHz GHz
Speed
Cores
Threads
Bus
Speed
MHz MB
Cache
CPU
Number
sSpec
number
Stepping
Thermal
Design
Power
ºC/W
SODIMM Qty
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Slot 1
Slot 0
KTQM67/mITX has two DDR3 SODIMM slots and
KTQM67/Flex and KTQM67/AT X P versions have
either Slot 0 and/or Slot 2
Slot 3
System Specification
Intel AMT (Active Management Technology) is a part of vPRO and is hardware and f irm ware tec hn ol ogy
that builds certain functionality into business PCs in order to remotely monitor, maintain, update,
upgrade, and repair PCs. Intel AMT relies on a hardware-based out-of-band (OOB) communication
channel that operates b elow the OS level, the channel is i ndependent of the state of the OS ( present,
missing, corrupted, down). The communication channel is also independent of the PC's power state
(however standby power required), the presence of a management agent, and the state of many
hardware components (such as har d disk drives and m emory). AMT is not intended to be used by itse lf;
it is intended to be us ed wit h a s of twar e management application based on 3rd party software. If A MT is
not required then KTHM65/ KTHM76 m ight be an alter native or AMT can be disa bled in BIOS. For more
information search for “AMT” on Intel Homepage.
A few types of 2
and not all four SODIMM sockets available on the KTQM67/F lex and - /ATXP. In the table ab ove the
“Qty. of SODIMM slots” indicates if actual processor supports 2 or 4 SODIMM slots.
any of the two slots can be used.
Intel ® AMT works as long as RAM is installed in
any of the slots.
nd
Generati on Core 2 processors and the Ce leron proces sor onl y support two SO DIMM
four DDR3 SODIMM slots. Only some processors
support all four slots, if not one of these CPU’s then
only Slot 0 and Slot 2 can be used.
Intel ® AMT works as long as RAM is installed in
Slot 2
Slot 1
Slot 0
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Processor
frequency
Mill/s
MHz
MHz
MB/s
DDR3 1066
PC3-8500
1066
1066 or more
533
8533
DDR3 1333
PC3-10600
1333
1333 or more
666
10666
DDR3 1600
PC3-12800
1600
1333 max
666
10666
DDR3 1600
PC3-12800
1600
1600
800
12800
System Specification
2.4 System Memory support
The KTQM67/mITX has two DDR3 SODIMM sockets and the KTQM67/FLEX and /ATXP have four
DDR3 SODIMM sockets. The sockets support the following memory features:
• 1.5V (only) 204-pin DDR3 SODIMM with gold-plated contacts
• Single/dual rank unbuffered DDR3 1066/1333/1600MT/s (PC3-8500/PC3-10600/PC3-12800)
(DDR3 1600 only supported by some i7 processors)
• From 256MB and up to 4x 8GB. (up to 2x4GB tested)
Notes:
Only some of the processors support 4 SODIMM slots
(see processor Support Table for more information).
Less than 4GB displayed in System Properties using 32bit OS
(Shared Video Memory/PCI resources is subtracted)
• SPD timings supported
• ECC not supported (PGA processors do not support ECC)
The installed DDR3 SODIMM should support the Serial Presence Detect (SPD) data structure. This
allows the BIOS to read and configure the memory controller for optimal performance. If non-SPD
memory is used, the BIOS will att em pt to conf igure t he m em ory settings , but perf ormanc e and r elia bil it y
may be impacted.
Memory Operating Frequencies
Regardless of the SODIMM type used, the mem ory frequency will eith er be equal to or less than the
processor system bus frequency. For example, if DDR3 1600 m emor y is used with a 1333 MH z s ys t em
bus frequency processor, the m emory clock will oper ate at 666 MHz. The table below lists the r esulting
operating memory frequencies based on the combination of SODIMMs and processors.
DIMM Type Module name
Memory Data
transfers
system bus
Resulting memory
clock frequency
Peak transfer rate
Notes: Kontron offers the following DDR3 204P SODIMM:
PN 1054-3773 1GB, 1066MHZ, PC3-8500
PN 1054-3780 1GB, 1333MHZ, PC3-10600
PN 1054-3776 1GB, 1600MHZ, PC3-12800
PN 1054-3777 2GB, 1066MHZ, PC3-8500
PN 1054-3781 2GB, 1333MHZ, PC3-10600
PN 1051-5403 2GB, 1600MHZ, PC3-12800
PN 1054-3778 4GB, 1066MHZ, PC3-8500
PN 1054-3782 4GB, 1333MHZ, PC3-10600
PN 1051-9057 4GB, 1600MHZ, PC3-12800
PN 1054-3783 8GB, 1333MHZ, PC3-10600
PN 1054-3775 8GB, 1600MHZ, PC3-12800
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System Specification
2.5 KTQM67 Graphics Subsystem
The KTQM67 equipped with Intel 2nd Gen i3, i5 or i7 processor, supports Intel HD Graphics 3000,
equipped with 3
to two graphical pipes) and equipped with Intel Celeron Processor B810 the Intel HD Graphics is
supported.
All KTQM67 versions s uppor t eDP (Em bedded D isp layPor t) direct ly fr om proces sor, and ana logue VGA
and digital displa y ports (DVI, 2x DP, LVDS) via t he Mobile In tel ® QM67 Chi pset. The Analogue VGA
and DVI-D are sharing the DVI-I connector.
The DP inter fac e supports the D ispla yPort 1. 1a sp ecif ication. T he P CH su pports High-bandwidth Digita l
Content Protection for high definition content playback over digital int erfaces. The PCH also integrates
audio codecs for audio support over DP interfaces.
Up to two displays (an y two displa y outputs except combination LVDS and eDP) can be activated at the
same time and be used to implement dual indepe ndent display support or m irror displa y support. PCIe
and PCI (Flex/ATXP only) graph ics cards can be used to replace on-board graphics or in combination
with on-board graphics.
2.5.1 Intel HD Graphics 4000
Features of the Intel HD Graphics 4000 build into the i3, i5 and i7 processors, includes:
• High quality graphics engine supporting
o DirectX11 and OpenGL 4.0 compliant
o Shader Model 5.0 support
o Intel ® Clear Video HD Technology
o Intel ® Quick Sync Video Technology
o Intel ® Flexible Display Interface (Intel ® FDI)
o Core frequency of 650 - 1150 (Turbo) MHz
o Memory Bandwidth up to 21.3 GB/s
o 16 3D Execution Units
o 1.62 GP/s and 2.7 GP/S pixel rate (eDP and DP outputs)
o Hardware Acceleration CVT HD and QSV
o Dynamic Video Memory Technology (DVMT) support up to 1720 MB
• DP0 and DP1
o 24/30 bit colours in WQXGA (2560x1600 pixels) and HDCP.
o DisplayPort standard 1.2
rd
Gen i3, i5 or i7 processor the Intel ® HD Graphics 4000 is supported (however only up
2.5.2 Intel® HD Graphics 3000
Features of the Intel HD Graphics 3000 build into the i3, i5 and i7 processors, includes:
• High quality graphics engine supporting
o DirectX10.1 and OpenGL 3.0 compliant
o Shader Model 4.1 support
o Intel ® Clear Video HD Technology
o Intel ® Quick Sync Video Technology
o Intel ® Flexible Display Interface (Intel ® FDI)
o Core frequency of 350 - 1300 (Turbo) MHz
o Memory Bandwidth up to 21.3 GB/s
o 12 3D Execution Units
o 1.62 GP/s and 2.7 GP/S pixel rate (eDP and DP outputs)
o Hardware Acceleration full MPEG2, full VC-1 and full AVC
o Dynamic Video Memory Technology (DVMT) support up to 1720 MB
• eDP (Embedded DisplayPort) (Not in combination with LVDS)
• DP0 and DP1
o 24/30 bit colours in WQXGA (2560x1600 pixels) and HDCP.
o DisplayPort standard 1.1a
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System Specification
2.5.3 LVDS and DVI
• LVDS panel Support, 18/24 bit colours in up to WUXGA (1920x1200 pixels) @60 Hz and
SPWG (VESA) colour coding. OpenLDI (JEIDA) colour coding is 18 bit with or without Dithering.
(Not in combination with eDP).
• DVI-I (Digital Visual Interface)
o Either DVI-A or DVI-D can be used via DVI-I connector
o DVI-A Analogue Display (CRT)
o 300 MHz Integrated 24-bit RAMDAC
o Up to QXGA (2048x1536 pixels) @ 75 Hz refresh
o DVI-D Digital Display up to WUXGA (1920x1200 pixels) @60 Hz
2.5.4 Graphics Adapters
Use of DP Adapter Converters can implement HDMI support or second VGA or DVI panel support.
The HDMI interface supports the HDMI 1.4a specification
including audio codec. However limitations to the resolution
apply: 2048x1536 (VGA), 1920x1200 (HDMI and DVI)
1051-7619 Cable DP Extender cable 200mm DP to VGA DP to HDMI DP to DVI-D
(when using two DP converters) PN 1045-5779 PN 1045-5781 PN 1045-5780
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Operation
Power Supplied via
ATX + 12V
12V Only
Windows 7 32bit Idle
33W
36W
Windows 7 32bit 3Dmark 2003
70W-88W
72W-96W
Windows 7 32bit Intel Thermal Load
111W
111W
System Specification
2.6 Power Consumption
In order to ensure safe operation of the board, the ATX12V power supply must monitor the supply
voltage and shut do wn if the supplies are out of ran ge – refer to the hardwar e manual for the actual
power supply specification. Please note, In order to keep the power consumption to a minimal level,
boards do not implement a guaranteed minimum load. In some cases, this can lead to compatibility
problems with ATX power supplies, which require a minimum load to stay in regulation.
The KTQM67 board is powered through the ATX/BTX connector and ATX+12V connector. Both
connectors must be us ed in acc ording to the ATX12V PSU standard. However the KTQM67/mITX also
supports single +12 V via ATX+12V-4pin Power Connector, but power limitations appl y to +5V, where
14x USB, LVDS panel or eDP panel, COM ports, LPT port and Frontpanel connector shares 9.5A.
ATX+12V-4pin po wer lim itation is 145W , however mor e +12V power can be added via +12 V and GND
terminals in the 24-pin power connector.
Warning: Hot Plugging power supply is not supported. Hot plugging might damage the board.
The requirements to the supply voltages are as follows:
Supply Min Max Note
VCC3.3 3.168V 3.432V
Vcc 4.75V 5.25V
+12V 11.4V 12.6V
–12V –13.2V –10.8V
-5V -5,50V -4.5V Not required for the KTQM67 boards
5VSB 4.75V 5.25V
Total System power example
I7-2710QE @ 2.10GHz, 1x 4GB Ram, 1x 500gb HDD, 1x DVD-ROM, PSU
Note: Listed power consumptions are inclusive 15 - 25W for PSU, HDD and DVD.
More detailed Static Power Consumption
On the following pages the power consumption of different boards in different configurations are listed.
For each configuration the power consumptions result are listed in 5 tables:
1- DOS, idle, mean
2- Windows7, Running 3DMARK 2005 & BiT 6, mean
3- S0, mean
4- S3, mean
5- S5, mean
Note: some S5 meas urem ents hav e be en c arr ied out in two sub modes M3 and Moff. Only S5/M3 mode
maintains power to the circ uits used for AMT and waking up the s ystem via LAN, Keyboard and USB,
while both S5/M3 and S5/Moff maintain power to RTC, Power Button In circuit and CMO S data .
Should be ±4% for compliance with the ATX specification
Should be ±5% for compliance with the ATX specification.
Should be minimum 5.00V measured at USB connectors
in order to meet the requirements of USB standard.
Should be ±5% for compliance with the ATX specification
Should be ±10% for compliance with the ATX specification
Should be ±5% for compliance with the ATX specification
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ATX supplies
KTQM67
PSU
Gnd
Current
Probe
Tektronix TDS5104B
System Specification
The principal test system and test equipment used
1. Tektronix TDS5104B
2. Tektronix TCPA300
3. Tektronix TCP312
4. Fluke 289
5. Fluke 179
6. ATX rail switch
Note: Power consumption of PSU (power loss), Monitor and HDD are not included.
The following six configuration s (a – f) have been tested
a) Low Power Setup KTQM67/mIT X ATX+12V PSU
b) Low Power Setup KTQM67/mITX +12V only PSU
Standard system configuration equipped with PCIex1 card, Internal graphics, 2x SATA disks, Intel i5
CPU, 1x SODIMM (1GB Modu les), Monitor, Keyboard & Mouse. 1x 1-4GB US B Stick, 12V active
cooler (KT), PSU (Corsair 430W)
c) High Power Setup KTQM67/mITX ATX+12V PSU
d) High Power Setup KTQM67/mITX +12V only PSU
Standard system configuration equipped with PCIex1, PCIex 16, miniPCIe WLAN, 4x SATA disks,
Intel i7 CPU, 2x SODIMM ( 1GB Mod ules), Mo nitor, Ke yboard & Mouse, 4x 1-4G B USB Stick s, 12V
active cooler (KT), PSU (Corsair 430W).
e) Low Power Setup KTQM67/Flex
Standard system configuration equipped with PCIex1 card (network PLNA001), Internal gra phics,
2x SATA disks , Intel i5 CPU, 1x SODIM M (1GB Modules) , Monitor, Keyboar d & Mouse. 1x 1-4GB
USB Stick, 12V active cooler (Intel Box), PSU (Fortron 400W)
f) High Power Setup KTQM67/Flex
Standard system c onfiguration eq uipped with PCIex1 c ard (network PLNA001), PCIex16 (Graphics
PLGA004), 4x S ATA disk s, Intel i7 CPU, 4x SODIMM (1GB Mod ules), Monit or, Keyboard & M ouse.
4x 1-4GB USB Stick, 12V active cooler (Intel Box), PSU (FPGA PS5)
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DOS Idle, Mean, No external load
Current draw
[A]
Power consumption
[W]
+12V
0,140
1,680
+12V P4
1,222
14,664
+5V
0,411
2,055
+3V3
0,557
1,838
-12V
0,035
0,42
5VSB
0,007
0,035
Total 20,7
Windows 7, mean
3DMARK2005 ( first scene ) & BiT 6
Current draw
[A]
Power consumption
[W]
+12V
0,165
1,980
+12V P4
3,250
39,000
+5V
0,450
2,250
+3V3
0,577
1,904
-12V
0,046
0,552
5VSB
0,007
0,035
Total 45,7
S0 Mode, Mean, No external load
Current draw
[A]
Power consumption
[W]
+12V
0,107
1,284
+12V P4
0,510
6,120
+5V
0,336
1,680
+3V3
0,576
1,901
-12V
0,043
0,516
5VSB
0,007
0,035
Total 11,5
S3 Mode, Mean, No external load
Current draw
[A]
Power consumption
[W]
5VSB
0,218
1,090
Total 1,09
S5 Mode, Mean, No external load
Current draw
[A]
Power consumption
[W]
5VSB
0,213
1,065
Total 1,07
System Specification
a) Low Power Setup KTQM67/mITX ATX+12V PSU
Supply
Supply
Supply
Supply
Supply
Page 25
KTQM67 Users Guide
KTD-N0819-K Page 25
DOS Idle, Mean, No external load
Current draw
[A]
Power consumption
[W]
+12V P4
1,721
20,652
Total 20,7
Windows 7, mean
3DMARK2005 ( first scene ) & BiT 6
Current draw
[A]
Power consumption
[W]
+12V P4
3,940
47,28
Total 47,3
S0 Mode, Mean, No external load
Current draw
[A]
Power consumption
[W]
+12V P4
0,992
11,904
Total 11,9
S3 Mode, Mean, No external load
Current draw
[A]
Power consumption
[W]
+12V P4
0,099
1,188
Total 1,19
S5 Mode, Mean, No external load
Current draw
[A]
Power consumption
[W]
+12V P4
0,098
1,176
Total 1,18
System Specification
b) Low Power Setup KTQM67/mITX +12V only PS U
Supply
Supply
Supply
Supply
Supply
Page 26
KTQM67 Users Guide
KTD-N0819-K Page 26
DOS Idle, Mean, No external load
Current draw
[A]
Power consumption
[W]
+12V
0,932
11,184
+12V P4
1,102
13,224
+5V
0,452
2,260
+3V3
0,553
1,825
-12V
0,036
0,432
5VSB
0,007
0,035
Total 29,0
Windows 7, mean
3DMARK2005 ( first scene ) & BiT 6
Current draw
[A]
Power consumption
[W]
+12V
1,355
16,260
+12V P4
4,663
55,956
+5V
0,474
2,370
+3V3
0,968
3,194
-12V
0,049
0,588
5VSB
0,007
0,035
Total 78,4
S0 Mode, Mean, No external load
Current draw
[A]
Power consumption
[W]
+12V
0,569
6,828
+12V P4
0,485
5,820
+5V
0,420
2,100
+3V3
0,964
3,812
-12V
0,049
0,588
5VSB
0,007
0,035
Total 18,6
S3 Mode, Mean, No external load
Current draw
[A]
Power consumption
[W]
5VSB
0,226
1,130
Total 1,13
S5 Mode, Mean, No external load
Current draw
[A]
Power consumption
[W]
5VSB
0,219
1,095
Total 1,10
System Specification
c) High Power Setup KTQM67/mITX ATX+12V PSU
Supply
Supply
Supply
Supply
Supply
Page 27
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KTD-N0819-K Page 27
DOS Idle, Mean, No external load
Current draw
[A]
Power consumption
[W]
+12V P4
2,499
29,988
Total 30,0
Windows 7, mean
3DMARK2005 ( first scene ) & BiT 6
Current draw
[A]
Power consumption
[W]
+12V P4
6,712
80,544
Total 80,5
S0 Mode, Mean, No external load
Current draw
[A]
Power consumption
[W]
+12V P4
1,615
19,38
Total 19,4
S3 Mode, Mean, No external load
Current draw
[A]
Power consumption
[W]
+12V P4
0,104
1,248
Total 1,24
S5 Mode, Mean, No external load
Current draw
[A]
Power consumption
[W]
+12V P4
0,101
1,212
Total 1,21
System Specification
d) High Power Setup KTQM67/mITX +12V only PSU
Supply
Supply
Supply
Supply
Supply
Page 28
KTQM67 Users Guide
KTD-N0819-K Page 28
DOS Idle, Mean, No external load
Current draw
[A]
Power consumption
[W]
+12V
0.194
2.328
+12V P4
1.339
16.068
+5V
0.353
1.765
+3V3
0.662
2.185
-12V
0.020
0.240
5VSB
0.001
0.005
Total 22.6
Windows 7, mean
3DMARK2005 ( first scene ) & BiT 6
Current draw
[A]
Power consumption
[W]
+12V
0.162
1.944
+12V P4
4.173
50.076
+5V
0.460
2.300
+3V3
0.833
2.749
-12V
0.034
0.408
5VSB
0.002
0.010
Total 57.5
S0 Mode, Mean, No external load
Current draw
[A]
Power consumption
[W]
+12V
0.162
1.944
+12V P4
2.060
24.720
+5V
0.390
1.950
+3V3
0.832
2.746
-12V
0.035
0.420
5VSB
0.002
0.010
Total 31.8
S3 Mode, Mean, No external load
Current draw
[A]
Power consumption
[W]
5VSB
0.174
0.870
Total 0.87
S5/M3 Mode (wake+ AMT), Mean, No external load
Current draw
[A]
Power consumption
[W]
5VSB
0.270
1.350
Total 1.35
S5/Moff Mode (no wake no AMT), Mean, No external load
Current draw
[A]
Power consumption
[W]
5VSB
0.175
0.875
Total
0.88
System Specification
e) Low Power Setup KTQM67/Flex
Supply
Supply
Supply
Supply
Supply
Supply
Page 29
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KTD-N0819-K Page 29
DOS Idle, Mean, No external load
Current draw
[A]
Power consumption
[W]
+12V
1.027
12.324
+12V P4
1.235
14.820
+5V
0.419
2.095
+3V3
0.666
2.198
-12V
0.028
0.336
5VSB
0.002
0.010
Total 31.8
Windows 7, mean
3DMARK2005 ( first scene ) & BiT 6
Current draw
[A]
Power consumption
[W]
+12V
1.260
15.120
+12V P4
5.445
65.340
+5V
0.454
2.270
+3V3
0.835
2.756
-12V
0.040
0.480
5VSB
0.002
0.010
Total 86.0
S0 Mode, Mean, No external load
Current draw
[A]
Power consumption
[W]
+12V
0.626
7.512
+12V P4
1.969
23.628
+5V
0.401
2.005
+3V3
0.834
2.752
-12V
0.041
0.492
5VSB
0.002
0.010
Total 36.4
S3 Mode, Mean, No external load
Current draw
[A]
Power consumption
[W]
5VSB
0.026
0.130
Total 0.13
S5/M3 Mode (wake+ AMT), Mean, No external load
Current draw
[A]
Power consumption
[W]
5VSB
0.266
1.330
Total 1.33
S5/Moff Mode (no wake no AMT), Mean, No external load
Current draw
[A]
Power consumption
[W]
5VSB
0.184
0.920
Total 0.92
System Specification
f) High Power Setup KTQM67/Flex
Supply
Supply
Supply
Supply
Supply
Supply
Page 30
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KTD-N0819-K Page 30
DDR3 Slot 1
FEATURE
DVI-I
KBDMSE
PCIe x16
ATX/ BTXPWR
Audio
DDR3 Slot 0
USB13
USB12
FRONTPNL
LVDS
CDROM
AUDIO_HEAD
COM3
COM4
ATX+12V
FAN_SYS
FAN_CPU
IEEE1394_1
ETH1
COM2
EDP
ETH2
ETH3
ClrCMOS
mPCIe (*)
Sata1 Sata4 Sata2
USB9
USB8
USB11
USB10
COM1
IEEE1394_0
PCIe x1
SPI recover
SPI
USB1
DP0
USB3
DP1
Note: Sata0/Sata1support up to 6GB/s and Sata2/Sata3/Sata4/Sata5 support up to 3GB/S.
System Temperature
Sensor( Q10)
Connector Location
3 Connector Locations
3.1 KTQM67/mITX – frontside
USB5
USB4
USB0
USB2
Sata0 Sata5 Sata3
(see note below)
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LPT (*)
mPCIe1
XDP-CPU (*)
DVI-I
Audio
ETH1
ETH2
USB1
DP0
USB3
DP1
mPCIe0
Connector Location
XDP-PCH (*)
below mPCIe1
(*) The XDP and LPT connectors are not supported and not mounted in volume production.
Kontron sub-supplier number. Please use the SN label on the
3.2 KTQM67/mITX – IO Bracket area
USB5
USB4
ETH3
USB0
USB2
3.3 KTQM67/mITX - backside
PCIe x16 slot which is the board SN matching the SN in BIOS.
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FEATURE
DVI-I
KBDMSE
PCIe x16
ATX/BTXPWR
Audio
USB13
USB12
FRONTPNL
LVDS
CDROM
AUDIO_HEAD
ATX+12V
FAN_SYS
FAN_CPU
IEEE1394_0
ETH1
EDP (*)
ETH2
ETH3
ClrCMOS
Sata1 Sata4 Sata2
LPT (*)
USB9
USB8
USB11
USB10
COM4
COM1
IEEE1394_1
PCIe x1
SPI recover
SPI
USB1
DP0
USB3
DP1
mPCIe1
mPCIe0
PCI0
PCI1
PCI2
(*) Connectors located on the backside. The XDP connectors are not supported and not mounted in volume production.
XDP-CPU (*)
XDP-PCH (*)
(For picture of IO Bracket area, see previous page)
System Temperature
Sensor( R936)
DDR3:
Slot 0
Connector Location
3.4 KTQM67/Flex
USB5
USB4
Note: Sata0/Sata1support up to 6GB/s and Sata2/Sata3/Sata4/Sata5 support up to 3GB/S.
Slot 3
Slot 2
Slot 1
USB0
COM3
COM2
USB2
Sata0 Sata5 Sata3
(see note below)
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Connector Location
LPT
EDP
XDP-CPU (*)
(*) The XDP connectors are not supported and not mounted in volume production.
XDP-PCH (*)
Kontron sub-supplier number. Please use the SN label on the
3.5 KTQM67/Flex - backside
PCIe x16 slot which is the board SN matching the SN in BIOS.
Page 34
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KTD-N0819-K Page 34
Connector Location
FEATURE
DVI-I
KBDMSE
PCIe x16
ATX/BTXPWR
Audio
DDR3:
Slot 0
USB13
USB12
FRONTPNL
LVDS
CDROM
AUDIO_HEAD
ATX+12V
FAN_SYS
FAN_CPU
IEEE1394_0
ETH1
ETH2
ETH3
ClrCMOS
Sata1 Sata4 Sata2
USB9
USB8
USB11
USB10
COM4
COM1
IEEE1394_1
PCIe x1
SPI recover
SPI
USB1
DP0
USB3
DP1
Note: Sata0/Sata1support up to 6GB/s and Sata2/Sata3/Sata4/Sata5 support up to 3GB/S.
mPCIe1
mPCIe0
PCI0
PCI1
PCI2
(For picture of IO Bracket area, see” KTQM67/mITX – IO Bracket area”)
System Temperature
Sensor( R936)
PCI3
PCI4
PCI5
3.6 KTQM67/ATXP
USB5
USB4
Slot 3
Slot 2
Slot 1
COM3
COM2
USB0
USB2
Sata0 Sata5 Sata3
(see note below)
Page 35
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KTD-N0819-K Page 35
EDP
(*) The XDP connectors are not supported and not mounted in volume production.
XDP-CPU (*)
XDP-PCH (*)
Connector Location
LPT
3.7 KTQM67/ATXP - backside
Page 36
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KTD-N0819-K Page 36
Connector Definitions
4 Connector Definitions
The following sections provide pin definitions and detailed description of all on-board connectors.
The connector definitions follow the following notation:
Column
name
Pin Shows the pin-numbers in the connector. The graphical layout of the connector definition
Signal The mnemonic name of the signal at the current pin. The notation “XX#” states that the
Type AI: Analogue Input.
Ioh: Typical current in mA flowing out of an output pin through a grounded load, while the
Pull U/D On-board pull-up or pull-down resistors on input pins or open-collector output pins.
Note Special remarks concerning the signal.
The abbreviation TBD is used for specifications which are not available yet or which are not sufficiently
specified by the component vendors.
Description
tables is made similar to the physical connectors.
signal “XX” is active low.
AO: Analogue Output.
I: Input, TTL compatible if nothing else stated.
IO: Input / Output. TTL compatible if nothing else stated.
IOT: Bi-directional tristate IO pin.
IS: Schmitt-trigger input, TTL compatible.
IOC: Input / open-collector Output, TTL compatible.
IOD: Input / Output, CMOS level Schmitt-triggered. (Open drain output)
NC: Pin not connected.
O: Output, TTL compatible.
OC: Output, open-collector or open-drain, TTL compatible.
OT: Output with tri-state capability, TTL compatible.
LVDS: Low Voltage Differential Signal.
PWR: Power supply or ground reference pins.
output voltage is > 2.4 V DC (if nothing else stated).
Iol: Typical current in mA flowing into an output pin from a VCC connected load, while the
output voltage is < 0.4 V DC (if nothing else stated).
Page 37
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Pin
Signal
Description
Type
Pull U/D
1
TMDS Data 2-
Digital Red – (Link 1)
LVDS OUT
2 TMDS Data 2+
Digital Red + (Link 1)
LVDS OUT
3 TMDS Data 2/4 Shield
PWR
4
NC
NC
5
NC
NC
6 DDC Clock
DDC Clock
IO
2K2 7 DDC Data
DDC Data
IO
2K2 8 NC
NC
9 TMDS Data 1-
Digital Green – (Link 1)
LVDS OUT
10
TMDS Data 1+
Digital Green + (Link 1)
LVDS OUT
11
TMDS Data 1/3 Shield
PWR
12
NC
NC
13
NC
NC
14
+5V
Power for monitor when in standby
PWR
15
GND
PWR
16
Hot Plug Detect
Hot Plug Detect
I
17
TMDS Data 0-
Digital Blue – (Link 1) / Digital sync
LVDS OUT
18
TMDS Data 0+
Digital Blue + (Link 1) / Digital sync
LVDS OUT
19
TMDS Data 0/5 Shield
PWR
20
NC
NC
21
NC
NC
22
TMDS Clock Shield
PWR
23
TMDS Clock+
Digital clock + (Link 1)
LVDS OUT
24
TMDS Clock-
Digital clock - (Link 1)
LVDS OUT
C1
ANALOG RED
Analog output carrying the red color signal
O
/75R
C2
ANALOG GREEN
Analog output carrying the green color signal
O
/75R
C3
ANALOG BLUE
Analog output carrying the blue color signal
O
/75R
C4
ANALOG HSYNC
CRT horizontal synchronization output.
O
C5
ANALOG GND
Ground reference for RED, GREEN, and BLUE
PWR
C6
ANALOG GND
Ground reference for RED, GREEN, and BLUE
PWR
IO-Area Connectors
5 IO-Area Connectors
5.1 Display connectors (IO Area)
The KTQM67 fam ily provides one on-board DVI-I port (both digit al and analogue), two on-board DP’s
(DisplayPort), one on-board eDP (Embedded DisplayPort) and one on-board LVDS panel interface. Two
graphic pipes are sup ported; meaning that up t o two independent displa ys can be implemented using
any two of the above mentioned graphic ports.
.
5.1.1 DVI Connector (DVI-I) (J41)
The DVI-I connector support DVI Digital output and DVI Analogue output.
Female socket, front view
Signal Description - DVI Connector:
Note: The +5V supply is fused by a 1.1A resettable fuse
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19 17 15 13 11 9 7 5 3 1
20 18 16 14 12 10 8 6 4 2
1
Lane 0 (p)
LVDS
2 GND
PWR
3 Lane 0 (n)
LVDS
4 Lane 1 (p)
LVDS
5 GND
PWR
6
Lane 1 (n)
LVDS
7 Lane 2 (p)
LVDS
8 GND
PWR
9 Lane 2 (n)
LVDS
10
Lane 3 (p)
LVDS
11
GND
PWR
12
Lane 3 (n)
LVDS
Internally pull down (1Mohm ) .
DDC channel on pin 15/17, If HDMI adapter used (3.3V)
14
Config2
(Not used)
O
Internally connected to GND
Aux Channel (+)
or DDC Clk
AUX (+) channel used by DP
DDC Clk used by HDMI
16
GND
PWR
Aux Channel (-)
or DDC Data
AUX (-) channel used by DP
DDC Data used by HDMI
18
Hot Plug
I Internally pull down (100Kohm).
19
Return
PWR
Same as GND
Fused by 1.5A resetable PTC fuse, common for DP0 and
DP1
IO-Area Connectors
5.1.2 DP Connectors (DP0/DP1) (J40/J39)
The DP (DisplayPort) connectors are based on standard DP type Foxconn 3VD51203-H7JJ-7H or
similar.
Pin Signal Description Type Note
13 Config1
15 Aux Ch (p)
17 Aux Ch (n)
20 3.3V PWR
Aux or DDC
selection
I
Aux channel on pin 15/17 selected as default (when NC)
Page 39
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Signal
PIN
Type
Ioh/Iol
Note
MDI0+
MDI0-
MDI1+
MDI2+
MDI2-
MDI1-
MDI3+
MDI3-
8 7 6 5 4 3 2 1
IO-Area Connectors
5.2 Ethernet Connectors
The KTQM67 boards supports three channels of 10/100/1000Mb Ethernet, one (ETH1) is based on
Intel® Lewisville 82579LM Gigabit PHY with AMT 8.0 support and the two other controllers (ETHER2 &
ETHER3) are based on Intel® Hartwell 82574L PCI Express controller.
In order to achieve the s pecified perf ormance of the Ethernet port, Categor y 5 twisted pair cab les must
be used with 10/100MB and Category 5E, 6 or 6E with 1Gb LAN networks.
The signals for the Ethernet ports are as follows:
Signal Description
MDI[0]+ / MDI[0]- In MDI mode, this is the first pair in 1000Base-T, i.e. the BI_DA+/- pair, and is
the transmit pair in 10Base-T and 100Base-TX.
In MDI crossover mode, this pair acts as the BI_DB+/- pair, and is the receive
pair in 10Base-T and 100Base-TX.
MDI[1]+ / MDI[1]- In MDI mode, this is the second pair in 1000Base-T, i.e. the BI_DB+/- pair, and
is the receive pair in 10 Base-T and 100Base-TX.
In MDI crossover mode, this pair acts as the BI_DA+/- pair, and is the transmit
pair in 10Base-T and 100Base-TX.
MDI[2]+ / MDI[2]-
In MDI mode, this is the third pair in 1000Base-T, i.e. the BI_DC+/- pair.
In MDI crossover mode, this pair acts as the BI_DD+/- pair.
MDI[3]+ / MDI[3]-
Note: MDI = Media Dependent Interface.
Ethernet connector 1 (ETH1) is mounted together with USB Ports 4 and 5.
Ethernet connector 2 (ETH2) is mounted together with and above Ethernet connector 3 (ETH3).
The pinout of the RJ45 connectors is as follows:
In MDI mode, this is the fourth pair in 1000Base-T, i.e. the BI_DD+/- pair.
In MDI crossover mode, this pair acts as the BI_DC+/- pair.
Page 40
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Note
Type
Signal
PIN
Signal
Type
Note
1 PWR
5V/SB5V
1 2 3 4 GND
PWR
IO
USB1-
USB1+
IO
1 PWR
5V/SB5V
1 2 3 4 GND
PWR
IO
USB0-
USB0+
IO
Signal
Description
IO-Area Connectors
5.3 USB Connectors (IO Area)
The KTQM67 board contains two EHCI (Enhance d Host Controller Interface) host controllers (EHCI1
and EHCI2) that support up to fourteen USB 2.0 ports allowing data transfers up to 480Mb/s . Legacy
Keyboard/Mouse and wakeup from sleep states are supported. Over-current detection on all fourteen
USB ports is supported. The following USB connectors are available in the IO Area.
USB Port 0 and 1 (via EHC I 1) are supplied on the combined USB0, USB1 and DP0 connector.
USB Port 2 and 3 (v ia EHC I1) are supplied on the combined USB2, USB3 and DP1 connector.
USB Port 4 and 5 (via EHCI1) are supplied on the combined ETH1, USB4 and USB5 connector.
Note: It is required to use only HiSpeed USB cable, specified in USB2.0 standard:
5.3.1 USB Connector 0/1 (USB0/1)
USB Ports 0 and 1 are mounted together with DP0 port.
Note 1: In order to meet the requirements of USB standard, the 5V input supply must be at least 5.00V.
USB0+ USB0USB1+ USB1-
5V/SB5V
Differential pair works as Data/Address/Command Bus.
5V supply for external devices. SB5V is supplied during powerdown to allow
wakeup on USB device activity. Protected by resettable 1A fuse covering both USB
ports.
Page 41
KTQM67 Users Guide
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Note
Type
Signal
PIN
Signal
Type
Note
1 PWR
5V/SB5V
1 2 3 4 GND
PWR
IO
USB3-
USB3+
IO
1 PWR
5V/SB5V
1 2 3 4 GND
PWR
IO
USB2-
USB2+
IO
Note
Type
Signal
PIN
Signal
Type
Note
1 PWR
5V/SB5V
1 2 3 4 GND
PWR
IO
USB5-
USB5+
IO
1 PWR
5V/SB5V
1 2 3 4 GND
PWR
IO
USB4-
USB4+
IO
Signal
Description
Signal
Description
IO-Area Connectors
5.3.2 USB Connector 2/3 (USB2/3)
USB Ports 2 and 3 are mounted together with DP1 port.
Note 1: In order to meet the requirements of USB standard, the 5V input supply must be at least 5.00V.
USB2+ USB2USB3+ USB3-
5V/SB5V
Differential pair works as Data/Address/Command Bus.
5V supply for external devices. SB5V is supplied during powerdown to allow
wakeup on USB device activity. Protected by resettable 1A fuse covering both USB
ports.
5.3.3 USB Connector 4/5 (USB4/5)
USB Ports 4 and 5 are mounted together with ETH1 port.
Note 1: In order to meet the requirements of USB standard, the 5V input supply must be at least 5.00V.
USB4+ USB4USB5+ USB5-
5V/SB5V
Differential pair works as Data/Address/Command Bus.
5V supply for external devices. SB5V is supplied during powerdown to allow wakeup
on USB device activity. Protected by resettable 1A fuse covering both USB ports.
Page 42
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Signal
Type
Note
TIP LINE1-L
IA
RING LINE1-R
IA
SLEEVE GND
PWR
TIP
FRONT-OUT-L
OA
SLEEVE GND
PWR
TIP MIC1-L
IA
RING MIC1-R
IA
SLEEVE GND
PWR
Signal
Description
Note
IO-Area Connectors
5.4 Audio Connec tor (IO Area)
The on-board Audio circuit im plements 7.1+2 Chann el High D efinition Audio with UAA (U niversal Audio
Architecture), featuring five 24-bit stereo DACs and three 20-bit stereo ADCs. The Following Audio
connector is available in IO Area.
Audio Speakers, Line-in and Microphone are available in the stacked audiojack connector.
RING FRONT-OUT-R OA
FRONT-OUT-L Front Speakers (Speaker Out Left).
FRONT-OUT-R Front Speakers (Speaker Out Right).
MIC1-L
MIC1-R Microphone 1 - Right Shared with Audio Header
LINE1-L Line 1 signal - Left Shared with Audio Header
LINE1-R Line 1 signal - Right
Microphone 1 - Left Shared with Audio Header
Shared with Audio Header
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Note
Type
Signal
PIN
Signal
Type
Note
PWR
3V3
12
24 GND
PWR
PWR
+12V
11
23 5V
PWR
PWR
+12V
10
22 5V
PWR
PWR
SB5V
9
21 5V
PWR I P_OK
8
20 -5V
PWR 1
PWR
GND
7
19 GND
PWR
PWR
5V
6
18 GND
PWR
PWR
GND
5
17 GND
PWR
PWR
5V
4
16 PSON#
OC
PWR
GND
3
15 GND
PWR
PWR
3V3
2
14 -12V
PWR
PWR
3V3
1
13 3V3
PWR
Note
Type
Signal
PIN
Signal
Type
Note
PWR
GND
2 4
+12V
PWR 1
PWR
GND
1 3
+12V
PWR
1
P_OK is a power good signal and should be asserted high by the power supply to indicate
Internal Connectors
6 Internal Connectors
6.1 Power Connector (ATX/BTXPWR)
The KTQM67 boards are designed to be supplied from a standard ATX (or BTX) power supply.
Alternatively supplie d by single +12V +/-5% (m ITX version onl y). Use of BTX supply is not require d for
operation, but may be required to drive high-power PCIe cards.
ATX/ BTX Power Connector (J43):
Note 1: -5V supply is not used on-board.
See chapter “Power Consumption” regard ing input tolerances o n 3.3V, 5V, SB5V, +1 2 and -12V (also
refer to ATX specification version 2.2).
ATX+12V-4pin Power Connector (J42):
Note 1: Use of the 4-pin ATX+12V Power Connector is required for operation of all KTQM67 board
versions.
Signal Description
P_OK
PS_ON# Active low open drain signal from the board to the power supply to turn on the power supply
Warning: Hot Plugging power supply is not supported. Hot plugging might damage the board.
that the +5VDC and +3.3VDC outputs are above the undervoltage thresholds of the power
supply. When this signal is asserted high, there should be sufficient energy stored by the
converter to guarantee continuous power operation within specification. Conversely, when
the output voltages fall below the undervoltage threshold, or when mains power has been
removed for a time sufficiently long so that power supply operation is no longer guaranteed,
P_OK should be de-asserted to a low state. The recommended electrical and timing
characteristics of the P_OK (PWR_OK) signal are provided in the ATX12V Po w er
SupplyDesign Guide.
It is strongly recommended to use an ATX or BTX supply, in order to implement the
supervision of the 5V and 3V3 supplies. These supplies are not supervised on-board.
outputs. Signal must be pulled high by the power supply.
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Pull
U/D
1 CONTROL
O - - 2 SENSE
I
-
4K7 3 +12V
PWR
- -
4 GND
PWR
- -
Pull
U/D
-
2 SENSE
I
-
4K7 3 +12V
PWR
- -
4 GND
PWR
- -
Internal Connectors
6.2 Fan Connectors (FAN_CPU) (J28) and (FAN _S YS) (J29)
The FAN_CPU is used for the connection of the FAN for the CPU.
The FAN_SYS can be used to power, control and monitor a fan for chassis ventilation etc.
The 4pin header is recommended to be used for driving 4-wire type Fan in order to implement FAN
speed control. 3-wire Fan is also possible, but no fan speed control is integrated.
4-pin Mode:
PIN Signal Type Ioh/Iol
Signal Description
CONTROL PWM signal for FAN speed control
SENSE Tacho signal from the fan for supervision. The signals shall be generated by an open
collector transistor or similar. On-board is a pull-up resistor 4K7 to +12V. The signal has to
be pulsed, typically twice per rotation.
12V +12V supply for fan. A maximum of 2000mA can be supplied from this pin.
GND Power Supply GND signal
3-pin Mode:
PIN Signal Type Ioh/Iol
Note
Note
Signal Description
SENSE Tacho signal from the fan for supervision. The signals shall be generated by an open
collector transistor or similar. On-board is a pull-up resistor 4K7 to +12V. The signal has to
be pulsed, typically twice per rotation.
12V +12V supply for fan. A maximum of 2000mA can be supplied from this pin.
GND Power Supply GND signal
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Pull
U/D
1 KBDCLK
IOD
/14mA
2K7
2 KBDDAT
IOD
/14mA
2K7
3 MSCLK
IOD
/14mA
2K7
4 MSDAT
IOD
/14mA
2K7
5 5V/SB5V
PWR
- -
6
GND
PWR
- -
Signal
Description
Internal Connectors
6.3 PS/2 Keyboard and Mouse connector (KBDMSE) (J27)
Attachment of a PS/2 keyboard/mouse can be done through the pinrow connector KBDMSE (J27).
Both interfaces utilize open-drain signalling with on-board pull-up.
The PS/2 mouse and keyboard is supplied from SB5V when in standby mode in order to enable
keyboard or mouse ac tivity to bring the system out from power saving states. T he supply is provided
through a 1.1A resettable fuse.
PIN Signal Type Ioh/Iol
Signal Description – Keyboard & and mouse Connector (KBDMSE).
MSCLK Bi-directional clock signal used to strobe data/commands from/to the PS/2 mouse.
MSDAT Bi-directional serial data line used to transfer data from or commands to the PS/2 mouse.
KDBCLK Bi-directional clock signal used to strobe data/commands from/to the PC-AT keyboard.
KBDDAT
Available cable kit:
Bi-directional serial data line used to transfer data from or commands to the PC-AT
keyboard.
PN 1053-2384 Bracket Cable 6-Pin to PS2-Kbd-Mse
Note
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KTQM67 Users Guide
KTD-N0819-K Page 46
1
NC
NC 2
BL-VCC
PWR
Fused by 1.5A resetable PTC fuse
3
BL-VCC
4
BL-VCC
5
BL-VCC
6
NC
NC 7
NC
NC 8
BL-PWM
Back Light PWM (Pulse Width Modulated)
O
To adjust Back Light intensity
9
BL-EN
Back Light Enable
O
To enable the Back Light
10
BL-GND
PWR
11
BL-GND
12
BL-GND
13
BL-GND
14
HPD
Hot Plug Detection
I 15
LCD-GND
PWR
16
LCD-GND
17
LCD-GND
18
LCD-GND
19
NC
NC
20
LCD-VCC
PWR
Fused by 1.5A resetable PTC fuse
21
LCD-VCC
22
LCD-VCC
23
LCD-VCC
24
GND
PWR
25
Aux (n)
LVDS
26
Aux (p)
LVDS
27
GND
PWR
28
Lane 0 (p)
LVDS
29
Lane 0 (n)
LVDS
30
GND
PWR
31
Lane 1 (p)
LVDS
32
Lane 1 (n)
LVDS
33
GND
PWR
34
Lane 2 (p)
LVDS
35
Lane 2 (n)
LVDS
36
GND
PWR
37
Lane 3 (p)
LVDS
38
Lane 3 (n)
LVDS
39
GND
PWR
40
NC
NC
Internal Connectors
6.4 Display connectors (Internal)
The KTQM67 fam ily provides internal displa y connectors: one on-boar d eDP (Embedded Displ ayPort)
and one on-board LVDS panel interface.
For IO Area Display Connectors (DVI-I and two DP’s), see earlier section.
Two graphic pipes are supported; meaning that up to two independent displays can be im plemented
using any two of display connectors (IO Area - and Internal connectors) with the exception of the
combination eDP + LVDS.
.
6.4.1 eDP connector (EDP) (J38)
The eDP connector is based on single in-line 40 pole connector type TYCO 5-2069716-3.
Pin Signal Description Type Note
Backlight Voltage
Backlight GND
Display panel GND
Display panel voltage
PWR
PWR
12V (in S0 mode)
PWR
PWR
PWR
PWR
PWR
PWR
PWR
Shared with LVDS connector
PWR
3.3V or 5V selected in BIOS
PWR
PWR
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Note
Type
Signal
PIN
Signal
Type
Note
Max. 0.5A
PWR
+12V
1 2 +12V
PWR
Max. 0.5A
Max. 0.5A
PWR
+12V
3 4 +12V
PWR
Max. 0.5A
Max. 0.5A
PWR
+12V
5 6 GND
PWR
Max. 0.5A
Max. 0.5A
PWR
+5V
7 8 GND
PWR
Max. 0.5A
Max. 0.5A
PWR
LCDVCC
9 10 LCDVCC
PWR
Max. 0.5A
2K2Ω, 3.3V
OT
DDC CLK
11
12 DDC DATA
OT
2K2Ω, 3.3V
3.3V level
OT
BKLTCTL
13
14 VDD ENABLE
OT
3.3V level
3.3V level
OT
BKLTEN#
15
16 GND
PWR
Max. 0.5A
LVDS
LVDS A0-
17
18 LVDS A0+
LVDS
LVDS
LVDS A1-
19
20 LVDS A1+
LVDS
LVDS
LVDS A2-
21
22 LVDS A2+
LVDS
LVDS
LVDS ACLK-
23
24 LVDS ACLK+
LVDS
LVDS
LVDS A3-
25
26 LVDS A3+
LVDS
Max. 0.5A
PWR
GND
27
28 GND
PWR
Max. 0.5A
LVDS
LVDS B0-
29
30 LVDS B0+
LVDS
LVDS
LVDS B1-
31
32 LVDS B1+
LVDS
LVDS
LVDS B2-
33
34 LVDS B2+
LVDS
LVDS
LVDS BCLK-
35
36 LVDS BCLK+
LVDS
LVDS
LVDS B3-
37
38 LVDS B3+
LVDS
Max. 0.5A
PWR
GND
39
40 GND
PWR
Max. 0.5A
Signal
Description
LVDS A0..A3
LVDS A Channel data
LVDS ACLK
LVDS A Channel clock
LVDS B0..B3
LVDS B Channel data
LVDS BCLK
LVDS B Channel clock
BKLTCTL
Backlight control (1), PWM signal to implement voltage in the range 0-3.3V
BKLTEN#
Backlight Enable signal (active low) (2)
VDD ENABLE
Output Display Enable.
VCC supply to the display. Power-on/off sequencing depending on selected (in BIOS
DDC CLK
DDC Channel Clock
Internal Connectors
6.4.2 LVDS Flat Panel Connector (LVDS) (J20)
Two graphic pipes are supported; meaning that up to two independent displays can be implemented
using any two of display connectors (IO Area - and Internal connectors) with the exception of the
combination eDP + LVDS.
Note: The KTQM67 on-board LVDS connector supports single and dual channel, 18/24bit SPWG
panels up to the resolution 1600x1200 or 1920x1080 and with limited frame rate some
1920x1200.
Signal Description – LVDS Flat Panel Connec tor:
LCDVCC
Notes: Windows API will be availab le to operate the BKLTCTL signal. Some Inver ters have a limited
voltage range 0- 2.5V for this signal: If voltage is > 2.5V the Inverter might latch up. Some
Inverters generates n oise on the BKLTCTL signal, res ulting in making the LVDS transm ission
failing (corrupted pic ture on the displ ay). By adding a 1K ohm resistor in ser ies with this signal,
mounted in the Inverter end of the cable kit, the noise is limited and the picture is stable.
If the Backlight Enable is required to be active high then, check the following BIOS Chipset
setting: Backlight Signal Inver s ion = Enable d.
setup) display type. 5V or 3.3V selected in BIOS setup. LCDVCC is shared with eDP
connector. Maximum load is 1A at both voltages.
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Pull
U/D
1
GND
PWR - - 2
SATA* TX+
3
SATA* TX-
4
GND
PWR - - 5
SATA* RX-
6
SATA* RX+
7
GND
PWR - -
Signal
Description
Host receiver differential signal pair
Internal Connectors
6.5 SATA (Serial AT A) Disk interface (J21 – J26)
The KTQM67 boards have an integrated SATA Host controller (PCH in the QM67 chipset) that supports
independent DMA operation on six ports. One device can be installed on each port for a maximum of six
SATA devices. A point-to-point interface (SATA cable) is used for host to device connections. Data
transfer rates of up to 6.0Gb/s (typically 600MB/s) on SATA0 and SATA1 and 3.0Gb/s (typically
300MB/s) on SATA2, SATA3, SATA4 and SATA5. SATA2 is unavailable if mSATA module is installed
in mPCIe0.
Note: Before installing OS on a SATA drive make sure the drive is not a former member of a RAID
system. If so some hidden data on the disk has to be erased. To do this, connect two SATA drives and
select RAID in BIOS. Save settings and select <Ctrl> <I> while booting to enter the RAID setup menu.
Now the hidden RAID data will be erased from the selected SATA drive.
The SATA controller supports:
2 to 6-drive RAID 0 (data striping)
2-drive RAID 1 (data mirroring)
3 to 6-drive RAID 5 (block-level striping with par ity).
4-drive RAID 10 (data striping and mirroring)
2 to 6-drive matrix RAID, different parts of a single drive can be assigned to different RAID devices.
AHCI (Advanced Host Controller Interface)
NCQ (Native Command Queuing). NCQ is for faster data access.
Hot Swap
Intel® Rapid Recover Technology
2 – 256TB volume (Data volumes only)
Capacity expansion
TRIM in Windows 7 (in AHCI and RAID mode for drives not part of a RAID volume). (TRIM is for
SSD data garbage handling).
The RAID (Redundant Array of Independent Drives) functionality is based on a firmware system with
support for RAID modes 0 1, 5 and 10.
SATA connector pinning:
SATA0 (J21), SATA1 (J22), SATA2 (J23), SATA3 (J24), SATA4 (J25) and SATA5 (J26).
PIN Signal Type Ioh/Iol
The signals used for the primary SATA hard disk interface are the following:
SATA* RX+
SATA* RX-
SATA* TX+
SATA* TX-
“*” specifies 0, 1, 2, 3, 4, 5 depending on SATA port.
Available cable kit:
Host transmitter differential signal pair
Note
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PN 821035 Cable SATA 500mm
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Note
Type
Signal
PIN
Signal
Type
Note
1
PWR
5V/SB5V
1 2 5V/SB5V
PWR
1
IO
USB8-
3 4 USB9-
IO
IO
USB8+
5 6 USB9+
IO
PWR
GND
7 8 GND
PWR
NC
KEY
9 10 NC
NC
Internal Connectors
Connector Definitions
6.6 USB Connectors (USB)
The KTQM67 board contains two EHCI (Enhanced Host C ontroller Interface) host contr ollers (EHCI1
and EHCI2) that support up to fourteen USB 2.0 ports allowing data transfers up to 480Mb/s. Legacy
Keyboard/Mouse and wakeup from sleep states are supported. Over-current detection on all fourteen
USB ports is supported. The following USB ports are available on Internal Pinrows:
USB Port 6 and 7 ( v ia EH C I 1) are supplied on the USB6/7 internal pinrow FRONTPNL connector.
USB Port 8 and 9 (v ia EH CI2) are supplied on the USB8/9 internal pinrow connector.
USB Port 10 and 11 (via EHCI2) are supplied on the USB10/11 internal pinrow connector.
USB Port 12 and 13 (via EHCI2) are supplied on the USB12/13 internal pinrow connector.
Note: It is required to use only HiSpeed USB cable, specified in USB2.0 standard:
6.6.1 USB Connector 6/7
See Frontpanel Connector (FRONTPNL) description.
6.6.2 USB Connector 8/9 (USB8/9) (J10)
USB Ports 8 and 9 are supplied on the internal USB8/9 pinrow connector J10.
Signal Description
USB8+ USB8USB9+ USB9-
5V/SB5V
Differential pair works as Data/Address/Command Bus.
5V supply for external devices. SB5V is supplied during powerdown to allow
wakeup on USB device activity. Protected by resettable 1A fuse covering both USB
ports.
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Note
Type
Signal
PIN
Signal
Type
Note
1
PWR
5V/SB5V
1 2 5V/SB5V
PWR 1
IO
USB10-
3 4 USB11-
IO
IO
USB10+
5 6 USB11+
IO
PWR
GND
7 8 GND
PWR
NC
KEY
9 10 NC
NC
Note
Type
Signal
PIN
Signal
Type
Note
1
PWR
5V/SB5V
1 2 5V/SB5V
PWR 1
IO
USB12-
3 4 USB13-
IO
IO
USB12+
5 6 USB13+
IO
PWR
GND
7 8 GND
PWR
NC
KEY
9 10 NC
NC
Internal Connectors
6.6.3 USB Connector 10/11 (USB10/11) (J11)
USB Ports 10 and 11 are supplied on the internal USB10/11 pinrow connector J11.
Signal Description
USB10+ USB10USB11+ USB11-
5V/SB5V
6.6.4 USB Connector 12/13 (USB12/13) (J12)
USB Ports 12 and 13 are supplied on the internal USB12/13 pinrow connector J12.
Differential pair works as Data/Address/Command Bus.
5V supply for external devices. SB5V is supplied during powerdown to allow
wakeup on USB device activity. Protected by resettable 1A fuse covering both USB
ports.
Signal Description
USB12+ USB12USB13+ USB13-
5V/SB5V
Note 1: In order to meet the requirements of USB standard, the 5V input supply must be at least 5.00V.
Available cable kit:
Differential pair works as Data/Address/Command Bus.
5V supply for external devices. SB5V is supplied during powerdown to allow
wakeup on USB device activity. Protected by resettable 1A fuse covering both USB
ports.
PN 821401 Bracket Dual USB Cable
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Pull
U/D
Pull
U/D
- - TPA0+
1 2 TPA0- - -
- -
PWR
GND
3 4 GND
PWR - - - - TPB0+
5 6 TPB0- - - 1 - - PWR
+12V
7 8 +12V
PWR - - 1 key - -
NC
- 9
10 GND
PWR - -
Signal
Description
TPB0+, TPB0–
Differential signal pair B
+12V
+12V supply
Pull
Pull
- - TPA0+
1 2 TPA0- - - - - PWR
GND
3 4 GND
PWR - -
- - TPB0+
5 6 TPB0- - -
1 - -
PWR
+12V
7 8 +12V
PWR - - 1 key - -
NC
- 9
10 GND
PWR - -
Signal
Description
TPA1+, TPA1–
Differential signal pair A
TPB1+, TPB1–
Differential signal pair B
+12V
+12V supply
Internal Connectors
6.7 Firewire/IEEE1394 connec tors (J13,J14)
The KTQM67 support two IEE E Std 1394a-2000 fully compliant ports at 1 00M bits/s, 200M bits/s and
400M bits/s.
6.7.1 IEEE1394 connector (IEEE1394_0) (J14)
Note
Note 1: The 12V supply for the IEEE1394_0 devices is on-board fused with a 1.25A reset-able fuse.
Ioh/Iol Type Signal PIN Signal Type Ioh/Iol
TPA0+,TPA0– Differential signal pair A
Note
6.7.2 IEEE1394 connector (IEEE1394_1) (J13)
Note
Ioh/Iol Type Signal PIN Signal Type Ioh/Iol
U/D
U/D
Note
Note 1: The 12V supply for the IEEE1394_1 devices is on-board fused with a 1.25A reset-able fuse.
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initiated.
RI
Ring Indicator, indicates that the modem has received a ringing signal from the telephone line.
Note
Ioh/Iol
Type
Signal
PIN
Signal
Type
Ioh/Iol
Note
- I
DCD
1 2 DSR I - - I
RxD
3 4 RTS O O
TxD
5 6 CTS I - O
DTR
7 8 RI I - - PWR
GND
9 10 5V
PWR - 1
Internal Connectors
6.8 Serial COM1 – COM4 Ports (J15, J16, J17, J18)
Four RS232 serial ports are available on the KTQM67.
The typical definition of the signals in the COM ports is as follows:
Signal Description
Transmitted Data, sends data to the communications link. The signal is set to the marking
TxD
RxD Received Data, receives data from the communications link.
DTR
DSR Data Set Ready, indicates that the modem etc. is ready to establish a communications link.
RTS
CTS Clear To Send, indicates that the modem or data set is ready to exchange data.
DCD Data Carrier Detect, indicates that the modem or data set has detected the data carrier.
state (-12V) on hardware reset when the transmitter is empty or when loop mode operation is
Data Terminal Ready, indicates to the modem etc. that the on-board UART is ready to
establish a communication link.
Request To Send, indicates to the modem etc. that the on-board UART is ready to exchange
data.
The pinout of Serial ports COM1 (J15), COM2 (J16), COM3 (J17) and COM4 (J18) is as follows:
Note 1: The COM1, COM2, COM3 and COM4 5V supply is fused with common 1.1A resettable fuse.
DB9 adapter cables (PN 82101 6 200mm long and 82 1017 100mm long) are available for implementing
standard COM ports on chassis.
Available cable kit (DB9 adapter cables):
PN 821017 - 100 mm or PN 821016 - 200 mm
Page 54
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1
+5V
PWR
Fused by 0.8A resetable PTC fuse
2
GND
PWR
3
RSV
Reserved
- 4
RSV
Reserved
- 5
RSV
Reserved
- 6
RSV
Reserved
-
7
NC
NC
8
RSV
Reserved
- 9
RSV
Reserved
-
10
RSV
Reserved
-
11
GND
PWR
12
AFD#
IS 13
STB#
IS 14
ERROR#
O
8mA load
15
PPD0
O
8mA load
16
INIT#
IS 17
GND
PWR
18
PPD1
O
8mA load
19
SLIN#
IS 20
PPD2
O
8mA load
21
PPD3
O
8mA load
22
GND
PWR
23
PPD4
O
8mA load
24
PPD5
O
8mA load
25
PPD6
O 8mA load
26
PPD7
O 8mA load
27
GND
PWR
28
ACK#
O 8mA load
29
BUSY
O 8mA load
30
PE
O 8mA load
31
SLCT
O 8mA load
32
GND
PWR
ERROR#
Error, active low
PPD0 – PPD7
Parallel Port Data0 – Data7
Internal Connectors
6.9 LPT (Line Print Terminal – Parallel port) (J44)
The LPT connector (only KTQM67/Flex and KTQM67/ATXP) is a 32 pole single in line connector type
Tyco 3-1734592-2. Available cable kit (FFC cable and module), see chapter 8.
Pin Signal Description Type
Note
Signal Description
AFD#
STB#
INIT#
SLIN#
ACK# Acknowledge, active low
BUSY
PE
SLCT
Auto Line Feed, active low
Strobe, active low
Initialize, ac ti ve low
Select Input, active low
Busy, active high
Paper End, active high
Select, active high
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PIN
Signal
Type
Note
1 CD_Left
IA 1 2 CD_GND
IA 3 CD_GND
IA 4 CD_Right
IA
1
Signal
Description
not
Internal Connectors
6.10 Audio Connectors
The on-board Audio circuit im plements 7.1+2 Chann el High D efinition Audio with UAA (U niversal Audio
Architecture), featuring five 24-bit stereo DACs and three 20-bit stereo ADCs.
The following Audio connectors are available as Internal connectors.
6.10.1 CDROM Audio Input (CDROM) (J3)
CD-ROM audio input may be connected to this connector or it can be used as secondary line-in signal.
Note 1: The definition of which pins are used for the Left and Right channels is not a worldwide
accepted standard. Some CDROM cable kits expect reverse pin order.
CD_Left
CD_Right
CD_GND Analogue GND for Left and Right CD.
Left and right CD audio input lines or secondary Line-in.
(This analogue GND is
shorted to the general digital GND on the board).
6.10.2 Line2 and Mic2
Line2 and Mic2 are accessible via Front Panel Connector, see Front Panel connector description.
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Note
Type
Signal
PIN
Signal
Type
Note
AO
LFE-OUT
1 2 CEN-OUT
AO
PWR
AAGND
3 4 AAGND
PWR 1
AO
FRONT-OUT-L
5 6 FRONT-OUT-R
AO 1
PWR
AAGND
7 8 AAGND
PWR
AO
REAR-OUT-L
9 10 REAR-OUT-R
AO
AO
SIDE-OUT-L
11
12 SIDE-OUT-R
AO
PWR
AAGND
13
14 AAGND
PWR 1
AI
MIC1-L
15
16 MIC1-R
AI 1
PWR
AAGND
17
18 AAGND
PWR 1 LINE1-L
19
20 LINE1-R
1
NC
NC
21
22 AAGND
PWR
PWR
GND
23
24 NC
NC O SPDIF-OUT
25
26 GND
PWR
Internal Connectors
6.10.3 Audio Header Connector (AUDIO_HEAD) (J31)
Note 1: Shared with Audio Stack connector
Signal Description
FRONT-OUT-L Front Speakers (Speaker Out Left).
FRONT-OUT-R Front Speakers (Speaker Out Right).
REAR-OUT-L
REAR-OUT-R
SIDE-OUT-L Side speakers (Surround Out Left)
SIDE-OUT-R
CEN-OUT
LFE-OUT Subwoofer Speaker (Low Freq. Effect Out).
NC No connection
MIC1
LINE1 Line 1 signals
F-SPDIF-OUT S/PDIF Output
AAGND Audio Analogue ground
Available cable kit:
Rear Speakers (Surround Out Left).
Rear Speakers (Surround Out Right).
Side speakers (Surround Out Right)
Center Speaker (Center Out channel).
MIC Input 1
PN 821043 Cable, Audio Open-End (300 mm)
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Pull
U/D
Ioh/
Iol
Ioh/
Iol
Pull
U/D
- -
PWR
USB6/7_5V
1 2 USB6/7_5V
PWR - - - - USB6-
3 4 USB7-
- - - - USB6+
5 6 USB7+
- - - -
PWR
GND
7 8 GND
PWR - - - -
NC
NC
9 10 LINE2-L
- - - -
PWR
+5V
11
12 +5V
PWR - - - 25/25mA
O
SATA_LED#
13
14 SUS_LED
O
7mA - - - PWR
GND
15
16 PWRBTN_IN#
I 1K1
4K7 - I
RSTIN#
17
18 GND
PWR - - - -
PWR
SB3V3
19
20 LINE2-R
- - - -
PWR
AGND
21
22 AGND
PWR - - - -
AI
MIC2-L
23
24 MIC2-R
AI - -
5V supply for exter nal de vi c es . S B5V is s u pplie d d ur i ng p o werd o wn to al lo w wakeup
Internal Connectors
6.11 Front Panel Connector (FRONTPNL) (J19)
Note
Signal Description
USB10/11_5V
USB1+/USB1- Universal Serial Bus Port 1 Differentials: Bus Data/Address/Command Bus.
USB3+/USB3- Universal Serial Bus Port 3 Differentials: Bus Data/Address/Command Bus.
+5V
on USB device activity. Protected by resettable 1.1A fuse covering both USB ports.
Maximum load is 1A or 2A per pin if us ing IDC c on nector flat cable or crimp terminals
respectively.
Type Signal PIN Signal Type
Note
SATA_LED# SATA Activity LED (active low signal). 3V3 output when passive.
SUS_LED Suspend Mode LED (active high signal). Output 3.3V via 470Ω.
PWRBTN_IN#
RSTIN#
LINE2
MIC2
SB3V3 Standby 3.3V voltage
AGND Analogue Ground for Audio
Note: In order to meet the requirements of USB standard, the 5V input supply must be at least 5.00V.
Available cable kit:
Power Button In. Toggle this signal low to start the ATX / BTX PSU and boot the
board.
Reset Input. When pull ed lo w f or a m inimum 16ms, the reset process will be in itia ted.
The reset process continues even though the Reset Input is kept low.
Line2 is second stereo Line signals
MIC2 is second stereo microphone input.
PN 821042 Cable Front Panel Open-End, 300 mm
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Pull
U/D
Pull
U/D
2
2M/ - I
CASE_OPEN#
1 2 SMBC
/4mA
10K/ 1 - 25/25mA O S5#
3 4 SMBD
/4mA
10K/ 1 - 25/25mA
O
PWR_OK
5 6 EXT_BAT
PWR - - - O FAN3OUT
7 8 FAN3IN
I - - - -
PWR
SB3V3
9 10 SB5V
PWR - - -
IOT
GPIO0
11
12 GPIO1
IOT - -
IOT
GPIO2
13
14 GPIO3
IOT - -
IOT
GPIO4
15
16 GPIO5
IOT - -
IOT
GPIO6
17
18 GPIO7
IOT - - -
PWR
GND
19
20 GND
PWR - - - I GPIO8
21
22 GPIO9 I - - I
GPIO10
23
24 GPIO11
I - - I GPIO12
25
26 GPIO13
IOT - -
IOT
GPIO14
27
28 GPIO15
IOT - -
IOT
GPIO16
29
30 GPIO17
IOT - - -
PWR
GND
31
32 GND
PWR - - - 8/8mA
O
EGCLK
33
34 EGCS#
O
8/8mA
-
- 8/8mA EGAD
35
36 TMA0 O - PWR
+12V
37
38 GND
PWR - - - O FAN4OUT
39
40 FAN4IN
I - - - -
PWR
GND
41
42 GND
PWR - - - -
PWR
GND
43
44 S3#
O
25/25mA
-
Internal Connectors
6.12 Feature Conne ctor (FEATURE) (J30)
Note
Notes: 1. Pull-up to +3V3Dual (+3V3 or SB3V3).
2. Pull-up to on-board Battery.
3. Pull-up to +3V3.
Available cable kit:
Ioh/Iol Type Signal PIN Signal Type Ioh/Iol
PN 1052-5885 Cable, Feature 44pol 1 to1, 300mm
Note
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KTQM67 Users Guide
KTD-N0819-K Page 59
Signal
Description
CASE OPEN, used to det ec t if the s ystem c ase has been ope ned. T his sign al’s s tatus
is readable, so it may be used like a GPI when the Intruder switch is not required.
PoWeR OK, signal is h igh if no power failures ar e detected. (This is not the sam e as
the P_OK signal generated by ATX PSU).
(EXTernal BATtery) o ption for c onnecting + t erm inal of an ex tern al prim ary cell batter y
charging and can be used with/without the on-board battery installed.
General Purpose Inputs / Output. These Signals may be controlled or monitored
through the use of the KT-API-V2 (Application Programming Interface).
Internal Connectors
CASE_OPEN#
SMBC SMBus Clock signal
SMBD SMBus Data signal
S3# S3 sleep mode, active low output, optionally used to deactivate external system.
S5# S5 sleep mode, active low output, optionally used to deactivate external system.
PWR_OK
EXT_BAT
FAN3OUT FAN 3 speed control OUTput, 3.3V PWM signal can be used as Fan control voltage.
FAN3IN FAN3 Input. 0V to +3V3 amplitude Fan 3 tachometer input.
FAN4OUT FAN 4 speed control OUTput, 3.3V PWM signal can be used as Fan control voltage.
FAN4IN FAN4 Input. 0V to +3V3 amplitude Fan 3 tachometer input.
SB3V3 Max. load is 0.75A (1.5A < 1 sec.)
SB5V StandBy +5V supply.
GPIO0..17
EGCLK Extend GPIO Clock signal
EGAD Extend GPIO Address Data signal
EGCS# Extend GPIO Chip Select signal, active low
TMA0 Timer Output
+12V Max. load is 0.75A (1.5A < 1 sec.)
Available Temperature Sensor cable kit (for System Fan Temperature Cruise, selected in BIOS):
Based on Maxim DS18B20, Accurate to ±0.5ºC over the range of -10ºC to +85ºC
Feature connector 3.3V (Pin 9), GND (Pin 19) and GPIO16 (Pin 29)
(2.5 - 3.47 V) (– terminal connected to GND). The external batter y is protec ted agains t
PN1053-4925 Cable Tem perature Sensor - 44P, 400 mm
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GPIO0
DAC0/GPJ0
AO/IOS
GPIO1
DAC1/GPJ1
AO/IOS
GPIO2
DAC2/GPJ2
AO/IOS
GPIO3
DAC3/GPJ3
AO/IOS
GPIO4
PWM2/GPA2
O8/IOS
GPIO5
PWM3/GPA3
O8/IOS
GPIO6
PWM4/GPA4
O8/IOS
GPIO7
PWM5/GPA5
O8/IOS
GPIO8
ADC0/GPI0
AI/IS
GPIO9
ADC1/GPI1
AI/IS
GPIO10
ADC2/GPI2
AI/IS
GPIO11
ADC3/GPI3
AI/IS
GPIO12
ADC4/WUI28/GPI4
AI/IS/IS
GPIO13
RI1#/WUI0/GPD0
IS/IS/IOS
GPIO14
RI2#/WUI1/GPD1
IS/IS/IOS
GPIO15
TMRI0/WUI2/GPC4
IS/IS/IOS
GPIO16
TMRI1/WUI3/GPC6
IS/IS/IOS
GPIO17
L80HLAT/BAO/WUI24/GPE0
O4/O4/IS/IOS
Internal Connectors
GPIO in more details.
The GPIO’s are contro lled vi a the ITE IT 8516F Em bedded Contr oll er. Eac h GPIO has 100pF t o gro und,
clamping Diode to 3V3 and has multiplexed functionality. Som e pins can be DAC (D igital to Analogue
Converter output), PWM (Pulse Width Modulate d signal output), ADC (Analogue to Digital Con verter
input), TMRI (Tim er Counter Input), WUI (Wake Up Input), RI (Ring Indicator Input) or som e special
function.
Signal IT8516F pin name Type Description
Feature Break-out board:
PN 820978 Feature BOB (Break-Out-Board)
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Jumper (in default position)
J37 pin 1
J37
pin1-2
pin2-3
X
-
Don’t use. (Board do not boot with jumper in this position)
-
X
Default position
-
-
Load Default BIOS Settings and erase Password
J37
pin1-2
pin2-3
X
-
Load Default BIOS Settings exclusive erasing Password
-
X
Default position
-
-
No function
Internal Connectors
!
6.13 “Load Default BIOS Settings” Jumper (J37)
The “Load Default BIOS Settings” Jumper (J37) can be used to recover from incorrect BIOS settings. As
an example, incorrect BIOS settings coursing no display to turn on can be erased by the Jumper.
The Jumper has 3 positions: Pin 1-2, Pin2-3 (default position) and not mounted.
Warning
Don’t leave the jumper in position 1-2,
otherwise if power is disconnecte d,
the battery will fully deplete within a
few weeks.
BIOS version 12 and above:
Description
To Load Default BIOS Settings, inclusive erasing password:
1. Turn off power completely (no SB5V).
2. Remove the Jumper completely from J37.
3. Turn on power.
4. Motherboard beeps fast 20 times and turns off.
5. Turn off power.
6. Move the Jumper back to position 2-3 (default position).
7. Turn on power (use the Power On Button if required to boot).
Motherboard might automatically reboot a few times. Wait until booting is completed.
BIOS version below 12:
Description
To Load Default BIOS Settings, exclusive erasing Password and RTC:
1. Turn off power completely (no SB5V).
2. Move the Jumper to pin 1-2 for ~10 seconds.
3. Move the Jumper back to position 2-3 (default position).
4. Turn on power (use the Power On Button if required to boot).
5. Motherboard might automatically reboot a few times. Wait until booting is completed.
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Internal Connectors
The SPI Recover Jumper (J4) is used to select BIOS Recovery Flash
6.14 SPI Recover Jumper (J4)
instead of BIOS Default Flash. By default the J4 is not installed.
It is recommended that Jumper is plugged to J4 only in case the
Default BIOS is corrupted, so that board is malfunctioning and do not
boot, or the Recovery BIOS is requested to be upgraded in order to have
sufficient or same support as the default BIOS.
In case Default BIOS seems corrupted then it is recommend to first trying
to use the Load Default BIOS Settings Jumper, see previous page.
When using customised BIOS it is recommended to upgrade both the
Default BIOS and the Recovery BIOS with the Customised BIOS.
Recover corrupted Default BIOS procedure:
1. Turn off power.
2. Install "SPI Recover Jumper"(J4).
3. Reboot.
4. Remove "SPI Recover Jumper".
5. Upgrade the BIOS (fx. execute Upd.bat, containing: BF safewrite xxxxxx.xxx).
6. When BIOS upgrade is completed then turn off power completely (inclusive Standby +5V).
7. Wait minimum 10 seconds.
8. Turn on power. System will automatically reboot 4-5 times within 1 minute.
Upgrade Recovery BIOS procedure:
1. Reboot.
2. Install "SPI Recover Jumper"(J4).
3. Upgrade the BIOS (fx. execute UpdRec.bat, containing: BF safewrite xxxxxx.xxx RE COVERY).
4. When BIOS upgrade is completed then turn off power completely (inclusive Standby +5V).
5. Wait minimum 10 seconds.
6. Turn on power. System will automatically reboot 4-5 times within 1 minute.
7. If boot succeed then remove "SPI Recover Jumper".
Upgrade first Default BIOS and then Recovery BIOS with Customised BIOS procedure:
1. Reboot.
2. Upgrade the BIOS (fx. execute Upd.bat).
3. When BIOS upgrade is completed then turn off power completely (inclusive Standby +5V).
4. Wait minimum 10 seconds.
5. Turn on power. System will automatically reboot 4-5 times within 1 minute.
6. Install "SPI Recover Jumper"(J4).
7. Upgrade the BIOS (fx. execute UpdRec.bat).
8. When BIOS upgrade is completed then turn off power completely (inclusive Standby +5V).
9. Wait minimum 10 seconds.
10. Turn on power. System will automatically reboot 4-5 times within 1 minute.
11. Remove "SPI Recover Jumper".
Note: It is not recommended to upgrade both Default BIOS and Recovery BIOS without rebooting and
verification in between, unless you are sure that BIOS and tools works correctly. Otherwise there is a
risk that both BIOS will be corrupted at the same time with the result that board cannot be recovered.
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KTD-N0819-K Page 63
Note
Pull U/D
Ioh/Iol
Type
Signal
PIN
Signal
Type
Ioh/Iol
Pull U/D
Note
- CLK
1 2 SB3V3
PWR - - - I CS0#
3 4 ADDIN
IO /10K
10K/
- NC
5 6 NC
- - -
10K/
IO
MOSI
7 8 ISOLATE#
IO 100K
- IO
MISO
9
10
GND
PWR - -
CLK
Serial Clock
Internal Connectors
6.15 SPI Connect or (SPI) (J5)
The SPI Connector is normally not used. If howe ver a SPI BIOS is connec te d via the SPI Con nec tor
then the board will try to boot on it.
Signal Description
SB3V3
CS0# CS0# Chip Select 0, active low.
ADDIN ADDIN input signal must be NC.
MOSI Master Output, Slave Input
ISOLATE#
MISO Master Input, Slave Output
3.3V Standby Voltage power line. Normally output power, but when Motherboard is
turned off then the on-board SPI Flash can be 3.3V power sourced via this pin.
The ISOLATE# input, act ive low, is normally NC , but must be connected to GN D when
loading SPI flash. Po wer Supply to the Motherb oard must be turned of f when loading
SPI flash. The pull up resistor is connected via diode to 5VSB.
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1
OBSFN_A0
2
OBSFN_A1
3
GND
PWR
-
4
NC
NC
-
5
NC
NC
-
6
GND
PWR
-
7
NC
NC
-
8
NC
NC
-
9
GND
PWR
-
10
HOOK0
11
HOOK1
12
HOOK2
13
HOOK3
14
HOOK4
15
HOOK5
16
+5V
PWR
-
17
HOOK6
18
HOOK7
500R
(500R by 2x1K in parallel)
19
GND
PWR
-
20
TDO
/51R
21
TRST#
/51R
22
TDI
/51R
23
TMS
/51R
24
NC
NC
-
25
GND
PWR
-
26
TCK0
/51R
Internal Connectors
6.16 XDP-CPU (Debug Por t for CPU) (J32)
The XDP-CPU (Intel Debug Port for CPU) connector is not mounted and not supported. XDP connector
layout (pads) is located on the backside of PCB and is prepared for the Molex 52435-2671 (or 52435-
2672).
Pin Signal Description Type Pull Up/Down Note
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1
NC
NC
-
2
NC
NC
-
3
GND
PWR
-
4
NC
NC
-
5
NC
NC
-
6
GND
PWR
-
7
NC
NC
-
8
NC
NC
-
9
GND
PWR
-
10
HOOK0
RSMRST#
Connected to HOOK6
11
HOOK1
PWRBTN#
12
HOOK2
NC
-
13
HOOK3
NC
-
14
HOOK4
NC
-
15
HOOK5
NC
-
16
+5V
PWR
-
17
HOOK6
Connected to HOOK1
18
HOOK7
RESET#
500R
(500R by 2x1K in parallel)
19
GND
PWR
-
20
TDO
210R/100R
21
TRST#
22
TDI
210R/100R
23
TMS
210R/100R
24
NC
NC
-
25
GND
PWR
-
26
TCK0
/51R
Internal Connectors
6.17 XDP-PCH (Debug Port for Chipset) (J33)
The XDP-PCH (Intel Debug Port for Chipset) connector is not mounted and not supported. XDP-PCH
connector layout (pads) is located on the backside of PCB (below J35 connector on mITX version) and
is prepared for the Molex 52435-2671 (or 52435-2672).
Pin Signal Description Type Pull Up/Down
Note
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KTD-N0819-K Page 66
Note
Type
Signal
PIN
Signal
Type
Note
+12V
B1
A1
NC
+12V
B2
A2
+12V
+12V
B3
A3
+12V
GND
B4
A4
GND
SMB_CLK
B5
A5
NC
SMB_DATA
B6
A6
NC
GND
B7
A7
NC
+3V3
B8
A8
NC
NC
B9
A9
+3V3
SB3V3
B10
A10
+3V3
WAKE#
B11
A11
RST#
NC
B12
A12
GND
GND
B13
A13
PCIE_x16 CLK
PEG_TXP[0]
B14
A14
PCIE_x16 CLK#
PEG_TXN[0]
B15
A15
GND
GND
B16
A16
PEG_RXP[0]
CLKREQ
B17
A17
PEG_RXN[0]
GND
B18
A18
GND
PEG_TXP[1]
B19
A19
NC
PEG_TXN[1]
B20
A20
GND
GND
B21
A21
PEG_RXP[1]
GND
B22
A22
PEG_RXN[1]
PEG_TXP[2]
B23
A23
GND
PEG_TXN[2]
B24
A24
GND
GND
B25
A25
PEG_RXP[2]
GND
B26
A26
PEG_RXN[2]
PEG_TXP[3]
B27
A27
GND
PEG_TXN[3]
B28
A28
GND
GND
B29
A29
PEG_RXP[3]
NC
B30
A30
PEG_RXN[3]
CLKREQ
B31
A31
GND
GND
B32
A32
NC
PEG_TXP[4]
B33
A33
NC
PEG_TXN[4]
B34
A34
GND
GND
B35
A35
PEG_RXP[4]
Slot Connectors
7 Slot Connectors (PCIe, miniPCIe, PCI)
7.1 PCIe Connectors
All members of the KTQM67 family supports one (x16) (16-lane) PCI Express port, one x1 PCI Express
port and two miniPCI Express ports.
The 16-lane (x16) PCI Express (PCIe 2.0) port can be used for external PCI Express cards inclusive
graphics card. It is located nearest the CPU. Maximum theoretical bandwidth using 16 lanes is 16 GB/s.
PCIe x1, PCIe x2, PCIe x4, PCIe x8 and PCIe x16 are supported; however PCIe x2 is only supported
when using 3rd generation Intel® Core™ pr oc ess or (Ivy Br idge).
The two miniPCIe (PCIe 2.0) is located on the backside of the board.
The 1-lane (x1) PCI Expr e ss (PCIe 2.0) can be used for any PCIex1 cards inclusive “Riser PCIex1 to
PCI Dual flexible card“.
7.1.1 PCI-Express x16 Connector (PCIe x16)
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GND
B36
A36
PEG_RXN[4]
PEG_TXP[5]
B37
A37
GND
PEG_TXN[5]
B38
A38
GND
GND
B39
A39
PEG_RXP[5]
GND
B40
A40
PEG_RXN[5]
PEG_TXP[6]
B41
A41
GND
PEG_TXN[6]
B42
A42
GND
GND
B43
A43
PEG_RXP[6]
GND
B44
A44
PEG_RXN[6]
PEG_TXP[7]
B45
A45
GND
PEG_TXN[7]
B46
A46
GND
GND
B47
A47
PEG_RXP[7]
CLKREQ
B48
A48
PEG_RXN[7]
GND
B49
A49
GND
PEG_TXP[8]
B50
A50
NC
PEG_TXN[8]
B51
A51
GND
GND
B52
A52
PEG_RXP[8]
GND
B53
A53
PEG_RXN[8]
PEG_TXP[9]
B54
A54
GND
PEG_TXN[9]
B55
A55
GND
GND
B56
A56
PEG_RXP[9]
GND
B57
A57
PEG_RXN[9]
PEG_TXP[10]
B58
A58
GND
PEG_TXN[10]
B59
A59
GND
GND
B60
A60
PEG_RXP[10]
GND
B61
A61
PEG_RXN[10]
PEG_TXP[11]
B62
A62
GND
PEG_TXN[11]
B63
A63
GND
GND
B64
A64
PEG_RXP[11]
GND
B65
A65
PEG_RXN[11]
PEG_TXP[12]
B66
A66
GND
PEG_TXN[12]
B67
A67
GND
GND
B68
A68
PEG_RXP[12]
GND
B69
A69
PEG_RXN[12]
PEG_TXP[13]
B70
A70
GND
PEG_TXN[13]
B71
A71
GND
GND
B72
A72
PEG_RXP[13]
GND
B73
A73
PEG_RXN[13]
PEG_TXP[14]
B74
A74
GND
PEG_TXN[14]
B75
A75
GND
GND
B76
A76
PEG_RXP[14]
GND
B77
A77
PEG_RXN[14]
PEG_TXP[15]
B78
A78
GND
PEG_TXN[15]
B79
A79
GND
GND
B80
A80
PEG_RXP[15]
CLKREQ
B81
A81
PEG_RXN[15]
NC
B82
A82
GND
Slot Connectors
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Note
Type
Signal
PIN
Signal
Type
Note
WAKE#
1
2
+3V3
PWR
NC
NC
3
4
GND
PWR
NC
NC
5
6
+1.5V
PWR 1
CLKREQ#
7
8
NC
NC
PWR
GND
9
10
NC
NC PCIE_mini CLK#
11
12
NC
NC PCIE_mini CLK
13
14
NC
NC
PWR
GND
15
16
NC
NC
NC
NC
17
18
GND
PWR
NC
NC
19
20
W_Disable#
2
PWR
GND
21
22
RST#
PCIE_RXN
23
24
+3V3 Dual
PWR
PCIE_RXP
25
26
GND
PWR
PWR
GND
27
28
+1.5V
PWR
PWR
GND
29
30
SMB_CLK
PCIE_TXN
31
32
SMB_DATA
PCIE_TXP
33
34
GND
PWR
PWR
GND
35
36
NC
NC
PWR
GND
37
38
NC
NC
PWR
+3V3 Dual
39
40
GND
PWR
PWR
+3V3 Dual
41
42
NC
NC
PWR
GND
43
44
NC
NC
CLK_MPCIE
45
46
NC
NC DATA_MPCIE
47
48
+1.5V
PWR RST_MPCIE#
49
50
GND
PWR 3 SEL_MSATA
51
52
+3V3 Dual
PWR
Slot Connectors
7.1.2 miniPCI-Express mPCIe0 (J34)
The miniPCI Express port mPCIe0 is located on the bac ks ide.
Beside miniPCIe cards the mPCIe0 also supports mSATA SSD cards up to
3.0Gb/s (typically 300MB/s).
Note: no USB signals are available. mSATA signals are shared with SATA2
and SATA2 is unsupported if mSATA module is installed in mPCIe0.
Note 1: 10K ohm pull-up to 3V3.
Note 2: 2K2 ohm pull-up to 3V3 Dual.
Note 3: 100K ohm pull-up to 1V8 (S0 mode)
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Note
Type
Signal
PIN
Signal
Type
Note
WAKE#
1
2
+3V3
PWR
NC
NC
3
4
GND
PWR
NC
NC
5
6
+1.5V
PWR 1
CLKREQ#
7
8
NC
NC
PWR
GND
9
10
NC
NC PCIE_mini CLK#
11
12
NC
NC PCIE_mini CLK
13
14
NC
NC
PWR
GND
15
16
NC
NC
NC
NC
17
18
GND
PWR
NC
NC
19
20
W_Disable#
2
PWR
GND
21
22
RST#
PCIE_RXN
23
24
+3V3 Dual
PWR
PCIE_RXP
25
26
GND
PWR
PWR
GND
27
28
+1.5V
PWR
PWR
GND
29
30
SMB_CLK
PCIE_TXN
31
32
SMB_DATA
PCIE_TXP
33
34
GND
PWR
PWR
GND
35
36
NC
NC
NC
NC
37
38
NC
NC
NC
NC
39
40
GND
PWR
NC
NC
41
42
NC
NC
NC
NC
43
44
NC
NC
NC
NC
45
46
NC
NC
NC
NC
47
48
+1.5V
PWR
NC
NC
49
50
GND
PWR
NC
NC
51
52
+3V3
PWR
Slot Connectors
7.1.3 miniPCI-Express mPCIe1 (J35)
The miniPCI Express port mPCIe1 is located on the backside.
Note: no USB or mSATA signals are available.
Note 1: 10K ohm pull-up to 3V3 Dual.
Note 2: 2K2 ohm pull-up to 3V3 Dual.
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KTD-N0819-K Page 70
Note
Type
Signal
PIN
Signal
Type
Note
PWR
+12V
B1
A1
GND
PWR
PWR
+12V
B2
A2
+12V
PWR
PWR
+12V
B3
A3
+12V
PWR
PWR
GND
B4
A4
GND
PWR
SMB_CLK
B5
A5
CL_CLK
SMB_DATA
B6
A6
CL_RST
PWR
GND
B7
A7
SMB_ALERT
PWR
+3V3
B8
A8
CL_DATA
2 JTAG_TEST#
B9
A9
+3V3
PWR
PWR
3V3 Dual
B10
A10
+3V3
PWR
WAKE#
B11
A11
RST#
NC
NC
B12
A12
GND
PWR
PWR
GND
B13
A13
PCIE_CLK_P
PCIE_TXP
B14
A14
PCIE_CLK_N
PCIE_TXN
B15
A15
GND
PWR
PWR
GND
B16
A16
PCIE_RXP
1
CLK_REQ
B17
A17
PCIE_RXN
PWR
GND
B18
A18
GND
PWR
Connector Definitions
Slot Connectors
7.1.4 PCI-Express x1 Connector (PCIe x1) (J36)
The KTQM67/mITX supports one PCIe x1.
Note 1: 10K ohm pull-up to 3V3 Dual.
Note 2: 4K7 ohm pull-down to GND.
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KTQM67 Users Guide
KTD-N0819-K Page 71
Terminal
S C
PWR
-12V
F01
E01
TRST#
O O TCK
F02
E02
+12V
PWR
PWR
GND
F03
E03
TMS O
NC I TDO
F04
E04
TDI O PWR
+5V
F05
E05
+5V
PWR
PWR
+5V
F06
E06
INTA#
I
I INTB#
F07
E07
INTC#
I I INTD#
F08
E08
+5V
PWR
NC - -
F09
E09 - -
NC
NC - -
F10
E10
+5V (I/O)
PWR NC - -
F11
E11 - -
NC PWR
GND
F12
E12
GND
PWR
PWR
GND
F13
E13
GND
PWR NC - -
F14
E14
GNT3#
OT
PWR
GND
F15
E15
RST#
O O CLKB
F16
E16
+5V (I/O)
PWR
PWR
GND
F17
E17
GNT0#
OT
I REQ0#
F18
E18
GND
PWR
PWR
+5V (I/O)
F19
E19
PME#
I
IOT
AD31
F20
E20
AD30
IOT
IOT
AD29
F21
E21
+3.3V
PWR
PWR
GND
F22
E22
AD28
IOT
IOT
AD27
F23
E23
AD26
IOT
IOT
AD25
F24
E24
GND
PWR
PWR
+3.3V
F25
E25
AD24
IOT
IOT
C/BE3#
F26
E26
GNT1#
OT
IOT
AD23
F27
E27
+3.3V
PWR
PWR
GND
F28
E28
AD22
IOT
IOT
AD21
F29
E29
AD20
IOT
IOT
AD19
F30
E30
GND
PWR
PWR
+3.3V
F31
E31
AD18
IOT
IOT
AD17
F32
E32
AD16
IOT
IOT
C/BE2#
F33
E33
+3.3V
PWR
PWR
GND
F34
E34
FRAME#
IOT
IOT
IRDY#
F35
E35
GND
PWR
PWR
+3.3V
F36
E36
TRDY#
IOT
IOT
DEVSEL#
F37
E37
GND
PWR
PWR
GND
F38
E38
STOP#
IOT
IOT
LOCK#
F39
E39
+3.3V
PWR
IOT
PERR#
F40
E40
SDONE
IO
PWR
+3.3V
F41
E41
SB0#
IO
IOC
SERR#
F42
E42
GND
PWR
PWR
+3.3V
F43
E43
PAR
IOT
IOT
C/BE1#
F44
E44
AD15
IOT
IOT
AD14
F45
E45
+3.3V
PWR
PWR
GND
F46
E46
AD13
IOT
IOT
AD12
F47
E47
AD11
IOT
IOT
AD10
F48
E48
GND
PWR
PWR
GND
F49
E49
AD09
IOT
SOLDER SIDE
COMPONENT SIDE
IOT
AD08
F52
E52
C/BE0#
IOT
IOT
AD07
F53
E53
+3.3V
PWR
PWR
+3.3V
F54
E54
AD06
IOT
IOT
AD05
F55
E55
AD04
IOT
IOT
AD03
F56
F56
GND
PWR
PWR
GND
F57
E57
AD02
IOT
IOT
AD01
F58
E58
AD00
IOT
PWR
+5V (I/O)
F59
E59
+5V (I/O)
PWR
IOT
ACK64#
F60
E60
REQ64#
IOT
PWR
+5V
F61
E61
+5V
PWR
PWR
+5V
F62
E62
+5V
PWR
Slot Connectors
7.2 PCI Slot Connectors
KTQM67/Flex support 3 PCI slots PCI0 (J45), PCI1 (J48), PCI2 (J49) and KTQM67/AT X P supports 6
PCI slots PCI0 (J45), PCI1 (J48), PCI2 (J49) PCI3 (J54), PCI4 (J53), PCI5 (J55).
KTQm67/mITX doesn’t support PCI slots, but optionally PCIex1 to PCI Dual Flexible Riser can be used.
Note Type Signal
Signal Type Note
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KTD-N0819-K Page 72
SYSTEM PINS
Clock provides timing for all transactions on PCI and is an input to every PCI device. All other PCI
signals, except RST#, INTA#, INTB#, INTC#, and INTD#, are sampled on the risingedge of CLK and
all other timing parameters are defined with respect to this edge. PCI operates at 33MHz.
Power Management Event interrupt signal. Wake up signal.
Reset is used to bring PCI-specific registers, sequencers, and signals to a consistent state. What
PCI sequencer is beyond the scope of this specification,
except for reset states of required PCI configuration registers. Anytime RST# is asserted, all PCI
output signals must be driven to their benign state. In general, this means they must be
(they cannot be driven low or high during reset). To prevent AD, C/BE#, and PAR signals from
RST# may be asynchronous to CLK when asserted or deasserted. Although asynchronous,
devices that are required to boot the system will respond after reset.
ADDRESS AND DATA
Address and Data are multiplexed on the same PCI pins. A bus transaction consists of an address
The address phase is the clock cycle in which FRAME# is asserted. During the address phase
AD[31::00] contain a physical address (32 bits). For I/O, this is a byte address; for configuration and
ring data phases AD[07::00] contain the least significant byte
(lsb) and AD[31::24] contain the most significant byte (msb). Write data is stable and valid when
during those clocks where both IRDY# and TRDY# are asserted.
Bus Command and Byte Enables are multiplexed on the same PCI pins. During the address phase of
Byte Enables. The Byte Enables are valid for the entire data phase and determine which byte lanes
carry meaningful data. C/BE[0]# applies to byte 0 (lsb) and C/BE[3]# applies to byte 3 (msb).
Parity is even parity across AD[31::00] and C/BE[3::0]#. Parity generation is required by all PCI
agents. PAR is stable and valid one clock after the address phase. For data phases, PAR is stable
and valid one clock after either IRDY# is asserted on a write transaction or TRDY# is asserted on a
transaction. Once PAR is valid, it remains valid until one clock after the completion of the current
data phase. (PAR has the same timing as AD[31::00], but it is delayed by one clock.) The master
drives PAR for address and write data phases; the target drives PAR for read data phases.
INTERFACE CONTROL PINS
Cycle Frame is driven by the current master to indicate the beginning and duration of an access.
FRAME# is asserted to indicate a bus transaction is beginning. While FRAME# is asserted, data
transfers continue. W hen FRAME# is deasserted, the transaction is in the final data phase or has
completed.
Initiator Ready indicates the initiating agent’s (bus master’s) ability to complete the current data
in conjunction with TRDY#. A data phase is completed on
any clock both IRDY# and TRDY# are sampled asserted. During a write, IRDY# indicates that valid
data is present on AD[31::00]. During a read, it indicates the master is prepared to accept data. Wait
cycles are inserted until both IRDY# and TRDY# are asserted together.
Target Ready indicates the target agent’s (selected device’s) ability to complete the current data
any clock both TRDY# and IRDY# are sampled asserted. During a read, TRDY# indicates that valid
data is present on AD[31::00]. During a write, it indicates the target is prepared to accept data. Wait
cycles are inserted until both IRDY# and TRDY# are asserted together.
Stop indicates the current target is requesting the master to stop the current transaction.
Lock indicates an atomic operation that may require multiple transactions to complete. W hen LOCK#
ive transactions may proceed to an address that is not currently locked. A
grant to start a transaction on PCI does not guarantee control of LOCK#. Control of LOCK# is
PCI while a single master retains ownership of LOCK#. If a device implements Executable Memory, it
should also implement LOCK# and guarantee complete access exclusion in that memory. A target of
sion to a minimum of 16 bytes (aligned). Host
bridges that have system memory behind them should implement LOCK# as a target from the PCI
bus point of view and optionally as a master.
Initialization Device Select is used as a chip select during configuration read and write transactions.
Device Select, when actively driven, indicates the driving device has decoded its address as the
target of the current access. As an input, DEVSEL# indicates whether any device on the bus has
been selected.
Slot Connectors
7.2.1 Signal Description – PCI Slot Connector
CLK
PME#
RST#
effect RST# has on a device beyond the
asynchronously tri-stated. SERR# (open drain) is floated. REQ# and GNT# must both be tri-stated
floating during reset, the central resource may drive these lines during reset (bus parking) but only to
a logic low level–they may not be driven high.
deassertion is guaranteed to be a clean, bounce-free edge. Except for configuration accesses, only
AD[31::00]
C/BE[3::0]#
PAR
FRAME#
IRDY#
phase followed by one or more data phases. PCI supports both read and write bursts.
memory, it is a DWORD address. Du
IRDY# is asserted and read data is stable and valid when TRDY# is asserted. Data is transferred
a transaction, C/BE[3::0]# define the bus command. During the data phase C/BE[3::0]# are used as
read
phase of the transaction. IRDY# is used
TRDY#
STOP#
LOCK#
IDSEL
DEVSEL#
phase of the transaction. TRDY# is used in conjunction with IRDY#. A data phase is complet ed on
is asserted, non-exclus
obtained under its own protocol in conjunction with GNT#. It is possible for different agents to use
an access that supports LOCK# must provide exclu
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ARBITRATION PINS (BUS MASTERS ONLY)
Request indicates to the arbiter that this agent desires use of the bus. This is a point to point signal.
Every master has its own REQ# which must be tri-stated while RST# is asserted.
Grant indicates to the agent that access to the bus has been granted. This is a point to point signal.
contain a valid request. The arbiter can only perform arbitration after RST# is deasserted. A master
a universal I/O buffer.
ERROR REPORTING PINS.
The error reporting pins are required by all devices and maybe asserted when enabled
Parity Error is only for the reporting of data parity errors during all PCI transactions except a Special
state and must be driven active by the agent receiving data
two clocks following the data when a data parity error is detected. The minimum duration of PERR# is
lock for each data phase that a data parity error is detected. (If sequential data phases each
have a data parity error, the PERR# signal will be asserted for more than a single clock.) PERR#
are no special conditions when a data parity error may be lost or when reporting of an error may be
delayed. An agent cannot report a PERR# until it has claimed the access by asserting DEVSEL# (for
a target) and completed a data phase or is the master of the curren t transa cti on.
System Error is for reporting address parity errors, data parity errors on the Special Cycle command,
orting mechanism is required. SERR# is
pure open drain and is actively driven for a single PCI clock by the agent reporting the error. The
assertion of SERR# is synchronous to the clock and meets the setup and hold times of all bused
restoring of SERR# to the deasserted state is accomplished by a weak pullup
The agent that reports SERR#s to the operating system does so anytime SERR# is sampled
asserted.
INTERRUPT PINS (OPTIONAL).
drivers. The assertion and deassertion of INTx# is asynchronous to CLK. A device asserts its INTx# line when
requesting attention from its device driver. Once the INTx# signal is asserted, i t remains asserted until the device
ng request. When the request is cleared, the device deasserts its INTx# signal. PCI defines
For a single function device, only INTA# may be used while the other three interrupt lines have no meaning.
Interrupt A is used to request an interrupt.
Interrupt B is used to request an interrupt and only has meaning on a multi-function device.
Interrupt C is used to request an interrupt and only has meaning on a multi-function device.
Interrupt D is used to request an interrupt and only has meaning on a multi-function device.
Board type
Slot
REQ
GNT
IDSEL
INTA
INTB
INTC
INTD
KTQM67/Flex
0
REQ0
GNT0
17
INTA
INTB
INTC
INTD
1
REQ1
GNT1
18
INTB
INTC
INTD
INTA
2
REQ2
GNT2
19
INTC
INTD
INTA
INTB
KTQM67/ATXP
0
REQ0
GNT0
17
INTA
INTB
INTC
INTD
1 REQ1
GNT1
18
INTB
INTC
INTD
INTA
2 REQ2
GNT2
19
INTC
INTD
INTA
INTB
3 REQ3
GNT3
20
INTD
INTA
INTB
INTC
4 REQ4
GNT4
21
INTA
INTB
INTC
INTD
5 REQ5
GNT5
22
INTB
INTC
INTD
INTA
Slot Connectors
REQ#
GNT#
PERR#
SERR#
Every master has its own GNT# which must be ignored while RST# is asserted.
While RST# is asserted, the arbiter must ignore all REQ# lines since they are tri-stated and do not
must ignore its GNT# while RST# is asserted. REQ# and GNT# are tri-state signals due to power
sequencing requirements when 3.3V or 5.0V only add-in boards are used with add-in boards that use
Cycle. The PERR# pin is sustained trione c
must be driven high for one clock before being tri-stated as with all sustained tri-state signals. There
or any other system error where the result will be catastrophic. If an agent does not want a nonmaskable interrupt (NMI) to be generated, a different rep
signals. However, the
(same value as used for s/t/s) which is provided by the system designer and not by the 73signaling
agent or central resource. This pull-up may take two to three clock periods to fully restore SERR#.
Interrupts on PCI are optional and defined as “level sensitive,” asserted low (negative true), using open drain output
driver clears the pendi
one interrupt line for a single function device and up to four interrupt lines for a multi-function device or connector.
INTA#
INTB#
INTC#
INTD#
7.2.2 KTQM67 PCI IRQ & INT routing
Page 74
KTQM67 Users Guide
KTD-N0819-K Page 74
On-board Connectors
Mating Connectors / Cables
Manufacturer
Type no.
Manufacturer
Type no.
FAN_CPU
Foxconn
HF2704E-M1
AMP
1375820-4 (4-pole)
FAN_SYS
AMP
1470947-1
AMP
1375820-3 (3-pole)
Molex
22-23-2061
Molex
22-01-2065
KT 1046-3381
KT 1053-2384
Foxconn
HF1104E
Molex
50-57-9404
Molex
70543-0038
Hon Hai
LD1807V-S52T
Molex
67489-8005
Kontron
KT 821035 (cable kit)
ATXPWR
Molex
44206-0002
Molex
5557-24R
ATX+12V-4pin
Lotes
ABA-POW-003-K02
Molex
39-01-2045
EDP
Tyco
5-2069716-3
Tyco
2023344-3
Don Connex
C44-40BSB1-G
Don Connex
A32-40-C-G-B-1
Kontron
KT 910000005
Kontron
KT 821515 (cable kit)
Kontron
KT 821155 (cable kit)
Wuerth
61201020621
Molex
90635-1103
Kontron
KT 821016 (cable kit)
Kontron
KT 821017 (cable kit)
USB8/9, 10/11,
12/13
USB6/7 (*)
(FRONTPNL)
-
Kontron
KT 821401 (cable kit)
IEEE1394_0/1
Foxconn
HS1105F-RNP9
Kontron
KT 821040 (cable kit)
Molex
87831-2620
Molex
51110-2651
Kontron
KT 821043 (cable kit)
Pinrex
512-90-24GBB3
Molex
90635-1243
Kontron
KT 821042 (cable kit)
Foxconn
HS5422F
Don Connex
A05c-44-B-G-A-1-G
Onboard/mating connector
8 On-board - & mating connector types
The Mating connectors / Cables are connec tors or cable kits which are fitting th e On-board connector.
The highlighted cable kits are included in the “KTQM67 Cable & Driver Kit” PN 826598, in different
quantities depending on type of connector. For example there is 4 x 821017 COM cables and 6 x
821035 SATA cables.
Connector
KBDMSE
CDROM
SATA
LVDS
COM1,2, 3, 4
AUDIO_HEAD
Kontron
Pinrex 512-90-10GBB2 Kontron
KT 821401 (cable kit)
FRONTPNL
FEATURE
* USB6/USB7 is located in FRONTPNL connector. Depending on application KT 821401 can be used.
Note: Only one connector will be m entioned for each type of on-board connector even though se veral
types with same fit, form and function are approved and could be used as alternative. Please also notice
that standard connectors like DVI, DP, PCIe, miniPCIe, PCI, Audio Jack, Ethernet and USB is not
included in the list.
Page 75
KTQM67 Users Guide
KTD-N0819-K Page 75
Address (hex)
Size (hex)
Description
Intel® 82802 Firmware Hub Device
Motherboard resources
0xFEE00000
0xFEEFFFFF
100000
Motherboard resources
0xFED90000
0xFED93FFF
4000
Motherboard resources
0xFED45000
0xFED8FFFF
4B000
Motherboard resources
0xFED40000
0xFED44FFF
5000
System board
0xFED20000
0xFED3FFFF
20000
Motherboard resources
0xFED1C000
0xFED1FFFF
4000
Motherboard resources
0xFED19000
0xFED19FFF
1000
Motherboard resources
0xFED18000
0xFED18FFF
1000
Motherboard resources
0xFED10000
0xFED17FFF
8000
Motherboard resources
0xFED00000
0xFED003FF
400
High Precision Event Timer
0xF8000000
0xFBFFFFFF
4000000
Motherboard resources
0xF7F2B000
0xF7F2B00F
10
Intel® Management Engine Interface
0xF7F29000
0xF7F29FFF
1000
Intel® 82579LM Gigabit Network
0xF7F28000
0xF7F283FF
400
Intel® Chipset USB EHCI – 1C2D
0xF7F27000
0xF7F273FF
400
Intel® Chipset USB EHCI – 1C26
0xF7F26000
0xF7F267FF
800
Intel® Chipset 6 port SATA ACHI – 1C22
0xF7F25000
0xF7F250FF
100
Intel® Chipset SMBus Controller – 1C22
0xF7F20000
0xF7F23FFF
4000
High Definition Audio Controller
0xF7F00000
0xF7F1FFFF
20000
Intel® 82579LM Gigabit Network
0xF7E20000
0xF7E23FFF
4000
Intel® 82574L Gigabit Network #10
Intel® Chipset PCIe Root port 3 – 1C14
Intel® 82574L Gigabit Network #10
0xF7D20000
0xF7D23FFF
4000
Intel® 82574L Gigabit Network #9
Intel® Chipset PCIe Root port 4 – 1C16
Intel® 82574L Gigabit Network #9
Intel® Chipset PCIe Root port 6 – 1C1A
LSI 1394 OHCI Compliant Host Controller
0xF7800000
0xF7BFFFFF
400000
Intel® HD Graphics Family
0xE0000000
0xEFFFFFFF
10000000
Intel® HD Graphics Family
Motherboard resources
PCI bus
0x40000000
0x401FFFFF
200000
System board
0x20000000
0x201FFFFF
200000
System board
0xE4000
0xE7FFF
4000
PCI bus
0xE0000
0xE3FFF
4000
PCI bus
0xDC000
0xDFFFF
4000
PCI bus
0xD8000
0xDBFFF
4000
PCI bus
0xD4000
0xD7FFF
4000
PCI bus
0xD0000
0xD3FFF
4000
PCI bus
Intel® HD Graphics Family
PCI bus
System Resources
9 System Resources
9.1 Memory Map
0xFF000000 0xFFFFFFFF 1000000
0xF7E00000 0xF7EFFFFF
0xF7D00000 0xF7DFFFFF
0xF7C00000 0xF7CFFFFF
0xDFA00000 0xDFA00FFF
0xA0000 0xBFFFF 20000
100000
100000
100000
1000
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KTQM67 Users Guide
KTD-N0819-K Page 76
Bus
#
Device
#
Function
#
Vendor
ID
Device
ID
Chip
Device Function
0 0 0
8086
0104
CPU
Intel – DRAM Controller
0 2 0
8086
0126
CPU
Intel - VGA Controller
0
22 0 8086
1C3A
QM67 Chipset
Intel - Other communication
0
25 0 8086
1502
82579LM LAN
Intel - Ethernet Controller
0
26 0 8086
1C2D
QM67 Chipset
Intel - USB
0
27 0 8086
1C20
QM67 Chipset
Intel - HD Audio
0
28 0 8086
1C10
QM67 Chipset
Intel - PCI to PCI bridge 01
0
28 2 8086
1C14
QM67 Chipset
Intel - PCI to PCI bridge 02
0
28 3 8086
1C16
QM67 Chipset
Intel - PCI to PCI bridge 03
0
28 5 8086
1C1A
QM67 Chipset
Intel - PCI to PCI bridge 04
0
29 0 8086
1C26
QM67 Chipset
Intel - USB
0
31 0 8086
1C4F
QM67 Chipset
Intel - LPC
0
31 2 8086
1C03
QM67 Chipset
Intel - SATA Direct Port
0
31 3 8086
1C22
QM67 Chipset
Intel - SMBus
2 0 0
8086
10D3
82574L LAN
Intel - Ethernet Controller
3 0 0
8086
10D3
82574L LAN
Intel - Ethernet Controller
4 0 0
11C1
5903
LSI 1394 OHCI
LSI- IEEE1394
System Resources
9.2 PCI Devices
Page 77
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IRQ
Notes
NMI IRQ0
X
IRQ1
X
IRQ2
IRQ3
X
IRQ4
X
IRQ5
IRQ6
IRQ7
X
IRQ8
X
IRQ9
IRQ10
X
IRQ11
X
IRQ12
X
IRQ13
X
IRQ14
IRQ15
IRQ16
X X
IRQ17
X
IRQ18
IRQ19
X
IRQ20
IRQ21
IRQ22
X
IRQ23
X
IRQ24
IRQ25
IRQ26
System Resources
9.3 Interrupt Usage
System timer
PS/2 Keyboard
COM2 Selection in BIOS
COM1 Selection in BIOS
COM4 Selection in BIOS
System CMOS/real-tim e wat ch
COM3 Selection in BIOS
Intel(R) SMBus -1C22
PS2 Mouse
Numerical Data Processor
Intel(R) USB EHCI – 1C2D
Intel(R) Management Engine Interface
LSI 1394 OHCI Host
Intel(R) SATA ACHI - 1C03
High Definition Audio
Intel(R) USB EHCI - 1C26
Page 78
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Address range (hex)
Size (hex)
Description
0x0000FFFF
0x0000FFFF
1
Motherboard resources
0x0000F0D0
0x0000F0D7
8
Intel® 6 port SATA AHCI – 1C03
0x0000F0C0
0x0000F0C3
4
Intel® 6 port SATA AHCI – 1C03
0x0000F0B0
0x0000F0B7
8
Intel® 6 port SATA AHCI – 1C03
0x0000F0A0
0x0000F0A3
4
Intel® 6 port SATA AHCI – 1C03
0x0000F060
0x0000F07F
20
Intel® 6 port SATA AHCI – 1C03
0x0000F040
0x0000F05F
20
Intel® SMBus – 1C22
0x0000F000
0x0000F03F
40
Intel® HD Graphics family
0x0000E000
0x0000EFFF
1000
Intel® PCIe Root port 3 – 1C14
0x0000D000
0x0000DFFF
1000
Intel® PCIe Root port 4 – 1C16
0x0000164E
0x0000164F
2
Motherboard resources
0x00000F78
0x00000F7F
8
Motherboard resources
0x00000D00
0x0000FFFF
F300
PCI bus
0x00000B78
0x00000B7F
8
Motherboard resources
0x00000A00
0x00000A2F
30
Motherboard resources
0x00000778
0x0000077F
8
Motherboard resources
0x00000680
0x0000069F
20
Motherboard resources
0x00000500
0x0000057F
80
Motherboard resources
Programmable interrupt controller
Motherboard resources
0x00000458
0x0000047F
28
Motherboard resources
0x00000454
0x00000457
4
Motherboard resources
0x00000400
0x00000453
54
Motherboard resources
0x000003F8
0x000003FF
8
COM1
0x000003E8
0x000003EF
8
COM4
0x000003C0
0x000003DF
20
Intel® HD Graphics family
0x000003B0
0x000003BB
C
Intel® HD Graphics family
0x00000378
0x0000037F
8
Printer port LPT1
0x000002F8
0x000002FF
8
COM2
0x000002E8
0x000002EF
8
COM3
0x00000290
0x0000029F
10
Motherboard resources
0x0000020E
0x0000020F
2
Motherboard resources
0x000000F0
0x000000FF
10
Numeric data processor
0x000000E0
0x000000EF
10
Motherboard resources
0x000000D0
0x000000DF
10
Direct memory access controller
0x000000BE
0x000000BF
2
Motherboard resources
0x000000BC
0x000000BD
2
Programmable interrupt controller
0x000000BA
0x000000BB
2
Motherboard resources
0x000000B8
0x000000B9
2
Programmable interrupt controller
0x000000B6
0x000000B7
2
Motherboard resources
0x000000B4
0x000000B5
2
Programmable interrupt controller
0x000000B2
0x000000B3
2
Motherboard resources
0x000000B0
0x000000B1
2
Programmable interrupt controller
0x000000AE
0x000000AF
2
Motherboard resources
0x000000AC
0x000000AD
2
Programmable interrupt controller
0x000000AA
0x000000AB
2
Motherboard resources
0x000000A8
0x000000A9
2
Programmable interrupt controller
0x000000A6
0x000000A7
2
Motherboard resources
0x000000A4
0x000000A5
2
Programmable interrupt controller
0x000000A2
0x000000A3
2
Motherboard resources
0x000000A0
0x000000A1
2
Programmable interrupt controller
System Resources
9.4 IO Map
0x000004D0 0x000004D1 2
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Address range (hex)
Size (hex)
Description
0x00000093
0x0000009F
D
Direct memory access controller
0x00000092
0x00000092
1
Motherboard resources
0x00000081
0x00000091
10
Direct memory access controller
0x00000072
0x00000080
E
Motherboard resources
0x00000070
0x00000070
1
System CMOS/real time clock
0x00000067
0x00000067
1
Motherboard resources
0x00000065
0x00000065
1
Motherboard resources
0x00000064
0x00000064
1
Standard PS/2 Keyboard
0x00000063
0x00000063
1
Motherboard resources
0x00000061
0x00000061
1
Motherboard resources
0x00000060
0x00000060
1
Standard PS/2 Keyboard
0x00000054
0x0000005F
C
Motherboard resources
0x00000050
0x00000053
4
System Timer
0x0000004E
0x0000004F
2
Motherboard resources
0x00000044
0x0000004D
A
Motherboard resources
0x00000040
0x00000043
4
System Timer
0x0000003E
0x0000003F
2
Motherboard resources
0x0000003C
0x0000003D
2
Programmable interrupt controller
0x0000003A
0x0000003B
2
Motherboard resources
0x00000038
0x00000039
2
Programmable interrupt controller
0x00000036
0x00000037
2
Motherboard resources
0x00000034
0x00000035
2
Programmable interrupt controller
0x00000032
0x00000033
2
Motherboard resources
0x00000030
0x00000031
2
Programmable interrupt controller
0x0000002E
0x0000002F
2
Motherboard resources
0x0000002C
0x0000002D
2
Programmable interrupt controller
0x0000002A
0x0000002B
2
Motherboard resources
0x00000028
0x00000029
2
Programmable interrupt controller
0x00000026
0x00000027
2
Motherboard resources
0x00000024
0x00000025
2
Programmable interrupt controller
0x00000022
0x00000023
2
Motherboard resources
0x00000020
0x00000021
2
Programmable interrupt controller
0x00000010
0x0000001F
10
Motherboard resources
Direct memory access controller
PCI bus
System Resources
0x00000000 0x0000001F 20
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Aptio Setup Utility – Copyright © 2012 American Megatrends, Inc.
Main
Advanced
Chipset
Boot
Security
Save & Exit
BIOS Information
Set the Date. Use Tab to
→← : Select Screen
Version 2.15.1226. Copyright © 2012 American Megatrends, Inc
Feature
Options
Description
System Date
MM/DD/YYYY
Set the system date.
System Time
HH:MM:SS
Set the system time.
BIOS - Main
Blue text for settings that can be changed. White text for actual setting to be changed via the control keys
(Black text for settings that cannot be changed via control keys)
10 BIOS
The BIOS Setup is used to view and configure BIOS settings for the board. The BIOS Setup is
accessed by pressing the <Del> -key after the Power-On Self-Test (POST) memory test begins and
before the operating system boot begins.
The BIOS set tin gs will be loaded a utomatic ally when load ing “Restore Default” see “Save & Exit” m enu.
In this Users Guide the default settings are indicated by bold. Please notice that “Restore User
Defaults” might have different set of default values.
10.1 Main
BIOS Vendor
Core Version
Compliancy
BIOS Version
Build Date and Time
EC Firmware Version
Board Information
Product Name
PCB ID
Serial #
Part #
Boot Count
System Date
System Time
Access Level
American Megatrends
4.6.5.3
UEFI 2.3; PI 1.2
15
12/19/2013 07:42:40
V1.21 07/05/13
KTQM67/mITX
02
01074840
64120000
622
[Mon 12/23/2013]
[12:02:43]
Administrator
switch between elements.
↑↓ : Select Item
Enter: Select
+/- : Change Opt.
F1: General Help
F2: Previous Values
F3: Optimized Defaults
F4: Save & Exit
ESC: Exit
The following table describes the changeable settings:
Page 81
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Aptio Setup Utility – Copyright © 2012 American Megatrends, Inc.
Main
Advanced
Chipset
Boot
Security
Save & Exit
PCI Subsystem Settings
PCI, PCI-X and PCI Express
→← : Select Screen
Version 2.15.1226. Copyright © 2012 American Megatrends, Inc
BIOS - Advanced
10.2 Advanced
►
► ACPI Settings
► Trusted Computing
► CPU Configuration
► SATA Configuration
► Intel TXT (LT) Configuration
► AMT Configuration
► Acoustic Management Configuration
► USB Configuration
► SMART Settings
► Super IO Configuration
► Voltage Monitor
► Hardware Health Configuration
► Displayblock Setup
► LAN Configuration
► Delay Startup
► Serial Port Console Redirection
► CPU PPM Configuration
Settings.
↑↓ : Select Item
Enter: Select
+/- : Change Opt.
F1: General Help
F2: Previous Values
F3: Optimized Defaults
F4: Save & Exit
ESC: Exit
The Advanced (main) menu contains only submenu selections which will be described in more details
on the following pages.
In order to make a selection of a submenu activated the ↑↓ keys until the requested submenu becomes
white color, then activate the <Enter>.
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Function
Selection
Description
Aptio Setup Utility – Copyright © 2012 American Megatrends, Inc.
Advanced
PCI Bus Driver Version
V 2.05.02
Enables or Disables 64bit
→← : Select Screen
Version 2.15.1226. Copyright © 2012 American Megatrends, Inc
BIOS - Advanced
10.2.1 Advanced - PCI Subsystem Settings
PCI 64bit Resources Handling
Above 4G Decoding
► PCI Express Settings
► PCI Express GEN 2 Settings
[Disabled]
capable Devices to be Decoded
in Above 4G Address Space
(Only if System Supports 64 bit
PCI Decoding).
↑↓ : Select Item
Enter: Select
+/- : Change Opt.
F1: General Help
F2: Previous Values
F3: Optimized Defaults
F4: Save & Exit
ESC: Exit
Above 4G Decoding
Note: The selection in bold is the default selection.
Disabled
Enabled
Enables or Disables 64bit capable Devices to
be Decoded in Above 4G Address Space (Only
if System Supports 64 bit PCI Decoding).
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Aptio Setup Utility – Copyright © 2012 American Megatrends, Inc.
Advanced
PCI Express Link Register Settings
Set the ASPM Level: Force L0s
→← : Select Screen
Version 2.15.1226. Copyright © 2012 American Megatrends, Inc
BIOS - Advanced
10.2.1.1 PCI Express Settings
ASPM Support
WARNING: Enabling ASPM may cause
Some PCI-E devices to fail
[Disabled]
- Force all links to L0s State:
Auto – BIOS auto configure:
Disable – Disabled ASPM
↑↓ : Select Item
Enter: Select
+/- : Change Opt.
F1: General Help
F2: Previous Values
F3: Optimized Defaults
F4: Save & Exit
ESC: Exit
Function Selection Description
ASPM Support
Disabled
Auto
Force L0s
Set the ASPM Level:
Force L0s - Force all links to L0s State.
Auto – BIOS auto configure
Disable – Disabl ed AS PM
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Aptio Setup Utility – Copyright © 2012 American Megatrends, Inc.
Advanced
PCI Express GEN2 Link Register Settings
If supported by hardware and
Target Link Speed
[Auto]
→← : Select Screen
Version 2.15.1226. Copyright © 2012 American Megatrends, Inc
BIOS - Advanced
10.2.1.2 PCI Express GEN 2 Settings
set to ‘Force to 2.5GT/s’ for
Downstream Ports, this sets an
upper limit on Link operational
speed by restricting the values
advertised by the Upstream
component in its training
sequences. Ehen ‘Auto’ is
selected HW initialized data
will be used.
↑↓ : Select Item
Enter: Select
+/- : Change Opt.
F1: General Help
F2: Previous Values
F3: Optimized Defaults
F4: Save & Exit
ESC: Exit
Function Selection Description
Target Link Speed
Auto
Force to 2.5GT/s
Force to 5.0GT/s
If supported by hardware and set to ‘Force to
2.5GT/s’ for Downstream Ports, this sets an
upper limit on Link operational speed by
restricting the values advertised by the
Upstream component in its training sequences.
Ehen ‘Auto’ is selected HW initialized data will
be used.
Page 85
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Aptio Setup Utility – Copyright © 2012 American Megatrends, Inc.
Advanced
ACPI Settings
Enables or Disables BIOS APCI
→← : Select Screen
Version 2.15.1226. Copyright © 2012 American Megatrends, Inc
Function
Selection
Description
BIOS - Advanced
10.2.2 Advanced - APCI Settings
Enable ACPI Auto Configuration
Enable Hibernation
ACPI Sleep State
[Disabled]
[Enabled]
[Both S1 and S3 ava…]
Auto Configuration.
↑↓ : Select Item
Enter: Select
+/- : Change Opt.
F1: General Help
F2: Previous Values
F3: Optimized Defaults
F4: Save & Exit
ESC: Exit
Enable ACPI Auto
Configuration
Enable Hibernation
ACPI Sleep State
Disabled
Enabled
Disabled
Enabled
Suspend Disabled
S1 only(CPU Stop Clock)
S3 only(Suspend to RAM)
Both S1 and S3 available
For OS to choose from
Enables or Disables BIOS APCI Auto
Configuration.
Enables or Disables System ability to
Hibernate (OS/S4 Sleep State). This option
may be not effective with some OS.
Select ACPI sleep state the system will
enter when the SUSPEND button is
pressed.
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Aptio Setup Utility – Copyright © 2012 American Megatrends, Inc.
Advanced
Configuration
Enables or Disables BIOS
support for security device. O.S.
→← : Select Screen
Version 2.15.1226. Copyright © 2012 American Megatrends, Inc
BIOS - Advanced
10.2.3 Advanced - Trusted Computing
Security Device Support
TPM State
Pending operation
Current Status Information
TPM Enabled Status:
TPM Active Status:
TPM Owner Status:
[Enable]
[Enabled]
[None]
[Disabled]
[Deactivated]
[Unowned]
will not show Security Device.
TCG EFI protocol and INT1A
interface will not be available.
↑↓ : Select Item
Enter: Select
+/- : Change Opt.
F1: General Help
F2: Previous Values
F3: Optimized Defaults
F4: Save & Exit
ESC: Exit
Function Selection Description
Security Device Support
TPM State
Pending operation
Note: TPM State and Pending operation are only visible if Security Device Support is Enabled followed
by Save and Exit.
Disabled
Enabled
Disabled
Enabled
None
Enable Take Ownership
Disable Take Ownership
TPM Clear
Enables or Disables BIOS support for
security device. O.S. will not show Secur ity
Device. TCG EFI protocol and INT1A
interface will not be available.
Enable/Disable Security Device. NOTE: Your
Computer will reboot during restart in order
to change State of the Device.
Schedule an Operation for the Security
Device. NOTE: Your Computer will reboot
during restart in order to change State of the
Device.
Page 87
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Aptio Setup Utility – Copyright © 2012 American Megatrends, Inc.
Advanced
CPU Configuration
Enabled for Windows XP and
→← : Select Screen
Version 2.15.1226. Copyright © 2012 American Megatrends, Inc
Function
Selection
Description
Enabled
BIOS - Advanced
10.2.4 Advanced - CPU Configuration
Intel® Core™ i5-2520M CPU @
CPU Signature
Microcode Patch
Max CPU Speed
Min CPU Speed
CPU Speed
Processor Cores
Intel HT Technology
Intel VT-x Technology
Intel SMX Technology
64-bit
L1 Data Cache
L1 Code Cache
L2 Cache
L3 Cache
Hyper-threading
Active Processor Cores
Limit CPUID Maximum
Execute Disable Bit
Intel Virtualization Technology
2.50GHz
206a7
26
2500 MHz
800 MHz
2500 MHz
2
Supported
Supported
Supported
Supported
32 kB x 2
32 kB x 2
256 kB x 2
3072 kB
[Enabled]
[All]
[Disabled]
[Enabled]
[Disabled]
Linux (OS optimized for HyperThreading Technology) and
Disabled for other OS (OS not
optimized for
Hyper-Threading Technology).
When Disabled only one thread
per enabled core is enabled.
↑↓ : Select Item
Enter: Select
+/- : Change Opt.
F1: General Help
F2: Previous Values
F3: Optimized Defaults
F4: Save & Exit
ESC: Exit
Hyper-threading
(Note1)
Active Processor Cores
Limit CPUID Maximum
Execute Disable Bit
Intel Virtualization
Technology
Note1: Not present when using Intel Celeron B810 CPU.
Disabled
Enabled
All
1
Disabled
Disabled
Enabled
Disabled
Enabled
Enabled for Windows XP and Linux (OS
optimized for Hyper-Threading Technology) and
Disabled for other OS (OS not optimized for
Hyper-Threading Technology). When Disabled
only one thread per enabled core is enabled.
Number of cores to enable in each processor
package.
Disabled for Windows XP
XD can prevent certain classes of malicious
buffer overflow attacks when combined with
supporting OS (Windows Server 2003 SP1,
Windows XP SP2, SuSE Linux 9.2, RedHat
Enterprise 3 Update 3.)
When enabled, a VMM can utilize the additional
hardware capabilities provided by Vanderpool
Technology.
Page 88
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KTD-N0819-K Page 88
BIOS - Advanced
Notes:
Intel HT Technology (Hyper Threading Technology) is a performance feature which allows one core on
the processor to appear like 2 cores to the operating system. This doubles the execution resources
available to the O/S, which potentially increases the per f ormance of your overall system.
Intel VT-x Technology (Virtualization Technology) Previously codenamed "Vanderpool", VT-x represents
Intel's technology for virtualization on the x86 platform. In order to support “Virtualization Technology”
the CPU must support VT-x and the BIOS setting “Intel Virtualization Technology” must be enabled.
Intel SMX Technology (Safer Mode Extensions Technology) is a part of the Trusted Execution
Technology.
Page 89
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Aptio Setup Utility – Copyright © 2012 American Megatrends, Inc.
Advanced
SATA Controller(s)
[Enabled]
░
░
░
░
░
░
░
░
░
░
░
░
░
░
░
░
░
░
░
░
░
░
░
░
Enable or Disable SATA Device.
→← : Select Screen
↑↓
Enter: Select
+/
F1: General Help
F2: Previous Values
F3: Optimized Defaults
F4: Save & Exit
ESC: Exit
Version 2.15.1226. Copyright © 2012 American Megatrends, Inc
Enabled
Gen3
BIOS - Advanced
10.2.5 Advanced - SATA Configuration
SATA Mode Selection
SATA Controller Speed
► Software Feature Mask Configuration
Serial ATA Port 0
Software Preserve
Port 0
Hot Plug
External SATA
SATA Device Type
Spin Up Device
Serial ATA Port 1
Software Preserve
Port 1
Hot Plug
External SATA
SATA Device Type
Spin Up Device
Serial ATA Port 2
Software Preserve
Port 2
Hot Plug
External SATA
Spin Up Device
[ACHI]
[Gen3]
ST3120827AS (120.
NOT SUPPORTED
[Enabled]
[Disabled]
[Disabled]
[Hard Disk Driver]
[Disabled]
Empty
Unknown
[Enabled]
[Disabled]
[Disabled]
[Hard Disk Driver]
[Disabled]
Empty
Unknown
[Enabled]
[Disabled]
[Disabled]
[Disabled]
: Select Item
- : Change Opt.
Note: By scrolling down (or up) also settings for Serial ATA Port 3 - 5 can be accessed.
Function Selection Description
SATA Controller(s)
SATA Mode Selection
SATA Controller Speed
Note: in the above BIOS menu the functions below the submenu Software Feature Mask Configuration
will be described after the submenu description.
Disabled
IDE
ACHI
RAID
Gen1
Gen2
(Scroll indicator bar)
Enable or Disable SATA Device.
Determines how SATA controller(s) operate.
Indicates the maximum speed the SATA
controller can support.
Page 90
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Aptio Setup Utility – Copyright © 2012 American Megatrends, Inc.
Advanced
RAID0
[Enabled]
Enables or Disables RAID0
→← : Select Screen
Version 2.15.1226. Copyright © 2012 American Megatrends, Inc
BIOS - Advanced
10.2.5.1 Software Feature Mask Configuration
RAID1
RAID10
RAID5
Intel Rapid Recovery Technology
OROM UI and BANNER
HDD Unlock
LED Locate
IRRT Only on eSATA
Smart Response Technology
OROM UI Delay
[Enabled]
[Enabled]
[Enabled]
[Enabled]
[Enabled]
[Enabled]
[Enabled]
[Enabled]
[Enabled]
[2 Seconds]
feature.
↑↓ : Select Item
Enter: Select
+/- : Change Opt.
F1: General Help
F2: Previous Values
F3: Optimized Defaults
F4: Save & Exit
ESC: Exit
Page 91
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Function
Selection
Description
Enabled
BIOS - Advanced
Submenu Software Feature Mask Configuration description:
RAID0
RAID1
RAID10
RAID5
Intel Rapid Recovery
Technology
OROM UI and BANNER
HDD Unlock
LED Locate
IRRT Only on eSATA
Smart Response
Technology
OROM UI Delay
Disabled
Enabled
Disabled
Disabled
Enabled
Disabled
Enabled
Disabled
Enabled
Disabled
Enabled
Disabled
Enabled
Disabled
Enabled
Disabled
Enabled
Disabled
Enabled
2 Seconds
4 Seconds
6 Seconds
8 Seconds
Enable or disable RAID0 feature.
Enable or disable RAID1 feature.
Enable or disable RAID10 feature.
Enable or disable RAID5 feature.
Enable or disable Intel Rapid Recovery
Technology.
If enabled, then the OROM UI is shown.
Otherwise, no OROM banner or information will
be displayed if all disks and RAID volumes are
Normal.
If enabled, indicates that the HDD password
unlock in the OS is enabled.
If enabled, indicates that the LED/SGPIO
hardware is attached and ping to locate feature
is enabled on the OS.
If enabled, then only IRRT volumes can span
internal and eSATA drives. If disabled, then any
RAID volume can span internal and eSATA
drives.
Enable or disable Smart Response Technology
If enabled, indicates the delay of the OROM UI
Splash Screen in normal status.
Page 92
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Function
Selection
Description
Enabled
Enabled
Hot Plug
External SATA
Spin Up Device
BIOS - Advanced
Remaining SATA Config uratio n menu description:
Port 0
Hot Plug
External SATA
SATA Device Type
Spin Up Device
Port 1
Hot Plug (see same function above) (see same f unction abo ve)
External SATA (see same function above) (see same function above)
SATA Device Type (see same function above) (see same function above)
Spin Up Device (see same function above) (see same function above)
Port 2
Hot Plug (see same function above) (see same function above)
External SATA
Spin Up Device (see same function above) (see same function above)
Port 3
Hot Plug (see same function above) (see same function above)
External SATA
Spin Up Device (see same function above) (see same function above)
Port4
Port5
Hot Plug
External SATA (see same function above) (see same function above)
Spin Up Device (see same function above) (see same function above)
Disabled
Enabled
Disabled
Enabled
Disabled
Enabled
Hard Disk Drive
Solid State Drive
Disabled
Enabled
Disabled
Enabled
Disabled
(see same function above) (see same function above)
Disabled
Enabled
(see same function above) (see same function above)
Disabled
(see same function above) (see same function above)
(see same function above) (see same function above)
(see same function above) (see same function above)
Disabled
Enabled
(see same function above) (see same function above)
Enable or Disable SATA Port.
Designates this port as Hot Pluggable.
External SATA Support.
Identify the SATA port is connected to Solid
State Drive or Hard Disk Drive.
On an edge detect from 0 to 1, the PCH
starts a COMRESET initialization sequence
to the device.
Enable or Disable SATA Port.
Enable or Disable SATA Port.
Enable or Disable SATA Port.
Enable or Disable SATA Port.
Enable or Disable SATA Port.
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Aptio Setup Utility – Copyright © 2012 American Megatrends, Inc.
Advanced
Intel Trusted Execution Technology Configuration
Enables or Disables Intel ®
→← : Select Screen
Version 2.15.1226. Copyright © 2012 American Megatrends, Inc
BIOS - Advanced
10.2.6 Advanced - Intel TXT (LT) Configuration
Intel TXT support only can be enabled/disabled if SMX
is enabled. VT and VT-d support must also be enabled
prior to TXT.
Secure Mode Extensions (SMX) Enabled
Intel TXT support [Disabled]
TXT (LT) support.
↑↓ : Select Item
Enter: Select
+/- : Change Opt.
F1: General Help
F2: Previous Values
F3: Optimized Defaults
F4: Save & Exit
ESC: Exit
SMX (Intel Secure Mode Extension) instructions are enabled if supported by the CPU, so no BIOS
settings are present.
VT (Intel Virtualization Technology) is enabled/disabled in the menu: Adva nc ed > CPU Configuration.
VT-d can be enabled/disabled in the menu: Chips et > Sys tem Agent (SA) Configuration.
Function Selection Description
Intel TXT support
Disabled
Enabled
Enables or Disables Intel ® TXT (LT) support.
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Aptio Setup Utility – Copyright © 2012 American Megatrends, Inc.
Advanced
Intel AMT
[Disabled]
Enable/Disable Intel ® Active
→← : Select Screen
Version 2.15.1226. Copyright © 2012 American Megatrends, Inc
Function
Selection
Description
BIOS - Advanced
10.2.7 Advanced - AMT Configuration
BIOS Hotkey Pressed
MEBx Selection Screen
Hide Un-Configure ME Confirmation
MEBx Debug Message Output
Un-Configure ME
AMT Wait Timer
Disable ME
ASF
Active Remote Assistance Process
USB Configure
PET Progress
AMT CIRA Timeout
Watchdog
OS Timer
BIOS Timer
[Disabled]
[Disabled]
[Disabled]
[Disabled]
[Disabled]
0
[Disabled]
[Enabled]
[Disabled]
[Enabled]
[Enabled]
0
[Disabled]
0
0
Management Technology BIOS
Extension.
Note: iAMT H/W is always
enabled.
This option just controls the
BIOS Extension execution.
If enabled, this requires
additional firmware in the SPI
device.
↑↓ : Select Item
Enter: Select
+/- : Change Opt.
F1: General Help
F2: Previous Values
F3: Optimized Defaults
F4: Save & Exit
ESC: Exit
Intel AMT
BIOS Hotkey Pressed
(Note1)
MEBx Selection Screen
(Note1)
Hide Un-Configure ME
Confirmation (Note1)
MEBx Debug Message
Output (Note1)
Un-Configure ME (Note1)
Disabled
Enabled
Disabled
Enabled
Disabled
Enabled
Disabled
Enabled
Disabled
Enabled
Disabled
Enabled
Enable/Disable Intel ® Active Man agement
Technology BIOS Extensio n.
Note: iAMT H/W is always enabled.
This option just controls the BIOS Extension
execution.
If enabled, this requires additional firmware in
the SPI device.
OEMFlag Bit 1:
Enable/Disabled BIOS hotk e y press .
OEMFlag Bit 2:
Enable/Disabled BIOS MEBx Select ion Scr een .
OEMFlag Bit 6:
Hide Un-Configure ME without password
Confirmation Prompt
OEMFlag Bit 14:
Enable MEBx Debug Message Output.
OEMFlag Bit 15:
Un-Configure ME without pass word.
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Enabled
BIOS - Advanced
Function Selection Description
AMT Wait Timer (Note1) 0 - 65535 (Note4)
Disable ME (Note1)
ASF (Note1)
Active Remote Assistance
Process (Note1)
USB Configure (Note1)
PET Progress (Note1)
AMT CIRA Timeout
(Note1)
(Note5)
Watchdog (Note2)
OS Timer (Note3) 0 - 65535 (Note4) Set OS watchdog timer.
BIOS Timer (Note3) 0 - 65535 (Note4) Set BIOS Watchdog Timer.
Note1: Only if Intel AMT = Enabled.
Note2: This Watchdog function is unsupported.
Recommendation, use Watchdog function present in Hardware Health Configuration menu.
Note3: Only if Watchdog = Enabled.
Note4: To enter number use digit keys and/or +/- keys.
Note5: Only if Active Remote Assistance Process = Enabled.
Disabled
Enabled
Disabled
Enabled
Disabled
Enabled
Disabled
Disabled
Enabled
0 – 255 (Note4)
Disabled
Enabled
Set timer to wait before sending
ASF_GET_BOOT_OPTIONS.
Set ME to Soft Temporary Disabled.
Enable/Disabled Alert Specification Format.
Trigger CIRA boot.
Enable/Disable USB Configure function.
Users can Enable/Disable PET Events progress
to receive PET events or not.
OEM defined timeout for MPS connection to be
established.
0 – use the default timeout value of 60
seconds.
255 – MEBX waits until the connection
succeeds.
Enable/Disable Watchdog Timer.
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Aptio Setup Utility – Copyright © 2012 American Megatrends, Inc.
Advanced
Acoustic Management Configuration
Option to Enable or Disable
Automatic Acoustic
Management
→← : Select Screen
↑↓
Enter: Select
+/
F1: General Help
F2: Previous Values
F3: Optimized Defaults
F4: Save & Exit
ESC:
Version 2.15.1226. Copyright © 2012 American Megatrends, Inc
BIOS - Advanced
10.2.8 Advanced - Acoustic Management Configuration
Automatic Acoustic Management
Sata Port 0
ST3120827AS
Acoustic Mode
[Disabled]
[Not Available]
: Select Item
- : Change Opt.
Exit
Function Selection Description
Automatic Acoustic
Management
Note:
Automatic acoustic management (AAM) is a method for reducing acoustic emanations in AT Attachment
(ATA) mass storage devices, such as ATA hard disk drives and ATAPI optical disc drives. AAM is an
optional feature set for ATA/ATAPI devices; when a device supports AAM, the acoustic management
parameters are adjustable through a software or firmware user interface.
The ATA/ATAPI sub-command for setting the level of AAM operation is an 8-bit value from 0 to 255.
Most modern drives ship with the vendor-defined value of 0x00 in the acoustic management setting.
This often translates to the max-performance value of 254 stated in the standard. Values between 128
and 254 (0x80 - 0xFE) enable the feature and select most-quiet to most-performance settings along that
range. Though hard drive manufacturers may support the whole range of values, the settings are
allowed to be banded so many values could provide the same acoustic performance.
Enabled
Disabled
Option to Enable or Disable Automatic Acoustic
Management.
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Aptio Setup Utility – Copyright © 2012 American Megatrends, Inc.
Advanced
USB Configuration
Enables Legacy USB support.
→← : Select Screen
Version 2.15.1226. Copyright © 2012 American Megatrends, Inc
BIOS - Advanced
10.2.9 Advanced - USB Configuration
USB Module Version
USB Devices:
2 Hubs
Legacy USB Support
EHCI Hand-off
USB Mass Storage Driver Support
8.10.28
[Enabled]
[Disabled]
[Enabled]
AUTO option disables legacy
support if no USB devices are
connected. DISABLE option
will keep USB devices available
only for EFI applications.
↑↓ : Select Item
Enter: Select
+/- : Change Opt.
F1: General Help
F2: Previous Values
F3: Optimized Defaults
F4: Save & Exit
ESC: Exit
Function Selection Description
Legacy USB Support
EHCI Hand-off
USB Mass Storage Driver
Support
Enabled
Disabled
Auto
Enabled
Disabled
Enabled
Disabled
Enables Legacy USB support.
AUTO option disables legacy support if no USB
devices are connected. DISABLE option will
keep USB devices available only for EFI
applications.
This is a workaround for OSes without EHCI
hand-off support.
The EHCI ownership change should be claimed
by EHCI driver.
Enable/disable USB Mass Stor a ge Driv er
Support.
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Aptio Setup Utility – Copyright © 2012 American Megatrends, Inc.
Advanced
SMART Settings
Run SMART Self Test on all
HDDs during POST.
→← : Select Screen
↑↓
Enter: Select
+/
F1: General Help
F2: Previous Values
F3: Optimized Defaults
F4: Save & Exit
ESC: Exit
Version 2.15.1226. Copyright © 2012 American Megatrends, Inc
BIOS - Advanced
10.2.10 Advanced - SMART Settings
SMART Self Test
[Disabled]
: Select Item
- : Change Opt.
Function Selection Description
SMART Self Test
Note:
S.M.A.R.T. (Self-Monitoring, Analysis and Reporting Technology; often written as SMART) is a
monitoring system for computer hard disk drives to detect and report on various indicators of reliability,
in the hope of anticipating failures.
Disabled
Enabled
Run SMART Self-Test on all HDDs during
POST.
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Aptio Setup Utility – Copyright © 2012 American Megatrends, Inc.
Advanced
Super IO Configuration
Set Parameters of Serial Port 1
→← : Select Screen
Version 2.15.1226. Copyright © 2012 American Megatrends, Inc
BIOS - Advanced
10.2.11 Advanced - Super IO Configuration
Super IO Chip
► Serial Port 1 Configuration
► Serial Port 2 Configuration
Super IO Chip
► Serial Port 3 Configuration
► Serial Port 4 Configuration
► Parallel Port Configuration
IT8516F
W83627H
(COMA)
↑↓ : Select Item
Enter: Select
+/- : Change Opt.
F1: General Help
F2: Previous Values
F3: Optimized Defaults
F4: Save & Exit
ESC: Exit
Note: Parallel Port is not available (connector not mounted).
The 5 submenus are shown and described on the following pages.
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Aptio Setup Utility – Copyright © 2012 American Megatrends, Inc.
Advanced
Serial Port 1 Configuration
Enable or Disable Serial Port
→← : Select Screen
Version 2.15.1226. Copyright © 2012 American Megatrends, Inc
Function
Selection
Description
BIOS - Advanced
10.2.11.1 Serial Port 1 Configuration
Serial Port
Device Settings
Change Settings
[Enabled]
IO=3F8h; IRQ=4;
[Auto]
(COM)
↑↓ : Select Item
Enter: Select
+/- : Change Opt.
F1: General Help
F2: Previous Values
F3: Optimized Defaults
F4: Save & Exit
ESC: Exit
Serial Port
Change Settings (Note1)
Note1: only if Serial Port = Enabled
Disabled
Enabled
Auto
IO=3F8h; IRQ=4;
IO=3F8h; IRQ=3,4,5,6,7,10,11,12;
IO=2F8h; IRQ=3,4,5,6,7,10,11,12;
IO=3E8h; IRQ=3,4,5,6,7,10,11,12;
IO=2E8h; IRQ=3,4,5,6,7,10,11,12;
Enable or Disable Seri al Por t
(COM)
Select an optimal setting for Super
IO device.
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