Page 1
If it’s embedded, it’s Kontron
KTQM67 Users Guide
KTD-N0819-E
KTQM67/mITX
KTQM67/Flex
KTQM67/ATXP
Page 2
KTQM67 Users Guide
KTD-N0819-E Page 2
Document revisio n hi s t or y.
Revision
Date
By
Comment
E Jan 19th 2012 MLA
Correction to SPI description. Added information about
Processor dependent support of SODIMM slots. Changed
SODIMM numbers.
D Dec 28th 2011 MLA
Sspec no. correction. Added i3-2320E. LPT not on mITX. Added
SPI connector details. Added KTQM67/ATXP pictures and
related data.
C Oct 21st 2011 MLA
Added info to add more +12V single power. Added not e
regarding hidden RAID data on SATA drive. Added power
consumption data. Correction GPIO8-12. Batter y type no.
replaced.
B
Aug 29th 2011
MLA
Preliminary version – added info
A
Aug 16th 2011
MLA
Preliminary version – added info
0
Jun 8th 2011
MLA
Preliminary version
Copyright Notice:
Copyright 2011, KONTRON Technology A/S, ALL RIGHTS RESERVED.
No part of this document may be reproduced or transmitted in any form or by any means, electronically
or mechanically, for any purpose, without the express written permission of KONTRON Technology A/S.
Trademark Acknow ledgemen t:
Brand and product names are trademarks or registered trademarks of their respective owners.
Disclaimer:
KONTRON Technology A/S reserves the right to make changes, without notice, to any product,
including circuits and/or software described or contained in this manual in order to improve design
and/or performance.
Specifications listed in this manual are subject to change without notice. KONTRON Technology
assumes no responsibility or liability for the use of the described product(s), conveys no license or title
under any patent, copyright, or mask work rights to these products, and makes no representations or
warranties that these products are free from patent, copyright, or mask work right infringement, unless
otherwise specified. Applications that are described in this manual are for illustration purposes only.
KONTRON Technology A/S makes no representation or warranty that such application will be suitable
for the specified use without further testing or modification.
Life Support Policy
KONTRON Technology’s PRODUCTS ARE NOT FOR USE AS CRITICAL COMPONENTS IN LIFE
SUPPORT DEVICES OR SYSTEMS WITHOUT EXPRESS WRITTEN APPROVAL OF THE GENERAL
MANAGER OF KONTRON Technology A/S.
As used herein:
Life support devices or systems are devices or systems which, (a) are intended for surgical implant into
body, or (b) support or sustain life and whose failure to perform, when properly used in accordance with
instructions for use provided in the labelling, can be reasonably expected to result in significant injury to
the user.
A critical component is any component of a life support device or system whose failure to perform can
be reasonably expected to cause the failure of the life support device or system, or to affect its safety or
effectiveness.
Document details
Page 3
KTQM67 Users Guide
KTD-N0819-E Page 3
KONTRON Technology Technical Support and
Services
If you have questions about installing or using your KONTRON Technology Product, check this User’s
Manual first – you will find answers to most questions here. To obtain support, please contact your local
Distributor or Field Application Engineer (FAE).
Before Contacting Support: Please be prepared to provide as much information as possible:
• CPU Board
1. Type.
2. Part Number (find PN on label)
3. Serial Number if available (find SN on label)
• Configuration
1. CPU Type, Clock speed
2. DRAM Type and Size.
3. BIOS Revision (Find the Version Info in the BIOS Setup).
4. BIOS Settings different than Default Settings (Refer to the BIOS Setup Section).
• System
1. O/S Make and Version.
2. Driver Version numbers (Graphics, Network, and Audio).
3. Attached Hardware: Harddisks, CD-rom, LCD Panels etc.
Warranty
KONTRON Technology warrants its products to be free from defects in material and workmanship
during the warranty perio d. If a product proves to be defective in m aterial or workmanship during the
warranty period, KONTRON Technology will, at its sole option, repair or replace the product with a
similar product.
Replacement Product or parts may include remanufactured or refurbished parts or components.
The warranty does not cover:
1. Damage, deterioration or malfunction resulting from:
A. Accident, misuse, neg lect, fire, water, lig htning, or other acts of nature, unaut horized produc t
modification, or failure to follow instructions supplied with the product.
B. Repair or attempted repair by anyone not authorized by KONTRON Technology.
C. Causes external to the product, such as electric power fluctuations or failure.
D. Normal wear and tear.
E. Any other causes which does not relate to a product defect.
2. Removal, installation, and set-up service charges.
Exclusion of damages:
KONTRON TECHNOLOGY LIABILIT Y IS LIMITED TO THE COST O F REPAIR OR REPLACEMENT
OF THE PRODUCT. KONTRON TECHNOLOGY SHALL NOT BE LIABLE FOR:
1. DAMAGE TO OTHER PROPERTY CAUSED BY ANY DEFECTS IN THE PRODUCT,
DAMAGES BASED U PON INCONVE NIENCE, LOSS OF USE OF THE PR ODUCT, LOSS OF
TIME, LOSS OF PROFITS, LOSS OF BUSINESS OPPORTUNITY, LOSS OF GOODWILL,
INTERFERENCE WITH BUSINESS RELATIONSHIPS, OR OTHER COMMERCIAL LOSS,
EVEN IF ADVISED OF THEIR POSSIBILITY OF SUCH DAMAGES.
2. ANY OTHER DAMAGES, WHETHER INCIDENTAL, CONSEQUENTIAL OR OTHERWISE.
3. ANY CLAIM AGAINST THE CUSTOMER BY ANY OTHER PARTY.
Document details
Page 4
KTQM67 Users Guide
KTD-N0819-E Page 4
Contents
Contents
Introduction ............................................................................................. 7
1 Installation procedure .................................................................... 8
1.1 Installing the board ........................................................................................................................ 8
1.2 Requirement according to IEC60950 ............................................................................................ 9
2 System Specification ................................................................... 10
2.1 Component main data ................................................................................................................. 10
2.2 System overview ......................................................................................................................... 14
2.3 Processor Support Table............................................................................................................. 15
2.4 System Memory support ............................................................................................................. 18
2.5 KTQM67 Graphics Subsystem .................................................................................................... 19
2.5.1 Intel® HD Graphics 3000 ........................................................................................................... 19
2.6 Power Consumption .................................................................................................................... 20
3 Connector Locations ................................................................... 28
3.1 KTQM67/mITX – frontside........................................................................................................... 28
3.2 KTQM67/mITX – IO Bracket area .......................................................................................... 29
3.3 KTQM67/mITX - backside ........................................................................................................... 29
3.4 KTQM67/Flex .............................................................................................................................. 30
3.5 KTQM67/Flex - backside ............................................................................................................. 31
3.6 KTQM67/ATXP ............................................................................................................................ 32
3.7 KTQM67/ATXP - backside .......................................................................................................... 33
4 Connector Definitions .................................................................. 34
5 IO-Area Connectors ..................................................................... 35
5.1 Display connectors (IO Area) ...................................................................................................... 35
5.1.1 DVI Connector (DVI-I) (J41) ....................................................................................................... 35
5.1.2 DP Connectors (DP0/DP1) (J40/J39) ........................................................................................ 36
5.2 Ethernet Connectors ................................................................................................................... 37
5.3 USB Connectors (IO Area) .......................................................................................................... 38
Page 5
KTQM67 Users Guide
KTD-N0819-E Page 5
5.3.1
USB Connector 0/1 (USB0/1) .................................................................................................... 38
5.3.2 USB Connector 2/3 (USB2/3) .................................................................................................... 39
5.3.3 USB Connector 4/5 (USB4/5) .................................................................................................... 39
5.4 Audio Connector (IO Area) .......................................................................................................... 40
6 Internal Connectors ..................................................................... 41
6.1 Power Connector (ATX/BTXPWR) .............................................................................................. 41
6.2 Fan Connectors (FAN_CPU) (J28) and (FAN_SYS) (J29) ......................................................... 42
6.3 PS/2 Keyboard and Mouse connector (KBDMSE) (J27) ............................................................ 43
6.4 Display connectors (Internal)....................................................................................................... 44
6.4.1 eDP connector (EDP) (J38) ....................................................................................................... 44
6.4.2 LVDS Flat Panel Connector (LVDS) (J20) ................................................................................. 45
6.5 SATA (Serial ATA) Disk interface (J21 – J26) ............................................................................ 46
6.6 USB Connectors (USB) ............................................................................................................... 47
6.6.1 USB Connector 6/7 .................................................................................................................... 47
6.6.2 USB Connector 8/9 (USB8/9) (J10) ........................................................................................... 47
6.6.3 USB Connector 10/11 (USB10/11) (J11) ................................................................................... 48
6.6.4 USB Connector 12/13 (USB12/13) (J12) ................................................................................... 48
6.7 Firewire/IEEE1394 connectors (J13,J14) .................................................................................... 49
6.7.1 IEEE1394 connector (IEEE1394_0) (J14) ................................................................................. 49
6.7.2 IEEE1394 connector (IEEE1394_1) (J13) ................................................................................. 49
6.8 Serial COM1 – COM4 Ports (J15, J16, J17, J18) ....................................................................... 50
6.9 LPT (Line Print Terminal – Parallel port) (J44) ......................................................................... 51
6.10 Audio Connectors ........................................................................................................................ 52
6.10.1 CDROM Audio Input (CDROM) (J3) .......................................................................................... 52
6.10.2 Line2 and Mic2 ........................................................................................................................... 52
6.10.1 Audio Header Connector (AUDIO_HEAD) (J31) ....................................................................... 53
6.11 Front Panel Connector (FRONTPNL) (J19) ................................................................................ 54
6.12 Feature Connector (FEATURE) (J30) ......................................................................................... 55
6.13 Clear CMOS Jumper (J37) .......................................................................................................... 57
6.14 SPI Recover Jumper (J4) ............................................................................................................ 58
6.15 SPI Connector (SPI) (J5)............................................................................................................. 58
6.16 XDP-CPU (Debug Port for CPU) (J32) ....................................................................................... 59
6.17 XDP-PCH (Debug Port for Chipset) (J33) ................................................................................... 60
7 Slot Connectors (PCIe, mini P CIe , PCI) ....................................... 61
7.1 PCIe Connectors ......................................................................................................................... 61
Page 6
KTQM67 Users Guide
KTD-N0819-E Page 6
7.1.1
PCI-Express x16 Connector (PCIe x16) .................................................................................... 61
7.1.2 miniPCI-Express mPCIe0 (J34) ................................................................................................. 63
7.1.3 miniPCI-Express mPCIe1 (J35) ................................................................................................. 64
7.1.4 PCI-Express x1 Connector (PCIe x1) (J36) ............................................................................... 65
7.2 PCI Slot Connectors ................................................................................................................... 66
7.2.1 Signal Description – PCI Slot Connector ................................................................................... 67
7.2.2 KTQM67 PCI IRQ & INT routing ................................................................................................ 68
8 On-board - & mating connector types ........................................ 69
9 System Resources ....................................................................... 70
9.1 Memory Map ............................................................................................................................... 70
9.2 PCI Devices ................................................................................................................................. 71
9.3 Interrupt Usage ............................................................................................................................ 72
9.4 IO Map ......................................................................................................................................... 73
10 BIOS .............................................................................................. 75
11 AMI BIOS Beep Codes ................................................................. 76
12 OS Setup ....................................................................................... 77
Page 7
KTQM67 Users Guide
KTD-N0819-E Page 7
Introduction
This manual describes the KTQM67/mITX, KTQM67/Flex and KTQM67/ATXP boards made by
KONTRON Technology A/S. The boards will also be denoted KTQM67 family if no differentiation is
required.
The KTQM67 boards, all based on the QM67 chipset, support 2
nd
generation Intel® i7 -, i5 -, i3 2Core
and 4Core processor and the Celeron B810 2Core, see “Processor Support Table for more specific
details.
The KTQM67 family consist on members having different form factors, and the same functionality
except for the functions listed in the table below.
KTQM67 variants
Format
PCI
LPT
SODIMM Sockets
Single +12V Power Supply
KTQM67/mITX mITX -
-
2 Yes
KTQM67/Flex Flex 3
1
4 No
KTQM67/ATXP ATX 6
1
4 No
Use of this Users Guide implies a basic knowledge of PC-AT hard- and software. This manual is
focused on describing the KTQM67 board’s special features and is not intended to be a standard PC-AT
textbook.
New users are recommended to stud y the short installation procedure stated in the follo wing chapter
before switching-on the power.
All configuration and setup of the CPU board is either done automaticall y or manu ally b y the user via
the CMOS setup menus. Only exception is the Clear CMOS jumper.
Introduction
Page 8
KTQM67 Users Guide
KTD-N0819-E Page 8
Warning: Turn off PSU (Power Supply Unit) completely (no mains power connected to the
PSU) or leave the Power Connectors unconnected while configuring the board. Otherwise
components (RAM, LAN cards etc.) might get damaged. If not using KTQM67/mITX and single
12V power input make sure PSU has 3.3V monitoring watchdog (standard ATX PSU feature),
running the board without 3.3V will damage the board within minutes.
!
!
Warning: When mounting the board to chassis etc. please notice that the board contains
components on both sides of the PCB which can easily be damaged if board is handled
without reasonable care. A damaged component can result in malfunction or no function at all.
1 Installation procedure
1.1 Installing the board
To get the board running, follow these steps. If the board shipped from KONTRON has already
components like RAM, CPU and cooler mounted, then relevant steps below, can be skipped.
1. Turn off the PSU (Power Supply Unit)
2. Insert the DDR3 DIMM 204pin SODIMM module(s)
Be careful to push it in the slot(s) before lock ing the tabs. For a list of appr oved DDR3 SODIMMs
contact your Distributor or FAE. See also chapter “System Memory Support”.
3. Install the processor
The CPU is keyed and will only mount in the CPU s ocket in one way. Use suitable screwdriver to
open/ close the CPU socket. Refer to supported processor overview for details.
4. Cooler Installation
Use heat paste or adhesive pads between CPU and cooler and connect the Fan electrically to the
FAN_CPU connector.
5. Connecting Interfaces
Insert all external c ables for hard disk, k eyboard etc. A monitor m ust be connected in order t o be
able change CMOS settings.
6. Connect and turn on PSU
Connect PSU to the board by the ATX/BTXPWR and the 4-pin ATX+12V connectors. For the
KTQM67/mITX alternatively us e only the 4-pin ATX+12V con nector if single voltage operation (+12V
+/-5%) is requested.
7. Power Button
The PWRBTN_IN must be toggled to start the Power supply; this is done by shorting pins 16
(PWRBTN_IN) and pin 18 (GND) on the FRONTPNL connector (see Connector description). A
“normally open” switch can be connected via the FRONTPNL connector.
8. BIOS Setup
Enter the BIOS setup by pressing the <Del> key during boot up.
Enter Exit Menu and Load Optimal Defaults.
Refer to the “BIOS Configuration / Setup“ section of this manual for details on BIOS setup.
9. Mounting the board to chassis
When fixing the Motherboa rd on a chassis it is r ecommended using screws with integrated washer and
having diameter of ~7mm.
Note: Do not use washers with teeth, as they can damage the PCB and may cause short circuits.
Installation procedure
Note: To clear all CMOS settings, including Password protection, move the Clear CMOS jumper in the
Clear CMOS position (with or without power) for ~10 sec. This will Load Failsafe Defaults and make sure
Secure CMOS is disabled.
Page 9
KTQM67 Users Guide
KTD-N0819-E Page 9
1.2 Requirement according to IEC60950
Users of KTQM67 family boards should take care when designing chassis interface connectors in order
to fulfil the IEC60950 standard:
Lithium Battery precautions:
CAUTION!
Danger of explosion if battery is incorrectly
replaced.
Replace only with same or equivalent type
recommended by manufacturer.
Dispose of used batteries according
to the manufacturer’s instructions.
VORSICHT!
Explosionsgefahr bei unsachgemäßem
Austausch der Batterie.
Ersatz nur durch den selben oder einen vom
Hersteller empfohlenen gleichwertigen Typ.
Entsorgung gebrauchter Batter ie n nach
Angaben des Herstellers.
ADVARSEL!
Lithiumbatteri – Eksplosionsfare ved fejlagtig
håndtering.
Udskiftning må kun ske med batteri
af samme fabrikat og type.
Levér det brugte batteri tilbage til leverandøren.
ADVARSEL
Eksplosjonsfare ved feilaktig skifte av batteri.
Benytt samme batteritype eller en tilsvarende
type anbefalt av apparatfabrikanten.
Brukte batterier kasseres i henhold til
fabrikantens
instruksjoner.
VARNING
Explosionsfara vid felaktigt batteribyte.
Använd samma batterityp eller en ekvivalent
typ som rekommenderas av apparattillverkaren.
Kassera använt batteri enligt fabrikantens
instruktion.
VAROITUS
Paristo voi räjähtää, jos se on virheellisesti
asennettu.
Vaihda paristo ainoastaan laltevalmistajan
suosittelemaan
tyyppiin. Hävitä käytetty paristo valmistajan
ohjeiden
mukaisesti.
When an interface/connector has a VCC (or other power) pin, which is directly connected to a power
plane like the VCC plane:
To protect the external power lines of the peripheral devices, the customer has to take care about:
• That the wires have suitable rating to withstand the maximum available power.
• That the enclosure of the peripheral device fulfils the fire protecting requirements of IEC60950.
Installation procedure
Page 10
KTQM67 Users Guide
KTD-N0819-E Page 10
2 System Specification
2.1 Com ponent main data
The table below summarizes the features of the KTQM67/mITX, KTQM67/Flex and KTQM67/ATXP
embedded motherboards.
Form factor
KTQM67/mITX: miniITX (170,18 mm by 170,18 mm)
KTQM67/Flex: Flex-ATX (190,5 mm by 228,6 mm)
KTQM67/ATXP: ATX (190,5 mm by 304,0 mm)
Processor
Support the following 2nd Generation Intel® Core™ (Sandy Bridge M) and Intel®
Celeron® processors via Socket G2 (rPGA 988B ) ZIF Socket
• Intel® Core™ i7
• Intel® Core™ i5
• Intel® Core™ i3
• Intel® Celeron® B810
Up to 1333MHz system bus and 2/3/4/6MB internal cache.
Memory
• DDR3 SODIMM 204pin socket (2 sockets on mITX and 4 sockets on Flex/ATXP)
• Support single and dual ranks DDR3 1066/1333/1600MT/s
(PC3-8500/PC3-10600/PC3-12800)
• Support system memory from 256MB and up to 4x 8GB (2x 8GB on mITX).
Notes: Only some of the processors support 4 SODIMM slots.
Less than 4GB displayed in System Properties using 32bit OS
(Shared Video Memory/PCI resources is subtracted)
• ECC not supported (PGA processors do not support ECC)
Chipset
Intel QM67 PCH (Platform Controller Hub)
• Intel ® VT-d (Virtualisation Technology for Directed I/O)
• Intel ® TXT (Trusted Execution Technology)
• Intel ® vPRO
• Intel ® AMT (Active Management Technology) version 7
• Intel ® AT (Anti-Theft Technology)
• Intel ® HD Audio Technology
• Intel ® RST (Rapid Storage Technology)
• Intel ® RRT (Rapid Recover Technology)
• SATA (Serial ATA) 6Gb/s and 3Gb/s.
• USB revision 2.0
• PCI Express revision 2.0
• ACPI 3.0b compliant
• Dual Display support (Dual Graphic Pipes)
• Blue-ray HD video playbac k
Security
• Intel® Integrated TPM 1.2 support
Management
• Intel® Active Management T ec hnology (Intel® AMT) 7.0
Audio
Audio, 7.1 Channel High Definition Audio Codec using the VIA 1708B codec
• Line-out
• Line-in
• Surround output: SIDE, LFE, CEN, BACK and FRONT
• Microphone: MIC1 and MIC2
• CDROM in
• SPDIF (electrical Interface only)
• On-board speaker (Electromagnetic Sound Generator like Hycom HY-05LF)
System Specification
Page 11
KTQM67 Users Guide
KTD-N0819-E Page 11
Video
Intel ® i3, i5 or i7 processor supports Intel ® HD Graphics 3000.
Intel ® Celeron ® Processor B810 supports Intel ® HD Graphics.
eDP (Embedded DisplayPort) directly from processor.
Analogue VGA and digital display ports (DVI, 2x DP, LVDS) via the Mobile Intel ®
QM67 Chipset.
• VGA (analogue panel) via DVI-I (sharing DVI-I connector with DVI-D)
• DVI-D (sharing DVI-I connector with analogue VGA)
• DP (DisplayPorts) dual, comply with DisplayPort 1.1a specification.
• LVDS panel support up to 24 bit, 2 pixels/clock and 1920x1200.
• HDMI panel support via DP to HDMI Adapter Converter.
• Second VGA panel support via DP to VGA Adapter Converter
• Second DVI panel support via DP to DVI Adapter Converter
• Dual independent pipes for Mirror and Dual independent display support
(exception is combination LVDS and eDP)
I/O Control
Via ITE IT8516E Embedded Controller and Winbond W83627DHG I/O Controller
(both via LPC Bus interface)
Peripheral
interfaces
• Six USB 2.0 ports on I/O area
• Eight USB 2.0 ports on internal pinrows
• Two IEEE 1394a-2000 (up to 400M bits/s) on internal pinrows
• Four Serial ports (RS232) on internal pinrows
• LPT via single in line connector (only KTQM67/Flex and KTQM67/ATXP)
• Two Serial ATA-600 IDE interfaces
• Four Serial ATA-300 IDE interfaces
• RAID 0/1/5/10 support
• mSATA via mPCIe_0 connector
• PS/2 keyboard and mouse ports via pinrow
LAN
Support
• 1x 10/100/1000Mbits/s LAN (ETHER1) using Intel® Lewisville 82579LM Gigabit
PHY connected to QM67 supporting AMT 7.0
• 2x 10/100/1000Mbits/s LAN (ETHER2/ETHER3)using Intel® Hartwell 82574L PCI
Express controllers
• PXE Netboot supported.
• Wake On LAN (WOL) supported
Expansion
Capabilities
• PCI Bus routed to PCI slot(s) (PCI Local Bus Specification Revision 3.0, 33MH z)
o KTQM67/mITX None.
o KTQM67/Flex: 3
o KTQM67/ATXP: 6
• PCI-Express slot(s) (PCIe 2.0), for all KTQM67 family members:
o 1 slot PCIe x16
o 1 slot PCIe x1
o 2 slot miniPCI-Express
• SMBus, compatible with A CC E S BUS and I2C BU S, (via Feature connector)
• SPI bus routed to SPI connector
• DDC Bus routed to DVI-I connector
• 18 x GPIOs (General Purpose I/Os), (via Feature connector)
• DAC, ADC, PWM and TIMER (Multiplexed), (via Feature connector)
• WAKE UP / Interrupt Inputs (Multiplexed), (via Feature connector)
• 3 Wire Bus for GPIO Expansion (up to 152 GPIOs), (via Feature connector)
• 8 bit Timer output, (via Feature connector)
System Specification
Page 12
KTQM67 Users Guide
KTD-N0819-E Page 12
Hardware
Monitor
Subsystem
• Smart Fan control system, support Thermal® and Speed® cruise for three on-
board Fan control connectors: FAN_CPU, FAN_SYS and FEATURE (AUXFAN in
BIOS)
• Three thermal inputs: CPU die temperature, System temperature and External
temperature input routed to FEATURE connector. (Precision +/- 3ºC)
• Voltage monitoring
• Intrusion (Case Open) detect input, (via Feature connector)
• Sleep S5# Indication, (via Feature connector)
• System Powergood Signal, (via Feature connector)
Power
Supply Unit
ATX/BTX (w. ATX+12V) PSU for full PCI/PCIe load.
Alternatively (mITX version only): +12V single supply via ATX+12V (4-pole) connector,
but with limitation to power load (especially +5V for USB).
Battery
Exchangeable 3.0V Lithium battery for on-board Real Time Clock and CMOS RAM.
Manufacturer Panasonic / Part-number CR-2032L/BN, CR2032N/BN or CR-2032L/BE.
Approximate 6.2 years retention.
Current draw is 4.1µA when PSU is disconnected and 0 µA in S0 – S5.
CAUTION: Danger of explosion if the battery is incorrectly replaced. Replace
only with the same or equivalent type recommended by the manufacturer.
Dispose of used batteries according to the manufacturer’s instructions.
BIOS
• Kontron Technology / AMI BIOS (EFI core version)
• Support for ACPI 3.0 ( Advanced Configuration and Power Interface), Plug & Play
o Suspend (S1 mode)
o Suspend To Ram (S3 mode)
o Suspend To Disk (S4 mode)
• “Always On” BIOS power setting
•
RAID Support (RAID modes 0,1, 5 and 10)
Operating
Systems
Support
• WinXP
• Windows 7
• Linux
• VxWorks
System Specification
Page 13
KTQM67 Users Guide
KTD-N0819-E Page 13
Environmental
Conditions
Operating:
0°C – 60°C operating temperature (forced cooling). It is the customer’s
responsibility to provide sufficient airflow around each of the components to keep
them within allowed temperature range.
10% - 90% relative humidity (non-condensing)
Storage:
-20°C – 70°C; lower limit of storage temperature is defined by specification
restriction of on-board CR2032 battery. Board with battery has been verified for
storage temperature down to -40°C by Kontron.
5% - 95% relative humidit y (non-condensing)
Electro Static Discharge (ESD) / Radiated Emissions (EMI):
All Peripheral interfaces intended for connection to external equipment are ESD/
EMI protected.
EN 61000-4-2:2000 ESD Immunity
EN55022:1998 class B Generic Emission Standard.
Safety:
IEC 60950-1: 2005, 2nd Edition
UL 60950-1
CSA C22.2 No. 60950-1
Product Category: Information Technology Equipment Including Electrical
Business Equipment
Product Category CCN: NWGQ2, NWGQ8
File number: E194252
Theoretical MTBF:
268.956 / 131.729 hours @ 40ºC / 60ºC for the KTQM67/mITX
TBD / TBD hours @ 40ºC / 60ºC for the KTQM67/Flex
TBD / TBD hours @ 40ºC / 60ºC for the KTQM67/ATXP
Restriction of Hazardous Substances (RoHS):
All boards in the KTQM67 family are RoHS compliant.
Capacitor utilization:
No Tantalum capacitors on board
Only Japanese brand Solid capacitors rated for 100 ºC used on board
System Specification
Page 14
KTQM67 Users Guide
KTD-N0819-E Page 14
2.2 System overview
The block diagram below shows the architecture and main components of the KTQM67. The key
component on the board is the Intel
®
QM67 (Cougar Point) Mob ile Ex pres s Chipset.
Some components (PCI slots) are optional depending on board type.
More detailed block diagram on next page.
System Specification
Page 15
KTQM67 Users Guide
KTD-N0819-E Page 15
2.3
System Specification
Page 16
KTQM67 Users Guide
KTD-N0819-E Page 16
Processor Support Table
KTQM67 is designed to support the following PGA 988 processors (up to 60W power consumption):
2
nd
generation Intel® Core™ i7 processor Extreme Edition
2
nd
generation Intel® Core™ i7 processor
2
nd
generation Intel® Core™ i5 processor
2nd generation Intel® Core™ i3 processor
Intel® Celeron® processor
In the following list you will find all CPU’s supported by the chipset in according to Intel but also other
CPU’s if successfully tested.
Embedded CPU’s are indic ated by green text, successfully tested CPU’s are indi cated by highlighted
text, successfully tested embedded CPU’s are indicated by green and highlighted text and failed
CPU’s are indicated by red text.
Some processors in the l ist are distributed from Kontron, those CPU’s are marked by an * (ast erisk).
However please notice that this marking is only guide line and maybe not fully updated.
Processor
Brand
Clock
Speed
Turbo
Speed
Cores
Threads
Bus Speed
Cache
CPU
Number
sSpec number
Stepping
Thermal
Design
Power
Qty of
SODIMM slots
[GHz]
[GHz]
[MHz]
[MB]
[Watt]
Core™ i7
2.7
3.4
2 4 1066/1333
4
2620M
SR03F
J1
35
2
2.5
3.5
4 8 1066/1333/1600
8
2920XM
SR02E
D2
55
4 2.3
3.4
4 8 1066/1333/1600
8
2820QM
SR012
D2
45
4
2.2
3.4
4 8 1066/1333/1600
6
2720QM
SR014
D2
45 4
2.1
3.0
4 8 1066/1333/1600
6
2710QE
SR02T
D2
45 4
2.0
2.9
4 8 1066/1333
6
2630QM
SR02Y
D2
45
2
Core™ i5
2.6
3.3
2 4 1066/1333
3
2540M
SR044
J1
35 2
2.5
3.2
2 4 1066/1333
3
2520M
SR048
J1
35 2
2.5
3.1
2 4 1066/1333
3
2510E
SR02U
D2
35
2 2.3
2.9
2 4 1066/1333
3
2410M
SR04B
J1
35
2
Core™ i3
2.2 - 2 4 1066/1333
3
2330E
SR02V
D2
35
2 2.1 - 2 4 1066/1333
3
2310M
SR04R
J1
35
2
Celeron®
1.60 - 2 2 1066/1333
2
B810
SR088
Q0
35
2
Note: Sufficient cooling must be applied to the CPU in order to
remove the effect as listed in abov e table (Thermal Guideline) . The
sufficient cooling is also depending on the maximum (worst-case)
ambient operating temperature and the actual load of processor.
The Kontron PN 1044-9447 is “Active Coo ler for KTQM67” c apable
of being used for process ors having Thermal Guidel ine up to 45W,
fully loaded and at ambient temperature up to 60ºC.
All the processors in the list above, inclusive the Celeron process or, ar e s upport in g the En hanc e d Inte l®
SpeedStep® which is improved SpeedStep technology for faster transition between voltage (power
saving states) and frequency states with the result of improved power/performance balance.
System Specification
Page 17
KTQM67 Users Guide
KTD-N0819-E Page 17
Intel® Turbo Boost T echnology 2.0 is supported b y i5 and i7, as indicated in above list of proces sors,
and is enabling overclocking of all cores, when operated within the limits of thermal design power,
temperature and current.
Intel® vPro Technology is supported by i5 and i7 (not by Core i3 and Celeron).
Only some types of process ors are supporting al l four SODIMM sock ets available on the KTQM67/Flex
and - /ATX P. Pt. thes e proc essor s are all m em bers of the Cor e i7 f am ily, but not all Cor e i7. I n the tab le
above the “Qty. of SODIMM slots” indicates if actual processor supports 2 or 4 SODIMM slots.
Slot 1
KTQM67/mITX has two DDR3 SODIMM
slots and any of the two slots can be used.
Intel ® AMT works as long as RAM is
installed in any of the slots.
KTQM67/Flex and KTQM67/AT XP versi ons
have four DDR3 SODIMM slots. Only some
processors support all four slots, if not one of
these CPU’s then only Slot 0 and Slot 2 can
be used.
Intel ® AMT works as long as RAM is installed
in either Slot 0 and/or Slot 2
Slot 3
Slot 2
Slot 1
Slot 0
System Specification
Page 18
KTQM67 Users Guide
KTD-N0819-E Page 18
2.4 System Memory support
The KTQM67/mITX has two DDR3 SODIMM sockets and the KTQM67/FLEX and /ATXP have four
DDR3 SODIMM sockets. The sockets support the following memory features:
• 1.5V (only) 204-pin DDR3 SODIMM with gold-plated contacts
• Single/dual rank unbuffered DDR3 1066/1333/1600MT/s (PC3-8500/PC3-10600/PC3-12800)
(DDR3 1600 only supported by some i7 processors)
• From 256MB and up to 4x 8GB. (up to 2x4GB tested)
Notes:
Only some of the processors support 4 SODIMM slots
(see processor Support Table for more information).
Less than 4GB displayed in System Properties using 32bit OS
(Shared Video Memory/PCI resources is subtracted)
• SPD timings supported
• ECC not supported (PGA processors do not support ECC)
The installed DDR3 SODIMM should support the Serial Presence Detect (SPD) data structure. This
allows the BIOS to read and configure the memory controller for optimal performance. If non-SPD
memory is used, the BIOS w ill attem pt to c onfig ure t he m em ory settings, b ut perform ance and r eliab ility
may be impacted.
Memory Operating Frequencies
Regardless of the SODIMM type used, the memor y frequenc y will either be equal to or less than the
processor system bus fr equency. For ex ample, if DDR3 1600 m emory is used with a 1333 MH z s ys te m
bus frequency processor, the m emory clock will opera te at 666 MHz. The table below lists the res ulting
operating memory frequencies based on the combination of SODIMMs and processors.
DIMM Type
Module
name
Memory
Data
transfers
[Mill/s]
Processor
system bus
frequency
[MHz]
Resulting
memory clock
frequency
[MHz]
Peak transfer
rate
[MB/s]
DDR3 1066
PC3-8500
1066
1066 or more
533
8533
DDR3 1333
PC3-10600
1333
1333 or more
666
10666
DDR3 1600
PC3-12800
1600
1333 max
666
10666
DDR3 1600
PC3-12800
1600
1600
800
12800
Notes: Kontron offers the following memory modules:
• P/N 1044-7740, DDR3-SODIMM, 1GB, 204p, 1333MHZ, PC3-10600
• P/N 1044-7743, DDR3-SODIMM, 2GB, 204p, 1066MHZ, PC3-8500
• P/N TBD, DDR3-SODIMM, 2GB, 204p, 1333MHZ, PC3-10600
• P/N 1044-7744, DDR3-SODIMM, 4GB, 204p, 1066MHZ, PC3-8500
• P/N TBD, DDR3-SODIMM, 4GB, 204p, 1333MHZ, PC3-10600
• P/N 1044-7745, DDR3-SODIMM, 8GB, 204p, 1333MHZ, PC3-10600
• P/N TBD, DDR3-SODIMM, 4GB, 204P, 1600MHZ, PC3-12800
System Specification
Page 19
KTQM67 Users Guide
KTD-N0819-E Page 19
2.5 KTQM67 Graphics Subsystem
The KTQM67 equipped with Intel ® i3, i5 or i7 processor, supports Intel ® HD Graphics 3000.
The KTQM67 equipped Intel ® Celeron ® Processor B810, supports Intel ® HD Graphics.
All KTQM67 versions s upport eD P (Embedded DisplayPort) direct ly from pr ocessor, and analo gue VG A
and digital displa y ports (DVI, 2x DP, LVDS) via t he Mobile Intel ® QM67 Chi pset. The Analogue VGA
and DVI-D are sharing the DVI-I connector.
The DP interf ace s upports t he D ispla yPort 1.1 a sp ecific ation. T he PCH suppor ts High-bandwidth Digita l
Content Protection for h igh definition content playback over digital inter faces. The PCH also in tegrates
audio codecs for audio support over DP interfaces.
Up to two displays (any two dis play outpu ts except combination LVDS an d eDP) can be activated at the
same time and be used to im plement dual independent disp lay support or m irror display supp ort. PCIe
and PCI (Flex/ATXP only) graphic s cards can be used to replace on-board graphics or in combination
with on-board graphics.
2.5.1 Intel® HD Graphics 3000
Features of the Intel HD Graphics 3000 build into the i3, i5 and i7 processors, includes:
• High quality graphics engine supporting
o DirectX10.1 and OpenGL 3.0 compliant
o Shader Model 4.1 support
o Intel ® Clear Video HD Technology
o Intel ® Quick Sync Video Technology
o Intel ® Flexible Display Interface (Intel ® FDI)
o Core frequency of 350 - 1300 (Turbo) MHz
o Memory Bandwidth up to 21.3 GB/s
o 12 3D Execution Units
o 1.62 GP/s and 2.7 GP/S pixel rate (eDP and DP outputs)
o Hardware Acceleration full MPEG2, full VC-1 and full AVC
o Dynamic Video Memory Technology (DVMT) support up to 1720 MB
• eDP (Embedded DisplayPort) (Not in combination with LVDS)
• LVDS panel Support, 18/24 bit colours in up to WUXGA (1920x1200 pixels) @60 Hz and
SPWG (VESA) colour coding. OpenLDI (JEIDA) colour coding is 18 bit with or without Dithering.
(Not in combination with eDP).
• DVI-I (Digital Visual Interface)
o Either DVI-A or DVI-D can be used via DVI-I connector
o DVI-A Analogue Display (CRT)
o 300 MHz Integrated 24-bit RAMD AC
o Up to QXGA (2048x1536 pixels) @ 75 Hz refresh
o DVI-D Digital Display up to WUXGA (1920x1200 pixels) @60 Hz
• DP0 and DP1
o 24/30 bit colours in WQXGA (2560x1600 pixels) and HDCP.
Use of DP Adapter Converters can implement HDMI
support or second VGA or DVI panel support.
The HDMI interface supports the HDMI 1.4a specification
and includes audio codecs. However limitations to the
resolution apply:
2048x1536 VGA
1920x1200 HDMI and DVI
DP to VGA DP to HDMI DP to DVI-D
PN 1045-5779 PN 1045-5781 PN 1045-5780
System Specification
Page 20
KTQM67 Users Guide
KTD-N0819-E Page 20
2.6 Power Consumption
In order to ensure safe operation of the board, the ATX12V power supply must monitor the supply
voltage and shut do wn if the supplies are out of ran ge – refer to the hardware manual for the actual
power supply specification. The KTQM67 board is powered through the ATX/BTX connector and
ATX+12V connector. Both connectors must be used in according to the ATX12V PSU standard.
However the KTQM67/mITX also supports single +12V via ATX+12V-4pin Power Connector, but power
limitations apply to +5V, where 14x USB, LVDS panel or eDP panel, COM ports, LPT port and
Frontpanel connector shares 9.5A. ATX+12V-4pin power limitation is 1 45W , however m or e +12V pow er
can be added via +12V and GND terminals in the 24-pin power connector.
The requirements to the supply voltages are as follows:
Supply Min Max Note
VCC3.3 3.168V 3.432V
Should be ±4% for compliance with the ATX specification
Vcc 4.75V 5.25V
Should be ±5% for compliance with the ATX specification.
Should be minimum 5.00V measured at USB connectors
in order to meet the requirements of USB standard.
+12V 11.4V 12.6V
Should be ±5% for compliance with the ATX specification
–12V –13.2V –10.8V
Should be ±10% for compliance with the ATX specification
-5V -5,50V -4.5V Not required for the KTQM67 boards
5VSB 4.75V 5.25V
Should be ±5% for compliance with the ATX specification
Total System power example
I7-2710QE @ 2.10GHz, 1x 4GB Ram, 1x 500gb HDD, 1x DVD-ROM, PSU
Operation
Power Supplied via
ATX + 12V
12V Only
Windows 7 32bit Idle
33W
36W
Windows 7 32bit 3Dmark 2003
70W-88W
72W-96W
Windows 7 32bit Intel Thermal Load
111W
111W
Note that the above listed power consumptions are inclusive 15 - 25W (depending on actual load of
PSU) for PSU, HDD and DVD.
More detailed Static Power Consumption
On the following pages the power consumption of different KTQM67 boards in different configurations
are listed.
For each configuration the power consumptions result are listed in 5 tables:
1- DOS, idle, mean
2- Windows7, Running 3DMARK 2005 & BiT 6, mean
3- S0, mean
4- S3, mean
5- S5, mean
Note: some S5 measur em ents have be en c ar rie d ou t i n t wo sub modes M3 and Moff. Only S5/M3 mode
maintains power to the circuits used for AMT and waking up the s ystem via LAN, Keyboard and USB,
while both S5/M3 and S5/Moff maintain power to RTC, Power Button In circuit and CMO S data .
System Specification
Page 21
KTQM67 Users Guide
KTD-N0819-E Page 21
The principal test system and test equipment used
1. Tektronix TDS5104B
2. Tektronix TCPA300
3. Tektronix TCP312
4. Fluke 289
5. Fluke 179
6. ATX rail switch
Note: Power consumption of PSU (power loss), Monitor and HDD are not included.
The following six configurations (a – f) have been tested
a) Low Power Setup KTQM67/mIT X ATX+12V PSU
b) Low Power Setup KTQM67/mITX +12V only PSU
Standard system configuration equipped with PCIex1 card, Internal graphics, 2x SATA disks, Intel i5
CPU, 1x SODIMM (1GB Modules ), Monitor, Keyboard & Mouse. 1x 1-4GB US B Stick, 12V active
cooler (KT), PSU (Corsair 430W)
c) High Power Setup KTQM67/mITX ATX+12V PSU
d) High Power Setup KTQM67/mITX +12V only PSU
Standard system conf iguration equipped with PCIex1, PCIex16, m iniPCIe WLAN, 4x SATA disks,
Intel i7 CPU, 2x SO DIMM ( 1GB Modules ), Monit or, Ke yboard & Mouse, 4x 1-4GB USB Stick s, 12V
active cooler (KT), PSU (Corsair 430W).
e) Low Power Setup KTQM67/Flex
Standard system c onfiguration equipped with PCIex1 card (network PLNA001), Inter nal graphics,
2x SATA disks , Intel i5 CPU, 1x SODIM M (1GB Modules) , Monitor, Keyboar d & Mouse. 1x 1-4GB
USB Stick, 12V active cooler (Intel Box), PSU (Fortron 400W)
f) High Power Setup KTQM67/Flex
Standard system c onfiguration eq uipped with P CIex1 c ard (network PLNA001), PCIex16 (Graphics
PLGA004), 4x S ATA disk s, Intel i7 CPU, 4x SODIMM (1GB Mod ules), Monitor , Keyboard & M ouse.
4x 1-4GB USB Stick, 12V active cooler (Intel Box), PSU (FPGA PS5)
ATX supplies
KTQM67
PSU
Gnd
Current
Probe
Tektronix TDS5104B
System Specification
Page 22
KTQM67 Users Guide
KTD-N0819-E Page 22
a) Low Power Setup KTQM67/mITX ATX+12V PSU
DOS Idle, Mean, No external load
Supply
Current draw
[A]
Power consumption
[W]
+12V
0,140
1,680
+12V P4
1,222
14,664
+5V
0,411
2,055
+3V3
0,557
1,838
-12V
0,035
0,42
5VSB
0,007
0,035
Total 20,7
Windows 7, mean
3DMARK2005 ( first scene ) & BiT 6
Supply
Current draw
[A]
Power consumption
[W]
+12V
0,165
1,980
+12V P4
3,250
39,000
+5V
0,450
2,250
+3V3
0,577
1,904
-12V
0,046
0,552
5VSB
0,007
0,035
Total 45,7
S0 Mode, Mean, No external load
Supply
Current draw
[A]
Power consumption
[W]
+12V
0,107
1,284
+12V P4
0,510
6,120
+5V
0,336
1,680
+3V3
0,576
1,901
-12V
0,043
0,516
5VSB
0,007
0,035
Total 11,5
S3 Mode, Mean, No external load
Supply
Current draw
[A]
Power consumption
[W]
5VSB
0,218
1,090
Total 1,09
S5 Mode, Mean, No external load
Supply
Current draw
[A]
Power consumption
[W]
5VSB
0,213
1,065
Total 1,07
System Specification
Page 23
KTQM67 Users Guide
KTD-N0819-E Page 23
b) Low Power Setup KTQM67/mITX +12V only PSU
DOS Idle, Mean, No external load
Supply
Current draw
[A]
Power consumption
[W]
+12V P4
1,721
20,652
Total 20,7
Windows 7, mean
3DMARK2005 ( first scene ) & BiT 6
Supply
Current draw
[A]
Power consumption
[W]
+12V P4
3,940
47,28
Total 47,3
S0 Mode, Mean, No external load
Supply
Current draw
[A]
Power consumption
[W]
+12V P4
0,992
11,904
Total 11,9
S3 Mode, Mean, No external load
Supply
Current draw
[A]
Power consumption
[W]
+12V P4
0,099
1,188
Total 1,19
S5 Mode, Mean, No external load
Supply
Current draw
[A]
Power consumption
[W]
+12V P4
0,098
1,176
Total 1,18
System Specification
Page 24
KTQM67 Users Guide
KTD-N0819-E Page 24
c) High Power Setup KTQM67/mITX ATX+12V PSU
DOS Idle, Mean, No external load
Supply
Current draw
[A]
Power consumption
[W]
+12V
0,932
11,184
+12V P4
1,102
13,224
+5V
0,452
2,260
+3V3
0,553
1,825
-12V
0,036
0,432
5VSB
0,007
0,035
Total 29,0
Windows 7, mean
3DMARK2005 ( first scene ) & BiT 6
Supply
Current draw
[A]
Power consumption
[W]
+12V
1,355
16,260
+12V P4
4,663
55,956
+5V
0,474
2,370
+3V3
0,968
3,194
-12V
0,049
0,588
5VSB
0,007
0,035
Total 78,4
S0 Mode, Mean, No external load
Supply
Current draw
[A]
Power consumption
[W]
+12V
0,569
6,828
+12V P4
0,485
5,820
+5V
0,420
2,100
+3V3
0,964
3,812
-12V
0,049
0,588
5VSB
0,007
0,035
Total 18,6
S3 Mode, Mean, No external load
Supply
Current draw
[A]
Power consumption
[W]
5VSB
0,226
1,130
Total 1,13
S5 Mode, Mean, No external load
Supply
Current draw
[A]
Power consumption
[W]
5VSB
0,219
1,095
Total 1,10
System Specification
Page 25
KTQM67 Users Guide
KTD-N0819-E Page 25
d) High Power Setup KTQM67/mITX +12V only PSU
DOS Idle, Mean, No external load
Supply
Current draw
[A]
Power consumption
[W]
+12V P4
2,499
29,988
Total 30,0
Windows 7, mean
3DMARK2005 ( first scene ) & BiT 6
Supply
Current draw
[A]
Power consumption
[W]
+12V P4
6,712
80,544
Total 80,5
S0 Mode, Mean, No external load
Supply
Current draw
[A]
Power consumption
[W]
+12V P4
1,615
19,38
Total 19,4
S3 Mode, Mean, No external load
Supply
Current draw
[A]
Power consumption
[W]
+12V P4
0,104
1,248
Total 1,24
S5 Mode, Mean, No external load
Supply
Current draw
[A]
Power consumption
[W]
+12V P4
0,101
1,212
Total 1,21
System Specification
Page 26
KTQM67 Users Guide
KTD-N0819-E Page 26
e) Low Power Setup KTQM67/Flex
DOS Idle, Mean, No external load
Supply
Current draw
[A]
Power consumption
[W]
+12V
0.194
2.328
+12V P4
1.339
16.068
+5V
0.353
1.765
+3V3
0.662
2.185
-12V
0.020
0.240
5VSB
0.001
0.005
Total 22.6
Windows 7, mean
3DMARK2005 ( first scene ) & BiT 6
Supply
Current draw
[A]
Power consumption
[W]
+12V
0.162
1.944
+12V P4
4.173
50.076
+5V
0.460
2.300
+3V3
0.833
2.749
-12V
0.034
0.408
5VSB
0.002
0.010
Total 57.5
S0 Mode, Mean, No external load
Supply
Current draw
[A]
Power consumption
[W]
+12V
0.162
1.944
+12V P4
2.060
24.720
+5V
0.390
1.950
+3V3
0.832
2.746
-12V
0.035
0.420
5VSB
0.002
0.010
Total 31.8
S3 Mode, Mean, No external load
Supply
Current draw
[A]
Power consumption
[W]
5VSB
0.174
0.870
Total 0.87
S5/M3 Mode (wake+ AMT), Mean, No external load
Supply
Current draw
[A]
Power consumption
[W]
5VSB
0.270
1.350
Total 1.35
S5/Moff Mode (no wake no AMT), Mean, No external load
Supply
Current draw
[A]
Power consumption
[W]
5VSB
0.175
0.875
Total 0.88
System Specification
Page 27
KTQM67 Users Guide
KTD-N0819-E Page 27
f) High Power Setup KTQM67/Flex
DOS Idle, Mean, No external load
Supply
Current draw
[A]
Power consumption
[W]
+12V
1.027
12.324
+12V P4
1.235
14.820
+5V
0.419
2.095
+3V3
0.666
2.198
-12V
0.028
0.336
5VSB
0.002
0.010
Total 31.8
Windows 7, mean
3DMARK2005 ( first scene ) & BiT 6
Supply
Current draw
[A]
Power consumption
[W]
+12V
1.260
15.120
+12V P4
5.445
65.340
+5V
0.454
2.270
+3V3
0.835
2.756
-12V
0.040
0.480
5VSB
0.002
0.010
Total 86.0
S0 Mode, Mean, No external load
Supply
Current draw
[A]
Power consumption
[W]
+12V
0.626
7.512
+12V P4
1.969
23.628
+5V
0.401
2.005
+3V3
0.834
2.752
-12V
0.041
0.492
5VSB
0.002
0.010
Total 36.4
S3 Mode, Mean, No external load
Supply
Current draw
[A]
Power consumption
[W]
5VSB
0.026
0.130
Total 0.13
S5/M3 Mode (wake+ AMT), Mean, No external load
Supply
Current draw
[A]
Power consumption
[W]
5VSB
0.266
1.330
Total 1.33
S5/Moff Mode (no wake no AMT), Mean, No external load
Supply
Current draw
[A]
Power consumption
[W]
5VSB
0.184
0.920
Total 0.92
System Specification
Page 28
KTQM67 Users Guide
KTD-N0819-E Page 28
3 Connector Locations
3.1 KTQM67/mITX – frontside
DDR3 Slot 1
FEATURE
DVI-I
KBDMSE
PCIe x16
ATX/ BTXPWR
Audio
DDR3 Slot 0
USB13
USB12
FRONTPNL
LVDS
CDROM
AUDIO_HEAD
COM3
COM4
ATX+12V
FAN_SYS
FAN_CPU
IEEE1394_1
ETH1
USB5
USB4
COM2
EDP
ETH2
ETH3
ClrCMOS
mPCIe (*)
Sata1 Sata4 Sata2
Sata0 Sata5 Sata3
(see note below)
USB9
USB8
USB11
USB10
COM1
IEEE1394_0
PCIe x1
SPI recover
SPI
USB1
USB0
DP0
USB3
USB2
DP1
Note: Sata0/Sata1support up to 6GB/s and Sata2/Sata3/Sata4/Sata5 support up to 3GB/S.
System Temperature
Sensor( Q10)
Connector Location
Page 29
KTQM67 Users Guide
KTD-N0819-E Page 29
3.2 KTQM67/mITX – IO Bracket area
3.3 KTQM67/mITX - backside
LPT (*)
mPCIe1
XDP-CPU (*)
DVI-I
Audio
ETH1
USB5
USB4
ETH2
ETH3
USB1
USB0
DP0
USB3
USB2
DP1
mPCIe0
Connector Location
XDP-PCH (*)
below mPCIe1
(*) The XDP and LPT connectors are not supported and not mounted in vol um e product i on.
Page 30
KTQM67 Users Guide
KTD-N0819-E Page 30
3.4 KTQM67/Flex
Note: Sata0/Sata1support up to 6GB/s and Sata2/Sata3/Sata4/Sata5 support up to 3GB/S.
Connector Location
FEATURE
DVI-I
KBDMSE
PCIe x16
ATX/BTXPWR
Audio
USB13
USB12
FRONTPNL
LVDS
CDROM
AUDIO_HEAD
ATX+12V
FAN_SYS
FAN_CPU
IEEE1394_0
ETH1
USB5
USB4
EDP (*)
ETH2
ETH3
ClrCMOS
Sata1 Sata4 Sata2
Sata0 Sata5 Sata3
(see note below)
LPT (*)
USB9
USB8
USB11
USB10
COM4
COM3
COM2
COM1
IEEE1394_1
PCIe x1
SPI recover
SPI
USB1
USB0
DP0
USB3
USB2
DP1
mPCIe1
mPCIe0
PCI0
PCI1
PCI2
(*) Connectors located on the backside. The XDP connectors are not supported and not mounted in volume production.
XDP-CPU (*)
XDP-PCH (*)
(For picture of IO Bracket area, see previous page)
System Temperature
Sensor( R936)
DDR3:
Slot 3
Slot 2
Slot 1
Slot 0
Page 31
KTQM67 Users Guide
KTD-N0819-E Page 31
3.5 KTQM67/Flex - backside
Connector Location
LPT
EDP
XDP-CPU (*)
(*) The XDP connectors are not supported and not mounted in volume production.
XDP-PCH (*)
Page 32
KTQM67 Users Guide
KTD-N0819-E Page 32
3.6 KTQM67/ATXP
Connector Location
FEATURE
DVI-I
KBDMSE
PCIe x16
ATX/BTXPWR
Audio
DDR3:
Slot 3
Slot 2
Slot 1
Slot 0
USB13
USB12
FRONTPNL
LVDS
CDROM
AUDIO_HEAD
ATX+12V
FAN_SYS
FAN_CPU
IEEE1394_0
ETH1
USB5
USB4
ETH2
ETH3
ClrCMOS
Sata1 Sata4 Sata2
Sata0 Sata5 Sata3
(see note below)
USB9
USB8
USB11
USB10
COM4
COM3
COM2
COM1
IEEE1394_1
PCIe x1
SPI recover
SPI
USB1
USB0
DP0
USB3
USB2
DP1
Note: Sata0/Sata1support up to 6GB/s and Sata2/Sata3/Sata4/Sata5 support up to 3GB/S.
mPCIe1
mPCIe0
PCI0
PCI1
PCI2
(For picture of IO Bracket area, see” KTQM67/mITX – IO Bracket area”)
System Temperature
Sensor( R936)
PCI3
PCI4
PCI5
Page 33
KTQM67 Users Guide
KTD-N0819-E Page 33
3.7 KTQM67/ATXP - backside
EDP
(*) The XDP connectors are not supported and not mounted in volume production.
XDP-CPU (*)
XDP-PCH (*)
Connector Location
LPT
Page 34
KTQM67 Users Guide
KTD-N0819-E Page 34
4 Connector Definitions
The following sections provide pin definitions and detailed description of all on-board connectors.
The connector definitions follow the following notation:
Column
name
Description
Pin Shows the pin-numbers in the connector. The graphical layout of the connector definition
tables is made similar to the physical connectors.
Signal The mnemonic name of the signal at the current pin. The notation “XX#” states that the
signal “XX” is active low.
Type AI: Analogue Input.
AO: Analogue Output.
I: Input, TTL compatible if nothing else stated.
IO: Input / Output. TTL compatible if nothing else stated.
IOT: Bi-directional tristate IO pin.
IS: Schmitt-trigger input, TTL compatible.
IOC: Input / open-collector Output, TTL compatible.
IOD: Input / Output, CMOS level Schmitt-triggered. (Open drain output)
NC: Pin not connected.
O: Output, TTL compatible.
OC: Output, open-collector or open-drain, TTL compatible.
OT: Output with tri-state capability, TTL compatible.
LVDS: Low Voltage Diff er ential Signa l.
PWR: Power supply or ground reference pins.
Ioh: Typical current in mA flowing out of an output pin through a grounded load, while the
output voltage is > 2.4 V DC (if nothing else stated).
Iol: Typical current in mA flowing into an output pin from a VCC connected load, while the
output voltage is < 0.4 V DC (if nothing else stated).
Pull U/D On-board pull-up or pull-down resistors on input pins or open-collector output pins.
Note Special remarks concerning the signal.
The abbreviation TBD is used for specifications which are not available yet or which are not sufficiently
specified by the component vendors.
Connector Definitions
Page 35
KTQM67 Users Guide
KTD-N0819-E Page 35
5 IO-Area Connectors
5.1 Display connectors (IO Area)
The KTQM67 fam ily provides one on-board DVI-I port (both digit al and analogue), two on-board DP’s
(DisplayPort), one on-board eDP (Embedded DisplayPort) and one on-board LVDS panel interface. Two
graphic pipes are sup ported; meaning that up to t wo independent displa ys can be implemented using
any two of the above mentioned graphic ports.
.
5.1.1 DVI Connector (DVI-I) (J41)
The DVI-I connector support DVI Digital output and DVI Analogue output.
Female socket, front view
Signal Description - DVI Connector:
Pin
Signal Description Type Pull U/D
1
TMDS Data 2-
Digital Red – (Link 1)
LVDS OUT
2 TMDS Data 2+
Digital Red + (Link 1)
LVDS OUT
3 TMDS Data 2/4 Shield
PWR
4
NC
NC
5
NC
NC
6 DDC Clock
DDC Clock
IO
2K2 7 DDC Data
DDC Data
IO
2K2 8 NC
NC
9 TMDS Data 1-
Digital Green – (Link 1)
LVDS OUT
10
TMDS Data 1+
Digital Green + (Link 1)
LVDS OUT
11
TMDS Data 1/3 Shield
PWR
12
NC
NC
13
NC
NC
14
+5V
Power for monitor when in standby
PWR
15
GND
PWR
16
Hot Plug Detect
Hot Plug Detect
I
17
TMDS Data 0-
Digital Blue – (Link 1) / Digital sync
LVDS OUT
18
TMDS Data 0+
Digital Blue + (Link 1) / Digital sync
LVDS OUT
19
TMDS Data 0/5 Shield
PWR
20
NC
NC
21
NC
NC
22
TMDS Clock Shield
PWR
23
TMDS Clock+
Digital clock + (Link 1)
LVDS OUT
24
TMDS Clock-
Digital clock - (Link 1)
LVDS OUT
C1
ANALOG RED
Analog output carrying the red color signal
O
/75R
C2
ANALOG GREEN
Analog output carrying the green color signal
O
/75R
C3
ANALOG BLUE
Analog output carrying the blue color signal
O
/75R
C4
ANALOG HSYNC
CRT horizontal synchronization output.
O
C5
ANALOG GND
Ground reference for RED, GREEN, and BLUE
PWR
C6
ANALOG GND
Ground reference for RED, GREEN, and BLUE
PWR
Note: The +5V supply is fused by a 1.1A resettable fuse
IO-Area Connectors
Page 36
KTQM67 Users Guide
KTD-N0819-E Page 36
5.1.2 DP Connectors (DP0/DP1) (J40/J39)
The DP (DisplayPort) connectors are based on standard DP type Foxconn 3VD51203-H7JJ-7H or
similar.
19 17 15 13 11 9 7 5 3 1
20 18 16 14 12 10 8 6 4 2
Pin
Signal
Description
Type
Note
1
Lane 0 (p)
LVDS
2 GND
PWR
3 Lane 0 (n)
LVDS
4 Lane 1 (p)
LVDS
5 GND
PWR
6 Lane 1 (n)
LVDS
7 Lane 2 (p)
LVDS
8 GND
PWR
9 Lane 2 (n)
LVDS
10
Lane 3 (p)
LVDS
11
GND
PWR
12
Lane 3 (n)
LVDS
13 Config1
Aux or DDC
selection
I
Internally pull down (1Mohm ).
Aux channel on pin 15/17 selected as default (when NC)
DDC channel on pin 15/17, If HDMI adapter used (3.3V)
14
Config2
(Not used)
O
Internally connected to GND
15 Aux Ch (p)
Aux Channel (+)
or DDC Clk
AUX (+) channel used by DP
DDC Clk used by HDMI
16
GND
PWR
17 Aux Ch (n)
Aux Channel (-)
or DDC Data
AUX (-) channel used by DP
DDC Data used by HDMI
18
Hot Plug
I Internally pull down (100Kohm).
19
Return
PWR
Same as GND
20 3.3V PWR
Fused by 1.5A resetable PTC fuse, common for DP0 and
DP1
IO-Area Connectors
Page 37
KTQM67 Users Guide
KTD-N0819-E Page 37
5.2 Ethernet Connectors
The KTQM67 boards supports three channels of 10/100/1000Mb Ethernet, one (ETH1) is based on
Intel® Lewisville 82579LM Gigabit PHY with AMT 7.0 support and the two other controllers (ETHER2 &
ETHER3) are based on Intel® Hartwell 82574L PCI Express controller.
In order to achieve the sp ecified perf ormance of the Ethernet port, Categor y 5 twisted pair cab les must
be used with 10/100MB and Category 5E, 6 or 6E with 1Gb LAN networks.
The signals for the Ethernet ports are as follows:
Signal Description
MDI[0]+ / MDI[0]- In MDI mode, this is the first pair in 1000Base-T, i.e. the BI_DA+/- pair, and is
the transmit pair in 10Base-T and 100Base-TX.
In MDI crossover mode, this pair acts as the BI_DB+/- pair, and is the receive
pair in 10Base-T and 100Base-TX.
MDI[1]+ / MDI[1]- In MDI mode, this is the second pair in 1000Base-T, i.e. the BI_DB+/- pair, and
is the receive pair in 10Base-T and 100Base-TX.
In MDI crossover mode, this pair acts as the BI_DA+/- pair, and is the transmit
pair in 10Base-T and 100Base-TX.
MDI[2]+ / MDI[2]-
In MDI mode, this is the third pair in 1000Base-T, i.e. the BI_DC+/- pair.
In MDI crossover mode, this pair acts as the BI_DD+/- pair.
MDI[3]+ / MDI[3]-
In MDI mode, this is the fourth pair in 1000Base-T , i.e. the BI_DD+/- pair.
In MDI crossover mode, this pair acts as the BI_DC+/- pair.
Note: MDI = Media Dependent Interface.
Ethernet connector 1 (ETH1) is mounted together with USB Ports 4 and 5.
Ethernet connector 2 (ETH2) is mounted together with and above Ethernet connector 3 (ETH3).
The pinout of the RJ45 connectors is as follows:
Signal
PIN
Type
Ioh/Iol
Note
MDI0+
MDI0-
MDI1+
MDI2+
MDI2-
MDI1-
MDI3+
MDI3-
8 7 6 5 4 3 2 1
IO-Area Connectors
Page 38
KTQM67 Users Guide
KTD-N0819-E Page 38
5.3 USB Connectors (IO Area)
The KTQM67 board contains two EHCI (Enhanced Host Controller Interface) host controllers that
support up to fourteen USB 2.0 ports a llowing data transfers up to 480Mb/s . Legacy Keyboard/Mouse
and wakeup from sleep states are supported. Over-current detection on all fourteen USB ports is
supported. The following USB connectors are available in the IO Area.
USB Port 0 and 1 are supplied on the combined USB0, USB1 and DP0 connector.
USB Port 2 and 3 are supplied on the combined USB2, USB3 and DP1 connector.
USB Port 4 and 5 are supplied on the combined ETH1, USB4 and USB5 connector.
Note: It is required to use only HiSpeed USB cable, specified in USB2.0 standard:
5.3.1 USB Connector 0/1 (USB0/1)
USB Ports 0 and 1 ar e m ounted tog ether wit h DP0 port.
Note
Type
Signal
PIN
Signal
Type
Note
1
PWR
5V/SB5V
1 2 3 4 GND
PWR
IO
USB1-
USB1+
IO 1
PWR
5V/SB5V
1 2 3 4 GND
PWR
IO
USB0-
USB0+
IO
Note 1: In order to meet the requirements of USB standard, the 5V input supply must be at least 5.00V.
Signal
Description
USB0+ USB0USB1+ USB1-
Differential pair works as Data/Address/Command Bus.
5V/SB5V
5V supply for external devices. SB5V is supplied during powerdown to allow
wakeup on USB device activity. Protected by resettable 1A fuse covering both USB
ports.
IO-Area Connectors
Page 39
KTQM67 Users Guide
KTD-N0819-E Page 39
5.3.2 USB Connector 2/3 (USB2/3)
USB Ports 2 and 3 ar e m ounted tog ether wit h DP1 port.
Note
Type
Signal
PIN
Signal
Type
Note
1
PWR
5V/SB5V
1 2 3 4 GND
PWR
IO
USB3-
USB3+
IO 1
PWR
5V/SB5V
1 2 3 4 GND
PWR
IO
USB2-
USB2+
IO
Note 1: In order to meet the requirements of USB standard, the 5V input supply must be at least 5.00V.
5.3.3 USB Connector 4/5 (USB4/5)
USB Ports 4 and 5 are mounted together with ETH1 port.
Note
Type
Signal
PIN
Signal
Type
Note
1
PWR
5V/SB5V
1 2 3 4 GND
PWR
IO
USB5-
USB5+
IO
1
PWR
5V/SB5V
1 2 3 4 GND
PWR
IO
USB4-
USB4+
IO
Note 1: In order to meet the requirements of USB standard, the 5V input supply must be at least 5.00V.
Signal
Description
USB2+ USB2USB3+ USB3-
Differential pair works as Data/Address/Command Bus.
5V/SB5V
5V supply for external devices. SB5V is supplied during powerdown to allow
wakeup on USB device activity. Protected by resettable 1A fuse covering both USB
ports.
Signal Description
USB4+ USB4USB5+ USB5-
Differential pair works as Data/Address/Command Bus.
5V/SB5V
5V supply for external devices. SB5V is supplied during powerdown to allow wakeup
on USB device activity. Protected by resettable 1A fuse covering both USB ports.
IO-Area Connectors
Page 40
KTQM67 Users Guide
KTD-N0819-E Page 40
5.4 Audio Connector (IO Area)
The on-board Audio circuit im plements 7.1+2 Channel High Def inition Audio with UAA (Un iversal Audio
Architecture), featuring five 24-bit stereo DACs and three 20-bit stereo ADCs. The Following Audio
connector is available in IO Area.
Audio Speakers, Line-in and Microphone are available in the stacked audiojack connector
Signal
Type
Note
TIP LINE1-L
IA
RING LINE1-R
IA
SLEEVE GND
PWR
TIP
FRONT-OUT-L
OA
RING
FRONT-OUT-R
OA
SLEEVE GND
PWR
TIP MIC1-L
IA
RING MIC1-R
IA
SLEEVE GND
PWR
Signal Description Note
FRONT-OUT-L Front Speakers (Speaker Out Left).
FRONT-OUT-R Front Speakers (Speaker Out Right).
MIC1-L
Microphone 1 - Left Shared with Audio Header
MIC1-R Microphone 1 - Right Shared with Audio Header
LINE1-L Line 1 signal - Left Shared with Audio Header
LINE1-R Line 1 signal - Right
Shared with Audio Header
IO-Area Connectors
Page 41
KTQM67 Users Guide
KTD-N0819-E Page 41
6 Internal Connectors
6.1 Power Connector (ATX/BTXPWR)
The KTQM67 boards are designed to be supplied from a standard ATX (or BTX) power supply.
Alternatively supplie d by single +12V +/-5% (m ITX version onl y). U se of BTX s upply is not required for
operation, but may be required to drive high-power PCIe cards.
ATX/ BTX Power Connector (J43):
Note
Type
Signal
PIN
Signal
Type
Note
PWR
3V3
12
24 GND
PWR
PWR
+12V
11
23 5V
PWR
PWR
+12V
10
22 5V
PWR
PWR
SB5V
9
21 5V
PWR I P_OK
8
20 -5V
PWR 1
PWR
GND
7
19 GND
PWR
PWR
5V
6
18 GND
PWR
PWR
GND
5
17 GND
PWR
PWR
5V
4
16 PSON#
OC
PWR
GND
3
15 GND
PWR
PWR
3V3
2
14 -12V
PWR
PWR
3V3
1
13 3V3
PWR
Note 1: -5V supply is not used on-board.
See chapter “Power Consumption” regard ing input tolerances o n 3.3V, 5V, SB5V, +12 a nd -12V (also
refer to ATX specification version 2.2).
ATX+12V-4pin Power Connector (J42):
Note
Type
Signal
PIN
Signal
Type
Note
PWR
GND
2 4
+12V
PWR 1
PWR
GND
1 3
+12V
PWR
1
Note 1: Use of the 4-pin ATX+12V Power Connector is required for operation of all KTQM67 board
versions.
Signal Description
P_OK
P_OK is a power good signal and should be asserted high by the power supply to indicate
that the +5VDC and +3.3VDC outputs are above the undervoltage thresholds of the power
supply. When this signal is asserted high, there should be sufficient energy stored by the
converter to guarantee continuous power operation within specification. Conversely, when
the output voltages fall below the undervoltage threshold, or when mains power has been
removed for a time sufficiently long so that power supply operation is no longer guaranteed,
P_OK should be de-asserted to a low state. The recommended electrical and timing
characteristics of the P_OK (PWR_OK) signal are provided in the ATX12V Power
SupplyDesign Guide.
It is strongly recommended to use an ATX or BTX supply, in order to implement the
supervision of the 5V and 3V3 supplies. These supplies are not supervised on-board.
PS_ON# Active low open drain signal from the board to the power supply to turn on the power supply
outputs. Signal must be pulled high by the power supply.
Internal Connectors
Page 42
KTQM67 Users Guide
KTD-N0819-E Page 42
6.2 Fan Connectors (FAN_CPU) (J28) and (FAN_SYS) (J29)
The FAN_CPU is used for the connection of the FAN for the CPU.
The FAN_SYS can be used to power, control and monitor a fan for chassis ventilation etc.
The 4pin header is recommended to be used for driving 4-wire type Fan in order to implement FAN
speed control. 3-wire Fan is also possible, but no fan speed control is integrated.
4-pin Mode:
PIN Signal Type Ioh/Iol
Pull
U/D
Note
1 CONTROL
O - - 2 SENSE
I
-
4K7 3 +12V
PWR
- -
4 GND
PWR
- -
Signal Description
CONTROL PWM signal for FAN speed control
SENSE Tacho signal from the fan for supervision. The signals shall be generated by an open
collector transistor or similar. On-board is a pull-up resistor 4K7 to +12V. The signal has to
be pulsed, typically twice per rotation.
12V +12V supply for fan. A maximum of 2000mA can be supplied from this pin.
GND Power Supply GND signal
3-pin Mode:
PIN Signal Type Ioh/Iol
Pull
U/D
Note
-
2 SENSE
I
-
4K7 3 +12V
PWR
- -
4 GND
PWR
- -
Signal Description
SENSE Tacho signal from the fan for supervision. The signals shall be generated by an open
collector transistor or similar. On-board is a pull-up resistor 4K7 to +12V. The signal has to
be pulsed, typically twice per rotation.
12V +12V supply for fan. A maximum of 2000mA can be supplied from this pin.
GND Power Supply GND signal
Internal Connectors
Page 43
KTQM67 Users Guide
KTD-N0819-E Page 43
6.3 PS/2 Keyboard and Mouse connector (KBDMSE) (J27)
Attachment of a PS/2 keyboard/mouse can be done through the pinrow connector KBDMSE (J27).
Both interfaces utilize open-drain signalling with on-board pull-up.
The PS/2 mouse and keyboard is supplied from SB5V when in standby mode in order to enable
keyboard or mouse activit y to bring the system out from power saving states. T he supply is provided
through a 1.1A resettable fuse.
PIN Signal Type Ioh/Iol
Pull
U/D
Note
1 KBDCLK
IOD
/14mA
2K7
2 KBDDAT
IOD
/14mA
2K7
3 MSCLK
IOD
/14mA
2K7
4 MSDAT
IOD
/14mA
2K7
5 5V/SB5V
PWR
- -
6
GND
PWR
- -
Signal Description – Keyboard & and mouse Connector (KBDMSE).
Signal Description
MSCLK Bi-directional clock signal used to strobe data/commands from/to the PS/2 mouse.
MSDAT Bi-directional serial data line used to transfer data from or commands to the PS/2 mouse.
KDBCLK Bi-directional clock signal used to strobe data/commands from/to the PC-AT keyboard.
KBDDAT
Bi-directional serial data line used to transfer data from or commands to the PC-AT
keyboard.
Internal Connectors
Page 44
KTQM67 Users Guide
KTD-N0819-E Page 44
6.4 Display connectors (I nternal)
The KTQM67 fam ily provides internal displa y connectors: one on-boar d eDP (Embedded Displ ayPort)
and one on-board LVDS pa nel int erf ac e.
For IO Area Display Connectors (DVI-I and two DP’s), see earlier section.
Two graphic pipes are supported; meaning that up to t wo independent displa ys can be implem ented
using any two of display connectors (IO Area - and Internal connectors) with the exception of the
combination eDP + LVDS.
.
6.4.1 eDP connector (EDP) (J38)
The eDP connector is based on single in-line 40 pole connector type TYCO 5-2069716-3.
Pin Signal Description Type Note
1
NC
NC 2
GND
PWR 3
Lane 3 (n)
LVDS
4 Lane 3 (p)
LVDS
5 GND
PWR 6
Lane 2 (n)
LVDS
7 Lane 2 (p)
LVDS
8 GND
PWR 9
Lane 1 (n)
LVDS
10
Lane 1 (p)
LVDS
11
GND
PWR
12
Lane 0 (p)
LVDS
13
Lane 0 (n)
LVDS
14
GND
PWR
15
Aux (p)
LVDS
16
Aux (n)
LVDS
17
GND
PWR
18
LCD-VCC
PWR
19
LCD-VCC
Display panel voltage
PWR
Fused by 1.5A resetable PTC fuse
20
LCD-VCC
PWR
3.3V or 5V selected in BIOS
21
LCD-VCC
PWR
Shared with LVDS connector
22
NC
NC
23
LCD-GND
PWR
24
LCD-GND
Display panel GND
PWR
25
LCD-GND
PWR
26
LCD-GND
PWR
27
HPD
Hot Plug Detection
I 28
BL-GND
PWR
29
BL-GND
Backlight GND
PWR
30
BL-GND
PWR
31
BL-GND
PWR
32
BL-EN
Back Light Enable
O
To enable the Back Light
33
BL-PWM
Back Light PWM (Pulse Width Modulated)
O
To adjust Back Light intensity
34
NC
NC 35
NC
NC 36
BL-VCC
PWR
37
BL-VCC
Backlight Voltage
PWR
12V (in S0 mode)
38
BL-VCC
PWR
Fused by 1.5A resetable PTC fuse
39
BL-VCC
PWR
40
NC
NC
Internal Connectors
Page 45
KTQM67 Users Guide
KTD-N0819-E Page 45
6.4.2 LVDS Flat Panel Connector (LVDS) (J20)
Two graphic pipes are supported; meaning that up to two independent displays can be implemented
using any two of display connectors (IO Area - and Internal connectors) with the exception of the
combination eDP + LVDS.
Note
Type
Signal
PIN
Signal
Type
Note
Max. 0.5A
PWR
+12V
1 2 +12V
PWR
Max. 0.5A
Max. 0.5A
PWR
+12V
3 4 +12V
PWR
Max. 0.5A
Max. 0.5A
PWR
+12V
5 6 GND
PWR
Max. 0.5A
Max. 0.5A
PWR
+5V
7 8 GND
PWR
Max. 0.5A
Max. 0.5A
PWR
LCDVCC
9 10 LCDVCC
PWR
Max. 0.5A
2K2Ω, 3.3V
OT
DDC CLK
11
12 DDC DATA
OT
2K2Ω, 3.3V
3.3V level
OT
BKLTCTL
13
14 VDD ENABLE
OT
3.3V level
3.3V level
OT
BKLTEN#
15
16 GND
PWR
Max. 0.5A
LVDS
LVDS A0-
17
18 LVDS A0+
LVDS
LVDS
LVDS A1-
19
20 LVDS A1+
LVDS
LVDS
LVDS A2-
21
22 LVDS A2+
LVDS
LVDS
LVDS ACLK-
23
24 LVDS ACLK+
LVDS
LVDS
LVDS A3-
25
26 LVDS A3+
LVDS
Max. 0.5A
PWR
GND
27
28 GND
PWR
Max. 0.5A
LVDS
LVDS B0-
29
30 LVDS B0+
LVDS
LVDS
LVDS B1-
31
32 LVDS B1+
LVDS
LVDS
LVDS B2-
33
34 LVDS B2+
LVDS
LVDS
LVDS BCLK-
35
36 LVDS BCLK+
LVDS
LVDS
LVDS B3-
37
38 LVDS B3+
LVDS
Max. 0.5A
PWR
GND
39
40 GND
PWR
Max. 0.5A
Note: The KTQM67 on-board LVDS connector supports single and dual channel, 18/24bit SPWG
panels up to the resolution 1600x1200 or 1920x1080 and with limited frame rate some
1920x1200.
Signal Description – LVDS Flat Panel Connector :
Signal
Description
LVDS A0..A3
LVDS A Channel data
LVDS ACLK
LVDS A Channel clock
LVDS B0..B3
LVDS B Channel data
LVDS BCLK
LVDS B Channel clock
BKLTCTL
Backlight control (1), PWM signal to implement voltage in the range 0-3.3V
BKLTEN#
Backlight Enable signal (active low) (2)
VDD ENABLE
Output Display Enable.
LCDVCC
VCC supply to the display. Power-on/off sequencing depending on selected (in BIOS
setup) display type. 5V or 3.3V selected in BIOS setup. LCDVCC is shared with eDP
connector. Maximum load is 1A at both voltages.
DDC CLK
DDC Channel Clock
Notes: Windows API will be available to o perate the BKLTCTL signal. Some Inverter s have a limited
voltage range 0- 2.5V for this signal: If voltage is > 2.5V the Inverter might latch up. Some
Inverters generates nois e on the BKLTCTL signal, res ulting in making the LVDS transm ission
failing (corrupted pictur e on the displa y). By adding a 1Kohm resistor in series with this signal,
mounted in the Inverter end of the cable kit, the noise is limited and the picture is stable.
If the Backlight Enable is required to be active high then, check the following BIOS Chipset
setting: Backlight Signal Inver sion = Ena bled.
Internal Connectors
Page 46
KTQM67 Users Guide
KTD-N0819-E Page 46
6.5 SATA (Serial ATA) Disk interface (J21 – J26)
The KTQM67 boards have an integrated SATA Host controller (PCH in the QM67 chipset) that supports
independent DMA operation on six ports. One device can be installed on each port for a maximum of six
SATA devices. A point-to-point interface (SATA cable) is used for host to device connections. Data
transfer rates of up to 6.0Gb/s (typically 600MB/s) on SATA0 and SATA1 and 3.0Gb/s (typically
300MB/s) on SATA2, SATA3, SATA4 and SATA5.
Note: Before installing OS on a SATA drive make sure the drive is not a former member of a RAID
system. If so some hidden data on the disk has to be erased. To do this, connect two SATA drives and
select RAID in BIOS. Save settings and select <Ctrl> <I> while booting to enter the RAID setup menu.
Now the hidden RAID data will be erased from the selected SATA drive.
The SATA controller supports:
2 to 6-drive RAID 0 (data striping)
2-drive RAID 1 (data mirroring)
3 to 6-drive RAID 5 (block-level striping with par ity).
4-drive RAID 10 (data striping and mirroring)
2 to 6-drive matrix RAID (different parts of a single drive can be assigned to different RAID
devices).
AHCI (Advanced Host Controller Interf ac e)
NCQ (Native Command Queuing). NCQ is for faster data access.
Hot Swap
Intel® Rapid Recover Technology
2 – 256TB volume (Data volumes only)
Capacity expansion
TRIM in Windows 7 (in AHCI and RAID mode for drives not part of a RAID volume). (TRIM is for
SSD data garbage handling).
The RAID (Redundant Array of Independent Drives) functionality is based on a firmware system with
support for RAID modes 0 1, 5 and 10.
SATA connector pinning:
The pinout of SATA ports SATA0 (J21), SATA1 (J22), SATA2 (J23), SATA3 (J24), SATA4 (J25) and
SATA5 (J26) is as follows:
PIN Signal Type Ioh/Iol
Pull
U/D
Note
1
GND
PWR - - 2
SATA* TX+
3
SATA* TX-
4
GND
PWR - - 5
SATA* RX-
6
SATA* RX+
7
GND
PWR - -
The signals used for the primary SATA hard disk interface are the following:
Signal Description
SATA* RX+
SATA* RX-
Host transmitter differential signal pair
SATA* TX+
SATA* TX-
Host receiver differential signal pair
“*” specifies 0, 1, 2, 3, 4, 5 depe nding on SATA port.
Internal Connectors
Page 47
KTQM67 Users Guide
KTD-N0819-E Page 47
6.6 USB Connectors (USB)
The KTQM67 board contains two EHCI (Enhanced Host Controller Interface) host controllers that
support up to fourteen USB 2.0 ports a llowing data transfers up to 480Mb/s . Legacy Keyboard/Mouse
and wakeup from sleep states are supported. Over-current detection on all fourteen USB ports is
supported. The following USB ports are available on Internal Pinrows:
USB Port 6 and 7 are supplied on the USB6/7 internal pinrow FRONTPNL connector.
USB Port 8 and 9 are supplied on the USB8/9 internal pinrow connector.
USB Port 10 and 11 are supplied on the USB10/11 internal pinrow connector.
USB Port 12 and 13 are supplied on the USB12/13 internal pinrow connector.
Note: It is required to use only HiSpeed USB cable, specified in USB2.0 standard:
6.6.1 USB Connector 6/7
See Frontpanel Connector (FRONTPNL) description.
6.6.2 USB Connector 8/9 (USB8/9) (J10)
USB Ports 8 and 9 are supplied on the internal USB8/9 pinrow connector J10.
Note
Type
Signal
PIN
Signal
Type
Note
1
PWR
5V/SB5V
1 2 5V/SB5V
PWR 1
IO
USB8-
3 4 USB9-
IO
IO
USB8+
5 6 USB9+
IO
PWR
GND
7 8 GND
PWR
NC
KEY
9 10 NC
NC
Signal Description
USB8+ USB8USB9+ USB9-
Differential pair works as Data/Address/Command Bus.
5V/SB5V
5V supply for external devices. SB5V is supplied during powerdown to allow
wakeup on USB device activity. Protected by resettable 1A fuse covering both USB
ports.
Internal Connectors
Connector Definitions
Page 48
KTQM67 Users Guide
KTD-N0819-E Page 48
6.6.3 USB Connector 10/11 (USB10/11) (J11)
USB Ports 10 and 11 are supplied on the internal USB10/11 pinrow connector J11.
Note
Type
Signal
PIN
Signal
Type
Note
1
PWR
5V/SB5V
1 2 5V/SB5V
PWR 1
IO
USB10-
3 4 USB11-
IO
IO
USB10+
5 6 USB11+
IO
PWR
GND
7 8 GND
PWR
NC
KEY
9 10 NC
NC
Signal
Description
USB10+ USB10USB11+ USB11-
Differential pair works as Data/Address/Command Bus.
5V/SB5V
5V supply for external devices. SB5V is supplied during powerdown to allow
wakeup on USB device activity. Protected by resettable 1A fuse covering both USB
ports.
6.6.4 USB Connector 12/13 (USB12/13) (J12)
USB Ports 12 and 13 are supplied on the internal USB12/13 pinrow connector J12.
Note
Type
Signal
PIN
Signal
Type
Note
1
PWR
5V/SB5V
1 2 5V/SB5V
PWR 1
IO
USB12-
3 4 USB13-
IO
IO
USB12+
5 6 USB13+
IO
PWR
GND
7 8 GND
PWR
NC
KEY
9 10 NC
NC
Signal Description
USB12+ USB12USB13+ USB13-
Differential pair works as Data/Address/Command Bus.
5V/SB5V
5V supply for external devices. SB5V is supplied during powerdown to allow
wakeup on USB device activity. Protected by resettable 1A fuse covering both USB
ports.
Note 1: In order to meet the requirements of USB standard, the 5V input supply must be at least 5.00V.
Internal Connectors
Page 49
KTQM67 Users Guide
KTD-N0819-E Page 49
6.7 Firewire/IEEE1394 connectors (J13,J14)
The KTQM67 support two IEE E Std 1394a-2000 fully compliant ports at 1 00M bits/s, 200M bits/s and
400M bits/s.
6.7.1 IEEE1394 connector (IEEE1394_0) (J14)
Note
Pull
U/D
Ioh/Iol Type Signal PIN Signal Type Ioh/Iol
Pull
U/D
Note
- - TPA0+
1 2 TPA0- - - - - PWR
GND
3 4 GND
PWR - - - - TPB0+
5 6 TPB0- - -
1 - -
PWR
+12V
7 8 +12V
PWR - -
1
key - -
NC - 9 10 GND
PWR - -
Note 1: The 12V supply for the IEEE1394_0 devices is on-board fused with a 1.25A reset-able fuse.
Signal Description
TPA0+,TPA0– Differential signal pair A
TPB0+, TPB0–
Differential signal pair B
+12V
+12V supply
6.7.2 IEEE1394 connector (IEEE1394_1) (J13)
Note
Pull
U/D
Ioh/Iol Type Signal PIN Signal Type Ioh/Iol
Pull
U/D
Note
- - TPA0+
1 2 TPA0- - -
- -
PWR
GND
3 4 GND
PWR - - - - TPB0+
5 6 TPB0- - - 1 - - PWR
+12V
7 8 +12V
PWR - - 1 key - -
NC - 9 10 GND
PWR - -
Note 1: The 12V supply for the IEEE1394_1 devices is on-board fused with a 1.25A reset-able fuse.
Signal Description
TPA1+, TPA1– Differential signal pair A
TPB1+, TPB1–
Differential signal pair B
+12V
+12V supply
Internal Connectors
Page 50
KTQM67 Users Guide
KTD-N0819-E Page 50
6.8 Serial COM1 – COM4 Ports (J15, J16, J17, J18)
Four RS232 serial ports are available on the KTQM67.
The typical definition of the signals in the COM ports is as follows:
Signal
Description
TxD
Transmitted Data, sends data to the communications link. The signal is set to the marking
state (-12V) on hardware reset when the transmitter is empty or when loop mode operation is
initiated.
RxD Received Data, receives data from the communications link.
DTR
Data Terminal Ready, indicates to the modem etc. that the on-board UART is ready to
establish a communication link.
DSR Data Set Ready, indicates that the modem etc. is ready to establish a communications link.
RTS
Request To Send, indicates to the modem etc. that the on-board UART is ready to exchange
data.
CTS Clear To Send, indicates that the modem or data set is ready to exchange data.
DCD Data Carrier Detect, indicates that the modem or data set has detected the data carrier.
RI Ring Indicator, indicates that the modem has received a ringing signal from the telephone line.
The pinout of Serial ports COM1 (J15), COM2 (J16), COM3 (J17) and COM4 (J18) is as follows:
Note
Ioh/Iol
Type
Signal
PIN
Signal
Type
Ioh/Iol
Note
- I
DCD
1 2 DSR I - - I
RxD
3 4 RTS O
O
TxD
5 6 CTS I - O
DTR
7 8 RI I - - PWR
GND
9 10 5V
PWR - 1
Note 1: The COM1, COM2, COM3 and COM4 5V supply is fused with common 1.1A resettable fuse.
DB9 adapter cables (PN 821016 200m m long and 82 1017 100mm long) are available for implementing
standard COM ports on chassis.
Internal Connectors
Page 51
KTQM67 Users Guide
KTD-N0819-E Page 51
6.9 LPT (Line Print Terminal – Parallel port) (J44)
The LPT connector (only KTQM67/Flex and KTQM67/ATXP) is a 32 pole single in line connector type
Tyco 3-1734592-2. Available cable kit (FFC cable and module), see chapter 8.
Pin Signal Description Type
Note
1
+5V
PWR
Fused by 0.8A resetable PTC fuse
2
GND
PWR
3
RSV
Reserved
- 4
RSV
Reserved
-
5
RSV
Reserved
-
6
RSV
Reserved
- 7
NC
NC 8
RSV
Reserved
- 9
RSV
Reserved
-
10
RSV
Reserved
-
11
GND
PWR
12
AFD#
IS
13
STB#
IS
14
ERROR#
O
8mA load
15
PPD0
O
8mA load
16
INIT#
IS 17
GND
PWR
18
PPD1
O
8mA load
19
SLIN#
IS 20
PPD2
O
8mA load
21
PPD3
O
8mA load
22
GND
PWR
23
PPD4
O
8mA load
24
PPD5
O
8mA load
25
PPD6
O 8mA load
26
PPD7
O 8mA load
27
GND
PWR
28
ACK#
O 8mA load
29
BUSY
O 8mA load
30
PE
O 8mA load
31
SLCT
O 8mA load
32
GND
PWR
Signal Description
AFD#
Auto Line Feed, active low
STB# Strobe, active low
ERROR#
Error, active low
PPD0 – PPD7
Parallel Port Data0 – Data7
INIT#
Initialize, act i ve lo w
SLIN# Select Input, active low
ACK# Acknowledge, active low
BUSY
Busy, active high
PE
Paper End, active high
SLCT Select, active high
Internal Connectors
Page 52
KTQM67 Users Guide
KTD-N0819-E Page 52
6.10 Audio Connec tors
The on-board Audio circuit im plements 7.1+2 Channel High Def inition Audio with UAA (Un iversal Audio
Architecture), featuring five 24-bit stereo DACs and three 20-bit stereo ADCs.
The following Audio connectors are available as Internal connectors.
6.10.1 CDROM Audio Input (CDROM) (J3)
CD-ROM audio input may be connected to this connector or it can be used as secondar y line-in signal.
PIN
Signal
Type
Note
1 CD_Left
IA 1 2 CD_GND
IA 3 CD_GND
IA 4 CD_Right
IA
1
Note 1: The definition of which pins are used for the Left and Right channels is not a worldwide
accepted standard. Some CDROM cable kits expect reverse pin order.
Signal Description
CD_Left
CD_Right
Left and right CD audio input lines or secondary Line-in.
CD_GND Analogue GND for Left and Right CD.
(This analogue GND is not shorted to the general digital GND on the board).
6.10.2 Line2 and Mic2
Line2 and Mic2 are accessible via Feature Connector, see Feature connector description.
Internal Connectors
Page 53
KTQM67 Users Guide
KTD-N0819-E Page 53
6.10.1 Audio Header Connector (AUDIO_HE AD) (J3 1)
Note
Type
Signal
PIN
Signal
Type
Note
AO
LFE-OUT
1 2 CEN-OUT
AO
PWR
AAGND
3 4 AAGND
PWR 1
AO
FRONT-OUT-L
5 6 FRONT-OUT-R
AO 1
PWR
AAGND
7 8 AAGND
PWR
AO
REAR-OUT-L
9 10 REAR-OUT-R
AO
AO
SIDE-OUT-L
11
12 SIDE-OUT-R
AO
PWR
AAGND
13
14 AAGND
PWR 1
AI
MIC1-L
15
16 MIC1-R
AI 1
PWR
AAGND
17
18 AAGND
PWR 1 LINE1-L
19
20 LINE1-R
1
NC
NC
21
22 AAGND
PWR
PWR
GND
23
24 NC
NC O SPDIF-OUT
25
26 GND
PWR
Note 1: Shared with Audio Stack connector
Signal Description
FRONT-OUT-L Front Speakers (Speaker Out Left).
FRONT-OUT-R Front Speakers (Speaker Out Right).
REAR-OUT-L
Rear Speakers (Surround Out Left).
REAR-OUT-R Rear Speakers (Surround Out Right).
SIDE-OUT-L
Side speakers (Surround Out Left)
SIDE-OUT-R
Side speakers (Surround Out Right)
CEN-OUT Center Speaker (Center Out channel).
LFE-OUT
Subwoofer Speaker (Low Freq. Effect Out).
NC No connection
MIC1
MIC Input 1
LINE1 Line 1 signals
F-SPDIF-OUT S/PDIF Output
AAGND Audio Analogue ground
Internal Connectors
Page 54
KTQM67 Users Guide
KTD-N0819-E Page 54
6.11 Front Panel Connector (FRONTPNL) (J19)
Note
Pull
U/D
Ioh/
Iol
Type Signal PIN Signal Type
Ioh/
Iol
Pull
U/D
Note
- -
PWR
USB6/7_5V
1 2 USB6/7_5V
PWR - - - - USB6-
3 4 USB7-
- - - - USB6+
5 6 USB7+
- - - -
PWR
GND
7 8 GND
PWR - - - -
NC
NC
9 10 LINE2-L
- - - -
PWR
+5V
11
12 +5V
PWR - - - 25/25mA
O
SATA_LED#
13
14 SUS_LED
O
7mA - - - PWR
GND
15
16 PWRBTN_IN#
I 1K1
4K7 - I
RSTIN#
17
18 GND
PWR - - - -
PWR
SB3V3
19
20 LINE2-R
- - - -
PWR
AGND
21
22 AGND
PWR - - - -
AI
MIC2-L
23
24 MIC2-R
AI - -
Signal Description
USB10/11_5V
5V supply for external de v i ces . S B5V is s u ppl ie d d uri ng p o werd o wn to allow wakeup
on USB device activity. Protected by resettable 1.1A fuse covering both USB ports.
USB1+
USB1-
Universal Serial Bus Port 1 Differentials: Bus Data/Address/Command Bus.
USB3+
USB3-
Universal Serial Bus Port 3 Differentials: Bus Data/Address/Command Bus.
+5V
Maximum load is 1A or 2A per pin if using IDC con nector flat cable or crimp term inals
respectively.
SATA_LED# SATA Activity LED (active low signal). 3V3 output when passive.
SUS_LED Suspend Mode LED (active high signal). Output 3.3V via 470Ω.
PWRBTN_IN#
Power Button In. T oggle this signal low to start the AT X / BTX PSU and boot the
board.
RSTIN#
Reset Input. When pulled l o w for a m inimum 16ms, the reset process will be in iti a ted.
The reset process continues even though the Reset Input is kept low.
LINE2
Line2 is second stereo Line signals
MIC2 MIC2 is second stereo microphone input.
SB3V3
Standby 3.3V voltage
AGND
Analogue Ground for Audio
Note: In order to meet the requirements of USB standard, the 5V input supply must be at least 5.00V.
Internal Connectors
Page 55
KTQM67 Users Guide
KTD-N0819-E Page 55
6.12 Feature Connector (FEATURE) (J30)
Note
Pull
U/D
Ioh/Iol Type Signal PIN Signal Type Ioh/Iol
Pull
U/D
Note
2
2M/ - I
CASE_OPEN#
1 2 SMBC
/4mA
10K/ 1 - 25/25mA O S5#
3 4 SMBD
/4mA
10K/ 1 - 25/25mA
O
PWR_OK
5 6 EXT_BAT
PWR - - - O FAN3OUT
7 8 FAN3IN
I - - - -
PWR
SB3V3
9 10 SB5V
PWR - - -
IOT
GPIO0
11
12 GPIO1
IOT - -
IOT
GPIO2
13
14 GPIO3
IOT - -
IOT
GPIO4
15
16 GPIO5
IOT - -
IOT
GPIO6
17
18 GPIO7
IOT - - -
PWR
GND
19
20 GND
PWR - - - I GPIO8
21
22 GPIO9 I - - I
GPIO10
23
24 GPIO11
I - - I GPIO12
25
26 GPIO13
IOT - -
IOT
GPIO14
27
28 GPIO15
IOT - -
IOT
GPIO16
29
30 GPIO17
IOT - - -
PWR
GND
31
32 GND
PWR - - - 8/8mA
O
EGCLK
33
34 EGCS#
O
8/8mA
- - 8/8mA EGAD
35
36 TMA0 O - PWR
+12V
37
38 GND
PWR - - - O FAN4OUT
39
40 FAN4IN
I - - - -
PWR
GND
41
42 GND
PWR - - - -
PWR
GND
43
44 S3#
O
25/25mA
-
Notes: 1. Pull-up to +3V3Dual (+3V3 or SB3V3). 2. Pull-up to on-board Battery. 3. Pull-up to +3V3.
Signal Description
CASE_OPEN#
CASE OPEN, used to det ec t if the s ystem c ase has been opened . T his sign al’s s tatus
is readable, so it may be used like a GPI when the Intruder switch is not required.
SMBC SMBus Clock signal
SMBD SMBus Data signal
S3#
S3 sleep mode, active low output, optionally used to deactivate external system.
S5# S5 sleep mode, acti ve lo w output, optionally used to deactivate external system.
PWR_OK
PoWeR OK, signal is high if no power failures are de tected. (This is not the sam e as
the P_OK signal generated by ATX PSU).
EXT_BAT
(EXTernal BATtery) opti on f or connec ting + t erm inal of an ex ternal prim ar y cell batter y
(2.5 - 4.0 V) ( – terminal connected to GND etc. pin 20). The external battery is
protected against charging and can be used with or without the on-board battery
installed.
FAN3OUT FAN 3 speed control OUTput, 3.3V PWM signal can be used as Fan control voltage.
FAN3IN FAN3 Input. 0V to +3V3 amplitude Fan 3 tachometer input.
FAN4OUT FAN 4 speed control OUTput, 3.3V PWM signal can be used as Fan control voltage.
FAN4IN FAN4 Input. 0V to +3V3 amplitude Fan 3 tachometer input.
SB3V3 Max. load is 0.75A (1.5A < 1 sec.)
SB5V StandBy +5V supply.
GPIO0..17
General Purpose Inputs / Output. These Signals may be controlled or monitored
through the use of the KT-API-V2 (Application Programming Interface).
EGCLK Extend GPIO Clock signal
EGAD Extend GPIO Address Data signal
EGCS# Extend GPIO Chip Select signal, active low
TMA0 Timer Output
+12V Max. load is 0.75A (1.5A < 1 sec.)
Internal Connectors
Page 56
KTQM67 Users Guide
KTD-N0819-E Page 56
GPIO in more details.
The GPIO’s are controlle d via the IT E IT 8516F Em bedded Contr oller . Each G PIO has 100pF t o ground,
clamping Diode to 3V3 and has multiplexed functionality. Som e pins can be DAC (Dig ital to Analogue
Converter output), PW M (Pulse Width Modulated signal outp ut), ADC (Analogue t o Digital Converter
input), TMRI (Tim er Counter Input), WUI (Wake Up Input), RI (Ring I ndicator Input) or som e special
function.
Signal IT8516F pin name Type +5V tolerant Description
GPIO0
DAC0/GPJ0
AO/IOS
No
GPIO1
DAC1/GPJ1
AO/IOS
No
GPIO2
DAC2/GPJ2
AO/IOS
No
GPIO3
DAC3/GPJ3
AO/IOS
No
GPIO4
PWM2/GPA2
O8/IOS
Yes
GPIO5
PWM3/GPA3
O8/IOS
Yes
GPIO6
PWM4/GPA4
O8/IOS
Yes
GPIO7
PWM5/GPA5
O8/IOS
Yes
GPIO8
ADC0/GPI0
AI/IS
No
GPIO9
ADC1/GPI1
AI/IS
No
GPIO10
ADC2/GPI2
AI/IS
No
GPIO11
ADC3/GPI3
AI/IS
No
GPIO12
ADC4/WUI28/GPI4
AI/IS/IS
No
GPIO13
RI1#/WUI0/GPD0
IS/IS/IOS
Yes
GPIO14
RI2#/WUI1/GPD1
IS/IS/IOS
Yes
GPIO15
TMRI0/WUI2/GPC4
IS/IS/IOS
Yes
GPIO16
TMRI1/WUI3/GPC6
IS/IS/IOS
Yes
GPIO17
L80HLAT/BAO/WUI24/GPE0
O4/O4/IS/IOS
Yes
Internal Connectors
Page 57
KTQM67 Users Guide
KTD-N0819-E Page 57
Warning: Don’t leave the jumper in position 1-2, otherwise the battery will fully depleted within a
few weeks if power is disconnected.
6.13 Clear CMOS Jumper (J37)
The Clear-CMOS Jumper (J37) is used to clear the CMOS content.
J37
Description
pin1-2
pin2-3
X - Clear CMOS data
- X Default positions
- - Secure CMOS function is disabled and Default values are used
To clear CMOS settings, including Password protection, move the Clear CMOS jumper to pin 1-2 for a few
seconds (~10 sec) (works with or without power connected to the system).
To disable the Secure CMOS function (selected in BIOS), remove the jumper completely from J37.
Leave the Jumper in position 2-3 (default position).
Jumper (in default position)
J37 pin 1
Internal Connectors
!
Page 58
KTQM67 Users Guide
KTD-N0819-E Page 58
Warning: If the jumper (J4) is mounted and you make BIOS Upgrade etc. then the BIOS
Recovery SPI Flash will be Upgraded and not the BIOS Default SPI Flash.
This means that in case something goes wrong (power interruption or incorrect BIOS package
used etc.) when Upgrading BIOS, then the BIOS Recovery SPI Flash might get corrupted.
6.14 SPI Recover Jumper (J4)
The SPI Recover Jumper is used to select BIOS Recovery SPI Flash instead of the BIOS Default SPI
Flash.
Normally Jumper is not installed and board boots on the BIOS Default SPI Flash.
Only in case the Default BIOS gets corrupted (board do not boot), then turn off power, install Jumper
(J4) and try rebooting.
After rebooting, remove the Jumper before Default BIOS is recovered by reloading BIOS (for instance
by using latest BIOS upgrade package from web product page).
Verify that Default BIOS has been recovered by making a successful reboot.
6.15 SPI Connec tor (SPI) (J5)
The SPI Connector is normally not used. If howe ver a SPI BIOS is connec te d via the SPI Con nec tor
then the board will try to boot on it.
Note
Pull U/D
Ioh/Iol
Type
Signal
PIN
Signal
Type
Ioh/Iol
Pull U/D
Note
- CLK
1 2 SB3V3
PWR - - - I CS0#
3 4 ADDIN
IO /10K
10K/
- NC
5 6 NC - - - 10K/
IO
MOSI
7 8 ISOLATE#
IO 100K
- IO
MISO
9
10
GND
PWR - -
Signal Description
CLK
Serial Clock
SB3V3
3.3V Standby Voltage power line. Normally output power, but when Motherboard is
turned off then the on-board SPI Flash can be 3.3V power sourced via this pin.
CS0# CS0# Chip Select 0, active low.
ADDIN ADDIN input signal must be NC.
MOSI Master Output, Slave Input
ISOLATE#
The ISOLATE# input, acti ve low, is normally NC, but must be connected to GN D when
loading SPI flash. Po wer Supply to the Motherb oard must be turned of f when loading
SPI flash. The pull up resistor is connected via diode to 5VSB.
MISO
Master Input, Slave Output
Internal Connectors
!
Page 59
KTQM67 Users Guide
KTD-N0819-E Page 59
6.16 XDP-CPU (Debug Port for CPU) (J32)
The XDP-CPU (Intel Debug Port for CPU) connector is not mounted and not supported. XDP connector
layout (pads) is located on the backside of PCB and is prepared for the Molex 52435-2671 (or 52435-
2672).
Pin Signal Description Type Pull Up/Down Note
1
OBSFN_A0
2
OBSFN_A1
3
GND
PWR
-
4
NC
NC
-
5
NC
NC
-
6
GND
PWR
-
7
NC
NC
-
8
NC
NC
-
9
GND
PWR
-
10
HOOK0
11
HOOK1
12
HOOK2
13
HOOK3
14
HOOK4
15
HOOK5
16
+5V
PWR
-
17
HOOK6
18
HOOK7
500R
(500R by 2x1K in parallel)
19
GND
PWR
-
20
TDO
/51R
21
TRST#
/51R
22
TDI
/51R
23
TMS
/51R
24
NC
NC
-
25
GND
PWR
-
26
TCK0
/51R
Internal Connectors
Page 60
KTQM67 Users Guide
KTD-N0819-E Page 60
6.17 XDP-PCH (Debug Port for Chipset) (J33)
The XDP-PCH (Intel Debug Port for Chipset) connector is not mounted and not supported. XDP-PCH
connector layout (pads) is located on the backside of PCB (below J35 connector on mITX version) and
is prepared for the Molex 52435-2671 (or 52435-2672).
Pin Signal Description Type Pull Up/Down
Note
1 NC NC
-
2 NC NC
-
3
GND
PWR
-
4
NC
NC
-
5
NC
NC
-
6
GND
PWR
-
7
NC
NC
-
8
NC
NC
-
9
GND
PWR
-
10
HOOK0
RSMRST#
Connected to HOOK6
11
HOOK1
PWRBTN#
12
HOOK2
NC
-
13
HOOK3
NC
-
14
HOOK4
NC
-
15
HOOK5
NC
-
16
+5V
PWR
-
17
HOOK6
Connected to HOOK1
18
HOOK7
RESET#
500R
(500R by 2x1K in parallel)
19
GND
PWR
-
20
TDO
210R/100R
21
TRST#
22
TDI
210R/100R
23
TMS
210R/100R
24
NC
NC
-
25
GND
PWR
-
26
TCK0
/51R
Internal Connectors
Page 61
KTQM67 Users Guide
KTD-N0819-E Page 61
7 Slot Connectors (PCIe, miniPCIe, PCI)
7.1 PCIe Connectors
All members of the KTQM67 family supports one (x16) (16-lane) PCI Express port, one x1 PCI Express
port and two miniPCI Express ports.
The 16-lane (x16) PCI Express (PCIe 2.0) port can be used for external PCI Express cards inclusive
graphics card. It is located nearest the CPU. Maximum theoretical bandwidth using 16 lanes is 16 GB/s.
The two miniPCIe (PCIe 2.0) is located on the backside of the board.
The 1-lane (x1) PCI Express (PCIe 2.0) can be used for any PCIex1 cards inclusive “Riser PCIex1 to
PCI Dual flexible card“.
7.1.1 PCI-Express x16 Connector (PCIe x16)
Note
Type
Signal
PIN
Signal
Type
Note
+12V
B1
A1
NC
+12V
B2
A2
+12V
+12V
B3
A3
+12V
GND
B4
A4
GND
SMB_CLK
B5
A5
NC
SMB_DATA
B6
A6
NC
GND
B7
A7
NC
+3V3
B8
A8
NC
NC
B9
A9
+3V3
SB3V3
B10
A10
+3V3
WAKE#
B11
A11
RST#
NC
B12
A12
GND
GND
B13
A13
PCIE_x16 CLK
PEG_TXP[0]
B14
A14
PCIE_x16 CLK#
PEG_TXN[0]
B15
A15
GND
GND
B16
A16
PEG_RXP[0]
CLKREQ
B17
A17
PEG_RXN[0]
GND
B18
A18
GND
PEG_TXP[1]
B19
A19
NC
PEG_TXN[1]
B20
A20
GND
GND
B21
A21
PEG_RXP[1]
GND
B22
A22
PEG_RXN[1]
PEG_TXP[2]
B23
A23
GND
PEG_TXN[2]
B24
A24
GND
GND
B25
A25
PEG_RXP[2]
GND
B26
A26
PEG_RXN[2]
PEG_TXP[3]
B27
A27
GND
PEG_TXN[3]
B28
A28
GND
GND
B29
A29
PEG_RXP[3]
NC
B30
A30
PEG_RXN[3]
CLKREQ
B31
A31
GND
GND
B32
A32
NC
PEG_TXP[4]
B33
A33
NC
PEG_TXN[4]
B34
A34
GND
GND
B35
A35
PEG_RXP[4]
Slot Connectors
Page 62
KTQM67 Users Guide
KTD-N0819-E Page 62
GND
B36
A36
PEG_RXN[4]
PEG_TXP[5]
B37
A37
GND
PEG_TXN[5]
B38
A38
GND
GND
B39
A39
PEG_RXP[5]
GND
B40
A40
PEG_RXN[5]
PEG_TXP[6]
B41
A41
GND
PEG_TXN[6]
B42
A42
GND
GND
B43
A43
PEG_RXP[6]
GND
B44
A44
PEG_RXN[6]
PEG_TXP[7]
B45
A45
GND
PEG_TXN[7]
B46
A46
GND
GND
B47
A47
PEG_RXP[7]
CLKREQ
B48
A48
PEG_RXN[7]
GND
B49
A49
GND
PEG_TXP[8]
B50
A50
NC
PEG_TXN[8]
B51
A51
GND
GND
B52
A52
PEG_RXP[8]
GND
B53
A53
PEG_RXN[8]
PEG_TXP[9]
B54
A54
GND
PEG_TXN[9]
B55
A55
GND
GND
B56
A56
PEG_RXP[9]
GND
B57
A57
PEG_RXN[9]
PEG_TXP[10]
B58
A58
GND
PEG_TXN[10]
B59
A59
GND
GND
B60
A60
PEG_RXP[10]
GND
B61
A61
PEG_RXN[10]
PEG_TXP[11]
B62
A62
GND
PEG_TXN[11]
B63
A63
GND
GND
B64
A64
PEG_RXP[11]
GND
B65
A65
PEG_RXN[11]
PEG_TXP[12]
B66
A66
GND
PEG_TXN[12]
B67
A67
GND
GND
B68
A68
PEG_RXP[12]
GND
B69
A69
PEG_RXN[12]
PEG_TXP[13]
B70
A70
GND
PEG_TXN[13]
B71
A71
GND
GND
B72
A72
PEG_RXP[13]
GND
B73
A73
PEG_RXN[13]
PEG_TXP[14]
B74
A74
GND
PEG_TXN[14]
B75
A75
GND
GND
B76
A76
PEG_RXP[14]
GND
B77
A77
PEG_RXN[14]
PEG_TXP[15]
B78
A78
GND
PEG_TXN[15]
B79
A79
GND
GND
B80
A80
PEG_RXP[15]
CLKREQ
B81
A81
PEG_RXN[15]
NC
B82
A82
GND
Slot Connectors
Page 63
KTQM67 Users Guide
KTD-N0819-E Page 63
7.1.2 miniPCI-Express mPCIe0 (J34)
The miniPCI Express port mPCIe0 is located on the back s ide.
Beside miniPCIe cards the mPCIe0 also supports mSATA SSD cards.
Note 1: 10K ohm pull-up to 3V3.
Note 2: 2K2 ohm pull-up to 3V3 Dual.
Note 3: 100K ohm pull-up to 1V8 (S0 mode)
Note
Type
Signal
PIN
Signal
Type
Note
WAKE#
1
2
+3V3
PWR
NC
NC
3
4
GND
PWR
NC
NC
5
6
+1.5V
PWR 1
CLKREQ#
7
8
NC
NC
PWR
GND
9
10
NC
NC PCIE_mini CLK#
11
12
NC
NC PCIE_mini CLK
13
14
NC
NC
PWR
GND
15
16
NC
NC
NC
NC
17
18
GND
PWR
NC
NC
19
20
W_Disable#
2
PWR
GND
21
22
RST#
PCIE_RXN
23
24
+3V3 Dual
PWR
PCIE_RXP
25
26
GND
PWR
PWR
GND
27
28
+1.5V
PWR
PWR
GND
29
30
SMB_CLK
PCIE_TXN
31
32
SMB_DATA
PCIE_TXP
33
34
GND
PWR
PWR
GND
35
36
NC
NC
PWR
GND
37
38
NC
NC
PWR
+3V3 Dual
39
40
GND
PWR
PWR
+3V3 Dual
41
42
NC
NC
PWR
GND
43
44
NC
NC CLK_MPCIE
45
46
NC
NC DATA_MPCIE
47
48
+1.5V
PWR RST_MPCIE#
49
50
GND
PWR 3 SEL_MSATA
51
52
+3V3 Dual
PWR
Slot Connectors
Page 64
KTQM67 Users Guide
KTD-N0819-E Page 64
7.1.3 miniPCI-Express mPCIe1 (J35)
The miniPCI Express port mPCIe1 is located on the backside. (mSATA not supported)
Note 1: 10K ohm pull-up to 3V3 Dual.
Note 2: 2K2 ohm pull-up to 3V3 Dual.
Note
Type
Signal
PIN
Signal
Type
Note
WAKE#
1
2
+3V3
PWR
NC
NC
3
4
GND
PWR
NC
NC
5
6
+1.5V
PWR 1
CLKREQ#
7
8
NC
NC
PWR
GND
9
10
NC
NC PCIE_mini CLK#
11
12
NC
NC PCIE_mini CLK
13
14
NC
NC
PWR
GND
15
16
NC
NC
NC
NC
17
18
GND
PWR
NC
NC
19
20
W_Disable#
2
PWR
GND
21
22
RST#
PCIE_RXN
23
24
+3V3 Dual
PWR
PCIE_RXP
25
26
GND
PWR
PWR
GND
27
28
+1.5V
PWR
PWR
GND
29
30
SMB_CLK
PCIE_TXN
31
32
SMB_DATA
PCIE_TXP
33
34
GND
PWR
PWR
GND
35
36
NC
NC
NC
NC
37
38
NC
NC
NC
NC
39
40
GND
PWR
NC
NC
41
42
NC
NC
NC
NC
43
44
NC
NC
NC
NC
45
46
NC
NC
NC
NC
47
48
+1.5V
PWR
NC
NC
49
50
GND
PWR
NC
NC
51
52
+3V3
PWR
Slot Connectors
Page 65
KTQM67 Users Guide
KTD-N0819-E Page 65
7.1.4 PCI-Express x1 Connector (PCIe x1) (J36)
The KTQM67/mITX supports one PCIe x1.
Note 1: 10K ohm pull-up to 3V3 Dual.
Note 2: 4K7 ohm pull-down to GND.
Note
Type
Signal
PIN
Signal
Type
Note
PWR
+12V
B1
A1
GND
PWR
PWR
+12V
B2
A2
+12V
PWR
PWR
+12V
B3
A3
+12V
PWR
PWR
GND
B4
A4
GND
PWR
SMB_CLK
B5
A5
CL_CLK
SMB_DATA
B6
A6
CL_RST
PWR
GND
B7
A7
SMB_ALERT
PWR
+3V3
B8
A8
CL_DATA
2 JTAG_TEST#
B9
A9
+3V3
PWR
PWR
3V3 Dual
B10
A10
+3V3
PWR
WAKE#
B11
A11
RST#
NC
NC
B12
A12
GND
PWR
PWR
GND
B13
A13
PCIE_CLK_P
PCIE_TXP
B14
A14
PCIE_CLK_N
PCIE_TXN
B15
A15
GND
PWR
PWR
GND
B16
A16
PCIE_RXP
1
CLK_REQ
B17
A17
PCIE_RXN
PWR
GND
B18
A18
GND
PWR
Connector Definitions
Slot Connectors
Page 66
KTQM67 Users Guide
KTD-N0819-E Page 66
7.2 PCI Slot Connectors
KTQM67/Flex support 3 PCI slots PCI0 (J45), PCI1 (J48), PCI2 (J49) and KTQM67/AT X P supports 6
PCI slots PCI0 (J45), PCI1 (J48), PCI2 (J49) PCI3 (J54), PCI4 (J53), PCI5 (J55).
KTQm67/mITX doesn’t support PCI slots, but optionally PCIex1 to PCI Dual Flexible Riser can be used.
Note Type Signal
Terminal
S C
Signal Type Note
PWR
-12V
F01
E01
TRST#
O
O TCK
F02
E02
+12V
PWR
PWR
GND
F03
E03
TMS O
NC I TDO
F04
E04
TDI O PWR
+5V
F05
E05
+5V
PWR
PWR
+5V
F06
E06
INTA# I I
INTB#
F07
E07
INTC#
I
I INTD#
F08
E08
+5V
PWR NC - -
F09
E09 - -
NC
NC - -
F10
E10
+5V (I/O)
PWR NC - -
F11
E11 - -
NC
PWR
GND
F12
E12
GND
PWR
PWR
GND
F13
E13
GND
PWR
NC - -
F14
E14
GNT3#
OT
PWR
GND
F15
E15
RST# O
O CLKB
F16
E16
+5V (I/O)
PWR
PWR
GND
F17
E17
GNT0#
OT
I REQ0#
F18
E18
GND
PWR
PWR
+5V (I/O)
F19
E19
PME# I
IOT
AD31
F20
E20
AD30
IOT
IOT
AD29
F21
E21
+3.3V
PWR
PWR
GND
F22
E22
AD28
IOT
IOT
AD27
F23
E23
AD26
IOT
IOT
AD25
F24
E24
GND
PWR
PWR
+3.3V
F25
E25
AD24
IOT
IOT
C/BE3#
F26
E26
GNT1#
OT
IOT
AD23
F27
E27
+3.3V
PWR
PWR
GND
F28
E28
AD22
IOT
IOT
AD21
F29
E29
AD20
IOT
IOT
AD19
F30
E30
GND
PWR
PWR
+3.3V
F31
E31
AD18
IOT
IOT
AD17
F32
E32
AD16
IOT
IOT
C/BE2#
F33
E33
+3.3V
PWR
PWR
GND
F34
E34
FRAME#
IOT
IOT
IRDY#
F35
E35
GND
PWR
PWR
+3.3V
F36
E36
TRDY#
IOT
IOT
DEVSEL#
F37
E37
GND
PWR
PWR
GND
F38
E38
STOP#
IOT
IOT
LOCK#
F39
E39
+3.3V
PWR
IOT
PERR#
F40
E40
SDONE
IO
PWR
+3.3V
F41
E41
SB0#
IO
IOC
SERR#
F42
E42
GND
PWR
PWR
+3.3V
F43
E43
PAR
IOT
IOT
C/BE1#
F44
E44
AD15
IOT
IOT
AD14
F45
E45
+3.3V
PWR
PWR
GND
F46
E46
AD13
IOT
IOT
AD12
F47
E47
AD11
IOT
IOT
AD10
F48
E48
GND
PWR
PWR
GND
F49
E49
AD09
IOT
SOLDER SIDE
COMPONENT SIDE
IOT
AD08
F52
E52
C/BE0#
IOT
IOT
AD07
F53
E53
+3.3V
PWR
PWR
+3.3V
F54
E54
AD06
IOT
IOT
AD05
F55
E55
AD04
IOT
IOT
AD03
F56
F56
GND
PWR
PWR
GND
F57
E57
AD02
IOT
IOT
AD01
F58
E58
AD00
IOT
PWR
+5V (I/O)
F59
E59
+5V (I/O)
PWR
IOT
ACK64#
F60
E60
REQ64#
IOT
PWR
+5V
F61
E61
+5V
PWR
PWR
+5V
F62
E62
+5V
PWR
Slot Connectors
Page 67
KTQM67 Users Guide
KTD-N0819-E Page 67
7.2.1 Signal Description – PCI Slot Connector
SYSTEM PINS
CLK
Clock provides timing for all transactions on PCI and is an input to every PCI device. All other PCI
signals, except RST#, INTA#, INTB#, INTC#, and INTD#, are sampled on the risingedge of CLK and
all other timing parameters are defined with respect to this edge. PCI operates at 33MHz.
PME#
Power Management Event interrupt signal. Wake up signal.
RST#
Reset is used to bring PCI-specific registers, sequencers, and signals to a consistent state. What
effect RST# has on a device beyond the PCI sequencer is
beyond the scope of this specification,
except for reset states of required PCI configuration registers. Anytime RST# is asserted, all PCI
output signals must be driven to their benign state. In general, this means they must be
asynchronously tri-stated. SERR# (open drain) is floated. REQ# and GNT# must both be tri-stated
(they cannot be driven low or high during reset). To prevent AD, C/BE#, and PAR signals from
floating during reset, the central resource may drive these lines during reset (bus parking) but only to
a logic low level–they may not be driven high.
RST# may be asynchronous to CLK when asserted or deasserted. Although asynchronous,
deassertion is guaranteed to be a clean, bounce-
free edge. Except for configuration accesses, only
devices that are required to boot the system will respond after reset.
ADDRESS AND DATA
AD[31::00]
Address and Data are multiplexed on the same PCI pins. A bus transaction consists of an address
phase followed by one or more data phases. PCI supports both read and write bursts.
The address phase is the clock cycle in which FRAME# is asserted. During the address phase
AD[31::00] contain a physical address (32 bits). For I/O, this is a byte address; for configuration and
memory, it is a DWORD address. During data phases AD
[07::00] contain the least significant byte
(lsb) and AD[31::24] contain the most significant byte (msb). Write data is stable and valid when
IRDY# is asserted and read data is stable and valid when TRDY# is asserted. Data is transferred
during those clocks where both IRDY# and TRDY# are asserted.
C/BE[3::0]#
Bus Command and Byte Enables are multiplexed on the same PCI pins. During the address phase of
a transaction, C/BE[3::0]# define the bus command. During the data phase C/BE[3::0]# are used as
Byte Ena
bles. The Byte Enables are valid for the entire data phase and determine which byte lanes
carry meaningful data. C/BE[0]# applies to byte 0 (lsb) and C/BE[3]# applies to byte 3 (msb).
PAR
Parity is even parity across AD[31::00] and C/BE[3::0]#. Parity generation is required by all PCI
agents. PAR is stable and valid one clock after the address phase. For data phases, PAR is stable
and valid one clock after either IRDY# is asserted on a write transaction or TRDY# is asserted on a
read transaction. Once PAR is valid, it remains valid until one clock after the completion of the current
data phase. (PAR has the same timing as AD[31::00], but it is delayed by one clock.) The master
drives PAR for address and write data phases; the target drives PAR for read data phases.
INTERFACE CONTROL PINS
FRAME#
Cycle Frame is driven by the current master to indicate the beginning and duration of an access.
FRAME# is asserted to indicate a bus transaction is beginning. While FRAME# is asserted, data
transfers continue. When FRAME# is deasserted, the transaction is
in the final data phase or has
completed.
IRDY#
Initiator Ready indicates the initiating agent’s (bus master’s) ability to complete the current data
phase of the transaction. IRDY# is used in conjunction with TRDY#. A data phase is completed on
any clock
both IRDY# and TRDY# are sampled asserted. During a write, IRDY# indicates that valid
data is present on AD[31::00]. During a read, it indicates the master is prepared to accept data. Wait
cycles are inserted until both IRDY# and TRDY# are asserted together.
TRDY#
Target Ready indicates the target agent’s (selected device’s) ability to complete the current data
phase of the transaction. TRDY# is used in conjunction with IRDY#. A data phase is completed on
any clock both TRDY# and IRDY# are sampled asserted. During a read, TRDY# indicates that valid
data is present on AD[31::00]. During a write, it indicates the target is prepared to accept data. Wait
cycles are inserted until both IRDY# and TRDY# are asserted together.
STOP#
Stop indicates the current target is requesting the master to stop the curre nt tra ns act ion.
LOCK#
Lock indicates an atomic operation that may require multiple transactions to complete. When LOCK#
is asserted, non-
exclusive transactions may proceed to an address that is not currently locked. A
gr
ant to start a transaction on PCI does not guarantee control of LOCK#. Control of LOCK# is
obtained under its own protocol in conjunction with GNT#. It is possible for different agents to use
PCI while a single master retains ownership of LOCK#. If a device implements Executable Memory, it
should also implement LOCK# and guarantee complete access exclusion in that memory. A target of
an access that supports LOCK# must provide exclusion to a minimum of 16 bytes (aligned). Host
bridges that have system memory
behind them should implement LOCK# as a target from the PCI
bus point of view and optionally as a master.
IDSEL
Initialization Device Select is used as a chip select during configuration read and write transactions.
DEVSEL#
Device Select, when actively driven, indicates the driving device has decoded its address as the
target of the current access. As an input, DEVSEL# indicates whether any device on the bus has
been selected.
Slot Connectors
Page 68
KTQM67 Users Guide
KTD-N0819-E Page 68
ARBITRATION PINS (BUS MASTERS ONLY)
REQ#
Request indicates to the arbiter that this agent desires use of the bus. This is a point to point signal.
Every master has its own REQ# which must be tri-stated while RST# is asserted.
GNT#
Grant indicates to the agent that access to the bus has been granted. This is a point to point signal.
Every master has its own GNT# which must be ignored while RST# is asserted.
While RST# is asserted, the arbiter must ignore all REQ# lines since they are tri-stated and do not
contain a valid request. The arbiter can only p
erform arbitration after RST# is deasserted. A master
must ignore its GNT# while RST# is asserted. REQ# and GNT# are tri-state signals due to power
sequencing requirements when 3.3V or 5.0V only add-in boards are used with add-in boards that use
a universal I/O buffer.
ERROR REPORTING PINS.
The error reporting pins are required by all devices and maybe asserted when enabled
PERR#
Parity Error is only for the reporting of data parity errors during all PCI transactions except a Special
Cycle. The PERR# pin is sustained tri-
state and must be driven active by the agent receiving data
two clocks following the data when a data parity error is detected. The minimum duration of PERR# is
one clock for each data phase that a data parity error is detected. (If sequential data phases each
have a data parity error, the PERR# signal will be asserted for more than a single clock.) PERR#
must be driven high for one clock before being tri-stated as with all sustained tri-state signals. There
are no special conditions when a data parity error may be lost or when reporting of an error may be
delayed. An agent cannot report a PERR# until it has claimed the access by asserting DEVSEL# (for
a target) and completed a data phase or is the master of the current transaction.
SERR#
System Error is for reporting address parity errors, data parity errors on the Special Cycle command,
or any other system error where the result will be catastrophic. If an agent does not want a non-
maskable interrupt (NMI) to be generated, a different reporting mechanism is required. SERR# is
pure open drain and is actively driven for a single PCI clock by the agent reporting the error. The
assertion of SERR# is synchronous to the clock and meets the setup and hold times of all bused
signals. However, the restoring of SERR# to the deasserted state is accomplished by a weak pullup
(same value as used for s/t/s) which is provided by the system designer and not by the 68signaling
agent or central resource. This pull-
up may take two to three clock periods to fully restore SERR#.
The agent that reports SERR#s to the operating system does so anytime SERR# is sampled
asserted.
INTERRUPT PINS (OPTIONAL).
Interrupts on PCI are optional and defined as “level sensitive,” asserted low (negative true), using open drain output
drivers. The assertion and deassertion of INTx# is asynchronous to CLK. A device asserts its INTx# line when
requesting atte
ntion from its device driver. Once the INTx# signal is asserted, it remains asserted until the device
driver clears the pending request. When the request is cleared, the device deasserts its INTx# signal. PCI defines
one interrupt line for a single function device and up to four interrupt lines for a multi-function device or connector.
For a single function device, only INTA# may be used while the other three interrupt lines have no meaning.
INTA#
Interrupt A is used to request an interrupt.
INTB#
Interrupt B is used to request an interrupt and only has meaning on a multi-function device.
INTC#
Interrupt C is used to request an interrupt and only has meaning on a multi-function device.
INTD#
Interrupt D is used to request an interrupt and only has meaning on a multi-function device.
7.2.2 KTQM67 PCI IRQ & INT routing
Board type
Slot
REQ
GNT
IDSEL
INTA
INTB
INTC
INTD
KTQM67/Flex
0
REQ0
GNT0
17
INTA
INTB
INTC
INTD
1
REQ1
GNT1
18
INTB
INTC
INTD
INTA
2
REQ2
GNT2
19
INTC
INTD
INTA
INTB
KTQM67/ATXP
0
REQ0
GNT0
17
INTA
INTB
INTC
INTD
1 REQ1
GNT1
18
INTB
INTC
INTD
INTA
2 REQ2
GNT2
19
INTC
INTD
INTA
INTB
3 REQ3
GNT3
20
INTD
INTA
INTB
INTC
4 REQ4
GNT4
21
INTA
INTB
INTC
INTD
5 REQ5
GNT5
22
INTB
INTC
INTD
INTA
Slot Connectors
Page 69
KTQM67 Users Guide
KTD-N0819-E Page 69
8 On-board - & mating connector types
The Mating connectors / Cables are connect ors or cable kits wh ich are fitting the O n-board connector .
The highlighted cable kits are included in the “KTQM67 Cable & Driver Kit” PN 826598, in different
quantities depending on type of connector. For example there is 4 x 821017 COM cables and 6 x
821035 SATA cables.
Connector
On-board Connectors
Mating Connectors / Cables
Manufacturer
Type no.
Manufacturer
Type no.
FAN_CPU
Foxconn
HF2704E-M1
AMP
1375820-4 (4-pole)
FAN_SYS
AMP
1470947-1
AMP
1375820-3 (3-pole)
KBDMSE
Molex
22-23-2061
Molex
22-01-2065
Kontron
KT 1046-3381
CDROM
Foxconn
HF1104E
Molex
50-57-9404
Molex
70543-0038
SATA
Hon Hai
LD1807V-S52T
Molex
67489-8005
Kontron
KT 821035 (cable kit)
ATXPWR
Molex
44206-0002
Molex
5557-24R
ATX+12V-4pin
Lotes
ABA-POW-003-K02
Molex
39-01-2045
LPT Tyco 3-1734592-2 Kontron
KT 1045-9287 (FFC)
KT 1045-9290 (FFC)
KT 1046-3057 (module)
EDP
Tyco
5-2069716-3
Tyco
2023344-3
LVDS
Don Connex
C44-40BSB1-G
Don Connex
A32-40-C-G-B-1
Kontron
KT 910000005
Kontron
KT 821515 (cable kit)
Kontron
KT 821155 (cable kit)
COM1,2, 3, 4
Wuerth
61201020621
Molex
90635-1103
Kontron
KT 821016 (cable kit)
Kontron
KT 821017 (cable kit)
USB68/9,
10/11, 12/13
Pinrex 512-90-10GBB2 Kontron
KT 821401 (cable kit)
USB6/7 (*)
(FRONTPNL)
-
Kontron
KT 821401 (cable kit)
IEEE1394_0/1
Foxconn
HS1105F-RNP9
Kontron
KT 821040 (cable kit)
AUDIO_HEAD
Molex
87831-2620
Molex
51110-2651
Kontron
KT 821043 (cable kit)
FRONTPNL
Pinrex
512-90-24GBB3
Molex
90635-1243
Kontron
KT 821042 (cable kit)
FEATURE
Foxconn
HS5422F
Don Connex
A05c-44-B-G-A-1-G
* USB6/USB7 is located in FRONTPNL connector. Depending on application KT 821401 can be used.
Note: Only one connector will be m entioned for each type of on-board c onnector even though severa l
types with same fit, form and function are approved and could be used as alternative. Please also notice
that standard connectors like DVI, DP, PCIe, miniPCIe, PCI, Audio Jack, Ethernet and USB is not
included in the list.
Onboard/mating connector
Page 70
KTQM67 Users Guide
KTD-N0819-E Page 70
9 System Resources
9.1 Memory Map
TBD
Address (hex)
Size
Description
System Resources
Page 71
KTQM67 Users Guide
KTD-N0819-E Page 71
9.2 PCI Devices
TBD
Bus
#
Device
#
Function
#
Vendor
ID
Device
ID
Chip
Device Function
System Resources
Page 72
KTQM67 Users Guide
KTD-N0819-E Page 72
9.3 Interrupt Usage
TBD
IRQ
System timer
Keyboard
Communications port COM1 Selection in BIOS
Communications port COM2 Selection in BIOS
Communication port COM3/COM4 Selection in BIOS
System CMOS/real-time w at ch
Microsoft ACPI-compatible system
Numerical Data Processor
Primary IDE-channel
Secondary IDE-channel
Intel(R) 82574L Gigabit Network Connection
Intel(R) Management Engine Inter face
Intel(R) GM45 Express Chipset
Intel(R) ICH9 PCI Express Root Port (5x)
Intel(R) ICH9 USB Enhanced Host Controller (x 2)
Intel(R) ICH9 USB Universal Host Controller (x 6)
Intel(R) ICH9 Serial ATA Storage Controller 2
Intel(R) 82567LM Gigabit Network Connection (x2) Microsoft UAA-bus driver for High Definition Audio
PS2 Mouse
PCI to PCI Express bridge
OHCI Compliant IEEE 194 Controller
Notes
NMI IRQ0 IRQ1 IRQ2 IRQ3 IRQ4 IRQ5 IRQ6 IRQ7 IRQ8 IRQ9 IRQ10
IRQ11
IRQ12
IRQ13
IRQ14
IRQ15
IRQ16
IRQ17
IRQ18
IRQ19
IRQ20
IRQ21
IRQ22
IRQ23
IRQ24
IRQ25
IRQ26
System Resources
Page 73
KTQM67 Users Guide
KTD-N0819-E Page 73
9.4 IO Map
TBD
Address range (hex)
Size
Description
System Resources
Page 74
KTQM67 Users Guide
KTD-N0819-E Page 74
System Resources
Page 75
KTQM67 Users Guide
KTD-N0819-E Page 75
10 BIOS
This section details specific BIOS features for the KTQM67 family of boards
TBD
BIOS
Page 76
KTQM67 Users Guide
KTD-N0819-E Page 76
11 AMI BIOS Beep Codes
Boot Block Beep Codes:
Number of
Beeps
Description
1
Insert diskette in floppy drive A:
2
‘AMIBOOT.ROM’ file not found in root directory of diskette in A:
3
Base Memory error
4
Flash Programming successful
5
Floppy read error
6
Keyboard controller BAT command failed
7
No Flash EPROM detected
8
Floppy controller failure
9
Boot Block BIOS checksum error
10
Flash Erase error
11
Flash Program error
12
‘AMIBOOT.ROM’ file size error
13
BIOS ROM image mismatch (file layout does not match image present in flash device)
POST BIOS Beep Codes:
Number of
Beeps
Description
1
Memory refresh timer error.
2
Parity error in base memory (first 64KB block)
3
Base memory read/write test error
4
Motherboard timer not operational
5
Processor error
6
8042 Gate A20 test error (cannot switch to protected mode)
7
General exception error (processor exception interrupt error)
8
Display memory error (system video adapter)
9
AMIBIOS ROM checksum error
10
CMOS shutdown register read/write error
11
Cache memory test failed
Troubleshooting POST BIOS Beep Codes:
Number of
Beeps
Troubleshooting Action
1, 2 or 3
Reset the memory, or replace with known good modules.
4-7, 9-11
Fatal error indicating a serious problem with the system. Consult your system
manufacturer. Before declaring the motherboard beyond “all hope”, eliminate the
possibility of interference due to a malfunctioning add-in card. Remove all expansion
cards, except the video adapter.
• If beep codes are generated when all other expansion cards are absent, consult your
system manufacturer’s technical support.
• If beep codes are not generated when all other expansion cards are absent, one of the
add-in cards is causing the malfunction. Insert the cards back into the system one at a
time until the problem happens again. This will reveal the malfunctioning card.
8
If the system video adapter is an add-in card, replace or reset the video adapter. If the
video adapter is an integrated part of the system board, the board may be faulty.
AMI BIOS Beep Codes
Page 77
KTQM67 Users Guide
KTD-N0819-E Page 77
12 O S Setup
Use the Setup.exe files for all relevant drivers. The drivers can be found on KTQM67 Driver CD or they
can be downloaded from the homepage http://www.kontron.com/
OS Setup
Loading...