Page 1
ARM11-Embedded Evaluation Board
KZM-ARM11-01
Operation Manual
Kyoto Microcomputer Co., Ltd.
Page 2
2 ---- Introduction
Introduction
KMC’s KZM-ARM11-01 is a new evaluation board that has a 532 MHz ARM1136 core (i.MX31 from freescale™
semiconductor) embedded and comes with Linux 2.6. With the supplied Linux 2.6 source/binary codes and ARM11 tool chain
this evaluation board can be used immediately after purchase for many purposes ranging from development of ARM11-based
Linux applications to debugging of user product boards.
KZM-ARM11-01 is also useful for prototyping/evaluating systems based on ARM11 or Linux, development of diverse
middleware operating with Linux/ARM11, and evaluation of operation systems such as Linux, Windows CE, and ITRON.
Combined use with Kyoto Microcomputer Co.,Ltd.(KMC)’s “PARTNER-Jet” JTAG debugger and “PARTNER/Wｉｎ”
debugger, which is a Windows-compatible source-level debugger, as well as the ”exeGCC” compiler allows users to
efficiently and effectively perform their development/evaluation.
Important Notice
Thank you for purchasing this KMC product. Customers are
advised to complete user registration so th at we can smoothly
perform after-sales services and provide guidance information about
future upgrade and/or new models We will also use the registered
data as a benchmark for our future development and sales efforts.
With the user registration form filled in and returned to us each
customer will be registered in our user list and authorized to receive
support services and hardware certificates.
*This manual is protected under the Copyright Law of Japan. Reproduction, reprint or modification of this manual is
prohibited without prior written permission from KMC.
*All the rights including copyright, sales and other proprietary rights of this product belong to KMC.
*Contents and specifications of this product may be subject to change without notice.
*This product has been manufactured under the best efforts of KMC. However, KMC. shall not be liable for any
damages arising from the use of this product.
*Generally, the name of each program, system, and device referred in this manual is the registered
trademark of each manufacturer.
Page 3
Contents ---- 3
Contents
1 Features 5
2 Appearance 6
3 Installed Devices 7
4 Block Diagram 8
5 Memopry Map 9
6 Various Settings 11
6.1 External Power Supply DC-JACK：J4 ---------------------------------------------------------------------------------------------------------- 11
6.2 Mode Selector：RSW1 ------------------------------------------------------------------------------------------------------------------------------- 12
6.3 SJC_MOD Setting：JP11---------------------------------------------------------------------------------------------------------------------------- 13
6.4 Clock S ource Setting：JP10 ----------------------------------------------------------------------------------------------------------------------- 13
6.5 BOOT MODE Setting：DSW 1,JP11 ------------------------------------------------------------------------------------------------------------- 14
6.6 JTAG /SRST and i.MX31reset signal settings： SW 2,3,JP12 ------------------------------------------------------------------------- 15
6.7 NF_DET Setting：JP1 -------------------------------------------------------------------------------------------------------------------------------- 15
6.8 USB OTG PW R Sett ing： JP16 ----------------------------------------------------------------------------------------------------------------- 15
6.9 LCD ENB Setting： JP4 ---------------------------------------------------------------------------------------------------------------------------- 15
6.10 Interrupt------------------------------------------------------------------------------------------------------------------------------------------------- 16
6.11 Memory ------------------------------------------------------------------------------------------------------------------------------------------------- 16
6.11.1 NOR FLASH MEMORY ----------------------------------------------------------------------------------------------------------------- 17
6.11.2 Mobile DDR MEMORY------------------------------------------------------------------------------------------------------------------- 18
7 Description of Functions 20
7.1 External Expansion Connector：CN7 (not preinstalled) ----------------------------------------------------------------------------------- 20
7.2 PCMCIA-------------------------------------------------------------------------------------------------------------------------------------------------- 20
7.3 UART1---------------------------------------------------------------------------------------------------------------------------------------------------- 21
7.4 UART2---------------------------------------------------------------------------------------------------------------------------------------------------- 21
7.5 IrDA ------------------------------------------------------------------------------------------------------------------------------------------------------- 21
7.6 USBOTG------------------------------------------------------------------------------------------------------------------------------------------------- 22
7.7 LAN-------------------------------------------------------------------------------------------------------------------------------------------------------- 22
7.8 SD/MMC ------------------------------------------------------------------------------------------------------------------------------------------------- 22
7.9 KEYPAD ------------------------------------------------------------------------------------------------------------------------------------------------- 23
7.10 AC97 ---------------------------------------------------------------------------------------------------------------------------------------------------- 23
7.11 ATA ------------------------------------------------------------------------------------------------------------------------------------------------------ 24
7.12 LCD (option) ----------------------------------------------------------------------------------------------------------------------------------------25
7.13 TOUCH PANEL (option) ------------------------------------------------------------------------------------------------------------------------ 25
7.14 CAMERA (option) ---------------------------------------------------------------------------------------------------------------------------------- 25
8 BOARD Controller 26
8.1 BOARD CONTROL ---------------------------------------------------------------------------------------------------------------------------------- 26
Page 4
4 ---- Contents
8.1.1 control ------------------------------------------------------------------------------------------------------------------------------------------- 26
8.2 NAND FLASH c ontrol ------------------------------------------------------------------------------------------------------------------------------31
8.3 F_UART-------------------------------------------------------------------------------------------------------------------------------------------------- 35
9 Connector Pins Assignment 37
9.1 JTAG Connector -------------------------------------------------------------------------------------------------------------------------------------- 37
9.1.1 ARM ETM Type：CN13 --------------------------------------------------------------------------------------------------------------------- 37
9.1.2 ARM 20-Pin Type (without tracing)：CN16---------------------------------------------------------------------------------------------- 38
9.2 External Expansion Connector：CN7 (not installed) ---------------------------------------------------------------------------------------39
9.3 PCMCIA-------------------------------------------------------------------------------------------------------------------------------------------------- 41
9.4 USBOTG------------------------------------------------------------------------------------------------------------------------------------------------- 42
9.5 UART1---------------------------------------------------------------------------------------------------------------------------------------------------- 43
9.6 UART2---------------------------------------------------------------------------------------------------------------------------------------------------- 44
9.7 LAN RJ 45----------------------------------------------------------------------------------------------------------------------------------------------- 45
9.8 SD/MMC ------------------------------------------------------------------------------------------------------------------------------------------------- 46
9.9 KEYPAD ------------------------------------------------------------------------------------------------------------------------------------------------- 47
9.10 ATA ------------------------------------------------------------------------------------------------------------------------------------------------------ 48
9.11 LCD (option) ----------------------------------------------------------------------------------------------------------------------------------------50
9.12 TOUCH PANEL (option) ------------------------------------------------------------------------------------------------------------------------ 51
9.13 CAMERA (option) ---------------------------------------------------------------------------------------------------------------------------------- 52
10 About the Sample Software 53
Appendices
1, Circuit Diagram
2, Dimensions
Page 5
Features ---- 5
1 Features
・ High-speed RISC i.MX31: incorporates Freescale™ Semiconductor MCIMX31VKN5 (ARM1136JF-S core chip) .
The core of i.MX31 is ARM1136JF-S (532 MHz) .
Built-in L2 cache in addition to L1 cache.
Vector Floating Point Unit (VFP) installed.
・ Built-in large-capacity Mobile-DDR RAM： Equivalent to HYB18M512160×2 (128 Mbytes)
・ Provided with JTAG port for connecting JTAG cable. Provided also with an ETM connector.
・ Possible to accommodate emulation memory (EMJ) .
＊ Has a dedicated connector installed for emulation memory (EMJ). This eliminates the need to connect with the
conventional ROM socket (DIP42PIN) and makes it possible to reduce the connection area and simplify the
connection method through this dedicated connector.
・ Easy connection with PARTNER-Jet.
The i.MX31 manual can be downloaded via the following links:
Freescale™ Semiconductor top page:
http://www.freescale.com
Manual (2006/9)
http://www.freescale.com/webapp/sps/site/prod_summary.jsp?code=i.MX31&nodeId=02XPgQ82172973ZrDR
Page 6
6 ---- Appearance
2 Appearance
9
5
7
12
14
17
8
411
6
6
9
13
25
23
22
26
18
20
15
27
28
16
24
10
19
10
Fig1 Appearance (top)
3
21
Fig.2 Appearance (back side)
(1) i.MX31 CPU
Built-in i.MX31 peripherals
(2) ATA
(3) PCMCIA
(4) SD/MMC
(5) UART1
(6) UART2
(7) IrDA FIR
(8) USB2.0 On-The-Go(OTG)
(9) KEYPAD
(10) LCD
(11) CAMERA
(12) AC97Audio
External devices connected to
memory bus
(13) DDR RAM
(14) NOR Flash ROM
(15) STD ROM
(16) Expansion connector
(17) LAN
(18) FPGA
(19) Rotary switch for
switching FPGA mode
External devices connected to
FPGA
(20) NAND
(21) NAND expansion
connector
(22) LED
(23) 7SEGLED
(24) 4-PIN DIP SW
Interface for debugging
(25) ARM JTAG
(26) ARM ETM
Other
(27) POWER switch
(28) DC-JACK
Page 7
Installed Devices ---- 7
3 Installed Devices
CPU i.MX31 ： MCIMX31VKN5 (457PIN MPBGA)
Memory FLASH MEMORY ： S29GL512N-equivalent (64 Mbytes) 16-bit
Mobile-DDR-SDRAM ： HYB18M512160-equivalent×2 (128 Mbytes) 32-bit
NAND FLASH MEMORY ： 29F2G08AAB-equivalent (256 Mbytes) 8-bit
Standard ROM connector ： 8931E-050-178S (manufacturer: KEL)
LAN LAN controller ： LAN9118
USB USBOTG controller ： USB3300
IrDA IrDA transceiver ： TFBS6711
AUDIO AC97 codec ： AD1981BL
UART RS232C driver ： MAX3237ECAI+
RS232C driver ： MAX3245ECAI+
PCMCIA PC-CARD slot ： IC14A-PL-SF-EJR (manufacturer: HIROSE) , for single slot
SD/MMC SD/MMC slot ： DM1AA-SF-PEJ (manufacturer: HIROSE)
NAND CN Expansion NAND connector ： DF12D (3.0) -40DP-0.5V (manufacturer: HIROSE)
7SEG LED ：
External expansion connector ： Double line 100-PIN with a pitch of 1.27
JTAG ： 20-PIN connector, HIF3FC-20P (manufacturer: HIROSE)
ETM-compatible connector, 767054-1 (manufacturer: AMP)
KEYPAD ： 4X8
Touch panel controller ： AHL-71N (manufacturer: GUNZE)
Clock 532 MHz (XTAL 26 MHz)
Board size 310×185 mm
Power supply +9V (from external source via DC-JACK)
Optional Units
LCD LCD Panel ： FT035SB320240-B1 3.5inch QVGA
Touch Panel ： H3035A-NCOFA39 (manufacturer: hantouch)
Camera Color camera ： MTV-54K0DN
HDD Hard disk ： 2.5 inch, 80 G-equivalent
* Above listed components and modules may be subject without notice to replacement by other
compatible products.
Page 8
8 ---- Block Diagram
4 Block Diagram
Fig.3 Block Diagram
CPU
MC9328MX31
NAND 256MByte
29F2G08AAB
compatible
NAND CN
D-SUB9P Male
（DTE）
IrDA
TFBS6711-TR1
EXT
RS-232 DRIVER
MAX3245ECAI+
AC97 CODEC
AD1981BL
STEREO
MINI JACK
SSI4
KPP
UART2
SDHC1
ATA
USBOTG
SW
SW
SW
UART1
LCD
FT035SB320240-B1
RS-232 DRV
MAX3237ECAI+
CS0
PCMCIA
CS0
CS0or1
CSD0
IPU(DI)
IPU(CSI)
TOUCH PANEL
RJ45
CONTROL IC
AHL-71N(GUNZE)
USB
miniAB
USBOTG
USB3300
Keypad
4 * 8
Standerd ROM CN
max 64MByte (EMJ)
Standard ROM CN
Select CS1 when connected
NOR FLASH 64MByte
S29GL512N compatible
SDRAM 128MByte
Mobile-DDR-SDRAM
64MByte*2
HYB18M512160 compatible
LAN 10/100Mbps
LAN9118
FPGA
EP1C
CAMERA
ETM
767054-1
Debug/JTAG
2.54pitch 20P
PC-CARD
ATA-44P
2.5inch HDD
option
SD
H3035A-NCOFA39
CN5
CN7
CN7
CN27
CN28
J6
J1~3
CN13
CN16
D-SUB9P Male
（DTE）
CN6
Local MEMORY
Expansion connector
1.27picth 100PIN
CPU PERIPHERAL
Debug I/F
7SEG LED
LED *4
4-slider DIPSW
DC JACK
(9V)
5V
1.2V
1.8V
3.0V
CPU Core
QVCC, QVCC1,QVCC4
Memory
NVCC2, NVCC21, NVCC22
Peripherals
Regulator
Regulator
Regulator
Regulator
Switch（POWER）
Page 9
Memory Map ---- 9
5 Memory Map
The following tables show memory maps of this board. The addresses shown are physical addresses.
For details of the Internal Register Space refer to the CPU Manual.
Start Address End Address
Size
Name
0x0000 0 000 0x0000 3F FF 16 Kbytes Secure ROM
0x0000 4000 0x0040 3FFF 4 Mbytes Reserved
0x0040 4 000 0x0040 7F FF 16 Kbytes ROM
0x0040 8000 0x0FFF FFFF 252 Mbytes – 32 Kbytes Reserved
0x1000 0000 0x1FFF BFFF 256 Mbytes – 16 Kbytes Reserved for RAM aliasing
0x1FFF C000 0x1FFF FFFF 16 Kbytes RAM
0x2000 0000 0x2FFF FFFF 256 Mbytes Reserved
0x3000 0000 0x7FFF FFFF 1024 Mbytes Internal Register Space
0x8000 0000 0x87FF FFFF 128 Mbytes CSD0 DDR SDRAM
0x8800 0000 0x8FFF FFFF 128 Mbytes CSD0 DDR SDRAM aliasing
0x9000 0000 0x9FFF FFFF 256 Mbytes CSD1 Not installed.
0xA000 0000 0xA7FF FFFF 128 Mbytes CS0 16bit Flash 64 Mbytes *1
0xA800 0000 0xAFFF FFFF 128 Mbytes CS1 16bit Flash 64 Mbytes *1
0xB000 0000 0xB1FF FFFF 32 Mbytes CS2 Unavailable (shared pin with CSD0)
0xB200 0000 0xB3FF FFFF 32 Mbytes CS3 Unavailable (shared pin with CSD1)
0xB400 0000 0xB400 0FFF 4 Kbytes CS4 8-bit fr ee space
0xB400 1000 0xB400 100F 16 bytes Board Control
0xB400 1010 0xB400 101F 16 bytes 7SEG LED
0xB400 1020 0xB400 102F 16 bytes LED
0xB400 1030 0xB400 103F 16 bytes LCD
0xB400 1040 0xB400 104F 16 bytes Reserved
0xB400 1050 0xB400 105F 16 bytes FPGA UART
0xB400 1060 0xB40F FFFF 1 Mbyt e Reserved for FPGA
0xB410 0000 0xB5FF FFFF 31 Mbytes Free
0xB600 0000 0xB61F FFFF 128 Kbytes CS5 16bit LAN
0xB620 0000 0xB62F FFFF 128 Kbytes 16bit FPGA NAND Controller
0xB630 0000 0xB7FF FFFF 32 Mbytes - 256 Kbytes Free
0xB800 0000 0xB800 4FFF 20 Kbytes memory control registers
0xB800 5000 0xBFFF FFFF 128 Mbytes - 20 Kbytes Reserved
0xC000 0000 0xC3FF FFFF 64 Mbytes PCMCIA/CF
0xC400 0000 0xFFFF FFFF 960 Mbytes Reserved
Table 1 Memory Map
*1 Mapping when the standar d ROM is connected will be different from this.
Page 10
10 ---- Memory Map
For the memory size of the emulation memory (EMJ) refer to the Emulation Memory (EMJ) Manual.
The following memory map assumes that EMJ-64M (64 Mbytes) is connected. For a smaller-capacity memory, additional
spaces for aliasing will be secured in CS0.
With EMJ being connected
Start Address End Address Size Name
0xA000 0000 0xA3FF FFFF 64 Mbytes CS0 CS0 STD ROM 64 Mbytes
0xA400 0000 0xA7FF FFFF 64 Mbytes
CS0 (STD ROM aliasing) 64
Mbytes
0xA800 0000 0xABFF FFFF 64 Mbytes CS1 CS1 (Flash) 64 Mbytes
0xAC00 0000 0xAFFF FFFF 64 Mbytes CS1 (Flash aliasing) 64 Mbytes
Table2 Memory Map
Without EMJ being connected
Start Address End Address Size Name
0xA000 0000 0xA3FF FFFF 64 Mbytes CS0 CS0 (Flash) 64 Mbytes
0xA400 0000 0xA7FF FFFF 64 Mbytes CS0 (Flash aliasing) 64 Mbytes
0xA800 0000 0xABFF FFFF 64 Mbyt es CS1 CS0 (Flash aliasing) 64 Mbytes
0xAC00 0000 0xAFFF FFFF 64 Mbytes CS0 (Flash aliasing) 64 Mbytes
Table3 Memory Map
Page 11
Various Settings ---- 11
6 Various Settings
This section describes the jumper plug settings, etc. on this board. If you attempt to modify any of these settings, refer to the
Circuit Diagram in the Appendix of this document for an understanding of the jumper plug concerned.
External power supply DC-JACK J4
Mode selector rotary switch RSW1
SJC_MOD setting JP11
Clock source setting JP10
BOOT MODE DSW1,JP17
JTAG /SRST and i.MX31 reset signal settings JP12
USB OTG PWR JP16
NF_DET JP1
LCD_ENB JP4
6.1 External Power Supply DC-JACK：J4
Model No.：HEC3110-01-010, Manufacturer：HOSHIDEN
This DC-JACK connects to the external power source for the KZM series.
A +9V power will be supplied for this board via this DC-JACK.
When the power is supplied, LED1 turns on. When this happens, pressing the POWER switch (SW1) switches the
main power of the board ON.
If the POWER switch (SW1) is pressed while the board power is ON, it will turn OFF.
The power dissipation of this single board (without any optional device installed) is 1500 mA (maximum).
POWER スイッチ（SW1
）
LED2
LED1
DC-JACK
(J4)
Fig.4 CN3 External Expansion Connector 1
Power sw itch (SW1)
Page 12
12 ---- Various Settings
6.2 Mode Selector：RSW1
This is used to switch over the modules for use depending on the selector position. It enables switching between
ATA and CAMERA. Also for UART1, the output destination can be changed. A total of five selection modes are
provided and the current switch setting can be seen from the control register.
0
RSW1
Fig.5 RSW1 (factory setting)
RSW1 0 1 2 3 4 5-F
ATA × ○ × ○ × ×
RS232C-1 CN5 CN5 CN5 CN7 CN7 CN5
CAMERA × × ○ × ○ ×
Table4 RSW1
Page 13
Various Settings ---- 13
6.3 SJC_MOD Setting：JP11
This is the setting for enabling the JTAG debugger unit. The factory default is short-circuited, and under regular
operations does not need to be changed.
The JTAG connector is for connecting with the PARTNER-series JTAG cable. It may be either the ETM type
(CN13) or 20-pin type (CN16) shown below. Concurrent use of both is not permitted. Only ever use either of them.
JTAG signal voltage is 3V. This product will support tracing of maximum 8 bits for the ETM type. The ETM clock
setting should be 1/4 if more than 500 MHz is used as the core clock. While JTAGICE is being used, do not use WFI
(wait for interrupt).
/SRST signal is connected to JP12 and also to POR_B (H24) of i.MX31 and RESET_IN_B (J21). The factory default
is POR_B setting. This does not have to be changed for regular operations.
DE signal is connected to JP16 and further to DE_B (C18) of i.MX31. The factory setting of JP16 is open.
Short-circuit this JP if using DE_B.
JP11
Fig.6 JP11 (factory settings)
CN16
JP12SW2 SW3
CN13
Fig.7 CN13 and 16 JTAG Connectors
6.4 Clock Source Setting：JP10
This is used to set the source of feeding clock signals to each PLL of i.MX31. The factory default is X1 (26 MHz).
This does not have to be changed under normal operations.
JP10
Fig.8 JP10, 11 (factory setting)
Page 14
14 ---- Various Settings
6.5 BOOT MODE Setting：DSW1,JP11
Used to set the BOOT MODE. As the factory settings, 1,2,4=ON on DSW1 and JP17 are open-circuited.
Do not change these switch settings.
Fig 9 BOOT MODE SW, JP
value
i.MX31
SIGNAL
i.MX31
PIN
DSW 1-1 ON 0 (default) BT_MD0 F20
OFF 1
DSW 1-2 ON 0 (default) BT_MD1 C21
OFF 1
DSW 1-3 ON 0 BT_MD2 D24
OFF 1 (default)
DSW 1-4 ON 0 (default) BT_MD3 C22
OFF 1
JP17 SHORT 0 BT_MD4 D26
OPEN 1 (default)
Table 5 BOOT MODE SW, JP
Page 15
Various Settings ---- 15
6.6 JTAG /SRST and i.MX31 Reset Signal Settings： SW2,3,JP12
Used to define the destination when connecting the JTAG debugger connector, /SRST. The factory default
is for connecting to the i.MX31’s POR_B.
It is configured as follows:
SW2
SW3
JP12
Fig.10 CN13, 16 JTAG Connector
JP
SW3
BUFFER
/
SRST
FPGA
CPU
SW2
BUFFER
POR_B
RESET_IN_B
Fig.11 Resetting
6.7 NF_DET Setting：JP1
Used as the test terminal for the NAND controller. The factory default is open. This does not have to be
changed for regular operations.
6.8 USB OTG PWR Setting： JP16
Connects the power supply line of USB OTG. The factory default is short-circuited. This does not have
to be changed for regular operations.
6.9 LCD ENB Setting： JP4
Used to establish ENB pin settings for the LCD. The factory default is open-circuited. This does
not have to be changed for regular operations.
Page 16
16 ---- Various Settings
6.10 Interrupt
The interrupt function of this product is implemented in such a way that the ARM1136JF-S Vectored Interrupt Controller
(AVIC), which is one of the devices of i.MX31, is connected to the interrupt input port. This AVIC can accommodate a
maximum of 64 interrupt sources. Interrupts from each of i.MX31 peripherals are assigned to this AVIC, and the GPIO pins
are used for external interrupts. In this product each device is connected via GPIO to the IRQ or FIQ port of i.MX31 as shown
below. For details of each interrupt setting refer to the i.MX31 Manual.
The GPIO1_1 interrupt port for NAND, F_UART and SD is masked under the initial conditions. To make it function, set with
the registers in the FPGA Controller.
i.MX31
AVIC
GPIO1_0
GPIO1_1
GPIO1_2
GPIO1_4
GPIO1_5
nFIQ
nIRQ
Internal Peripherals
ARM1136JF-S
AVIC_IRQ
AVIC_FIQ
Fig.12 Interrupt
6.11 Memory
The External Memory Interface (EMI) of i.MX31 accommodates various types of memory devices. The dedicated built-in
controller controls these devices. Memory clock (HCLK) is generated in the CCM by dividing the clock frequency of PLL
MCU. HCLK is set to 106 MHz. Then, this clock rate will be used for setting memory access cycles. You may see “AHB
clock” in the i.MX31 Manual, however, the memory clock is always referred to as HCLK in this manual.
This product employs an NOR-type FLASH memory and Mobile DDR memory.
The setting method of each memory is described in the following.
These settings can be kept enabled while PARTNER-Jet is connected if an appropriate description has been made in
JETARM.CFG before starting the debugger. Make use of the sample settings prepared as the following file contained in the
PARTNER-Jet installation folder:
¥WJETARM¥Samples¥KZM-ARM11
Page 17
Various Settings ---- 17
6.11.1 NOR FLASH MEMORY
The NOR FLASH MEMORY used in this product is linked to the CS0 address space (see the memory map) of the Wireless
External Interface Module (WEIM). The setting values related to this WEIM are shown below. With these settings the type of
memory, bus size, and control signal timing are defined. This memory does not require any special timing to set the registers
but can be accessed at any time after all the registers have been properly set. Every bus size except for ＣＳ０ can be set with
the WEIM (CSCRxL DSZ). The bus size of CS0 will vary with the BOOT mode. For more information refer to the CPU
Manual.
CSCR0U address 0xB800_2000 data 00001800
13–8 WSC Wait State Control 24
CSCR0L address 0xB800_2004 data 45450D01
31–28 OEA OE Assert 4
27–24 OEN OE Negate 5
23–20 EBWA Enable Byte W rite Assert 4
19–16 EBW N Enable Byte W rite Negate 5
15–12 CSA Chip Select Assert 0
11 EBC Enable Byte Control 1
10–8 DSZ Data Port Size DSZ=101 16-bit port,
7–4 CSN Chip Select Negate 0
0 CSEN Chip Select Enable １
CSCR0A address 0xB800_2008 data 00450000
23–20 RWA Read/Write Assertion 4
19–16 RWN Read/Write Negation 5
Set an appropriate access cycle via Wait State Control.
The time for accessing the FLASH memory is 90 ns. This is set by specifying WSC = 24XHCLK (2
28 ns). For other control signals, the half-clock-cycle (HCLK/2) setting is employed for each memory
control. See the figure shown below. “A” in the following figure refers to the cycle start position of
internal operation cycles.
HCLK
WSC=16
CSA=0
valid address
A
DDRES
S
CS
RW
OE
EB
RWA=4
A
RWN=5
CSN=3
OEA=4
OEN=5
EBWA=4
EBWN=5
Fig 13 Access Timing to CS0
Page 18
18 ---- Various Settings
6.11.2 Mobile DDR MEMORY
The Mobile DDR MEMORY used for this product is linked to the CSD0 address space of the Enhanced SDRAM Controller
(ESDCTL). This product is designed to operate under HCLK of 106 MHz. The DDR memory serves as the SSTL interface
whilst the ESDCTL and Mobile DDR MEMORY are 1.8V LVCMOS. However, they will be initialized in the same manner as
the DDR memory. In addition, it is possible to set the PIN driving power for i.MX31 as follows: normal:2mA, high：6mA, and
max:8mA. This can be set with the SW_PAD_CTL Register in the IOMUXC module. Set this pin driving power before setting
up ESDCTL. From the nature of this board, pins should be set to active-high.
The SW_PAD_CTL Register affords for 32 bits for accessing, and three pins can be assigned for each address. This
assignment is made as 0：8 bits, 10:18 bits, and 20:28 bits and the 1st and 2nd bits among them are used for setting the driving
power.
Example active-high drive setting of SD29, SD30 and SD31 pins
address：0x43FA_C28c data: 0x1234_8D23
In this way set all the ESDCTL signals.
The ESDCTL-related settings include the controller-side modes, pre-charge, Auto-Refresh×８ cycles, and memory-side modes.
These settings can be initialized with the registers of ESDCTL0 0xB800_1000, ESDCFG0 0xB800_1004, and ESDMISC
0xB800_1010, respectively. Setting values are that follow:
ESDCFG0 address：0xB800_1004 data: 0x0079_D72A
tMRD 2 cycles、tWR 2 cycles、tRAS 6 cycles、tRRD 2 cycles、tCAS 3 cycles
tRP 3 cycles、tRCD 3 cycles、tRC 10 cycles、tWTR 2 c ycl es、tXP 4 cycles
Precharge
ESDCTL0 ad dress：0xB800_1000 data: 9210_0000
31 SDE:1 Controller Enable、30–28 SMODE:1 Precharge Command
MEMOR Y address：0x8000_0F00 data: 0
After setting to ESDCTL0, acc ess the memory to issue the respective command.
Auto-Refresh
ESDCTL0 ad dress：0xB800_1000,a2100000
31 SDE:1 Controller Enable、30–28 SMODE:2 Auto-Refresh Command
MEMOR Y address：0x8000_0000,0
MEMOR Y address：0x8000_0000,0
Auto-Refresh ×2
Load Mode Register
ESDCTL0 ad dress：0xB800_1000,b2226080
31 SDE:1 Controller Enable、30–28 SMODE:3 Load Mode Register Command、26–24 ROW:2 13bit、
21–20 COL:2 10bit17–16 DSIZ:2 32-bit、15–13 SREFR：３ 7.81 μs、 7 BL:1 Burst Length 8、
5–0 PRCT:0 Dis abled
MEMOR Y address：0x8000_0033,0
6-4 CL:3 CAS Latency3、3 BT:0 Burst Type Sequential、2–0 BL:3 Burst Length 8
MEMOR Y address：0x8400_0020,0
Page 19
Various Settings ---- 19
6-5 DS:1 Half Drive Strength
Normal
ESDCTL0 ad dress：0xB800_1000,82226080
30–28 SMODE:0 N ormal Read/Writ e
ESDMISC address：0xB800_1010,80000004
2MDDREN:1 Enable Mobile DDR SDRAM operation
Page 20
20 ---- Description of Functions
7 Descriptio n of F unc ti on s
7.1 External Expansion Connector：CN7 (not preinstalled)
1.27mm-pitch Surface Installation Pad
Through this connector, signals to/from the local memory bus (WEIM) of i.MX31 are transmitted via a 3V buffer.
All these signals are rated to 3V.
CN7
Fig.14 CN3 External Expansion Connector
7.2 PCMCIA
Model No.：IC14A-PL-SF-EJR, manufacturer：HIROSE
・Host adapter interface with full compatibility with PCMCIA standard release 2.1 (PC Card-16).
・One PCMCIA socket.
・Supports hot swap capability.
・Supports detection of card presence.
・Supports five memory windows.
・Only one interrupt generated to ARM11 core.
・Possible to handle interrupts from card.
・PCMCIA controller is part of the EMI, and shares the same pins among EIM，SDRAMC，and built-in NAND Flash
controller of i.MX31.
・ATA supports disk emulation.
Fig.15 PCMCIA
Page 21
Description of Functions ---- 21
7.3 UART1
UART1 is connected to D-SUB connector (CN6) via RS-232C driver and JP.
Communication between i.MX31 and RS-232C driver is defined as DCE (MODEM).
Switchover between straight and cross connections can be achieved through JP setting. This is used for console
output of Linux.
CN5:UART2 CN6:UART1
JP18 JP19 JP20 JP21
IrDA
Fig.16 UART Connector, IrDA
7.4 UART2
UART2 shares the same lines of D-SUB connector (CN5) and CN7 lines. Appropriate setting of the switch enables
the RS-232C driver connected to D-SUB connector (CN5) for use.
Communication between i.MX31 and RS-232C driver is defined as DTE (COM).
7.5 IrDA
Model No.：TFBS6711-TR1, manufacturer：Vishay Semiconductors
IrDA FIR is connected to TFBS6711-TR1, which is an IrDA physical module manufactured by Vishay
Semiconductors.
Page 22
22 ---- Description of Functions
7.6 USBOTG
Model No.：E43AS-005-8604A, manufacturer: MITSUMI
This is a connector for USBOTG. For this type a mini-AB socket has been installed.
Either a mini-A plug or mini-B plug can be used.
USB2.0 On-The-Go permits automatic switchover between host and slave.
Using this connector as mini-A allows any USB client to be connected. Otherwise if this is used as mini-B, it is
possible to make any USB host equipment such as a PC recognize the connected device as a mass-storage device.
CN25
Fig.17 CN25 USBOTG Connector
7.7 LAN
Model No.: LU1T041-43 LF, manufacturer: bothhand
10/100 Mbps Ethernet single-chip LAN controller LAN9118 is linked to CS5 address spaces of i.MX31.
LAN 9118
Fig.18 IC41 LAN Controller
7.8 SD/MMC
Model No.: DM1AA-SF-PEJ, manufacturer: HIROSE
This controller can handle both an SD memory card, which is one of the peripheral features of i.MX31, and an MMC
(multi-media card) including secure MMC. WP and CD are connected to FPGA.
CN2
4
Fig.19 CN24 SD Connector
Page 23
Description of Functions ---- 23
7.9 KEYPAD
Model No.: SKRPABE010, manufacturer: Alps Electric Corp.
This is connected to the KEYPAD controller, one of the peripheral features of i.MX31.
Fig.20 KEYPAD
7.10 AC97
Model No.: HSJ1601-011110, manufacturer: HOSHIDEN
Audio signals conform to the Synchronous Serial Interface (SSI) specifications and are connected to AD1981BL,
which is a CODEC device.
External input/output is connected to φ3.5 mini-jacks J1 to J3. LINE OUT and HEAD PHONE can be switched over
with the JP13, 14 settings.
LINE IN MIC
LINE OUT/HEAD PHONE
Fig. 21 Audio In/Out
The following table shows the internal connection of each silk-printed JP. The factory default is the HEAD PHONE
setting.
JP13 LEFT JP14 RIGHT
LINE OUT
LINE-side
short-circuited
LINE-side
short-circuited
HEAD PHONE
HP-side
short-circuited
(factory default)
HP-side
short-circuited
(factory default)
Table 6 JP13, 14 Settings
Page 24
24 ---- Description of Functions
7.11 ATA
Model No.: A3-44DA-2DSA, manufacturer: HIROSE
・Conforms to ATA-6 specifications.
・PIO modes 0, 1, 2, 3, and 4 are supported.
・Multiword DMA modes 0, 1, and 2 are supported.
・Ultra DMA modes 0, 1, 2, 3, and 4 are supported under a bus clock of 50 MHz.
・Ultra DMA mode 5 is supported under a bus clock of 80 MHz.
・Interface with 128-bite FIFO buffer.
・Zero-wait cycle transfer between DMA bus and FIFO buffer enables high-speed read/write of the FIFO buffer.
Hard disk is optional.
2
143
44
JP3
13
ATAPWR
_SEL
Fiｇ.22 CN11 ATA Connector
Switching between power sources is possible with the JP3 setting. The factory default is 5V and 1 and 2 are short-circuited.
Short-circuiting between 2 and 3 allows 3V to be supplied.
JP3
5V
1-2 short- c ir c uit e d
(factory default)
3V 2-3 short-circui ted
Table 7 JP3 Settings
Page 25
Description of Functions ---- 25
7.12 LCD (option)
Model No.：FT035SB320240-B1
Screen Size: 3.5 inches
Display Resolution: 320XRGBX240 (QVGA)
Color: 16.7 M
Digital 24-bit RGB
Size: 79.6 (W) x 63.9 (H) x 3.2 (D)
Fig.23 CN29, 30 TOUCH PANEL and LCD Connectors
7.13 TOUCH PANEL (option)
Touch Panel Controller Model No.: AHL-71N, manufacturer: GUNZE
Electrical resolution: 10 bits (1024 ×1024)
Output rate: 87 cps (cps:Co-ordinates Per Second)
Output mode: Continuous (coordinate data will be continuously transmitted with the panel being touched.)
Touch Panel Model No.: H3035A-NCOFA39 manufacturer: Hantouch
Size: 72.08 (W) x 62.4 (H)
Active area: 70.08 (W) x 52.56 (H)
Output mode: Continuous (coordinate data will be continuously transmitted with the panel being touched.)
7.14 CAMERA (option)
Model No.: MTV-54K0DN, manufacturer: Akizuki Electric
Output: NTSC+ITU656
Number of pixels: 542 x 496 (260,000 pixels)
Minimum illuminance: 0.5 lux, F1.2, 5600０°K
Ｓ/Ｎ： 60 dB
Electronic shutter: 1/60 – 1/120,000 sec.
Digital output: ITU-656 (８ bits)
Fig.24 CN20, 23 CAMERA Connector
Page 26
26 ---- BOARD Controller
8 BOARD Controller
NAND (IC7), 7-seg LED (LED7), LED (LED 3-6), DIP switch (DSW2) are controlled by EP1C (IC14).
8.1 BOARD CONTROL
8.1.1 Controls
control1
Address : 0xB4 00 10 0 0
Access : 8bit Read/Write
Bit No. Description
7-6 Reserved
5
UART_MBAUD：Controlling the baud rate (MBAUD) of a driver connected to UART1
1:high
0:low
4
UART1_SD：Controlling the shutdown pr ocess of a dr iver c onnected to UART1
1:Shutdown
0:Normal drive
3 Reserved
2
NFC_UM：NFC interrupt mask
1:Un MASK
0:MASK
1
FPGA_UART_UM：FPGA_UART interrupt mask
1:Un MASK
0:MASK
0
SD_DET_UM：SD_DET interrupt mask
1:Un MASK
0:MASK
control2
Address : 0xB4 00 10 0 1
Access : 8bit Read/Write
Bit No. Description
7
POE：Controlling PCMCIA buffer
1:ON Drive
0:OFF Hi-Z
6-5
PC_VCC[1..0]：Controlling VCC of PCMCIA
00:OFF
01:5V
10:3V
11:OFF
4
PC_VPP：Supplying 5V VPP f or PCMCIA with this control set to ON
1:ON
0:OFF
3-2 Reserved
Page 27
BOARD Controller ---- 27
1
BK_LIGHT：Contr olling LCD panel backlight
1:ON
0:OFF
0
LCD_ON：Controlling LCD panel power supply
1:ON
0:OFF
Page 28
28 ---- BOARD Controller
RSW1
Address : 0xB4 00 10 0 2
Access : 8bit Read
Bit No. Description
7-4 Reserved
3-0 RSW1status
Switching of ATA, C AMERA and UART modeｓ.
Back Light
Address : 0xB4 00 10 0 4
Access : 8bit Read/Write
Bit No. Description
7-0 Controls the backlight intensity in 255 tones (st eps) when BK_LIGHT is set to ON. The initial value is 0x80.
0xFF: Bright
：
0: Dark
FPGA Rev
Address : 0xB4 00 10 0 8
Access : 8bit Read
Bit No. Description
7-0 Accommodates FPGA revision dat a.
Address : 0xB4 00 10 0 9
Access : 8bit Read
Bit No. Description
7-0 Accommodates FPGA revision dat a.
Address : 0xB4 00 10 0 A
Access : 8bit Read
Bit No. Description
7-0 Accommodates FPGA revision dat a.
Address : 0xB4 00 10 0 B
Access : 8bit Read
Bit No. Description
7-0 Accommodates FPGA revision dat a.
Page 29
BOARD Controller ---- 29
7-seg LED control
Address : 0xB400 1010- 0xB400 101F
Access : 8bit Read/Write
Bit No. Description
7-5 Reserved
4 LED1dot
1: On
0: Off
3-0 LED1data display
bit3-0 led display bit3-0 led display bit3-0 led display bit3-0 led display
0x0 0 0x4 4 0x8 8 0xC C
0x1 1 0x5 5 0x9 9 0xD d
0x2 2 0x6 6 0xA A 0xE E
0x3 3 0x7 7 0xB B 0xF F
Fig.25 7-seg LED
Page 30
30 ---- BOARD Controller
LED control
Address : 0xB400 1020- 0xB400 102F
Access : 8bit Read/Write
Bit No. Description
7-4 Reserved
3 LED6
1: On
0: Off
2 LED5
1: On
0: Off
1 LED4
1: On
0: Off
0 LED3
1: On
0: Off
DIPSW2 control
Address : 0xB400 1003
Access : 8bit Read
Bit No. Description
7-4 Reserved
3 DSW2-4
1：ON
0：OFF
2 DSW2-3
1：ON
0：OFF
1 DSW2-2
1：ON
0：OFF
0 DSW2-1
1：ON
０：OFF
In the factory default, written in FLASH, DSW 2-1, 2, and 4 s erve to switch the debug mode. For more inf ormation, please refer to the
readme.txt in attached CD-RO M. S etting DSW2 to ON will make the debugging process enter an infinite loop at the top of the c odes.
Page 31
BOARD Controller ---- 31
8.2 NAND FLASH control
The NAND FLASH controller provides controls over NAND Flash (IC7) and NAND Flash expansion connector.
This NAND FLASH control is not part of the i.MX31 functions, but has been installed as an external FPGA. It is
provided with a 2Kbytes MAIN Buffer RAM and 64-bytes SPAR Buffer RAM. Read/write of NAND FLASH
memory will be performed via this Buffer RAM.
Main Buffer address : 0xB620 0000-0xB620 07FF
Spar Buffer address : 0xB620 0800-0xB620 083F
ADD
Used for writing an address to FLASH device. Setting the FADD bit to 1 allows the value of this register to be
written in the FLASH device.
Address : 0xB620 0E06
Access : 16bit Read/Write
Bit No. Description
15-8 Reserved
7-0 NAND Flash Address
CMD
Used for writing a command to the FLASH device. Setting the FCMD bit to 1 allows the value of this register to be
written in the FLASH device.
Address : 0xB620 0E08
Access : 16bit Read/Write
Bit No. Description
15-8 Reserved
7-0 NAND Flash Command
NAND Flash Write Protection
Write-protect commands. The lock condition means that /WP signals are active for the FLASH device.
Address : 0xB620 0E12
Access : 16bit Read/Write
Bit No. Description
15-3 Reserved
2-0 Write Protection Command
100 Unlock NAND Flash
010 Lock all NAN D Flash
001 Lock- tight locked
Page 32
32 ---- BOARD Controller
ECC_STATUS
Indicates ECC error conditions.
Address : 0xB620 0E0C
Access : 16bit Read/Write
Bit No. Description
15-4 Reserved
3-2 ECC Error f or Main Area Data
00：No Error
01：1-bit Error
10:Error
11:Reserved
1-0 ECC Error f or Spare Area Data
00：No Error
0：1-bit Error
10:Error
11:Reserved
ECC Error Position Main
Indicates the location of ECC error in the Main area.
Address : 0xB620 0E0E
Access : 16bit Read/Write
Bit No. Description
15-12 Reserved
11-3 Indicates ECC Error Data bit error addr esses c orresponding to 2048 bytes per page.
2-0 Indicates one error bit contained in one byte of ECC Error Data bit error address.
ECC Error Position Spar
Indicates the location of ECC error in the Spar area.
Address : 0xB620 0E10
Access : 16bit Read/Write
Bit No. Description
15-7 Reserved
7-3 Indicates ECC Err or Data bit error addresses corresponding to 16 bytes from Spar area 0.
2-0 Indicates error bits contained in one byte of ECC Err or Data bit error addr ess.
Page 33
BOARD Controller ---- 33
NAND Flash Operation Configuration1
Address : 0xB620 0E1A
Access : 16bit Read/Write
Bit No. Description
15-7 Reserved
6 Resetting c ontroller. Resets NAND Flash Control.
0: Normal
1: Reset
5 Reserved
4 INT mask
0: Interrupt enabled
1: Interrupt dis abled
5 Reserved
3 ECC Enable
0: ECC is invalid.
1: Perf orms ECC-bas ed trans mission.
2 Spare Enable
0: Both Main and Spare are accessible.
1: Only S pare is acc essible.
1-0 Reserved
NAND Flash Operation Configuration2
NAND Flash signals are controlled with these registers.
Address : 0xB620 0E1C
Access : 16bit Read/Write
Bit No. Description
15 An interrupt signal. W riting 0 clears this bit. (W riting 1has no effect.)
0: Operation in progr ess
1: Operation c ompleted
14-7 Reserved
6-3 NAND Flash Data Output FDO
001 One page data out
010 NAND Flash ID data out
100 NAND Flash Status Register data out
2 NAND Flash Data Input FDI
1 NAND Flash data input operati on
1 NAND Flash Address Input FADD
1 NAND Flash Address input operation
0 NAND Flash Command Input FCMD
1 Allow NAND Flash Command input operation
Each of the FDO, FDI, FADD, and FCMD bits will be automatically reset to 0 after the operation is completed.
ONE page：Page size will be 64 (Spare) bytes for the case of SP_EN=1 and 2048 (Main) + 64 (Spare) bytes for the case of
SP_EN=0.
Page 34
34 ---- BOARD Controller
ECC
With the setting of ECC_EN=1, bit-by-bit error detection is undertaken per page. Once a program is created, 28 bits
of error codes and 10 bits of error codes will be generated for Main Area and Spare Area respectively, and stored in
the Spare Area. See the following table for the data allocation. On reading, these codes will be compared to the
generated codes and the results will be stor ed in ECC STATUS.
0xB600 0800
0xB600 0834
0xB600 0835
0xB600 0836
0xB600 0837
0xB600 0838
0xB600 0839
0xB600 083A
0xB600 083F
ECC Code for Main area data1
ECC Code for Main area data2
ECC Code for Main area data3
ECC Code for Main area data4
ECC Code for Spare area data1
ECC Code for Spare area data2
Main Area 2048byte
Main Area Spare Area 64byte
0xB600 0000
0
21122048
NAND Flash Memory 1page
Page 35
BOARD Controller ---- 35
8.3 F_UART
This is the register of UART in FPGA. F_UART is linked to Touch Panel (at the fixed baud rate of 19200 bps). Word Length
is fixed to 8-bits long. The register assignment is 16550-compatible. Interrupt signals are linked to the GPIO1_1 line.
RBR
Address : 0xB400 1050
Access : 8bit Read
Bit No. Description
7-0 Received data
Enabled with DLAB=0.
THR
Address : 0xB400 1050
Access : 8bit Wri te
Bit No. Description
7-0 Transmi tted data
Enabled with DLAB=0.
IER
Address : 0xB400 1051
Access : 8bit Read/Wri te
Bit No. Description
7-3 Reserved
2 Receiver Line St atus Interrupt (ELSI)
1 Transmitter Holding Register Empty Interrupt (ETBEI)
0 Received Data Availabl e Interr upt (ERBFI)
Enabled with DLAB=0.
IIR
Address : 0xB400 1052
Access : 8bit Read
Bit No. Description
7-6 FIFO Enabled
5-4 0
3 Interrupt ID Bit2
2 Interrupt ID Bit1
1 Interrupt ID Bit0
0 0: Interrupt Pending
Description of Interrupt ID.
Page 36
36 ---- BOARD Controller
FCR
Address : 0xB400 1052
Access : 8bit Wri te
Bit No. Description
7 RCVR Trigger (MSB)
6 RCVR Trigger (LSB)
5-3 Reserved
2 XMIT FIFO Reset
1 RCVR FIFO Reset
0 FIFO Enable
LCR
Address : 0xB400 1053
Access : 8bit Read/Wri te
Bit No. Description
7 DLAB
6-5 Reserved
4 Even Parity Select
3 Parity Enable
2-0 Reserved
LSR
Address : 0xB400 1055
Access : 8bit Read/Wri te
Bit No. Description
7 Error in RCVR Bit FIFO
6 Transmitter Empty
5 Transmitter Holding Register
4 Break Interrupt
3 Framing Error
2 Parity Error
1 Overrun Error
0 Data Ready
Page 37
Connector Pins Assignment ---- 37
9 Connector Pins Assignment
9.1 JTAG Connector
CN16
JP12SW2 SW3
CN13
Fig.26 CN13, 16 JTAG Connectors
9.1.1 ARM ETM Type：CN13
Connect here the ETM-type JTAG cable.
CN
PIN
SIGNAL
i.MX31
SIGNAL
i.MX31
PIN
CN
PIN
SIGNAL
i.MX31
SIGNAL
i.MX31
PIN
1 NC
20 TRACEPKT5 NFCEn T6
2 NC
21 /TRST TRSTn B20
3 NC
22 TRACEPKT4 NFWPn U2
4 NC
23 TRACEPKT15 CSPI1_MOSI P2
5 GND
24 TRACEPKT3 NFCLE U3
6 TRACECLKA USBH2_D1 M3
25 TRACEPKT14 SFS6 T3
7 DBGRQ DE *2 C18
26 TRACEPKT2 NFALE V1
8 DBGACK NC
27 TRACEPKT13 SCK6 T2
9 /SRST *1
28 TRACEPKT1 NFREn V2
10 EXTTRG NC
29 TRACEPKT12 SRXD6 R7
11 TDO TDO A19
30 GND
12 VTRef 3V
31 TRACEPKT11 STXD6 T1
13 RTCK RTCK C17
32 GND
14 VSupply 3V
33 TRACEPKT10 SFS3 R6
15 TCK TCK B19
34 VDD PULL UP
16 TRACEPKT7 STXD3 R1
35 TRACEPKT9 SCK3 R2
17 TMS TMS G16
36 TRACECTL USBH2_D0 M1
18 TRACEPKT6 NFRB U1
37 TRACEPKT8 SRXD3 R3
19 TDI TDI F16
38 TRACEPKT0 NFWEn T7
Table 8 CN13 Pins Assignment
*1 /SRST signal is connected to JP12 and also to POR_B (H24) of i.MX31 and RESET_IN_B (J21). The factory default is
POR_B setting. This does not have to be changed for regular operations.
*2 DE signal is connected to JP16 and further to DE_B (C18) of i.MX31. The factory setting of JP16 is open. Short-circuit this
JP if using DE_B.
Page 38
38 ---- Connector Pins Assignment
9.1.2 ARM 20-Pin Type (without tracing) ：CN16
CN
PIN
SIGNAL
i.MX31
SIGNAL
i.MX31
PIN
1 VTref 3V
2 Vsup 3V
3 /TRST TRSTn B20
4 GND
5 TDI TDI F16
6 GND
7 TMS TMS G16
8 GND
9 TCK TCK B19
10 GND
11 RTCK RTCK C17
12 GND
13 TDO TDO A19
14 GND
15 /SRST *1
16 GND
17 DBGRQ DE *2 C18
18 GND
19 DBGACK
PULL
DOWN
20 GND
Table 9 CN16 Pins Assignment
Page 39
Connector Pins Assignment ---- 39
9.2 External Expansion Connector：CN7 (not installed)
CN7
Fig.27 CN3 External Expansion Connector
PIN Net Name i.MX31 PIN PIN Net Name i.MX31 PIN
1 BCLK AB26 51 GND
2 GND 52 GND
3 GND 53 D8 Y2
4 A0 AD6 54 D9 V6
5 A1 AF5 55 D10 Y1
6 A2 AB5 56 D11 U7
7 A3 AE4 57 D12 W 2
8 A4 AA3 58 D13 V3
9 A5 AF4 59 D14 W1
10 A6 AB3 60 D15 U6
11 GND 61 GND
12 GND 62 GND
13 A7 AE3 63 M_OEn *2
14 A8 AD5 64 M_WEN0 *2
15 A9 AF3 65 EXT_ECBn *2
16 A10 AF18 66 M_WEN1 *2
17 A11 AC3 67 CPU_DTE2_DTR C12 *1
18 A12 AD3 68 CPU_GPIO1_4 F19 *3
19 A13 AD4 69 CPU_UART2_TXD C13 *1
20 A14 AF17 70 CPU_GPIO1_5 B24 *3
21 A15 AF16 71 GND
22 A16 AF15 72 GND
23 A17 AF14 73 CPU_UART2_CTS G13 *1
24 A18 AF13 74 CPU_GPIO1_0 F18 *3
Continued on next page.
Page 40
40 ---- Connector Pins Assignment
25 A19 AF12 75 CPU_DTE2_DCD B13 *1
26 A20 AF11 76 CPU_SCK5 D3
27 A21 AF10 77 CPU_UART2_RTS B14 *1
28 A22 AF9 78 CPU_SFS5 A3
29 A23 AF8 79 CPU_UART2_RXD A13 *1
30 A24 AF7 80 CPU_SRXD5
31 GND 81 CPU_DTE2_DSR A12 *1
32 GND 82 CPU_STXD5 C5
33 A25 AF6 83 CPU_DTE2_RI G12 *1
34 OEn AB25 84 CPU_USB_B YP A9
35 RW AB22 85 CN_TDI/D0 *4
36 EBN0 W21 86 CPU_USB_OC C10
37 EBN1 Y24 87 CN_TDO/CONF_DON E *4
38 LBAn AE22 88 CPU_USB_PWR B10
39 CSN0 AE23 89 RSTn *5
40 CSN1 AF23 90 CN_RSTn_IN *5
41 CSN4 AF24 91 GND
42 CSN5 AF22 92 GND
43 D0 AB2 93 +5V
44 D1 Y3 94 +3.0V
45 D2 AB1 95 +5V
46 D3 W6 96 +3.0V
47 D4 AA2 97 +5V
48 D5 V7 98 +3.0V
49 D6 AA1 99 +5V
50 D7 W3 100 +3.0V
Table10 CN7 Pins Assignment
*1 This is a UART2 signal that shares IrDA interface with CN5. In order to use these signals it is necessary to set the rotary
switch (RSW1) properly. Refer to the list of settings presented in this Manual.
*２ These signals are connected to FPGA. M_WEN0,1 is the result of ORing between RW and EBN.
*3 GPIO pin of i.MX31. Available as one of the i.MX31 interrupts.
*4 Connected to FPGA. Functions as RS-232C (auxiliary).
Page 41
Connector Pins Assignment ---- 41
9.3 PCMCIA
Fig.28 PCMCIA
CN
PIN
SIGNAL
i.MX31
SIGNAL
i.MX31
PIN
CN
PIN
SIGNAL
i.MX31
SIGNAL
i.MX31
PIN
1 GND 35 GND
2 D3/CAD0 D3 W6 36 CD1#/CCD1# PC_CDN1 L7
3 D4/CAD1 D4 AA2 37 D11/CAD2 D11 U7
4 D5/CAD3 D5 V7 38 D12/CAD4 D12 W 2
5 D6/CAD5 D6 AA1 39 D13/CAD6 D13 V3
6 D7/CAD7 D7 W3 40 D14/RSRVD D14 W 1
7 CE1#/CCBE0# SDBA1 AD7 41 D15/CAD8 D15 U6
8 A10/CAD9 A10 AF18 42 CE2#/CAD10 SDBA0 AE5
9 OE#/CAD11 LBAn AE22 43 VS1#/CVS 1 PC_VS1 J1
10 A11/CAD1 2 A11 AC3 44 RSRVD/IORD#/CAD 13 EBN1 Y24
11 A9/CAD14 A9 AF3 45 RSRVD/IOWR#/CAD15 OEn AB25
12 A8/CCBE1# A8 AD5 46 A17/CAD16 A17 AF14
13 A13/CPAR A13 AD4 47 A18/RSRVD A18 AF13
14 A14/CPERR# A14 AF17 48 A19/CBLOC K# A19 AF12
15 WE#/CGNT# RW AB22 49 A20/CSTOP# A20 AF11
16 READY/IR EQ#/CINT# PC_READY J2 50 A21/CDEVSEL# A21 AF10
17 Vcc 51 Vcc
Continued on next page.
Page 42
42 ---- Connector Pins Assignment
18 Vpp 1 52 Vpp2
19 A16/CClk A16 AF15 53 A22/CTRDY A22 AF9
20 A15/CIRDY# A15 AF16 54 A23/CFRAME# A23 AF8
21 A12/CCBE 2# A12 AD3 55 A24/CAD17 A24 AF7
22 A7/CAD18 A7 AE3 56 A25/CAD19 A25 AF6
23 A6/CAD20 A6 AB3 57 VS2#/CVS2 PC_VS2 K7
24 A5/CAD21 A5 AF4 58 RESET/CRST# PC_RST H1
25 A4/CAD22 A4 AA3 59 W AIT#/CSERR# PC_W AIT L6
26 A3/CAD23 A3 AE4 60 RSRVD/INPACK#/CREQ#
27 A2/CAD24 A2 AB5 61 REG#/CCBE3# EBN0 W21
28 A1/CAD25 A1 AF5 62 BVD2/SPKR #/CAUDIO PC_BVD2 K6
29 A0/CAD26 A0 AD6 63 BVD1/STSCHG#/CSTSCHG PC_BVD1 H2
30 D0/CAD27 D0 AB2 64 D8/CAD28 D8 Y2
31 D1/CAD29 D1 Y3 65 D9/CAD30 D9 V6
32 D2/RSVD D2 AB1 66 D10/CAD31 D10 Y1
33 WP/IOIS16#/CCLKRUN# IOIS16 J3 67 CD2#/CCD2# PC_CDN2 K1
34 GND 68 GND
Table 11 PCMCIA Pins Assignment
9.4 USBOTG
CN25
12345
Fig.29 CN25 USBOTG Connector
pin signal
1 VBUS
2 D-
3 D+
4 ID
5 GND
Table 12 CN25 Pins Assignment
Page 43
Connector Pins Assignment ---- 43
9.5 UART1
CN5:UART2 CN6:UART1
JP18 JP19 JP20 JP21
IrDA
Fig.30 UART Connector, IrDA
12345
6789
Fig. 31 CN6 UART1 Connector
1 DCD_CN
2 RXD_CN
3 TXD_CN
4 DTR_CN
5 GND
6 DSR_CN
7 RTS_CN
8 CTS_CN
9 RI_CN
Table 13 CN6 Pins Assignment
1:DCD_CN
2:RXD_CN
3:TXD_CN
4:DTR_CN
6:DSR_CN
7:RTS_CN
8:CTS_CN
9:RI_CN
DCD
RXD
TXD
DTR
DSR
RTS
CTS
RI
15
26
JP18
15
26
JP19
15
26
JP20
15
26
JP21
CPU UART1
1:DCD_CN
2:RXD_CN
3:TXD_CN
4:DTR_CN
6:DSR_CN
7:RTS_CN
8:CTS_CN
9:RI_CN
DCD
RXD
TXD
DTR
DSR
RTS
CTS
RI
15
26
JP18
15
26
JP19
15
26
JP20
15
26
JP21
CPU UART1
Cross-connection setting (f actory default ) Straight-conn ection s etting
Fig.32 JP18, 19, 20, 21 Settings
Page 44
44 ---- Connector Pins Assignment
9.6 UART2
12345
6789
Fig.33 CN5 UART1 Connector
1 DCD_CN
2 RXD_CN
3 TXD_CN
4 DTR_CN
5 GND
6 DSR_CN
7 RTS_CN
8 CTS_CN
9 RI_CN
Table 14 CN5 Pins Assignment
Page 45
Connector Pins Assignment ---- 45
9.7 LAN RJ45
LAN 9118
Fig.34 IC41 LAN Controller
18
GREEN
LED LED
YELLOW
Fig. 35 IC41 LAN Controller
pin signal
1TX+
2 TX-
3RX+
4
NC (with
terminator setting)
5
NC (with
terminator setting)
6 RX-
7
NC (with
terminator setting)
8
NC (with
terminator setting)
Table 15 CN25 Pins Assignment
Page 46
46 ---- Connector Pins Assignment
9.8 SD/MMC
CN2
4
123456789
14
16
15
Fig.36 CN24 SD Connector
PIN signal
1DAT3
2CMD
3 VSS1
4 VDD
5CLK
6 VSS2
7DAT0
8DAT1
9DAT2
10 NC
11 NC
12 NC
13 NC
14 CD
15 WP
16 CD_WP_COM
Table 16 CN24 Pins Assignment
Page 47
Connector Pins Assignment ---- 47
9.9 KEYPAD
Fig.37 KEYPAD
signal
i.MX31
PIN
COL0 C15
COL1 B17
COL2 G15
COL3 A17
ROW0 F13
ROW1 B15
ROW2 C14
ROW3 A15
ROW4 G14
ROW5 B16
ROW6 F14
ROW7 A16
Table 17 KEYPAD Signals and CPU Pins
The relationship with each SW (silk-printed) is as follows:
COL0 COL1 COL2 COL3
ROW0 S1 S2 ↑ S3
ROW1 S4 ← S5 →
ROW2 S6 S7 ↓ S8
ROW3 S9 S10 S11 S12
ROW4 S13 1 2 3
ROW5 S14 4 5 6
ROW6 UP 7 8 9
ROW7 DOWN * 0 #
Table 18 Relationship between KEYPAD and Silk-printed SWs
Page 48
48 ---- Connector Pins Assignment
9.10 ATA
2
143
44
JP3
13
ATAPWR
_SEL
Fig.38 CN11 ATA Connector
A dedicated buffer, etc., runs between the i.MX31 and this connector as shown in the following table.
It is necessary to make pin settings on the i.MX31 side too. For this, refer to Signal Descriptions and Pin Assignments in the
i.MX31 Manual and the Linux source file, MX3KZ_GPIO.C.
Control modes are selected by the rotary switch.
Page 49
Connector Pins Assignment ---- 49
ATA 44PIN i.MX31 ATA 44PIN i.MX31
pin signal signal pin pin signal signal pin
1 /RESET ATA_RESETn H3 23 /DIOW ATA_DIOW H6
2 GND 24 GND
3 DD7 STXD3 R1 25 /DIOR ATA_DIOR E2
4 DD8 SRXD3 R3 26 GND
5 DD6 CSPI1_SPI_RDY N3 27 IORDY PWMO G1
6 DD9 SCK3 R2 28 CSEL
7 DD5 CSPI1_SCLK N2 29 /DACK ATA_DMACK F1
8 DD10 SFS3 R6 30 GND
9 DD4 CSPI1_SS2 P6 31 INTRQ USBH2_CLK N1
10 DD11 STXD6 T1 32 /IOIS16
11 DD3 CSPI1_SS1 P1 33 DA1 USBH2_D0 M1
12 DD12 SRXD6 R7 34 /PDIAG
13 DD2 CSPI1_SS0 P3 35 DA0 USBH2_NXT N6
14 DD13 SCK6 T2 36 DA2 USBH2_D1 M3
15 DD1 CSPI1_MISO P7 37 /CS0 ATA_CS0 J6
16 DD14 CAPTURE A22 38 /CS1 ATA_CS1 F2
17 DD0 CSPI1_MOSI P2 39 /DASP
18 DD15 COMPAR E G18 40 GND
19 GND 41 +5V (LOGIC) *1
20 KEYPIN 42 +5V (MOTOR) *1
21 DMARQ USBH2_STP M2 43 GND
22 GND 44 TYPE
Table 19 CN30 ATA Connector
*1 It is possible to switch between power sources using JP3. 1 and 2 are short-circuited to supply 5V by the factory default.
Switching to short-circuiting between 2 and 3 will supply 3V.
Page 50
50 ---- Connector Pins Assignment
9.11 LCD (optional)
Fig .39 CN29, 30 TOUCH PANEL LCD Connectors
A dedicated buffer, etc., runs between the i.MX31 and this connector, as shown in the following table.
It is necessary to make pin settings on the i.MX31 side too. For this, refer to Signal Descriptions and Pin Assignments in the
i.MX31 Manual and the Linux source file, MX3KZ_GPIO.C.
CN
PIN
SIGNAL
i.MX31
SIGNAL
i.MX31
PIN
CN
PIN
SIGNAL
i.MX31
SIGNAL
i.MX31
PIN
1 VBL- 28 R0 LD12 Y26
2 VBL- 29 R1 LD13 V21
3 VBL+ 30 R2 LD14 AA25
4 VBL+ 31 R3 LD15 W 24
5 NC 32 R4 LD16 AA26
6 NC 33 R5 LD17 V20
7 POL 34 R6
8 RSTn 35 R7
9 SPEN 36 HSYNC HSYNC N25
10 SPCLK 37 VSYNC VSYNC3 R26
11 SPDAT 38 DCLK FPSHIFT N21
12 B0 LD0 T24 39 L+5V
13 B1 LD1 U26 40 L+5V
14 B2 LD2 T21 41 +3.0V
15 B3 LD3 V25 42 +3.0V
16 B4 LD4 T20 43 NC
17 B5 LD5 V26 44 NC
18 B6 45 L-10V
19 B7 46 NC
20 G0 LD6 U24 47 L+15V
21 G1 LD7 W 25 48 NC
22 G2 LD8 U21 49 NC
23 G3 LD9 W 26 50 NC
24 G4 LD10 V24 51 VCOM
25 G5 LD11 Y25 52 ENB
26 G6 53 GND
27 G7 54 GND
Table 20 CN30 LCD Connector
Page 51
Connector Pins Assignment ---- 51
9.12 TOUCH PANEL (option)
Fig.40 TOUCH PANEL Coordinates
CN
PIN
SIGNAL
1 Xl
2 Yu
3 Xr
4 Yb
Table 21 CN29 TOUCH PANEL Connector
Xl
Xr
Yu
Yb
Page 52
52 ---- Connector Pins Assignment
9.13 CAMERA (option)
Fig. 41 CN20, 23 CAMERA Connectors
CN
PIN
SIGNAL
i.MX31
SIGNAL
i.MX31
PIN
1 CSI_D0 CPU_CSI_D8 L20
2 CSI_D1 CPU_CSI_D9 L25
3 CSI_D2 CPU_CSI_D10 M24
4 CSI_D3 CPU_CSI_D11 L26
5 CSI_D4 CPU_CSI_D12 M21
6 CSI_D5 CPU_CSI_D13 M25
7 CSI_D6 CPU_CSI_D14 M20
8 CSI_D7 CPU_CSI_D15 M26
9 CSI_PIXCLK CPU_CSI_PIXCLK J26
10 GND
Table 22 CN20 CAMERA Connector
CAMERA power supply connector: 53261-0471
CN
PIN
SIGNAL
1 +12V
2 GND
3 NC
4 GND
Table 23 CN20 CAMERA POWER Connector
Page 53
About the Sample Software ---- 53
10 About the Sample Software
The supplied CD-ROM contains the source codes for RedBoot and Linux kernel in addition to the userland resources.
For detail of these contents see readme.txt.
Page 54
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
SC06040Z-01 B
KZM-ARM11-01
A4
139Friday, November 10, 2006
Kyoto Microcomputer Co., Ltd.KZM-ARM11-01
PB06043Z
Title
Size Document Number Rev
Date: Sheet
of
ETM
NV6
ETM_SRSTn
PR_TRACE_DATA[0..7]
PR_TRACE_CTRL
TRACE_DATA[8..15]
PR_TRACE_CLK
LOCAL_MEM
nv2
DRWn
DOEn
PC_CEn[1..2]
CSn[0..5]
D[0..15]
A[0..25]
PME
LAN_IRQ
BCLK
LBAn
RW
OEn
M_WEn[0..1]
RSTn
EBn[0..1]
M_OEn
FLSH_CSn
STD_CSn
LAN_CSn
ECBn
CPU_GPIO3_0
CPU_SRXD5
CPU_STXD5
CPU_SCK5
CPU_USB_OC
CPU_USB_BYP
CN_RSTn_IN
CPU_SFS5
CPU_USB_PWR
CPU_DTE2_DCD
CPU_UART2_RTS
CPU_UART2_RXD
CPU_DTE2_DSR
CPU_DTE2_RI
EXT_ECBn
CPU_UART2_TXD
CPU_UART2_CTS
CPU_DTE2_DTR
CPU_GPIO1_[0..6]
M_INHn
CN_TDI/D0
CN_TDO/CONF_DONE
CTRL
CTRL
SD1_SEL
ETM_SRSTn
SD1_DETn
USBH2_SEL
MSHC1_DETn
ATA_DIAGn
SD1_WPn
ATA_DASPn
UART1_SDn
ATA_ENn
ATA_SEL
LCD_ON
CSI_ENn
USBH1_ENn
ATA_IOIS16n
UART1_MBAUD
UART1_ENn
UART2_ENn
BK_LIGHT_ONn
USBH1_SEL
VPP_EN
CLK_26M
TUCH_ENn
USBH2_ENn
USBH1_OVR
NV2_ON
RW
BCLK
D[0..15]
A[0..25]
R_NF_REn
RSTn
LAN_CSn
R_NF_RB
PME
CSn[0..5]
R_NF_CLE
DOEn
R_NF_WEn
R_NF_ALE
R_NF_CEn
LAN_IRQ
R_NF_WPn
EBn[0..1]
DRWn
M_INHn
LBAn
STD_CSn
FLSH_CSn
M_OEn
OEn
M_WEn[0..1]
VCC_EN[0..1]
USBH1_MODE
ECBn
CPU_COMPARE
CPU_CAPTURE
FIR_ENn
CN_RSTn_IN
F_LCD_HSYNC
F_CPU_HSYNC
F_CPU_FPSHIFT
F_PC_RW
CPU_GPIO1_[0..6]
EXT_ECBn
CPU_BATT_LINE
CN_TDO/CONF_DONE
CN_TCK/DCLK
CN_TMS/nSTATUS
CN_TDI/D0
F_PC_POEn
CPU_PC_POEn
PWR
PWR
PERIPHERAL
PERIPHERAL
ATA_DIAGn
LCD_ON
R_NF_CEn
UART1_MBAUD
R_NF_WEn
ATA_IOIS16n
UART2_ENn
BK_LIGHT_ONn
LBAn
RSTn
R_NF_ALE
MSHC1_DETn
UART1_SDn
TUCH_ENn
A[0..25]
SD1_DETn
D[0..15]
PR_TRACE_CTRL
TRACE_DATA[8..15]
SD1_WPn
VPP_EN
PR_TRACE_CLK
VCC_EN[0..1]
SD1_SEL
PC_CEn[1..2]
R_NF_CLE
ATA_SEL
R_NF_REn
ATA_ENn
CSI_ENn
R_NF_RB
PR_TRACE_DATA[0..7]
ATA_DASPn
UART1_ENn
R_NF_WPn
CPU_BATT_LINE
CLK_26M EBn[0..1]
OEn
RW
CPU_CAPTURE
CPU_COMPARE
FIR_ENn
CPU_GPIO3_0
USBH1_MODE
USBH2_SEL
USBH1_OVR
USBH2_ENn
USBH1_ENn
USBH1_SEL
F_CPU_FPSHIFT
F_CPU_HSYNC
F_LCD_HSYNC F_PC_RW
CPU_UART2_TXD
CPU_UART2_RXD
CPU_DTE2_DTR
CPU_DTE2_DSR
CPU_UART2_RTS
CPU_DTE2_DCD
CPU_DTE2_RI
CPU_UART2_CTS
CPU_SCK5
CPU_SRXD5
CPU_STXD5
CPU_SFS5
CPU_USB_PWR
CPU_USB_BYP
CPU_USB_OC
CN_TCK/DCLK
CN_TMS/nSTATUS
F_PC_POEn
CPU_PC_POEn
RW
LAN_CSn
EBn[0..1]
OEn
ETM_SRSTn
M_EMLn
ECBn
DOEn
FLSH_CSn
M_INHn
A[0..25]
LAN_IRQ
D[0..15]
NV2_ON
M_WEn[0..1]
CSn[0..5]
STD_CSn
DRWn
PME
LBAn
BCLK
M_OEn
ETM_SRSTn
CN_RSTn_IN
CN_RSTn_IN
M_OEn
RSTn
LAN_IRQ
ECBn
FLSH_CSn
M_WEn[0..1]
RW
CSn[0..5]
OEn
STD_CSn
PME
M_INHn
DOEn
LAN_CSn
EBn[0..1]
BCLK
DRWn
F_PC_RW
CPU_GPIO1_[0..6]
CPU_GPIO1_[0..6]
EXT_ECBn
EXT_ECBn
CN_TCK/DCLK
CN_TDO/CONF_DONE
CN_TDI/D0
CN_CONFIGn
CN_TCK/DCLK
CN_TMS/nSTATUS
CN_TDO/CONF_DONE
CN_TDI/D0
CN_TDO/CONF_DONE
CN_TDI/D0
F_PC_POEn
CPU_PC_POEn
CPU_USB_PWR
PR_TRACE_DATA[0..7]
TRACE_DATA[8..15]
ATA_DIAGn
CPU_UART2_RTS
UART1_ENn
BK_LIGHT_ONn
CPU_BATT_LINE
CPU_STXD5
CPU_SRXD5
CPU_DTE2_DSR
USBH1_ENn
USBH1_OVR
UART1_SDn
UART2_ENn
CPU_PC_POEn
CN_TCK/DCLK
CPU_CAPTURE
CLK_26M
LCD_ON
CPU_GPIO3_0
R_NF_WPn
R_NF_RB
R_NF_REn
TUCH_ENn
RSTn
CPU_DTE2_DCD
CPU_COMPARE
RW
ATA_DASPn
R_NF_CLE
USBH2_SEL
OEn
ATA_SEL
PR_TRACE_CLK
CN_TMS/nSTATUS
CPU_SFS5
CPU_DTE2_DTR
USBH1_SEL
EBn[0..1]
R_NF_ALE
F_PC_POEn
USBH2_ENn
USBH1_MODE
VPP_EN
SD1_WPn
ATA_IOIS16n
CPU_UART2_CTS
F_CPU_FPSHIFT
FIR_ENn
CPU_USB_BYP
F_PC_RW
VCC_EN[0..1]
CPU_DTE2_RI
F_CPU_HSYNC
A[0..25]
MSHC1_DETn
R_NF_WEn
CPU_USB_OC
CPU_SCK5
F_LCD_HSYNC
ATA_ENn
PC_CEn[1..2]
SD1_DETn
CPU_UART2_RXD
R_NF_CEn
CPU_UART2_TXD
D[0..15]
CSI_ENn
SD1_SEL
PR_TRACE_CTRL
LBAn
UART1_MBAUD
CP37
MT-1-1(option)
GND
CP38
MT-1-1(option)
GND
CP35
ST-4-2
GND
CP2
ST-4-2
GND
CP40
MT-1-1(option)
GND
CP1
ST-4-2
GND
CP34
ST-4-2
GND
CP16
ST-4-2
GND
CP39
MT-1-1(option)
GND
CN_TDI/D0
CN_TDO/CONF_DONE
CN_CONFIGn
CN_TCK/DCLK
Page 55
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
NVCC5
NVCC5
1Vrms
0.707Vrms
LINE 0.707Vrms
0.17Vrms
1.7Vrms
SC06040Z-0 2 A
AC97 CODEC
A3
239Thursday, December 21, 2006
KZM-ARM11-01
Kyoto Microcomputer Co., Ltd.
Title
Size Document Number Rev
Date: Sheet
of
CODEC_nID1
CODEC_PHONE_IN
CODEC_LINE_OUT_R
CODEC_MONO_OUT
CODEC_CD_GND
CODEC_AUX_R
CODEC_MIC2
CODEC_nID0
CODEC_AUX_L
CODEC_MIC1
CODEC_HP_OUT_R
CODEC_CD_L
CODEC_CD_R
CODEC_HP_OUT_L
CPU_SCK4
CODEC_LINE_IN_L
CODEC_LINE_IN_R
CPU_SFS4
CODEC_LINE_OUT_L
AVDD4
AVSS4
AVSS4
AVDD4
CODEC_AUX_R
CODEC_AUX_L
CODEC_MONO_OUT
CODEC_LINE_IN_L
CODEC_PHONE_IN
CODEC_CD_L
CODEC_CD_GND
CODEC_MIC2
AC_SYNC
AC_DATA_OU T
CODEC_LINE_IN_R
CODEC_MIC1
CODEC_REFOUT
CODEC_REFOUT
RSTn
RSTn
CODEC_CD_R
CODEC_LINE_OUT_L
CODEC_LINE_OUT_R
CODEC_HP_OUT_R
CODEC_HP_OUT_L
CPU_SRXD4
CPU_STX D4
CODEC_nID0
CODEC_nID1
AC_DATA_OU T
AC_SYNC
CODEC_A5V+5V
CODEC_A5V
CODEC_A5V
CODEC_A5V
+3.0V
+3.0V
CODEC_A5V
CODEC_GND
CODEC_GND
CODEC_GND
CODEC_GND
CODEC_GND
CODEC_GND
CODEC_GND
CODEC_GND
CODEC_GND
CODEC_GND
CODEC_GND
CODEC_GND
CODEC_GND
CODEC_GND
CODEC_GND
CODEC_GND
CODEC_GND
CODEC_GND
CODEC_GND
CODEC_GND
CODEC_GND
CODEC_GND
CODEC_GND
CODEC_GND
CODEC_GND
+3.0V
1
R179
MCR03 000
0om
1
R207
MCR03 472(option)
4.7Kom
Y1
HC-49/US 24.576MHz
1 2
BEEP
LM4549A NC
IC5
AD1981BJS TZ
39
41
35
36
37
8
48
3
27
28
47
26
12
42
4
7
14
15
20
19
18
23
24
21
22
13
45
46
11
5
10
2
6
25
38
43
34
1
9
40
44
33
17
16
29
30
31
32
HP_OUT_L
HP_OUT_R
LINE_OUT_L
LINE_OUT_R
MONO_OUT
SDATA_IN
SPDIF
XTL_OUT
VREF
VREFOUT
EAPD
AVSS1
NC
NC
DVSS1
DVSS2
AUX_L
AUX_R
CD_ R
CD_GND_REF
CD_L
LINE_IN_L
LINE_IN_R
MIC1
MIC2
PHONE_IN
ID0
ID1
RESET
SDATA_OUT
SYNC
XTL_IN
BIT_CLK
AVDD1
AVDD2
AVDD3
AVDD4
DVDD1
DVDD2
AVSS2
AVSS3
AVSS4
JS0
JS1
AFILT1
AFILT2
AFILT3
AFILT4
J3
HSJ1601-0111 10
1
2
3
4
5
+
1
C13
F931C105M AA
1uF 16V
1
R178
MCR03 000
0om
1
C27
MCH154CN104K
470pF 25V
1
R205
MCR03 000
0om
1
C212
1
C28
MCH154CN104K
0.1uF 10V
1
R185
MCR03 473
47Kom
1
R184
MCR03 102(option)
1Kom
1
R180
MCR03 000
0om
1
C206
1
R188
MCR03 103
10Kom
1
R29
MCR03 472(option)
4.7Kom
1
C35
MCH154CN104K
0.1uF 10V
1
C218
MCH154CN104K
0.1uF 10V
+
1
C16
F931C105MAA(option )
1uF 16V
+
1
C471
F930J227MCC
220uF 6.3V
1
R200
MCR03 000
0om
1
C207
MCH154CN104K
0.1uF 10V
1
R189
MCR03 000
0om
1
C217
MCH154CN104K
0.1uF 10V
+
1
C14
F931C105M AA
1uF 16V
1
R177
MCR03 000
0om
1
R27
1
C228
MCH185A 330J
33pF 50V
1
R187
MCR03 000
0om
J1
HSJ1601-0111 10
1
2
3
4
5
1
C40
+1C470
UUD1E101MCL-1GS
100uF 25V
1
C182
MCH185 471
100pF 50V
1
R183
MCR03 102
1Kom
1
R190
MCR03 103
10Kom
1
C190
MCH154CN104K
0.1uF 10V
1
C215
1
C227
MCH185A 330J
33pF 50V
JP14
XJ8D0 311
123
1
R493
MCR03 000(option)
0om
1
C183
MCH185 471
470pF 50V
1
C185
MCH185 471
470pF 50V
1
C213
MCH185 102
1000pF 50 V
1
C208
1
R484
MCR03 103
10Kom
+
1
C29
UUD1E101MCL-1GS
100uF 25V
1
C216
+
1
C15
F931C105M AA
1uF 16V
+
1
C12
F931C105M AA
1uF 16V
1
R215
1
C205
1
R522
MCR03 472
4.7Kom
1
R176
MCR03 000
0om
1
C211
MCH154CN104K
0.1uF 10V
1
R201
MCR03 000
0om
1
C30
MCH154CN104K
0.1uF 10V
JP13
XJ8D0 311
123
1
C33
1
R181
MCR03 000
0om
1
R26
MCR03 000
0om
1
R483
MCR03 103
10Kom
1
R20
MCR03 000
0om
1
C204
MCH154CN104K
0.1uF 10V
1
R199
MCR03 103(option)
10Kom
1
R186
MCR03 473
47Kom
1
C184
MCH185 471
470pF 50V
1
R216
1
C209
J2
HSJ1601-0111 10
1
2
3
4
5
1
R33
1
R523
MCR03 472
4.7Kom
1
C186
MCH185 471
470pF 50V
+
1
C472
F930J227MCC
220uF 6.3V
1
C181
MCH185 471
470pF 50V
1
R32
MCR03 000
0om
CPU_SFS4
CPU_SCK4
RSTn
CPU_STXD 4
CPU_SRXD4
Page 56
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
SC06040Z-03 A
ADDRESS BUFFER
A4
339Friday, November 10, 2006
Kyoto Microcomputer Co., Ltd.KZM-ARM11-01
Title
Size Document Number Rev
Date: Sheet
of
MEM_A7
A13
A7
A6
A10
A12
A2
A5
MEM_A11
A11
A9
A3
CPU_A14
MEM_A13
MEM_A12
MEM_A1
MEM_A8
A4
MEM_A10
A15
MEM_A9
MEM_A2
MEM_A3
A8
A0
A1
A14
MEM_A5
MEM_A0
MEM_A6
MEM_A4
A16
A21
EBn1
CPU_OEn
CPU_RW
A19
CPU_EBn1
A25
A18
A23
A22
A24
LBAn
A20
EBn0
CPU_LBAn
OEn
CPU_BCLK
A17
CPU_EBn0
RW
MEM_A0
MEM_A1
MDRAM_A1
MEM_A2
MDRAM_A0
MEM_A3
MEM_A4 MEM_A7
MEM_A5
MEM_A6 MEM_A9
MEM_A12
MEM_A11
MEM_A8
EBn[0..1]
LBAn
RW
OEn
A[0..25]CPU_A[0..25]
CPU_OEn
CPU_RW
CPU_LBAn
CPU_BCLK
CPU_A15
CPU_A16
CPU_A17
CPU_A18
CPU_A19
CPU_A20
CPU_A21
CPU_A22
CPU_A23
CPU_A24
CPU_A25
CPU_EBn[0..1]
MDRAM_A[0..13]
MEM_A[0..12]
CPU_A1
CPU_A0
CPU_A5 CPU_A8
MEM_A13
MDRAM_A2
MDRAM_A3
MDRAM_A4
MDRAM_A5
MDRAM_A6
MDRAM_A7
MDRAM_A8
MDRAM_A9
MDRAM_A11
CPU_A9
CPU_A11CPU_A4
CPU_A6
CPU_A7
CPU_A3
CPU_A2
CPU_A12
BCLK
MDRAM_A12
MDRAM_A13
MEM_A10
CPU_A10
CPU_A13
NVCC2
NVCC2
NVCC2
+3.0V
NVCC2
NVCC2
NVCC2
+3.0V+3.0V
+3.0V
1
C244
MCH154CN104K
0.1uF 10V
1
C266
MCH154CN104K
0.1uF 10V
1
R54
MCR01 330
33om
1
R516
MCR01 330(option)
33om
1
C95
MCH154CN104K
0.1uF 10V
1
C68
MCH154CN104K
0.1uF 10V
1
R260
MCR01 330
33om
1
R257
MCR01 330
33om
1
R259
MCR01 330
33om
1
R256
MCR01 330
33om
IC25
SN74AVCA164245GR
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
1DIR
1B1
1B2
GND
1B3
1B4
VCCB
1B5
1B6
GND
1B7
1B8
2B1
2B2
GND
2B3
2B4
VCCB
2B5
2B6
GND
2B7
2B8
2DIR
2OE
2A8
2A7
GND
2A6
2A5
VCCA
2A4
2A3
GND
2A2
2A1
1A8
1A7
GND
1A6
1A5
VCCA
1A4
1A3
GND
1A2
1A1
1OE
1
C293
MCH154CN104K
0.1uF 10V
1
R43
MCR03 472
4.7Kom
1
R56
MCR01 330
33om
1
C292
MCH154CN104K
0.1uF 10V
1
R66
MCR01 330
33om
IC54
SN74AVCA164245GR
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
1DIR
1B1
1B2
GND
1B3
1B4
VCCB
1B5
1B6
GND
1B7
1B8
2B1
2B2
GND
2B3
2B4
VCCB
2B5
2B6
GND
2B7
2B8
2DIR
2OE
2A8
2A7
GND
2A6
2A5
VCCA
2A4
2A3
GND
2A2
2A1
1A8
1A7
GND
1A6
1A5
VCCA
1A4
1A3
GND
1A2
1A1
1OE
1
R90
MCR01 330
33om
1
R64
MCR01 330
33om
1
R60
MCR01 330
33om
1
R285
MCR03 472
4.7Kom
1
R61
MCR01 330
33om
1
R50
MCR01 330
33om
1
C300
MCH154CN104K
0.1uF 10V
1
R264
MCR01 330
33om
1
R57
MCR01 330
33om
1
R515
MCR01 330
33om
1
R286
MCR03 330
33om
1
C56
MCH154CN104K
0.1uF 10V
1
R42
MCR03 103
10Kom
1
R251
MCR01 330
33om
1
R244
MCR01 330
33om
1
R245
MCR01 330
33om
1
R263
MCR01 330
33om
1
R273
MCR03 103
10Kom
1
R59
MCR01 330
33om
1
R65
MCR01 330
33om
1
R252
MCR01 330
33om
1
R243
MCR01 330
33om
1
R67
MCR01 330
33om
1
R62
MCR01 330
33om
1
R55
MCR01 330
33om
EBn[0..1]
LBAn
RW
OEn
A[0..25]CPU_A[0..25]
CPU_BCLK
CPU_OEn
CPU_EBn[0..1]
CPU_RW
CPU_LBAn
MDRAM_A[0..13] MEM_A[0..12]
BCLK
Page 57
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
デバイス側
スペックは82
入れ替え可 デバイス側
コネクタ側
デバイス側
SC06040Z-0 4 A
ATA
A3
439Friday, November 10, 2006
Kyoto Microcomputer Co., Ltd.
KZM-ARM11-01
Title
Size Document Number Rev
Date: Sheet
of
CPU_CSI_D6
BF_ATA_D A0
ATA_ENn
ATA_SEL
CPU_USBH2_CLK
CPU_CSI_HSYNC
CPU_USBH2_DIR
CPU_I2C1_CLK
CPU_CSI_PIXCLK
ATA_ENn
CPU_CSI_D15
ATA_SEL
CPU_CSPI1_SS[0..2]
CPU_CSPI1_SS0
STXD3
STXD6
R_USBH2_D1
BF_ATA_D A2
CPU_USBH2_STP
ATA_SEL
SRXD3
CPU_I2C1_CLK
ATA_ENn
CPU_I2C1_DAT
BF_ATA_ D3
CPU_CSPI1_SPI_RDY
CPU_CSI_HSYNC
SCK6
SRXD6
R_USBH2_D[0..1]
CPU_CSI_D9
CPU_CSPI1_SS1
CPU_CSI_D14
CPU_USBH2_NXT
CPU_CSI_D[6..15]
CPU_CSPI1_SCLK
CPU_PWMO
CPU_COMPARE
SRXD6
SCK3
CPU_USBH2_NXT
BF_ATA_ D2
ATA_SEL
STXD3
ATA_ENn
CPU_CSPI1_SCLK
CPU_CSI_D11
SCK3
CPU_CSPI1_SS2
SRXD3
BF_ATA_ D1
CPU_CSI_VSYNC CPU_I2C1_DAT
CPU_CSI_D8
BF_ATA_D A1
ATA_SEL
ATA_BUF_EN
BF_ATA_IORDY
CPU_CSI_VSYNC
ATA_SEL
ATA_ENn
CPU_CSI_D10
ATA_ENn
ATA_SEL
CPU_CAPTURE
BF_ATA_ D0
CPU_CSI_D12
CPU_CSPI1_SS2
CPU_CSI_PIXCLK
BF_ATA_INTR Q
CPU_CSI_MCLK
CPU_CSI_MCLK
CPU_CSPI1_SS1
CPU_CSPI1_SPI_RDY
CPU_CSI_D13
SFS3 CPU_CAPTURE
SCK6
STXD6
CPU_CSI_D7
ATA_ENn
CPU_COMPARE
BF_ATA_DMA RQ
SFS3
CN_ATA_D0
CN_ATA_IORDYn
CN_ATA_DIOWn
CN_ATA_DA0
CN_ATA_DA1
CN_ATA_DMARQn
CN_ATA_DIORn
CN_ATA_DMACKn
CN_ATA_INTRQn
CN_ATA_DA2
CN_ATA_CSn0
CN_ATA_CSn1
CN_ATA_DASPn
CN_ATA_DIAGn
BF_ATA_D A2
BF_ATA_D A0
BF_ATA_D A1
BF_ATA_ D3
BF_ATA_ D2
BF_ATA_ D1
CN_ATA_RESET n
CN_ATA_IOIS16n
R_USBH2_D0
CPU_CSPI1_SCLK
BF_ATA_ D8
BF_ATA_ D9
BF_ATA_ D6
BF_ATA_D 12
BF_ATA_D 11
BF_ATA_ D7
BF_ATA_D 10
BF_ATA_D 15
BF_ATA_D 14
BF_ATA_ D5
BF_ATA_D 13
BF_ATA_ D4
BF_ATA_ D0
BF_ATA_ D9
BF_ATA_ D8
BF_ATA_D 10
BF_ATA_D 11
BF_ATA_D 12
BF_ATA_D 14
BF_ATA_D 15
BF_ATA_D 13
BF_ATA_ D6
BF_ATA_ D4
BF_ATA_ D7
BF_ATA_ D5
CPU_USBH2_STP
CPU_USBH2_CLK
CPU_USBH2_DIR
CPU_CSPI1_SS0
CPU_PWMO
CPU_CSPI1_MISO
CSPI1_MOSI
CPU_CSPI1_MISO
CSPI1_MOSI
CSPI1_MOSI
CPU_CSPI1_MISO
ATA_D6
ATA_D1
ATA_D0
ATA_D3
ATA_D5
ATA_D2
ATA_D7
ATA_D4
CN_ATA_D1
CN_ATA_D2
CN_ATA_D3
CN_ATA_D4
CN_ATA_D5
CN_ATA_D6
CN_ATA_D7
CN_ATA_D8
CN_ATA_D9
CN_ATA_D10
CN_ATA_D11
CN_ATA_D12
CN_ATA_D13
CN_ATA_D14
CN_ATA_D15
CN_ATA_D2
CN_ATA_D1
CN_ATA_D4
CN_ATA_D0
CN_ATA_D3
CN_ATA_D5
CN_ATA_D6
CN_ATA_D7
CN_ATA_D8
CN_ATA_D11
CN_ATA_D13
ATA_D9
CN_ATA_D12
ATA_D 13
ATA_D 11
ATA_D 14
ATA_D 12
ATA_D 10
ATA_D 15
ATA_D8
CN_ATA_D9
CN_ATA_D10
CN_ATA_D14
CN_ATA_IOIS16n
CN_ATA_DASPn
ATA_DAS Pn
CN_ATA_DIAGnATA_DIAG n
ATA_IOIS1 6n
ATA_D6
ATA_D1
ATA_D 13
ATA_D0
ATA_D9
ATA_D 12
ATA_D3
ATA_D 15
ATA_D8
ATA_D 11
ATA_D5
ATA_D2
ATA_D 14
ATA_D7
ATA_D4
BF_ATA_ D9
BF_ATA_ D5
BF_ATA_ D7
BF_ATA_ D2
BF_ATA_ D3
BF_ATA_ D6
BF_ATA_ D1
BF_ATA_ D4
BF_ATA_D 15
BF_ATA_ D8
BF_ATA_D 14
BF_ATA_D 11
BF_ATA_D 12
BF_ATA_ D0
BF_ATA_D 13
ATA_ENn
ATA_CSn 0
ATA_D A0
CN_ATA_DIORn
ATA_IORDYn
CN_ATA_DA1
ATA_DIORn
CN_ATA_DA0
CN_ATA_DIOWn
CN_ATA_CSn0
CN_ATA_DA2
CN_ATA_INTRQn
ATA_D A2
CN_ATA_IORDYn
ATA_D A1
CN_ATA_INTRQn
CN_ATA_IORDYn
CN_ATA_CSn1
CN_ATA_RESET n
CN_ATA_DMACKn
CN_ATA_DMARQn
ATA_DMARQ n
ATA_CSn 1
ATA_DIOW n
CN_ATA_DMARQn
ATA_INTRQn
ATA_RES ETn
ATA_DMACK n
CN_ATA_D15
ATA_ENn
ATA_BUF_EN
ATA_D 10BF_ATA_D 10
ATA_CSn 1
BF_ATA_INTR Q
ATA_DMARQ n
ATA_DMACK n
CPU_ATA_DIOR
ATA_DIOW n
ATA_D A1
ATA_RES ETnCPU_ATA_RESE Tn
CPU_ATA_DIOW
BF_ATA_DMA RQ
BF_ATA_D A1
CPU_ATA_DMACK
BF_ATA_D A0
BF_ATA_IORDY
ATA_INTRQn
ATA_D A0
CPU_ATA_CS1
ATA_DIORn
ATA_IORDYn
ATA_D A2BF_ATA_D A2
CPU_ATA_CS0 ATA_CSn0
CN_ATA_D12
CN_ATA_D14
CN_ATA_D6
CN_ATA_D2
CN_ATA_D1
CN_ATA_D0
CN_ATA_D15
CN_ATA_D11
CN_ATA_D10
CN_ATA_D3
CN_ATA_D13
CN_ATA_D8
CN_ATA_D9
CN_ATA_D7
CN_ATA_D5
CN_ATA_D4
ATA_BUF_EN
ATA_ENn
+3.0V +5V
+3.0V
+3.0V+3.0V+3.0V
+3.0V +3.0V +3.0V
ATA_P WR
+3.0V
ATA_PW R
+3.0V
+3.0V
+3.0V
+3.0V
+3.0V
ATA_PW R
ATA_PW R
+3.0V
ATA_PW R
+3.0V
+3.0V
+3.0V
1
R300
MCR03 102
1Kom
1
C325
MCH154CN104K
0.1uF 10V
IC64
SN74CB3Q3257PW R
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
S
1B1
1B2
1A
2B1
2B2
2A
GND
3A
3B2
3B1
4A
4B2
4B1
OE
VCC
1
C326
IC61
SN74CB3Q3257PW R
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
S
1B1
1B2
1A
2B1
2B2
2A
GND
3A
3B2
3B1
4A
4B2
4B1
OE
VCC
1
C129
RA52
BCN104AB104J7(option)
1
2
3
4 5
6
7
8
1
2
3456
7
8
1
R271
IC65
SN74CB3Q3257PW R
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
S
1B1
1B2
1A
2B1
2B2
2A
GND
3A
3B2
3B1
4A
4B2
4B1
OE
VCC
1
C372
MCH154CN104K
RA55
BCN104AB330J 7
1
2
3456
7
8
1
2
3456
7
8
RA51
BCN104AB104J7(option)
1
2
3
4 5
6
7
8
1
2
3456
7
8
1
R350
MCR03 103
10Kom
1
R339
1
C371
MCH154CN104K
0.1uF 10V
RA39
BCN104AB103J 7
1
2
3
4 5
6
7
8
1
2
3456
7
8
IC62
SN74CB3Q3257PW R
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
S
1B1
1B2
1A
2B1
2B2
2A
GND
3A
3B2
3B1
4A
4B2
4B1
OE
VCC
RA37
BCN104AB103J 7
1
2
3
4 5
6
7
8
1
2
3456
7
8
1
C374
MCH154CN104K
0.1uF 10V
1
R239
5.6Kom
MCR03 562
1
C373
MCH154CN104K
0.1uF 10V
1
C501
MCH154CN104K
0.1uF 10V
1
C369
MCH154CN104K
0.1uF 10V
1
C314
RA65
BCN104AB220J 7
1
2
3
45
6
7
8
1
2
3456
7
8
RA59
BCN104AB330J 7
1
2
3456
7
8
1
2
3456
7
8
IC89
SN74LVC1G06DCK T
2 4
3 5
1
1
R338
1
C370
MCH154CN104K
0.1uF 10V
1
R253
MCR03 472
4.7Kom
1
R340
MCR03 103
10Kom
CN11
A3-44DA-2DS(71 )
28
32
34
36
38
1
21
23
25
27
29
31
33
35
37
39
17
15
13
11
9
7
5
3
4
6
8
10
12
14
16
18
20
2
19
22
24
26
30
40
41
42
44
43
CSEL
IOIS16
PDIAG
DA2
CS1
RESET
DMARQ
DIOW
DIOR
IORDY
DACK
INTRQ
DA1
DA0
CS0
DASP
DD0
DD1
DD2
DD3
DD4
DD5
DD6
DD7
DD8
DD9
DD10
DD11
DD12
DD13
DD14
DD15
KEYPIN
GND
GND
GND
GND
GND
GND
GND
+5V(LOGIC)
+5V(MOTOR)
TYPE
GND
RA53
BCN104AB330J 7
1
2
3456
7
8
1
2
3456
7
8
1
R341
1
R258
MCR03 220
22om
1
R488
33om
MCR03 330
1
R311
MCR03 103
10Kom
1
R265
MCR03 103
10Kom
1
R485
MCR03 103
10Kom
1
C324
MCH154CN104K
0.1uF 10V
1
R486
33om
MCR03 330
IC63
SN74CB3Q3257PW R
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
S
1B1
1B2
1A
2B1
2B2
2A
GND
3A
3B2
3B1
4A
4B2
4B1
OE
VCC
RA58
BCN104AB330J 7
1
2
3456
7
8
1
2
3456
7
8
1
C342
Q3
HAT1041T
1
4
326
7
5
8
1
R249
MCR03 471
470om
IC88
SN74LVC1G14DCK T
2 4
3 5
1
1
C502
MCH154CN104K
0.1uF 10V
RA57
BCN104AB330J 7
1
2
3456
7
8
1
2
3456
7
8
JP3
XJ8D0 311
SILK:ATAPWR_ SEL
123
RA40
BCN104AB103J 7
1
2
3
4 5
6
7
8
1
2
3456
7
8
RA56
BCN104AB104J7(option)
1
2
3
4 5
6
7
8
1
2
3456
7
8
RA38
BCN104AB103J 7
1
2
3
4 5
6
7
8
1
2
3456
7
8
+1C301
F931C106M AA
10uF 16V
IC66
SN74CB3Q3257PW R
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
S
1B1
1B2
1A
2B1
2B2
2A
GND
3A
3B2
3B1
4A
4B2
4B1
OE
VCC
1
R261
RA60
BCN104AB330J 7
1
2
3
45
6
7
8
1
2
3456
7
8
1
C130
1
C296
MCH154CN104K
0.1uF 10V
IC28
SN74LVC16245AD GG
1
24
48
25
4
10
15
21
28
34
39
45
7
18
31
42
2
3
5
6
8
9
11
12
13
14
16
17
19
20
22
23
47
46
44
43
41
40
38
37
36
35
33
32
30
29
27
26
1DIR
2DIR
1OE
2OE
GND
GND
GND
GND
GND
GND
GND
GND
VCC
VCC
VCC
VCC
1B1
1B2
1B3
1B4
1B5
1B6
1B7
1B8
2B1
2B2
2B3
2B4
2B5
2B6
2B7
2B8
1A1
1A2
1A3
1A4
1A5
1A6
1A7
1A8
2A1
2A2
2A3
2A4
2A5
2A6
2A7
2A8
1
C341
IC29
SN74LVC162244ADGG R
2
3
5
6
8
9
11
12
13
14
16
17
19
20
22
23
43
44
46
47
37
38
40
41
32
33
35
36
26
27
29
30
1
24
25
48
7
18
31
42
4 10
15 21
28 34
3945
1Y1
1Y2
1Y3
1Y4
2Y1
2Y2
2Y3
2Y4
3Y1
3Y2
3Y3
3Y4
4Y1
4Y2
4Y3
4Y4
1A4
1A3
1A2
1A1
2A4
2A3
2A2
2A1
3A4
3A3
3A2
3A1
4A4
4A3
4A2
4A1
1OE
4OE
3OE
2OE
VCC
VCC
VCC
VCC
GND GND
GND GND
GND GND
GNDGND
1
C297
MCH154CN104K
0.1uF 10V
RA54
BCN104AB104J7(option)
1
2
3
4 5
6
7
8
1
2
3456
7
8
SRXD3
CPU_I2C1_CLK
CPU_CSI_VSYNC
R_USBH2_D[0..1]
CPU_PWMO
CPU_COMPARE
CPU_CSPI1_SCLK
CPU_USBH2_CLK
CPU_CSI_HSYNC
SFS3
CPU_CSI_MCLK
SCK6
SRXD6
CPU_CSI_D[6..15]
ATA_SEL
CSPI1_MOS I
CPU_USBH2_NXT
CPU_USBH2_DIR
ATA_ENn
STXD6
CPU_CSPI1_SS[0..2]
STXD3
CPU_CSI_PIXCLK
CPU_CSPI1_MISO
SCK3
CPU_CSPI1_SPI_RDY
CPU_I2C1_DAT
CPU_USBH2_STP
CPU_CAPTURE
ATA_DIAG n
ATA_DASP n
ATA_IOIS1 6n
CPU_ATA_RESET n
CPU_ATA_CS1
CPU_ATA_DIOW
CPU_ATA_DIOR
CPU_ATA_DMACK
CPU_ATA_CS0
Page 58
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
FVCC max 1.6V min 1.3V typ 1.4V
SC06040Z-0 5 A
CPU POWER
A3
539Friday, November 10, 2006
Kyoto Microcomputer Co., Ltd.
KZM-ARM11-01
Title
Size Document Number Rev
Date: Sheet
of
CPU_NVCC2
CPU_NVCC2
CPU_NVCC2
FVCC
+3.0V
NVCC2
QVCC_L2
QVCC_ARM
QVCC_PEAR
NVCC10
NVCC1
+3.0V
NVCC3
NVCC7
NVCC5
NVCC6
+3.0V
NVCC4
NVCC8
QVCC_L2
QVCC_PEAR
FVCC
QVCC_ARM
+3.0V
+3.0V
+3.0V
+3.0V
+3.0V
+3.0V
XVCC
+3.0V
NVCC10
NVCC5
NVCC4
NVCC6
NVCC7
NVCC1
NVCC8
QVCC_ARM
QVCC_PEAR
NVCC3
XVCC
QVCC_PEAR
QVCC_L2
NVCC2
NVCC2
NVCC2
+3.0V
+3.0V
+
1
C93
F931C106M AA
10uF 16V
+
1
C83
F931C106M AA
10uF 16V
1
C96
MCH154CN104K
0.1uF 10V
1
C102
MCH154CN104K
0.1uF 10V
1
C98
MCH154CN104K
0.1uF 10V
1
C315
MCH154CN104K
0.1uF 10V
IC30A
MCIMX31VKN5_P WR
E24
E22
D25
D1
C26
C25
C24
C2
C1
B26
B2
B1
AF26
AF25
AF2
AF1
AE26
V17
AE25
T13
AE24
T12
AE2
R16
AD26
R15
AD25
R13
AD24
R12
AD2
P16
AD1
P15
AC26
P14
AC2
P13
A26
P12
A25
N16
A2
N15
N14
N12
M16
M15
R14
M14
N13
M13
B25
M12
AE1
M11
A1
L12
F21
J17
K18
G21
G19
Y20
Y19
Y18
Y17
Y16
Y15
Y14
Y13
Y12
Y11
Y9
Y10
Y7
W7
Y8
AA6
N11
M9
L9
L18
L19
G7
F6
E5
K15
J16
J15
P18
N18
T18
R18
J13
J12
T11
R11
P11
P9
L11
K9
J11
J10
T9
R9
U9
N9
AC24
Y6
AA24
AB24
V15
T15
V14
T14
V16
T16
L14
L13
J14
V11
V10
U18
M18
L16
L15
V13
V12
GND01
GND02
GND03
GND04
GND05
GND06
GND07
GND08
GND09
GND10
GND11
GND12
GND13
GND14
GND15
GND16
GND17
GND18
GND19
GND20
GND21
GND22
GND23
GND24
GND25
GND26
GND27
GND28
GND29
GND30
GND31
GND32
GND33
GND34
GND35
GND36
GND37
GND38
GND39
GND40
GND41
GND42
GND43
GND44
GND45
GND46
GND47
GND48
GND49
GND50
GND51
GND52
GND53
GND54
GND55
GND56
GND57
GND58
GND59
NVCC9
NVCC10
NVCC11
NVCC12
NVCC20
NVCC21
NVCC22
NVCC23
NVCC210
NVCC211
NVCC212
NVCC224
NVCC225
NVCC226
NVCC227
NVCC228
NVCC220
NVCC221
NVCC222
NVCC223
NVCC30
NVCC31
NVCC32
NVCC40
NVCC41
NVCC50
NVCC51
NVCC52
NVCC60
NVCC61
NVCC62
NVCC70
NVCC71
NVCC72
NVCC73
NVCC80
NVCC81
NVCC100
NVCC101
NVCC102
NVCC103
QVCC1_0
QVCC1_1
QVCC1_2
QVCC1_3
QVCC4_0
QVCC4_1
QVCC4_2
QVCC4_3
FUSE_VDD
IOQVDD
FVCC
FGND
MVCC
MGND
SVCC
SGND
UVCC
UGND
QVCC0
QVCC1
QVCC2
QVCC3
QVCC4
QVCC5
QVCC6
QVCC7
QVCC8
QVCC9
QVCC10
1
C138
MCH154CN104K
0.1uF 10V
1
R77
MCR03 000
0om
1
C323
MCH154CN104K
0.1uF 10V
+
1
C81
F931C106M AA
10uF 16V
+
1
C88
F931C106M AA
10uF 16V
1
C99
MCH154CN104K
0.1uF 10V
1
C316
MCH154CN104K
0.1uF 10V
1
C118
MCH154CN104K
0.1uF 10V
1
R134
MCR03 000(option)
0om
1
C347
MCH154CN104K
0.1uF 10V
1
C139
MCH154CN104K
0.1uF 10V
1
R86
MCR03 000
0om
1
C285
MCH154CN104K
0.1uF 10V
1
C345
MCH154CN104K
0.1uF 10V
1
C309
MCH154CN104K
0.1uF 10V
1
C112
MCH154CN104K
0.1uF 10V
1
C317
MCH154CN104K
0.1uF 10V
1
C127
MCH154CN104K
0.1uF 10V
1
R238
MCR03 1501
1.5Kom
1
C135
MCH154CN104K
0.1uF 10V
1
C82
MCH154CN104K
0.1uF 10V
1
C361
MCH154CN104K
0.1uF 10V
1
C331
MCH154CN104K
0.1uF 10V
1
C136
MCH154CN104K
0.1uF 10V
1
C100
MCH154CN104K
0.1uF 10V
1
R266
MCR03 000(option short)
0om
1
C117
MCH154CN104K
0.1uF 10V
1
C299
MCH154CN104K
0.1uF 10V
1
C330
MCH154CN104K
0.1uF 10V
1
C302
MCH154CN104K
0.1uF 10V
VR6
G43B 50Kom(TOCOS option)
13
2
1
C366
MCH154CN104K
0.1uF 10V
1
R91
MCR03 000
0om
1
R138
MCR03 000
0om
1
C350
MCH154CN104K
0.1uF 10V
1
C114
MCH154CN104K
0.1uF 10V
1
R293
MCR03 000
0om
1
C121
MCH154CN104K
0.1uF 10V
1
C346
MCH154CN104K
0.1uF 10V
1
C122
MCH154CN104K
0.1uF 10V
1
C319
MCH154CN104K
0.1uF 10V
JP9
XJ8C0211(option short)
SILK:FVCC
1
2
JP5
XJ8C0211(option short)
SILKSVCC
1
2
1
C113
MCH154CN104K
0.1uF 10V
IC21
LP2951A CM
8 1
7
43
5
2
6
VIN VOUT
FB
GNDSD
ERROR
SENCE
VTAP
1
C337
MCH154CN104K
0.1uF 10V
1
C340
MCH154CN104K
0.1uF 10V
1
C119
MCH154CN104K
0.1uF 10V
1
C310
MCH154CN104K
0.1uF 10V
1
C332
MCH154CN104K
0.1uF 10V
IC26
LP2951ACM(option )
8 1
7
43
5
2
6
VIN VOUT
FB
GNDSD
ERROR
SENCE
VTAP
1
C334
MCH154CN104K
0.1uF 10V
1
C338
MCH154CN104K
0.1uF 10V
1
C360
MCH154CN104K
0.1uF 10V
1
C128
MCH154CN104K
0.1uF 10V
1
R105
MCR03 000
0om
1
C111
MCH154CN104K
0.1uF 10V
1
C273
MCH154CN104K
0.1uF 10V
1
R274
MCR03 104(option)
100Ko m
1
C101
MCH154CN104K
0.1uF 10V
1
C351
MCH154CN104K
0.1uF 10V
1
C141
MCH154CN104K
0.1uF 10V
1
C283
MCH154CN104K
0.1uF 10V
+
1
C91
F931C106M AA
10uF 16V
+
1
C71
F931C106M AA
10uF 16V
+
1
C92
F931C106M AA
10uF 16V
1
C97
MCH154CN104K
0.1uF 10V
1
R151
MCR03 000(option)
0om
JP7
XJ8C0211(option short)
SILK:NVCC2
1
2
1
C359
MCH154CN104K
0.1uF 10V
1
C116
MCH154CN104K
0.1uF 10V
1
C107
MCH154CN104K
0.1uF 10V
JP8
XJ8D0311(option 1-2short)
3X1
1
2
3
1
C94
MCH154CN104K
0.1uF 10V
1
C362
MCH154CN104K
0.1uF 10V
1
C322
MCH154CN104K
0.1uF 10V
1
C336
MCH154CN104K
0.1uF 10V
1
R122
MCR03 000
0om
1
C120
MCH154CN104K
0.1uF 10V
1
R367
MCR03 000(option)
0om
1
C108
MCH154CN104K
0.1uF 10V
1
C339
MCH154CN104K
0.1uF 10V
1
R150
MCR03 000
0om
1
C318
MCH154CN104K
0.1uF 10V
1
R387
MCR03 000(option)
0om
1
R240
MCR03 103
10Kom
1
C131
MCH154CN104K
0.1uF 10V
1
C303
MCH154CN104K
0.1uF 10V
JP6
XJ8C0211(option short)
SILKXVC C
1
2
1
C126
MCH154CN104K
0.1uF 10V
1
C123
MCH154CN104K
0.1uF 10V
1
C115
MCH154CN104K
0.1uF 10V
1
C137
MCH154CN104K
0.1uF 10V
1
C333
MCH154CN104K
0.1uF 10V
1
C298
MCH154CN104K
0.1uF 10V
1
R149
MCR03 000
0om
1
C335
MCH154CN104K
0.1uF 10V
1
R294
MCR03 000(option short)
0om
Page 59
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3
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2
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1
D D
C C
B B
A A
SC06040Z-06 A
CTRL
A4
639Friday, November 10, 2006
KZM-ARM11-01
Kyoto Microcomputer Co., Ltd.
Title
Size Document Number Rev
Date: Sheet
of
CYC
CYC
VCC_EN[0..1]
LAN_IRQ
UART1_ENn
EBn[0..1]
USBH1_OVR
ATA_DASPn
USBH1_MODE
UART1_SDn
ECBn
BCLK
PME
ATA_SEL
ATA_DIAGn
RSTn
ATA_ENn
DRWn
CSn[0..5]
USBH2_SEL
USBH1_SEL
DOEn
USBH2_ENn
ATA_IOIS16n
VPP_EN
UART2_ENn
USBH1_ENn
UART1_MBAUD
LAN_CSn
M_OEn
FLSH_CSn
STD_CSn
M_WEn[0..1]
SD1_SEL
LCD_ON
TUCH_ENn
CSI_ENn
BK_LIGHT_ONn
R_NF_WPn
R_NF_WEn
R_NF_CEn
R_NF_ALE
R_NF_REn
R_NF_RB
D[0..15]
A[0..25]
R_NF_CLE
M_INHn
LBAn
RW
CPU_CAPTURE
ETM_SRSTn
CPU_COMPARE
OEn
CLK_26M FIR_ENn
MSHC1_DETn
SD1_DETn
SD1_WPn
CN_RSTn_IN
F_CPU_HSYNC F_LCD_HSYNC
F_CPU_FPSHIFT
F_PC_RW
CPU_GPIO1_[0..6]
CPU_BATT_LINE
EXT_ECBn
CN_TDI/D0
CN_TDO/CONF_DONE
CN_TMS/nSTATUS
CN_TCK/DCLK
F_PC_POEn
CPU_PC_POEn
CYCLON_POWER
CYCLON_POWER
TCK
TDI
TDO
TMS
CONF_DONEn
TCK
TDI
CEn
STATUSn
TMS
TDO
STATUSn
CSO
DATA
ASDO
CONF_DONEn
CEn
ASDO
CONFIGn
CSO
DCLK
DATA
CEOn
CEOn
SD1_WPn
OEn
CSI_ENn
M_WEn[0..1]
RSTn
R_NF_REn
R_NF_WPn
ATA_DIAGn
CPU_CAPTURE
A[0..25]
R_NF_WEn
D[0..15]
TUCH_ENn
UART_DCE_ENn
SD1_DETn
R_NF_CEn
CSn[0..5]
PME
ETM_SRSTn
ATA_IOIS16n
BCLK
R_NF_ALE
M_OEn
EBn[0..1]
M_INHn
BK_LIGHT_ONn
USBH1_SEL
ATA_ENn
R_NF_RB
LAN_CSn
DRWn
USBH1_OVR
FIR_ENn
R_NF_CLE
CPU_COMPARE
USBH1_ENn
USBH2_ENn
DOEn
ATA_SEL
ECBn
LAN_IRQ
VCC_EN[0..1]
CLK_26M
LCD_ON
FLSH_CSn
UART1_SDn
LBAn
MSHC1_DETn
USBH2_SEL
USBH1_MODE
RW
SD1_SEL
STD_CSn
UART1_MBAUD
VPP_EN
ATA_DASPn
UART2_ENn
CN_RSTn_IN
F_CPU_HSYNC F_LCD_HSYNC
F_CPU_FPSHIFT
F_PC_RW
CPU_GPIO1_[0..6]
CPU_BATT_LINE
EXT_ECBn
CONFIGn
CN_TDO/CONF_DONE
CN_TMS/nSTATUS
CN_TDI/D0
CN_TCK/DCLK
DCLK
F_PC_POEn
CPU_PC_POEn
+3.0V
+3.0V
+3.0V
+3.0V
+3.0V
+3.0V
1
R49
MCR03 102
1Kom
1
R229
MCR03 103
10Kom
1
C61
MCH154CN104K
0.1uF 10V
1
C74
MCH152CN103K
0.01uF 25V
CN10
715D-010GB0AA3
1
3
5
7
9
2
4
6
8
10
DCLK
CONF_DONE
CONFIG
DATAOUT
ASDI
GND
VCC
CE
CS
GND
1
C75
MCH154CN104K
0.1uF 10V
CP41
MT-1-1(option)
H4
RA6
BCN168RBI103J7
1
2
3
4
5
6
7
8
9
10
1
2
3
4
5
6
7
8
9
10
CN12
715D-010GB0AA3
1
3
5 7
9
2
4
6
8
10
TCK
TDO
TMS NC
TDI
GND
VCC
NC
NC
GND
1
C279
MCH154CN104K
0.1uF 10V
1
C242
MCH154CN104K
0.1uF 10V
IC19
PST600K(2.5V)
123
IN
GND
OUT
IC12
EPCS1SI8N
1
2
3
4 5
6
7
8
CS
DATA
VCC
GND ASDI
DCLK
VCC
VCC
IC14A
EP1C6F256CxN_CT
G4
H2
H3
H4
J2
J3
J4
K3
K4
H14
H15
J13
J14
J15
K13
IO/nCSO(B1)
DATA0/DATA0(B1)
nCONFIG/nCONFIG(B1)
nCEO/nCEO(B1)
MSEL1/MSEL1(B1)
MSEL0/MSEL0(B1
nCE/nCE(B1)
IO/ASDO(B1)
DCLK/DCLK(B1)
TDI/TDI(B3)
TDO/TDO(B3)
nSTATUS/nSTATUS(B3)
TCK/TCK(B3)
TMS/TMS(B3)
CONF_DONE/CONF_DONE(B3)
R_NF_RB
R_NF_REn
R_NF_WPn
R_NF_CEn
R_NF_WEn
R_NF_ALE
R_NF_CLE
D[0..15]
A[0..25]
RW
M_INHn
LBAn
OEn
ETM_SRSTn
CSn[0..5]
EBn[0..1] LAN_CSn
FLSH_CSn
M_WEn[0..1]
STD_CSn
M_OEn
ATA_IOIS16n
ATA_DIAGn
ATA_DASPn
LAN_IRQ
PME
USBH1_ENn
USBH2_ENn
USBH1_OVR
USBH1_MODE
USBH1_SEL
USBH2_SEL
ATA_ENn
ATA_SEL
VPP_EN
UART1_SDn
UART1_MBAUD
UART1_ENn
VCC_EN[0..1]
SD1_SEL
CLK_26M
LCD_ON
DOEn
TUCH_ENn
DRWn
BK_LIGHT_ONn
CSI_ENn
FIR_ENn
MSHC1_DETn
SD1_DETn
SD1_WPn
BCLK
CPU_CAPTURE
CPU_COMPARE
ECBn
RSTn
UART2_ENn
CN_RSTn_IN
F_CPU_HSYNC F_LCD_HSYNC
F_CPU_FPSHIFT
F_PC_RW
CPU_GPIO1_[0..6]
EXT_ECBn
CPU_BATT_LINE
CN_TDI/D0
CN_TCK/DCLK
CN_TDO/CONF_DONE
CN_TMS/nSTATUS
F_PC_POEn
CPU_PC_POEn
Page 60
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4
4
3
3
2
2
1
1
D D
C C
B B
A A
SC06040Z-0 7 A
CYCLON
A3
739Friday, November 10, 2006
KZM-ARM11-01
Kyoto Microcomputer Co., Ltd.
Title
Size Document Number Rev
Date: Sheet
of
EXT_BUS
EXT_BUS
BCLK
EXT_INTn
RSTn
CN_TCK/DCLK
CN_CONFIGn
CN_TMS/nSTATUS
CN_TDI/D0
CN_TDO/CONF_DONE
H_RDn
H_WRn
TG_ID
A[0..25]
D[0..15]
CPU_GPIO1_[0..6]
EXT_ECBn SW_LED
SW_LED
SEG[0..7]
L_DB[0..7]
MD_SWn[0..3]
SW[0..3]
LED[0..3]
L_E
L_RW
L_RS
NAND_FLASH
NAND_FLASH
F_D[0..15]
NF_RB
NA_CSn[0..3]
NF_WEn
NF_ALE
NF_CLE
NF_REn
NF_WPn
NF_DETn
NV1
NV1
BT_MD[0..4]
CLKO
ETM_SR STn
CPU_GPIO1_[0..6]
CPU_RST_INn
CPU_CAPTURE
CPU_COMPARE
CLKH
CLKl
CPU_PORn
RST_IN
VCC_EN[0..1]
CSn[0..5]
RW
CLKL
D9
BCLK
OEn
NA_CSn0
NF_ALE
NF_WPn
NA_CSn3
NF_WEn
NF_CLE
NF_REn
NA_CSn2
CLKH
D12
CLKO
NF_RB
NA_CSn1
M_INHn
NF_DETn
H_WRn
TG_ID
M_WEn1
EBn0
EXT_I NTn
M_OEn
M_WEn0
LBAn
LED0
EBn1
ECBn
H_RDn
SW1
SW2
LAN_IRQ
CPU_RST_INn
SW3
PME
SW0
FLSH_CSn
STD_CSn
CPU_GPIO1_1
LAN_CSn
CPU_GPIO1_0
CN_TDO/CONF_DONE
TG_ID
BCLK
D[0..15]
EXT_E CBn
H_RDn
CN_TDI/D0
RSTn
EXT_I NTn
CN_TMS/nSTATUS
CN_CONFIGn
H_WRn
CN_TCK/DCLK
R_NF_RB
R_NF_ALE
R_NF_CLE
R_NF_WEn
R_NF_CEn
R_NF_REn
R_NF_WPn
A23
A2
A22
A7
A1
A11
A6
A5
A4
A10
A0
A21
A9
A3
A25
A[0..25]
A24
A8
A20
RSTn
L_E
L_DB0
L_RW
L_RS
L_DB1
L_DB2
L_DB3
L_DB4
L_DB5
L_DB6
L_DB7
MD_SWn0
MD_SWn3
MD_SWn2
MD_SWn1
BT_MD2
BT_MD1
BT_MD0
BT_MD4
BT_MD3
CSn0
CSn1
CSn5
CSn4
CN_RSTn_IN
SEG0
SEG1
SEG2
SEG3
SEG4
SEG5
SEG6
SEG7
LED1
LED2
LED3
D11
D8
D4
D6
D10
D13
D0
D7
D3
D1
D5
D15
D2
D14
CN_TDO/CONF_DONE
CN_TCK/DCLK
CN_CONFIGn
CN_TMS/nSTATUS
CN_TDI/D0
L_DB[0..7]
NF_WPn
NF_DETn
CLKH
CPU_GPIO1_[0..6]
NF_RB
BT_MD[0..4]
L_RW
LED[0..3]
F_D[0..15] SEG[0..7]
NF_ALE
NA_CSn[0..3]
L_E
MD_SWn[0..3]
NF_REn
NF_CLE
CPU_CAPTURE
L_RS
CPU_RST_INn
NF_WEn
CLKL
ETM_SR STn
CPU_COMPARE
CLKO
SW[0..3]
USBH2_ENn
SD1_WPn
SD1_SE L
ATA_IOIS1 6n
BK_LIGHT_ONn
MSHC1_DETn
VCC_EN1
USBH1_MODE
SD1_DETn
USBH2_SEL
ATA_SEL
ATA_DAS Pn
USBH1_ENn
FIR_ENn
UART1_ENn
DOEn
UART2_ENn
CSI_ENn
USBH1_OVR
ATA_DIAG n
UART1_MBAUD
LCD_ON
ATA_ENn
USBH1_SEL
UART1_SDn
TUCH_ENn
PME
ECBn
EBn[0..1]
LBAn
LAN_IRQ
M_INHn
M_WEn[0..1]
M_OEn
DRWn
CLK_26 M
VPP_EN
VCC_EN0
F_CPU_HSYNC
F_LCD_HSYNC
F_CPU_FPSHIFT
F_PC_RW
CN_RSTn_IN
F_D8
F_PC_RW
F_CPU_HSYNC
F_CPU_FPSHIFT
F_LCD_HSYNC
CPU_GPIO1_2
CPU_GPIO1_2
RST_OU T
CPU_BATT_LIN E
EXT_E CBn
CPU_PORn
CPU_PORn
RST_IN
RST_IN
S_RST
S_RST
A12
F_PC_POEn
F_PC_POEn
F_D7
F_D1
F_D6
F_D5
F_D0
F_D4
RST_OU T
F_D12
F_D9
F_D11
F_D10
F_D15
F_D13
F_D14
F_D3
F_D2
CPU_PC_POEn
CPU_PC_POEn
CPU_GPIO1_6
CPU_GPIO1_[0..6]
+3.0V
+3.0V
+3.0V
+3.0V
+3.0V
+3.0V
+3.0V +3.0V
IC87
SN74LVC1G14DCK T
2 4
3 5
1
1
C278
MCH154CN104K
0.1uF 10V
1
C264
MCH154CN104K
0.1uF 10V
IC86
SN74LVC1G14DCK T
2 4
3 5
1
1
C246
MCH154CN104K
0.1uF 10V
CP62
MT-1-1(option)
CPU_GPIO1_6
1
C249
MCH154CN104K
0.1uF 10V
1
C238
MCH154CN104K
0.1uF 10V
CP42
MT-1-1(option)
CPU_GPIO1_2
1
C498
MCH154CN104K
0.1uF 10V
1
C277
MCH154CN104K
0.1uF 10V
CP44
MT-1-1(option)
CN_RST_IN
1
C274
MCH154CN104K
0.1uF 10V
IC14D
EP1C6F256CxN_iMX_ 2
K1
P2
L1
N1
M11
R2
R1
D13
N2
N10
P11
P10
N11
L2
C10
D10
C12
D12
C11
C9
M8
M9
M1
N7
N8
M7
B14
C14
B15
K2
R7
P6
D11
F15
F16
D15
E16
G15
B13
A13
A11
K14
L14
M14
N14
P14
N13
M13
N12
M15
L15
M16
C13
B12
B10
B8
R13
L16
K15
G3
F3
E2
E1
F4
D9
F2
F1
G2
J1
G16
H16
F12
L12
M12
M5
C16
K11
P16
T3
T14
L7
L10
T2
T4
R5
R3
R6
R4
T6
K16
J16
T13
N16
N15
R16
P13
T15
P15
R15
R14
R12
P12
IO/LVDS6p(1)
IO/LVDS1n(1)
IO/LVDS6n(1)
IO/LVDS4p(1)
IO/VREF0B4(4)
IO/LVDS71p(4)
IO/LVDS1p(1)
IO/LVDS35p(3)
IO/LVDS3p/DQ0L4(1)
IO/LVDS58p(4)
IO/LVDS57n(4)
IO/LVDS58n(4)
IO/LVDS56p(4)
IO/LVDS5p(1)
IO/LVDS27n(2)
IO/LVDS27p(2)
IO/LVDS31p/DQ0T3(2)
IO/LVDS30n(2)
IO/LVDS29n(2)
IO/LVDS25p(2)
IO(4)
IO(4)
IO/LVDS5n(1)
IO/LVDS64n(4)
IO/LVDS62p(4)
IO(4)
IO/LVDS33n(2)
IO/LVDS35n(3)
IO/LVDS34n(2)
IO/PLL1_OUTn(1)
IO/LVDS65n(4)
IO/LVDS66p/DQ1B4(4)
IO/LVDS30p(2)
IO/LVDS40n(3)
IO/LVDS42p(3)
IO/LVDS38n(3)
IO/LVDS40p(3)
IO/LVDS42n(3)
IO/LVDS32n/DQ0T0(2)
IO/LVDS32p/DQ0T1(2)
IO/LVDS28n(2)
IODQ1R6(3)
IO/LVDS45n(3)
IO/LVDS47n(3)
IO/LVDS48n/DQ1R5(3)
IO/LVDS51p(3)
IO/LVDS51n(3)
IO/LVDS48p/DQ1R4(3)
IO/LVDS56n(4)
IO/LVDS46n(3)
IO/LVDS45p(3)
IO/LVDS46p(3)
IO/LVDS33p(2)
IO/LVDS31n/DQ0T2(2)
IO/LVDS28p(2)
IO/LVDS23p(2)
IO/LVDS54n/DQ1B0(4)
IO/LVDS44n(3)
IO/PLL2_OUTn(3)
IO/LVDS9n(1)
IO/LVDS9p(1)
IO/LVDS10p(1)
IO/LVDS8n(1)
IO(1)
IO/LVDS25n/DM0T(2)
IO/LVDS8p(1)
IO/LVDS7n/DM0L(1)
IO/LVDS7p(1)
IO/PLL1_OUTp(1)
CLK2/LVDSCLK2p(B3)
CLK3/LVDSCLK2n(B3)
IO/DPCLK4/DQS0R(B3)
IO/DPCLK5/DQS1R(B3)
IO/DPCLK6/DQS0B(B4)
IO/DPCLK7/DQS1B(B4)
VCCIO3
VCCIO3
VCCIO3
VCCIO4
VCCIO4
VCCIO4
VCCIO4
IO/LVDS71n(4)
IO/LVDS69n(4)
IO/LVDS68p/DQ1B7(4)
IO/LVDS70p(4)
IO/LVDS66n(4)
IO/LVDS69p(4)
IO/LVDS65p(4)
IO/LVDS44p(3)
IO/PLL2_OUTp(3)
IO/LVDS54p/DQ1B1(4)
IO/LVDS49p(3)
IO/LVDS49n/DQ1R7(3)
IO/LVDS50p(3)
IO/LVDS53n(4)
IO/LVDS52p(4)
IO/LVDS50n(3)
IO/LVDS52n(4)
IO/LVDS53p(4)
IO/LVDS55n/DQ1B2(4)
IO/LVDS55p/DQ1B3(4)
1
C237
MCH154CN104K
0.1uF 10V
1
C496
MCH154CN104K
0.1uF 10V
1
C240
MCH154CN104K
0.1uF 10V
1
C261
MCH154CN104K
0.1uF 10V
1
C241
MCH154CN104K
0.1uF 10V
IC14C
EP1C6F256CxN_iMX_ 1
D1
D2
E6
E3
E4
D4
G1
H1
L5
F5
E12
C1
G6
P1
A3
A14
F7
F10
E5
D5
D6
C6
D7
C7
D8
C8
D3
C2
B1
B2
A2
C3
B3
C4
B4
A4
C5
B5
R10
T11
D16
E15
P7
T8
R8
P8
R9
A8
B9
A9
B11
N6
M6
P5
N5
P4
N4
P3
N3
M4
L3
L4
K5
M3
M2
B6
A6
F14
B7
T9
R11
E11
M10
B16
P9
N9
A15
C15
D14
E14
E10
E13
E7
E8
E9
F13
G5
G12
G13
G14
H12
H13
K12
L13
H5
IO/LVDS10n(1)
IO/LVDS11n/DQ0L3(1)
IO/VREF2B2(2)
IO/LVDS11p/DQ0L2(1)
IO/LVDS12n/DQ0L1(1)
IO/LVDS14p/INIT_DONE(1)
CLK0/LVDSCLK1p(B1)
CLK1/LVDSCLK1n(B1)
IO/DPCLK0/DQS1L(B1)
IO/DPCLK1/DQS0L(B1)
IO/DPCLK3/DQS0T(B2)
VCCIO1
VCCIO1
VCCIO1
VCCIO2
VCCIO2
VCCIO2
VCCIO2
IO/DPCLK2/DQS1T(B2)
IO/LVDS19p(2)
IO/LVDS19n(2)
IO/LVDS20p(2)
IO/LVDS22n(2)
IO/LVDS22p(2)
IO/LVDS24p(2)
IO/LVDS24n(2)
IO/LVDS12p/DQ0L0(1)
IO/LVDS13p/CLKUSR(1)
IO/LVDS13n(1)
IO/LVDS15p/DEV_CLRn(2)
IO/LVDS15n/DEV_OE(2)
IO/LVDS14n(1)
IO/LVDS16p(2)
IO/LVDS16n(2)
IO/LVDS17p/DQ0T7(2)
IO/LVDS17n/DQ0T6(2)
IO/LVDS18n/DQ0T4(2)
IO/LVDS18p/DQ0T5(2)
IO/LVDS59p(4)
IO/LVDS59n(4)
IO/LVDS39p(3)
IO/LVDS39n(3)
IO/LVDS64p(4)
IO/LVDS63n(4)
IO/LVDS63p(4)
IO/LVDS62n(4)
IO/LVDS61p/DM1B(4)
IO/LVDS23n(2)
IO/LVDS26p(2)
IO/LVDS26n(2)
IO/LVDS29p(2)
IO/LVDS67n/DQ1B5(4)
IO/VREF2B4(4)
IO/LVDS68n/DQ1B6(4)
IO/LVDS67p(4)
IO/LVDS70n(4)
IO/LVDS0n(1)
IO/LVDS0p(1)
IO/LVDS2n/DQ0L7(1)
IO/LVDS2p/DQ0L6(1)
IO(1)
IO(1)
IO/VREF2B1(1)
IO/LVDS3n/DQ0L5(1)
IO/LVDS4n(1)
IO/LVDS20n(2)
IO/LVDS21p(2)
IO/LVDS41n(3)
IO/LVDS21n(2)
IO/LVDS61n(4)
IO/LVDS57p(4)
IO/VREF0B2(2)
IO/VREF1B4(4)
IO/LVDS36n(3)
IO/LVDS60p(4)
IO/LVDS60n(4)
IO/LVDS34p(2)
IO/LVDS36p(3)
IO/LVDS37p/DQ1R1(3)
IO/LVDS38p/DQ1R3(3)
IO/VREF1B2(2)
IO/LVDS37n/DQ1R2(3)
IO(2)
IO(2)
IO(2)
IO/LVDS41p(3)
IO/VREF0B1(1)
IO/VREF0B3(3)
IO/LVDS43p(3)
IO/LVDS43n/DM1R(3)
IO/VREF1B3(3)
IODQ1R0(3)
IO/VREF2B3(3)
IO/LVDS47p(3)
IO/VREF1B1(1)
1
C275
MCH154CN104K
0.1uF 10V
1
C248
MCH154CN104K
0.1uF 10V
1
C262
MCH154CN104K
0.1uF 10V
VCC_EN[0..1]
D[0..15]
CSn[0..5]
RW
OEn
STD_CSn
LAN_CSn
FLSH_CSn
R_NF_CLE
R_NF_WEn
R_NF_WPn
R_NF_ALE
R_NF_REn
R_NF_RB
R_NF_CEn
A[0..25]
CN_RSTn_IN
CPU_CAPTURE
ETM_SR STn
CPU_COMPARE
USBH2_SEL
UART1_ENn
USBH1_ENn
ATA_ENn
USBH1_SEL
BK_LIGHT_ONn
ATA_DASP n
LCD_ON
USBH2_ENn
SD1_SE L
USBH1_MODE
ATA_IOIS1 6n
SD1_DETn
UART2_ENn
CSI_ENn
ATA_SEL
UART1_MBAUD
USBH1_OVR
UART1_SDn
TUCH_ENn
SD1_WPn
MSHC1_DETn
FIR_ENn
DOEn
ATA_DIAG n
M_INHn
ECBn
EBn[0..1]
LBAn
LAN_IRQ
M_OEn
M_WEn[0..1]
PME
DRWn
CLK_26 M
VPP_EN
BCLK
F_CPU_HSYNC
F_LCD_HSYNC
F_CPU_FPSHIFT
F_PC_RW
CPU_GPIO1_[0..6]
CPU_BATT_LINE
EXT_E CBn
RSTn
CN_TDO/CONF_DONE
CN_TDI/D0
CN_TCK/DCLK
CN_TMS/nSTATUS
F_PC_POEn
CPU_PC_POEn
Page 61
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
SC06040Z-08 A
CYCLON POWER
A4
839Friday, November 10, 2006
Kyoto Microcomputer Co., Ltd.KZM-ARM11-01
Title
Size Document Number Rev
Date: Sheet
of
+1.5v
+1.5v
+1.5v
+1.5v
+1.5v
+1.5v
+3.0V
+3.0V
1
C247
MCH154CN104K
0.1uF 10V
IC16
MAX1644EAE+
2
4
12
11
1
6
7
14
16
8
13
15
9
10
5
3
IN0
IN1
VCC
FBSEL
SHDN
COMP
TOFF
LX1
LX2
FB
PGND0
PGND1
GND
REF
SS
LX0
1
R232
MCR03 1502
15Kom
1
C234
UMK212F105ZG
1uF 50V
1
C245
UMK212F105ZG
1uF 50V
1
C276
MCH154CN104K
0.1uF 10V
1
C271
MCH185 471
470PF 50V
1
C254
MCH154CN104K
0.1uF 10V
+
1
C260
F931C106MAA
10uF 16V
1
C257
MCH154CN104K
0.1uF 10V
1
L2
CDRH4D28-4R7NC
1
C252
MCH154CN104K
0.1uF 10V
1
C79
UMK212F105ZG
1uF 50V
1
C70
EMK316F106ZL
10uF 16V
1
C280
UMK212F105ZG
1uF 50V
1
C239
MCH154CN104K
0.1uF 10V
1
R51
MCR03 204
200Kom
1
C80
MCH152CN103K
0.01uF 25V
1
C243
UMK212F105ZG
1uF 50V
1
C259
MCH154CN104K
0.1uF 10V
1
R235
MCR03 2001
2Kom
1
C256
MCH154CN104K
0.1uF 10V
1
C258
MCH154CN104K
0.1uF 10V
1
C235
UMK212F105ZG
1uF 50V
1
R225
MCR10 100
10om
1
C263
MCH154CN104K
0.1uF 10V
+
1
C251
F931C106MAA
10uF 16V
1
C253
MCH154CN104K
0.1uF 10V
1
R52
MCR03 4702
47Kom
IC14B
EP1C6F256CxN_P1
A1
A12
A16
A5
F11
F6
F8
F9
G11
G7
G9
H10
H8
J7
J9
K10
K6
K8
L11
L6
L8
L9
T1
T12
T16
T5
A10
A7
G10
G8
H7
H9
J10
J8
K7
K9
T10
T7
H11
H6
J11
J12
J5
J6
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
VCCINT
VCCINT
VCCINT
VCCINT
VCCINT
VCCINT
VCCINT
VCCINT
VCCINT
VCCINT
VCCINT
VCCINT
VCCA_PLL2
VCCA_PLL1
GNDA_PLL2
GNDG_PLL2
GNDG_PLL1
GNDA_PLL1
1
C255
MCH154CN104K
0.1uF 10V
1
C62
UMK212F105ZG
1uF 50V
Page 62
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
SC06040Z-09 A
SDRAM
A4
939Friday, November 10, 2006
KZM-ARM11-01
Kyoto Microcomputer Co., Ltd.
Title
Size Document Number Rev
Date: Sheet
of
SDRAM0
Mobile_SDRAM
DRAM_DQM[0..3]
DRAM_D[0..31]
MDRAM_A[0..13]
DRAM_BA[0..1]
DRAM_CSn[0..1]
DRAM_CKE[0..1]
DRAM_RASn
DRAM_CASn
DRAM_WEn
DRAM_CLK
DRAM_CLKn
DRAM_DQS[0..3]
SDRAM1
SDRAM
SDRAM_D[0..31]
MEM_A[0..12]
SDRAM_DQM[0..3]
SDRAM_BA[0..1]
SDRAM_CKE[0..1]
SDRAM_CSn[0..1]
SDRAM_CLK
SDRAM_RASn
SDRAM_CASn
SDRAM_WEn
SDRAM_A10
SDRAM_CT_REG
SDRAM_CT_REG
DRAM_CLK
SDRAM_CLK
SDCLK
MA10 MDRAM_A10
SDRAM_A10
DRAM_CASn
SDRAM_RASn
nCAS
SDRAM_CASn
nRAS DRAM_RASn
SDRAM_BA[0..1]
SDBA[0..1]
R_PC_CEn[1..2]
DRAM_BA[0..1]
SDRAM_WEn
DRAM_WEnnSDWE
DRAM_CKE[0..1]SDCKE[0..1]
SDRAM_CKE[0..1]
DQM[0..3] DRAM_CSn[0..1]
CDS[0..1]
SDRAM_CSn[0..1]
SDRAM_DQM[0..3]
DRAM_DQM[0..3]
SDQS[0..3]
SDCLKn
DRAM_CLKn
DRAM_DQS[0..3]
SDRAM_DT_REG
SDRAM_DT_REG
SDRAM_D[0..31]
DRAM_D[0..31]
SD[0..31]
SD0
SD1
SD2
SD3
SD4
SD5
SD6
SD7
SD8
SD9
SD10
SD11
SD12
SD13
SD14
SD15
SD16
SD17
SD18
SD19
SD20
SD21
SD22
SD23
SD24
SD25
SD26
SD27
SD28
SD29
SD30
SD31
DQM0
DQM1
DQM2
DQM3
SDQS0
SDQS1
SDQS2
SDQS3
SDCKE0
SDCKE1
CDS0
CDS1
MA10
SDBA0
SDBA1
nRAS
nCAS
nSDWE
SDCLK
SDCLKn
DRAM_BA[0..1]
DRAM_RASn
DRAM_D[0..31]
DRAM_DQM[0..3]
DRAM_CSn[0..1]
MDRAM_A[0..13]
DRAM_WEn
DRAM_CASn
DRAM_CKE[0..1]
DRAM_CLK
MDRAM_A[0..13]
SDRAM_DQM[0..3]
SDRAM_WEn
SDRAM_RASn
SDRAM_CKE[0..1]
SDRAM_CLK
MEM_A[0..12]
SDRAM_D[0..31]
SDRAM_BA[0..1]
SDRAM_nCAS
SDRAM_CSn[0..1]SD[0..31]
DRAM_D[0..31]
SDRAM_D[0..31]
SDCLK
MA10
nCAS
nRAS
nSDWE
DQM[0..3]
SDCKE[0..1]
SDBA[0..1]
CDS[0..1] DRAM_DQM[0..3]
DRAM_WEn
DRAM_RASn
DRAM_CSn[0..1]
DRAM_CLK
DRAM_BA[0..1]
DRAM_CKE[0..1]
DRAM_CASn
SDRAM_DQM[0..3]
SDRAM_nCAS
SDRAM_CLK
SDRAM_BA[0..1]
SDRAM_CKE[0..1]
SDRAM_RASn
SDRAM_CSn[0..1]
SDRAM_WEn
SDRAM_A10
MDRAM_A10
R_PC_CEn[1..2]
SDRAM_A10
SDQS[0..3]
SDCLKn
DRAM_CLKn
DRAM_DQS[0..3]
DRAM_CLKn
DRAM_DQS[0..3]
IC30C
MCIMX31VKN5_NV2_2
AA21
AE20
AD18
AE17
AA19
AD17
AA18
AA17
AE16
AA16
AD15
AA15
AE15
AE14
AD14
AA14
AE13
AD13
AA13
AD12
AA12
AE11
AE10
AA11
AE9
AA10
AE8
AD10
AE7
AA9
AA8
AD9
AE6
AA7
AC1
AD7
AE5
AF19
AD20
AF20
AE21
AD22
AD21
AF21
AD16
AE12
AD11
AD8
AE19
AD19
AA20
AE18
SDCLK
SDCLK_B
SD00
SD01
SD02
SD04
SD03
SD05
SD06
SD07
SD08
SD09
SD10
SD11
SD12
SD13
SD14
SD15
SD16
SD17
SD18
SD19
SD20
SD21
SD22
SD23
SD24
SD25
SD26
SD27
SD28
SD29
SD30
SD31
MA10
SDBA0
SDBA1
RAS
CAS
SDWE
CS2/CDS0
CS3/CDS1
SDCKE0
SDCKE1
SDQS0
SDQS1
SDQS2
SDQS3
DQM0
DQM1
DQM2
DQM3
MDRAM_A[0..13]
R_PC_CEn[1..2]
MEM_A[0..12]
Page 63
5
5
4
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3
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2
2
1
1
D D
C C
B B
A A
CPU SDBA0,1
SC06040Z-10 A
DATA BUFFER
A4
10 39Friday, November 10, 2006
Kyoto Microcomputer Co., Ltd.KZM-ARM11-01
Title
Size Document Number Rev
Date: Sheet
of
CPU_D5
CPU_D11
CPU_D9
D15
D14
CPU_D7
D1
D10
CPU_D4
CPU_D12
D9
D3
D7
CPU_D15
D6
CPU_D1
CPU_D6
DOEn
D8
D2
CPU_D8
CPU_D0
CPU_D13
DRWn
D12
CPU_D2
D4
D0
D5
CPU_D10
CPU_D3
D13
D11
CPU_D[0..15] D[0..15]
CPU_CSn5
CPU_CSn0
CPU_CSn4
CPU_CSn1
CPU_CSn[0..5]
CSn0
CSn4
CSn1
CSn[0..5]
CSn5
R_PC_CEn[1..2]
R_PC_CEn1
R_PC_CEn2
PC_CEn1
PC_CEn2
PC_CEn[1..2]
CPU_D14
NVCC2
NVCC2
+3.0V
NVCC2
NVCC2
+3.0V+3.0V
+3.0V
NVCC2
C287
MCH154CN104K
0.1uF 10V
C281
MCH154CN104K
0.1uF 10V
1
R48
MCR03 472
4.7Kom
IC13
SN74AVCA164245GR
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
1DIR
1B1
1B2
GND
1B3
1B4
VCCB
1B5
1B6
GND
1B7
1B8
2B1
2B2
GND
2B3
2B4
VCCB
2B5
2B6
GND
2B7
2B8
2DIR
2OE
2A8
2A7
GND
2A6
2A5
VCCA
2A4
2A3
GND
2A2
2A1
1A8
1A7
GND
1A6
1A5
VCCA
1A4
1A3
GND
1A2
1A1
1OE
IC22
SN74AVCA164245GR
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
1DIR
1B1
1B2
GND
1B3
1B4
VCCB
1B5
1B6
GND
1B7
1B8
2B1
2B2
GND
2B3
2B4
VCCB
2B5
2B6
GND
2B7
2B8
2DIR
2OE
2A8
2A7
GND
2A6
2A5
VCCA
2A4
2A3
GND
2A2
2A1
1A8
1A7
GND
1A6
1A5
VCCA
1A4
1A3
GND
1A2
1A1
1OE
1
C73
MCH154CN104K
0.1uF 10V
1
C72
MCH154CN104K
0.1uF 10V
1
R47
MCR03 103
10Kom
C286
MCH154CN104K
0.1uF 10V
1
C54
MCH154CN104K
0.1uF 10V
1
C250
MCH154CN104K
0.1uF 10V
C282
MCH154CN104K
0.1uF 10V
DRWn
DOEn
CPU_D[0..15] D[0..15]
CPU_CSn[0..5]
CSn[0..5]
R_PC_CEn[1..2]
PC_CEn[1..2]
Page 64
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
L_LED
U_LED
External DMA request from GPIO1_0
SC06040Z-11 A
EXT CONNECTOR
A4
11 39Friday, November 10, 2006
KZM-ARM11-01 Kyoto Microcomputer Co., Ltd.
Title
Size Document Number Rev
Date: Sheet
of
BCLK
CN_CONFIGn
CN_TMS/nSTATUS
CN_TDO/CONF_DONE
CN_TDI/D0
CN_TCK/DCLK
EXT_INTn
RSTn
TG_ID
H_WRn
H_RDn
H_WRn
H_RDn
A[0..25]
D[0..15]
A0A1
A2A3
A4A5
A6A7
D0D1
D2D3
D4D5
D6D7
D8D9
D10D11
D12D13
D14D15
CPU_GPIO1_2
CPU_GPIO1_3
CPU_GPIO1_0
EXT_ECBn
CPU_GPIO1_[0..6]
+5V+5V
+5V +5V
CN26
FX8C-120P-SV4(71)(option)
3
5
7
9
11
13
15
17
19
21
23
29
27
25
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
1 2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
TCK
GND
TDO
GND
GND
VCC
VCC
GND
CPURST
NMI
INTR
RSV0
GND
PW_SW
GND
REQ1
GND
AD31
AD29
GND
AD27
AD25
GND
C/BE3
GND
AD23
AD21
GND
AD19
AD17
GND
C/BE2
GND
IRDY
DEVSEL
LOCK
PERR
SERR
GND
C/BE1
GND
AD15
AD13
GND
AD11
AD9
GND
RSV4
GND
AD7
AD5
GND
AD3
AD1
GND
RSV5
GND
VCC
VCC
TARG
TRST
GND
TMS
GND
TDI
GND
VCC
VCC
GND
RST
GND
GNT1
GNT2
GND
CLK
GND
REQ2
GND
AD30
AD28
GND
AD26
AD24
GND
RSV1
GND
AD22
AD20
GND
AD18
AD16
GND
FRAME
GND
TRDY
STOP
GND
RSV2
RSV3
GND
PAR
GND
AD14
AD12
GND
AD10
AD8
GND
C/BE0
GND
AD6
AD4
GND
AD2
AD0
GND
RSV6
CPU
VCC
VCC
1
C31
MCH154CN104K
0.1uF 10V
1
C17
MCH154CN104K
0.1uF 10V
1
C26
EMK316F106ZL
10uF 16V
+
1
C36
UUD1E101MCL-1GS
100uF 25V
BCLK
EXT_INTn
RSTn
CN_TCK/DCLK
CN_CONFIGn
CN_TMS/nSTATUS
CN_TDI/D0
CN_TDO/CONF_DONE
H_RDn
H_WRn
TG_IDA[0..25]
D[0..15]
EXT_ECBn
CPU_GPIO1_[0..6]
Page 65
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
External DMA request from GPIO1_0
SC06040Z-12 A
LOCAL MEM CONNECTOR
A4
12 39Friday, November 10, 2006
KZM-ARM11-01 Kyoto Microcomputer Co., Ltd.
Title
Size Document Number Rev
Date: Sheet
of
CSn[0..5]
A[0..25]
EBn[0..1]
EBn1
A14
A17
A4
A12
A6
EBn0RW
LBAn
A21
A18
A7
BCLK
A24
A20
A9
A0
A25
A10
A13
OEn
A8
A5
A1
A15
A11
A22
A16
A3
A2
A19
A23
D3
D1
D13
D6
CSn0 CSn1
D5
D2
D14
D9
D[0..15]
D8
D0
D12
D15
D7
CSn5
D10
CSn4
D4
RSTn
M_OEn
M_WEn[0..1]
M_WEn1
M_WEn0
D11
CN_RSTn_IN
CPU_UART2_TXD
CPU_DTE2_DSR
CPU_UART2_RTS
CPU_DTE2_DTR
CPU_UART2_CTS
CPU_DTE2_RI
CPU_UART2_RXD
CPU_DTE2_DCD
CPU_GPIO1_[0..6]
CPU_GPIO1_4
CPU_GPIO1_5
CPU_GPIO1_0
CPU_SCK5
CPU_SRXD5
CPU_STXD5
CPU_SFS5
CPU_USB_OC
CPU_USB_BYP
CPU_USB_PWR
EXT_ECBn
CN_TDO/CONF_DONE
CN_TDI/D0
EXT_ECBn
+3.0V+5V
+3.0V
1
R529
MCR03 332
3.3Kom
1
C180
MCH154CN104K
0.1uF 10V
1
C179
MCH154CN104K
0.1uF 10V
+
1
C18
UUD1E101MCL-1GS
100uF 25V
CN7
715D-100GB0AA3(option)
12
34
56
78
910
11 12
13 14
15 16
17 18
19 20
21 22
23 24
25 26
27 28
29 30
31 32
33 34
35 36
37 38
39 40
41 42
43 44
45 46
47 48
49 50
51 52
53 54
55 56
57 58
59 60
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99 100
98
96
94
92
90
88
86
84
82
80
78
76
74
72
70
68
66
64
62
+1C7
UUD1E101MCL-1GS
100uF 25V
D[0..15]
RW
EBn[0..1]
A[0..25]
CSn[0..5]
OEn
LBAn
BCLK
RSTn
M_WEn[0..1]
M_OEn
EXT_ECBn
CN_RSTn_IN
CPU_DTE2_RI
CPU_UART2_TXD
CPU_DTE2_DSR
CPU_UART2_CTS
CPU_DTE2_DTR
CPU_DTE2_DCD
CPU_UART2_RTS
CPU_UART2_RXD
CPU_GPIO1_[0..6]
CPU_SRXD5
CPU_STXD5
CPU_SCK5
CPU_SFS5
CPU_USB_OC
CPU_USB_BYP
CPU_USB_PWR
CN_TDI/D0
CN_TDO/CONF_DONE
Page 66
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
↓
S2
7
1
S6
3
S7 S8
5
DOWN
S9
9
S12
2
S4
S11S10
*
→
S1
S14
←
UP 8
S5
0
4
S3
6
#
↑
S13
SC06040Z-13 A
KEY PAD
A4
13 39Friday, November 10, 2006
KZM-ARM11-01 Kyoto Microcomputer Co., Ltd.
Title
Size Document Number Rev
Date: Sheet
of
KEY_COL1 KEY_COL2
KEY_ROW5
KEY_ROW7
KEY_ROW4
KEY_ROW2
KEY_ROW0
KEY_ROW3
KEY_ROW1
KEY_ROW6
KEY_COL3KEY_COL0
KEY_ROW0
KEY_ROW7
KEY_ROW2
KEY_ROW6
KEY_ROW1
KEY_ROW5
KEY_ROW4
KEY_ROW3
+3.0V
+3.0V
D56
1SS420(TPL3_F)
D51
1SS420(TPL3_F)
D35
1SS420(TPL3_F)
KEY3
SKRPABE010(ALPS)
1 4
2 3
KEY24
SKRPABE010(ALPS)
1 4
2 3
KEY18
SKRPABE010(ALPS)
1 4
2 3
KEY5
SKRPABE010(ALPS)
1 4
2 3
D57
1SS420(TPL3_F)
D48
1SS420(TPL3_F)
KEY8
SKRPABE010(ALPS)
1 4
2 3
D26
1SS420(TPL3_F)
D36
1SS420(TPL3_F)
KEY31
SKRPABE010(ALPS)
1 4
2 3
D18
1SS420(TPL3_F)
D19
1SS420(TPL3_F)
D21
1SS420(TPL3_F)
KEY14
SKRPABE010(ALPS)
1 4
2 3
D27
1SS420(TPL3_F)
KEY12
SKRPABE010(ALPS)
1 4
2 3
KEY32
SKRPABE010(ALPS)
1 4
2 3
KEY21
SKRPABE010(ALPS)
1 4
2 3
KEY27
SKRPABE010(ALPS)
1 4
2 3
KEY19
SKRPABE010(ALPS)
1 4
2 3
KEY9
SKRPABE010(ALPS)
1 4
2 3
D20
1SS420(TPL3_F)
D28
1SS420(TPL3_F)
KEY26
SKRPABE010(ALPS)
1 4
2 3
D45
1SS420(TPL3_F)
KEY1
SKRPABE010(ALPS)
1 4
2 3
D34
1SS420(TPL3_F)
D38
1SS420(TPL3_F)
D39
1SS420(TPL3_F)
KEY17
SKRPABE010(ALPS)
1 4
2 3
KEY29
SKRPABE010(ALPS)
1 4
2 3
D43
1SS420(TPL3_F)
D41
1SS420(TPL3_F)
KEY13
SKRPABE010(ALPS)
1 4
2 3
RA19
BCN104AB103J7
1
2
3
4 5
6
7
8
1
2
3456
7
8
KEY28
SKRPABE010(ALPS)
1 4
2 3
KEY30
SKRPABE010(ALPS)
1 4
2 3
KEY6
SKRPABE010(ALPS)
1 4
2 3
KEY7
SKRPABE010(ALPS)
1 4
2 3
KEY4
SKRPABE010(ALPS)
1 4
2 3
D53
1SS420(TPL3_F)
KEY23
SKRPABE010(ALPS)
1 4
2 3
D37
1SS420(TPL3_F)
D52
1SS420(TPL3_F)
KEY11
SKRPABE010(ALPS)
1 4
2 3
D44
1SS420(TPL3_F)
KEY15
SKRPABE010(ALPS)
1 4
2 3
D42
1SS420(TPL3_F)
D50
1SS420(TPL3_F)
KEY22
SKRPABE010(ALPS)
1 4
2 3
D47
1SS420(TPL3_F)
RA20
BCN104AB103J7
1
2
3
4 5
6
7
8
1
2
3456
7
8
D55
1SS420(TPL3_F)
D49
1SS420(TPL3_F)
KEY10
SKRPABE010(ALPS)
1 4
2 3
KEY20
SKRPABE010(ALPS)
1 4
2 3
KEY16
SKRPABE010(ALPS)
1 4
2 3
D40
1SS420(TPL3_F)
KEY25
SKRPABE010(ALPS)
1 4
2 3
D54
1SS420(TPL3_F)
D29
1SS420(TPL3_F)
KEY2
SKRPABE010(ALPS)
1 4
2 3
D46
1SS420(TPL3_F)
KEY_COL[0..3]
KEY_ROW[0..7]
Page 67
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
低ESR=0.1Ω以下
SC06040Z-14 A
LAN
A4
14 39Friday, November 10, 2006
KZM-ARM11-01 Kyoto Microcomputer Co., Ltd.
Title
Size Document Number Rev
Date: Sheet
of
A5
A3
A4
A6
A1
A2
D7
D6
D3
D2
D8
D12
D0
D13
D4
D14
D11
D5
D9
D1
D10
D15
PME
LAN_IRQ
M_OEn
LAN_CSn
A[0..6]
D[0..15]
LAN_IRQ
PME
EECLK
EECS
LEDn1
LEDn2
LEDn3
EECS
EECLK
EEDIO
EEDIO
EEDIO
EECLK
EECS
EEDIO
EECLK
EEDIO
TX+
RX-
TX-
RX+
TX+
LEDn2
TX-
RX-
LEDn1
RX+
LEDn3
RSTn
M_WEn0
A0
FIFO_SEL
FIFO_SEL
FIFO_SEL
EEDIO
+3.0V
+3.0V
+3.0V
+3.0V
+3.0V
+3.0V
LAN_A3V
LAN_A3V
+3.0V
+3.0V
+3.0V
+3.0V
+3.0V
+3.0V
LAN_A3V
+3.0V
+3.0V
1
R480
MCR03 471
470om
Y3
HC-49/US 25MHz
1 2
1
C413
MCH154CN104K
0.1uF 10V
1
R169
MCR03 471(option)
470om
IC41
LAN9118-MT(revB)
2
4
5
6
7
8
9
10
70
72
74
76
87
92
93
94
95
98
99
100
21
22
23
24
25
26
29
30
31
32
33
36
37
38
39
40
43
44
45
46
49
50
51
52
53
56
57
58
59
62
63
64
18
17
16
15
14
13
12
11
68
69
67
20
28
35
42
48
55
61
97
78
79
82
83
19
27
34
41
47
54
60
96
66
1
65
3
77
80
86
88
71
73
84
81
85
89
75
90
91
VREG
VSS_PLL
XTAL2
XTAL1
VDD_PLL
VDD_REF
ATEST
RBIAS
PME
IRQ
SPEED_SEL
FIFO_SEL
EXRESW1
RD
WR
CS
RESET
GPIO0/LED1
GPIO1/LED2
GPIO2/LED3
D31
D30
D29
D28
D27
D26
D25
D24
D23
D22
D21
D20
D19
D18
D17
D16
D15
D14
D13
D12
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
A1
A2
A3
A4
A5
A6
A7
VSS_REF
EECS
EECLK
EEDIO
VDD_IO
VDD_IO
VDD_IO
VDD_IO
VDD_IO
VDD_IO
VDD_IO
VDD_IO
TPO-
TPO+
TPI-
TPI+
GND_IO
GND_IO
GND_IO
GND_IO
GND_IO
GND_IO
GND_IO
GND_IO
GND_CORE
GND_CORE
VDD_CORE
VDD_CORE
VSS_A
VSS_A
VSS_A
VSS_A
NC
NC
NC
VDD_A
VDD_A
VDD_A
NC
NC*2
NC*1
1
C412
EMK316F106ZL
10uF 16V
1
C446
MCH152CN103K
0.01uF 25V
1
R494
MCR03 103(option)
10Kom
1
C427
MCH154CN104K
0.1uF 10V
1
C447
MCH154CN104K
0.1uF 10V
1
C409
MCH154CN104K
0.1uF 10V
1
C162
MCH154CN104K
0.1uF 10V
1
C422
MCH154CN104K
0.1uF 10V
1
R440
MCR03 1242
12.4Kom 1%
1
R167
MCR03 103(option)
10Kom
1
C445
MCH185 682
6800pF 50V
1
R479
MCR03 471
470om
1
C431
MCH154CN104K
0.1uF 10V
+
1
C432
F931C106MAA
10uF 16V
1
C149
MCH154CN104K
0.1uF 10V
1
C160
MCH154CN104K
0.1uF 10V
LED8
SML-311UTT86(option)
SILK:LAN_LED
1
R438
MCR03 105
1Mom
1
R453
J6
LU1S041-43
1
2
3
4
5
6
7
8 9
10
11
12
13
14
TX+
TXCT1
NC
NC
CT2
RX+
RX- GREN_A
GREN_K
YEL_K
YEL_A
Shield
Shield
1
C423
MCH154CN104K
0.1uF 10V
1
C444
MCH185 682
6800pF 50V
1
R439
MCR03 102
1Kom
1
R451
MCR03 49R9
49.9om 1%
1
R471
MCR10 000
0om
1
C410
MCH154CN104K
0.1uF 10V
1
R436
MCR03 103
10Kom
1
C424
MCH154CN104K
0.1uF 10V
1
C151
MCH154CN104K
0.1uF 10V
1
R452
1
R434
MCR03 103
10Kom
1
C425
MCH185A 330J
33pF 50V
CP33
ST-4-2(option)
LAN_CORE
IC40
FM93C46N(option)
1
2
3
4 5
8
CS
SK
DI
DO VSS
VCC
1
R495
MCR03 102
1Kom
1
R441
MCR10 000
0om
1
C430
MCH185A 330J
33pF 50V
IC68
93LC46B-I/SN(option)
1
2
3
4 5
8
CS
SK
DI
DO VSS
VCC
1
R166
MCR03 102(option)
1Kom
1
C426
EMK316F106ZL
10uF 16V
1
C155
MCH154CN104K(option)
0.1uF 10V
1
C152
MCH154CN104K
0.1uF 10V
1
R435
MCR03 1202
12Kom 1%
1
R496
MCR03 102
1Kom
1
R168
MCR03 49R9
49.9om 1%
1
C150
MCH154CN104K
0.1uF 10V
1
C161
MCH154CN104K
0.1uF 10V
1
R461
MCR10 100
10om
A[0..6]
D[0..15]
M_OEn
M_WEn0
LAN_CSn
PME
LAN_IRQ
RSTn
Page 68
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
SC06040Z-1 5 A
LCD
A3
15 39Friday, November 10, 2006
KZM-ARM11-01
Kyoto Microcomputer Co., Ltd.
Title
Size Document Number Rev
Date: Sheet
of
TOUCH
TOUCH
RSTn CN_TCK/DCLK
CN_TMS/nSTATUS
TUCH_ENn
CPU_SD_D_IO
CPU_SD_D_CLK
CPU_PAR_RS
CPU_VSYNC3
CPU_WRITE
CPU_LD0
CPU_LD1
CPU_LD2
CPU_LD3
CPU_LD4
CPU_LD5
CPU_LD6
CPU_LD7
CPU_LD8
CPU_LD9
CPU_LD10
CPU_LD11
CPU_LD12
CPU_LD13
CPU_LD14
CPU_LD15
CPU_LD16
CPU_LD17
CPU_CONTRAST
CPU_VSYNC0
CPU_READ
CPU_SER_RS
CPU_SD_D_I
CPU_LCS1
CPU_DRY0
CPU_HSYNC
CPU_FPSHIFT
CPU_LCS0
LCD_ON
BK_LIGHT_ONn
RSTn
CPU_LD9
CPU_LD7
CPU_LD17
CPU_LD8
CPU_LD1
CPU_LD6
CPU_LD16
CPU_LD0
CPU_LD3
CPU_LD2
CPU_LD11
CPU_LD5
CPU_LD10
CPU_LD4
LCD_B0
LCD_B1
LCD_B2
LCD_B3
LCD_B4
LCD_B5
LCD_B6
LCD_B7
LCD_G0
LCD_G1
LCD_G2
LCD_G3
LCD_G4
LCD_G5
LCD_G6
LCD_G7
LCD_R0
LCD_R1
LCD_R2
LCD_R3
LCD_R4
LCD_R5
LCD_R6
LCD_R7
LCD_B1
LCD_B3
LCD_B2
LCD_B4
LCD_B5
LCD_B6
LCD_B7
LCD_B0
LCD_G2
LCD_G1
LCD_G0
LCD_G3
LCD_G4
LCD_G7
LCD_R1
LCD_R0
LCD_SPEN
LCD_SPCLK
LCD_SPDA T
LCD_SPCLK
LCD_SPDA T
LCD_SPEN
CPU_HSYNC
CPU_FPSHIFT LCD_DCLK
LCD_HSYNC
LCD_VSYNC
LCD_VSYNC
LCD_DCLK
LCD_HSYNC
LCD_ENB
LCD_ENBCPU_READ
CPU_WRITE
BK_LIGHT_ONn
CPU_LCS1
CPU_CONTRAST
LCD_ON
CPU_VSYNC3
CPU_VSYNC0
CPU_CONTRAST
F_LCD_HSYNC
F_CPU_FPSHIFT
F_CPU_HSYNC
LCD_HSYNC
CPU_HSYNC
CPU_FPSHIFT F_CPU_FPSHIFT
F_LCD_HSYNC
F_CPU_HSYNC
CPU_SER_RS
CPU_PAR_RS
CPU_LCS0
CPU_SD_D_CLK
CPU_SD_D_IO
CPU_SD_D_ILCD_SPEN
LCD_SPDA T
LCD_SPCLK
CN_TCK/DCLK
CN_TMS/nSTATUS
RSTn
TUCH_ENn
CPU_D3_SPL
CPU_D3_CLS
CPU_D3_REV
CPU_D3_CLS
CPU_D3_REV
CPU_D3_SPL
CPU_DRY0
LCD_G5
LCD_G6
LCD_R7
LCD_R6
CPU_LD12
LCD_R4CPU_LD14
CPU_LD15
LCD_R3CPU_LD13
LCD_R2
LCD_R5
+3.0V
+3.0V
L+15V
L+5V
L+15V
+3.0V
L+5V
+3.0V
L+5V
L+5VL+5 V
L-10V
GND_L
GND_L
GND_L
GND_L
GND_L
GND_L
GND_L
L+5V
L-10V
GND_L
GND_L
GND_L
+3.0V
+3.0V
L+5V
+3.0V
+3.0V
+3.0V
+3.0V
+3.0V
GND_L
GND_L
GND_L
GND_L
GND_L
+3.0V
+3.0V
1
R424
D10
1SS420(TPL 3_F)
1
R394
MCR03 104
100Ko m
1
C407
MCH154CN104K
0.1uF 10V
1
C110
MCH185 223
0.22uF 50V
1
R401
IC57
MAX1748 EUE+
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
RDY
FB
INTG
IN
GND
REF
FBP
FBN
SHDN
DRVN
SUPN
DRVP
SUPP
PGND
LX
TGND
D16
1SS420(TPL 3_F)
1
C109
MCH185 471
470pF 50V
1
R497
1
R403
MCR03 103
10Kom
1
C125
MCH154CN104K
0.1uF 10V
1
R504
1
C365
MCH154CN104K
0.1uF 10V
1
C403
GMK212BJ474KG- B
0.47uF 35V
CP46
MT-1-1(option)
D3_REV
1
R410
MCR03 470
0om
1
C476
MCH154CN104K
0.1uF 10V
1
R97
MCR03 4023
402Ko m
1
R111
MCR03 3572
35.7Kom
1
R500
MCR03 104
100Ko m
1
R402
MCR03 472
4.7kom
+1C380
F931E106MC C
10uF 25V
D17
1SS420(TPL 3_F)
1
C404
MCH154CN104K(option)
0.1uF 10V
1
R421
4.7Kom
MCR03 472
RA47
BCN104AB000J 7
1
2
3
4 5
6
7
8
1
2
3456
7
8
VR8
G43B 100Kom(TOCO S)
13
2
1
C475
MCH154CN104K
0.1uF 10V
1
R498
MCR03 100(option)
10om
1
R503
MCR03 100(option)
10om
1
R93
1
R343
MCR03 103
10kom
IC67
LT3465AES 6#PBF
1
2
3
4
5
6
VOUT
GNDFBCTRL
VIN
SW
1
R423
CP45
MT-1-1(option)
D3_CLS
1
C474
MCH154CN104K
0.1uF 10V
1
R432
33om
MCR03 330
+
1
C399
F931E106MC C
10uF 25V
CP22
ST-4-2(option)
PAR_RS
1
R344
MCR03 100
10om
1
R412
MCR03 100
10om
RA45
BCN104AB000J 7
1
2
3
4 5
6
7
8
1
2
3456
7
8
D15
1SS420(TPL 3_F)
CN30
F51-254-5221-1(LCD:FT035SB3202 40-B1)
1
2
3
4
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
38
39
40
41
42
45
47
51
52
53
54
5
6
43
44
46
48
49
50
37
VBLVBL-
VBL+
VBL+
POL
/RESET
SPENA
SPCLK
SPDAT
B0
B1
B2
B3
B4
B5
B6
B7
G0
G1
G2
G3
G4
G5
G6
G7
R0
R1
R2
R3
R4
R5
R6
R7
HSYNC
DCLK
VDD
VDD
VCC
VCC
VGL
VGH
VCOM
ENB
GND
VSS
ND
ND
ND
ND
ND
ND
ND
ND
VSYNC
1
R422
1
C358
MCH154CN104K
0.1uF 10V
1
R96
MCR03 4992
49.9Kom
1
R501
MCR03 102
1Kom
1
C477
MCH154CN104K
0.1uF 10V
1
C344
MCH154CN104K
0.1uF 10V
1
R499
1
R404
CP18
ST-4-2(option)
SER_RS
D11
1SS420(TPL 3_F)
CP36
ST-4-2(option)
VSYNC0
D14
1SS420(TPL 3_F)
1
R490
4.7Kom
MCR03 472(option)
IC80
SN74LVC1G06DCK T
24
3 5
1
D9
1SS420(TPL 3_F)
+
1
C379
F931E106MC C
10uF 25V
RA48
BCN104AB000J 7
1
2
3
4 5
6
7
8
1
2
3456
7
8
1
C307
MCH185 473
47000pF 50 V
1
C367
GMK212BJ474KG- B
0.47uF 35V
CP47
MT-1-1(option)
D3_SPL
1
R407
1
L6
LQH32CN220K23K(MURATA)
IC30B
MCIMX31VKN5_NV 7
N21
N24
R26
N25
R20
T26
U25
N26
P26
P21
P20
R25
T24
U26
T21
V25
T20
V26
U24
W25
U21
W26
V24
Y25
Y26
V21
AA25
W24
AA26
V20
R24
P25
P24
N20
T25
R21
FPSHIFT/DISPB_BCLK/SDB_CS_0
VSYNC0/SDB_EC_4
VSYNC3
HSYNC/SDB_EC_5
D3_CLS
D3_REV
D3_SPL
DRY0/SDB_CS_1
LCS0/DISPB_BCLK/MCU3_23
LCS1/MCU3_24
READ
WRITE
LD0/SDB_PC_0
LD1/SDB_PC_1
LD2/SDB_PC_2
LD3/SDB_PC_3
LD4/SDB_PC_4
LD5/SDB_PC_5
LD6/SDB_PC_6
LD7/SDB_PC_7
LD8/SDB_PC_8
LD9/SDB_PC_9
LD10/SDB_PC_10
LD11/SDB_PC_11
LD12/SDB_PC_12
LD13/SDB_PC_13
LD14/SDB_EC_0
LD15/SDB_EC_1
LD16/SDB_EC_2
LD17/SDB_EC_3
CONTRAST
SD_D_IO/SDB_CS_3/MCU3_21
SD_D_CLK/MCU3_22
SD_D_I/SD_D_I/SDB_CS_2/MCU3_20
SER_RS/MCU3_25
PAR_RS
+
1
C329
F931C106M AA
10uF 16V
IC78
SN74LVC1G14DCK T
24
3 5
1
1
R405
MCR03 103
10kom
1
C405
UMK212F105ZG
1uF 50V
CP48
MT-1-1(option)
DRY0
CP23
ST-4-2(option)
LCS1
1
L5
CDRH4D18-6R8NC
1
R411
1
R431
33om
MCR03 330
1
C406
MCH154CN104K
0.1uF 10V
1
R320
MCR03 5493
549Ko m
1
C368
GMK212BJ474KG- B
0.47uF 35V
IC79
NC7SZ125P5X_N L
1
24
3 5
+
1
C400
UUD1E101MCL-1GS
100uF 25V
D12
1SS420(TPL 3_F)
1
C356
MCH185 223
0.22uF 50V
1
R94
MCR03 1202
12Kom
1
R333
MCR03 104
100kom
1
R491
10Kom
MCR03 103(option)
CP29
ST-4-2(option)
LCS0
JP4
XJ8C0 211
SILKLCD_ENB
1
2
Q6
BC847BL T3G
B
CE
1
C321
MCH154CN104K
0.1uF 10V
1
C124
MCH154CN104K
0.1uF 10V
1
R312
MCR03 4992
49.9Kom
1
R406
IC81
SN74LVC1G14DCK T
2 4
3 5
1
1
C352
MCH154CN104K
0.1uF 10V
1
R425
10om
MCR10 100
Q9
BC857BL T3G
B
EC
1
R95
MCR03 1202
12Kom
1
R332
MCR03 103
10kom
1
R342
MCR03 103
10Kom
1
R408
MCR03 472
4.7kom
CP17
ST-4-2(option)
L_WRIT E
1
C411
MCH154CN104K
0.1uF 10V
+
1
C349
F931C106M AA
10uF 16V
CP28
ST-4-2(option)
L_READ
D13
1SS420(TPL 3_F)
1
R409
+1C400A
F931E106MCC(option)
10uF 25V
RA46
BCN104AB000J 7
1
2
3
4 5
6
7
8
1
2
3456
7
8
1
C355
MCH154CN104K
0.1uF 10V
1
R110
MCR03 000
0om
1
R502
1
C357
MCH185 223
0.22uF 50V
LCD_ON
BK_LIGHT_ONn
RSTn
F_CPU_FPSHIFT
F_LCD_HSYNC
F_CPU_HSYNC
CN_TMS/nSTATUS
CN_TCK/DCLK
TUCH_ENn
Page 69
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
SC06040Z-1 6 A
Mobile DDR-SDRAM
A3
16 39Friday, November 10, 2006
KZM-ARM11-01 Kyoto Microcomputer Co., Ltd.
Title
Size Document Number Rev
Date: Sheet
of
DRAM_D17
DRAM_D16
DRAM_D27
DRAM_D19
DRAM_D30
DRAM_D29
DRAM_D24
DRAM_D25
DRAM_D28
DRAM_D20
DRAM_D23
DRAM_D18
DRAM_D31
DRAM_D22
DRAM_D26
DRAM_D21
DRAM_DQM[0..3]
DRAM_BA[0..1]
DRAM_CKE[0..1]
MDRAM_A[0..13]
DRAM_CSn[0..1]
DRAM_D[0..31]
MDRAM_A0
MDRAM_A7
MDRAM_A9
MDRAM_A3
MDRAM_A10
MDRAM_A1
MDRAM_A4
MDRAM_A2
MDRAM_A5
MDRAM_A8
MDRAM_A11
MDRAM_A6
DRAM_BA0
DRAM_BA1
MDRAM_A12
MDRAM_A13
DRAM_D15
DRAM_D14
DRAM_D12
DRAM_D2
DRAM_D4
DRAM_D1
DRAM_D13
DRAM_D6
DRAM_D5
DRAM_D0
DRAM_D7
DRAM_D11
DRAM_D3
DRAM_D9
DRAM_D8
DRAM_D10
MDRAM_A1
MDRAM_A2
DRAM_BA1
DRAM_BA0
MDRAM_A6
MDRAM_A9
MDRAM_A5
MDRAM_A8
MDRAM_A12
MDRAM_A13
MDRAM_A11
MDRAM_A10
MDRAM_A7
MDRAM_A4
MDRAM_A3
MDRAM_A0
DRAM_WEn
DRAM_CASn
DRAM_RASn
DRAM_CSn1
DRAM_RASn
DRAM_WEn
DRAM_CASn
DRAM_CSn1
DRAM_CLK
DRAM_CKE1
DRAM_CKE1
DRAM_CLK
DRAM_DQM3
DRAM_DQM2
DRAM_DQM1
DRAM_DQM0
DRAM_DQS1
DRAM_DQS3
DRAM_DQS0
DRAM_DQS2
DRAM_CLKn
DRAM_DQS[0..3]
DRAM_CLKn
MDRAM_A1
MDRAM_A2
DRAM_BA1
DRAM_DQS1
DRAM_CLK
DRAM_WEn
DRAM_D17
DRAM_D0
DRAM_D30
DRAM_DQM0
DRAM_D31
DRAM_BA0
MDRAM_A6
DRAM_D18
DRAM_D8
DRAM_D26
DRAM_D9
DRAM_D10
MDRAM_A5
MDRAM_A2
MDRAM_A1
DRAM_D5
DRAM_D1
DRAM_D19
DRAM_D15
MDRAM_A12
DRAM_RASn
DRAM_D6
DRAM_D23
DRAM_DQS2
DRAM_CLK
MDRAM_A9
DRAM_D28
MDRAM_A3
DRAM_D12
DRAM_D13
DRAM_D27
MDRAM_A10
MDRAM_A5
DRAM_CLKn
MDRAM_A8
MDRAM_A12
DRAM_WEn
MDRAM_A13
DRAM_D25
DRAM_D22
DRAM_CSn0
DRAM_BA1
DRAM_D2
DRAM_CLKn
MDRAM_A0
DRAM_D20
MDRAM_A11
DRAM_D24
DRAM_DQM1
MDRAM_A11
MDRAM_A8
DRAM_D14
DRAM_DQM2
DRAM_DQS3
DRAM_D21
MDRAM_A10
DRAM_BA0
DRAM_D16
DRAM_CASn
DRAM_D3
DRAM_D4
MDRAM_A7
MDRAM_A6
MDRAM_A4
DRAM_CASn
MDRAM_A13
MDRAM_A9
MDRAM_A3
DRAM_D7
DRAM_D29
DRAM_D11
DRAM_DQS0
MDRAM_A0
MDRAM_A7
DRAM_RASn
MDRAM_A4
DRAM_CSn0
DRAM_DQM3
DRAM_WEn
DRAM_CLK
DRAM_CLKn
DRAM_CASn
DRAM_RASn
DRAM_CKE0
DRAM_CKE0
NVCC2
NVCC2
NVCC2
NVCC2
1
C479
MCH154CN104K
0.1uF 10V
1
C481
MCH154CN104K(option)
0.1uF 10V
1
C392
MCH154CN104K
0.1uF 10V
1
C484
MCH154CN104K
0.1uF 10V
1
C391
MCH154CN104K(option)
0.1uF 10V
1
C383
MCH154CN104K
0.1uF 10V
1
C487
MCH154CN104K
0.1uF 10V
1
C388
MCH154CN104K(option)
0.1uF 10V
1
C493
MCH154CN104K(option)
0.1uF 10V
1
C482
MCH154CN104K(option)
0.1uF 10V
IC34
HYB18M512160AF-7.5(option)
G1
G2
G3
G7
G8
G9
H7
H8
H9
A7
A9
B1
C9
D1
E9
F9
K9
A1
A3
B9
C1
D9
E1
F1
K1
H1
H2
H3
J1
J2
J3
J7
J8
J9
K2
K3
K7
K8
B2
B3
B7
B8
C2
C3
C7
C8
D2
D3
D7
D8
E3
E7
A2
A8
E2
E8
F2
F3
F7
F8
CKE
CK
CK
WE
CAS
RAS
CS
BA0
BA1
VDDQ
VDD
VDDQ
VDDQ
VDDQ
VDDQ
VDD
VDD
VSS
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSS
VSS
A9
A11
A12
A6
A7
A8
A10/AP
A0
A1
A4
A5
A2 A3DQ13
DQ14
DQ1
DQ2
DQ11
DQ12
DQ3
DQ4
DQ9
DQ10
DQ5
DQ6
DQ8
DQ7
DQ15
DQ0
UDQS
LDQS
UDM
NC
NC
LDM
1
C398
MCH154CN104K
0.1uF 10V
IC83
HYB18M512160AF-7.5
G1
G2
G3
G7
G8
G9
H7
H8
H9
A7
A9
B1
C9
D1
E9
F9
K9
A1
A3
B9
C1
D9
E1
F1
K1
H1
H2
H3
J1
J2
J3
J7
J8
J9
K2
K3
K7
K8
B2
B3
B7
B8
C2
C3
C7
C8
D2
D3
D7
D8
E3
E7
A2
A8
E2
E8
F2
F3
F7
F8
CKE
CK
CK
WE
CAS
RAS
CS
BA0
BA1
VDDQ
VDD
VDDQ
VDDQ
VDDQ
VDDQ
VDD
VDD
VSS
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSS
VSS
A9
A11
A12
A6
A7
A8
A10/AP
A0
A1
A4
A5
A2 A3DQ13
DQ14
DQ1
DQ2
DQ11
DQ12
DQ3
DQ4
DQ9
DQ10
DQ5
DQ6
DQ8
DQ7
DQ15
DQ0
UDQS
LDQS
UDM
NC
NC
LDM
1
C480
MCH154CN104K
0.1uF 10V
1
C490
MCH154CN104K(option)
0.1uF 10V
1
C394
MCH154CN104K
0.1uF 10V
1
C393
MCH154CN104K
0.1uF 10V
1
C381
MCH154CN104K(option)
0.1uF 10V
IC84
HYB18M512160AF-7.5(option)
G1
G2
G3
G7
G8
G9
H7
H8
H9
A7
A9
B1
C9
D1
E9
F9
K9
A1
A3
B9
C1
D9
E1
F1
K1
H1
H2
H3
J1
J2
J3
J7
J8
J9
K2
K3
K7
K8
B2
B3
B7
B8
C2
C3
C7
C8
D2
D3
D7
D8
E3
E7
A2
A8
E2
E8
F2
F3
F7
F8
CKE
CK
CK
WE
CAS
RAS
CS
BA0
BA1
VDDQ
VDD
VDDQ
VDDQ
VDDQ
VDDQ
VDD
VDD
VSS
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSS
VSS
A9
A11
A12
A6
A7
A8
A10/AP
A0
A1
A4
A5
A2 A3DQ13
DQ14
DQ1
DQ2
DQ11
DQ12
DQ3
DQ4
DQ9
DQ10
DQ5
DQ6
DQ8
DQ7
DQ15
DQ0
UDQS
LDQS
UDM
NC
NC
LDM
1
C483
MCH154CN104K
0.1uF 10V
IC33
HYB18M512160AF-7.5
G1
G2
G3
G7
G8
G9
H7
H8
H9
A7
A9
B1
C9
D1
E9
F9
K9
A1
A3
B9
C1
D9
E1
F1
K1
H1
H2
H3
J1
J2
J3
J7
J8
J9
K2
K3
K7
K8
B2
B3
B7
B8
C2
C3
C7
C8
D2
D3
D7
D8
E3
E7
A2
A8
E2
E8
F2
F3
F7
F8
CKE
CK
CK
WE
CAS
RAS
CS
BA0
BA1
VDDQ
VDD
VDDQ
VDDQ
VDDQ
VDDQ
VDD
VDD
VSS
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSS
VSS
A9
A11
A12
A6
A7
A8
A10/AP
A0
A1
A4
A5
A2 A3DQ13
DQ14
DQ1
DQ2
DQ11
DQ12
DQ3
DQ4
DQ9
DQ10
DQ5
DQ6
DQ8
DQ7
DQ15
DQ0
UDQS
LDQS
UDM
NC
NC
LDM
1
C491
MCH154CN104K
0.1uF 10V
1
C390
MCH154CN104K(option)
0.1uF 10V
1
C387
MCH154CN104K(option)
0.1uF 10V
1
C396
MCH154CN104K
0.1uF 10V
1
C397
MCH154CN104K(option)
0.1uF 10V
1
C494
MCH154CN104K(option)
0.1uF 10V
1
C486
MCH154CN104K(option)
0.1uF 10V
1
C492
MCH154CN104K
0.1uF 10V
1
C488
MCH154CN104K
0.1uF 10V
1
C384
MCH154CN104K
0.1uF 10V
1
C382
MCH154CN104K(option)
0.1uF 10V
1
C395
MCH154CN104K
0.1uF 10V
1
C389
MCH154CN104K(option)
0.1uF 10V
1
C485
MCH154CN104K(option)
0.1uF 10V
1
C489
MCH154CN104K(option)
0.1uF 10V
DRAM_DQM[0..3]
DRAM_D[0..31]
MDRAM_A[0..13]
DRAM_BA[0..1]
DRAM_CSn[0..1]
DRAM_CKE[0..1]
DRAM_DQS[0..3]
DRAM_RASn
DRAM_CLKn
DRAM_CASn
DRAM_CLK
DRAM_WEn
Page 70
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
SC06040Z-17 A
NAND FLASH
A4
17 39Friday, November 10, 2006
KZM-ARM11-01 Kyoto Microcomputer Co., Ltd.
Title
Size Document Number Rev
Date: Sheet
of
NF_RB
NF_RB
F_D[0..15]
NA_CSn[0..3]
NF_WPn
NF_CLE
NF_ALE
NF_REn
NF_WEn
NF_ALE
NF_CLE
NF_REn
NF_WEn
NF_WPn
NF_ALE
NF_CLE
NF_REn
NF_WEn
NF_WPn
NF_RB
NF_DETn
NA_CSn0
NA_CSn1
NA_CSn1
NA_CSn2
NF_DETn
NA_CSn3
NA_CSn0
F_D6
F_D4
F_D2
F_D14
F_D5
F_D12
F_D8
F_D7
F_D3
F_D11
F_D13
F_D9
F_D0
F_D1
F_D15
F_D10
F_D6
F_D5
F_D1
F_D7
F_D0
F_D3
F_D4
F_D2
F_D4
F_D2
F_D1
F_D3
F_D7
F_D5
F_D0
F_D6
NF_RB
NF_WPn
+3.0V
+3.0V
+3.0V
+3.0V
+3.0V
+3.0V
+3.0V
+3.0V
+3.0V
IC7
TC58DVM92A1FT00
6
7
8
9
16
17
18
19
44
43
42
41
32
31
30
29
37
36
12
13
1
2
3
4
5
10
11
14
15
20
21
22
23
24
25
26
27
28
33
34
35
38
39
40
45
46
47
48
GND
RY/BY
RE
CE
CLE
ALE
WE
WP
I/O8
I/O7
I/O6
I/O5
I/O4
I/O3
I/O2
I/O1
VCC(3.3V)
VSS
VCC(3.3V)
VSS
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
+
1
C236
F931C106MAA
10uF 6.3V
IC53
TC58DVM92A1FT00(option)
6
7
8
9
16
17
18
19
44
43
42
41
32
31
30
29
37
36
12
13
1
2
3
4
5
10
11
14
15
20
21
22
23
24
25
26
27
28
33
34
35
38
39
40
45
46
47
48
GND
RY/BY
RE
CE
CLE
ALE
WE
WP
I/O8
I/O7
I/O6
I/O5
I/O4
I/O3
I/O2
I/O1
VCC(3.3V)
VSS
VCC(3.3V)
VSS
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
1
C225
MCH154CN104K
0.1uF 10V
1
C49
MCH154CN104K
0.1uF 10V
1
R34
MCR03 103
10Kom
CN27
DF12D(3.0)-40DP-0.5V(80)
1 2
3 4
5 6
7 8
9 10
11 12
13 14
15 16
17 18
19 20
21 22
23 24
25 26
27 28
29 30
31 32
33 34
35 36
37 38
39 40
1
R220
MCR03 103
10Kom
1
C48
MCH154CN104K
0.1uF 10V
JP1
XJ8C0211
SILKNF_DET
1
2
1
R526
MCR03 103
10Kom
1
C230
MCH154CN104K
0.1uF 10V
1
C226
MCH154CN104K
0.1uF 10V
1
R222
MCR03 103(option)
10Kom
1
R530
MCR03 102
1Kom
F_D[0..15]
NF_RB
NA_CSn[0..3]
NF_DETn
NF_CLE
NF_REn
NF_WEn
NF_WPn
NF_ALE
Page 71
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
NVCC1
External DMA request from GPIO1_0
SC06040Z-18 A
NV1
A4
18 39Friday, November 10, 2006
Kyoto Microcomputer Co., Ltd.KZM-ARM11-01
Title
Size Document Number Rev
Date: Sheet
of
BT_MD4
CLKL
CPU_GPIO1_6
CPU_GPIO1_2
BT_MD3
CPU_COMPARE
CPU_GPIO1_5
CPU_GPIO1_1
BT_MD2
CPU_GPIO1_4
CPU_GPIO1_0
CLKSS
CPU_RST_INn
CLKH
CPU_GPIO1_3
CPU_CAPTURE
BT_MD1
CPU_PORn
BT_MD0
BT_MD[0..4]
CLKSS
CLKH
CLKL
WD_RST_On
WD_RST_On
PWR_FAIL
VSTBY
VPG0
VPG1
DVFS0
DVFS1
TTM
VSTBY
CPU_GPIO1_[0..6]
BT_MD0
BT_MD2
BT_MD3
BT_MD1
BT_MD0
BT_MD2
BT_MD3
BT_MD1
BT_MD4
VPG1
DVFS1
ETM_SRSTn
CPU_RST_INn
RST_IN
TTM
PWR_FAIL
DVFS0
VPG0
+3.0V
+3.0V
+3.0V
+3.0V
+3.0V
+3.0V
+3.0V
+3.0V
+3.0V
+3.0V +3.0V
SW3
SKRPABE010(ALPS)
14
23
IC37
SN74LVC1G14DCKT
24
3 5
1
1
R160
MCR03 103
10kom
1
C386
MCH154CN104K(option)
0.1uF 10V
+1C499
F931C105MAA
1uF 16V
X2
SG-3030JC 32.768KHz
12
34
VIOGND
OUTVDD
1
R359
MCR03 330
33om
CP26
ST-4-2(option)
DVFS1
IC36
SN74LVC1G14DCKT
24
3 5
1
DSW1
KHS04
1
2
3
4
8
7
6
5
JP12
XJ8D0311
SILK:RSTSEL
1
2
3
1
C385
MCH154CN104K(option)
0.1uF 10V
CP21
ST-4-2(option)
VPG0
1
C146
MCH154CN104K
0.1uF 10V
SW2
SKRPABE010(ALPS)
14
23
CP20
ST-4-2(option)
PWR_FAIL
1
C145
MCH154CN104K
0.1uF 10V
1
R154
MCR03 330
33om
CP31
ST-4-2(option)
CLKL
1
R400
MCR03 103
10kom
1
R152
MCR03 330
33om
1
C495
MCH154CN104K
0.1uF 10V
1
C147
MCH154CN104K
0.1uF 10V
IC85
SN74LVC1G14DCKT
24
3 5
1
1
R395
MCR03 103
10kom
JP10
XJ8D0311
SILK:CLKSEL
1
2
3
CP24
ST-4-2(option)
TTM
JP17
XJ8C0211
SILK IN_BOOT
1
2
CP25
ST-4-2(option)
VSTBY
RA32
BCN104AB103J7
1
2
3
4 5
6
7
8
1
2
3456
7
8
+1C497
F931C105MAA
1uF 16V
X1
SG-636PCE 26MHz
12
34
OE/STGND
OUTVDD
1
R153
MCR03 330
33om
IC30D
MCIMX31VKN5_NV1
F20
C21
D24
C22
D26
G26
F24
H21
C23
H24
J21
E26
F26
G25
J20
E25
G24
U20
F19
F25
F18
C20
B24
B23
A23
G18
A24
A22
BT_MD0
BT_MD1
BT_MD2
BT_MD3
BT_MD4
CLKSS
CKIH
CKIL
CLKO
POR_B
RESET_IN_B
PWR_FAIL
VSTBY
VPG0
VPG1
DVFS0
DVFS1
TTM_PAD
GPIO1_4/USBH1_SUSPEND/MCU1_4
GPIO1_3/MCU1_3
GPIO1_0/EXTDMA_0/MCU1_0
GPIO1_2/EXTDMA_2/MCU1_2
GPIO1_5/MCU1_5
GPIO1_1/EXTDMA_1/MCU1_1
GPIO1_6/TMPR_DTCT/MCU1_6
COMPARE/ATA_D15/CAP2/CMP3/MCU1_8
WD_RST/IPU_FL_STRB
CAPTURE/ATA_D14/CMP2/MCU1_7
CP19
ST-4-2(option)
WATCH DOG
1
C144
MCH154CN104K
0.1uF 10V
CP27
ST-4-2(option)
DVFS0
CP30
ST-4-2(option)
CLKH
CP15
ST-4-2(option)
VPG1
BT_MD[0..4]
CLKO
CPU_GPIO1_[0..6]
CPU_CAPTURE
CPU_COMPARE
CLKH
CLKl
ETM_SRSTn
CPU_PORn
RST_IN
CPU_RST_INn
Page 72
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
SC06040Z-19 A
NV10
A4
19 39Friday, November 10, 2006
Kyoto Microcomputer Co., Ltd.KZM-ARM11-01
Title
Size Document Number Rev
Date: Sheet
of
CPU_SCK3
CPU_STXD6
CPU_CSPI1_MOSI
SRXD3
SFS3
SFS6
CPU_SRXD6
PR_TRACE_CTRL
CPU_SFS6
PR_TRACE_CLK
CPU_SCK3
CPU_SRXD3
CPU_SFS6
CPU_SCK6
CPU_SFS3
CPU_SCK6
CPU_SRXD3
CPU_SFS3
SCK6
CPU_STXD6
CPU_SRXD6
CPU_NFWEn
CPU_NFREn
CPU_NFALE
CPU_NFWPn
CPU_NFRB
CPU_NFCLE
CPU_NFCEn
CPU_USBH2_D0
CPU_USBH2_D1
R_USBH2_D0
R_USBH2_D1
CPU_USBH2_D0
CPU_USBH2_D1
CPU_USBH2_D1
CPU_USBH2_D0
CPU_STXD3
CPU_NFRB R_NF_RB
PR_TRACE_DATA[0..7]
TRACE_DATA[8..15]
CPU_NFWPn
CPU_NFCEn R_NF_CEn
R_NF_WPn
SRXD6
STXD6
SCK3
CPU_CSPI1_MISO
CPU_CSPI1_SCLK
CPU_CSPI1_SPI_RDY
CPU_CSPI1_SS0
CPU_CSPI1_SS1
CPU_CSPI1_SS2
CPU_USBH2_CLK
CPU_USBH2_DIR
CPU_USBH2_NXT
CPU_USBH2_STP
CPU_CSPI1_SS[0..2]
R_USBH2_D[0..1]
PR_TRACE_CTRL
PR_TRACE_CLK
CSPI1_MOSICPU_CSPI1_MOSI
STXD3CPU_STXD3
CPU_NFWEn
R_NF_CLE
R_NF_REn
R_NF_WEn
CPU_NFALE
CPU_NFCLE
CPU_NFREn
R_NF_ALE
TRACE_DATA14
CPU_SCK3
TRACE_DATA12
CPU_CSPI1_MOSI
PR_TRACE_DATA2
CPU_NFCLE
CPU_SCK6
TRACE_DATA8
CPU_NFREn
PR_TRACE_DATA7
CPU_NFWPn
CPU_SRXD3
CPU_SRXD6
CPU_STXD6
CPU_NFCEn
CPU_SFS3
TRACE_DATA13
CPU_SFS6
TRACE_DATA9
TRACE_DATA15
CPU_NFRB PR_TRACE_DATA6
CPU_STXD3
CPU_NFWEn
PR_TRACE_DATA3
TRACE_DATA10
TRACE_DATA11
PR_TRACE_DATA1
CPU_NFALE
PR_TRACE_DATA0
PR_TRACE_DATA4
PR_TRACE_DATA5
CSPI1_MOSICPU_CSPI1_MOSI
RA31
BCN104AB220J7
1
2
3
45
6
7
8
1
2
3456
7
8
RA3
BCN104AB000J7(option)
1
2
3
4 5
6
7
8
1
2
3456
7
8
1
R68
MCR03 000(option)
0om
IC30E
MCIMX31VKN5_NV10
N3
N2
P6
P2
P7
P3
P1
N1
M1
M3
U1
T6
T7
U2
U3
V1
V2
T3
R6
R7
R3
T1
R1
R2
T2
N7
N6
M2
CSPI1_SPI_RDY/ATA_D6/USBH1_FS/UART3_CTS
CSPI1_SCLK/ATA_D5/ATA_DA2/USBH1_OEB/UART3_RTS
CSPI1_SS2/ATA_D4/ATA_DA0/USBH1_RCV/CSPI3_SS3/TD_19
CSPI1_MOSI/ATA_D0/ATA_INTRQ/USBH1_RXDM/UART3_RXD/TD_15
CSPI1_MISO/ATA_D1/ATA_BUFFER_EN/USBH1_RXDP/UART3_TDX/TD_16
CSPI1_SS0/ATA_D2/ATA_DMARQ/USBH1_TXDMT/CSPI3_SS2/TD_17
CSPI1_SS1/ATA_D3/ATA_DA1/USBH1_TXDP/CSPI2_SS3/TD18
USBH2_CLK/ATA_INTRQ/UART5_RTS/TD_20
USBH2_D0/ATA_DA1/TRCTL
USBH2_D1/ATA_DA2/TRCLK
NFRB/ATA_D13/TD_6/MCU1_16
NFCE_B/ATA_D12/ATA_DA2/USBH2_D7/TD_5/MCU1_15
NFWE_B/ATA_D7/ATA_INTRQ/USBH2_D2/TD_0/MCU1_10
NFWP_B/ATA_D11/ATA_DA1/NFWP_B/USBH2_D6/TD_4/MCU1_14
NFCLE/ATA_D10/ATA_DA0/USBH2_D5/TD_3/MCU1_13
NFALE/ATA_D9/ATA_DMARQ/USBH2_D4/TD_2/MCU1_12
NFRE_B/ATA_D8/ATA_DIR/USBH2_D3/TD_1/MCU1_11
SFS6/USBH1_SUSPEND/TD_14/M3IF_CHSN_MSTR_2/MCU1_26
SFS3/ATA_D10/USBH2_D5/TD_10/EMI_DBG3
SRXD6/ATA_D12/USBH2_D7/TD_12/M3IF_CHSN_MSTR_0/MCU1_24
SRXD3/ATA_D8/USBH2_D3/TD_8/EMI_DBG1/MCU1_18
STXD6/ATA_D11/USBH2_D6/TD_11/ARM_CRASID7/MCU1_23
STXD3/ATA_D7/USBH2_D2/TD_7/EMI_DBG0/MCU1_17
SCK3/ATA_D9/USBH2_D4/TD_9/EMI_DBG2
SCK6/ATA_D13/TD_13/M3IF_CHSN_MSTR_1/MCU1_25
USBH2_DIR/ATA_DIR/UART5_RXD/TD_21
USBH2_NXT/ATA_DA0/UART5_CTS/TD_23
USBH2_STP/ATA_DMARQ/UART5_TXD/TD_22
RA28
BCN104AB220J7
1
2
3
45
6
7
8
1
2
3456
7
8
RA4
BCN104AB000J7(option)
1
2
3
4 5
6
7
8
1
2
3456
7
8
RA30
BCN104AB220J7
1
2
3
45
6
7
8
1
2
3456
7
8
RA29
BCN104AB220J7
1
2
3
45
6
7
8
1
2
3456
7
8
RA2
BCN104AB000J7(option)
1
2
3
4 5
6
7
8
1
2
3456
7
8
1
R72
MCR03 000(option)
0om
1
R531
MCR01 220
22om
1
R279
MCR03 000
0om
RA5
BCN104AB000J7(option)
1
2
3
4 5
6
7
8
1
2
3456
7
8
1
R270
MCR03 000
0om
PR_TRACE_DATA[0..7]
TRACE_DATA[8..15]
R_NF_RB
R_NF_WPn
R_NF_CEn
SRXD3
SFS3
SCK3
STXD6
SCK6
SRXD6
SFS6
CPU_CSPI1_MISO
CPU_CSPI1_SCLK
CPU_CSPI1_SPI_RDY
CPU_CSPI1_SS[0..2]
CPU_USBH2_CLK
CPU_USBH2_DIR
CPU_USBH2_NXT
R_USBH2_D[0..1]
CPU_USBH2_STP
PR_TRACE_CTRL
PR_TRACE_CLK
CSPI1_MOSI
STXD3
R_NF_ALE
R_NF_CLE
R_NF_WEn
R_NF_REn
Page 73
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
ton 22ms
SC06040Z-20 A
MEMORY
A4
20 39Friday, November 10, 2006
KZM-ARM11-01 Kyoto Microcomputer Co., Ltd.
Title
Size Document Number Rev
Date: Sheet
of
EXT_CN
EXT_CN
D[0..15]
RW
EBn[0..1]
A[0..25]
CSn[0..5]
OEn
LBAn
BCLK
RSTn
M_WEn[0..1]
M_OEn
EXT_ECBn
CN_RSTn_IN
CPU_DTE2_RI
CPU_UART2_TXD
CPU_DTE2_DSR
CPU_UART2_CTS
CPU_DTE2_DTR
CPU_DTE2_DCD
CPU_UART2_RTS
CPU_UART2_RXD
CPU_GPIO1_[0..6]
CPU_SRXD5
CPU_STXD5
CPU_SCK5
CPU_SFS5
CPU_USB_OC
CPU_USB_BYP
CPU_USB_PWR
CN_TDI/D0
CN_TDO/CONF_DONE
D_BUF
D_BUF
DRWn
DOEn
PC_CEn[1..2]
CPU_D[0..15] D[0..15]
R_PC_CEn[1..2]
CPU_CSn[0..5] CSn[0..5]
AD_BUF
AD_BUF
EBn[0..1]
LBAn
RW
OEn
A[0..25]
CPU_A[0..25]
CPU_BCLK
CPU_OEn
CPU_EBn[0..1]
BCLK
CPU_RW
CPU_LBAn
MDRAM_A[0..13]
MEM_A[0..12]
DRAM
DRAM
MDRAM_A[0..13]
MEM_A[0..12]
R_PC_CEn[1..2]
LAN
LAN
A[0..6]
D[0..15]
M_OEn
M_WEn0
LAN_CSn
PME
LAN_IRQ
RSTn
STD_ROM
STD_ROM
M_INHnM_WEn[0..1]
M_OEn
A[0..25]
D[0..15]
RSTn
STD_CSn
FLSH_CSn
CPU_GPIO3_0
CPU_ECBn
CPU_A13
CPU_A19
CPU_A5
CPU_A20
CPU_A22
CPU_A4
CPU_A23
CPU_A7
CPU_A18
CPU_A11
CPU_A3
CPU_A16
CPU_A24
CPU_A15
CPU_A8
CPU_A17
CPU_A10
CPU_CSn1
CPU_EBn1
CPU_A12
CPU_OEn
CPU_CSn4
CPU_LBAn
CPU_BCLK
CPU_A25
CPU_A1
CPU_CSn5
CPU_A6
CPU_A21
CPU_RW
CPU_A9
CPU_A0
CPU_A2
CPU_A14
CPU_CSn0
CPU_D2
CPU_D3
CPU_D6
CPU_D8
CPU_D13
CPU_D12
CPU_D14
CPU_D15
CPU_D9
CPU_D7
CPU_D11
CPU_D0
CPU_D4
CPU_D10
CPU_D5
CPU_D1
CPU_EBn0
CPU_M_GNT
CPU_M_REQn
CPU_D[0..15]
DOEn
DRWn
D[0..15]
CSn[0..5]
CPU_M_GNT
A[0..6]
LAN_IRQ
D[0..15]
PME
A[0..25]
D[0..15]
M_WEn[0..1]
RSTn
CPU_CSn[0..5]
CPU_M_REQn
M_OEn
M_OEn
STD_CSn
FLSH_CSn
R_PC_CEn[1..2] PC_CEn[1..2]
M_WEn0
LAN_CSn
RSTn
ECBn CPU_ECBn
CPU_GPIO3_0
M_INHn
CN_TDO/CONF_DONE
CN_TDI/D0
MDRAM_A[0..13]
MEM_A[0..12]
R_PC_CEn[1..2]
CPU_USB_PWR
CPU_USB_OC
CPU_UART2_TXD
M_WEn[0..1]
EXT_ECBn
CPU_DTE2_RI
D[0..15]
CPU_UART2_RXD
EBn[0..1]
CPU_USB_BYP
CPU_SCK5
CPU_GPIO1_[0..6]
CPU_SFS5
CPU_UART2_CTS
CPU_UART2_RTS
CPU_DTE2_DTR
CPU_STXD5
LBAn
OEn
A[0..25]
CN_TDI/D0
CN_TDO/CONF_DONE
CPU_DTE2_DCD
RSTn
CPU_DTE2_DSR
BCLK
RW
CPU_SRXD5
CN_RSTn_IN
M_OEn
CSn[0..5]
LBAn
A[0..25]
CPU_OEn RW
MEM_A[0..12]
CPU_RW
EBn[0..1]
OEn
MDRAM_A[0..13]
CPU_EBn[0..1]
CPU_LBAn BCLK
CPU_A[0..25]
CPU_BCLK
NVCC2
NVCC2 NVCC2
NVCC2
NVCC2
+3.0V
+3.0V
+
1
C288
F931C106MAA
10uF 16V
IC6
LT1763CS8#PBF
1
2
3
4
8
7
6
5
OUT
ADJ
GND
BYP
IN
GND
GND
SHDN
1
C44
EMK212F225ZG
2.2uF 16V
1
C473
MCH154CN104K
0.1uF 10V
1
R36
MCR03 2701
2.7Kom
VR2
G43B 5Kom(TOCOS option)
13
2
1
R39
MCR03 4991
4.99Kom
+
1
C50
6SVP82M
82uF 6V
1
R214
MCR03 103
10Kom
IC77
NC7SZ125P5X_NL
1
2 4
3 5
1
R38
MCR03 000
0om
1
C224
MCH152CN103K
0.01uF 16V
+
1
C265
F931C106MAA
10uF 16V
D5
1SS420(TPL3_F)
1
C223
EMK212F225ZG
2.2uF 16V
1
R145
MCR03 103
10Kom
IC30F
MCIMX31VKN5_NV2_1
AD6
AF5
AB5
AE4
AA3
AF4
AB3
AE3
AD5
AF3
AF18
AC3
AD3
AD4
AF17
AF16
AF15
AF14
AF13
AF12
AF11
AF10
AF9
AF8
AF7
AF6
AE23
AF23
AF24
AF22
AB2
Y3
AB1
W6
AA2
V7
AA1
W3
Y2
V6
Y1
U7
W2
V3
W1
U6
W21
Y24
AB26
AD23
AE22
AB25
AB22
AC25
Y21
A00
A01
A02
A03
A04
A05
A06
A07
A08
A09
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
A23
A24
A25
CS0
CS1
CS4
CS5
D00
D01
D02
D03
D04
D05
D06
D07
D08
D09
D10
D11
D12
D13
D14
D15
EB0
EB1
BCLK
ECB
LBA
OE
RW
M_REQUEST
M_GRANT
1
R366
DRWn
DOEn
PC_CEn[1..2]
CSn[0..5]
D[0..15]
PME
LAN_IRQ
M_WEn[0..1]
RSTn
M_OEn
FLSH_CSn
STD_CSn
RSTn
LAN_CSn
ECBn
CPU_GPIO3_0
EXT_ECBn
CPU_UART2_TXD
CPU_UART2_CTS
CPU_DTE2_DTR
M_INHn
CN_TDO/CONF_DONE
CN_TDI/D0
CPU_STXD5
CN_RSTn_IN
CPU_SFS5
CPU_UART2_RTS
CPU_UART2_RXD
CPU_USB_PWR
CPU_SCK5
CPU_SRXD5
CPU_USB_OC
CPU_DTE2_DCD
CPU_DTE2_DSR
CPU_GPIO1_[0..6]
CPU_USB_BYP
CPU_DTE2_RI
BCLK
LBAn
RW
OEn
EBn[0..1]
A[0..25]
Page 74
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4
4
3
3
2
2
1
1
D D
C C
B B
A A
SC06040Z-21 A
NV3
A4
21 39Friday, November 10, 2006
Kyoto Microcomputer Co., Ltd.KZM-ARM11-01
Title
Size Document Number Rev
Date: Sheet
of
SD_MS1
SD_MS1
SD1_DETnCPU_SD1_D[0..3]
SD1_SEL SD1_WPn
MSHC1_DETnCPU_SD1_CLK
CPU_SD1_CMD
PC_CARD_CN
PC_CARD_CN
PC_CEn[1..2]
VPP_EN
PC_VS_R[1..2]
CPU_PC_PWRON
A[0..25]
CPU_PC_READY
PC_WAIT_R
D[0..15]
PC_BVD_R[1..2]
CPU_PC_POEn
VCC_EN[0..1]
LBAn
PC_IOIS16_R
CPU_PC_CDn[1..2]
PC_RWn_R
PC_RST_R
EBn[0..1]
OEn
RW
F_PC_POEn
CPU_PC_BVD1
CPU_PC_BVD2
CPU_PC_CDn1
CPU_PC_CDn2
CPU_PC_VS2
CPU_PC_VS1
CPU_PC_WAIT
CPU_SD1_CMD
CPU_SD1_CLK
CPU_PC_RST
CPU_PC_RWn
CPU_PC_READY
CPU_PC_PWRON
CPU_PWMO
CPU_SD1_D0
CPU_SD1_D1
CPU_SD1_D2
CPU_SD1_D3
CPU_IOIS16
CPU_PC_WAIT
CPU_PC_VS1
CPU_PC_VS2
CPU_PC_RST
PC_VS_R2
PC_VS_R1
PC_RST_R
PC_RWn_R
CPU_IOIS16
CPU_PC_RWn
CPU_PC_BVD[1..2]
CPU_ATA_CS0
CPU_ATA_CS1
CPU_ATA_DIOR
CPU_ATA_DIOW
CPU_ATA_DMACK
CPU_ATA_RESETn
CPU_SD1_CLK
CPU_SD1_CMD
SD1_DETn
SD1_WPn
MSHC1_DETn
CPU_SD1_D[0..3]
SD1_SEL
PC_VS_R[1..2]
PC_IOIS16_R
PC_BVD_R[1..2]
PC_WAIT_R
D[0..15]
A[0..25]
PC_CEn[1..2]
CPU_ATA_CS[0..1]
CPU_PC_POEn
CPU_PC_POEn
VCC_EN[0..1]
PC_IOIS16_R
PC_WAIT_R
CPU_PC_CDn[1..2]
PC_RST_R
PC_RWn_R
VPP_EN
EBn[0..1]
RW
OEn
LBAn
CPU_PC_READY
CPU_PC_PWRON
CPU_PC_BVD1
CPU_PC_BVD2
PC_BVD_R1
PC_BVD_R2
F_PC_RW
F_PC_POEn
1
R506
33om
MCR03 330
1
R276
1
R70
1
R75
1
R267
MCR03 330
33om
IC30G
MCIMX31VKN5_NV3
J6
F2
E2
H6
H3
J3
H2
K6
L7
K1
J7
K3
J2
H1
G2
J1
K7
L6
G1
M7
L2
M6
L1
L3
K2
F1
ATA_CS0/UART4_RXD/CSI_D0/SD_D_CLK/TD_6/MCU3_26
ATA_CS1/UART4_RTS/CSI_D1/LCS1/TD_7/MCU3_27
ATA_DIOR/UART4_TXD/CSI_D2/SER_RS/TRCTL/MCU3_28
ATA_DIOW/UART4_CTS/CSI_D3/TRCLK/MCU3_29
ATA_RESET_B/SD_D/MCU3_31
IOIS16/USBH2_D6
PC_BVD1/USBH2_D3/UART5_RXD
PC_BVD2/USBH2_D4/UART5_TXD
PC_CD1_B/SD2_CMD/MSHC2_SCLK
PC_CD2_B/SD2_CLK/MSHC2_BS
PC_POE
PC_PWRON/SD2_D3/MSHC2_D2
PC_READY/SD2_D1/MSHC2_D1
PC_RST/USBH2_D5/UART5_CTS
PC_RW_B/USBH2_D7
PC_VS1/SD2_D2/MSHC2_D3
PC_VS2/USBH2_D2/UART5_RTS
PC_WAIT_B/SD2_D0/MSHC2_SDIO_D0
PWMO/ATA_IORDY/PC_SPKOUT/MCU1_9
SD1_CLK/MSHC1_BS/TD_1/MCU2_27
SD1_CMD/MSHC1_SCLK/TD_0/MCU2_26
SD1_D0/MSHC1_SDIO_D0/TD_2/MCU2_28
SD1_D1/MSHC1_D1/TD_3/MCU2_29
SD1_D2/MSHC1_D2/TD_4/MCU2_30
SD1_D3/MSHC1_D3/CTI_TIN_1_7/TD_5/MCU2_31
ATA_DMACK/SD_D_O/MCU3_30
1
R73
33om
MCR03 330
1
R269
1
R268
33om
MCR03 330
1
R74
CPU_PC_BVD[1..2]
CPU_PC_RST
CPU_IOIS16
CPU_PC_RWn
CPU_PC_VS2
SD1_SEL
SD1_DETn
SD1_WPn
MSHC1_DETn
A[0..25]
D[0..15]
PC_CEn[1..2]
CPU_PWMO
CPU_ATA_DIOR
CPU_ATA_DIOW
CPU_ATA_DMACK
CPU_ATA_RESETn
CPU_ATA_CS[0..1]
VCC_EN[0..1]
LBAn
VPP_EN
EBn[0..1]
RW
OEn
F_PC_RW
F_PC_POEn
CPU_PC_POEn
Page 75
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3
3
2
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1
1
D D
C C
B B
A A
NVCC3
VIDEO
SC06040Z-2 2 A
CAMERA
A3
22 39Friday, November 10, 2006
Kyoto Microcomputer Co., Ltd.
KZM-ARM11-01
Title
Size Document Number Rev
Date: Sheet
of
CPU_CSI_D12
CPU_CSI_D5
CPU_GPIO3_1
CPU_CSI_D8
CPU_CSI_D7
CPU_GPIO3_0
CPU_CSI_HSYNC
CPU_CSI_PIXCLK
CPU_I2C1_DAT
CPU_CSI_D10
CPU_CSI_D4
CPU_CSI_D14
CPU_CSI_D13
CPU_CSI_D9
CPU_CSI_D15
CPU_CSI_VSYNC
CPU_I2C1_CLK
CPU_CSI_D11
CPU_CSI_D6
CPU_CSI_MCLK
CPU_GPIO3_1
CPU_CSI_MCLK
CPU_CSI_PIXCLK
CPU_CSI_VSYNC
CPU_CSI_MCLK
CPU_CSI_HSYNC
CPU_CSI_D[6..15]
CSI_D5
CSI_D3
CSI_PIXC LK
CSI_VSYNC
CPU_CSI_PIXCLK
CSI_PIXC LK
CSI_D4
CSI_D7
CSI_D4
CSI_D2
CSI_D3
CSI_D5
CSI_D5
CSI_PIXC LK
CSI_D3
CSI_D7
CSI_D0
CSI_D0
CSI_D1
CPU_CSI_VSYNC
CSI_D4
CSI_D6
CSI_VSYNC
CSI_D6
CSI_HSYNC
CSI_D2
CSI_ENn
CSI_D6
CSI_D0
CSI_D1
CSI_D2
CSI_D7
CSI_HSYNC
CSI_D1
CPU_CSI_HSYNC
CPU_I2C1_CLK
CPU_I2C1_CLK
CPU_I2C1_DAT
CPU_I2C1_DAT
CSI_ENn
CSI_ENn
CPU_CSI_D12
CPU_CSI_D11
CPU_CSI_D9
CPU_CSI_D15
CPU_CSI_D14
CPU_CSI_D13
CPU_CSI_D8
CPU_CSI_D10
CPU_CSI_D5
CPU_CSI_D4
+3.0V
+3.0V
+3.0V
+3.0V
+12V
+5V
+5V
+3.0V
+12V
+5V
+3.0V
+3.0V
+3.0V
1
C434
1
R470
1
C419
MCH154CN104K
0.1uF 10V
CP49
MT-1-1(option)
CSI_D4
1
C164
MCH154CN104K
0.1uF 10V
1
R469
MCR03 103
10Kom
1
R468
MCR03 103
10Kom
1
R459
MCR03 105
1Mom
D3
CMS03(TE12L, Q)
1
R349
MCR03 103
10Kom
1
C462
MCH154CN104K
0.1uF 10V
1
R448
MCR03 104
100Ko m
1
C461
+
1
C457
F931C106M AA
10uF 16V
RA49
BCN104AB103J 7
1
2
3
4 5
6
7
8
1
2
3456
7
8
1
R379
MCR03 103
10Kom
1
R466
MCR03 1502
47Kom
CN20
FH12-10S-0.5SH(55)
1
2
3
4
5
6
7
8
9
10
IC43
LT1317CS8 #PBF
1
23
4
56
7 8
VC
FBSHDN
GND
SWVIN
LBI LBO
1
R532
MCR03 000(option short)
0om
+1C174
UUD1E101MCL-1GS
100uF 25V
+
1
C163
F931C106M AA
10uF 16V
1
R460
MCR03 1003
820Ko m
1
L4
CD54NP-220Mx
+
1
C170
UUD1E101MCL-1GS
100uF 25V
1
R414
MCR03 000
0om
CP50
MT-1-1(option)
CSI_D5
1
C401
MCH154CN104K
0.1uF 10V
CN17
HIF3FC-10PA-2.54DSA(71 option)
1 2
3 4
5 6
7 8
9 10
1
C433
1
R450
MCR03 103
10Kom
1
C177
MCH154CN104K
0.1uF 10V
CN23
53261-0 471
1
2
3
4
IC74
SN74LVC1G14DCK T
2 4
3 5
1
RA50
BCN104AB103J 7
1
2
3
4 5
6
7
8
1
2
3456
7
8
1
R456
1
R362
1
C443
MCH185 332
3300pF 50 V
1
C402
MCH154CN104K
0.1uF 10V
1
R413
MCR03 000
0om
1
R393
1
R449
MCR03 563
56Kom
1
C454
MCH154CN104K
0.1uF 10V
IC75
SN74LVC162244ADGG R
2
3
5
6
8
9
11
12
13
14
16
17
19
20
22
23
43
44
46
47
37
38
40
41
32
33
35
36
26
27
29
30
1
24
25
48
7
18
31
42
4 10
15 21
28 34
3945
1Y1
1Y2
1Y3
1Y4
2Y1
2Y2
2Y3
2Y4
3Y1
3Y2
3Y3
3Y4
4Y1
4Y2
4Y3
4Y4
1A4
1A3
1A2
1A1
2A4
2A3
2A2
2A1
3A4
3A3
3A2
3A1
4A4
4A3
4A2
4A1
1OE
4OE
3OE
2OE
VCC
VCC
VCC
VCC
GND GND
GND GND
GND GND
GNDGND
1
R442
MCR03 472
4.7Kom
IC30H
MCIMX31VKN5_NV 4
K24
J26
K20
J25
L21
K25
L24
K26
L20
L25
M24
L26
M21
M20
M25
M26
K21
H26
H25
J24
CSI_MCLK/ATA_D10/MCUC3_16
CSI_PIXCLK/ATA_D13/MCU3_19
CSI_HSYNC/ATA_D12/MCUC3_18
CSI_VSYNC/ATA_D11/MCU3_17
CSI_D4/CTI_TOUT_1_2/MCU3_4
CSI_D5/CTI_TOUT_1_3/MCU3_5
CSI_D6/ATA_D0/CTI_TOUT_1_4/MCU3_6
CSI_D7/ATA_D1/CTI_TOUT_1_5/MCU3_7
CSI_D8/ATA_D2/MCU3_8
CSI_D9/ATA_D3/MCU3_9
CSI_D10/ATA_D4/MCU3_10
CSI_D11/ATA_D5/MCU3_11
CSI_D12/ATA_D6/MCU3_12
CSI_D14/ATA_D8/MCU3_14
CSI_D13/ATA_D7/MCU3_13
CSI_D15/ATA_D9/MCU3_15
GPIO3_0/SPLL_BYP_CLK/MCU3_0
GPIO3_1/UPLL_BYP_CLK/MCU3_1
I2C1_DAT/ATA_D15
I2C1_CLK/ATA_D14
CPU_CSI_D[6..15]
CPU_CSI_HSYNC
CPU_CSI_MCLK
CPU_CSI_PIXCLK
CPU_CSI_VSYNC
CSI_ENn
CPU_I2C1_DAT
CPU_I2C1_CLK
CPU_GPIO3_0
CLK_26 M
Page 76
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4
4
3
3
2
2
1
1
D D
C C
B B
A A
SC06040Z-23 A
NV5
A4
23 39Friday, November 10, 2006
KZM-ARM11-01 Kyoto Microcomputer Co., Ltd.
Title
Size Document Number Rev
Date: Sheet
of
USB_OTG
USB_OTG
CPU_USBOTG_D[0..7]
CPU_USBOTG_STP
CPU_USBOTG_DIR
CPU_USBOTG_CLK
CPU_USBOTG_NXT
AC97_CODEC
AC97_CODEC
CPU_SFS4
CPU_SCK4
CPU_STXD4
CPU_SRXD4
RSTn
CPU_USBOTG_CLK
CPU_SCK4
CPU_CSPI2_SS0
CPU_USB_PWR
CPU_USBOTG_D5
CPU_SRXD5
CPU_USBOTG_D2
CPU_SRXD4
CPU_USB_BYP
CPU_USBOTG_D4
CPU_STXD5
CPU_USBOTG_D1
CPU_USBOTG_NXT
CPU_SFS5
CPU_CSPI2_SS1
CPU_CSPI2_SPI_RDY
CPU_USBOTG_D3
CPU_STXD4
CPU_USBOTG_D0
CPU_CSPI2_SS2
CPU_USBOTG_DIR
CPU_USBOTG_D7
CPU_SFS4
CPU_CSPI2_SCLK
CPU_CSPI2_MOSI
CPU_USBOTG_D6
CPU_CSPI2_MISO
CPU_SCK5
CPU_USB_OC
CPU_USBOTG_STP
CPU_USB_PWR
CPU_USB_BYP
CPU_SFS5
CPU_CSPI2_MOSI
CPU_CSPI2_SCLK
CPU_SCK5
CPU_SRXD5
CPU_STXD5
CPU_USB_OC
CPU_BATT_LINE
CPU_BATT_LINE
CPU_USBOTG_D[0..7]
CPU_USBOTG_STP
CPU_USBOTG_NXT
CPU_USBOTG_DIR
CPU_USBOTG_CLK
CPU_CSPI2_SPI_RDY
CPU_CSPI2_SS1
CPU_CSPI2_SS2CPU_CSPI2_MISO
CPU_CSPI2_SS0
RSTn
CPU_SFS4 CPU_SRXD4
CPU_STXD4
CPU_SCK4
CP52
MT-1-1(option)
CSPI2_SS0
CP51
MT-1-1(option)
CSPI2_MOSI
CP53
MT-1-1(option)
CSPI2_SCLK
CP56
MT-1-1(option)
CSPI2_SS2
CP57
MT-1-1(option)
CSPI2_SPI_RDY
CP55
MT-1-1(option)
CSPI2_MISO
CP54
MT-1-1(option)
CSPI2_SS1
IC30J
MCIMX31VKN5_NV5
E3
C7
C6
B6
B5
A5
A4
F7
G10
C9
A8
B9
F9
B8
G9
A7
C8
B7
F8
A6
C4
D3
F3
A3
B4
C3
C5
B3
A9
C10
B10
CSPI2_MOSI/I2C2_SCL
CSPI2_SCLK/I2C3_SCL
CSPI2_SS1/CSPI3_SS1/CSPI1_SS3
CSPI2_SPI_RDY
CSPI2_SS0/CSPI3_SS0
CSPI2_SS2/I2C3_SDA/IPU_FLS_STRB
CSPI2_MISO/I2C2_SDA
BATT_LINE/MCU2_17
USBOTG_CLK/MAX1_HM_3
USBOTG_STP/MAX0_HM_1
USBOTG_NXT/MAX0_HM_2
USBOTG_DIR/MAX0_HM_0
USBOTG_D0/UART4_CTS/MAX0_HM_3
USBOTG_D1
USBOTG_D2
USBOTG_D3/UART4_RXD
USBOTG_D4/UART4_TXD
USBOTG_D5/UART4_RTS
USBOTG_D6
USBOTG_D7
SCK4/RXFS5/ARM_CRASID1
SCK5/ARM_CRASID5
SFS4/RXCLK5/ARM_CRASID2
SFS5/ARM_CRASID6
SRXD5/ARM_CRASID4/MCU1_22
SRXD4/RXCLK3/ARM_CRASID0/MCU1_20
STXD5/ARM_CRASID3/MCU1_21
STXD4/RXFS3/EMI_DBG4/MCU1_19
USB_BYP/MAX1_HM_2/MCU1_31
USB_OC/MAX1_HM_1/MCU1_30
USB_PWR/MAX1_HM_0/MCU1_29
RSTn
CPU_SCK5
CPU_SRXD5
CPU_STXD5
CPU_SFS5
CPU_USB_PWR
CPU_USB_BYP
CPU_USB_OC
CPU_BATT_LINE
Page 77
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
NVCC6
NVCC6
SC06040Z-2 4 A
JTAG
A3
24 39Friday, November 10, 2006
KZM-ARM11-01 Kyoto Microcomputer Co., Ltd.
Title
Size Document Number Rev
Date: Sheet
of
KEY
KEY
KEY_COL[0..3] KEY_ROW[0..7]
CPU_KEY_COL1 KEY_COL1
CPU_KEY_ROW2 KEY_ROW2
KEY_COL[0..3] KEY_ROW[0..7]
KEY_COL0CPU_KEY_COL0
KEY_ROW0CPU_KEY_ROW0
KEY_ROW1CPU_KEY_ROW1
KEY_COL2CPU_KEY_COL2
CPU_KEY_COL3
CPU_KEY_ROW4
KEY_ROW3
CPU_KEY_ROW6
CPU_KEY_ROW5
CPU_KEY_ROW3
KEY_ROW4
KEY_ROW5
KEY_ROW6
KEY_ROW7
CPU_KEY_ROW7
KEY_COL3
CPU_KEY_ROW7
CPU_KEY_ROW5
CPU_KEY_ROW6
CPU_KEY_COL3
AL_TRACE_D ATA2
AL_TRACE_D ATA7
AL_TRACE_D ATA0
AL_TRACE_D ATA3
AL_TRACE_D ATA1
AL_TRACE_D ATA4
AL_TRACE_D ATA6
CPU_ATA_DA2
CPU_ATA_DMAREQ
ETM_SR STn
TCK
TRACE_DAT A15
TDI
PR_TRACE_DA TA2
RTCK
TDO
TRACE_DAT A12
TRACE_DAT A9
PR_TRACE_DA TA7
PR_TRACE_DA TA5
PR_TRACE_CL K
TRSTn
TRACE_DAT A8 PR_TRACE_DA TA0
PR_TRACE_DA TA3
TRACE_DAT A11
PR_TRACE_DA TA1TRACE_DAT A13
PR_TRACE_DA TA4
TMS
TRACE_DAT A10
TRACE_DAT A14
PR_TRACE_CTR L
PR_TRACE_DA TA6
ETM_SR STn
TDO
TRSTn
TRACE_DAT A8
AL_TRACE_D ATA4
TRACE_DAT A12
AL_TRACE_D ATA2TRACE_DAT A14
AL_TRACE_D ATA1
TMS
AL_TRACE_C LK
TRACE_DAT A9
ETM_SR STn
AL_TRACE_D ATA0
AL_TRACE_CT RL
AL_TRACE_D ATA7
TRSTn
TCK
AL_TRACE_D ATA5
TDO
AL_TRACE_D ATA6
TRACE_DAT A10
TRACE_DAT A11
TDI
AL_TRACE_D ATA3
RTCK
TRACE_DAT A15
TRACE_DAT A13
RTCK
TCK
PR_TRACE_CTR L
PR_TRACE_DATA[0..7]
TRACE_DATA[8..15]
PR_TRACE_CL K
TRSTn
TCK
RTCK
CPU_ATA_DMAREQ
CPU_KEY_COL0
CPU_KEY_ROW2
SJC_MOD
CPU_KEY_ROW3
TDO
CPU_ATA_DA0
CPU_KEY_ROW7
CPU_KEY_ROW4
CPU_KEY_ROW1
TCK
TDI
RTCK
CPU_KEY_ROW0
CPU_KEY_ROW6
DE_B
CPU_KEY_COL2
SJC_MOD
CPU_KEY_COL3
CPU_ATA_DA2
TRSTn
CPU_KEY_ROW5
CPU_KEY_COL1
CPU_ATA_DA1
TDI
TMS
TMS
AL_TRACE_C LKCPU_KEY_ROW4
AL_TRACE_CT RLCPU_KEY_ROW3
CPU_ATA_DA1
AL_TRACE_D ATA5CPU_ATA_DA0
J_DE_B
J_DE_B
J_DE_B
DE_B
J_DE_B
+3.0V
+3.0V
+3.0V
+3.0V
+3.0V
+3.0V
+3.0V
1
R384
MCR03 103
10Kom
1
R295
MCR03 472(option)
4.7Kom
1
R314
MCR03 000
0om
RA10
BCN104AB000J7(option)
1
2
3
4 5
6
7
8
1
2
3456
7
8
1
R123
MCR03 000
0om
1
R315
MCR03 472
4.7Kom
1
R386
MCR03 472(option)
4.7Kom
1
R281
MCR03 472(option)
4.7Kom
1
R361
MCR03 103
10Kom
JP15
XJ8C0 211
SILK:DE
1
2
1
R280
MCR03 000
0om
1
R127
MCR03 000
0om
IC30K
MCIMX31VKN5_NV 6
B19
G16
F16
A19
B20
C17
C18
A20
F15
A18
F13
B15
C14
A15
G14
B16
F14
A16
C15
B17
G15
A17
C16
B18
TCK
TMS
TDI
TDO
TRSTB
RTCK
DE_B
SJC_MOD
KEY_COL6/ATA_DA1/TD_6/MCU2_24
KEY_COL7/ATA_DA2/TD_7/MCU2_25
KEY_ROW0
KEY_ROW1
KEY_ROW2
KEY_ROW3/TRCTL
KEY_ROW4/TRCLK/MCU2_18
KEY_ROW5/TD_0/MCU2_19
KEY_ROW6/ATA_INTRQ/TD_1/MCU2_20
KEY_ROW7/ATA_BUF_EN/TD_2/MCU2_21
KEY_COL0
KEY_COL1
KEY_COL2
KEY_COL3/TD_3
KEY_COL4/ATA_DMARQ/TD_4/MCU2_22
KEY_COL5/ATA_DA0/TD_5/MCU2_23
V1(V3)
TRACEPKTxx(TRACEDATAxx)
CN13
767054 -1
39
41
43
40
42
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
C_GND
C_GND
C_GND
C_GND
C_GND
NC
NC
TRACECLKA
DBGACK
EXTTRG
VTRef
VSupply
TRACEPKT7
TRACEPKT6
TRACEPKT5
TRACEPKT4
TRACEPKT3
TRACEPKT2
TRACEPKT1
TRACEPKT0(GND)
TRACESYNC(GND)
PIPESTAT2(VDD)
PIPESTAT1(TRACECTL)
PIPESTAT0(TRACEPKT0)
NC
NC
GND(TRACECLKB)
DBGRQ
SRST
TDO
RTCK
TCK
TMS
TDI
TRST
TRACEPKT15
TRACEPKT14
TRACEPKT13
TRACEPKT12
TRACEPKT11
TRACEPKT10
TRACEPKT9
TRACEPKT8
RA35
BCN104AB000J 7
1
2
3
4 5
6
7
8
1
2
3456
7
8
1
R313
MCR03 472
4.7Kom
1
R382
MCR03 472(option)
4.7Kom
RA13
BCN104AB000J 7
1
2
3
4 5
6
7
8
1
2
3456
7
8
1
R282
MCR03 472(option)
4.7Kom
1
R316
MCR03 472
4.7Kom
CN16
HIF3FC-20PA-2.54DSA(71)
4
6
8
10
12
14
16
18
20
21
3
5
7
9
11
13
15
17
19
GND
GND
GND
GND
GND
GND
GND
GND
GND
VsupVTref
TRST
TDI
TMS
TCK
RTCK
TDO
SRST
DBGRQ
DBGACK
1
R345
MCR03 000(option)
0om
1
R385
MCR03 103
10Kom
1
R383
MCR03 472
4.7Kom
1
R275
MCR03 472
4.7Kom
JP11
XJ8C0 211
SILK:SJC_MOD
1
2
CP3
ST-4-2
GND
1
R380
MCR03 472
4.7Kom
V1(V3)
TRACEPKTxx(TRACEDATAxx)
CN14
767054-1(option )
39
41
43
40
42
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
C_GND
C_GND
C_GND
C_GND
C_GND
NC
NC
TRACECLKA
DBGACK
EXTTRG
VTRef
VSupply
TRACEPKT7
TRACEPKT6
TRACEPKT5
TRACEPKT4
TRACEPKT3
TRACEPKT2
TRACEPKT1
TRACEPKT0(GND)
TRACESYNC(GND)
PIPESTAT2(VDD)
PIPESTAT1(TRACECTL)
PIPESTAT0(TRACEPKT0)
NC
NC
GND(TRACECLKB)
DBGRQ
SRST
TDO
RTCK
TCK
TMS
TDI
TRST
TRACEPKT15
TRACEPKT14
TRACEPKT13
TRACEPKT12
TRACEPKT11
TRACEPKT10
TRACEPKT9
TRACEPKT8
1
R334
MCR03 000(option)
0om
ETM_SR STn
PR_TRACE_DATA[0..7]
PR_TRACE_CTR L
TRACE_DATA[8..15]
PR_TRACE_CL K
Page 78
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
SC06040Z-25 A
NV8-9
A4
25 39Friday, November 10, 2006
Kyoto Microcomputer Co., Ltd.KZM-ARM11-01
Title
Size Document Number Rev
Date: Sheet
of
UART_CN
UART_CN
UART1_MBAUD
UART1_SDn
CPU_DCE1_DTR
FIR_ENn
CPU_DCE1_DSR
CPU_DCE1_DCD
CPU_DCE1_RI
CPU_UART2_CTS
CPU_UART2_RTS
CPU_UART2_TXD
UART1_ENn CPU_UART2_RXD
CPU_UART1_TXD
CPU_UART1_RTS
CPU_UART1_RXD
CPU_UART1_CTS
CPU_DTE2_RI
CPU_DTE2_DSR
CPU_DTE2_DCD
CPU_DTE2_DTR
UART2_ENn
CPU_CSPI3_MISO
CPU_CSPI3_MOSI
CPU_UART1_CTS
CPU_UART2_CTS
CPU_UART1_RTS
CPU_UART2_RTS
CPU_UART2_RXD
CPU_UART1_RXD
CPU_UART2_TXD
CPU_UART1_TXD
CPU_CSPI3_MOSI
CPU_CSPI3_SPI_RDY
CPU_CSPI3_MISO
CPU_CSPI3_SCLK
CPU_UART1_CTS
CPU_UART2_RTS
CPU_UART1_RXD
CPU_UART2_RXD
UART2_ENn
CPU_SCLK0
CPU_SMPD0
CPU_SRST0
CPU_SRX0
CPU_SVEN0
CPU_STX0
CPU_SRST0
CPU_SCLK0
CPU_CE_CONTROL
CPU_SMPD0
CPU_STX0
CPU_CE_CONTROL
CPU_DCE2_DTR
CPU_UART2_TXD
FIR_ENn
CPU_UART1_TXD
CPU_UART2_CTS
CPU_UART1_RTS
UART1_ENn
CPU_DCE1_DCD
CPU_UART2_TXD
CPU_UART2_RTS
CPU_UART2_CTS
CPU_UART2_RXD
CPU_CSPI3_MOSI
CPU_DTE2_DTR
CPU_DTE2_DSR
CPU_DTE2_DCD
CPU_DTE2_RI
UART1_SDn
CPU_CSPI3_MISO
UART1_MBAUD
CPU_DTE2_DSR
CPU_DCE1_DTR
CPU_DTE2_DCD
CPU_DTE2_RICPU_DCE1_RI
CPU_DCE1_DSR
CPU_DCE1_DTR
CPU_DTE2_DCD
CPU_DTE2_RI
CPU_DTE2_DSR
CPU_DCE1_DCD
CPU_DCE1_RI
CPU_DCE1_DSR
CPU_DCE2_DTR
CPU_DTE2_DTR
CPU_DTE2_DTR
CPU_CSPI3_SCLK
CPU_CSPI3_SPI_RDYCPU_SVEN0
CPU_SRX0
+3.0V
+3.0V
+3.0V
+3.0V
IC30L
MCIMX31VKN5_NV8
B11
G13
B12
B13
A10
F10
A11
F11
C11
C12
F12
G11
B14
C13
G12
A13
A12
A14
UART1_CTS/DE_B/MCU2_7
UART2_CTS
DCD_DCE1/RESET_IN/USBOTG_D5/CSPI1_SS3/RTS1/DCD_DCE2/USB_PWR/MCU2_11
DCD_DTE1/CSPI1_SS1/DCD_DTE2/I2C2_SDA/MCU2_15
UART1_RXD/TRSTB/USBOTG_D4/PP4_TXDAT/DSR_DCE1/MCU2_4
UART1_TXD/TCK/USBOTG_D1/PP4_CLK/RI_DCE1/MCU2_5
DSR_DCE1/TDO/USBOTG_D4/CSPI1_SCLK/TXD1/DSR_DCE2/MCU2_9
RI_DCE1/TDI/USBOTG_D3/CSPI1_RDY/RXD1/RI_DCE2/MCU2_10
DTR_DCE1/TMS/PP4_RXDAT/MCU2_8
DTR_DTE1/CSPI1_MOSI/DTR_DTE2/EVNTBUS_16/MCU2_12
DTR_DCE2/CSPI1_SS2/MCU2_16
UART1_RTS/PP4_FS/DCD_DCE1/MCU2_6
UART2_RTS
UART2_TXD/MCU1_28
RI_DTE1/CSPI1_SS0/RI_DTE2/I2C2_SCL/EVNTBUS_18/MCU2_14
UART2_RXD/MCU1_27
DSR_DTE1/CSPI1_MISO/DSR_DTE2/MCU2_13
CE_CONTROL
1
C408
MCH154CN104K
0.1uF 10V
CP32
ST-4-2(option)
SILK:SIM_VPP
CP61
MT-1-1(option)
CSPI3_SCLK
1
R305
MCR03 472
4.7Kom
CN18
ID1A-6S-2.54SF(option)
1
2
3
5 6
7
VCC
RST
CLK
GND VPP
IO
1
R101
MCR03 103(option)
10Kom
CP7
ST-4-2(option)
SILK:DTR_DCE2
CP58
MT-1-1(option)
SVEN0
1
R157
MCR03 000
0om
IC30M
MCIMX31VKN5_NV9
B22
G17
C19
B21
F17
A21
E1
G3
G6
D2
SCLK0/CTI_TIN_1_4/DISPB_D2_CS/MCU3_2
SIMPD0/MCU2_3
SRST0/DISPB_D12_VSYNC/MCU3_3
SRX0/MCU2_2
STX0/CTI_TIN_1_5/MCU2_1
SVEN0/CTI_TIN_1_6/MCU2_0
CSPI3_SCLK/UART3_RTS
CSPI3_MISO/UART3_TXD
CSPI3_SPI_RDY/UART3_CTS
CSPI3_MOSI/UART3_RXD
1
R426
MCR03 000
0om
CP59
MT-1-1(option)
CSPI3_SPI_RDY
1
R156
MCR03 000(option)
0om
1
R155
MCR03 103
10Kom
CP60
MT-1-1(option)
SRX0
UART2_ENn
FIR_ENn
UART1_ENn
CPU_DTE2_DTR
CPU_UART2_TXD
CPU_UART2_CTS
CPU_DTE2_DCD
CPU_UART2_RTS
CPU_UART2_RXD
CPU_DTE2_DSR
CPU_DTE2_RI
UART1_MBAUD
UART1_SDn
Page 79
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
NVCC3
SC06040Z-2 6 A
PC-CARD
A3
26 39Friday, November 10, 2006
Kyoto Microcomputer Co., Ltd.
KZM-ARM11-01
Title
Size Document Number Rev
Date: Sheet
of
PC_A1 2
PC_A7
A1
A0
PC_A5
A3
PC_A0
PC_A1 0
PC_A8
PC_A1 5
PC_A1
PC_A1 4
PC_A1 3
PC_A3
PC_A1 1
A2
PC_A9
PC_A4
PC_A6
PC_A2
PC_A2 0
PC_CEn2
PC_D10
PC_D4
PC_D14
PC_IOIS16n
PC_A3
PC_A2 2
PC_D3
PC_D7
PC_A1
PC_IOWRn
PC_A8
PC_REGn
PC_D12
PC_A9
PC_D15
PC_WEn
PC_D5PC_A5
PC_VS1
PC_A1 0
PC_A1 3 PC_D13
PC_A2 1
PC_A2 3
PC_CEn1
PC_A7
PC_WAITn
PC_D0
PC_A1 4
PC_A1 5
PC_A1 2
PC_D9
PC_RST
PC_D8
PC_VS2
PC_A1 1
PC_D6
PC_BVD2
PC_PWRON
PC_A4
PC_A2 5
PC_D1
PC_A1 9
VCC_EN1
PC_A0
PC_BVD1
PC_D2
PC_A1 7
PC_A1 6
PC_D11
PC_IORDn
PC_A6
PC_A1 8
PC_A2
PC_CEn[1..2]
PC_A2 4
PC_READY
PC_A2 3
PC_A2 5
PC_A2 4
PC_A2 0
PC_REGn
PC_A1 9
PC_A1 6
PC_A1 7
PC_A2 1
PC_A2 2
PC_WEn
PC_A1 8
PC_IORDn
A[0..25]
PC_VS_R[1..2]
D[0..15]
A5
A11
A9
A7
A8
A4
A10
A6
A12
A14
A15
A13
PC_BVD_R[1..2]
VCC_EN[0..1]
CPU_PC_POEn
CPU_PC_POEn
CPU_PC_POEn
PC_OEn
CPU_PC_POEn
CPU_PC_CDn2
CPU_PC_CDn1
PC_READY
PC_WAITn
PC_VS1
PC_VS2
CPU_PC_CDn[1..2]
CPU_PC_CDn2
CPU_PC_CDn1
PC_BVD1
PC_BVD2
PC_OEn
PC_RS T
EBn[0..1]
RW
A24
A25
A23
A19
EBn0
A20
EBn1
A17
A16
A18
A21
A22
LBAn
OEn
PC_VS_R1
PC_VS_R2
PC_BVD_R2
PC_WAIT_R
CPU_PC_READY
CPU_PC_PWRON
PC_BVD_R1
PC_IOIS16_R
PC_PWRON
PC_BVD1
PC_BVD2
PC_IOIS16n
PC_VS2
PC_IOWRn
PC_READY
PC_VS1
PC_WAITn
PC_RWn_R
F_PC_POEn
CPU_PC_POEn
PC_D5
PC_D9
PC_D15
PC_D10
PC_D14
PC_D2
PC_D0
PC_D8
PC_D3
PC_D1
PC_D13
PC_D12
PC_D7
PC_D11
PC_D6
PC_D4
D6
D13
D10
D0
D3
D14
D5
D12
D4
D9
D15
D2
D1
D7
D8
D11
PC_D11
PC_D6
PC_D5PC_D1
PC_D7
PC_D10
PC_D0
PC_D12
PC_D3
PC_D13
PC_D15
PC_D2
PC_D14
PC_D4
PC_D8
PC_D9
VCC_EN0
PC_IOIS16n
PC_RST_R
PC_RS T
PC_RST_R
F_PC_POEn
PC_RWn_RPC_RW
PC_RW
PC_RW
+5V
+5V
+3.0V
+3.0V
+3.0V
+3.0V
+3.0V
+3.0V
PC_VCC
+3.0V
+3.0V
PC_VCC
PC_VCC
PC_VCC
PC_VCC
+3.0V
1
C57
CN28
IC14A-PL-SF-EJR(71)(guide:IC14A-G-PEJR(71))
8
10
11
12
13
14
19
20
21
22
23
24
25
26
27
28
29
2
3
4
5
6
30
31
32
37
38
39
40
41
64
65
66
1
34
35
68
17
51
18
52
7
9
15
16
33
36
42
43
44
45
57
58
59
60
61
62
63
67
46
47
48
49
50
53
54
55
56
69
70
71
72
73
A10/CAD9
A11/CAD12
A9/CAD14
A8/CCBE1#
A13/CPAR
A14/CPERR#
A16/CClk
A15/CIRDY#
A12/CCBE2#
A7/CAD18
A6/CAD20
A5/CAD21
A4/CAD22
A3/CAD23
A2/CAD24
A1/CAD25
A0/CAD26
D3/CAD0
D4/CAD1
D5/CAD3
D6/CAD5
D7/CAD7
D0/CAD27
D1/CAD29
D2/RSVD
D11/CAD2
D12/CAD4
D13/CAD6
D14/RSRVD
D15/CAD8
D8/CAD28
D9/CAD30
D10/CAD31
GND
GND
GND
GND
Vcc
Vcc
Vpp1
Vpp2
CE1#/CCBE0#
OE#/CAD11
WE#/CGNT#
READY/IREQ#/CINT#
WP/IOIS16#/CCLKRUN#
CD1#/CCD1#
CE2#/CAD10
VS1#/CVS1
RSRVD/IORD#/CAD13
RSRVD/IOWR#/CAD15
VS2#/CVS2
RESET/CRST#
WAIT#/CSERR#
RSRVD/INPACK#/CREQ#
REG#/CCBE3#
BVD2/SPKR#/CAUDIO
BVD1/STSCHG#/CSTSCHG
CD2#/CCD2#
A17/CAD16
A18/RSRVD
A19/CBLOCK#
A20/CSTOP#
A21/CDEVSEL#
A22/CTRDY
A23/CFRAME#
A24/CAD17
A25/CAD19
CASE_GND
CASE_GND
CASE
CASE
CASE
1
C841C85
1
R254
1
R21
MCR03 102
1Kom
1
C59
1
R23
MCR03 103(option)
10Kom
1
R507
MCR03 103
10Kom
1
R28
MCR03 000
0om
1
R237
+
1
C219
F931C105M AA
1uF 16V
RA64
BCN104AB104J 7
1
2
3
4 5
6
7
8
1
2
3456
7
8
1
R248
MCR03 102
1Kom
1
R247
MCR03 000
0om
1
C231
IC18
SN74LVC16245AD GG
1
24
48
25
4
10
15
21
28
34
39
45
7
18
31
42
2
3
5
6
8
9
11
12
13
14
16
17
19
20
22
23
47
46
44
43
41
40
38
37
36
35
33
32
30
29
27
26
1DIR
2DIR
1OE
2OE
GND
GND
GND
GND
GND
GND
GND
GND
VCC
VCC
VCC
VCC
1B1
1B2
1B3
1B4
1B5
1B6
1B7
1B8
2B1
2B2
2B3
2B4
2B5
2B6
2B7
2B8
1A1
1A2
1A3
1A4
1A5
1A6
1A7
1A8
2A1
2A2
2A3
2A4
2A5
2A6
2A7
2A8
1
C233
MCH154CN104K
0.1uF 10V
RA62
BCN104AB104J 7
1
2
3
4 5
6
7
8
1
2
3456
7
8
1
R272
MCR03 103
10Kom
1
C47
+
1
C222
F931C106M AA
10uF 16V
1
R217
MCR03 103(option)
10Kom
RA61
BCN104AB104J 7
1
2
3
4 5
6
7
8
1
2
3456
7
8
1
R508
MCR03 103
10Kom
1
R224
IC11
SN74LVC162244ADGG R
2
3
5
6
8
9
11
12
13
14
16
17
19
20
22
23
43
44
46
47
37
38
40
41
32
33
35
36
26
27
29
30
1
24
25
48
7
18
31
42
4 10
15 21
28 34
3945
1Y1
1Y2
1Y3
1Y4
2Y1
2Y2
2Y3
2Y4
3Y1
3Y2
3Y3
3Y4
4Y1
4Y2
4Y3
4Y4
1A4
1A3
1A2
1A1
2A4
2A3
2A2
2A1
3A4
3A3
3A2
3A1
4A4
4A3
4A2
4A1
1OE
4OE
3OE
2OE
VCC
VCC
VCC
VCC
GND GND
GND GND
GND GND
GNDGND
1
R227
MCR03 103
10Kom
1
C39
MCH154CN104K
0.1uF 10V
1
C232
MCH154CN104K
0.1uF 10V
1
R226
1
C2671C87
IC17
SN74LVC162244ADGG R
2
3
5
6
8
9
11
12
13
14
16
17
19
20
22
23
43
44
46
47
37
38
40
41
32
33
35
36
26
27
29
30
1
24
25
48
7
18
31
42
410
1521
2834
39 45
1Y1
1Y2
1Y3
1Y4
2Y1
2Y2
2Y3
2Y4
3Y1
3Y2
3Y3
3Y4
4Y1
4Y2
4Y3
4Y4
1A4
1A3
1A2
1A1
2A4
2A3
2A2
2A1
3A4
3A3
3A2
3A1
4A4
4A3
4A2
4A1
1OE
4OE
3OE
2OE
VCC
VCC
VCC
VCC
GNDGND
GNDGND
GNDGND
GND GND
1
R223
MCR03 103
10Kom
1
R218
1
C58
1
C199
MCH154CN104K
0.1uF 10V
1
C268
1
R25
MCR03 102(option)
1Kom
1
R208
MCR03 103
10Kom
1
C65
1
R24
MCR03 102
1Kom
1
C221
MCH154CN104K
0.1uF 10V
RA63
BCN104AB104J 7
1
2
3
4 5
6
7
8
1
2
3456
7
8
1
C86
MCH154CN104K
0.1uF 10V
1
R228
IC52
LTC1472CS# PBF
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15 16
VCC(OUT)
5VIN
VCC EN1
VCC EN0
VPPIN
SHDN
VPP EN0
VPP EN1
VDD
GND
VPPOUT
VCC(IN)
GND
3VIN
3VIN VCC(OUT)
1
R22
MCR03 102(option)
1Kom
1
C64
MCH154CN104K
0.1uF 10V
+
1
C197
F931C106M AA
10uF 16V
1
C60
IC10
SN74LVC162244ADGG R
2
3
5
6
8
9
11
12
13
14
16
17
19
20
22
23
43
44
46
47
37
38
40
41
32
33
35
36
26
27
29
30
1
24
25
48
7
18
31
42
4 10
15 21
28 34
3945
1Y1
1Y2
1Y3
1Y4
2Y1
2Y2
2Y3
2Y4
3Y1
3Y2
3Y3
3Y4
4Y1
4Y2
4Y3
4Y4
1A4
1A3
1A2
1A1
2A4
2A3
2A2
2A1
3A4
3A3
3A2
3A1
4A4
4A3
4A2
4A1
1OE
4OE
3OE
2OE
VCC
VCC
VCC
VCC
GND GND
GND GND
GND GND
GNDGND
1
C38
MCH154CN104K
0.1uF 10V
PC_CEn[1..2]
VPP_EN
PC_VS_R[1..2]
A[0..25]
D[0..15]
PC_BVD_R[1..2]
CPU_PC_POEn
VCC_EN[0..1]
CPU_PC_CDn[1..2]
EBn[0..1]
RW
LBAn
OEn
CPU_PC_PWRON
CPU_PC_READY
PC_WAIT_R
PC_IOIS16_R
PC_RWn_R
PC_RST_R
F_PC_POEn
Page 80
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
AC97 USBOTG
USBFS_SEL=1
USBFS_SEL=0
USBH2_SEL=0
USBH2_SEL=1
ATA_SEL=0
ATA_SEL=1
SC06040Z-2 7 A
PERIPHERAL
A3
27 39Friday, November 10, 2006
KZM-ARM11-01
Kyoto Microcomputer Co., Ltd.
Title
Size Document Number Rev
Date: Sheet
of
USB_HS
USB_HS
USBH1_OVRUSBFS_ENn
USBFS_SEL
CPU_PC_VS2
STXD3
SRXD3
R_USBH2_D[0..1]
CPU_PC_RST
CPU_PC_RWn
CPU_IOIS16
CPU_PC_BVD[1..2]
CPU_USBH2_CLK
SCK3
SFS3
STXD6
SRXD6
CPU_USBH2_DIR
CPU_USBH2_NXT
CPU_USBH2_STP
CSPI1_MOS I
CPU_CSPI1_MISO
SFS6
CPU_CSPI1_SPI_RDY
CPU_CSPI1_SCLK
USBH2_SEL
USBH2_ENn
CPU_CSPI1_SS[0..2]
USBH1_MODE
LCD
LCD
LCD_ON
BK_LIGHT_ONn
TUCH_ENn
RSTn
F_LCD_HSYNC
F_CPU_HSYNC
F_CPU_FPSHIFT
CN_TCK/DCLK
CN_TMS/nSTATUS
TUCH_ENn
PC_CARD
NV3
CPU_PC_BVD[1..2]
CPU_PC_RST
CPU_IOIS16
CPU_PC_RWn
CPU_PC_VS2
SD1_SE L SD1_DETn
SD1_WPn
MSHC1_DETn
A[0..25]
D[0..15]
PC_CEn[1..2]
CPU_PWMO
CPU_ATA_DIOR
CPU_ATA_DIOW
CPU_ATA_DMACK
CPU_ATA_RESETn
CPU_ATA_CS[0..1]
VCC_EN[0..1]
LBAn
VPP_EN
EBn[0..1]
RW
OEn
F_PC_RWF_PC_POEn
CPU_PC_POEn
UART
NV8_9
UART2_ENn
FIR_ENn
UART1_SDn
UART1_MBAUD
UART1_ENn
CPU_DTE2_DTR
CPU_UART2_TXD
CPU_UART2_CTS
CPU_DTE2_DCD
CPU_UART2_RTS
CPU_UART2_RXD
CPU_DTE2_DSR
CPU_DTE2_RI
NV10
NV10
PR_TRACE_DATA[0..7]
TRACE_DATA[8..15]
R_NF_ALE
R_NF_CLE
R_NF_RB
R_NF_WEn
R_NF_WPn
R_NF_CEn
R_NF_REn
SRXD3
SFS3
SCK3
STXD6
SCK6
CSPI1_MOSI
SRXD6
SFS6
STXD3
CPU_CSPI1_MISO
CPU_CSPI1_SCLK
CPU_CSPI1_SPI_RDY
CPU_CSPI1_SS[0..2]
CPU_USBH2_CLK
CPU_USBH2_DIR
CPU_USBH2_NXT
R_USBH2_D[0..1]
CPU_USBH2_STP
PR_TRACE_CL K
PR_TRACE_CT RL
NV5
NV5
RSTn
CPU_BATT_LINE
CPU_SCK5
CPU_SRXD5
CPU_STXD5
CPU_SFS5
CPU_USB_PWR
CPU_USB_BYP
CPU_USB_OC
ATA
ATA
SRXD3
CPU_I2C1_CLK
CPU_CSI_VSYNC
R_USBH2_D[0..1]
CPU_PWMO
CPU_COMPARE
CPU_CSPI1_SCLK
CPU_USBH2_CLK
CPU_CSI_HSYNC
SFS3
CPU_CSI_MCLK
SCK3
SRXD6
CPU_CSI_D[6..15]
ATA_SEL
CPU_CSPI1_MISO
CPU_USBH2_NXT
CPU_USBH2_DIR
ATA_ENn
STXD6
CPU_CSPI1_SS[0..2]
STXD3
CPU_CSI_PIXCL K
CSPI1_MOS I
CPU_CSPI1_SPI_RDY
CPU_I2C1_DAT
CPU_USBH2_STP
CPU_CAPTURE
CPU_ATA_DIOW
CPU_ATA_DIOR
CPU_ATA_DMACK
CPU_ATA_CS 0
CPU_ATA_CS 1
CPU_ATA_RESE Tn
ATA_DASPn
ATA_DIAGn
ATA_IOIS16n
SCK6
CAMERA
NV4
CLK_26 M
CSI_ENn CPU_CSI_D[6..15]
CPU_CSI_HSYNC
CPU_CSI_MCLK
CPU_CSI_PIXCLK
CPU_CSI_VSYNC
CPU_I2C1_CLK
CPU_I2C1_DAT
CPU_GPIO3_0
CPU_USBH2_NXT
CPU_CSPI1_SS[0..2]
CPU_USBH2_NXT
SFS3
SRXD3
PR_TRACE_CTR L
R_NF_RB
CPU_ATA_DIOW
CPU_IOIS16
CPU_PC_BVD[1..2]
CPU_CAPTURE
CPU_CSI_VSYNC
R_NF_WPn
R_NF_WEn
VCC_EN[0..1]
SRXD3
CPU_ATA_CS1
STXD3
A[0..25]
CSI_ENn
SCK3
CPU_CSI_PIXCLK
R_NF_ALE
CPU_USBH2_STP
CSPI1_MOSI
PC_CEn[1..2]
PR_TRACE_CL K
TRACE_DATA[8..15]
CPU_PC_VS2
CPU_PC_RWn
CPU_CSPI1_SPI_RDY
CPU_CSPI1_SCLK
SCK6
CPU_ATA_CS0
SCK3
ATA_DAS Pn
D[0..15]
R_NF_CLE
CPU_ATA_DMACK
STXD3
CPU_CSI_D[6..15]
CPU_CSI_MCLK
ATA_SEL
ATA_DIAG n
CPU_PWMO
CPU_I2C1_CLK
LCD_ON
CPU_PC_RST
CPU_USBH2_DIR
STXD6
CPU_ATA_RESE Tn
CPU_ATA_DIOR
CPU_USBH2_STP
CPU_I2C1_DAT
RSTn
CPU_ATA_RESE Tn
SFS6
SFS3
STXD6
CPU_COMPARE
SD1_DETn
CPU_ATA_CS[0..1]
CPU_USBH2_CLK
BK_LIGHT_ONn CPU_CSPI1_SPI_RDY
SD1_SE L
CPU_ATA_DIOR
R_USBH2_D[0..1]
SCK6
CPU_CSPI1_SS[0..2]
ATA_ENn
PR_TRACE_DATA[0..7]
CPU_ATA_DMACK
CPU_USBH2_DIR
SRXD6
VPP_EN
R_NF_REn
CPU_PWMO
SRXD6
CPU_CSI_HSYNC
MSHC1_DETn
SD1_WPn
TUCH_ENn
R_NF_CEn
LBAn
CPU_USBH2_CLK
CPU_CSPI1_SCLK
CPU_CSPI1_MISO
CPU_ATA_DIOW
ATA_IOIS1 6n
RSTn
CPU_BATT_LIN E
EBn[0..1]
OEn
RW
CPU_I2C1_DAT
CPU_I2C1_CLK
CPU_CSI_HSYNC
CPU_CSI_VSYNC
CPU_CSI_D[6..15]
CPU_CSI_MCLK
CPU_CSI_PIXCLK
R_USBH2_D[0..1]
CPU_CSPI1_MISO
CSPI1_MOSI
FIR_ENn
UART1_MBAUD
UART1_SDn
UART2_ENn
UART1_ENn
CPU_GPIO3_0
USBH1_OVR
CPU_IOIS16
CPU_USBH2_STP
CPU_CSPI1_SS[0..2]
CPU_USBH2_CLK
CPU_CSPI1_SPI_RDY
CPU_CSPI1_MISO
CPU_PC_VS2
SRXD6
CSPI1_MOSI
STXD6
SFS3
CPU_USBH2_NXT
CPU_PC_BVD[1..2]
CPU_PC_RST
SRXD3
USBH1_MODE
CPU_USBH2_DIR
CPU_PC_RWn
SFS6
R_USBH2_D[0..1]
SCK3
STXD3
USBH1_SEL
USBH1_ENn
CPU_CSPI1_SCLK
USBH2_SEL
USBH2_ENn
F_LCD_HSYNC
F_PC_RW
CPU_SRXD5
CPU_SCK5
CPU_STX D5
CPU_SFS5
CPU_USB_BYP
CPU_USB_OC
CPU_USB_PWR
CPU_UART2_RXD
CPU_DTE2_RI
CPU_UART2_RTS
CPU_UART2_TX D
CPU_UART2_CTS
CPU_DTE2_DTR
CPU_DTE2_DCD
CPU_DTE2_DSR
F_CPU_HSYNC
F_CPU_FPSHIFT
CN_TMS/nSTATUS
CN_TCK/DCLK
TUCH_ENn
F_PC_POEn
CPU_PC_POEn
ATA_DIAG n
LCD_ON
R_NF_CEn
UART1_MBAUD
R_NF_WEn
ATA_IOIS1 6n
UART2_ENn
BK_LIGHT_ONn
LBAn
RSTn
R_NF_ALE
MSHC1_DETn
UART1_SDn
TUCH_ENn
A[0..25]
SD1_DETn
D[0..15]
PR_TRACE_CTR L
TRACE_DATA[8..15]
SD1_WPn
VPP_EN
PR_TRACE_CLK
VCC_EN[0..1]
SD1_SE L
PC_CEn[1..2]
R_NF_CLE
ATA_SEL
R_NF_REn
ATA_ENn
CSI_ENn
R_NF_RB
PR_TRACE_DATA[0..7]
ATA_DAS Pn
UART1_ENn
R_NF_WPn
CPU_BATT_LINE
CLK_26 M
EBn[0..1]
OEn
RW
CPU_CAPTURE
CPU_COMPAREFIR_ENn
CPU_GPIO3_0
USBH1_MODE
USBH2_SEL
USBH1_OVR
USBH2_ENn
USBH1_ENn
USBH1_SEL
F_LCD_HSYNC
F_PC_RW
CPU_SCK5
CPU_SRXD5
CPU_STXD 5
CPU_SFS5
CPU_USB_PWR
CPU_USB_BYP
CPU_USB_OC
CPU_UART2_RXD
CPU_DTE2_DCD
CPU_DTE2_RI
CPU_DTE2_DTR
CPU_DTE2_DSR
CPU_UART2_RTS
CPU_UART2_TX D
CPU_UART2_CTS
F_CPU_HSYNC
F_CPU_FPSHIFT
CN_TCK/DCLK
CN_TMS/nSTATUS
TUCH_ENn
F_PC_POEn
CPU_PC_POEn
Page 81
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
SC06040Z-28 A
POWER
A4
28 39Tuesday, January 16, 2007
KZM-ARM11-01 Kyoto Microcomputer Co., Ltd.
Title
Size Document Number Rev
Date: Sheet
of
CPU_PWR
CPU_PWR
PWR_IN
PWR_IN
+3.0V +3.0V +3.0V+3.0V
+5V
+3.0V
+5V
QVCC_PEAR
QVCC_ARM
QVCC_L2
+5V
1
C270
MCH185 152
1500PF 50V
+
1
C20
F931C106MAA
10uF 16V
IC90
MAX1644EAE+
2
4
12
11
1
6
7
14
16
8
13
15
9
10
5
3
IN0
IN1
VCC
FBSEL
SHDN
COMP
TOFF
LX1
LX2
FB
PGND0
PGND1
GND
REF
SS
LX0
1
R241
MCR03 000(option short)
0om
1
R230
MCR03 2940
294om
1
C507
UMK212F105ZG
1uF 50V
1
R234
MCR03 4991
4.99Kom
1
C504
EMK316F106ZL
10uF 16V
1
C506
MCH185 471
470PF 50V
+
1
C148
F931C106MAA
10uF 16V
IC20
LT1506CS8#PBF
1 2
3
4
5
6
7
8
VIN BOOST
SENSE/FB
GND
VC
SHDN
SYNC
VSW
1
R255
MCR03 000(option short)
0om
+
1
C272
F931C106MAA
10uF 16V
1
L3
CDRH125-100
D2
CMS03(TE12L,Q)
1
L7
CDRH4D28-4R7NC
1
C63
EMK316F106ZL
10uF 16V
1
C269
UMK212F105ZG
1uF 50V
1
R537
MCR03 204
200Kom
1
C508
MCH152CN103K
0.01uF 25V
1
R534
MCR03 2202
22Kom
1
C505
UMK212F105ZG
1uF 50V
1
R535
MCR03 1001
1Kom
+
1
C142
F931C106MAA
10uF 16V
VR4
G43B 5Kom(TOCOS option)
13
2
1
R533
MCR10 100
10om
+
1
C169
F931C106MAA
10uF 16V
1
R250
MCR03 562
5.6Kom
D7
1SS420(TPL3_F)
1
C76
EMK316F106ZL
10uF 16V
+
1
C78
6SVP82M
82uF 6V
1
R536
MCR03 4702
47Kom
1
R231
MCR03 1001
1Kom
D6
1SS420(TPL3_F)
1
R262
MCR03 000(option short)
0om
1
C503
UMK212F105ZG
1uF 50V
Page 82
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Vin max 16V
SC06040Z-29 A
POWER IN
A4
29 39Friday, November 10, 2006
Kyoto Microcomputer Co., Ltd.KZM-ARM11-01
Title
Size Document Number Rev
Date: Sheet
of
+5V
+9V
+5V
+9V
+9V
+9V +9V
+9V
+9V
1
C220
MCH185 152
1500PF 50V
1
C42
MCH152CN103K
0.01uF 25V
1
R209
MCR03 4991
4.99Kom
1
R30
MCR03 102
1Kom
1
R212
MCR03 105
1Mom
1
R210
MCR03 2940
2940om
IC8B
TC4011BF
5
6
4
147
D1
CMS03(TE12L,Q)
1
R219
MCR03 102
1Kom
1
R221
MCR03 102
1Kom
1
R213
MCR03 104
100Kom
IC8C
TC4011BF
8
9
10
147
IC4
LT1506CS8#PBF
1 2
3
4
5
6
7
8
VIN BOOST
SENSE/FB
GND
VC
SHDN
SYNC
VSW
1
C229
UMK212F105ZG
1uF 50V
IC8D
TC4011BF
12
13
11
147
t
RT1
RUEF250
1
LED2
EMVR3371X
SILK:+5V PWR
Q1
2SK3019
G
DS
J4
HEC3110-01-010
2
3
1
1
C41
EMK316F106ZL
10uF 16V
1
L1
CDRH125-100
SW1
SKRPABE010(ALPS)
1 4
2 3
1
C34
EMK316F106ZL
10uF 16V
1
C198
UMK212F105ZG
1uF 50V
1
C214
MCH152CN103K
0.01uF 25V
+
1
C19
UUD1E101MCL-1GS
100uF 25V
IC8A
TC4011BF
1
2
3
147
LED1
EMPG3371X
SILK:PWR IN
1
R195
MCR03 102
1Kom
D58
CMS03(TE12L,Q)
+
1
C46
6SVP82M
82uF 6V
D4
1SS420(TPL3_F)
1
R211
MCR03 4991
4.99Kom
Page 83
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
vout=2.8V
SC06040Z-3 0 A
NORMAL SDRAM
A3
30 39Friday, November 10, 2006
KZM-ARM11-01
Kyoto Microcomputer Co., Ltd.
Title
Size Document Number Rev
Date: Sheet
of
SDRAM_CKE[0..1]
SDRAM_DQM[0..3]
SDRAM_BA[0..1]
SDRAM_D[0..31]
MEM_A[0..12]
MEM_A0
SDRAM_D17
SDRAM_D12
SDRAM_D26
SDRAM_D23
SDRAM_D20
SDRAM_D0
SDRAM_D21
SDRAM_D27
SDRAM_D18
SDRAM_D30
SDRAM_D13
SDRAM_D10
SDRAM_D19
SDRAM_D1
SDRAM_D9
SDRAM_D4
SDRAM_D11
SDRAM_D15
SDRAM_D22
SDRAM_D7
SDRAM_D25
SDRAM_D2
SDRAM_D31
SDRAM_D3
SDRAM_D28
SDRAM_D16
SDRAM_D14
SDRAM_D29
SDRAM_D8
SDRAM_D6
SDRAM_D5
SDRAM_D24
SDRAM_CSn[0..1]
SD_A1
SD_DQM3
SD_A9
SD_A5
SD_CKE0
SD_A1 2
SD_A1 1
SD_WEn
SD_A8
SD_A3
SD_A4
SD_DQM2
SD_A2
SD_A6
SD_A7
SD_DQM1
SD_DQM0
SD_BA0
SD_CASn
SD_RASn
SD_CKE1
SD_BA1
SD_D0
SD_D1
SD_D2
SD_D3
SD_D4
SD_D5
SD_D6
SD_D7
SD_D8
SD_D9
SD_D10
SD_D11
SD_D12
SD_D13
SD_D14
SD_D15
SD_D16
SD_D17
SD_D18
SD_D19
SD_A9
SD_A8
SD_A2
SD_A3
SD_A0
SD_A5
SD_A6
SD_A1 2
SD_A7
SD_A4
SD_A1
SD_A1 1
SD_A1 0
SD_A1 0
SD_A2
SD_A9
SD_A6
SD_A4
SD_A5
SD_A8
SD_A7
SD_A1 2
SD_A3
SD_A1 1
SD_A1 0
SD_A0
SD_A1
SD_A2
SD_A9
SD_A6
SD_A4
SD_A5
SD_A8
SD_A7
SD_A1 2
SD_A3
SD_A1 1
SD_A1 0
SD_A0
SD_A1
SD_A2
SD_A9
SD_A6
SD_A4
SD_A5
SD_A8
SD_A7
SD_A1 2
SD_A3
SD_A1 1
SD_A1 0
SD_A0
SD_A1
SD_D10
SD_D9
SD_D16
SD_D8
SD_D15
SD_D1
SD_D14
SD_D3
SD_D6
SD_D18
SD_D17
SD_D5
SD_D2
SD_D4
SD_D13
SD_D7
SD_D11
SD_D12
SD_D19
SD_D0
SD_D24
SD_D27
SD_D22
SD_D21
SD_D25
SD_D28
SD_D31
SD_D23
SD_D29
SD_D20
SD_D26
SD_CSn0
SD_D30
SD_D14
SD_D5
SD_D3
SD_D11
SD_D31
SD_D7
SD_D9
SD_D20
SD_D22
SD_D16
SD_D17
SD_D25
SD_D4
SD_D12
SD_D23
SD_D0
SD_D19
SD_D28
SD_D8
SD_D18
SD_D27
SD_D26
SD_D13
SD_D30
SD_D10
SD_D29
SD_D21
SD_D1
SD_D6
SD_D15
SD_D24
SD_D2
SD_BA1
SD_BA0
SD_CLK
SD_RASn
SD_CASn
SD_DQM3
SD_DQM2
SD_DQM1
SD_CKE0
SD_WEn
SD_DQM0
SD_CLK
SD_BA1
SD_BA0
SD_CKE0
SD_CLK SD_CLK
SD_CKE1
SD_BA0
SD_CKE1
SD_BA1 SD_BA1
SD_DQM3
SD_DQM2
SD_DQM1
SD_DQM0
SD_BA0
SD_D10
SD_D9
SD_D16
SD_D8
SD_D15
SD_D1
SD_D14
SD_D6
SD_D18
SD_D17
SD_D5
SD_D2
SD_D4
SD_D13
SD_D7
SD_D11
SD_D12
SD_D19
SD_D0
SD_D24
SD_D27
SD_D22
SD_D21
SD_BA1
SD_D25
SD_BA0
SD_RASn
SD_D23
SD_CLK
SD_D20
SD_CSn1
SD_D26
SD_D28
SD_D31
SD_D30
SD_D29
SD_A9
SD_A8
SD_DQM2
SD_A2
SD_A3
SD_A0
SD_CKE0
SD_A5
SD_A1 0
SD_A6
SD_A1 2
SD_A7
SD_A4
SD_A1
SD_A1 1
SD_CASn
SD_WEn
SD_RASn
SD_CSn0
SD_WEn
SD_CASn
SD_RASn
SD_CSn1
SD_WEn
SD_RASn
SD_CASn
SD_CSn1
MEM_A1
MEM_A2
MEM_A3
MEM_A4
MEM_A5
MEM_A6
MEM_A7
MEM_A8
MEM_A9
SDRAM_A10
MEM_A11
MEM_A12
SD_D3
SD_DQM3
SD_CASn
SD_WEn
SD_DQM1
SD_DQM0
SD_CSn0
SD_CKE1
SD_A0
SD_D22
SD_D27
SD_CSn1
SD_D21
SD_D26
SD_D31
SD_CSn0
SD_D20
SD_D25
SD_D30
SD_CLK
SD_D24
SD_D29
SD_D23
SD_D28
SDRAM_DQM3
SDRAM_CKE0
SDRAM_DQM0
SDRAM_WEn
SDRAM_DQM2
SDRAM_RASn
SDRAM_CLK
SDRAM_CASn
SDRAM_BA0
SDRAM_CSn0
SDRAM_CSn1
SDRAM_BA1
SDRAM_CKE1
SDRAM_DQM1
SDC
SDC
SDC+5V
SDC
SDC
+3.0V +3.0V
+3.0V+3.0V
+3.0V
+3.0V
+3.0V
+3.0V
+3.0V
+3.0V
+3.0V
+3.0V
+3.0V
+3.0V
+3.0V
+3.0V
+3.0V
+3.0V
+3.0V
+3.0V
+3.0V
+3.0V
+3.0V
+3.0V
RA17
BCN104AB471J7(option)
1
2
3456
7
8
1
2
3456
7
8
+
1
C69
F931C106MAA(option )
10uF 16V
IC24
MT48LC32M16A2P-75 L(opt ion)
2
4
5
7
8
10
11
13
42
44
45
47
48
50
51
53
23
24
25
26
29
30
31
32
33
34
22
35
21
20
17
37
38
18
16
19
15
39
1
14
27
3
9
43
49
6
12
28
41
46
52
54
40
36
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
BA1
BA0
CAS
CKE
CLK
RAS
WE
CS
DQML
DQMU
VCC
VCC
VCC
VCCQ
VCCQ
VCCQ
VCCQ
GND
GND
GND
GND
GND
GND
GND
NC
A12
1
R236
MCR03 103(option)
10Kom
VR3
G43B 50Kom(TOCOS option)
13
2
1
C133
MCH154CN104K(option)
0.1uF 10V
RA33
BCN104AB471J7(option)
1
2
3
4 5
6
7
8
1
2
3456
7
8
RA18
BCN104AB471J7(option)
1
2
3456
7
8
1
2
3456
7
8
1
C295
MCH154CN104K(option)
0.1uF 10V
D8
1SS420(TPL3_F optio n)
IC55
MT48LC32M16A2P-75 L(opt ion)
2
4
5
7
8
10
11
13
42
44
45
47
48
50
51
53
23
24
25
26
29
30
31
32
33
34
22
35
21
20
17
37
38
18
16
19
15
39
1
14
27
3
9
43
49
6
12
28
41
46
52
54
40
36
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
BA1
BA0
CAS
CKE
CLK
RAS
WE
CS
DQML
DQMU
VCC
VCC
VCC
VCCQ
VCCQ
VCCQ
VCCQ
GND
GND
GND
GND
GND
GND
GND
NC
A12
1
C290
MCH154CN104K(option)
0.1uF 10V
1
C305
MCH154CN104K(option)
0.1uF 10V
RA12
BCN104AB471J7(option)
1
2
3
45
6
7
8
1
2
3456
7
8
1
C294
MCH154CN104K(option)
0.1uF 10V
1
R246
MCR03 000(option)
0om
1
C306
MCH154CN104K(option)
0.1uF 10V
1
C103
MCH154CN104K(option)
0.1uF 10V
RA14
BCN104AB471J7(option)
1
2
3
45
6
7
8
1
2
3456
7
8
+
1
C140
F931C106MAA(option )
10uF 16V
RA9
BCN104AB471J7(option)
1
2
3456
7
8
1
2
3456
7
8
1
C106
MCH154CN104K(option)
0.1uF 10V
RA27
BCN104AB471J7(option)
1
2
3
45
6
7
8
1
2
3456
7
8
IC15
LP2951ACM(option )
8 1
7
43
5
2
6
VIN VOUT
FB
GNDSD
ERROR
SENCE
VTAP
1
C363
MCH154CN104K(option)
0.1uF 10V
IC31
MT48LC32M16A2P-75 L(opt ion)
2
4
5
7
8
10
11
13
42
44
45
47
48
50
51
53
23
24
25
26
29
30
31
32
33
34
22
35
21
20
17
37
38
18
16
19
15
39
1
14
27
3
9
43
49
6
12
28
41
46
52
54
40
36
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
BA1
BA0
CAS
CKE
CLK
RAS
WE
CS
DQML
DQMU
VCC
VCC
VCC
VCCQ
VCCQ
VCCQ
VCCQ
GND
GND
GND
GND
GND
GND
GND
NC
A12
IC27
SN74CB3T16210DGG(optio n)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24 25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
NC
1A1
1A2
1A3
1A4
1A5
1A6
GND
1A7
1A8
1A9
1A10
2A1
2A2
VCC
2A3
GND
2A4
2A5
2A6
2A7
2A8
2A9
2A10 2B10
2B9
2B8
2B7
2B6
2B5
2B4
GND
2B3
2B2
2B1
1B10
1B9
1B8
1B7
1B6
GND
1B5
1B4
1B3
1B2
1B1
2OE
1OE
RA7
BCN104AB471J7(option)
1
2
3
45
6
7
8
1
2
3456
7
8
RA43
BCN104AB471J7(option)
1
2
3
4 5
6
7
8
1
2
3456
7
8
1
C313
MCH154CN104K(option)
0.1uF 10V
1
C304
MCH154CN104K(option)
0.1uF 10V
IC23
SN74CB3T16210DGG(optio n)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24 25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
NC
1A1
1A2
1A3
1A4
1A5
1A6
GND
1A7
1A8
1A9
1A10
2A1
2A2
VCC
2A3
GND
2A4
2A5
2A6
2A7
2A8
2A9
2A10 2B10
2B9
2B8
2B7
2B6
2B5
2B4
GND
2B3
2B2
2B1
1B10
1B9
1B8
1B7
1B6
GND
1B5
1B4
1B3
1B2
1B1
2OE
1OE
1
C353
MCH154CN104K(option)
0.1uF 10V
1
C90
MCH154CN104K(option)
0.1uF 10V
+
1
C77
F931C106MAA(option )
10uF 16V
RA41
BCN104AB471J7(option)
1
2
3
4 5
6
7
8
1
2
3456
7
8
IC32
SN74CB3T16210DGG(optio n)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24 25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
NC
1A1
1A2
1A3
1A4
1A5
1A6
GND
1A7
1A8
1A9
1A10
2A1
2A2
VCC
2A3
GND
2A4
2A5
2A6
2A7
2A8
2A9
2A10 2B10
2B9
2B8
2B7
2B6
2B5
2B4
GND
2B3
2B2
2B1
1B10
1B9
1B8
1B7
1B6
GND
1B5
1B4
1B3
1B2
1B1
2OE
1OE
1
C311
MCH154CN104K(option)
0.1uF 10V
1
C134
MCH154CN104K(option)
0.1uF 10V
1
C105
MCH154CN104K(option)
0.1uF 10V
1
C289
MCH154CN104K(option)
0.1uF 10V
1
R233
MCR03 103(option)
10Kom
RA34
BCN104AB471J7(option)
1
2
3
4 5
6
7
8
1
2
3456
7
8
RA1
BCN104AB471J7(option)
1
2
3
4 5
6
7
8
1
2
3456
7
8
1
C312
MCH154CN104K(option)
0.1uF 10V
RA42
BCN104AB471J7(option)
1
2
3
4 5
6
7
8
1
2
3456
7
8
1
C104
MCH154CN104K(option)
0.1uF 10V
RA8
BCN104AB471J7(option)
1
2
3
45
6
7
8
1
2
3456
7
8
+
1
C284
F931C106MAA(option )
10uF 16V
+
1
C89
F931C106MAA(option )
10uF 16V
1
C132
MCH154CN104K(option)
0.1uF 10V
RA36
BCN104AB471J7(option)
1
2
3
4 5
6
7
8
1
2
3456
7
8
1
C291
MCH154CN104K(option)
0.1uF 10V
IC58
MT48LC32M16A2P-75 L(opt ion)
2
4
5
7
8
10
11
13
42
44
45
47
48
50
51
53
23
24
25
26
29
30
31
32
33
34
22
35
21
20
17
37
38
18
16
19
15
39
1
14
27
3
9
43
49
6
12
28
41
46
52
54
40
36
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
BA1
BA0
CAS
CKE
CLK
RAS
WE
CS
DQML
DQMU
VCC
VCC
VCC
VCCQ
VCCQ
VCCQ
VCCQ
GND
GND
GND
GND
GND
GND
GND
NC
A12
1
C354
MCH154CN104K(option)
0.1uF 10V
SDRAM_D[0..31]
MEM_A[0..12]
SDRAM_DQM[0..3]
SDRAM_BA[0..1]
SDRAM_CKE[0..1]
SDRAM_CSn[0..1]
SDRAM_A1 0
SDRAM_WEn
SDRAM_RASn
SDRAM_CLK
SDRAM_CASn
Page 84
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
SC06040Z-31 A
SDRAM CONTROL REGISTOR
A4
31 39Friday, November 10, 2006
KZM-ARM11-01 Kyoto Microcomputer Co., Ltd.
Title
Size Document Number Rev
Date: Sheet
of
DRAM_RASn
nRAS
SDRAM_CLK
SDRAM_BA0
nCAS
DRAM_CASn
SDRAM_CASn
SDBA1
DRAM_CLK
SDRAM_RASn
DRAM_BA0
SDBA0
SDRAM_BA1
DRAM_BA1
SDRAM_CKE1
DRAM_CSn0
SDRAM_CKE0
DRAM_CKE1
DRAM_WEn
DRAM_DQM0
CDS1
SDCKE1
DQM0
SDRAM_DQM0
DRAM_CSn1
DRAM_CKE0
CDS0
nSDWE
SDCKE0
SDRAM_WEn
MA10
SDCLK
MDRAM_A10
SDRAM_A10
SDRAM_DQM1
DRAM_DQM1
DQM1
SDRAM_BA[0..1]
R_PC_CEn1
R_PC_CEn[1..2]
R_PC_CEn2
DRAM_BA[0..1]
SDBA[0..1]
SDRAM_CSn0
SDRAM_CSn1
SDRAM_CKE[0..1]
SDCKE[0..1]
DRAM_CKE[0..1]
DQM[0..3]
DRAM_DQM[0..3]
SDRAM_DQM[0..3]
CDS[0..1]
SDRAM_CSn[0..1]
DRAM_CSn[0..1]
SDRAM_DQM2
DRAM_DQM3
DQM2
SDRAM_DQM3
DRAM_DQM2
DQM3
DRAM_DQS[0..3]SDQS[0..3]
SDQS2
SDQS1
SDQS3
SDQS0 DRAM_DQS0
DRAM_DQS1
DRAM_DQS2
DRAM_DQS3
SDCLKn DRAM_CLKn
1
R287
MCR01 330
33om
1
R147
MCR01 100(option)
10om
1
R140
MCR01 100(option)
10om
1
R79
MCR01 330
33om
1
R143
MCR01 100(option)
10om
1
R363
MCR01 330
33om
1
R368
MCR01 100
10om
1
R518
1
R364
MCR01 330
33om
1
R521
MCR01 100
10om
1
R283
MCR01 100(option)
10om
1
R284 33om
MCR01 330
1
R146
MCR01 100(option)
10om
1
R358
MCR01 330
33om
1
R136
MCR01 100(option)
10om
1
R365
MCR01 330
33om
1
R137
MCR01 100(option)
10om
1
R372
MCR01 330
33om
1
R80
MCR01 330
33om
1
R76
MCR01 330
33om
1
R374
MCR01 330
33om
1
R131
MCR01 100(option)
10om
1
R373
MCR01 330
33om
1
R148
MCR01 100(option)
10om
1
R141
MCR01 100(option)
10om
1
R370
MCR01 330
33om
1
R139
MCR01 100(option)
10om
1
R81
MCR01 100(option)
10om
1
R375
MCR01 330
33om
1
R371
MCR01 330
33om
1
R78
MCR01 100(option)
10om
1
R520
1
R517
MCR01 100
10om
1
R369
MCR01 330
33om
1
R142
MCR01 100(option)
10om
1
R519
1
R135
MCR01 100(option)
10om
DRAM_CLK
SDRAM_CLK
SDCLK
MA10 MDRAM_A10
SDRAM_A10
DRAM_CASn
SDRAM_RASn
nCAS
SDRAM_CASn
nRAS DRAM_RASn
SDRAM_BA[0..1]
SDBA[0..1]
R_PC_CEn[1..2]
DRAM_BA[0..1]
SDRAM_WEn
DRAM_WEnnSDWE
DRAM_CKE[0..1]
SDCKE[0..1]
SDRAM_CKE[0..1]
DQM[0..3]
SDRAM_DQM[0..3]
DRAM_DQM[0..3]
DRAM_CSn[0..1]
CDS[0..1]
SDRAM_CSn[0..1]
DRAM_DQS[0..3]SDQS[0..3]
SDCLKn DRAM_CLKn
Page 85
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
SC06040Z-32 A
SDRAM DATA REGISTOR
A4
32 39Friday, November 10, 2006
KZM-ARM11-01 Kyoto Microcomputer Co., Ltd.
Title
Size Document Number Rev
Date: Sheet
of
SDRAM_D1
SD1
SD9
DRAM_D7
DRAM_D1
SDRAM_D6
SD2
SDRAM_D5
SD0
SD3
SDRAM_D9
DRAM_D4
SDRAM_D4
SDRAM_D0
DRAM_D8
SD7
SDRAM_D8
DRAM_D5
SDRAM_D3
SD6
DRAM_D9
SD5
DRAM_D6
DRAM_D2
SD8
SDRAM_D7
DRAM_D0
SDRAM_D2
DRAM_D3
SD4 SD13
DRAM_D11
SDRAM_D14
SDRAM_D10
SD10
DRAM_D14
SD12
SDRAM_D13
DRAM_D15
DRAM_D12
SD14
SDRAM_D12
SD11
DRAM_D13
SD15
DRAM_D10
SDRAM_D15
SDRAM_D11
SD17
DRAM_D18
DRAM_D16
SD18
SDRAM_D17
DRAM_D20
SDRAM_D16
SDRAM_D20
DRAM_D17
SD16
SD20
SDRAM_D18
SDRAM_D19
SD19
DRAM_D19
SD21
DRAM_D22
DRAM_D23
SDRAM_D22
SD25
SD22
DRAM_D25
SDRAM_D25
SDRAM_D21
SD23
DRAM_D21
SDRAM_D24
SD24
SDRAM_D23
DRAM_D24
DRAM_D26
SDRAM_D26
SD26
SD31
SD29
SDRAM_D27
SDRAM_D31
SD27
SDRAM_D30
DRAM_D29
DRAM_D28
DRAM_D31
SDRAM_D29
SD30
SDRAM_D28
DRAM_D27
DRAM_D30
SD28
SDRAM_D[0..31]
DRAM_D[0..31]
SD[0..31]
1
R115
MCR01 100(option)
10om
1
R117
MCR01 100(option)
10om
1
R89
MCR01 100(option)
10om
1
R125
MCR01 100(option)
10om
1
R299
MCR01 330
33om
1
R130
MCR01 100(option)
10om
1
R84
MCR01 100(option)
10om
1
R119
MCR01 100(option)
10om
1
R356
MCR01 330
33om
1
R303
MCR01 330
33om
1
R132
MCR01 100(option)
10om
1
R88
MCR01 100(option)
10om
1
R357
MCR01 330
33om
1
R100
MCR01 100(option)
10om
1
R326
MCR01 330
33om
1
R128
MCR01 100(option)
10om
1
R104
MCR01 100(option)
10om
1
R323
MCR01 330
33om
1
R319
MCR01 330
33om
1
R114
MCR01 100(option)
10om
1
R297
MCR01 330
33om
1
R112
MCR01 100(option)
10om
1
R126
MCR01 100(option)
10om
1
R306
MCR01 330
33om
1
R352
MCR01 330
33om
1
R109
MCR01 100(option)
10om
1
R85
MCR01 100(option)
10om
1
R318
MCR01 330
33om
1
R327
MCR01 330
33om
1
R129
MCR01 100(option)
10om
1
R322
MCR01 330
33om
1
R121
MCR01 100(option)
10om
1
R329
MCR01 330
33om
1
R298
MCR01 330
33om
1
R336
MCR01 330
33om
1
R308
MCR01 330
33om
1
R330
MCR01 330
33om
1
R124
MCR01 100(option)
10om
1
R348
MCR01 330
33om
1
R99
MCR01 100(option)
10om
1
R317
MCR01 330
33om
1
R87
MCR01 100(option)
10om
1
R116
MCR01 100(option)
10om
1
R354
MCR01 330
33om
1
R321
MCR01 330
33om
1
R113
MCR01 100(option)
10om
1
R98
MCR01 100(option)
10om
1
R107
MCR01 100(option)
10om
1
R108
MCR01 100(option)
10om
1
R335
MCR01 330
33om
1
R103
MCR01 100(option)
10om
1
R120
MCR01 100(option)
10om
1
R346
MCR01 330
33om
1
R307
MCR01 330
33om
1
R337
MCR01 330
33om
1
R347
MCR01 330
33om
1
R133
MCR01 100(option)
10om
1
R83
MCR01 100(option)
10om
1
R302
MCR01 330
33om
1
R102
MCR01 100(option)
10om
1
R325
MCR01 330
33om
1
R353
MCR01 330
33om
1
R301
MCR01 330
33om
1
R328
MCR01 330
33om
SDRAM_D[0..31]
DRAM_D[0..31]
SD[0..31]
Page 86
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
NVCC3
S=L B1
SC06040Z-33 A
SD/MS
A4
33 39Friday, November 10, 2006
Kyoto Microcomputer Co., Ltd.KZM-ARM11-01
Title
Size Document Number Rev
Date: Sheet
of
MSHC1_D2
SD1_SEL
MSHC1_SDIO_D0
SD1_CLK
SD1_DETn
MSHC1_SCLK
MSHC1_D1
CPU_SD1_D0
SD1_DETn
SD1_CMD
MSHC1_DETn
SD1_D3
MSHC1_D2
MSHC1_DETn
SD1_CLK
SD1_SEL
CPU_SD1_D1
SD1_WPn
SD1_D2
MSHC1_BS
SD1_CMD
CPU_SD1_CLK
MSHC1_SDIO_D0
CPU_SD1_D3
SD1_WPn
SD1_D1
MSHC1_D1
MSHC1_BS
SD1_D0
MSHC1_D3
CPU_SD1_CMD
MSHC1_SCLK
SD1_D3
CPU_SD1_D2
CPU_SD1_D[0..3]
CPU_SD1_CMD
CPU_SD1_CLK
SD1_CLK
SD1_CMD
SD1_D1
MSHC1_D2
SD1_D0
SD1_D2
MSHC1_D1
MSHC1_D3
SD1_D3
MSHC1_SDIO_D0
VSD1
VSD1
VSD1
+3.0V
+3.0V
+3.0V
+3.0V
+3.0V
+3.0V
+3.0V
1
R416
MCR03 104
100Kom
1
C159
MCH152CN103K(option)
0.01uF 16V
IC38
SN74CB3Q3257PWR
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
S
1B1
1B2
1A
2B1
2B2
2A
GND
3A
3B2
3B1
4A
4B2
4B1
OE
VCC
1
R429
MCR03 102(option)
1Kom
1
R430
MCR03 103
10Kom
1
R164
MCR03 000
0om
1
R437
MCR03 103(option)
10Kom
CN31
CB1G-10S-1.5H-PEJC2(option HIROSE)
1
2
3
4
5
6
7
8 9
10
VSS
BS
DATA1
SDIO/DATA0
DATA2
INS
DATA3
SCLK VCC
VSS
1
C157
MCH154CN104K
0.1uF 10V
1
R419
1
R162
MCR03 471
470om
MMC Ver4
CN24
DM1AA-SF-PEJ(21)(HIROSE)
1
2
3
4
5
6
7
8
9
14
16
15
10
11
12
13
DAT3
CMD
VSS1
VDD
CLK
VSS2
DAT0
DAT1
DAT2
CD
CD_WP_COM
WP
DAT4
DAT5
DAT6
DAT7
1
R433
1
C158
MCH154CN104K
0.1uF 10V
IC39
SN74CB3Q3257PWR
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
S
1B1
1B2
1A
2B1
2B2
2A
GND
3A
3B2
3B1
4A
4B2
4B1
OE
VCC
1
R428
1
C420
MCH152CN103K(option)
0.01uF 16V
1
C421
UMK212F105ZG(option)
1uF 50V
1
R163
MCR03 471
470om
1
R171
1
C156
MCH154CN104K
0.1uF 10V
1
R174
MCR03 103
10Kom
1
C154
MCH154CN104K
0.1uF 10V
1
R420
MCR03 102
1Kom
1
R415
MCR03 104(option)
100Kom
1
R417
MCR03 473(option)
470Kom
1
R418
MCR03 102
1Kom
1
C153
MCH154CN104K
0.1uF 10V
SD1_DETn
CPU_SD1_D[0..3]
SD1_SEL
SD1_WPn
MSHC1_DETn
CPU_SD1_CLK
CPU_SD1_CMD
Page 87
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
SC06040Z-34 A
FLASH MEM
A4
34 39Friday, November 10, 2006
KZM-ARM11-01
Kyoto Microcomputer Co., Ltd.
Title
Size Document Number Rev
Date: Sheet
of
A2
RSTn
A15
A22
D12
A1
M_OEn
D11
D9
D14
D3
A22
A18
A14
A11
D5
A1
D7
A13
A12
A15
A13
M_INHn
D3
STD_CSn
A2
D8
D4
A18
A21
A24
D10
A23
D9
D2
A25
A19
A17
A10
A7
D1
A11
A7
D1
M_WEn0
A3
D13
D6
A16
D14
A5
D0
A17
A3
D11
D8
A24
A9
A23
M_WEn1
A5
M_WEn[0..1]
D15
A10
A4
D0
A19
A[0..25]
D13
D12
A16
A8
A20
D5
D2
D10
M_OEn
D7
D4
A21
A8
A6
A4
D[0..15]
D6
A14
A9
A6
A20
A12
FLSH_CSn
M_WEn0
CPU_GPIO3_0
M_INHn
A0A0
D15
D11
D14
D1 D9
D5 D13
D6
D4
D8
D10D2
D3
D15
D12
D0
D7
A0
+3.0V
+3.0V
+3.0V
+3.0V
+3.0V
+3.0V
+3.0V +3.0V
+3.0V+3.0V
1
C196
MCH154CN104K
0.1uF 10V
1
C24
MCH154CN104K
0.1uF 10V
1
C6
MCH154CN104K
0.1uF 10V
RA24
BCN104AB103J7
1
2
3
45
6
7
8
1
2
3456
7
8
CN9
8931E-050-178S
A1
A2
A3
A4
A13
A14
A15
A16
A25
B1
B2
B3
B25
B13
B14
B15
B16
A17
B17
A18
B18
A19
B19
A20
B20
A21
B21
A22
B22
A23
B23
A24
B24
B4
A5
B5
A6
B6
A7
B7
A8
B8
A9
B9
A10
B10
A11
B11
A12
B12
GND
A1
A3
A5
WRH
WRL
CS
OE
GND
A0
A2
A4
GND
INH
A23(GND)
A24(GND)
PSENSE
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
D11
D12
D13
D14
D15
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
1
R492
MCR03 103
10Kom
1
C194
MCH154CN104K
0.1uF 10V
1
R182
MCR03 103
10Kom
IC1
S29GL512N
13
14
16
17
55
53
34
32
1
2
11
12
15
18
19
25
26
56
54
31 35
24
23
22
21
20
10
9
8
7
6
5
4
3
52
43
33
30
29
28
27
37
39
41
44
46
48
50
36
38
40
42
45
47
49
51
WE
RESET
WP/ACC
RY/BY
NC
BYTE
OE
CE
A23
A22
A19
A20
A21
A18
A17
A2
A1
A24
A16
A0 DQ0
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
VSS
VCC
VSS
NC
VIO
NC
NC
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15/A-1
1
C25
MCH154CN104K
0.1uF 10V
1
R509
MCR03 000
0om
RA23
BCN104AB103J7
1
2
3
45
6
7
8
1
2
3456
7
8
1
C5
MCH154CN104K
0.1uF 10V
1
R510
MCR03 000(option)
0om
RA22
BCN104AB103J7
1
2
3
45
6
7
8
1
2
3456
7
8
1
R1
MCR03 103
10Kom
RA21
BCN104AB103J7
1
2
3
45
6
7
8
1
2
3456
7
8
M_INHn
M_WEn[0..1]
M_OEn
A[0..25]
D[0..15]
RSTn
STD_CSn
FLSH_CSn
CPU_GPIO3_0
Page 88
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
NVCC1
SC06040Z-35 A
SWITCH LED
A4
35 39Friday, November 10, 2006
Kyoto Microcomputer Co., Ltd.KZM-ARM11-01
Title
Size Document Number Rev
Date: Sheet
of
MD_SWn0
SEG1
MD_SWn1
SEG3
SEG0
MD_SWn3
SEG2
MD_SWn2
L_DB7
L_E
L_RS
L_DB3
L_DB5
L_DB4
L_DB0
L_DB1
L_DB6
L_DB2
L_RW
SEG1
SEG2
SEG0
SEG3
SEG[0..7]
L_DB[0..7]
MD_SWn[0..3]
SW0
SW3
SW2
SW1
SW[0..3]
LED3
LED0
LED1
LED2
LED[0..3]
SEG4
SEG6
SEG5
SEG7
+5V
+3.0V
LED7
LA-301VL(ROHM)
1
10
8
5
4
2
3
76
9
a
b
c
d
e
f
g
dpcomdp
com
1
R292
MCR03 332
3.3Kom
DSW2
KHS04
1
2
3
4
8
7
6
5
RA11
BCN164AI102J7
1
2
3
45
6
7
8
1
2
3456
7
8
RA15
BCN164AI102J7
1
2
3
45
6
7
8
1
2
3456
7
8
1
R289
MCR03 332
3.3Kom
1
R290
MCR03 332
3.3Kom
LED5
SML-311UTT86
VR7
G43B 10Kom(TOCOS)
13
2
CN15
HKP-14FD2
1
2
3
4
5
6
7
8
9
10
11
12
13
14
DB7
DB6
DB5
DB4
DB3
DB2
DB1
DB0
E
R/W
RS
VO
VSS
VDD
CP11
ST-4-2(option)
7SEG1
LED4
SML-311UTT86
RSW1
DRS4116Z(tsumami:MD0050954)
4
C8
1
2
4
C8
1
2
LED6
SML-311UTT86
1
C308
MCH154CN104K
0.1uF 10V
1
R291
MCR03 332
3.3Kom
RA16
BCN104AB103J7(option)
1
2
3
4 5
6
7
8
1
2
3456
7
8
CP10
ST-4-2(option)
7SEG2
CP9
ST-4-2(option)
7SEG3
LED3
SML-311UTT86
CP12
ST-4-2(option)
7SEG0
SEG[0..7]
L_DB[0..7]
MD_SWn[0..3]
SW[0..3]
LED[0..3] L_E
L_RW
L_RS
Page 89
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
STOP MD ENABLE LOW
LOW:19200bps
NVCC9
SC06040Z-36 A
TOUCH PANEL
A4
36 39Friday, November 10, 2006
KZM-ARM11-01 Kyoto Microcomputer Co., Ltd.
Title
Size Document Number Rev
Date: Sheet
of
CN_TMS/nSTATUS
RSTn
Yb
Yu
Xr
Xl
Xl
Xr
Yb
Yu
TUCH_ENn
TUCH_TXDCN_TCK/DCLK
TUCH_TXD
Xr
Yu
Yb
Xl
+3.0V
+3.0V
+3.0V
+3.0V
+3.0V
Q10
2SC2712(TE85L_F)
B
CE
CN29
FH12-10(4)SA-1SH(option)
1
2
3
4
1
C375
Y2
HC-49/US 4.9152MHz
1 2
1
C348
MCH154CN104K
0.1uF 10V
1
C343
MCH154CN104K
0.1uF 10V
1
R391
MCR03 472
4.7Kom
1
C378
MCH152CN103K
0.01uF 25V
Q11
2SC2712(TE85L_F)
B
CE
Q5
2SA1162(TE85L_F)
B
EC
1
C328
MCH185A 330J
33pF 50V
D30
1SS420(TPL3_F)
IC59
NC7SZ125P5X_NL
1
24
3 5
Q7
2SA1162(TE85L_F)
B
EC
1
R388
MCR03 103
10Kom
Q8
2SA1162(TE85L_F)
B
EC
D32
1
R377
MCR03 472
4.7Kom
D33
1
R390
MCR03 472
4.7Kom
D31
1
C327
MCH185A 330J
33pF 50V
1
C377
1
R376
MCR03 472
4.7Kom
IC60
AHL-71N(GUNZE)
1
4
5
6
7
8
9
19
20
22
23
24
25
29
30
2
3
10
21
26
27
28
16
17
18
11
12
13
14
15
SBCAN
AVDD
ANIN1
ANIN2
ANIN3
ANIN4
AVSS
RESET
IC
X2
X1
VSS
VDD
TXD
RXD
NC
NC
NC
NC
NC
NC
NC
SET1
SET2
SET3
SEL1
SEL2
SEL3
SEL4
SEL5
1
R351
MCR03 000
0om
D23
1
R398
1
R397
1
R331
MCR03 000(option)
0om
D24
1
R399
MCR03 102
1Kom
Q4
2SC2712(TE85L_F)
B
CE
1
R396
1
R389
MCR03 472
4.7Kom
CN29A
52207-0485
1
2
3
4
1
C376
1
C364
MCH154CN104K
0.1uF 10V
D25D22
1SS420(TPL3_F)
1
R392
MCR03 472
4.7Kom
RSTn
CN_TMS/nSTATUS
TUCH_ENn
CN_TCK/DCLK
Page 90
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
NVCC8
NVCC8
NVCC8
NVCC8
NVCC8
NVCC8
NVCC8
NVCC8
8:CTS
9:RI
3:TXD
1:DCD
6:DSR
2:RXD
4:DTR
7:RTS
4:DTR
1:DCD
3:TXD
8:CTS
7:RTS
9:RI
6:DSR
2:RXD
DTE(COM)Male
FG=12,13
SC06040Z-3 7 A
UART DTE CONECTOR
A3
37 39Friday, November 10, 2006
Kyoto Microcomputer Co., Ltd.KZM-ARM11-01
Title
Size Document Number Rev
Date: Sheet
of
DCE_CTS
UART1_SDn
DCE_DCD
CPU_UART1_TX D
UART1_MBAUD
DCE_RI
DCE_DTR
DCE_DSR
UART1_ENn
UART1_MBAUD
DCE_RTS
DCE_RXD
DCE_T XD
UART1_SDn
CPU_UART1_CTS
CPU_UART1_RTS
CPU_UART1_RXD
CPU_UART2_CTS
CPU_UART2_RTS
UART1_ENn
DTE_RI_CN
DTE_DCD_CN
UART2_ENn
UART2_ENn
CPU_UART2_TX D
CPU_UART2_RXD
DTE_RXD_CN
DTE_DCD_CN
DTE_CTS_CN
DTE_DTR_CN
DTE_RI_CN
DTE_DSR_CN
DTE_RTS_CN
DTE_TXD_ CN
DTE_DSR_CN
DTE_RXD_CN
DTE_CTS_CN
DTE_TXD_ CN
DTE_RTS_CN
DTE_DTR_CN
DCE_RI_CN
DCE_DCD_CN
DCE_RTS_CN
DCE_CTS_CN
DCE_TXD_CN
DCE_DSR_CN
DCE_RXD_CN
DCE_DTR_CN
DCE_DSR_CN
DCE_DTR_CN
DCE_RI_CN
DCE_DCD_CN
DCE_RI
DCE_DCD
DCE_RTS DCE_CTS
DCE_CTS_CNDCE_RTS_CN
DCE_CTS_CN DCE_RTS_CN
DCE_RTS
DCE_T XD DCE_RXD
DCE_TXD_CNDCE_RXD_CN
DCE_TXD_CN DCE_RXD_CN
DCE_DTR DCE_DSR
DCE_DSR_CN
DCE_DSR_CN
DCE_DTR_CN
CPU_CSPI3_MOSI
FIR_ENn
CPU_DCE1_DTR
CPU_DCE1_DSR
CPU_DTE2_DCD
CPU_DTE2_DSR
CPU_DTE2_RI
CPU_DCE1_RI
CPU_DCE1_DCD
CPU_DTE2_DTR
CPU_DTE2_DTR
CPU_UART2_CTS
CPU_UART2_TX D
CPU_DCE1_RI
CPU_DCE1_DCD
CPU_UART1_CTS
CPU_UART1_TX D
CPU_DCE1_DSR
IRRX
IRTX
FIR_ENn
IRTXCPU_CSPI3_MISO
IRRX
FIR_ENn
CPU_CSPI3_MOSI
CPU_CSPI3_MISO
+3.0V
+3.0V
+3.0V
+3.0V
+3.0V
+3.0V
+3.0V
+3.0V
+3.0V
+3.0V
+3.0V
+5V
+5V
+3.0V
+3.0V
+3.0V
1
C188
MCH154CN104K(option irda)
0.1uF 25V
JP20
XJ8D0 611
12
34
56
1
C192
MCH154CN104K
0.1uF 10V
1
R196
MCR03 103
10Kom
+
1
C4
F931C106M AA
10uF 16V
1
C500
MCH154CN104K
0.1uF 10V
1
C11
MCH154CN104K(option irda)
0.1uF 10V
1
R527
MCR03 103(option irda)
10Kom
1
R9
1
R198
MCR10 100(option irda)
10om
1
R528
MCR03 514(option irda)
510Ko m
1
C2
MCH154CN104K
0.1uF 10V
IC2
NL17SZ125DFT2G(option irda)
1
24
3 5
U2
HRM230S(option irda)
10
11
5
4
7
2
3
1
8
9
6
LEDA
LEDA
TXVCC
RXVCC
TXGND
RXGND
PSD
VCC
TXD
RXD-A
RXD-B
1
R12
CN5
205A-09MSPA AC6
5
9
4
8
3
7
2
6
1
1
C201
MCH154CN104K
0.1uF 10V
1
C8
MCH154CN104K
0.1uF 10V
JP19
XJ8D0 611
12
34
56
1
C202
MCH154CN104K
0.1uF 10V
JP22
XJ8C0211(optio n)
SILK:DCD_S
1
2
1
R525
MCR03 103
10Kom
1
C1
MCH154CN104K
0.1uF 10V
U1
TFBS6711 -TR1
1
2
3
4
5
6
VCC2/IRED Anode
TXD
RXD
SD
VCC1
GND
+
1
C23
10SV47M(option irda)
47uF 10V
IC48
MAX3237E CAI+
1
2
3
4
5
6
7
8
9
10
11
12
28
27
26
25
24
23
22
19
17
21
20
18
16
14
13
15
C2+
GND
C2-
V-
T1OUT
T2OUT
T3OUT
R1IN
R2IN
T4OUT
R3IN
T5OUT
C1+V+VCC
C1-
T1IN
T2IN
T3IN
T4IN
T5IN
R1OUT
R2OUT
R3OUT
R1OUTB
SHDN
EN
MBAUD
1
R18
MCR03 103
10Kom
1
C200
MCH154CN104K
0.1uF 10V
1
R202
MCR03 472(option)
1Kom
1
C22
MCH154CN104K
0.1uF 10V
IC3
NL17SZ125DFT2G(option irda)
1
2 4
3 5
1
R524
MCR03 5493
549Ko m
1
C21
MCH154CN104K
0.1uF 10V
CN6
205A-09MSPA AC6
5
9
4
8
3
7
2
6
1
1
C203
MCH154CN104K
0.1uF 10V
IC49
SN74LVC1G06DCK T
2 4
3 5
1
JP18
XJ8D0 611
12
34
56
1
C195
MCH154CN104K(option irda)
0.1uF 25V
1
R14
MCR03 472
4.7Kom
1
R8
MCR10 000
10om
1
R4
MCR03 472
4.7Kom
IC51
MAX3245E CAI+
28
24
1
2
26
25
27
3
14
13
12
4
5
6
7
8
19
18
17
16
15
9
10
11
23
22 21
20
C1+
C1-
C2+
C2-
VCC
GND
V+
V-
T1IN
T2IN
T3IN
R1IN
R2IN
R3IN
R4IN
R5IN
R1OUT
R2OUT
R3OUT
R4OUT
R5OUT
T1OUT
T2OUT
T3OUT
FORCEON
FORCEOFF
INVALID
R2OUT
1
R204
MCR03 000
0om
1
R11
1
R5
MCR03 103
10Kom
1
C9
MCH154CN104K
0.1uF 10V
1
R7
1
R203
MCR03 000(option)
0om
1
C187
MCH154CN104K(option irda)
0.1uF 25V
1
C10
MCH154CN104K(option irda)
0.1uF 10V
1
C3
MCH154CN104K
0.1uF 10V
1
R194
MCR10 000(option irda)
0om
1
R13
1
C189
MCH154CN104K(option irda)
0.1uF 25V
1
R193
MCR10 102(option irda)
1Kom
1
R10
MCR03 103
10Kom
1
R16
ERG1S 5R6(option irda)
5.6om
1
R197
MCR10 100(option irda)
10om
JP21
XJ8C0 411
12
34
1
R2
MCR03 103
10Kom
1
R17
MCR10 4R7
4.7om
1
R15
MCR03 103(option)
10Kom
1
R19
MCR03 472
4.7Kom
UART1_MBAUD
UART1_SDn
CPU_DCE1_DTR
FIR_ENn
CPU_DCE1_DSR
CPU_DCE1_DCD
CPU_DCE1_RI
CPU_UART2_CTS
CPU_UART2_RTS
UART1_ENn
CPU_UART1_TX D
CPU_UART1_RTS
CPU_UART1_RXD
CPU_UART1_CTS
CPU_DTE2_RI
CPU_DTE2_DSR
CPU_DTE2_DCD
UART2_ENn
CPU_UART2_TX D
CPU_UART2_RXD
CPU_CSPI3_MISO
CPU_CSPI3_MOSI
CPU_DTE2_DTR
Page 91
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
15Komはコネクタの付近に
INTERNAL PULLDWN
SC06040Z-3 8 A
USB HI-SPEED
A3
38 39Friday, November 10, 2006
Kyoto Microcomputer Co., Ltd.
KZM-ARM11-01
Title
Size Document Number Rev
Date: Sheet
of
USBH2_D1
CPU_PC_BVD1
USBH1_ENn
USBH1_TXD P
USBH1_FS
SRXD3
R_USBH2_D1
USBH1_RXDM
USBH2_CPEN
SFS3
USBH2_VBUS_DET
USBH2_D4
CPU_USBH2_NXT
SFS6
USBH1_ENn
USBH1_RCV
USBH2_D5
R_USBH2_D1
USBH1_SPND
USBH2_D0
USBH2_D6
USBH1_RXDP
USBH2_SEL
USBH2_ENn
CPU_PC_VS2
R_USBH2_D[0..1]
USBH2_D0
STXD6
USBH2_SEL
STXD3
USBH1_TXD P
SCK3
USBH1_TX OE
USBH1_MODE
CPU_IOIS16
USBH2_D3
USBH1_TXD M
CPU_CSPI1_SPI_RDY
USBH2_CPEN
SRXD3
USBH2_CLK
USBH1_TXD M
USBH2_ENn
USBH2_CLK
USBH2_SEL USBH1_SEL
USBH1_RXDP
USBH2_D7
USBH2_VBUS_DET
USBH2_D2
USBH1_SPND
USBH1_SEL
CPU_CSPI1_MISO
USBH1_TX OE
USBH2_D7
CPU_PC_BVD2
STXD6
CPU_CSPI1_SCLK
USBH2_NXT
USBH1_RCV
SCK3
USBH2_STP
CPU_PC_BVD[1..2]
USBH2_DIR
USBH2_D3
USBH1_OVR
USBH1_FS
STXD3
USBH2_VBUS_DET
R_USBH2_D0
CPU_USBH2_CLK
USBH1_TX OE
USBH1_ENn
CPU_CSPI1_SS0
CPU_CSPI1_SS[0..2]
USBH2_D5CPU_PC_RST
CPU_CSPI1_SS1
USBH2_NXT
CPU_USBH2_DIR
USBH1_FS
USBH2_D2
USBH2_ENn
USBH1_SEL
USBH2_ENn
USBH1_SPND
USBH2_CPEN
CPU_USBH2_STP
CPU_CSPI1_SS2
USBH1_RXDM
USBH2_SEL
R_USBH2_D0
USBH1_TXD M
CSPI1_MOSI
USBH2_D6
USBH2_DIR
USBH1_MODE
USBH2_D4
USBH2_STP
SRXD6
USBH2_STP
CPU_PC_RWn
SRXD6
SFS3
USBH1_TXD P
USBH2_D1
USBH1_ENn
USBH1_MODE
+5V
+3.0V
+3.0V
+3.0V
+3.0V
+3.0V
+3.0V
+3.0V
USB_A3V
+3.0V
+3.0V
+3.0V
USB_A3V
+3.0V
USB_GND
+3.0V
+3.0V
+3.0V
+3.0V
+3.0V
USB_GND
+3.0V
+3.0V
+3.0V
Y4
HC-49/US 24MHz
1 2
1
C435
MCH154CN104K
0.1uF 10V
IC69
SN74CB3Q3257PW R
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
S
1B1
1B2
1A
2B1
2B2
2A
GND
3A
3B2
3B1
4A
4B2
4B1
OE
VCC
1
R477
MCR03 103
10Kom
1
R514
MCR10 330
33om
1
C175
MCH154CN104K
0.1uF 10V
IC42
USB3300-EZK
21
22
23
24
11
12
28
27
17
18
19
20
13
14
10
15
26
29
9
3
4
8
7
5
32
16
25
31
30
6
1
2
33
DATA3
DATA2
DATA1
DATA0
NXT
DIR
XI
XO
DATA7
DATA6
DATA5
DATA4
STP
CLKOUT
EXT_VBUS
VDD1.8
VDD1.8
VDDA1.8
RESET
CPEN
VBUS
DM
DP
ID
RBIAS
VDD3.3
VDD3.3
VDDA3.3
VDDA3.3
VDDA3.3
GND
GND
GND(CENTER)
+
1
C449
F931C106M AA
10uF 16V
1
R513
MCR10 153
15Kom
1
R462
MCR10 000
0om
1
C439
MCH154CN104K
0.1uF 10V
1
C165
MCH154CN104K
0.1uF 10V
1
R474
MCR03 104
100Ko m
1
R464
MCR03 102
1Kom
1
C414
MCH154CN104K
0.1uF 10V
1
R475
MCR03 103
10Kom
1
R165
MCR03 103
10Kom
1
R170
MCR03 1202
12Kom1 %
1
R457
MCR03 103
10Kom
1
C436
MCH154CN104K
0.1uF 10V
1
C429
MCH185A 330J
33pF 50V
+
1
C173
F931C105M AA
1uF 16V
1
C416
MCH154CN104K
0.1uF 10V
1
R472
MCR10 000
0om
1
C478
MCH154CN104K
0.1uF 10V
1
R443
MCR03 105
1Mom
1
C450
MCH154CN104K
0.1uF 10V
1
C448
MCH154CN104K
0.1uF 10V
1
C455
TMK316F4 75MG
4.7uF 16V
IC46
MAX1823B EUB+
1
2
3
4
5
6
7
8
9
10
ONA
INA
IN
INB
ONB
FAULTB
OUTB
GND
OUTA
FAULTA
IC73
SN74CB3Q3257PW R
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
S
1B1
1B2
1A
2B1
2B2
2A
GND
3A
3B2
3B1
4A
4B2
4B1
OE
VCC
1
C442
MCH154CN104K
0.1uF 10V
1
R458
MCR03 103
10Kom
+
1
C176
F931C106M AA
10uF 16V
1
R446
MCR03 103
10Kom
1
C440
MCH185A 330J
33pF 50V
IC70
SN74CB3Q3257PW R
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
S
1B1
1B2
1A
2B1
2B2
2A
GND
3A
3B2
3B1
4A
4B2
4B1
OE
VCC
1
R158
MCR03 103
10Kom
1
R159
IC44
ISP1105W(PHILPS )
1
2
3
4
5
6
13
12
11 10
9
8
7 14
15
16
17
OE
RCV
VP
VM
SUSPND
MODE
Vreg(3.3)
VMO/FSE0
VPO/VO D+
D-
SPEED
VCC(I/O) VCC(5.0)
Vpu(3.3)
SOFTCON
C_GND
1
C441
TMK316F4 75MG
4.7uF 16V
1
R454
MCR03 104
100Ko m
1
C466
TMK316F4 75MG
4.7uF 16V
1
R465
MCR03 472
4.7Kom
1
C418
MCH154CN104K
0.1uF 10V
IC82
SN74LVC1G14DCK T
2 4
3 5
1
1
R511
MCR10 153
15Kom
IC72
SN74CB3Q3257PW R
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
S
1B1
1B2
1A
2B1
2B2
2A
GND
3A
3B2
3B1
4A
4B2
4B1
OE
VCC
1
R445
1
C437
MCH154CN104K
0.1uF 10V
CN22
317A-04PSC0003(opti on)
1
2
3
4
5
6
7
8
9
10
11
12
1_VBUS
1_D1_D+
1_GND
2_VBUS
2_D2_D+
2_GND
Shield
Shield
Shield
Shield
1
R512
MCR10 330
33om
1
C415
MCH154CN104K
0.1uF 10V
+
1
C428
F931C106M AA
10uF 16V
1
C438
TMK316F4 75MG
4.7uF 16V
1
R482
MCR03 102(option short)
1Kom
IC71
SN74CB3Q3257PW R
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
S
1B1
1B2
1A
2B1
2B2
2A
GND
3A
3B2
3B1
4A
4B2
4B1
OE
VCC
+
1
C178
F931C106M AA
10uF 16V
1
R478
1
R447
1
C417
MCH154CN104K
0.1uF 10V
1
R444
MCR03 103
10Kom
CPU_USBH2_STP
CPU_IOIS16
CPU_USBH2_DIR
SFS3
CPU_CSPI1_SS[0..2]
CPU_PC_BVD[1..2]
USBH2_ENn
CPU_PC_RST
STXD6
CSPI1_MOSI
CPU_CSPI1_MISO
USBH1_OVR
CPU_USBH2_NXT
USBFS_ENn
SFS6
SRXD6
CPU_PC_RWn
CPU_CSPI1_SPI_RDY
USBH2_SEL USBFS_SEL
CPU_PC_VS2
SRXD3
CPU_USBH2_CLK
CPU_CSPI1_SCLK
STXD3
SCK3
R_USBH2_D[0..1]
USBH1_MODE
Page 92
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
NVCC5
NVCC5
SC06040Z-3 9 A
USBOTG
A3
39 39Tuesday, January 16, 2007
KZM-ARM11-01
Kyoto Microcomputer Co., Ltd.
Title
Size Document Number Rev
Date: Sheet
of
USBOTG_CPEN
USBOTG_CPEN
USBOTG_CPEN
USBOTG_VBUS_D ET
USBOTG_VBUS_DE T
USBOTG_VBUS_DE T
CPU_USBOTG_DIR
CPU_USBOTG_ST P
CPU_USBOTG_D[0..7]
CPU_USBOTG_NX T
CPU_USBOTG_CLK
CPU_USBOTG_D0
CPU_USBOTG_D1
CPU_USBOTG_D2
CPU_USBOTG_D3
CPU_USBOTG_D4
CPU_USBOTG_D5
CPU_USBOTG_D6
CPU_USBOTG_D7
+5V
USBOTG_3 V
+3.0V
+3.0V
+3.0V
+3.0V
USBOTG_3 V
USBOTG_GND
USBOTG_GND
1
C167
MCH154CN104K
0.1uF 10V
1
C468
MCH154CN104K
0.1uF 10V
+
1
C458
F931C106M AA
10uF 16V
IC45
USB3300-EZK
21
22
23
24
11
12
28
27
17
18
19
20
13
14
10
15
26
29
9
3
4
8
7
5
32
16
25
31
30
6
1
2
33
DATA3
DATA2
DATA1
DATA0
NXT
DIR
XI
XO
DATA7
DATA6
DATA5
DATA4
STP
CLKOUT
EXT_VBUS
VDD1.8
VDD1.8
VDDA1.8
RESET
CPEN
VBUS
DM
DP
ID
RBIAS
VDD3.3
VDD3.3
VDDA3.3
VDDA3.3
VDDA3.3
GND
GND
GND(CENTER)
1
R175
MCR03 103
10Kom
1
C171
MCH154CN104K
0.1uF 10V
1
R476
MCR03 104
100Ko m
1
R481
MCR03 103
10Kom
1
R473
MCR03 1202
12Kom1 %
1
C166
MCH154CN104K
0.1uF 10V
1
C453
MCH185A 330J
33pF 50V
+
1
C469
F931C105M AA
1uF 16V
1
R173
MCR10 000
0om
1
R467
MCR03 105
1Mom
1
C463
MCH154CN104K
0.1uF 10V
1
C467
TMK316F4 75MG
4.7uF 16V
CN25
E43AS-005-8604A(MITS UMI)
1
2
3
4
5
6
7
8
9
VBUS
DD+
ID
GND
Shield
Shield
Shield
Shield
IC76
MAX1823B EUB+
1
2
3
4
5
6
7
8
9
10
ONA
INA
IN
INB
ONB
FAULTB
OUTB
GND
OUTA
FAULTA
JP16
XJ8C0 211
SILK:OTG P
1
2
1
C172
MCH154CN104K
0.1uF 10V
1
C459
MCH185A 330J
33pF 50V
Y5
HC-49/US 24MHz
1 2
1
C452
TMK316F4 75MG
4.7uF 16V
+
1
C465
UUD1E101MCL-1GS
100uF 25V
1
C168
MCH154CN104K
0.1uF 10V
+
1
C451
F931C106M AA
10uF 16V
1
C464
TMK316F4 75MG
4.7uF 16V
1
R172
MCR10 000
0om
1
R455
MCR03 102(option short)
1Kom
CPU_USBOTG_D[0..7]
CPU_USBOTG_ST P
CPU_USBOTG_DIR
CPU_USBOTG_CLK
CPU_USBOTG_NX T
Page 93
Page 94
ARM11-Embedded Evaluation Board
KZM-ARM11-01 Operation Manual
3rd edition, March 2007
Kyoto Microcomputer Co., Ltd.
Copyright 2007 Kyoto Microcomputer Co., Ltd.
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