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Memory Module Specifi cations
KVR16LS11S6/2
2GB 1Rx16 256M x 64-Bit PC3L-12800
CL11 204-Pin SODIMM
DESCRIPTION
This document describes ValueRAM's 256M x 64-bit (2GB)
DDR3L-1600 CL11 SDRAM (Synchronous DRAM) 1Rx16,
memory module, based on four 256M x 16-bit FBGA components. The SPD is programmed to JEDEC standard latency
DDR3-1600 timing of 11-11-11 at 1.35V or 1.5V. This 204-pin
SODIMM uses gold contact fingers. The electrical and mechanical specifications are as follows:
FEATURES
• JEDEC standard 1.35V (1.28V ~ 1.45V) and 1.5V (1.425V ~
1.575V) Power Supply
• VDDQ = 1.35V (1.28V ~ 1.45V) and 1.5V (1.425V ~ 1.575V)
• 800MHz fCK for 1600Mb/sec/pin
• 8 independent internal bank
• Programmable CAS Latency: 11, 10, 9, 8, 7, 6, 5
• Programmable Additive Latency: 0, CL - 2, or CL - 1 clock
• 8-bit pre-fetch
SPECIFICATIONS
CL(IDD) 11 cycles
Row Cycle Time (tRCmin) 48.125ns (min.)
Refresh to Active/Refresh 260ns (min.)
Command Time (tRFCmin)
Row Active Time (tRASmin) 35ns (min.)
Maximum Operating Power (1.35V) 1.050 W*
UL Rating 94 V - 0
Operating Temperature 0o C to 85o C
Storage Temperature -55o C to +100o C
*Power will vary depending on the SDRAM used.
• Burst Length: 8 (Interleave without any limit, sequential with
starting address “000” only), 4 with tCCD = 4 which does not
allow seamless read or write [either on the fly using A12 or
MRS]
• Bi-directional Differential Data Strobe
• Internal(self) calibration : Internal self calibration through ZQ
pin (RZQ : 240 ohm ± 1%)
• On Die Termination using ODT pin
• Average Refresh Period 7.8us at lower than TCASE 85°C,
3.9us at 85°C < TCASE < 95°C
• Asynchronous Reset
• PCB : Height 1.180” (30.00mm), single sided component
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Document No. VALUERAM1397-001.A00 01/15/14 Page 1
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MODULE DIMENSIONS:
(units = millimeters)
Document No. VALUERAM1397-001.A00 Page 2