Memory Module Specifi cations
KVR16LR1 1D4/16HB
16GB 2Rx4 2G x 72-Bit PC3L-12800
CL11 Registered w/Parity 240-Pin DIMM
DESCRIPTION
This document describes ValueRAM's 2G x 72-bit (16GB)
DDR3L-1600 CL11 SDRAM (Synchronous DRAM), registered
w/parity, low voltage, 2Rx4 ECC, memory module, based on
thirty-six 1G x 4-bit FBGA components. The SPD is programmed to JEDEC standard latency DDR3-1600 timing of
11-11-11 at 1.35V and 1.5V. This 240-pin DIMM uses gold
contact fingers. The electrical and mechanical specifications
are as follows:
FEATURES
• JEDEC standard 1.35V (1.28V ~ 1.45V) and 1.5V (1.425V ~
1.575V) Power Supply
• VDDQ = 1.35V (1.28V ~ 1.45V) and 1.5V (1.425V ~ 1.575V)
• 800MHz fCK for 1600Mb/sec/pin
• 8 independent internal bank
• Programmable CAS Latency: 11, 10, 9, 8, 7, 6
• Programmable Additive Latency: 0, CL - 2, or CL - 1 clock
SPECIFICATIONS
selcyc 11)DDI(LC
Row Cycle Time (tRCmin) 48.125ns (min.)
Refresh to Active/Refresh 260ns (min.)
Command Time (tRFCmin)
Row Active Time (tRASmin) 35ns (min.)
Maximum Operating Power (1.35V) = 4.360 W*
0 - V 49gnitaR LU
Operating Temperature 0o C to 85o C
Storage Temperature -55
o
C to +100o C
SDRAM SUPPORTED
Hynix B-Die
• 8-bit pre-fetch
• Burst Length: 8 (Interleave without any limit, sequential with
starting address “000” only), 4 with tCCD = 4 which does not
allow seamless read or write [either on the fly using A12 or
MRS]
• Bi-directional Differential Data Strobe
• Internal(self) calibration : Internal self calibration through ZQ
pin (RZQ : 240 ohm ± 1%)
• On Die Termination using ODT pin
• On-DIMM thermal sensor (Grade B)
• Average Refresh Period 7.8us at lower than TCASE 85°C,
3.9us at 85°C < TCASE < 95°C
• Asynchronous Reset
• PCB : Height 1.180” (30.00mm), double sided component
Continued >>
Document No. VALUERAM1453-001.A00 10/24/13 Page 1
MODULE DIMENSIONS:
Document No. VALUERAM1453-001.A00 Page 2