Kingston KVR13LSE9S8-4 User Manual
Memory Module Specifi cations
KVR13LSE9S8/4
4GB 1Rx8 512M x 72-Bit PC3L-10600
CL9 204-Pin ECC SODIMM
DESCRIPTION
This document describes ValueRAM's 512M x 72-bit (4GB)
DDR3L-1333 CL9 SDRAM (Synchronous DRAM), 1Rx8, ECC,
low voltage, memory module, based on nine 512M x 8-bit FBGA
components. The SPD is programmed to JEDEC standard
latency DDR3-1333 timing of 9-9-9 at 1.35V or 1.5V. This 204pin SODIMM uses gold contact fingers. The electrical and
mechanical specifications are as follows:
FEATURES
• JEDEC standard 1.35V (1.28V ~ 1.45V) and 1.5V (1.425V ~
1.575V) Power Supply
• VDDQ = 1.35V (1.28V ~ 1.45V) and 1.5V (1.425V ~ 1.575V)
• 667MHz fCK for 1333Mb/sec/pin
• 8 independent internal bank
• Programmable CAS Latency: 9, 8, 7, 6
• Programmable Additive Latency: 0, CL - 2, or CL - 1 clock
• 8-bit pre-fetch
SPECIFICATIONS
CL(IDD) 9 cycles
Row Cycle Time (tRCmin) 49.5ns (min.)
Refresh to Active/Refresh 260ns (min.)
Command Time (tRFCmin)
Row Active Time (tRASmin) 36ns (min.)
Maximum Operating Power (1.35V) = 1.761 W*
(1.50V) = 1.957 W*
UL Rating 94 V - 0
Operating Temperature 0o C to 85o C
Storage Temperature -55o C to +100o C
*Power will vary depending on the SDRAM.
• Burst Length: 8 (Interleave without any limit, sequential with
starting address “000” only), 4 with tCCD = 4 which does not
allow seamless read or write [either on the fly using A12 or
MRS]
• Bi-directional Differential Data Strobe
• Thermal Sensor Grade B
• Internal(self) calibration : Internal self calibration through ZQ
pin (RZQ : 240 ohm ± 1%)
• On Die Termination using ODT pin
• Average Refresh Period 7.8us at lower than TCASE 85°C,
3.9us at 85°C < TCASE
< 95°C
• Asynchronous Reset
• PCB: Height 1.18” (30mm), double sided component
Continued >>
Document No. VALUERAM1336-001.A00 04/23/13 Page 1
PACKAGE DIMENSIONS
6.00
(units = millimeters)
(units = millimeters)
± 0.15
2.55 ± 0.15
65.60
Max 3.5
Document No. VALUERAM1336-001.A00 Page 2
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