No part of this manual may be reproduced
in any form or by any means (including
electronic storage and retrieval or
translation into a foreign language) without
prior agreement and written consent from
Keysight Technologies, Inc. as governed by
United States and international copyright
laws.
Manual Part Number
N4960-91021
Edition
Edition 9.0, April 2019
Printed in Germany
Keysight Technologies, Inc.
Keysight Technologies R&D and MarketingGmbH & Co. KG
Herrenberger Str. 130
71034 Böblingen, Germany
Warranty
THE MATERIAL CONTAINED IN THIS
DOCUMENT IS PROVIDED "AS IS," AND IS
SUBJECT TO BEING CHANGED, WITHOUT
NOTICE, IN FUTURE EDITIONS. FURTHER,
TO THE MAXIMUM EXTENT PERMITTED BY
APPLICABLE LAW, KEYSIGHT DISCLAIMS
ALL WARRANTIES, EITHER EXPRESS OR
IMPLIED WITH REGARD TO THIS MANUAL
AND ANY INFORMATION CONTAINED
HEREIN, INCLUDING BUT NOT LIMITED TO
THE IMPLIED WARRANTIES OF
MERCHANTABILITY AND FITNESS FOR A
PARTICULAR PURPOSE. KEYSIGHT SHALL
NOT BE LIABLE FOR ERRORS OR FOR
INCIDENTAL OR CONSEQUENTIAL
DAMAGES IN CONNECTION WITH THE
FURNISHING, USE, OR PERFORMANCE OF
THIS DOCUMENT OR ANY INFORMATION
CONTAINED HEREIN. SHOULD KEYSIGHT
AND THE USER HAVE A SEPARATE
WRITTEN AGREEMENT WITH WARRANTY
TERMS COVERING THE MATERIAL IN THIS
DOCUMENT THAT CONFLICT WITH THESE
TERMS, THE WARRANTY TERMS IN THE
SEPARATE AGREEMENT WILL CONTROL.
Software is subject to Keysight
Technologies’ standard commercial license
terms, and non-DOD Departments and
Agencies of the U.S. Government will
receive no greater than Restricted Rights
as defined in FAR 52.227-19(c)(1-2) (June
1987). U.S. Government users will receive
no greater than Limited Rights as defined in
FAR 52.227-14 (June 1987) or DFAR
252.227-7015 (b)(2) (November 1995), as
applicable in any technical data.
Safety Notices
A CAUTION notice denotes a hazard. It calls
attention to an operating procedure,
practice, or the like that, if not correctly
performed or adhered to, could result in
damage to the product or loss of important
data. Do not proceed beyond a CAUTION
notice until the indicated conditions are
fully understood and met.
Technology Licenses
The hardware and/or software described in
this document are furnished under a
license and may be used or copied only in
accordance with the terms of such license.
Restricted Rights Legend
If software is for use in the performance of
a U.S. Government prime contract or
subcontract, Software is delivered and
licensed as “Commercial computer
software” as defined in DFAR 252.2277014 (June 1995), or as a “commercial
item” as defined in FAR 2.101(a) or as
“Restricted computer software” as defined
in FAR 52.227-19 (June 1987) or any
equivalent agency regulation or contract
clause. Use, duplication or disclosure of
A WARNING notice denotes a hazard. It
calls attention to an operating procedure,
practice, or the like that, if not correctly
performed or adhered to, could result in
personal injury or death. Do not proceed
beyond a WARNING notice until the
indicated conditions are fully understood
and met.
Page 3
Keysight N4960A Serial BERT 17 and 32 Gb/s User Guide
Safety Summary
The following general safety precautions must be observed during all phases of
operation of this instrument. Failure to comply with these precautions or with
specific warnings or operating instructions in the product manuals violates
safety standards of design, manufacture, and intended use of the instrument.
Keysight Technologies assumes no liability for the customer's failure to comply
with these requirements. Product manuals are provided with your instrument
on CD-ROM and/or in printed form. Printed manuals are an option for many
products. Manuals may also be available on the Web. Go to www.keysight.com
and type in your product number in the Search field at the top of the page.
General
Environment Conditions
Before Applying Power
Ground the Instrument
This product is a Safety Class 1 instrument (provided with a protective earth
terminal). The protective features of this product may be impaired if it is used in
a manner not specified in the operation instructions.
All Light Emitting Diodes (LEDs) used in this product are Class 1 LEDs as per
IEC 60825-1.
This instrument is intended for indoor use in an installation category II, pollution
degree 2 environment. It is designed to operate at a maximum relative humidity
of 15 to 85% and at altitudes of up to 2000 meters.
Refer to the specifications tables for the ac mains voltage requirements and
ambient operating temperature range.
Verify that all safety precautions are taken. The power cable inlet of the
instrument serves as a device to disconnect from the mains in case of hazard.
The instrument must be positioned so that the operator can easily access the
power cable inlet. When the instrument is rack mounted the rack must be
provided with an easily accessible mains switch.
To minimize shock hazard, the instrument chassis and cover must be
connected to an electrical protective earth ground. The instrument must be
connected to the ac power mains through a grounded power cable, with the
ground wire firmly connected to an electrical ground (safety ground) at the
power outlet. Any interruption of the protective (grounding) conductor or
disconnection of the protective earth terminal will cause a potential shock
hazard that could result in personal injury.
Do Not Operate in an
Explosive Atmosphere
Do Not Remove the
Instrument Cover
Do not operate the instrument in the presence of flammable gases or fumes.
Operating personnel must not remove instrument covers. Component
replacement and internal adjustments must be made only by qualified
personnel.
Instruments that appear damaged or defective should be made inoperative and
secured against unintended operation until they can be repaired by qualified
service personnel.
3
Page 4
4 Keysight N4960A Serial BERT 17 and 32 Gb/s User Guide
information to avoid personal injury or damage to the product.
equipment’s metal frame.
with the Safety requirements.
standard.
Requirements and may be imported to Australia and New Zealand.
Medical Group 1 Class A product.
paper/fiberboard packaging.
normal use. Forty years is the expected useful life of the product.
Safety Symbols
Symbol Description
Table 1. Safety Symbol
Indicates warning or caution. If you see this symbol on a product, you
must refer to the manuals for specific Warning or Caution
Frame or chassis ground terminal. Typically connects to the
Indicates hazardous voltages and potential for electrical shock.
Indicates that antistatic precautions should be taken.
Indicates hot surface. Please do not touch.
CSA is the Canadian certification mark to demonstrate compliance
CE compliance marking to the EU Safety and EMC Directives.
ISM GRP-1A classification according to the international EMC
standard. ICES/NMB-001 compliance marking to the Canadian EMC
The RCM mark indicates that this product meets EMS/Product Safety
This mark indicates compliance with the Canadian EMC regulations.
ISM 1-A This text denotes the instrument is an Industrial Scientific and
China RoHS regulations include requirements related to packaging,
and require compliance to China standard GB18455-2001. This
symbol indicates compliance with the China RoHS regulations for
Indicates the time period during which no hazardous or toxic
substance elements are expected to leak or deteriorate during
The South Korean Class A EMC declaration (KC) mark indicates that
this product is Class A suitable for professional use and is for use in
electromagnetic environments outside of the home.
The KC mark includes the marking’s identifier code that has up to 26
digits and follows this format: KCC-VWX-YYY-ZZZZZZZZZZZZZ.
Page 5
Keysight N4960A Serial BERT 17 and 32 Gb/s User Guide
more information.
Compliance and Environmental Information
Table 2. Compliance and Environmental Information
Safety Symbol Description
This product complies with WEEE Directive (2002/96/EC) marking
requirements. The affixed label indicates that you must not discard
this electrical/electronic product in domestic household waste.
Product Category: With reference to the equipment types in WEEE
Directive Annex I, this product is classed as a “Monitoring and
Control instrumentation” product.
Do not dispose in domestic household waste.
To return unwanted products, contact your local Keysight office for
5
Page 6
6 Keysight N4960A Serial BERT 17 and 32 Gb/s User Guide
Keysight N4960A Serial BERT 17 and 32 Gb/s User Guide7
Page 7
1
Setting Up the System .......................................................................... 11
6.16.1 Example Using *OPC? .................................................. 228
6.16.2 Example Using *WAI ..................................................... 228
6.16.3 Communication Timeouts ............................................ 229
Page 11
Setting Up the System
Keysight N4960A Serial BERT 17 and 32 Gb/s User Guide11
1 Setting Up the System
1.1 Rack Mount Kit
1.2 Unpacking
The N4960A serial BERT controller 17 and 32 Gb/s is shipped in a
protective box. Each shipping box contains:
•N4960A-CJ0 or N4960A-CJ1 serial BERT controller.
•AC power cord.
•CD-ROM, which includes:
oN4960A Serial BERT 17 and 32 Gb/s user guide
oN4960A Serial BERT 17 and 32 Gb/s getting started guide
oN4960A Serial BERT 17 and 32 Gb/s datasheet
he N4951A, N4951B, and N4952A are shipped in protective boxes with
T
all the accessories required for operation. Each shipping box contains:
•N4951A, N4951B, or N4952A with remote head/controller cable.
•CD-ROM, which includes:
oN4960A Serial BERT 17 and 32 Gb/s user guide
oN4960A Serial BERT 17 and 32 Gb/s getting started guide
oN4960A Serial BERT 17 and 32 Gb/s datasheet
The optional N4978A rack mount kit can be purchased separately for
rack mounting the N4960A as a single unit or two instruments mounted
side-by-side.
Carefully remove the instrument from the packaging in an ESD-safe
environment.
Page 12
Setting Up the System
12Keysight N4960A Serial BERT 17 and 32 Gb/s User Guide
1.3 Important Notes
1.4 Measurement Best Practices
•Use ESD protection at all times when using the instrument.
•Before connecting any cable to the instrument, discharge the cabl
by
ground momentarily.
•Review min/max specifications before applying input signals.
•Use high quality connectors on all ports. The N4951A pattern
generator output and N4952A error detector input connectors are
2.92 mm, while all clock output and input connectors on the
N4960A serial BERT controller are SMA. The N4951B pattern
generator data output connectors are 2.4 mm.
•Leave dust jackets on unused back panel connectors.
•Situate the instrument away from heat sources, do not block the
fans, and do not block the exhaust vents on the sides of the BERT
controller and remote heads (minimum of 3 inches clearance).
•The bottom of a remote head can become hot to the touch. The
airflow should not be blocked as this will increase the temperature.
•Power must be turned off before connecting/disconnecting a remot
he
e
shorting the center and outer connectors of the cable together to
e
ad.
•When using differential-mode connections, ensure the cables are
phase balanced for best performance.
•Use high quality cables and connector savers (or adaptors).
•Keep cable lengths short and minimize the number of cable bends.
•Use an 8 in-lbs (90 N-cm) torque wrench when attaching
connectors.
Page 13
Setting Up the System
Keysight N4960A Serial BERT 17 and 32 Gb/s User Guide13
1.5 General Specifications
Table 3
Before installing the N4960A serial BERT, review the specifications in
Table 3. Specification considerations before installation
Parameter Specification
.
Connector Type
Controller
All signals except 10 MHz Ref
In/Out –
10 MHz In/Out
N4951A/N4952A
N4951B
SMA
BNC
2.92 mm female
2.4 mm female (data output connectors), SMA female (auxiliary
connectors)
Remote Control Interface USB2.0 and IEEE-488 (GPIB)
Operating Temperature +15 ºC to +35 ºC
Storage Temperature –40 ºC to +70 ºC
Line Power
Voltage 100 to 240 VAC autoranging
Frequency 50/60 Hz
Power 170 Watts MAX
Fuse 250 V 2 A 5x20 mm (p/n 12260-002)
Always replace instrument fuse with one of the same type and
rating.
Dimensions (Height, Width,
and Depth)
N4960A 100 mm (3.9 in) x 214 mm (16.7 in) x 425 mm (16.7 in)
N4951A/N4952A 50 mm (1.9 in) x 109 mm (4.3 in) x 222 mm (8.7 in)
N4951B 50 mm (1.9 in) x 109 mm (4.3 in) x 273 mm (10.75 in)
Remote head/controller cable 1.0 m (39.7 in)
Weight
N4960A 3.2 kg (7.0 lbs)
N4951A/N4952A (with cable) 0.86 kg (30.3 oz)
N4951B (with cable) 1.0 kg (35.3 oz)
Page 14
Setting Up the System
14Keysight N4960A Serial BERT 17 and 32 Gb/s User Guide
•
•
1.6 Safety and Regulatory
Technologies
Parameter Specification
EMC
Safety
Complies with European EMC Directive 2004/108/EC
• IEC/EN 61326-1
• CISPR Pub 11 Group 1, class A
• AS/NZS CISPR 11
• ICES/NMB-001
This ISM device complies with Canadian ICES-001.
Cet appareil ISM est conforme a la norme NMB-001 du Canada.
Complies with European Low Voltage Directive
2006/95/EC
• IEC/EN 61010-1, 2nd Edition
• Canada: CSA C22.2 No. 61010-1
• USA: UL std no. 61010-1, 2nd Edition
Acoustic noise emission Geraeuschemission
LpA <70 dB LpA <70 dB
Operator position Am Arbeitsplatz
Normal position Normaler Betrieb
Per ISO 7779 Nach DIN 45635 t.19
This product has been designed and tested in accordance with
accepted industry standards, and has been supplied in a safe condition.
The documentation contains information and warnings that must be
followed by the user to ensure safe operation and to maintain the
product in a safe condition.
Do not remove instrument covers. There are no user serviceable parts within.
Operation of the instrument in a manner not specified by Keysight
may result in personal injury or loss of life.
For continued protection against fire hazard, replace fuses, and or circuit
breakers only with same type and ratings. The use of other fuses, circuit
breakers or materials is prohibited.
Page 15
Setting Up the System
Keysight N4960A Serial BERT 17 and 32 Gb/s User Guide15
To prevent electrical shock, disconnect instrument from mains before cleaning.
in the premise electrical system. Failure, to ensure adequate earth grounding by
Use a dry cloth or one slightly dampened with water to clean the external case
parts. Do not attempt to clean internally.
The Mains wiring and connectors shall be compatible with the connector used
not using the correct components may cause product damage, and serious
injury.
A EU declaration of conformity is available at
The following procedure describes how to install the N4960A serial
BERT.
1. Install on a flat surface with unobstructed airflow to the back
panel and side vents.
2. Plug the AC power cord into a suitable wall socket (100 to 240 V
AC, 50/60 Hz).
If this product is not used as specified, the protection provided by the
equipment could be impaired. This product must be used in a normal condition
(in which all means for protections are intact) only.
3. Plug the AC power cord into the N4960A serial BERT.
4. Connect the pattern generator to the Jitter connector on the
front panel.
5. Connect the error detector or a pattern generator to the Delay
connector on the front panel.
Page 16
Setting Up the System
16Keysight N4960A Serial BERT 17 and 32 Gb/s User Guide
e is
Before switching on this instrument, make sure the supply voltage is in the
specified range.
This instrument has autoranging line voltage input. Be sure the supply voltag
within the specified range.
Page 17
Operation Overview
Keysight N4960A Serial BERT 17 and 32 Gb/s User Guide17
2 Operation Overview
2.1 Introduction
2.2 Features
The N4960A serial BERT consists of a controller, which is a stressed
clock source with multi-sourced jitter capability, and support for an
externally connected pattern generator and error detector to form a
BERT. When used as a clock synthesizer, the range is 1 to 16 GHz.
When used with a remote head attached, the range of the clock
synthesizer is 2.5 to 16 GHz for the 32 Gb/s system, or 2 to 8.5 GHz for
the 17 Gb/s system. The pattern generator and error detector remote
heads use half rate clock architecture, giving a data rate range of 5 to
32 Gb/s for the 32 Gb/s system, or 4 to 17 Gb/s for the 17 Gb/s system.
All features can be controlled through the control panel, remotely
through the GPIB or USB interface using the remote commands, or
through the N4980A multi-instrument BERT software.
• Controller (stressed clock synthesizer)
o Operation from 2.5 to 16 GHz (32 Gb/s system)
o Operation from 2 to 8.5 GHz (17 Gb/s system)
o Two independent sinusoidal jitter injection sources (one for
N4960A-CJ0)
o True Gaussian random jitter stress (N4960A-CJ1 only)
o Spread spectrum clock (N4960A-CJ1 only)
o Fully programmable clock output parameters
o Low intrinsic jitter
o Jittered, non-jittered, and divided outputs
o Remote control through GPIB (IEEE 488.2) or USB2.0
o User interface along with SCPI command set for easy
automation and test system integration
Page 18
Operation Overview
18Keysight N4960A Serial BERT 17 and 32 Gb/s User Guide
o N4951A-P32 data rate from 5 Gb/s to 32 Gb/s
o N4951A-P17 data rate from 4 Gb/s to 17 Gb/s
o 1 V (p-p) output voltage (single-ended)
o Single ended or differential AC coupled data output with
integrated bias tee
o User definable offset and termination voltage
o Family of PRBS patterns and predefined sample patterns
o User programmable patterns (up to 8 Mbit memory depth)
o N4951B-D32 data rate from 5 Gb/s to 32 Gb/s
o N4951B-D17 data rate from 4 Gb/s to 17 Gb/s, 1.5 V (p-p)
output voltage (single-ended)
o 5-tap de-emphasis
o Single ended or differential AC coupled data output with
integrated bias tee
o User definable offset and termination voltage
o Family of PRBS patterns and predefined sample patterns
o User programmable patterns (up to 8 Mbit memory depth)
o N4951B-H32 data rate from 5 Gb/s to 32 Gb/s
o N4951B-H17 data rate from 4 Gb/s to 17 Gb/s
o 3 V (p-p) output voltage (single-ended)
o Single ended or differential AC coupled data output with
integrated bias tee
o User definable offset and termination voltage
o Family of PRBS patterns and predefined sample patterns
o User programmable patterns (up to 8 Mbit memory depth)
o N4952A-E32 data rate from 5 Gb/s to 32 Gb/s
o N4952A-E17 data rate from 4 Gb/s to 17 Gb/s
o Auto sample voltage and delay alignment (can be manually set)
o Auto detects PRBS patterns
o Single ended or differential AC coupled data input
o User definable termination voltage
Page 19
Operation Overview
Keysight N4960A Serial BERT 17 and 32 Gb/s User Guide19
2.3 Control
2.4 Introduction to Stress
100 ps
100 ps
100 ps
100 ps
10 GHz Clean Clock
96 ps
94 ps
102 ps
105 ps
10 GHz Stressed Clock
System configuration settings are all available from the local control
panel interface, the remote GPIB (IEEE 488.2) interface, or the USB
interface. Instrument status is conveyed on the front panel by the
display.
The N4960A serial BERT is supported by the N4980A multi-instrument
BERT software Version 2.2 or higher, which provides a complete user
control interface and off line pattern editing and management tool.
The N4960A serial BERT controller contains a stressed clock
synthesizer. The term “Stress” refers to the ability to modulate the
output signal with a calibrated level of timing jitter. Timing jitter is the
short term variation of a signal with respect to its ideal position in time.
Timing jitter can be seen and measured at the signal logic state
transitions.
Figure 1. Timing Jitter
Amplitude jitter, also known as “interference” or simply noise, will act on
the finite rise and fall times of transitions to produce effective timing
jitter. The N4960A serial BERT controller does not generate interference
(amplitude jitter). From this point forward, the term timing jitter will be
reduced to simply jitter.
Page 20
Operation Overview
20Keysight N4960A Serial BERT 17 and 32 Gb/s User Guide
2.4.1
Quantifying Jitter
Jitter
Receiver
Decision Point
In serial data systems, excessive jitter acts to “close the eye” which will
eventually result in bit errors, as the bit transition moves closer to the
receiver’s decision point time window.
Figure 2. Eye closure with low (left) and high level of jitter (right)
A common test for a serial data receiver is its susceptibility to jitter. The
test is performed by driving a known data pattern into the receiver using
the N4951A/N4951B pattern generator which is stressed with a known
amount of jitter. The received data is compared to an internal reference
pattern of the N4952A error detector, and the number of incorrect
detected bits is counted. By varying the characteristics of the jitter used
to modulate the test data generator, the receiver’s performance can be
characterized.
The level or “amplitude” of jitter refers to the instantaneous
displacement in time of the measure point (transition) from its ideal
location. When applied to a stress generator, the amplitude refers to a
level of reoccurring jitter, rather than a single instantaneous edge
displacement. The jitter amplitude will be stated as a peak to peak
displacement, or a root means squared (rms) value, depending on the
nature of the jitter distribution.
Page 21
Operation Overview
Keysight N4960A Serial BERT 17 and 32 Gb/s User Guide21
2.4.2
Types of Jitter / Stress
-4 ps
-3 ps
+2 ps
-3 ps
+2
+0
-2
-4
Edge Displacement (ps)
The jitter that a serial data receiver is exposed to in an operating
environment is a composite of several elemental types. These types
correspond to mechanisms in the environment which create the jitter,
and are duplicated in the data pattern generator clock used to test a
receiver.
The “type” of jitter represents its distribution when looking at a
continuous measurement of edge displacement over time. The
representation of this is a time interval error (TIE) plot. The TIE plot is a
graph of the absolute displacement of each transition edge in the
jittered waveform with respect to its ideal location versus time (or bit
location).
Figure 3. Time Interval Error plot of edge displacement
The resulting TIE plot shows the modulation of the jitter. The wave
shape of the modulation envelope (TIE plot), relates to the type of jitter
in the signal.
Jitter can be qualified as being one of a combination of several types,
which again refer to the wave shape of the deviation versus time. The
most basic distinction is deterministic versus non-deterministic. As its
name implies, deterministic jitter forms a pattern which can be
recognized. Deterministic jitter can be further broken down into data
dependent, which is synchronous to the data pattern, and periodic,
which has frequency components that are asynchronous to the data.
While periodic jitter can have any wave shape, sinusoidal (SJ) is the
most common.
Page 22
Operation Overview
22Keysight N4960A Serial BERT 17 and 32 Gb/s User Guide
Figure 4
The jitter amplitude (deviation in time from ideal location) of
deterministic jitter is bounded. Once enough transition edges have been
sampled to determine the peaks of the TIE envelope, additional
sampling will not show an increase in the peak instantaneous jitter. A
common graphical representation of jitter is referred to as a TIE
histogram, or simply a jitter histogram. The histogram shows peak
deviation versus number of samples.
shows a typical TIE
histogram plot of sinusoidal jitter.
Figure 4. TIE histogram of pure sinusoidal jitter
The horizontal axis is jitter magnitude—deviation in time of the actual
edge location relative to its ideal location. The axis has polarity, with 0
deviation occurring in the center. Points to the right of center are from
transitions which occur after the ideal location (lag), while those to the
left of center occur before the ideal location (lead).
The vertical axis shows the number of occurrences, plotted on a log
scale. The characteristic shape reflects what is expected from a sine
wave. The amplitude is near the positive and negative peak for most of
the time, and in the zero crossing point for the least amount of time.
Generating a jitter histogram of pure deterministic jitter with a
measurement instrument which updates the plot as additional samples
are taken would quickly fill out the envelope, with no change in shape or
peaks as additional samples are taken.
Because deterministic jitter is bounded, its magnitude is usually
expressed as a peak to peak value. The units are either absolute time,
for example picoseconds (ps), or relative to bit time, in unit intervals
(UI).
Page 23
Operation Overview
Keysight N4960A Serial BERT 17 and 32 Gb/s User Guide23
Figure 5
Non-deterministic jitter is composed primarily of random jitter
components. As the name implies, the envelope of random jitter will
have no recognizable pattern. Random jitter results from noise artifacts
in the system. Non-deterministic jitter is un-bounded. As more samples
are measured, the TIE histogram will show ever increasing peak jitter,
occurring at small number of samples, with the process unending. The
TIE histogram of pure random jitter (RJ) will have a true Gaussian
deviation, as shown in
.
Figure 5. Typical TIE Histogram of Random Jitter
When only random jitter is present in the signal, the majority of
transitions will occur at the ideal location in time (zero deviation), with
decreasing numbers of transitions occurring at increasing levels of
deviation in time. Due to the distribution, the magnitude of random jitter
is usually expressed as a root mean squared (rms) value. The RJ
magnitude can also be expressed as a peak to peak value, at a given
confidence level. The confidence level can be computed from the
number of samples. As with deterministic jitter, the units are either
absolute time, for example ps, or relative to bit time, in UI.
Data and clock signals in real life operating systems will usually contain
jitter which has both deterministic and non-deterministic components
within it.
Page 24
Operation Overview
24Keysight N4960A Serial BERT 17 and 32 Gb/s User Guide
2.4.3
Stress for Jitter Tolerance Testing
Stressed clock synthesizers such as the N4960A serial BERT controller
are used to clock a data pattern generator, which in turn is used to test
a serial data receiver’s susceptibility to jitter. The jitter tolerance test is
the basic method generally used to characterize a receiver. The test is
performed with a BERT, used to monitor the receiver detected output
and determine when it does and when it does not operate error free.
The test is started by operating the receiver and initializing the test
setup to achieve error free operation. Then stress is added, usually as a
single tone of SJ at a specific frequency with low amplitude. The SJ
amplitude is increased until bit errors start to occur. The stress
amplitude at this point is recorded, the SJ amplitude reduced and the
frequency changed. The process then repeats at the new SJ frequency.
The resulting jitter tolerance plot shows the limits of error free operation
as jitter amplitude versus jitter frequency.
Some communication standards include a base line mixture of RJ and
SJ to be constant throughout the test, with the larger SJ used for the
measurement summed into the baseline. The addition of the baseline
represents the intended operating environment.
Page 25
Operation
Keysight N4960A Serial BERT 17 and 32 Gb/s User Guide25
3 Operation
3.1 General Information
3.1.1
Performance Recommendations
The N4960A serial BERT should be used in accordance with the
following:
• Read and follow operating instructions of all system equipment and
do not exceed min/max specifications.
• Use ESD protection at all times, but especially when handling RF
inputs/outputs.
• Before connecting any cable to the instrument, discharge the cable
by shorting the center and outer connectors of the cable together to
ground momentarily.
• Situate the instrument away from heat sources.
• Do not block airflow to the fans or exhaust vents and do not allow
foreign material into enclosure.
• Do not modify the power plug or wall outlet to remove the third
(ground) pin.
• Do not drop or shake the instrument, minimize vibration, and handle
with care.
• Power must be turned off before connecting/disconnecting a remote
head.
There are no user-serviceable parts within. Return damaged instruments for
factory-authorized repair. Refer to instrument warranty for more information.
The following recommendations ensure best performance:
• When using differential mode connection for outputs, ensure the
cables are phase balanced. If the electrical length of one cable is a
significant fraction of a unit interval longer than the other, the
quality of the differential signal will be degraded.
• Keep cable lengths short and minimize number of cable bends.
It is not usually necessary to terminate unused outputs of a differential
pair when a single ended signal is used. However, when the N4952A
error detector is driven with a single ended signal, it is good practice to
terminate the unused input to avoid errors from external noise.
Page 26
Operation
26Keysight N4960A Serial BERT 17 and 32 Gb/s User Guide
3.1.2
Connector Care
3.2 Power on Settings
8 Appendix A Preset State
The N4960A serial BERT controller features high-quality SMA
connectors for the front and rear panel input and output connections
while the N4951A pattern generator and N4952A error detector use
2.92 mm. The N4951B pattern generators use type 2.4 mm connectors
for data output and SMA for auxiliary input/output connectors.
Connector damage will degrade signal fidelity.
Use high quality SMA-connectors on the SMA ports. Always leave dust
jackets on unused ports. Tighten the connectors to 8 in-lbs (90 N-cm)
to assure proper mating.
Refer to the N4960-90030 N495xA through N498xA Connector Care
Reference Guide at www.Keysight.com/find/N4951A
Inspect the connectors for the following:
• Worn or damaged threads
• Scratches to mating surface
• Burrs and loose metal particles
• Dust or foreign material in the space surrounding the center pin
• Ensure that female contacts are straight and aligned
.
Clean the connectors as described in the following procedure. Cleaning
connectors with alcohol shall only be done with the instruments power
cord removed, and in a well-ventilated area. Allow all residual alcohol
moisture to evaporate, and the fumes to dissipate prior to energizing the
instrument.
1. Remove any dust or loose particles using a low-pressure air
2. Moisten a lint-free swab with isopropyl alcohol. Do not saturate
3. Minimize the wicking of the alcohol into the connector structure.
4. Clean the mating plane surfaces and threads.
5. Allow alcohol to evaporate, and then use a low-pressure air
6. Make sure no particles or residue remains.
7. Inspect connector for damage.
On power on, the instrument always returns to the factory preset
settings, listed in
return to last used settings may save them in one of the 5 saved settings
locations, and recall them on power on.
source.
the swab.
source to blow surfaces clean.
. Users who wish to quickly
Page 27
Operation
Keysight N4960A Serial BERT 17 and 32 Gb/s User Guide27
3.3 N4960A Serial BERT Controller Front Panel
Figure 6
Table 4
The N4960A serial BERT controller front panel indicates the system
status and contains the control panel for local operation of the
instrument.
shows the front panel of the N4960A serial BERT controller.
Figure 6. N4960A serial BERT controller front panel
describes the N4960A serial BERT controller front panel
functions.
Table 4. N4960A serial BERT controller front panel
Item Description
Display The display is part of the control panel and is used to view the menu structure.
Softkey buttons The four softkey buttons to the right of the display are part of the control panel
and are used to switch between menu items, move the highlight up or down,
and edit or select parameters.
Rotary knob The rotary knob is part of the control panel and is used to increase or decrease
a numeric value and move the highlight to the next digit, character, or item in a
list.
Keypad The keypad is part of the control panel and is used to enter numeric values for
parameters. The PRST hardkey button is used to perform an instrument preset.
Page 28
Operation
28Keysight N4960A Serial BERT 17 and 32 Gb/s User Guide
Item Description
Clock outputs
Jitter The jitter output is the main stressed clock output. The clock phase can be
modulated in time with one or more calibrated jitter sources. The output
amplitude, offset, and termination voltage are also user settable.
The jitter sources are:
• Sinusoidal jitter 1 (SJ1)
• Sinusoidal jitter 2 (SJ2) (N4960A-CJ1 only)
• Sinusoidal periodic jitter (PJ)
• Externally supplied jitter
• Random jitter (RJ) is internally sourced (N4960A-CJ1 only)
Sinusoidal jitter 1, Sinusoidal jitter 2, random jitter, and external jitter (high
frequency band) can be enabled simultaneously. However, the sum of these
paths must be kept below the specified maximum modulation level. In
addition, the periodic jitter path or external low band (high deviation) jitter
path cannot be enabled if any of the other jitter paths are enabled.
By disabling the stress sources, this output can be used to provide a clean
(non-jittered) clock.
The jitter output also provides the clock source for the pattern generator.
When used as a BERT, the synthesizer clock frequency is set to 1/2 of the
BERT data rate. Any stress applied to the jitter clock output will appear on the
pattern generator output (channel 0 only) at 2x the amplitude of the clock
jitter.
Delay The delay differential output provides a non-stressed clock output with
adjustable phase offset (in UI) as well as amplitude, offset, and termination
voltage adjustment.
The delay clock is also used to clock the error detector. When operating as a
BERT, both auto and manual detector alignment will alter the delay setting for
the front panel output. Conversely, manually setting the delay output delay
value may degrade the error detector operation by misaligning the detector
sample point. The value of delay applied to the delay clock output will appear
on the error detector or pattern generator output (channel 1 only) at 2x the
value of the clock delay.
Divided The divided differential clock output produces a non-stressed signal that is
related to the clock frequency by a divider factor. The divided clock output
signal also has amplitude, offset, and termination voltage adjustment.
By setting the divide ratio to 1, this output can be used as a non-divided clean
(non-jittered) clock.
Page 29
Operation
Keysight N4960A Serial BERT 17 and 32 Gb/s User Guide29
Item Description
Ext Clock In Accepts an external clock to be substituted for the internal synthesizer across
the entire supported frequency range. When used to source the clock for the
pattern generator or error detector, this input is a half-rate clock.
Note: The instrument calibration requires knowledge of the clock frequency.
To facilitate externally sourced clock input, it contains a frequency counter
with sufficient resolution and accuracy to support this calibration. The counter
and instrument systems require a finite time to respond to large frequency
changes. Thus, in order to maintain calibration, the external clock must be
either a stable CW (Continuous Wave) signal, or modulated over relatively low
frequency (< 100 MHz) at low rates of change.
Delayed Clk In Accepts an external signal which can be used to clock the error detector. This
would commonly be sourced from an external clock recovery unit. When used
with the error detector, this input is a half-rate clock (one half the error
detector data rate).
Note: The instrument calibration requires knowledge of the applied clock
frequency. Unlike the external clock input, the instrument does not have an
internal counter to determine the delay clock frequency, and so the frequency
should be entered by the user. If no value is entered, the instrument defaults
to the main clock frequency.
Status LEDs
Outputs On
Jitter On
SSC
Attention
The Outputs On LED indicator is lit when any of the clock outputs are turned
on.
The Jitter On LED indicator is lit when any stress source is enabled.
The SSC LED indicator is lit when the spread spectrum clock function is
enabled.
The Attention LED indicator is lit when an error has occurred. The indicator will
not turn off until the error message has been cleared in the Error Log in the
System menu.
Page 30
Operation
30Keysight N4960A Serial BERT 17 and 32 Gb/s User Guide
3.4 N4960A Serial BERT Controller Rear Panel
Figure 7
Table 5
Item Description
Delay An error detector or pattern generator can be connected to the Delay
connector (channel 1). The clock signal for the error detector or pattern
generator is derived from the Delay clock output.
Jitter A pattern generator can be connected to the Jitter connector (channel 0). The
clock signal for the pattern generator is derived from the Jitter clock output.
shows the N4960A serial BERT controller rear panel.
Figure 7. N4960A serial BERT controller rear panel
describes the N4960A serial BERT controller rear panel
functions.
Table 5. N4960A serial BERT controller rear panel
Item Description
USB Connector The USB connector is a type B USB port that connects the N4960A serial
BERT controller to an external PC for remote operation.
GPIB Connector The GPIB connector is a general purpose interface bus (GPIB, IEEE 488.1)
connection that can be used for remote operation.
Ext Jit In Accepts an external jitter source for either the low or high frequency band
modulation paths. Low band input must be sinusoidal wave shape, with
frequency in the range of 1 Hz to 4 MHz.
RJ Out and RJ In
Connectors
The RJ loop through path is used for inserting modulation frequency
contour filters in the random jitter path. The signal impedance is 50 Ω.
Page 31
Operation
Keysight N4960A Serial BERT 17 and 32 Gb/s User Guide31
3.5 N4951A Front Panel
Item Description
10 MHz In Connector The 10 MHz In connector accepts a 10 MHz reference signal from an
external source to allow the synthesizer to be phase locked to an external
reference clock.
10 MHz Out Connector The 10 MHz Out connector is a 10 MHz reference output used to lock the
frequency reference of other equipment to the N4960 serial BERT
controller.
Label N4960A serial BERT controller serial number.
Fuse Drawer Contains the primary power mains fuse. To replace, remove the fuse by
depressing the snap in tab and withdrawing the fuse drawer. A blown
primary fuse generally indicates a significant component failure. The
instrument should be returned to Keysight Technologies for service in the
event the fuse blows.
Power Switch N4960A serial BERT controller main power switch (1=On; 0=Off).
Power Input Connector Connect to power mains using approved power cable.
Figure 8. N4951A front panel
Item Description
Ch ID LED The Channel ID LED indicator is lit when connected to the N4960A serial BERT
controller.
Atten LED The Attention LED indicator is lit when an error has occurred. The indicator will
not turn off until the error message has been cleared in the Error Log in the
System menu.
On LED
Output Off
Output On
The On LED indicator is off when the data output is turned off.
The On LED indicator is lit when the data output is turned on.
Table 6. N4951A front panel
Data Output The differential data outputs are 2.92 mm connectors.
Page 32
Operation
32Keysight N4960A Serial BERT 17 and 32 Gb/s User Guide
3.6 N4951A Rear Panel
Item Description
Connectors
Aux In This connector is reserved for future enhancements.
Aux Out The Auxiliary Output 2.92 mm connector provides a pattern trigger.
Item Description
Controller Connector The D-subminiature connector receives clock signals, control signals, and
power supplies from the controller via the 1 meter remote head/controller
cable.
Label Shows the N4951A option number (-P17 or -P32) and serial number.
Figure 9. N4951A rear panel
Table 7. N4951A rear panel
Page 33
Operation
Keysight N4960A Serial BERT 17 and 32 Gb/s User Guide33
3.7 N4951B-D17/-D32 Front Panel
Figure 10. N4951B-D17/-D32 front panel
Table 8. N4951B-D17/-D32 front panel
Item Description
Ch ID LED The Channel ID LED indicator is lit when connected to the N4960A serial BERT
controller.
Atten LED The Attention LED indicator is lit when an error has occurred. The indicator will
not turn off until the error message has been cleared in the Error Log in the
System menu.
On LED
Output Off
Output On
Data Output
The On LED indicator is off when the data output is turned off.
The On LED indicator is lit when the data output is turned on.
The differential data outputs are 2.4 mm connectors.
Connectors
Aux In This connector is reserved for future enhancements.
Aux Out The Auxiliary Output SMA connector provides a pattern trigger.
Page 34
Operation
34Keysight N4960A Serial BERT 17 and 32 Gb/s User Guide
3.8 N4951B-D17/-D32 Rear Panel
3.9 N4951B-H17/-H32 Front Panel
Figure 11. N4951B-D17/-D32 rear panel
Table 9. N4951B-D17/-D32 rear panel
Item Description
Controller Connector The D-subminiature connector receives clock signals, control signals, and
power supplies from the controller via the 1 meter remote head/controller
cable.
Label Shows the N4951B option number (-D17 or -D32) and serial number.
Figure 12. N4951B-H17/-H32 front panel
Page 35
Operation
Keysight N4960A Serial BERT 17 and 32 Gb/s User Guide35
3.10 N4951B-H17/-H32 Rear Panel
Table 10. N4951B-H17/-H32 front panel
Item Description
Ch ID LED The Channel ID LED indicator is lit when connected to the N4960A serial BERT
controller.
Atten LED The Attention LED indicator is lit when an error has occurred. The indicator will
not turn off until the error message has been cleared in the Error Log in the
System menu.
On LED
Output Off
Output On
Data Output
The On LED indicator is off when the data output is turned off.
The On LED indicator is lit when the data output is turned on.
The differential data outputs are 2.4 mm connectors.
Connectors
Aux In This connector is reserved for future enhancements.
Aux Out The Auxiliary Output SMA connector provides a pattern trigger.
Figure 13. N4951B-H17/-H32 rear panel
Table 11. N4951B-H17/-H32 rear panel
Item Description
Controller Connector The D-subminiature connector receives clock signals, control signals, and
power supplies from the controller via the 1 meter remote head/controller
cable.
Label Shows the N4951B option number (-H17 or -H32) and serial number.
Page 36
Operation
36Keysight N4960A Serial BERT 17 and 32 Gb/s User Guide
3.11 N4952A Front Panel
Table 12. N4952A front panel
Item Description
Ch ID LED The Channel ID LED indicator is lit when connected to the controller.
Figure 14. N4952A front panel
Atten LED The Attention LED indicator is lit when an error has occurred. The indicator will
not turn off until the error message has been cleared in the Error Log in the
System menu.
Run LED BLUE while an accumulated BER measurement is running.
Errors LED OFF when no errors are detected, RED when errors are detected.
Data Loss LED RED when data is not detected.
Sync Loss LED RED when data is detected but the data pattern cannot be synchronized.
Data Input
The differential data inputs are 2.92 mm connectors.
Connectors
Aux In This connector is reserved for future enhancements.
Aux Out The Auxiliary Output connector provides an error trigger.
Page 37
Operation
Keysight N4960A Serial BERT 17 and 32 Gb/s User Guide37
3.12 N4952A Rear Panel
Figure 15. N4952A rear panel
Table 13. N4952A rear panel
Item Description
Controller Connector The D-subminiature connector receives clock signals, control signals, and
power supplies from the controller via the 1 meter remote head/controller
cable.
Label Shows the N4952A option number (-E17 or -E32) and serial number.
Page 38
Operation
38Keysight N4960A Serial BERT 17 and 32 Gb/s User Guide
3.13 Block Diagram (32 Gb/s system)
Figure 16
is a simplified block diagram of the 32 Gb/s system that
40Keysight N4960A Serial BERT 17 and 32 Gb/s User Guide
3.15 N4960A Serial BERT Controller
3.15.1
Divided Clock Output
Figure 18
Figure 19
The N4960A serial BERT controller has the capability to divide the clock
frequency over a broad range of divide ratios and return the divided
signal as fully differential non-stressed outputs with adjustable
amplitude and offset. This provides the user a convenient method for
generating a trigger signal to use with a scope, or other applications
requiring a sub rate clock.
The divide ratios are 1 to 99,999,999 with no missing integers. The
divided clock settings can be controlled programmatically or through
the front panel.
The divided clock output duty cycle varies between 33% and 66% as a
function of the divide ratio, N. When N is a power of two, the duty cycle
is exactly 50%. As N deviates from a power of two, the duty cycle
deviates from 50%. For example, N=64 has 50% duty cycle, N=60 has
47% duty cycle, and N=56 has 43% duty cycle.
formulas for calculating pulse width and duty cycle as a function of N,
for any integer N from 2 to 99,999,999. The duty cycle of the divided
clock is 50% ± 10% when the divide ratio is set to 1.
shows the
Figure 18. Calculating pulse width and duty cycle
1024.
is a plot of the duty cycle versus the divide ratio for N = 2 to
Page 41
Operation
Keysight N4960A Serial BERT 17 and 32 Gb/s User Guide41
3.15.2
Delayed Clock Output
Figure 19. Duty cycle versus divide ratio
The Delayed Clock output is a non-stressed clean output with
adjustable phase that can be set from -1000 UI to 1000 UI in 0.001 UI
increments. When used as a clock source for a BERT, the Delayed Clock
would generally be used to clock the error detector.
The Delayed Clock settings can be controlled programmatically or
through the front panel.
Page 42
Operation
42Keysight N4960A Serial BERT 17 and 32 Gb/s User Guide
3.15.3
Jittered Clock Output
2.4 Introduction to Stress
3.15.4
Sinusoidal, Random, and External High Band Paths
Enabling periodic jitter or external low band jitter enables the low frequency
random jitter, or external high frequency band enables the high frequency band
urces or between jitter sources within the same band may cause a phase shift
measurements, enable the jitter source to be used for the measurement, set the
The Jittered Clock output is the main stressed output signal. When used
with a BERT, it would normally provide the clock for the pattern
generator connected to the Jitter connector on the front panel of the
N4960A.
The Jittered Clock output parameters can be controlled
programmatically or through the front panel.
Refer to section
stress implementation in the N4960A serial BERT controller.
The total stress appearing in the output is a summation of the individual
active stress components available in the instrument model.
For the N4960-CJ0, the stress can be either high frequency band
sinusoidal jitter (SJ1) plus externally applied high band jitter, or low
frequency periodic jitter (PJ), or low frequency (high deviation)
externally applied jitter.
For the N4960-CJ1, the stress source choices are one or two tones of
high frequency sinusoidal (SJ1 + SJ2), summed with Random Jitter (RJ)
and any externally applied high band jitter, or low frequency periodic
jitter (PJ), or low frequency (high deviation) externally applied jitter.
, for a full description of the
The SJ1, SJ2, random jitter, and the external high frequency band (low
deviation) jitter input paths can be enabled simultaneously. However,
the sum of these paths must be kept below the specified maximum
modulation level.
band path (the low frequency band is the default path). Enabling SJ1, SJ2,
path. Switching between low frequency band and high frequency band jitter
so
in the jittered clock and the pattern generator. Before performing
amplitude to 0 UI then perform an auto alignment.
Page 43
Operation
Keysight N4960A Serial BERT 17 and 32 Gb/s User Guide43
Applying an external jitter signal with amplitude which exceeds the specified
cannot
The RJ is settable to as low as 0 UI-rms. However, each N4960A-CJ1 will have
maximum phase deviation from itself or as a sum with SJ1, SJ2, and/or RJ may
overdrive the high frequency band modulator. Overdriving the modulator may
result in distorted or intermittent clock output (clock slips). The N4960A
detect conditions which overdrive the modulator.
The RJ source provides true Gaussian random jitter with a crest factor
of at least 14. The unfiltered spectral content is flat from DC to the
contour of the high frequency band modulator, which has a -3 dB
bandwidth (BW) at approximately 320 MHz. For applications which
require a specified RJ frequency contour, an external filter can be
placed in the RJ modulation signal path. Both a low pass and a high
pass filter can be used in series when both ends of the spectrum require
filtering. The RJ signal is available on the rear panel (N4960A-CJ1 only)
between the RJ Out and RJ In connectors. The impedance of the signal
is 50 Ω.
The calibrated RJ modulation range is 0 to 0.025 UI-rms. However, if a
filter is inserted in the RJ path, then the modulation amplitude will be
attenuated by the insertion loss and bandwidth of the filter. For this
reason, the user can program the RJ modulation amplitude to a
maximum of 0.150 UI-rms. However, RJ is uncalibrated above 0.025
mUI.
its own intrinsic RJ minimum, below which, the system cannot achieve the
desired value. Typically, this lower limit is between 5 to 12 mUI-rms. It is
suggested that the intrinsic RJ be checked for operation in the intended
application.
The SJ1, SJ2, random jitter, and external low deviation settings can be
controlled programmatically or through the front panel.
Page 44
Operation
44Keysight N4960A Serial BERT 17 and 32 Gb/s User Guide
3.15.5
Low Frequency Band Periodic or External Jitter Path
5 Performance Specifications
Enabling periodic jitter or external low band jitter enables the low frequency
random jitter, or external high frequency band enables the high frequency band
e same band may cause a phase shift
measurements, enable the jitter source to be used for the measurement, set the
Applying excessive amplitude to the external jitter input will overdrive the
linear operation or intermittent output (clock
A second modulation path is available for low frequency (high deviation)
stress injection. It can only be operated when all of the high frequency
band (low deviation) stress sources (SJ1, SJ2, RJ, and external low
deviation) are disabled. The low band path operates over lower
modulation frequencies, up to 17 MHz (using internal PJ), or up to 4
MHz (external). The modulation source can be either an internally
generated sinusoid (Periodic Jitter, or PJ), or externally supplied
through the Ext Jitter In connector. Externally applied low band jitter
must have a sinusoidal wave shape. Both internal and external jitter
modulation amplitude decreases as a function of modulation frequency.
Refer to
band path (the low frequency band is the default path). Enabling SJ1, SJ2,
path. Switching between low frequency band and high frequency band jitter
sources or between jitter sources within th
in the jittered clock and the pattern generator. Before performing
for exact ranges.
amplitude to 0 UI then perform an auto alignment.
modulation driver, resulting in nonslips). The instrument does not detect an external modulation overdrive
condition.
Page 45
Operation
Keysight N4960A Serial BERT 17 and 32 Gb/s User Guide45
Setting the clock source to External with no signal applied to the Ext Clock In
The main synthesizer in the N4960A-CJ1 controller can be modulated
to enable spread spectrum clocking (SSC). Spread spectrum clocking is
not generally considered to be a stress, but rather a method of
controlling electromagnetic interference (EMI), by spreading the peak
energy of the system clock over a broad portion of the spectrum. In
practice, SSC modulates the system clock in the device with a large
phase deviation at a relatively low frequency, generally 30 or 33 kHz.
The modulation wave shape is usually triangle, to keep the power
spectrum even over the modulation band. To emulate a transmitter of a
device employing SSC, the clock synthesizers used in BERTs include
SSC. To assure proper tracking of the BERT or sampling scope testing a
device with SSC, all three clock outputs of the N4960A-CJ1 controller
(Jittered, Delayed and Divided) are modulated with the same SSC
signal. The SSC deviation range is 0 – 1%
a triangle waveform. The modulation frequency can be set from 1 Hz to
50 kHz. In addition, there are three settings for deviation direction:
down, center and up (relative to the clock frequency setting).
The spread spectrum clock modulation settings can be controlled
programmatically or through the front panel.
1
. The modulation envelope is
The external clock input accepts an external clock to be substituted for
the internal synthesizer. The supplied signal can be driven across the
same frequency range as the internal synthesizer. Spread spectrum
clock modulation is not available when using the external clock input.
The external clock input can be enabled or disabled programmatically or
through the front panel.
The pattern generator and error detector remote heads incorporate half
rate clock architecture. When used as a BERT, any externally supplied
clock input must be at 1/2 the desired data rate.
connector will result in unstable operation.
1
(1% = 10,000 ppm)
Page 46
Operation
46Keysight N4960A Serial BERT 17 and 32 Gb/s User Guide
3.15.8
Delayed Clock Input
Figure 16
Figure 17
If the Delayed Clock In is set to External to drive the Delay Clock Outputs of the
The front panel Delayed Clk In allows users to employ an alternate clock
source in the delay path. For an error detector, this may be desired
when used with a clock recovery device. For a pattern generator
connected to the Delay port, this may be useful to provide an
asynchronous clock for a generator used as an aggressor in cross talk
testing.
By default, the delay clock and error detector/pattern generator clock
are sourced from the main synthesizer (refer to
block diagram). When the External Delay Clock input is used to source a
different clock, the instrument needs to know the external delay clock
frequency to assure proper operation.The user must enter the correct
external delay clock rate. When no value is entered, the instrument
defaults to the frequency of the clock used in the main clock path.
Because the error detector and pattern generator remote heads
incorporate a half rate clock architecture, any externally applied clock to
the Delay Clock In must be at one half the desired data rate for the error
detector or pattern generator. Some clock recovery units generate halfrate clock outputs. If this is not the case, use an external divide by two
clock divider to provide the correct clock frequency.
or
,
N4960A and the clock source is set to External, a valid clock signal MUST be
applied to the Ext Clock In connector for the Delay Clock Outputs to function
properly.
Page 47
Operation
Keysight N4960A Serial BERT 17 and 32 Gb/s User Guide47
3.15.9
N4960A Serial BERT Controller Output Stages
Figure 14
The three clock outputs are AC coupled. Certain devices will not
function properly and cannot be connected to AC coupled equipment
unless an offset and termination voltage can be applied to the signal. To
meet these requirements, each output stage has an integrated bias tee.
On each output of the N4960A serial BERT controller, the amplitude,
offset voltage, termination voltage, and AC/DC coupling can be set
independently. These settings affect the signal at the Jitter, Delay, and
Divided front panel output connectors. The signals driven into the
pattern generator and error detector are not affected by these settings.
Before setting termination voltage and offset voltage, DC coupling must
be selected.
is a simplified diagram of the N4960A serial BERT
controller output stages.
Figure 20. N4960A serial BERT controller output stages
Page 48
Operation
48Keysight N4960A Serial BERT 17 and 32 Gb/s User Guide
3.16 Pattern Generator
3.16.1
Library of Patterns
3.16.2
Programmable Patterns
The pattern generator utilizes a half rate clock architecture that enables
patterns to be generated at data rates from 5 to 32 Gb/s or
4 to 17 Gb/s. The differential output has fully adjustable output
amplitude, crossover, termination, and DC offset.
All features can be controlled through the control panel on the front
panel of the N4960A serial BERT controller, remote SCPI commands, or
through the N4980A multi-instrument BERT software.
Provided with the pattern generator is a large library of common stress
patterns:
• Family of hardware generated PRBS patterns (2n – 1, n = 7, 9, 10,
The pattern generator allows custom designed patterns from 1 bit – 8
Mbit memory depth to be created and uploaded to meet application
requirements. User patterns must fit into the internal 512-bit memory
boundary; therefore, all odd-length patterns will be replicated 512 times
before loading into the N4960A, and even-length patterns will be
replicated between 1 and 256 times (depending on the actual length of
the pattern). Patterns are created and loaded into the N4960A Serial
BERT using the N4980A Multi-instrument BERT Software package; the
pattern editor in this software performs the necessary replication
calculations and will advise the user of any patterns that will not fit into
the 8 Mb memory (after replication) along with suggestions on the
nearest pattern lengths that will fit.
Page 49
Operation
Keysight N4960A Serial BERT 17 and 32 Gb/s User Guide49
3.16.3
Error Injection
ErrInjSingle
Pattern Menu
EXEC
ErrInjRate
Pattern Menu
The N4980A multi-instrument BERT software enables users to create
their own unique patterns, and has several built-in tools to facilitate
pattern creation. A library of factory and utility patterns is provided,
such as
PRBS and clock patterns, which can be used in conjunction with custom
designed patterns in any combination to create complex patterns. Users
have a number of editing tools at their disposal, such as viewing the
pattern as a waveform, inverting a selection of bits, and finding a
sequence of bits or the longest run of ones or zeroes, all in an attempt
to assist users in what can be a tedious task.
For more information, refer to the N4980A multi-instrument BERT
software user guide.
The error injection feature can be configured either to inject a single
error or inject errors at a specified rate. Error injection is commonly used
to verify that the device under test (DUT) setup is correct when in a loop
back configuration.
A single error can be injected whether the error injection feature is
enabled or not. When the
, the
command is highlighted in the
softkey is selected to inject a single error.
Errors can also be injected at specified rates from 10-3 to 10-9 using the
command in the
. For example, if 10-3 is
selected, a single error is injected approximately every thousand bits.
Error injection can also be controlled using the corresponding remote
SCPI commands.
Page 50
Operation
50Keysight N4960A Serial BERT 17 and 32 Gb/s User Guide
3.16.4
Pattern Generator Output Stage
Figure 21
3.16.5
Dual Pattern Generator Operation
Figure 36
The output of the pattern generator has its own amplitude, offset, and
termination voltage settings. However, there is no switch between AC
and DC coupling. The DC offset and termination paths are always active
but default to 0 V. Pre-defined settings allow the user to easily select
industry standard logic levels including ECL, LVPECL, and LVDS. The
termination voltage is used to meet the requirements of an external
device.
stage.
is a simplified diagram of the pattern generator output
Figure 21. Pattern generator output stage
Two pattern generators can be configured for dual channel pattern
generation with delay control for lane alignment.
In this configuration, the pattern generators have independent controls
that are identical except for jitter injection and delay control. Refer to
to the Jitter connector only.
. Jitter injection is applied to the pattern generator connected
Page 51
Operation
Keysight N4960A Serial BERT 17 and 32 Gb/s User Guide51
[ (@<channel list>) ]
6.8 Pattern Generator Channelization
3.16.6
N4951B-D17/-D32 Pattern Generator with 5-tap De-emphasis
In order to send remote commands to the intended pattern generator,
defines which channel(s) to apply the command.
Channel 0 is the jitter channel and channel 1 is the delay channel. Refer
to
.
Dual pattern generators can also be controlled using the N4980A multiinstrument BERT software.
The N4951B de-emphasis options provide integrated 5-tap deemphasis (1 pre-cursor, 2 post cursors) and are available in 17 Gb/s and
32 Gb/s versions. The de-emphasis head provides designers with the
signal pre-distortion capability required for transmitter emulation when
characterizing receivers, backplanes, and systems.
Figure 22. No de-emphasis
Figure 23. De-emphasis equalization applied
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52Keysight N4960A Serial BERT 17 and 32 Gb/s User Guide
Deemphasis
Pat Gen-Jit Menu
3.17 Error Detector
The taps can be adjusted from the front panel of the N4960A, using the
functions in the
, or the N4980A multi-
instrument BERT software.
The N4980A includes a de-emphasis tap weight computation tool that
simplifies the process of computing tap weights into the following steps:
1. Load a measured or simulated s-parameter file of the channel
loss.
2. Click on the start calculation button (blue button). The software
calculates the minimum tap values necessary to create the ideal
compensation filter response.
3. Fine tune the taps if necessary for optimal fit.
4. Select the pattern generator with de-emphasis.
5. Click on the Set Taps button to load the computed tap weights
into the N4951B-D17/-D32 pattern generator head.
For more information about the N4980A de-emphasis tap weight
calculator, refer to the N4980A multi-instrument BERT software user
guide.
The error detector utilizes a half rate clock architecture that enables
error detection at data rates from 5 to 32 Gb/s or 4 to 17 Gb/s. The
differential output has adjustable input termination voltage.
All features can be controlled through the control panel on the front
panel of the N4960A serial BERT controller, remote SCPI commands, or
through the N4980A multi-instrument BERT software.
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3.17.1
Error Detector Input Stage
Figure 24
3.17.2
Pattern Selection
The input comparator of the error detector is AC coupled, with
programmable DC termination voltage. The termination voltage is
always active, but the default value is 0 V.
diagram of the error detector input stage.
is a simplified
Patterns are identical to those available for use with the pattern
generator. A pattern must first be selected before synchronization can
be attempted.
Figure 24. Error detector input stage
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54Keysight N4960A Serial BERT 17 and 32 Gb/s User Guide
3.17.3
Synchronization
BER Thrshld
Sync Mode
Manual
Sync Now
Sync
Menu
3.17.4
Auto Pattern
Auto Pattern
Pat Type
PRBS
Auto Pattern
Synchronization is the process of bit aligning the detector internal
reference pattern with the input bit stream. Synchronization can be
initiated automatically or manually. Synchronization can be impacted by
several factors, including the detector decision point. The decision point
should be set appropriately for the test setup before synchronization is
attempted. The decision point can be automatically adjusted by the
error detector. However, if the eye is considerably closed from excessive
jitter or Inter Symbol Interference, the user may need to manually
perform the initial alignment.
In auto mode, synchronization can be configured to occur when a
specified BER threshold has been reached using the
command in the Sync Menu. The default mode is auto synchronization.
Auto synchronization can also be controlled using the corresponding
remote SCPI commands.
Changing the
performed each time the
. Manual synchronization can also be initiated using the
corresponding remote SCPI commands.
to
allows synchronization to be
command is executed in the
When the
the error detector automatically detects and synchronizes to PRBS
patterns. If
message “Unknown” is displayed.
feature is enabled,
cannot determine the pattern type, the
is set to
and
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3.17.5
Alignment
Config AutoAlign
AutoAlign Menu.
Set SmplV
Set Delay
Set SmplV
Set Delay
Perform AutoAlign
SmplV
Delay
Input Adjust
align with memory based patterns (.fpt or .usr) is not recommended
Alignment is the process which places the detector decision point in the
optimal position in the eye. The two parameters which position the
detector are time (delay) and amplitude (sample threshold voltage). The
time (delay) parameter positions the decision point horizontally while
the amplitude (sample threshold voltage) parameter positions the
decision point vertically. Alignment can be done either automatically or
manually.
In auto mode, the sample threshold voltage and delay step size are
configured using the
In addition,
enabled (ON). The default for
auto alignment is performed by executing the
command in the
(sample voltage) and
and
(delay) must be
is enabled. The
command. After the auto alignment is performed, the results can be
viewed which includes eye height and eye width. Auto alignment can
also be controlled using the corresponding remote SCPI commands.
In manual mode, the sample voltage and delay can be adjusted using
and
in the
menu. Manual alignment can also
be controlled using the corresponding remote SCPI commands.
Use of autobecause it can be quite slow depending on the pattern length. Instead, perform
auto-align on a hardware PRBS pattern then switch to the memory based
pattern. Changing patterns does not affect alignment.
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56Keysight N4960A Serial BERT 17 and 32 Gb/s User Guide
3.18 Half Rate Clock Architecture
When using remote SCPI commands, jitter, delay, and spread spectrum clock
The pattern generator and error detector utilize half rate clock
architecture relative to the N4960A serial BERT controller. This means
that the N4960A serial BERT controller settings for jitter, delay, and
spread spectrum clock, are half that of the pattern generator and error
detector settings.
Jitter and delay settings for the N4960A serial BERT controller, pattern
generator, and error detector are expressed in unit intervals. A unit
interval, also referred to as a bit period, is the time taken in a data
stream for one bit. For example, if the data rate is set to 10 Gb/s
(controller set to 5 GHz), the unit interval is 1 ÷ 10 Gb/s, which equals
100 ps, the time for one bit.
Jitter and delay unit intervals can be set at the N4960A serial BERT
controller or at the pattern generator and error detector. Therefore, it is
important to understand the relationship between the clock outputs
(N4960-CJ0/N4960-CJ1), the pattern generator, and the error detector
as described in the following sections.
can only be set at the N4960A serial BERT controller. Therefore, SCPI values
related to UI, such as jitter amplitude or delay, must be set to half of the value
desired on the pattern generator outputs or error detector delay.
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3.18.1
Jitter Relationship Between Clock Output and Pattern Generator Output
Figure 25
3.18.2
Delay Relationship Between Remote Head and Delay Clock Output
Figure 26
BERT controller relative to the jittered output of a pattern generator
connected to the Jitter port. Note that one clock period corresponds to
two bit periods. With SJ amplitude set to 0.1 UI in the N4960A serial
BERT controller, the SJ amplitude of the pattern generator will be set to
0.2 UI automatically. Conversely, if the SJ amplitude of the pattern
generator is set to 0.2 UI, the SJ amplitude of the N4960A serial BERT
controller will be set to 0.1 UI automatically.
illustrates the jittered clock output from the N4960A serial
Figure 25. Jitter relationship
BERT controller relative to the delay of a pattern generator or error
detector connected to the Delay port. Note that one clock period
corresponds to two bit periods. With the delay set to 0.1 UI in the
N4960A serial BERT controller, the delay of the pattern generator/error
detector will be set to 0.2 UI automatically. Conversely, if the delay of
the pattern generator/error detector is set to 0.2 UI, the delay of the
N4960A serial BERT controller will be set to 0.1 UI automatically.
illustrates the delayed clock output from the N4960A serial
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58Keysight N4960A Serial BERT 17 and 32 Gb/s User Guide
3.19 Bit Error Rate Tests
3.19.1
Setting up a Basic BER Test
1. Set the clock frequency and pattern generator data rate.
Figure 26. Delay relationship
A bit error rate (BER) test is performed by driving the pattern generator
output into a DUT and back into the input of the error detector. Each bit
of the detector internal reference pattern is compared to the input bit
stream, and each mismatch is recorded as an error. The BER represents
the ratio of total number errors detected to total number of bits
received. For example, 1 error bit out of 1,000,000 total bits would
result in a BER of 1e-6 (1/1,000,000).
The N4960A serial BERT 17 and 32 Gb/s can be set up to run BER tests
using the front panel, remote SCPI commands, or N4980A multiinstrument BERT software.
Regardless of the method used to set up a BER test, the following
describes the setup requirements.
The pattern generator data rate is based on the clock frequency
setting. Due to the half rate clock architecture of the remote
heads, the clock frequency setting is half that of the remote
heads.
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2. Set the pattern generator logic level.
3. Select a pattern.
4. Enable the pattern generator output.
5. Synchronize the error detector.
6. Align the error detector.
7. Set the BER measurement criteria.
8. Start the BER measurement (accumulation).
3.19.2
Accumulated and Instantaneous BER
The data logic level sets the amplitude, offset, and termination
voltages appropriate for the DUT. Logic level choices include
ECL, LVPECL, and LVDS. Entering values other than ECL,
LVPECL, or LVDS values are considered “custom” entries.
For most devices which use conventional loop back, the pattern
generator and error detector patterns must match.
The pattern generator output defaults to disabled. Therefore,
ensure that the output is enabled. This is done using the Enable
function in the Data Output Menu (within the Pattern Gen
Menu).
Synchronize the error detector internal reference pattern with
the input bit stream. This may be done automatically or
manually.
The time (delay) parameter positions the decision point
horizontally while the amplitude (sample voltage) parameter
positions the decision point vertically. This may be done
automatically or manually.
Set the criteria for a BER test based on duration, number of bits,
or number of errors. The BER test can also be set to start/stop
manually.
The accumulated BER (aBER) tracks the currently accumulated bit error
rate, the total number of errors, the total number of logic 1 errors, the
total number of logic 0 errors, and the elapsed time. If the aBER is
cleared after the accumulation has stopped, all numbers are reset.
The instantaneous BER (iBER) displays the BER at the current instant in
time. The iBER is updated at a constant rate, regardless of whether an
accumulated BER test is running.
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60Keysight N4960A Serial BERT 17 and 32 Gb/s User Guide
3.20 Control Panel Operation
Figure 27
3.20.1
Menu Navigation
Figure 28
This section describes how to use the Control Panel to operate the
N4960A serial BERT 17 and 32 Gb/s. Refer to
.
Figure 28. Softkey navigation buttons and rotary knob
Figure 27. Control panel
Navigation through the menus is accomplished with the four softkeys to
the right of the display and the rotary knob. Refer to
.
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Keysight N4960A Serial BERT 17 and 32 Gb/s User Guide61
Figure
29
SEL
Figure 30
Scroll through menu items using either the softkeys corresponding to
the up and down arrow labels, or using the rotary knob. Refer to
.
Figure 29. Scrolling through menu items
If a menu item has a lower-level menu that can be accessed, the
softkey appears. Press it to access the corresponding lower-level menu.
Refer to
Figure 30. Accessing lower-level menus
.
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62Keysight N4960A Serial BERT 17 and 32 Gb/s User Guide
3.20.2
Changing Parameters
EDIT
Figure 31
EDIT
The keypad is used if a parameter is a numeric value only.
Figure 32
The
be changed or has multiple selections (for example, on and off). Refer to
When the softkey corresponding to the
function’s parameter can be changed using the rotary knob or the
keypad.
label appears when a menu item has a numeric value that can
.
Figure 31. EDIT label
label is pressed, the
is an example of changing parameters using the rotary knob.
Figure 32. Changing parameters using the rotary knob
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EXIT
Figure 33
When using the rotary knob, changes to numeric values occur instantly. This
EDIT
ENT
Figure 34
If you are using the rotary knob to change numeric values, use the
right/left arrows on the keypad to highlight the digit you wish to
change. The right arrow highlights the digit to the right. The left arrow
highlights the digit to the left. When finished, press the softkey
corresponding to the
to
.
label to return to the previous screen. Refer
Figure 33. Highlighting digits to change
applies to almost all numeric values.
In addition to the rotary knob, the numeric keypad can be used to
change numeric values. Once the softkey corresponding to the
label is pressed, simply enter the value using the numeric keypad. When
finished, either press the
hardkey on the keypad, or press the
softkey corresponding to the associated units label to accept the entry.
Refer to
.
Figure 34. Using the numeric keypad
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64Keysight N4960A Serial BERT 17 and 32 Gb/s User Guide
When changing values using the numeric keys, the change is not accepted until
3.20.3
Menu Structure
Figure 35
the ENT hardkey in the keypad, or a unit softkey is pressed.
shows the hierarchical structure of the Synthesizer, Jitter,
Delay, and Divided menus. Note that some parameters such as data
rate and jitter control, appear in both the synthesizer and the pattern
generator menus. This is to accommodate the half rate clock of the
pattern generator and error detector. When entered in the synthesizer
menu, the values correspond to the clock outputs on the front panel.
When entered in the pattern generator menu, the 2X conversion factor
is automatically applied so the values correspond to the pattern
generator output.
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Figure 35. Synthesizer, jitter, delay, and divided menu structure
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66Keysight N4960A Serial BERT 17 and 32 Gb/s User Guide
Figure 36
menus.
shows the hierarchical structure of the pattern generator
Figure 36. Pattern generator menu structure
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Figure 37
shows the hierarchical structure of the error detector menus.
Figure 37. Error detector menu structure
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68Keysight N4960A Serial BERT 17 and 32 Gb/s User Guide
Figure 38
shows the hierarchical structure of the System menus.
Figure 38. System menu structure
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3.20.4
Menu Label Descriptions
Table 14
Refer to
for the Synthesizer Menu descriptions.
Table 14. Synthesizer Menu descriptions
Label Name Description
Frq Sets the clock source frequency. The optional units are kHz, MHz, and GHz.
The resolution is 1 kHz. Displays EXTERNAL when External clock source is
selected.
ClkSrc Sets the clock source to INT for using the internal clock source or EXT for
using an external clock source.
SSC cannot be enabled if the clock source is external. If the SSC enabled state
conflicts with the clock source, a message indicating a conflict appears in the
N4960A-CJ1 controller display. Selecting Yes to resolve the conflict will set
the SSC enabled state to an appropriate value.
DlyClkSrc Sets the delay clock to be System for using the internal delay clock, or Ext for
using an external delay clock. Setting the DlyClkSrc to System will use either
the internal synthesizer or the external clock, whichever ClkSrc is set to.
DlyFrq Sets the delay clock frequency when DlyClkSrc is set to Ext. When DlyClkSrc is
set to System, the message “See Frq” is displayed referring to the frequency of
the system clock.
10MHzRef Sets the 10 MHz reference to INT for using the internal 10 MHz reference, EXT
for using an external 10 MHz reference, or AUTO for detecting and connecting
to an external reference automatically.
SSCDev1 Sets the spread spectrum clock deviation. The units are PPM (parts per
million). The resolution is 1 PPM.
SSCType1 Sets the spread spectrum clock deviation direction from down (DWN) spread,
up (UP) spread, or center (CNTR) spread.
SSCFrq1 Sets the spread spectrum clock frequency. The optional units are Hz and kHz.
The resolution is 1 Hz.
SSCEnable1 Enables/disables the spread spectrum clock function.
SSC cannot be enabled if the clock source is external. If the clock source
conflicts with the SSC enabled state, a message indicating a conflict appears
in the N4960A-CJ1 controller display. Selecting Yes to resolve the conflict will
set the clock source to an appropriate value.
1
Feature available in N4960A-CJ1 only.
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70Keysight N4960A Serial BERT 17 and 32 Gb/s User Guide
If the clock source is set to External without a valid clock signal connected, then
If the 10 MHz Reference is set to Auto mode, whenever it switches between
(“REF,INTERNAL” and “REF,EXTERNAL”) respectively. If the 10 MHz Reference is
Table 15
the results from the :SOUR:FREQ? query may fluctuate or return “0000 Hz”. In
addition, a “FREQ/OOR” (frequency out of range) error may be generated. If
either of these conditions is detected, check the external clock source.
Internal and External, a message indicating the switch is generated
using an External source and there is a loss of signal, a loss of signal error will
be generated (“REF,LOS”).
Refer to
for the Jit Clk Out menu descriptions.
Table 15. Jit Clk Out menu descriptions
Label Name Description
OutEnable Enables/disables the jittered clock output.
Amp Sets the amplitude of the jittered clock. The optional units are mV and V. The
resolution is 0.005 V.
Offs Sets the offset of the jittered clock. The maximum range is a function of the
termination voltage setting. The optional units are mV and V. The resolution is
0.005 V.
The offset may be limited by the current termination voltage. If the desired
offset value conflicts with the current termination value, a message indicating
a conflict appears in the N4960A serial BERT controller display. Selecting Yes
to resolve the conflict will set the termination to an appropriate value.
Term Sets the termination voltage of the jittered clock. The maximum range is a
function of the offset setting. The optional units are mV and V. The resolution
is 0.005 V.
The termination may be limited by the current offset voltage. If the termination
value conflicts with the offset value, a message indicating a conflict appears in
the N4960A serial BERT controller display. Selecting Yes to resolve the
conflict will set the offset to an appropriate value.
Coupling Selects AC or DC output coupling.
Coupling must be set to DC before offset or termination can be set to a nonzero value. If an attempt to change the offset or termination to a non-zero
value conflicts with the AC coupling setting, a message indicating a conflict
appears in the N4960A serial BERT controller display. Selecting Yes to resolve
the conflict will set the coupling to DC.
SJ1 Sets the sinusoidal jitter 1 frequency. The optional units are Hz and MHz. The
resolution is 1 Hz.
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Label Name Description
SJ1Amp2 Sets the sinusoidal jitter 1 amplitude. The optional units are mUI and UI (p-p).
The resolution is 0.001 UI.
During the setting of SJ1 amplitude, if SJ1 and/or SJ2/RJ are enabled
simultaneously, keep the sum of all 3 components below the specified
maximum modulation level.
SJ1Enable Enables/disables the sinusoidal jitter 1.
SJ1 cannot be enabled if PJ or external jitter (low band) is enabled. If the SJ1
enabled state conflicts with these other jitter sources, a message indicating a
conflict appears in the N4960A serial BERT controller display. Selecting Yes to
resolve the conflict will disable all conflicting jitter sources.
SJ21 Sets the sinusoidal jitter 2 frequency. The optional units are Hz and MHz. The
resolution is 1 Hz.
SJ2Amp
1,2
Sets the sinusoidal jitter 2 amplitude. The optional units are mUI and
UI (p-p). The resolution is 0.001 UI.
During the setting of SJ1 amplitude, if SJ1 and/or SJ2/RJ are enabled
simultaneously, keep the sum of all 3 components below the specified
maximum modulation level.
SJ2Enable1 Enables/disables the sinusoidal jitter 2.
SJ2 cannot be enabled if PJ or external jitter (low band) is enabled. If the SJ2
enabled state conflicts with these other jitter sources, a message indicating a
conflict appears in the N4960A-CJ1 controller display. Selecting Yes to
resolve the conflict will disable all conflicting jitter sources.
PJ Sets the periodic jitter frequency. The optional units are Hz and MHz. The
resolution is 1 Hz.
The maximum PJ amplitude is a function of PJ frequency. If the PJ frequency
conflicts with the current PJ amplitude, a message indicating a conflict
appears in the N4960A serial BERT controller display. Selecting Yes to resolve
the conflict will set PJ amplitude to an appropriate value.
PJAmp Sets the periodic jitter amplitude. The optional units are mUI and UI (p-p). The
resolution is 0.001 UI. The maximum PJ amplitude is a function of PJ
frequency.
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72Keysight N4960A Serial BERT 17 and 32 Gb/s User Guide
should not exceed the specified
Sinusoidal 1 jitter, Sinusoidal 2 jitter, random jitter, and external jitter high
frequency band (low deviation) can be enabled simultaneously. However, when
Label Name Description
PJEnable Enables/disables the periodic jitter.
Periodic Jitter cannot be enabled if any other internal or external jitter source
is enabled. If the PJ enabled state conflicts with other jitter sources, a
message indicating a conflict appears in the N4960A serial BERT controller
display. Selecting Yes to resolve the conflict will disable all other jitter
sources.
RJAmp1 Sets the random jitter amplitude in RMS. The optional units are mUI-rms and
UI-rms. The resolution is 1 mUI-rms. The maximum calibrated RJ amplitude is
25 mUI-rms, but the system allows values up to 150 mUI-rms to offset any
amplitude loss caused by use of a filter on the RJ input.
When used in combination with other high frequency band stresses (SJ1, SJ2,
and external high band jitter), keep the sum of all 3 components below the
specified maximum modulation level.
RJEnable1 Enables/disables the random jitter output.
RJ cannot be enabled if PJ or external jitter (low band) is enabled. If the RJ
enabled state conflicts with these other jitter sources, a message indicating a
conflict appears in the N4960A-CJ1 controller display. Selecting Yes to
resolve the conflict will disable all conflicting jitter sources.
ExtJit Selects the external jitter input path.
High band external jitter can be enabled in combination with SJ1, SJ2, and RJ.
Low band external jitter cannot be enabled if any other jitter source is enabled.
If the low band external jitter enabled state conflicts with other jitter sources, a
message indicating a conflict appears in the N4960A serial BERT controller
display. Selecting Yes to resolve the conflict will disable all other jitter
sources.
LB Gain Sets the gain of the external low band gain. The optional units are mUI/V or
UI/V.
1
Feature available in N4960A-CJ1 only.
2
Note that the sum of SJ1, SJ2, RJ, and external jitter low deviation amplitude
maximum deviation. However, the system only checks SJ1 and SJ2.
used in combination, make sure that the sum of these paths does not exceed
the specified maximum modulation level. In addition, periodic jitter or external
low band jitter cannot be enabled if any of the other jitter paths are enabled.
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Table 16
Refer to
for the Dly Clk Out menu descriptions.
Table 16. Dly Clk Out menu descriptions
Label Name Description
OutEnable Enables/disables the delayed clock output.
Amp Sets the amplitude of the delayed clock. The optional units are mV and V. The
resolution is 0.005 V.
Offs Sets the offset of the delayed clock. The maximum range is a function of the
termination voltage setting. The optional units are mV and V. The resolution is
0.005 V.
The offset may be limited by the current termination voltage. If the desired
offset value conflicts with the current termination value, a message indicating
a conflict appears in the N4960A serial BERT controller display. Selecting Yes
to resolve the conflict will set the termination to an appropriate value.
Term Sets the termination voltage of the delayed clock. The maximum range is a
function of the offset setting. The optional units are mV and V. The resolution
is 0.005 V.
The termination may be limited by the current offset voltage. If the termination
value conflicts with the offset value, a message indicating a conflict appears in
the N4960A serial BERT controller display. Selecting Yes to resolve the conflict
will set the offset to an appropriate value.
Coupling Selects AC or DC output coupling.
Coupling must be set to DC before offset or termination can be set to a nonzero value. If an attempt to change the offset or termination to a non-zero
value conflicts with the AC coupling setting, a message indicating a conflict
appears in the N4960A serial BERT controller display. Selecting Yes to resolve
the conflict will set the coupling to DC.
Delay Sets the delay of the delayed clock. The optional units are mUI and UI. The
resolution is 0.001 UI.
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74Keysight N4960A Serial BERT 17 and 32 Gb/s User Guide
Table 17
Refer to
for the Div Clk Out menu descriptions.
Table 17. Div Clk Out menu descriptions
Label Name Description
OutEnable Enables/disables the divided clock output.
Amp Sets the amplitude of the divided clock. The optional units are mV and V. The
resolution is 0.005 V.
Offs Sets the offset of the divided clock. The maximum range is a function of the
termination voltage setting. The optional units are mV and V. The resolution is
0.005 V.
The offset may be limited by the current termination voltage. If the desired
offset value conflicts with the current termination value, a message indicating
a conflict appears in the N4960A serial BERT controller display. Selecting Yes
to resolve the conflict will set the termination to an appropriate value.
Term Sets the termination voltage of the divided clock. The maximum range is a
function of the offset setting. The optional units are mV and V. The resolution
is 0.005 V.
The termination may be limited by the current offset voltage. If the termination
value conflicts with the offset value, a message indicating a conflict appears in
the N4960A serial BERT controller display. Selecting Yes to resolve the conflict
will set the offset to an appropriate value.
Coupling Selects AC or DC output coupling.
Coupling must be set to DC before offset or termination can be set to a nonzero value. If an attempt to change the offset or termination to a non-zero
value conflicts with the AC coupling setting, a message indicating a conflict
appears in the N4960A serial BERT controller display. Selecting Yes to resolve
the conflict will set the coupling to DC.
Div Sets the divided clock divide ratio.
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Table 18
Refer to
for the Pattern Gen Menu descriptions for a pattern
generator connected to the Jitter (Channel 0) connector.
Common settings between the synthesizer and pattern generator are
superseded by the pattern generator settings. The jitter and delay
settings are replicated in the pattern generator menu for the users'
convenience. All jitter amplitude and delay ranges, settings, and
resolutions are double that of the Jitter Clock Output, due to the half
rate clock architecture of the pattern generator remote head.
Table 18. Pat Gen-Jit menu descriptions
Label Name Description
Data Output Menu
Enable Enables/disables the pattern generator output.
DRate Displays the pattern generator data rate. DRate is not settable.
Amp Sets the pattern generator output amplitude. Resolution is 0.005 V.
Offs Sets the DC offset of the data eye presented at the data outputs of the pattern
generator. The maximum range is a function of the termination voltage setting.
The optional units are mV and V. The resolution is 0.005 V.
The offset may be limited by the current termination voltage. If the desired
offset value conflicts with the current termination value, a message indicating a
conflict appears in the N4960A serial BERT controller display. Selecting Yes to
resolve the conflict will set the termination to an appropriate value.
Term Sets the DC output offset of the data eye to support a specified termination
voltage of a DUT having a 50 Ω input port. The maximum range is a function of
the offset setting. The optional units are mV and V. The resolution is 0.001 V.
The termination may be limited by the current offset voltage. If the termination
value conflicts with the offset value, a message indicating a conflict appears in
the N4960A serial BERT controller display. Selecting Yes to resolve the conflict
will set the offset to an appropriate value.
Logic Sets the data logic level. The levels are ECL, LVPECL, and LVDS. Editing any
parameter will automatically change the logic level to “CUST” (custom).
Xover Sets the data crossover point (percentage).
SJ1 Sets the sinusoidal jitter 1 frequency. The optional units are Hz and MHz. The
resolution is 1 Hz.
SJ1Amp2 Sets the sinusoidal jitter 1 amplitude relative to the output of the pattern
generator (which has double the amplitude range of SJ1 of the controller). The
optional units are mUI and UI (p-p). The resolution is 0.002 UI.
During the setting of SJ1 amplitude, if SJ1 and/or SJ2/RJ are enabled
simultaneously, keep the sum of all 3 components below the specified
maximum modulation level.
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76Keysight N4960A Serial BERT 17 and 32 Gb/s User Guide
Label Name Description
SJ1Enable Enables/disables the sinusoidal jitter 1.
SJ1 cannot be enabled if PJ or external jitter (low band) is enabled. If the SJ1
enabled state conflicts with these other jitter sources, a message indicating a
conflict appears in the N4960A serial BERT controller display. Selecting Yes to
resolve the conflict will disable all conflicting jitter sources.
SJ21 Sets the sinusoidal jitter 2 frequency. The optional units are Hz and MHz. The
resolution is 1 Hz.
SJ2Amp
1,2
Sets the sinusoidal jitter 2 amplitude relative to the output of the pattern
generator (which has double the amplitude range of SJ2 of the controller). The
optional units are mUI and UI (p-p). The resolution is 0.002 UI.
During the setting of SJ1 amplitude, if SJ1 and/or SJ2/RJ are enabled
simultaneously, keep the sum of all 3 components below the specified
maximum modulation level.
SJ2Enable1 Enables/disables the sinusoidal jitter 2.
SJ2 cannot be enabled if PJ or external jitter (low band) is enabled. If the SJ2
enabled state conflicts with these other jitter sources, a message indicating a
conflict appears in the N4960A-CJ1 controller display. Selecting Yes to resolve
the conflict will disable all conflicting jitter sources.
PJ Sets the periodic jitter frequency. The optional units are Hz and MHz. The
resolution is 1 Hz.
The maximum PJ amplitude is a function of PJ frequency. If the PJ frequency
conflicts with the current PJ amplitude, a message indicating a conflict appears
in the N4960A serial BERT controller display. Selecting Yes to resolve the
conflict will set PJ amplitude to an appropriate value.
PJAmp Sets the periodic jitter amplitude relative to the output of the pattern generator
(which has double the amplitude range of PJ of the controller). The optional
units are mUI and UI (p-p). The resolution is 0.002 UI. The maximum PJ
amplitude is a function of PJ frequency.
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Keysight N4960A Serial BERT 17 and 32 Gb/s User Guide77
Label Name Description
PJEnable Enables/disables the periodic jitter on the pattern generator connected to the
Jitter connector only.
Periodic Jitter cannot be enabled if any other internal or external jitter source is
enabled. If the PJ enabled state conflicts with other jitter sources, a message
indicating a conflict appears in the N4960A serial BERT controller display.
Selecting Yes to resolve the conflict will disable all other jitter sources.
RJAmp1 Sets the random jitter amplitude in RMS relative to the output of the pattern
generator (which has double the amplitude range of RJ of the controller). The
optional units are mUI-rms and UI-rms. The resolution is 2 mUI-rms.
When used in combination with other high frequency band stresses (SJ1, SJ2,
and external high band jitter), the sum of all jitter source amplitudes should not
exceed the maximum specified modulation level.
RJEnable1 Enables/disables the random jitter output.
RJ cannot be enabled if PJ or external jitter (low band) is enabled. If the RJ
enabled state conflicts with these other jitter sources, a message indicating a
conflict appears in the N4960A-CJ1 controller display. Selecting Yes to resolve
the conflict will disable all conflicting jitter sources.
ExtJit Selects the external jitter input path.
High band external jitter can be enabled in combination with SJ1, SJ2, and RJ.
Low band external jitter cannot be enabled if any other jitter source is enabled.
If the low band external jitter enabled state conflicts with other jitter sources, a
message indicating a conflict appears in the N4960A serial BERT controller
display. Selecting Yes to resolve the conflict will disable all other jitter sources.
LB Gain Sets the gain of the external low band gain. The optional units are mUI/V or
UI/V.
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78Keysight N4960A Serial BERT 17 and 32 Gb/s User Guide
Label Name Description
Pattern Menu
Pat Displays the current pattern name (read only). Use the Pat Type and Name
menu items to select the desired pattern.
Pat Type Sets the type for the list of selectable patterns under “Name”. Available types
are PRBS, Factory, and User.
Name Sets the pattern name from the list of patterns filtered by Pat Type.
Pat Invert Inverts all patterns.
ErRateInjEna Enables/disables error injection.
ErrInjRate Sets the error injection rates from 1E-3 to 1E-9.
ErrInjSingle Injects a single error each time the EXEC softkey is pressed.
Deemphasis3
Pre Adjusts the impulse response sample of the bit before the cursor bit.
Post1 Adjusts the impulse response sample of the first bit after the cursor bit.
Post2 Adjust the impulse response sample of the bit that is two bits after the cursor
bit.
Post3 Adjust the impulse response sample of the bit that is three bits after the cursor
bit.
1
Feature available in N4960A-CJ1 for pattern generator connected to Jitter connector only.
2
Note that the sum of SJ1, SJ2, RJ, and external jitter low deviation amplitude should not exceed the maximum
specified modulation level. However, the system only checks SJ1 and SJ2.
3
Feature available in pattern generator with de-emphasis only.
Sinusoidal 1 jitter, Sinusoidal 2 jitter, random jitter, and external jitter high
frequency band (low deviation) can be enabled simultaneously. However, when
used in combination, make sure that the sum of these paths does not exceed
the specified maximum modulation level. In addition, periodic jitter or external
low band jitter cannot be enabled if any of the other jitter paths are enabled.
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Keysight N4960A Serial BERT 17 and 32 Gb/s User Guide79
Table 19
ted by the current termination voltage. If the desired offset
Refer to
for the Pat Gen-Dly menu descriptions for a pattern
generator connected to the Delay (Channel 1) connector.
Table 19. Pat Gen-Dly menu descriptions
Label Name Description
Data Output Menu
Enable Enables/disables the pattern generator output.
DRate Displays the pattern generator data rate. DRate is not settable.
Amp Sets the pattern generator output amplitude. Resolution is 0.005 V.
Offs Sets the DC offset of the data eye presented at the data outputs of the pattern
generator. The maximum range is a function of the termination voltage setting.
The optional units are mV and V. The resolution is 0.005 V.
The offset may be limi
value conflicts with the current termination value, a message indicating a
conflict appears in the N4960A serial BERT controller display. Selecting Yes to
resolve the conflict will set the termination to an appropriate value.
Term Sets the DC output offset of the data eye to support a specified termination
voltage of a DUT having a 50 Ω input port. The maximum range is a function of
the offset setting. The optional units are mV and V. The resolution is 0.001 V.
The termination may be limited by the current offset voltage. If the termination
value conflicts with the offset value, a message indicating a conflict appears in
the N4960A serial BERT controller display. Selecting Yes to resolve the conflict
will set the offset to an appropriate value.
Logic Sets the data logic level. The levels are ECL, LVPECL, and LVDS. Editing any
parameter will automatically change the logic level to “CUST” (custom).
Xover Sets the data crossover point (percentage).
Delay Adjust
Delay This sets the amount the clock must be shifted when aligning the pattern
generator connected to the Delay connector on the front panel of the N4960A.
Resolution is 0.002 UI.
Pattern Menu
Pat Displays the current pattern name (read only). Use the Pat Type and Name menu
items to select the desired pattern.
Pat Type Sets the type for the list of selectable patterns under “Name”. Available types
are PRBS, Factory, and User.
Name Sets the pattern name from the list of patterns filtered by Pat Type.
Pat Invert Inverts all patterns.
ErRateInjEna Enables/disables error injection.
ErrInjRate Sets the error injection rates from 1E-3 to 1E-9.
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80Keysight N4960A Serial BERT 17 and 32 Gb/s User Guide
Table 20
be centered in the received eye for best performance using the auto alignment
Label Name Description
ErrInjSingle Injects a single error each time the EXEC softkey is pressed.
Deemphasis1
Pre Adjusts the impulse response sample of the bit before the cursor bit.
Post1 Adjusts the impulse response sample of the first bit after the cursor bit.
Post2 Adjust the impulse response sample of the bit that is two bits after the cursor
bit.
Post3 Adjust the impulse response sample of the bit that is three bits after the cursor
bit.
1
Feature available in pattern generator with de-emphasis only.
Refer to
for the Error Det menu descriptions.
Table 20. Error Det menu descriptions
Label Name Description
iBER Displays the instantaneous bit error rate. The iBER is updated at a constant
rate, regardless of whether an accumulated BER test is running.
Input Adjust
SmplV Sets the sampling voltage that the error detector uses to sample the incoming
data. If Set SmplV is on, this value will be updated to the optimal value found
during an auto alignment. Resolution is 0.001 V.
Delay Sets the sampling delay. This sets the amount the clock must be shifted to
sample the incoming data to the error detector. In most cases, this value will
feature. If Autoalign parameter - Set Delay is on, this value will be updated to
the optimal value found during an auto alignment. Resolution is 0.002 UI.
TermV Sets the input termination voltage applied to the inputs of the error detector.
Resolution is 0.001 V.
DRate Displays the current data rate.
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Keysight N4960A Serial BERT 17 and 32 Gb/s User Guide81
Label Name Description
Pattern Menu
Auto Pattern Enables/disables the detected pattern selection feature. This feature detects
and syncs to PRBS patterns only. When enabled, Pat Type is set to PRBS and
cannot be changed.
Pat Displays the current pattern name (read only). Use the Pat Type and Name
menu items to select the desired pattern.
Pat Type Sets the filter for the list of selectable patterns under “Name”. Available filters
are PRBS, Factory, and User. If Auto Pattern is enabled and it cannot
determine the pattern type, the message “Unknown” is displayed.
Name Sets the pattern name from the list of patterns filtered by Pat Type.
Pat Invert Inverts all patterns. Cannot be changed when Auto Pattern is ON.
Sync Menu
Sync Now Executes a synchronization to synchronize to the incoming data stream
regardless of the setting for Sync Mode.
Sync Type Displays the synchronization type (Normal).
Sync Mode Specifies whether the error detector will attempt to automatically synchronize
(Auto) to the incoming data stream or will synchronize only when the Sync
Now command is executed (Manual).
Sync Loss /
Displays whether the system is synchronized or has lost synchronization.
Synchronized
BER Thrshld Sets the synchronization threshold to trigger a synchronization attempt. When
the Sync Mode is set to Auto and the BER rises above this threshold, the error
detector will attempt to synchronize to the incoming data stream
automatically. Range is 1E-2 to 1E-9.
AutoAlign Menu
Perform AutoAlign Executes an auto alignment to adjust to the optimal sampling and delay
voltage.
Config AutoAlign Set SmplV: enables/disables auto sample voltage alignment.
SmplV Step: sets the sampling threshold voltage step size used during an
auto alignment to determine the optimal voltage.
Set Delay: enables/disables auto delay alignment.
Dly Step: sets the sampling delay step size used during an auto alignment to
determine the optimal sampling delay.
AutoAlign Results Eye Height: returns the eye height found during auto alignment.
Eye Width: returns the eye width found during auto alignment.
Last AutoAlign: returns the date and time of the last auto alignment.
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82Keysight N4960A Serial BERT 17 and 32 Gb/s User Guide
Label Name Description
Accumulation Menu
Start Accum Executes an accumulated BER test.
Stop Manual: sets the accumulated BER test to run indefinitely (max 9999999.9
Config Stop Menu Dur: sets the duration of the accumulated BER test in seconds when Duration
seconds ~ 115 days) and is stopped by the user selecting the Stop softkey.
Duration: sets the accumulated BER test to run for the duration specified
using the Dur setting.
Bits: sets the accumulated BER test to run until the number of bits is reached,
as specified using the Bit command.
Errors: sets the accumulated BER test to run until the number of errors is
reached, as specified using the Err command.
is selected as the Stop criteria. Maximum is 9999999.9 seconds.
Bit: sets the number of bits to accumulate when Bits is selected as the Stop
criteria. Range is 1E8 to 1E17 bits.
Err: sets the number of errors to accumulate when Errors is selected as the
Stop criteria. Range is 1 to 99999999 errors.
Results aBER: displays the accumulated bit error rate. Selecting the LARGE softkey
displays the accumulated BER is a large font.
Clear: clears the current results after accumulation is stopped.
Errs: displays the number of errored bits.
Errored 1: displays the number of logic 1 errors.
Errored 0: displays the number of logic 0 errors.
Elapsed Time: displays the elapsed time of the BER test.
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Keysight N4960A Serial BERT 17 and 32 Gb/s User Guide83
Table 21
3.21 Working with Setting Dependencies
Table 22
Refer to
for the System menu descriptions.
Table 21. System menu descriptions
Label Name Description
Event Log Accesses the list of error messages. The Attention LED indicator on the front
panel is lit when an error occurs and added to the Error Log.
Save / Recall Stores the current instrument state into a buffer (1-5), which can then be
recalled.
GPIB Address Sets the GPIB Address from 0 to 30.
Real Time Clock Sets the instrument time and date.
Instrument Info Accesses the instrument serial number and firmware version information.
UI Info Accesses the user interface hardware version and build information.
Controller Info Accesses the controller hardware version and build information.
Jit Head Info Accesses the serial number, hardware version, and firmware version
information of a pattern generator head that is connected to the Jitter port.
Dly Head Info Accesses the serial number, hardware version, and firmware version
information of a pattern generator or error detector head that is connected to
the Delay port.
The N4960A serial BERT 17 and 32 Gb/s has a number of settings which
have a dependency on another setting, noted in the tables above in
italic text.
between multiple settings is detected, the N4960A serial BERT
controller front panel gives the user the opportunity to clear the
conflicts in order to proceed with the desired setting.
Settings Dependency
Clock Source and SSC Enable SSC cannot be enabled if the clock source is set to external and
Offset, Termination (all clock
outputs)
contains a summary of all dependent settings. When a conflict
Table 22. Summary of dependent settings
vice versa.
On all clock outputs, the range of the offset voltage is defined by
the current termination voltage and vice versa. See Figure 39.
Offset, Termination, and
Coupling (all clock outputs)
On all clock outputs, the coupling must be set to DC in order for the
offset and termination voltage to be set to a non-zero value.
PJ vs. all other jitter sources PJ cannot be enabled if any other jitter source is enabled and vice
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84Keysight N4960A Serial BERT 17 and 32 Gb/s User Guide
Settings Dependency
versa.
PJ amplitude vs. PJ frequency The PJ amplitude range is a function of PJ frequency. The system
will resolve conflicts in the PJ amplitude when the PJ frequency is
adjusted. However it will simply limit the PJ amplitude range
according to the current PJ frequency.
External jitter low band vs. all
other jitter sources
External jitter low band cannot be enabled if any other jitter source
is enabled and vice versa.
SJ1, SJ2, RJ, external jitter
high band
These high frequency band jitters can all be enabled at the same
time, however, the sum of their amplitudes must be kept below the
specified maximum modulation level.
Figure 39. Relationship between offset and termination voltage of the clock outputs
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Keysight N4960A Serial BERT 17 and 32 Gb/s User Guide85
3.22 Verifying Operation
3.22.1
Initial Hardware Setup – Controller and Pattern Generator
Figure 40
The following procedures will familiarize you with the features of the
N4960A Serial BERT 17 and 32 Gb/s and provide a quick check of
system operation. The procedures all assume starting from a power up
preset state. In all cases where the preset value of the setting parameter
can be used, no steps are included to set the value.
1. Connect the equipment as shown in
2. Tighten cables to 8 lbf-in (90 N-cm).
.
Figure 40. Setup for checking jitter
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86Keysight N4960A Serial BERT 17 and 32 Gb/s User Guide
3.22.2
Initial Settings
For purposes of this example setup, an Keysight 86100C Infiniium DCA-J was
Trigger Setup
Timebase Setup
MAIN
MAIN
Synthesizer
Menu
SEL
Synthesizer Menu
Frq
EDIT
8
GHz
Refer to 3.20.2 Changing Parameters for instructions on how to use the rotary
1. Set up the high speed sampling scope as follows:
used. High-speed sampling scope setup option names may differ between
models. Signal path delays will be affected by cable lengths. It may be
necessary to adjust the scope delay values to center the waveform for proper
viewing.
Set the high speed sampling scope to Eye/Mask mode
Trigger Level: 0 V
Slope: Rising Edge
Trigger Bandwidth: Standard (DC-3.2 GHz)
Scale: 20 ps/div
Reference: center
Channel 2 Setup (data)
Attenuation: 10 dB (10 dB attenuator placed at the
input)
Bandwidth: set to maximum
Display: On
Scale: 100 mV/Div
Offset: 0.0 V
Units: Volt
2. Turn the N4960A serial BERT controller on and wait until the
menu appears on the display.
3. In the
menu position the arrow next to the
label then press the softkey corresponding to the
label.
4. In the
5. Enter
position the arrow next to the
then press the softkey corresponding to the
on the numeric keypad then press the softkey
corresponding to the
label to set the frequency to 8 GHz.
label.
label
knob or numeric keypad to make changes.
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Keysight N4960A Serial BERT 17 and 32 Gb/s User Guide87
BACK
MAIN
MAIN
Pat Gen-Jit
Menu
SEL
Pat Gen-Jit Menu
Data
Output Menu
SEL
Data Output Menu
Enable
EDIT
Enable
ON.
Figure 41
3.22.3
Enabling Sinusoidal Jitter
Data Output Menu
SJ1
EDIT
200
MHz
Data Output Menu
SJ1Amp
EDIT
0.200
UI
Data Output Menu
SJ1Enable
EDIT
6. Press the softkey corresponding to the
menu appears.
7. In the
menu position the arrow next to the
label then press the softkey corresponding to the
label.
8. In the
9. In the
label.
position the arrow next to the
label then press the softkey corresponding to the
position the arrow next to the
label then press the softkey corresponding to the
10. Use the rotary knob to set
should now be displayed on the high speed sampling scope
similar to the one shown in
to
label until the
A “clean” eye pattern
.
label.
Figure 41. “Clean” eye pattern example
1. In the
label then press the softkey corresponding to the
2. Enter
corresponding to the
3. In the
label then press the softkey corresponding to the
4. Enter
corresponding to the
UI.
5. In the
on the numeric keypad then press the softkey
on the numeric keypad then press the softkey
position the arrow next to the
label to set the SJ1 level to 200 MHz.
position the arrow next to the
label to set the SJ1 modulation to 0.2
position the arrow next to the
label then press the softkey corresponding to the
label.
label.
label.
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88Keysight N4960A Serial BERT 17 and 32 Gb/s User Guide
SJ1Enable
SEL
Data Output Menu
Figure 42
Data Output Menu
SJ1Enable
EDIT
SJ1Enable
OFF
SEL
Data Output Menu
3.22.4
Enabling Random Jitter (N4960A-CJ1 controller only)
Data Output Menu
RJAmp
EDIT
050
mUI-rms
Data Output Menu
RJEnable
EDIT
RJEnable
SEL
Data Output Menu
Figure 43
6. Use the rotary knob to set
7. Press the softkey corresponding to the
entry and return to the
should now be displayed on the high speed sampling scope
similar to the one shown in
Figure 42. Jittered eye pattern example
to ON.
label to accept the
. A jittered eye pattern
.
8. In the
9. Use the rotary knob to set
label then press the softkey corresponding to the
label.
position the arrow next to the
10. Press the softkey corresponding to the
entry and return to the
1. In the
position the arrow next to the
label then press the softkey corresponding to the
2. Enter
on the numeric keypad then press the softkey
corresponding to the
label to set the RJ amplitude to
50 mUI-rms.
3. In the
label then press the softkey corresponding to the
position the arrow next to the
label.
4. Use the rotary knob to set
5. Press the softkey corresponding to the
entry and return to the
pattern should now be displayed on the high speed sampling
scope similar to the one shown in
to
to ON.
.
label to accept the
.
label.
label to accept the
. A random jittered eye
.
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Keysight N4960A Serial BERT 17 and 32 Gb/s User Guide89
90Keysight N4960A Serial BERT 17 and 32 Gb/s User Guide
Synthesizer Menu
SSCEnable
EDIT
SSCEnable
OFF
SEL
MAIN
3.22.6
Bit Error Rate Test
Figure 45
Figure 44. Spread spectrum clock waveform example
7. In the
8. Use the rotary knob to set
9. Press the softkey corresponding to the
label.
label then press the softkey corresponding to the
entry and return to the
position the arrow next to the
menu. Note the waveform
to
.
label to accept the
displayed on the oscilloscope again shows a clean eye pattern.
1. Connect the equipment as shown in
.
2. Tighten cables to 8 lbf-in (90 N-cm).
Figure 45. Setup for BER test
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Keysight N4960A Serial BERT 17 and 32 Gb/s User Guide91
3.22.2 Initial Settings
MAIN
Err Det Menu
SEL
Err Det Menu
AutoAlign
Menu
SEL
Perform AutoAlign
EXEC
Errors, Data Loss,
Sync Loss
BACK
Err Det Menu
Err Det Menu
Accumulation
Menu
SEL
Stop
EDIT
Stop
Duration
EXIT
Config Stop Menu
SEL
Dur
EDIT
60
SEC
BACK
Accumulation Menu
Start Accum
START
Run
Results
SEL
Errs
0.000e0
3. Ensure that the pattern generator output is enabled. Refer to
for the procedure to enable the pattern
generator output.
4. In the
5. In the
menu position the arrow next to the
label then press the softkey corresponding to the
label then press the softkey corresponding to the
position the arrow next to the
label.
label.
6. Position the arrow next to the
press the softkey corresponding to the
label. A small clock
label then
appears in the display. When the clock disappears, ensure that
the
and
LEDs on the front panel of
the error detector are off.
7. Press the softkey corresponding to the
the
8. In the
label then press the softkey corresponding to the
.
position the arrow next to the
label to return to
label.
9. Position the arrow next to the
corresponding to the
10. Use the rotary knob to set the
11. Press the softkey corresponding to the
label.
label then press the softkey
criteria to
.
label to accept the
entry.
12. Position the arrow next to the
the softkey corresponding to the
13. Position the arrow next to the
corresponding to the
14. Enter
on the numeric keypad then press the softkey
corresponding to the
label.
label then press the softkey
label then press
label.
label to set the duration to 60
seconds.
15. Press the softkey corresponding to the
the
16. Position the arrow next to the
softkey corresponding to the
.
label to return to
label then press the
label. The
LED on the
front panel of the error detector should be lit.
17. When the bit error rate test has completed, position the arrow
next to the
the
18. Ensure that
label.
label then press the softkey corresponding to
reads
.
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92Keysight N4960A Serial BERT 17 and 32 Gb/s User Guide
3.23 Setting Frequency and Output Amplitude
MAIN MENU
Synthesizer
Menu
SEL
Synthesizer Menu
EDIT
Refer to 3.20.2 Changing Parameters for instructions on how to use the rotary
EXIT
The following procedure shows how to set the frequency and clock
output amplitude of the N4960A serial BERT controller. The settings are
output to either the Jitter or Delay clock connectors on the front panel
of the N4960A serial BERT controller.
1. In the
2. In the
3. Adjust the synthesizer frequency using the rotary knob or the
label then press the softkey corresponding to the
position the arrow next to the
label.
position the arrow next to the Frq label
then press the softkey corresponding to the
numeric keypad.
label.
knob or numeric keypad to make changes.
4. Press the softkey corresponding to the EXIT label to accept the
5. Determine which clock output will be used. Either the Jitter or
6. In the MAIN MENU position the arrow next to the Jit Clk Out
7. In the Jit Clk Out Menu or the Dly Clk Out Menu position the
8. Adjust the output amplitude using the rotary knob or the
9. Press the softkey corresponding to the
entry and return to the MAIN MENU.
Delay output can be used as a "clean" (non-jittered or nondelayed) output provided that the corresponding jitter enable
function is set to OFF and the delay is set to 0.
Menu (if using the Jitter clock output) or the Dly Clk Out Menu
label (if using the Delay clock output) then press the softkey
corresponding to the SEL label.
arrow next to the Amp label then press the softkey
corresponding to the EDIT label.
numeric keypad.
label to accept the
entry.
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Keysight N4960A Serial BERT 17 and 32 Gb/s User Guide93
3.24 Setting Random Jitter Injection (N4960A-CJ1 controller only)
MAIN MENU
Jit Clk Out
Menu
SEL
Jit Clk Out Menu
EDIT
Refer to 3.20.2 Changing Parameters for instructions on how to use the rotary
EXIT
RJEnabl
EDIT
RJEnabl
SEL
MAIN MENU
3.25 Setting Sinusoidal Jitter Injection
Jit Clk Out Menu
SJ1
EDIT
SJ1Amp
EDIT
SJ1Enabl
EDIT
The following procedure shows how to enable and set the random jitter
modulation. The settings are output to the Jitter clock connector on the
front panel of the N4960A-CJ1 controller and to a pattern generator
connected to the Jitter port.
1. In the
2. In the
3. Adjust the jittered clock output amplitude using the rotary knob
label then press the softkey corresponding to the
label.
then press the softkey corresponding to the
or the numeric keypad.
position the arrow next to the
position the arrow next to the Amp label
label.
knob or numeric keypad to make changes.
4. Press the softkey corresponding to the
entry.
5. Adjust the random jitter modulation using the rotary knob or the
numeric keypad.
6. Position the arrow next to the
softkey corresponding to the
7. Use the rotary knob to set
8. Press the softkey corresponding to the
entry and return to the
The following procedure shows how to set up a single sinusoidal jitter
path. The settings are output to the Jitter clock connector on the front
panel of the N4960A serial BERT controller and to a pattern generator
connected to the Jitter port.
1. In the
2. Adjust the SJ1 frequency using the numeric keypad.
3. Position the arrow next to the
4. Adjust the SJ1 modulation using the rotary knob or the numeric
5. Position the arrow next to the
then press the softkey corresponding to the
softkey corresponding to the
keypad.
softkey corresponding to the
label to accept the
position the arrow next to the
label then press the
label.
to ON.
label to accept the
.
label then press the
label.
label then press the
label.
label.
label
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94Keysight N4960A Serial BERT 17 and 32 Gb/s User Guide
SJ1Enabl
SEL
MAIN MENU
3.26 Setting External Jitter High Frequency Injection
MAIN MENU
Jit Clk Out
Menu
SEL
Jit Clk Out Menu
ExtJit
EDIT
ExtJit
High Band
SEL
Jit Clk Out Menu
When the high frequency jitter path is enabled, there may be a phase shift in the
jittered clock and the pattern generator output. This shift only occurs when SJ1,
3.27 Setting Delay Clock Output
MAIN MENU
Dly Clk Out
Menu
SEL
Dly Clk Out Menu
OutEnabl
EDIT
OutEnabl
SEL
Dly Clk Out Menu
EDIT
6. Use the rotary knob to set
7. Press the softkey corresponding to the
entry and return to the
to ON.
.
The following procedure shows how to set up the external high
frequency (low deviation) jitter path. This procedure requires an external
jitter source be connected to the Ext Jitter In connector on the rear
panel of the N4960A serial BERT controller.
1. In the
2. In the
3. Use the rotary knob to set
4. Press the softkey corresponding to the
label then press the softkey corresponding to the
label.
label then press the softkey corresponding to the
entry and return to the
position the arrow next to the
position the arrow next to the
to
.
label to accept the
label.
.
label to accept the
SJ2, RJ, or ExtHiBand is enabled/disabled. It does not occur when the jitter
amplitude or frequency is changed.
The following procedure shows how to set up the delay clock output.
The settings are output to the Delay clock connector on the front panel
of the N4960A serial BERT controller.
1. In the
2. In the
3. Use the rotary knob to set
4. In the
5. Adjust the delayed clock output amplitude using the rotary knob
label then press the softkey corresponding to the
label.
label then press the softkey corresponding to the
softkey corresponding to the
then press the softkey corresponding to the
or the numeric keypad.
position the arrow next to the
position the arrow next to the
position the arrow next to the Amp label
to ON then press the
label to accept the entry.
label.
label.
Page 95
Operation
Keysight N4960A Serial BERT 17 and 32 Gb/s User Guide95
Refer to 3.20.2 Changing Parameters for instructions on how to use the rotary
EXIT
3.28 Setting Divided Clock Output
MAIN MENU
Div Clk Out
Menu
SEL
Div Clk Out Menu
OutEnabl
EDIT
OutEnabl
SEL
Div Clk Out Menu
EDIT
EXIT
knob or numeric keypad to make changes.
6. Press the softkey corresponding to the
entry.
The following procedure shows how to set up the divided clock output.
The output is taken from the Divided clock output connector on the
front panel of the N4960A serial BERT controller.
1. In the
2. In the
3. Use the rotary knob to set
4. In the
5. Adjust the divided clock output amplitude using the rotary knob
label then press the softkey corresponding to the
label.
label then press the softkey corresponding to the
softkey corresponding to the
then press the softkey corresponding to the
or the numeric keypad.
label to accept the
position the arrow next to the
position the arrow next to the
to ON then press the
label to accept the entry.
position the arrow next to the Amp label
label.
label.
Refer to 3.20.2 Changing Parameters for instructions on how to use the rotary
knob or numeric keypad to make changes.
6. Press the softkey corresponding to the
entry.
label to accept the
Page 96
Operation
96Keysight N4960A Serial BERT 17 and 32 Gb/s User Guide
3.29 Event/Error Log
Table 23
Table 24
Refer to
and
for the list of message origins and values
found in the event/error Log.
When an event/error is received, the Attention LED will illuminate.
Each event log entry contains the following information:
• Log Number: 1 to n, with 1 being the most recent error and ‘n’
being the oldest error.
• Message Origin: Identifies the sub-system which produced the
error.
• Message Value: The error.
• Datestamp: Date of error receipt (mm/dd/yy).
• Timestamp: Time of error receipt (hh/mm/ss).
Table 23. Message origin
Message Origin Description
IPC IPC protocol related codes
FREQ Frequency control
PHASE Phase control
REF 10 MHz reference clock
Table 24. Message values
Message Values Description
OK Status good, no errors
UNK Status unknown
ERR Misc. error
LOS Loss of signal/phase slip
OOR Value out of range
TIMEOUT Command or operation took too long. See Section6.17.4.
AMPL_LIMIT_WARN Amplitude limited, non-fatal (warning), used for PJ amplitude
adjustment during SCPI PJ frequency setting. See Section 6.10.1.
INTERNAL Used to indicate the 10MHz reference clock is set to Internal
EXTERNAL Used to indicate the 10MHz reference clock is set to External
Page 97
Applications
Keysight N4960A Serial BERT 17 and 32 Gb/s User Guide97
4 Applications
4.1 Introduction
Jitter connector
Delay
Divided
The N4960A serial BERT 17 and 32 Gb/s performs basic BER and jitter
tolerance testing or general receiver characterization applications.
In a general BERT application, the outputs would be configured as
follows:
applied for jitter tolerance testing or other receiver characterization
testing.
connector is used to clock the error detector. The delay feature
enables the detector to synchronize with the pattern, and align to
sample at the center of the eye (optimum decision point).
oscilloscope. Most sampling scopes have maximum trigger rates which
are substantially lower than the bandwidth of the sampler. When used
in high data rate applications, the data clock must be divided down to a
ratio within the maximum trigger rate. In addition, by setting the divider
ratio to the exact pattern length, the output will be locked to the
pattern. Using this signal to trigger the sampling scope allows the user
to view and measure the actual bit stream, rather than presenting an
“eye” of overlaid bits.
The divided output can also be used where a sub rate clock is required.
Output can provide a sub rate of the clock to trigger a sampling
is used to drive the pattern generator. Stress can be
Page 98
Applications
98Keysight N4960A Serial BERT 17 and 32 Gb/s User Guide
4.2 Testing Transceivers Used in Fibre Channel Networks
MAIN
MAIN
Synthesizer
Menu
SEL
Synthesizer Menu
Frq
EDIT
GHz
BACK
MAIN
MAIN
Pat Gen Menu
SEL
Pattern Gen Menu
Data
Output Menu
SEL
Data Output Menu
Enable
EDIT
Enable
EXIT
Data Output Menu
BACK
Pattern Gen Menu
Pattern Gen Menu
Pattern
Menu
SEL
There are three topologies in this type of network including point-topoint, arbitrated loop, and switched fabric. The connections between
devices use transceivers for optimization. For example, in a switched
fabric topology, SFP+ (8GFC and 16GFC), XFP (10 Gb/s) and SFP (≤ 4
Gb/s) are types of transceivers that connect between the switched
fabric and various devices such as storage and computing equipment.
Typical patterns used to test transceiver devices include PRBS series,
JSPAT, and K28 series which are part of the preloaded library of
patterns in the N4960A 32G BERT.
For 16GFC applications (14.025 Gb/s), the N4960A can perform BER
measurements and can provide a stressed pattern generator signal for
receiver tests. The N4960A, used with the N4980A multi-instrument
BERT software, can also provide jitter tolerance tests for accurate
characterization.
1. Turn the N4960A serial BERT controller on and wait until the
menu appears on the display.
2. In the
menu position the arrow next to the
label then press the softkey corresponding to the
label.
3. In the
position the arrow next to the
then press the softkey corresponding to the
label.
4. Enter the frequency using the numeric keypad then press the
softkey corresponding to the
label. The data rate is double
the synthesizer frequency and is based on the type of transceiver
being tested.
5. Press the softkey corresponding to the
menu appears.
6. In the
menu position the arrow next to the
label then press the softkey corresponding to the
7. In the
8. In the
label.
position the arrow next to the
label then press the softkey corresponding to the
position the arrow next to the
label then press the softkey corresponding to the
9. Use the rotary knob to set
10. Press the softkey corresponding to the
entry and return to the
11. Press the softkey corresponding to the
the
12. In the
label then press the softkey corresponding to the
.
position the arrow next to the
to ON.
label until the
label to accept the
.
label to return to
label.
label
label.
label.
Page 99
Applications
Keysight N4960A Serial BERT 17 and 32 Gb/s User Guide99
Name
SEL
BACK
MAIN
MAIN
Err Det Menu
SEL
Err Det Menu
AutoAlign
Menu
SEL
Perform AutoAlign
EXEC
Errors
Data Loss
BACK
Err Det Menu
Err Det Menu
Accumulation
Menu
SEL
Start Accum
START
Run
STOP
Results
SEL
aBER
Errs
Errored 1
Errored 0
Elapsed Time
13. Position the arrow next to the
corresponding to the
Label.
label then press the softkey
14. Select the pattern based on the type of transceiver being tested.
15. Press the softkey corresponding to the
menu appears.
16. In the
menu position the arrow next to the
label then press the softkey corresponding to the
17. In the
label then press the softkey corresponding to the
position the arrow next to the
label until the
label.
label.
18. Position the arrow next to the
press the softkey corresponding to the
label. A small clock
label then
appears in the display. When the clock disappears, ensure that
the
and
LEDs on the front panel of the error
detector are off.
19. Press the softkey corresponding to the
the
20. In the
label then press the softkey corresponding to the
.
position the arrow next to the
label to return to
label.
21. Position the arrow next to the
softkey corresponding to the
label. The
label then press the
LED on the
front panel of the error detector should be lit.
22. To stop the BER measurement, press the softkey corresponding
to the
23. Position the arrow next to the
softkey corresponding to the
24. View accumulated BER (
(
(
label.
), zero errors (
).
), total errors (
label then press the
label.
), one errors
), and measurement time
Page 100
Applications
100Keysight N4960A Serial BERT 17 and 32 Gb/s User Guide
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