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Manual Part Number
E8251-90359
Edition
September 2014
Published in USA
Keysight Technologies
1400 Fountaingrove Pkwy.
Santa Rosa, CA 95403 USA
Warranty
THE MATERIAL CONTAINED IN THIS
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Items) and DFARS 227.7202-3 (Rights in
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Software Documentation).
Safety Notices
A CAUTION notice denotes a hazard.
It calls attention to an operating
procedure, practice, or the like that,
if not correctly performed or
adhered to, could result in damage
to the product or loss of important
data. Do not proceed beyond a
CAUTION notice until the indicated
conditions are fully understood and
met.
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A WARNING notice denotes a hazard. It calls attention to an operating procedure, practice, or the like
that, if not correctly performed or
adhered to, could result in personal
injury or death. Do not proceed
beyond a WARNING notice until the
indicated conditions are fully
understood and met.
• “Electrostatic Discharge (ESD) Information” on page 1- 1
• “Getting Started with Troubleshooting” on page 1- 2
• “A18 CPU Turn–On Test” on page 1- 3
• “Self–Test Failures and Related Troubleshooting” on page 1- 6
• “Troubleshooting Assembly–Level Problems” on page 1- 10
• “Troubleshooting Unlocks” on page 1- 64
• “Troubleshooting Unlevels” on page 1-67
• “Troubleshooting Adjustment Problems” on page 1- 72
• “Troubleshooting ADC Adjustment Failures” on page 1- 74
• “Troubleshooting Performance Test Problems” on page 1- 74
• “Troubleshooting the RF Path” on page 1- 75
• “Troubleshooting Harmonic Spurious” on page 1- 78
• “Troubleshooting Non–Harmonic Spurious” on page 1- 81
• “Troubleshooting Option UNR/UNX/UNY and Instruments with Serial Prefixes >= US4805/MY4805 Phase Noise” on
page 1- 82
• “Overall Description” on page 1- 83
• “Reference/Synthesis Loop Description” on page 1- 93
• “RF Path Description (Frequency Generation, Level Control, and Modulation)” on page 1- 99
• “Self–Test Overview” on page 1-121
• “Contacting Agilent Technologies” on page 1- 122
WARNINGTroubleshooting instructions are for use by qualified personnel only. To avoid electrical shock, do not
perform any troubleshooting unless qualified.
The opening of covers or removal of parts is likely to expose dangerous voltages. Disconnect the
signal generator from all voltage sources before it is opened.
Electrostatic Discharge (ESD) Information
WARNINGThe following techniques related to ESD and static–safe workstations should not be used when
working on circuitry with a voltage potential greater than 500 volts.
ESD can damage or destroy electronic components. All work on electronic assemblies should be performed at a
static–safe workstation using two types of static–safe workstation protection:
• conductive table–mat and wrist–strap combination
• conductive floor–mat and heel–strap combination
Both types, when used together, provide a significant level of ESD protection. Of the two, only the table–mat and
wrist–strap combination provides adequate ESD protection when used alone. To ensure user safety, the static–safe
accessories must provide at least 1 MΩ of isolation from ground.
E8257D/67D, E8663D PSG Signal Generators Service Guide
1- 1
Page 16
Troubleshooting
Getting Started with Troubleshooting
Handling of Electronic Components and ESD
CAUTIONMany of the assemblies in this instrument are very susceptible to damage from ESD. Perform
troubleshooting procedures only at a static–safe workstation, and wear a grounding strap.
Always handle a printed circuit board assembly by its edges. This reduces the possibility of ESD damage
to components, and prevent contamination of exposed plating.
The possibility of unseen damage caused by ESD is present whenever components are transported, stored, or used.
The risk of ESD damage can be greatly reduced by close attention to how all components are handled.
• Perform work on all components at a static–safe workstation.
• Keep static–generating materials at least one meter away from all components.
• Store or transport components is static–shielding containers.
Getting Started with Troubleshooting
Referring to Table 1- 1:
• determine where to begin troubleshooting
• work on problems in the order they are presented in the table
• use the descriptions provided in this chapter that explain how the signal generator operates, and the function of
each assembly: the overall description (page 1- 83), the synthesis loop (page 1- 93), the RF path (page 1- 99), and
self–test (page 1- 121).
Tabl e 1 -1
If able to run self–test...Go to this section...
Run Self–Test“Running Self–Test” on page 1- 2 and refer to
“Self–Test Failures and Related Troubleshooting” on page 1- 6.
If unable to run self–test, check...Go to this section...
Power supply fai lure s
A18 CPU turn–on failures
Front panel display or keyboard operations
If other conditions occur...Go to this section...
Unlocked Conditions
Unleveled Conditions
Adjustment Problems
Performance Test Problems
“Power Supply Troubleshooting” on page 1- 14
“A18 CPU Turn–On Test” on page 1- 3
“Front–Panel Display Assembly Troubleshooting” on page 1- 10
“Troubleshooting Unlocks” on page 1- 64
“Troubleshooting Unlevels” on page 1- 67
“Troubleshooting Adjustment Problems” on page 1- 72
“Troubleshooting Performance Test Problems” on page 1- 74
Running Self–Test
NOTEA bad assembly can cause other assemblies to fail. The internal failure tree will identify the most likely failed
assembly and report it as the “most independent failure.” Troubleshoot and replace that assembly before
troubleshooting and replacing other assemblies.
When you replace an assembly a good assembly will pass self–test without any adjustments.
1. On the instrument front panel, press the Utility hardkey.
2. Select the following softkeys:
1-2
E8257D/67D, E8663D PSG Signal Generators Service Guide
Page 17
Troubleshooting
A18 CPU Turn–On Test
a. Instrument Info/Help Mode
b. Self Test
c. Run Complete Self Test
3. When the Self–Test finishes, one of the following messages displays:
• If the Self Test passed: “The current status of self test is: Success All self tests have passed.”
• If the Self–Test failed: “The current status of self test is: Failed.” The message also reports the most
independent failure.
4. If the Self–Test failed, look up the reported most independent failure in the “Self–Test Failures and Related
Troubleshooting” section on page 1- 6.
5. Troubleshoot and repair the most independent failure.
6. After you replace the failed assembly, run the Self–Test again.
7. If another assembly is reported as the most independent failure, repeat steps 4 thru 6 until the Self–Test passes.
A18 CPU Turn–On Test
NOTEIf it is determined that the A18 CPU is defective but still functions, it is recommended that you back up the
calibration data in the CPU prior to replacing it. To back up the calibration data, see “CPU Data Backup” on
page 1- 5.
At turn–on, the A18 CPU is designed to complete a series of operational checks. If all power supply voltages are
present and the A18 CPU is working correctly, the operational checks are completed. Errors are reported if the
A18 CPU has problems identifying other assemblies or communicating with the backup memory located on the
A31 Motherboard.
Failure Symptoms
• display is not functioning
• CPU fails to complete the turn–on check and does not reach normal LCD operation
• display is not functioning after turn–on
• unable to control signal generator from front panel
• error message is displayed after turn–on
A2 Display Not Functioning or A2 Display Not Functioning After Turn–on
Refer to “Front–Panel Display Assembly Troubleshooting” on page 1- 10.
A18 CPU Fails to Complete the Turn–On Check
1. Turn power off and remove outer and inner covers.
2. Turn on power and verify A18 CPU LED DS9 (+3.4 Vdc) and DS10 (+5.2 Vdc) are on. If either of the LEDs are off,
check the voltages in Table 1- 2. Refer to the illustration in “Self–Tests 11xx: A18 CPU Self–Test Errors” on
page 1- 45 for LED locations.
Tabl e 1 -2
Connector P222
(A31 Motherboard)
Pin 45–48, 95–98+3.4 Vdc+3.4 ± 0.07 Vdc
Pin 49, 50, 99, 100+5.2 Vdc+5.2 ± 0.1 Vdc
Supply VoltageAcceptable Range
3. If the voltages are present on connector P222, turn power off and remove the A18 CPU.
4. Inspect the pins on the A31 Motherboard connector. If the pins look good replace the A18 CPU.
5. If either of the voltages are missing, refer to “Power Supply Troubleshooting” on page 1- 14.
E8257D/67D, E8663D PSG Signal Generators Service Guide
1-3
Page 18
Troubleshooting
A18 CPU Turn–On Test
6. If DS9 and DS10 are on, proceed to “Checking the A18 CPU Voltages” on page 1- 4.
Checking the A18 CPU Voltages
1. With the external and internal covers removed and the signal generator on its side, turn power on and check to
see if all the power supply LEDs on the A31 Motherboard are on. If any of the power supply LEDs are not on,
refer to “Power Supply Troubleshooting” on page 1- 14 to troubleshoot.
2. If all the power supply LEDs on the motherboard are on, check the A18 CPU and A31 Motherboard connector pins
for the voltages listed in the following table.
ConnectorSupply VoltageAcceptable Range
P223–2, 22+5 VA+5.2 ± 0.16 Vdc
P223–3−15 V_In−15 ± 0.45 Vdc
P223–4+32 V_In+32 ± 0.96 Vdc
P223–21+15 V_Standby+14.85 ± 0.6 Vdc
P223–23+15 V_In+15 ± 0.75 Vdc
P223–37−7 Vdc−7.0 ± 0.14 Vdc
P223–39+10 Vdc+10.2 ± 0.2 Vdc
P223–40+8 Vdc+7.95 ± 0.21 Vdc
3. If any main power supply voltage problems are detected, refer to “Power Supply Troubleshooting” on page 1- 14.
4. If all power supply voltages are good, replace A18 CPU.
Verifying the A18 CPU Turn–On Sequence
Verify the A18 CPU turn–on sequence by observing DS1 to DS8 sequence patterns (See the diagram on page 1- 45 for
LED locations). DS1 to DS8 should match the sequence shown in Table 1-3. Before verifying the turn–on sequence,
make sure all switches in the upper left–hand corner of the A18 CPU are in the CLOSED (up) position. If the lights
fail to step through the sequence, replace A18 CPU.
Table 1-3 A18 CPU LED Sequence Table
SequenceDS1DS2DS3DS4DS5DS6DS7DS8
1 XXXXXXXX
200X00000
3XXX00000
4 0XXXXXXX
500000000
6 XXXXXXX0
X = LED is on; 0 = LED is off
No Instrument Control From the Front Panel
Refer to “Front–Panel Display Assembly Troubleshooting” on page 1- 10.
Error Messages
If error messages are reported after the turn–on check is completed, refer to the Error Messages list, located on the
E8257D/67D PSG Signal Generator Documentation Set CD (part number E8251–90351) for details.
1-4
E8257D/67D, E8663D PSG Signal Generators Service Guide
Page 19
Troubleshooting
A18 CPU Turn–On Test
CPU Data Backup
This procedure applies only if the CPU is working prior to removal.
1. Record the installed license keys:
a. Press
b. For each option that has a check mark after the license key, write down the option number and the license
2. Backup the calibration data from the CPU to the mother board:
• Execute the SCPI command: :DIAG:FILE:BACK.
3. Follow the instructions from Chapter 3, Assembly Replacement, to replace the CPU board.
• “Self–Tests 26xx: A8 Output Self–Test Errors” on page 1-62
Front–Panel Display Assembly Troubleshooting
Overview
The Front–Panel Display Assembly comprises the following:
• a 640 x 320 pixels liquid crystal display (LCD)
• a power switch/flat panel interface board, which contains the power on/off switch, standby LED, and power–on
LED
This board contains the circuitry to disable the power supply. The ON_OFF control line is pulled to a TTL low to
disable the power supply.
Another function of the power switch/flat panel interface board is to route the 8 data bits from the A18 CPU to
the A2 Display.
• a front panel board that contains the front–panel hardkeys, softkeys, and RPG
• a dc to ac inverter, which turns the LCD on and off via control lines received from the CPU
The inverter also converts the 5.2 Vdc to approximately a 160 Vrms, 40 kHz signal to drive the LCD.
Display Controls
Contrast
There are two contrast hardkeys below the A2 Display. The left up arrow key increases the contrast while the right
down arrow key decreases the contrast.
1-10
E8257D/67D, E8663D PSG Signal Generators Service Guide
Page 25
Troubleshooting Assembly–Level Problems
Troubleshooting
Brightness
The A2 Display brightness can be adjusted from 50 (high brightness) to 1 (low brightness) using the RPG, arrow keys,
or the numeric keypad.
Other display features located under the
Utility > Display softkey, include a screen saver and inverse video.
Display Tests
The following two screen tests are available for the LCD:
• the Black Pixel Screen Test turns the display dark
• the White Pixel Screen Test turns the display bright
Softkey Location:
Utility > Display > More (1 of 2)
To exit the test, press any front panel key.
Symptom: Dark display
1. Ensure that the front panel green power on LED is on. If not, refer to “Power Supply Troubleshooting” on
page 1- 14.
2. Press any front panel key to disable the screen saver.
3. If the display is still bad, check P12 on the A31 Motherboard for the following signals:
SignalState
P12−15.2 Vdc
P12−3 LIGHT_EN>3 Vdc
P12−4 VDISPBrightness = 50, VDSP < 50 mV
Brightness = 1, VDSP = 3 Vdc
• If the 5.2 Vdc line is bad, refer to “Power Supply Troubleshooting” on page 1- 14.
• If either the LIGHT_EN or VDISP are bad, check them at P221−16 and P221−55 respectively on the
A31 Motherboard. If either signal is bad at P221, replace the A18 CPU.
• If all the above signals are good, check the output of the dc to ac inverter as follows:
a. Remove the front panel from the frame, and lay the front panel face down.
b. With CN2−1 open, there is typically a 160 Vrms 40 kHz signal. If not, replace the dc to ac inverter.
If the signal is there, replace the LCD.
Symptom: Bright display without characters
1. Ensure that the front–panel green power on LED is on. If not, refer to “Power Supply Troubleshooting” on
page 1- 14.
2. Try adjusting the contrast controls.
3. Check the connection of the ribbon cable at J9 of the power switch/flat panel interface board.
4. If the display is still too bright, use an oscilloscope to check P11 of the A31 Motherboard for the following signals:
The pulse state signals are control lines, clock, and data for the LCD.
Figure 1-1Pulsing Activity
5. If all the signals measured in Step 4 are good, go to Step 6.
If any of the signals measured in Step 4 are bad, check the following signals at P221 of the motherboard:
SignalState
P221−14 VLCDapproximately 21 Vdc
P221−53 LCD_ENABLE_H>3 Vdc
P221–1 to 13, 15, 41, 43, 45, 47, 49 to 52Refer to Figure 1- 1 on page 12.
If any of these signals are bad, change the CPU board.
6. If all the signals measured in Step 4 are good, check the following signals at J9 of the power switch. To access J9
the front panel must be removed from the chassis frame and laid face down.
SignalState
J9−7 VLCDapproximately 21 Vdc
J9−4 LCD_ENABLE_H>3 Vdc
J9−55.2 Vdc
J9−1, 2, 3, 8 to 15Refer Figure 1- 1 on page 12.
If these signals are good, replace the LCD.
1-12
E8257D/67D, E8663D PSG Signal Generators Service Guide
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Troubleshooting Assembly–Level Problems
Troubleshooting
If these signals are not good, replace the power switch/flat panel interface board.
Symptom: Hardkeys or softkeys do not work
The A1 Keyboard contains the hardkeys and softkeys switches. The keys are arranged in a matrix (shown below) with
the control lines KEYCOLx and KEYROWx on the x and y axis. When you press a hardkey or softkey, one cell of the
matrix is activated; the normally TTL low KEYROWx of the active cell pulses high, and the normally TTL high
KEYCOLx of the active cell pulses low.
KEYROW1 softkey 2Incr/SetCont Down AmplAmpl Menu Mode Setup Aux FctnFM/ϕΜ
KEYROW2 softkey 1UpN/AFreqSweep List ModeMuxAM
KEYROW3 sof tkey 4N/AN/ARight ArrowHelpSaveRecallTrigger
KEYROW4 softkey 6N/ALocalHoldMod On/Off 456
KEYROW5 sof tkey 5N/AReturnDown ArrowN/A789
KEYROW6 N/AN/AN/ALeft Arrow RF On/Off0.+/-
KEYROW7 sof tkey 7N/APresetN/AN/A123
1. Ensure that the front panel green power on LED is on. If it is not on, refer to “Power Supply Troubleshooting” on
page 1- 14.
2. To ensure the signal generator is not being controlled remotely, press the
Local hardkey.
3. Use an oscilloscope to monitor the KEYCOLx and KEYROWx pins of the key that is not working at P13 on the
motherboard. Use the following table to identify the appropriate pin number:
KEYCOL pins should be a TTL highKEYROW pins should be a TTL low
KEYCOL0P13–1KEYROW0P13–17
KEYCOL1P13–3KEYROW1P13–19
KEYCOL2P13–5KEYROW2P13–21
KEYCOL3P13–7KEYROW3P13–23
KEYCOL4P13–9KEYROW4P13–25
KEYCOL5P13–11KEYROW5P13–26
KEYCOL6P13–13KEYROW6P13–24
KEYCOL7P13–15KEYROW7P13–22
4. If either signal is incorrect, use the following table and check the signal at P221, as it leaves the CPU board. If the
signal is bad at P221, replace the A18 CPU.
KEYCOL pins should be a TTL highKEYROW pins should be a TTL low
KEYCOL0P13–1KEYROW0P13–17
KEYCOL1P13–3KEYROW1P13–19
KEYCOL2P13–5KEYROW2P13–21
KEYCOL3P13–7KEYROW3P13–23
KEYCOL4P13–9KEYROW4P13–25
KEYCOL5P13–11KEYROW5P13–26
KEYCOL6P13–13KEYROW6P13–24
KEYCOL7P13–15KEYROW7P13–22
5. If both signals are correct, press the faulty hardkey or softkey while monitoring the KEYCOL or KEYROW on the
oscilloscope. The KEYCOL line should pulse low; the KEYROW line should pulse high.
If either line does not function properly, replace the front panel board.
E8257D/67D, E8663D PSG Signal Generators Service Guide
1. Ensure that the front panel green power on LED is on. If it is not on, refer to “Power Supply Troubleshooting” on
page 1- 14.
2. Check the front panel operation by checking random hardkey operation.
3. Check P13–12 for +5.2 Vdc. If the voltage is not present, refer to “Power Supply Troubleshooting” on page 1- 14 for
troubleshooting.
4. Press the Frequency hardkey on the front panel.
5. Using an oscilloscope, monitor P13–14 and P13–10 while rotating the RPG knob. The LCD frequency value should
change, and both signals at P13 should pulse to a TTL high. If either signal does not pulse, replace the
A1 Keyboard.
6. If the signals pulse at P13, check the signal at P221 pins 57 and 17 of the motherboard. If the signals pulse at
P221, replace the CPU board.
Symptom: Screen saver not working properly
The screen saver delay can be set for any integer from 1 to 12 hours. The CPU board controls the screen saver by
pulling the LIGHT_EN line low.
1. If the delay time elapses and the display does not go dark, check the LIGHT_EN signal at P12–3.
• If the signal is a TTL low, replace the dc to ac inverter.
2. If the signal is a TTL high, check it at P221–16 of the motherboard.
• If the signal is high at P221, replace the CPU board.
Power Supply Troubleshooting
The power supply is a switching supply with automatic line–voltage and frequency selection. Because of this, a switch
is not required to set 115 VAC or 240 VAC operation. The input power line is fused, but the fuse is not replaceable; if
the fuse opens, you must replace the power supply.
NOTEFor the E8267D, if the red PS–FAULT LED is off (see Figure 1-5), troubleshoot the power supply.
WARNINGAfter unplugging the instrument, wait 30 seconds to allow the supplies to discharge before removing
or installing an assembly.
Tables 1- 5 through 1-7 list the motherboard test points (connector and pin number) and power supply voltages for the
E8257D. See Figure 1- 2 on page 21 for connector locations.
Tables 1- 8 through 1- 12 list the motherboard test points (connector and pin number) and power supply voltages for
the E8267D, beginning on page 1- 17. See Figure 1- 3 on page 22 for connector locations.
Table 1-5 E8257D/E8663D Power Supply vs. Assembly Matrix (1 of 3)
Motherboard test points:+32 Vdc+15 Vdc+10 Vdc+8 Vdc+9 Vdc+5.2 Vdc
A1 KeyboardP13–12
A2 DisplayP11–44
A3 Power SupplyP231–1, 41 P231–3, 4,
A5 SamplerP22–7P22–6, 21P22–20, 5P22–14, 29
A6 Frac–NP32–7P32–6, 21P32–20, 5P32–14, 29
A7 ReferenceP42–7P42–6, 21P42–20, 5P42–14, 29
43, 44
P231–6, 7, 46,
47
P231–15, 16,
18, 19, 55, 56,
58, 59
A8 OutputP52–7P52–6, 21P52–20, 5P52–14, 29
A9 YIG DriverP112–6P112–5, 30P112–15, 16,
1-14
40
P112–17, 18, 42P112–3, 28
E8257D/67D, E8663D PSG Signal Generators Service Guide
Page 29
Troubleshooting Assembly–Level Problems
Table 1-5 E8257D/E8663D Power Supply vs. Assembly Matrix (1 of 3)
Motherboard test points:+32 Vdc+15 Vdc+10 Vdc+8 Vdc+9 Vdc+5.2 Vdc
E8257D/67D, E8663D PSG Signal Generators Service Guide
Page 37
Troubleshooting Assembly–Level Problems
Troubleshooting
Symptom: amber standby LED not working properly
With the instrument plugged in and the power turned off, the front panel amber standby LED should be on, as well
as the green +15 Standby LED on the motherboard. This is controlled by the +15 Standby line supplied by the power
supply, which is routed via the motherboard to the front panel.
To troubleshoot, turn the instrument off and follow the signal path.
Symptom: front panel green LED not working properly
When the front panel power switch is turned on, the amber LED should go out and the green LED should come on.
Also, the fan should start rotating and the front panel display should illuminate.
Troubleshooting:
• Verify the supply voltages at P11 of the A31 Motherboard.
• If the supply voltages are correct, replace the Power Switch/Flat Panel Interface Board.
Symptom: fan not working
The fan is connected to the motherboard, and is audible when the instrument is on. The fan voltage is +14V.
To troubleshoot, verify that all supplies are working; disconnect the fan from the rear panel assembly at P6 and check
the fan voltage at P6–2. If the fan voltage is correct, replace the fan.
Symptom: Instrument does not power up; power supply LEDs not on
Checking Power Supplies
Each of the power supplies has an LED on the bottom of the motherboard (see Figure 1- 4 on page 25 and Figure 1- 5
on page 26). When the power supply is functioning, the green LED lights. Use a DVM to measure the supplies on the
motherboard, and ensure they meet the following power supply specifications.
Table 1-13 E8257D Supply Voltage Specifications
Supply
Vol tage
+3232 ± 1.010+5.2VDF5.2 ± 0.1510
+1515 ± 0.510+3.4 VD 3.4 ± 1.010
+15 Standby15 ± 0.7520–5.2–5.2 ± 0.110
+1010.2 ± 0.210–6–6 ± 0.1210
+99 ± 0.1810–7–7 ± 0.110
+88 ± 0.510–15–15 ± 0.510
+5.25.2 ± 0.1510
Table 1-14 E8267D Supply Voltage Specifications
Supply
Vol tage
+3232 ± 0.9610+1.95 VD_11.95 ± 0.0610
+1515 ± 0.4510+1.95 VD_21.95 ± 0.0610
+15 Standby15 ± 0.4520+1.8 VD_11.8 ± 0.0510
+1010 ± 0.310+1.8 VD_21.8 ± 0.0510
+99 ± 0.1810–5.2 –5.2 ± 0.110
+88 ± 0.510–5.2 V2–5.2 ± 0.1610
+5.25.2 ± 0.1610–6.0–6 ± 0.1210
Acceptable
Vol tage
(Vdc)
Acceptable
Vol tage
(Vdc)
Maximum
Ripple
(mVpp)
Maximum
Ripple
(mVpp)
Supply
Vol tage
Supply
Vol tage
Acceptable
Vol tage
(Vdc)
Acceptable
Vol tage
(Vdc)
Maximum
Maximum
Ripple
(mVpp)
Ripple
(mVpp)
E8257D/67D, E8663D PSG Signal Generators Service Guide
If a supply LED is not lit, or a measured voltage is less than the acceptable value, an assembly may be loading down
that supply. Using the appropriate Power Supply vs. Assembly Matrix, determine where each supply is used, then use
the following steps to isolate the defective assembly.
CAUTIONRemove a minimum number of assemblies at one time. If the power supply does not have a minimum
load on it, the supply voltage increases to an overvoltage condition.
1. Turn off the instrument and remove one of the assemblies biased by the faulty supply.
2. Turn the instrument on and check the faulty supply. If the supply LED lights, replace the assembly removed in
Step 1. If not, continue with Step 3.
3. Turn the instrument off and reinstall the assembly removed in Step 1. Remove the next assembly and see if the
supply LED lights. Continue this process until the supply functions properly.
4. Replace the last assembly that you removed.
1-24
E8257D/67D, E8663D PSG Signal Generators Service Guide
Page 39
Figure 1-4 E8257D Motherboard Power Supply LEDs
DS101
DS103
DS104
DS112
DS113
DS102
DS109
DS100
DS110
DS111
DS106
DS105
+9V
+8V
–6V
–5.2V
+5.2VDF
+3.4VD
+15VSTBY
+32V+15V
+10V
–7V
–15V
+5.2V
DS107
Troubleshooting Assembly–Level Problems
Troubleshooting
E8257D/67D, E8663D PSG Signal Generators Service Guide
E8257D/67D, E8663D PSG Signal Generators Service Guide
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Troubleshooting Assembly–Level Problems
Troubleshooting
Power Switch On/Off Line
If the control line (ON/OFF) from the A3 Power Switch located in the front panel assembly goes to a TTL low state,
or if the line impedance is less than 500 ohms, the power supply shuts down. This signal can be measured on the
A31 Motherboard at pin 79 of P241.
To troubleshoot:
1. Turn the front panel switch on and ensure that the +15 Standby is good.
2. Verify that the ON/OFF control line is > 3.5 Vdc.
The Power Switch/Flat–Panel Interface Board in the front panel assembly controls this signal.
Symptom: Green front panel LED and power supply LEDs on motherboard blinking
Overvoltage or Overcurrent
The individual supplies in the instrument are not fused, but an overvoltage or overcurrent condition can shut them
down. With either of these conditions, the front panel green LED and the power supply LEDs blink at approximately
2 Hz. The power supply tries to revive, but if the condition does not clear, the instrument stays in this mode. In some
cases, cycling power fixes the problem.
To troubleshoot, use the following steps to isolate the defective assembly:
CAUTIONRemove a minimum number of assemblies at one time. If the power supply does not have a minimum
load on it, the supply voltage increases to an overvoltage condition.
NOTERefer to the Power Supply vs. Assembly matrix tables, starting on page 1- 15, for help in determining which
assembly uses which power supplies.
1. Turn off the instrument and remove one of the assemblies biased by the faulty supply.
2. Turn the instrument on and check whether the overvoltage or overcurrent condition still exists. If it does not,
replace the assembly removed in Step 1. If it does, continue with Step 3.
3. Turn the instrument off and reinstall the assembly removed in Step 1. Remove the next assembly and see if that
fixes the problem. Continue this process until the supply functions properly.
4. Replace the last assembly that you removed.
Symptom: Amber front panel LED blinking
Thermal shutdown
With thermal shutdown, the front panel green LED and the power supply LEDs blink as long as the condition exists.
There are two temperature sensing devices in the instrument: one on the A8 Output, and one on the A19 Power
Supply.
To troubleshoot:
1. If the instrument is hot, ensure that the fan is working and let the instrument cool off.
2. If the instrument still shuts down, remove the Output assembly.
3. If the instrument still shuts down, replace the Power Supply.
or
If the instrument powers on, but the amber LED continues to blink, replace the A3 Power Switch assembly.
Symptom; +9, –6, or –5.2 V LEDs not on
These supplies are generated on the YIG Driver Assembly.
Troubleshoot using the Power Supply vs. Assembly Matrix that begins on page 1- 14.
1. At P112 of the Motherboard, ensure the YIG Driver Assembly is receiving the +32, +15, +10, –7, –15 Vdc supplies.
2. If the supplies are present at P112, note in the matrix where each supply is used.
3. Power down the instrument and remove one of the assemblies that is biased by the faulty supply.
E8257D/67D, E8663D PSG Signal Generators Service Guide
4. Power the instrument up again and check the faulty supply. If it is still bad, power down and re–install the first
assembly removed.
5. Remove the next assembly and see if that fixes the problem. Continue this process until the supply functions
properly.
6. Replace the last assembly that you removed.
Symptom: +1.95 VD, +1.8 VD LEDs not on
These supplies are generated by voltage regulators on the A31 Motherboard.
Troubleshoot by checking the following voltages at the A19 Power Supply:
• +3.4 VD, which is regulated down to +1.95 VD
• +2.6 VD, which is regulated down to +1.8 VD
If the supplies are good at the A19 Power Supply, replace the A31 Motherboard.
Option 008/009 Troubleshooting
Removable flash memory operation requires a license key, a compact flash drive, and a flash memory card. The flash
drive communicates directly to the A18 CPU through a ribbon cable.
NOTEA flash memory card must be installed for the firmware to report Option 008/009 in the instrument.
1. Verify the flash memory card is installed.
2. Power the instrument on.
3. Check to see if Option 008 or 009 is installed in the instrument, press
4. Verify the green LED to the right of the A41 Compact Flash Door, on the instrument rear panel, turns on and off
during the instrument boot- up.
5. If the green LED light does not turn on and off or Option 008/009 is not listed as an installed option,
a. Replace the flash memory card.
b. Repeat steps 2 thru 4.
6. If the green LED light still does not turn on and off or Option 008/009 is still not listed as an installed option,
a. Replace the A40 Compact Flash Drive.
b. Repeat steps 2 thru 4.
7. If the green LED light still does not turn on and off or Option 008/009 is still not listed as an installed option,
a. Replace the A18 CPU
b. Run the required performance test for the A18 CPU, see Chapter 4, “Post–Repair Procedures.”
c. Repeat steps 2 thru 4.
Utility > Instrument Info > Diagnostic.
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E8257D/67D, E8663D PSG Signal Generators Service Guide
Use an oscilloscope to check A13 I/Q Multiplexer output.
1. Disconnect the cable from A13J10.
2. Probe A13J10 while executing self test 111, for a square wave, 300 ms at +0.7V and 300 ms at –0.7V.
• If a square wave is not present on A13J10, replace the A13 I/Q Multiplexer board.
• If a square wave is present at A13J10, continue to step 3.
3. Reconnect the cable to A13J10.
4. Disconnect the cable from A31J1052.
5. Probe A31J1052 while executing self test 111, for a square wave on the center pin, 300 ms at +0.7V and 300 ms at
–0.7V.
• If a square wave is not present on A31J1052, replace the W132 cable.
• If a square wave is present at A31J1052, replace the A8 Output board.
6. Disconnect the cable from A13J9.
7. Probe A13J9 while executing self test 111, for a square wave, 300 ms at +0.7V and 300 ms at –0.7V.
• If a square wave is not present on A13J9, replace the A13 I/Q Multiplexer board.
• If a square wave is present at A13J9, continue to step 3.
8. Disconnect the cable from A31J1053.
9. Probe A31J1053 while executing self test 111, for a square wave on the center pin, 300 ms at +0.7V and 300 ms at
–0.7V.
• If a square wave is not present on A31J1053, replace the W131 cable.
• If a square wave is present at A31J1053, replace the A8 Output board.
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Self–Tests 2xx: A5 Sampler Self–Test Errors
Troubleshooting Assembly–Level Problems
Troubleshooting
Before proceeding to the reported self–test error code, check the following voltages. If any voltages are out of
specification, troubleshoot the supply problem first.
Supply Voltage
(Vdc)
+32 P22–7+31.04+32.96Main Supply
+15 P22–6, 21+14.55+15.45Main Supply
–15P22–2, 17–14.55–15.45Main Supply
+5.2P22–14, 29+5.04+5.37Main Supply
+9P22–5, 20+8.82+9.18YIG Driver
Connector PinsMinimum Value
(Vdc)
Maximum Value
(Vdc)
Origin
200 Power Supply
1. If the supply voltages are good on the connector pins indicated, replace the A5 Sampler.
2. If the supply voltages are bad on any of the connector pins indicated, check the origin of the supply.
3. If the supply voltages are good at the origin, replace the A31 Motherboard.
4. If the supply voltages are bad at the origin, troubleshoot the problem using that assembly’s troubleshooting
procedure.
201 Tuning + Bias Test
1. Turn power off and remove the A5 Sampler and connect a signal analyzer to the A5 Sampler J1 input cable on the
A31 Motherboard.
2. Turn the signal generator on and check for the presence of a 1 GHz signal at the level of 0 dBm.
3. If the signal is good on the cable connector J1, replace the A5 Sampler.
E8257D/67D, E8663D PSG Signal Generators Service Guide
4. If the signal is bad, remove the A7 Reference and ohm the cable between the center pins (a short should occur)
and between the center pins and shielding (an open should occur) of J3 on the A7 Reference and J1 on the
A5 Sampler.
5. If an open is measured between the center pins or a short between center pins and the shielding, replace the
cable.
6. If the cable is good, replace the A7 Reference.
202 Coarse Loop Detector
1. Replace the A5 Sampler
203 YO Loop Detector
1. With power on carefully remove the A5 Sampler, connect a signal analyzer to J3 on the A31 Motherboard. Set the
signal generator to 8 GHz CW then check for an 8 GHz signal at a power level greater than or equal to –7 dBm on
J3.
2. If the J3 signal is bad, troubleshoot the A29 20 GHz Doubler using the procedure in the RF path section. If the J3
signal is good, go to the next step.
3. Connect the signal analyzer to the A6 Frac–N VCO signal on the J6 connection on the A31 Motherboard. With the
signal generator set to 8 GHz CW, the A6 Frac–N signal should be at a frequency of 593.75 MHz and at a power
level of +7 dBm.
4. If the signal is good, replace the A5 Sampler, if the signal is bad go to the A6 Frac–N troubleshooting procedure.
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Troubleshooting Assembly–Level Problems
Troubleshooting
Self–Tests 3xx: A7 Reference (Standard) Self–Test Errors (For instruments with serial prefixes < US4805/MY4805)
Before proceeding to the reported self–test error code, check the following voltages. If any of the voltages are out of
specification, troubleshoot the supply problem first.
Supply Voltage
(Vdc)
+32 P102–7+31.04+32.96Main Supply
+15 P102–6, 21+14.55+15.45Main Supply
–15P102–2, 17–14.55–15.45Main Supply
+5.2P102–14, 29+5.04+5.37Main Supply
+9P102–5, 20+8.82+9.18YIG Driver
Connector PinsMinimum Value
(Vdc)
Maximum Value
(Vdc)
Origin
300 1 GHz Detector
1. Check and remove any connection to the 10 MHz external reference on the rear panel.
2. If the signal generator continues to fail self–test, replace the A7 Reference.
301 Tuning Voltage
1. Replace the A7 Reference.
E8257D/67D, E8663D PSG Signal Generators Service Guide
Before proceeding to the reported self–test error code, check the following voltages. If any voltages are out of
specification, troubleshoot the supply problem first.
Supply Voltage
(Vdc)
+15P52–6, 21+14.55+15.45Main Supply
−15 P52–2, 17−15.45−14.55Main Supply
+5.2P52–14, 29+5.04+5.36Main Supply
+9P52–5, 20+8.82+9.18YIG Driver
−6P52–3, 18−6.12−5.88YIG Driver
Connector PinsMinimum Value
(Vdc)
Maximum Value
(Vdc)
Origin
400 Lowband Ground and PTAT Test
• Replace A8 Output.
401 Prelevel Loop Test
1. With the signal generator powered up, carefully remove the A8 Output.
2. Set the signal generator to 3 GHz CW.
3. Using a spectrum analyzer measure the A6 Frac–N RF output at J4 of the A8 Output.
The signal at J4 should be at 3 GHz and ≥0 dBm.
• If the signal is not present, or is not at the correct level, replace the A6 Frac–N.
• If the signal is present, replace the A8 Output.
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Troubleshooting Assembly–Level Problems
Troubleshooting
WARNINGDo not re–install the A8 Output with the signal generator turned on, or serious damage to the signal
generator can result.
402 Quadrature DAC Test
• Replace the A8 Output.
403 VBLO Test
• Replace the A8 Output.
404 Marble Test
1. Measure the Q signal from the A13 I/Q Multiplexer:
a. Disconnect the cable from J1052 A31 Motherboard and connect it to a DVM.
b. Set the CW frequency to 2 GHz.
c. Turn on the I/Q modulation, and make the Q offset the active function:
1. Press the
2. Select
I/Q hardkey.
I/Q On > I/Q Adjustments > I/Q Adjustments On > Q Offset
d. As you rotate the RPG, the voltage displayed on the DVM should vary from approximately +0.25 Vdc for an
offset of 50%, to approximately −0.25 Vdc for an offset of −50%.
If the signal is bad, check it at J10 of the A13 I/Q Multiplexer.
• If the signal is bad at J10, refer to the A13 I/Q Multiplexer troubleshooting, on page 1- 29.
• If the signal is good at J10, change the cable.
2. Measure the I signal from the A13 I/Q Multiplexer:
a. Reconnect the cable removed in Step 1
b. Disconnect the cable from J1053 A31 Motherboard and connect it to the DVM.
c. Leave the I/Q modulation on, and make the I offset the active function.
d. As you rotate the RPG, the voltage displayed on the DVM should vary from approximately +0.25 Vdc for an
offset of 50%, to approximately −0.25 Vdc for an offset of −50%.
If the signal is bad, check it at J9 of the A13 I/Q Multiplexer.
• If the signal is bad at J9, refer to the A13 I/Q Multiplexer troubleshooting, on page 1- 29.
• If the signal is good at J9, change the cable.
3. If both the I and Q signals are good, reconnect the cable removed in Step 2 Check the signals at the A8 Output
board.
a. At J53–8, repeat the Q offset check in Step 1
• If the signal is good, replace the A8 Output board.
• If the signal is bad, replace the A31 Motherboard.
b. At J53–19, repeat the I offset check in Step 2
• If the signal is good, replace the A8 Output board.
• If the signal is bad, replace the A31 Motherboard.
405 Gain Adjustment Test
• Replace the A8 Output.
406 Prelevel Bypass Test
• Replace the A8 Output.
407 Switched Filters Test
• Replace the A8 Output.
E8257D/67D, E8663D PSG Signal Generators Service Guide
Measure the 1 GHz signal from the A7 Reference board:
1. Turn on the signal generator.
2. Set CW = 200 MHz.
3. Using a spectrum analyzer, probe P51–19.
There should be a 1 GHz signal, that is >−30 dBm.
• If the signal is good, replace the A9 Output.
• If the signal is not good, run the A7 self–tests.
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Self–Tests 6xx: A9 YIG Driver Self–Test Errors
Troubleshooting Assembly–Level Problems
Troubleshooting
Before proceeding to the reported self–test error code, check the following voltages. If any are out of specification,
troubleshoot the supply problem first.
Supply
Vol tage
(Vdc)
+32 P112–6+31.04+32.96Main Supply
+15 P112–5, 30+14.55+15.45Main Supply
–15P112–4, 29–14.55–15.45Main Supply
+5.2P112–3, 28+5.04+5.37Main Supply
+10P112–15, 16, 40+10+10.4Main Supply
–7P112–11, 12, 13, 14, 38–6.86–7.14Main Supply
+5.2 Digital highP111–64, 65, 129, 130+5.04+5.36Main Supply
If any of the following voltages are out of specification, replace the A9 YIG Driver:
Supply Voltage
(Vdc)
+9 P112–17, 18, 42+8.82+9.18
–5.2P112–1, 2, 26, 27–5.1–5.3
–6P112–19, 44–5.88–6.12
Connector PinsMinimum Value
(Vdc)
Maximum Value
(Vdc)
600 Post Regulator
• Replace the A9 YIG Driver.
601 DACs
• Replace the A9 YIG Driver.
602 PLL Interface
1. Remove the cable that goes from the A5 Sampler to J4 on the A9 YIG Driver.
2. Loop self–test 602, and use an oscilloscope to measure the voltage on J4. The voltage should pulse to +10 Vdc.
• If the voltage is +10 Vdc, replace the A9 YIG Driver.
• If the voltage on J4 is bad, replace the A5 Sampler.
603 FM Driver
1. Remove the cable that goes from the A6 Frac–N to J3 on the A9 YIG Driver.
2. Loop self–test 603, and use an oscilloscope to measure the voltage on J3. The voltage should be approximately
–1.3 Vdc.
• If the voltage is approximately –1.3 Vdc, replace the A9 YIG Driver.
3. If the voltage is bad at J3, check it entering the A6 Frac–N at P31–11.
The voltage on J3 originates on the A11 Pulse/Analog Modulation Generator and passes through the A6 Frac–N.
• If the voltage is good entering the A6 Frac–N, troubleshoot the A6 Frac–N.
• If the voltage is bad at P31, troubleshoot the A11 Pulse/Analog Modulation Generator.
604 Sweep DACs
• Replace the A9 YIG Driver.
605 Sweep Lock
1. Using an oscilloscope with high input impedance, measure the center pin of J9 on the A9 YIG Driver.
Source SetupOscilloscope Setup
Start:5 GHz10 ms/div
Stop:10 GHz5V/div
Sweep:Freq1 MΩ
Sweep Time:Auto
Sweep Repeat: Continuous
A positive and negative going signal should be present.
• If the signal is present at J9, replace the A9 YIG Driver.
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Troubleshooting Assembly–Level Problems
2. If the signal is not present at J9, measure the center pin of J1032 on the motherboard.
• If the signal is present, replace the cable.
• If the signal is not present, replace the A6 Frac–N.
Self–Tests 7xx: A6 Frac–N Self–Test Errors
Troubleshooting
Before proceeding to the reported self–test error code, check the following voltages. If any voltages are out of
specification, troubleshoot the supply problem first.
Supply Voltage
(Vdc)
+32 P32–7+31.04+32.96Main Supply
+15 P32–6, 21+14.55+15.45Main Supply
–15P32–2, 17–14.55–15.45Main Supply
+5.2P32–14, 29+5.04+5.37Main Supply
+9P32–5, 20+8.82+9.18YIG Driver
–5.2P32–4,19–5.1–5.3YIG Driver
–6P32–3, 18–5.88–6.12YIG Driver
Connector PinsMinimum Value
(Vdc)
Maximum Value
(Vdc)
Origin
700 Ref Voltage
• Replace the A6 Frac–N.
701 Loop Gain
• Replace the A6 Frac–N.
E8257D/67D, E8663D PSG Signal Generators Service Guide
Before proceeding to the reported self–test error code, check the following voltages. If any voltages are out of
specification, troubleshoot the supply problem first.
Supply
Vol tage
(Vdc)
+32P122–4+31.04+32.96Main Supply
+15 P122–28+14.55+15.45Main Supply
–15P122–3–14.55–15.45Main Supply
+5.2P122–2, 27+5.04+5.37Main Supply
–5.2P122–1, 26+5.30+5.10YIG Driver
+5.2 Digital highP121–64, 65, 129, 130+5.04+5.36Main Supply
1-42
Connector PinsMinimum
Val ue
(Vdc)
Maximum
Val ue
(Vdc)
E8257D/67D, E8663D PSG Signal Generators Service Guide
Self–Tests 10xx: A7 Reference (Option UNR/UNX and Instruments with Serial Prefixes >= US4805/MY4805)
Self–Test Errors
Before proceeding to the reported self–test error code, check the following voltages. If any voltages are out of
specification troubleshoot the supply problem first.
Supply Voltage
(Vdc)
+15 P42–6, 21+14.55+15.45Main Supply
–15P42–2, 17–14.55–15.45Main Supply
+9P42–5, 20+8.82+9.18YIG Driver
Connector PinsMinimum Value
(Vdc)
Maximum Value
(Vdc)
Origin
1000 Power Supply
• Replace the A7 Reference.
1001 10 MHz Test
1. Using an oscilloscope, check P41–2 for a 10 MHz signal greater than 1.12 V
. If the signal is present, replace the
p–p
A7 Reference.
2. If the signal is not present, the problem could be the 10 MHz Reference or the signal path from the 10 MHz
Reference.
3. Check the 10 MHz reference oscillator output signal.
a. If the 10 MHz signal is not present on the output port, measure the 10 MHz power supply voltages on the rear
panel interface board. The following voltages should be observed:
•Pin 1 ground
• Pin 2 +12V
•Pin 3 ground
• Pin 4 a positive DC voltage around +3.8V should be present (oven cold raw voltage may vary).
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Troubleshooting Assembly–Level Problems
Troubleshooting
b. If the power supply voltages are good, replace the 10 MHz reference.
c. If the power supply voltages are bad, replace the rear panel interface board.
4. If the 10 MHz signal is present out of the reference oscillator, but not on the A31 mother board at P41–2,
reconnect the cable going to the 10 MHz signal.
a. Measure the end of the cable going to the A31 mother board at J1041.
b. If the signal is bad, replace the cable.
c. If the signal is good, go to Step 5.
5. Measure the ohmic resistance between the J1041 center pin and P41–2 and the J1041 center pin to ground.
a. If the trace is open or shorted to ground, replace the A31 mother board.
b. If the J1041 is not shorted to ground and the J1041 to P41–2 is not open, remove the A7 board and measure
P41–2.
c. If the signal is now present, replace the A7 board.
d. If the signal is still missing, replace the A31 mother board.
1002 1 GHz Test
• Replace the A7 Reference.
Self–Tests 11xx: A18 CPU Self–Test Errors
E8257D/67D, E8663D PSG Signal Generators Service Guide
The A18 CPU self–test verifies the presence of the supplies listed. These supplies are not checked during the turn–on
check and are not necessary for the turn–on check to pass.
1. After running self–test, View
Details and see which supply failed.
2. If the 10 VRef has failed, replace the A18 CPU. The 10 VRef is generated on the A18 CPU and used for the ADC
circuit.
3. For a self–test failure other than the 10 VRef, measure the appropriate connector pin listed in the following table.
Connector P223Supply VoltageVoltage Range
Pin 1–5.2 Vdc–5.2 ±.1 Vdc
Pin 17–6 Vdc–6 ±.12 Vdc
Pin 18 +9 Vdc+9 ±.18 Vdc
4. If the voltages are present on the A31 Motherboard, turn power off, remove the A18 CPU and inspect the
connector. If the pins look good, replace the A18 CPU.
5. If a supply voltage is not present on the connector, measure the appropriate point listed in the following table:
Connector P112Supply VoltageVoltage Range
Pin 1, 2, 26, 27–5.2 Vdc–5.2 ± 0.1 Vdc
Pin 19, 44–6 Vdc–6 ± 0.12 Vdc
Pin 17, 18, 42+9 Vdc+9 ± 0.18 Vdc
6. If the voltage is present on P112 but not present on P223, replace the A31 Motherboard.
7. If the voltages are not present on P112, troubleshoot the A9 YIG Driver.
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Troubleshooting Assembly–Level Problems
Troubleshooting
Before proceeding to the reported self–test error code, check the following voltages in. If any of these voltages are out
of specification, troubleshoot the supply problem first.
• If the power level in both paths is bad, check the signal levels out of the A28 YIG Oscillator.
1202 A29 20 GHz Doubler
1. Disconnect the cable between the A28 YIG Oscillator and the A29 20 GHz Doubler, and connect a spectrum
analyzer to the cable.
2. Tune the source frequency across the A28 YIG Oscillator range (3.2 GHz to 10 GHz) noting the lowest power level.
3. Determine the expected levels using the tools described in “Troubleshooting RF Power Levels” on page 1-75, and
compare them to the measured levels.
• If the power level is good, replace the A29 20 GHz Doubler.
• If the power level is bad, replace the A28 YIG Oscillator.
1203 40 GHz Doubler (Option 540)
1. Disconnect the 0 to 20 GHz cable between the A30 Modulation Filter and the A27 40 GHz Doubler, and connect a
spectrum analyzer to the cable.
2. Tune the source from 250 kHz to 20 GHz, and record the lowest power level.
3. Disconnect the 10 to 20 GHz cable that comes from the A30 Modulation Filter, and connect the spectrum analyzer
to this cable.
4. Tune the source from 20 GHz to 40 GHz, recording the lowest power level.
5. Determine the expected levels using the tools described in “Troubleshooting RF Power Levels” on page 1-75, and
compare them to the measured levels.
• If both power levels are good, replace the A27 40 GHz Doubler.
• If either power level is bad, troubleshoot the path.
1204 RF Path
This test checks for a dc voltage on the A10 ALC from the A23 Lowband Coupler/Detector and
A24 Highband Coupler and A25 Highband Detector.
1. Connect a spectrum analyzer to the RF output of the signal generator.
2. Turn the RF power on and verify the presence of an RF signal on the output.
• If no RF signal is present, troubleshoot the RF path problem (see “Troubleshooting the RF Path” on page 1- 75).
3. If an RF signal is present on the RF output, set the signal generator to 4 GHz and 0 dBm.
4. Measure the dc voltage on the cable going to J3 of the A10 ALC. The signal should be > –600 mV.
• If the signal at J3 is good, go to step 6.
5. If no dc signal is present on the cable to J3, check the output at the highband detector.
• If the signal is good at the detector, replace the cable.
• If no signal is present at the output of the highband detector, replace the highband detector.
6. If the signal at J3 is good, set the signal generator’s frequency to <1 GHz, the power to 0 dBm, and measure the
dc voltage on the cable going to J5 on the A10 ALC.
• If the dc voltage is –5.25 Vdc, replace the A10 ALC.
7. If other dc voltages are present, check for dc voltage on the output of the lowband detector.
• If a dc voltage is present, replace the cable.
• If no dc voltage is present, replace the lowband detector.
1205 LB Pulse Mod
Lowband Pulse On
1. Disconnect the cable from J5 of A10 ALC, and connect the cable to a DVM (this is the lowband detector output).
2. On the signal generator, set the following:
Center Frequency: 3 GHz
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Troubleshooting Assembly–Level Problems
Troubleshooting
Power: +20 dBm
Pulse Modulation: On
Period: 40s
Pulse Width: 10 ns
RF: On
3. The voltage measured by the DVM should be approximately 0V. If it is not, use an oscilloscope to view P131–6 of
the A31 Motherboard (this is the pulse signal out of the A11 Pulse/Analog Modulation Generator).
Change the pulse period to 1 ms and the pulse width to 500 μs.
• If the pulse is not present, perform the A11 Pulse/Analog Modulation Generator self–test, and follow the
troubleshooting procedure.
4. If pulse modulation is working, perform the A8 Output self–test.
• If the self–test passes, refer to “Troubleshooting the RF Path” on page 1- 75, and check the lowband path.
• If the self–test fails, refer to the A8 Output test troubleshooting.
Lowband Pulse Off
1. Disconnect the cable from J5 of A10 ALC, and connect the cable to a DVM (this is the lowband detector output).
2. On the signal generator, set the following:
Center Frequency: 3 GHz
Power: +20 dBm
Pulse Modulation: On
Period: 40s
Pulse Width: 39.9s
RF: On
3. The voltage measured by the DVM should be approximately −2.2 V. If it is not, use an oscilloscope to view P131–6
of the A31 Motherboard (this is the pulse signal out of the A11 Pulse/Analog Modulation Generator).
Change the pulse period to 1 ms and the pulse width to 500 μs.
• If the pulse is not present, perform the A11 Pulse/Analog Modulation Generator self–test, and follow the
troubleshooting procedure.
4. If pulse modulation is working, perform the A8 Output self–test.
• If the self–test passes, refer to “Troubleshooting the RF Path” on page 1- 75, and check the lowband (<3.2 GHz)
path.
• If the self–test fails, refer to the A8 Output test troubleshooting.
1208 Quadraplier
1. If the power supplies +15V, −15V, −3V, −5.2V, +6.5V, +3.5V, or −3V fail, refer to the table on page 1- 47, and check
the supplies used by the A35 I/Q Modulator as they leave A26 MID connector.
If the signals are good at the A26 MID connector, replace the A36 Quadraplier.
2. If the TC902, TC956 or any of the drain currents fail (test indexes 6 through 24), replace the A36 Quadraplier.
3. If self–test 20–40 GHz Prelevel, index 25, fails:
a. On the signal generator, set the following:
Center Frequency: 30 GHz
Power: −20 dBm
RF: On
b. Remove the cable from J6 of the Quadraplier Bias Board and connect it to a DVM.
c. The signal should measure approximately +5.2 Vdc.
1. If the signal is bad, troubleshoot the RF path.
2. If the signal is good, replace the A36 Quadraplier.
4. If self–test 20–40 GHz Prelevel, index 26, fails:
a. On the signal generator, set the following:
Center Frequency: 45GHz
E8257D/67D, E8663D PSG Signal Generators Service Guide
Before proceeding to the reported self–test error code, check the following voltages in. If any of these voltages are out
of specification, troubleshoot the supply problem first.
2. Turn the RF power on and verify the presence of an RF signal on the output.
• If no RF signal is present, troubleshoot the RF path problem (see “Troubleshooting the RF Path” on page 1- 75).
3. If an RF signal is present on the RF output, set the signal generator to 4 GHz and 0 dBm.
4. Measure the dc voltage on the cable going to J3 of the A10 ALC. The signal should be approximately –0.3 Vdc.
• If the signal at J3 is good, go to step 6.
5. If no dc signal is present on the cable to J3, check the output at the highband detector.
• If the signal is good at the detector, replace the cable.
• If no signal is present at the output of the highband detector, replace the highband detector.
6. If the signal at J3 is good, set the signal generator’s frequency to <1 GHz, the power to 0 dBm, and measure the
dc voltage on the cable going to J5 on the A10 ALC.
• If the dc voltage is approximately –2.2 Vdc, replace the A10 ALC.
7. If other dc voltages are present, check for dc voltage on the output of the lowband detector.
• If a dc voltage is present, replace the cable.
• If no dc voltage is present, replace the lowband detector.
1205 LB Pulse Mod
Lowband Pulse On
1. Disconnect the cable from J5 of the A10 ALC, and connect the cable to a DVM (this is the lowband detector
output).
2. On the signal generator, set the following:
Center Frequency: 3 GHz
Power: +20 dBm
Pulse Modulation: On
Period: 40s
Pulse Width: 10 ns
RF: On
3. The voltage measured by the DVM should be approximately 0V. If it is not, use an oscilloscope to view P131–6 of
the A31 Motherboard (this is the pulse signal out of the A11 Pulse/Analog Modulation Generator).
Change the pulse period to 1 ms and the pulse width to 500 μs.
• If the pulse is not present, perform the A11 Pulse/Analog Modulation Generator self–test, and follow the
troubleshooting procedure.
4. If pulse modulation is working, perform the A8 Output self–test.
• If the self–test passes, refer to “Troubleshooting the RF Path” on page 1- 75, and check the lowband path.
• If the self–test fails, refer to the A8 Output test troubleshooting.
Lowband Pulse Off
1. Disconnect the cable from J5 of the A10 ALC, and connect the cable to a DVM (this is the lowband detector
output).
2. On the signal generator, set the following:
Center Frequency: 3 GHz
Power: +20 dBm
Pulse Modulation: On
Period: 40s
Pulse Width: 39.9s
RF: On
3. The voltage measured by the DVM should be approximately −1.8 V. If it is not, use an oscilloscope to view P131–6
of the A31 Motherboard (this is the pulse signal out of the A11 Pulse/Analog Modulation Generator).
Change the pulse period to 1 ms and the pulse width to 500 μs.
1-52
E8257D/67D, E8663D PSG Signal Generators Service Guide
Page 67
Troubleshooting Assembly–Level Problems
Troubleshooting
• If the pulse is not present, perform the A11 Pulse/Analog Modulation Generator self–test, and follow the
troubleshooting procedure.
4. If pulse modulation is working, perform the A8 Output self–test.
• If the self–test passes, refer to “Troubleshooting the RF Path” on page 1- 75, and check the lowband (<3.2 GHz)
path.
• If the self–test fails, refer to the A8 Output test troubleshooting.
1206 20 GHz IQ Modulator
1. If the power supplies +8V AF, +2.5V AF, +9V AFSW, +12V AFSW, +15V VLIMF, or −15VSWBIAS fail, refer to the
tablepage 1- 50, and check the supplies used by the A35 I/Q Modulator as they leave the A26 MID connector.
• If the signals are good at the A26 MID connector, replace the A35 I/Q Modulator.
2. If the VD724 Doubler, test index 6, fails, replace the A35 I/Q Modulator.
3. If self–test TC672RF indexes 8, 9, 11, or 12 fail:
a. Remove the cable from J2 of the A29 20 GHz Doubler.
b. While measuring the signal at J2 with a spectrum analyzer, run self–test 1206. You should see a +20 dBm
signal at 5 GHz.
• If the signal is bad, troubleshoot the RF path.
• If the signal is good and TC672RF indexes 8, 11, or 12 have failed, replace the A35 I/Q Modulator.
• If the signal is good and TC672RF index 9 has failed, you must also check the I/Q signals from the A13 I/Q
Multiplexer:
1. Remove the cable from J6 (I) of the A35 I/Q Modulator, and connect it to an oscilloscope.
2. Execute a single 1206 self–test. The signal on the oscilloscope should pulse to approximately −0.5 Vdc
for approximately 500 ms.
— If the signal is bad, refer to the A13 I/Q Multiplexer troubleshooting.
3. If the signal is good, reconnect the cable to J6, remove the cable to J7 (Q), and connect this cable to the
oscilloscope.
4. Execute a single 1206 self–test. The signal on the oscilloscope should pulse to approximately
18 millivolts for approximately 500 ms.
— If the signal is bad, refer to the A13 I/Q Multiplexer troubleshooting.
— If both the I and Q signals are good, replace the A35 I/Q Modulator.
4. If self–test Quad Loop Integrator fails, replace the A35 I/Q Modulator.
1207 Upconverter
1. If the power supplies +6.5V or +5.2V fail, refer to the tablepage 1- 50, and check the supplies used by the
A37 Upconverter as they leave the A26 MID connector.
• If the signals are good at the A26 MID connector, replace the A37 Upconverter.
2. If any of the drain currents fail (test indexes 3 through 18), replace the A37 Upconverter.
3. If self–tests ALC (indexes 18 through 32) Vdet (indexes 24 through 26) fail:
a. On the signal generator, set the following:
Center Frequency: Value at which ACL or Vdet self–test failed (e.g. 20.01 GHz, 28.5 GHz, etc.)
Power: +20 dBm
RF: On
b. Disconnect A35–J24 and connect a spectrum analyzer to the A35 I/Q Modulator. This is the IF signal to the
A37 Upconverter.
c. For RF signals >20 GHz to 28.5 GHz, the IF signal is mixed with the LO to produce the downconverted RF
signal. The IF signal will range in frequency from 6.667 GHz to 9.50 GHz with an amplitude of >5 dBm.
• If the signal is bad, troubleshoot the A35 RF path.
• If the signal is good, reconnect A35–J24.
E8257D/67D, E8663D PSG Signal Generators Service Guide
d. On the A37 Upconverter, disconnect J5 and connect a spectrum analyzer to the cable coming from the
A27 40 GHz Doubler. This is the LO signal to the A37 Upconverter.
e. For RF signals >20 GHz to 28.5 GHz, the IF signal is mixed with the LO to produce the downconverted RF
signal. The LO signal will range in frequency from 26.667 GHz to 38 GHz and will be four times the IF
frequency. The amplitude of the LO signal should be >5 dBm.
• If the signal is bad, troubleshoot the A35 RF path.
• If the signal is good, reconnect A37–J5 and replace the A37 Upconverter.
f. For RF signals >28.5 GHz, the IF signal frequency is mixed with the LO to produce the upconverted RF signal.
The IF signal will range in frequency from 5.73 GHz to 8.82 GHz. The LO signal will range in frequency from
22.8 GHz to 38.2 GHz and will be four times the IF frequency. Repeat steps a through e, but with an RF signal
>28.5 GHz.
Before proceeding to the reported self–test error code, check the following voltages. If any of these voltages are out of
specification troubleshoot the supply problem first.
Supply Voltage
(Vdc)
+15 P132–28+14.55+15.45Main Supply
–15P132–3–14.55–15.45Main Supply
+5.2P132–2, 27+5.04+5.37Main Supply
–5.2P132–1, 26–5.3–5.1YIG Driver
+5.2 Digital highP131–64, 65, 129, 130+5.04+5.36Main Supply
+3.4 Digital LowP131–60, 61, 62, 63,
1-54
Connector PinsMinimum Value
125, 126, 127, 128
(Vdc)
+3.29+3.5Main Supply
Maximum Value
(Vdc)
E8257D/67D, E8663D PSG Signal Generators Service Guide
Origin
Page 69
1300 Power Supply
• Replace the A11 Reference.
1301 Internal Pulse Generator Clock
1. Using an oscilloscope, measure P131–91 for a 10 MHz signal at 3.5 V
• If the signal is good, replace the A11 Pulse/Analog Modulation Generator.
2. If the signal is bad, check P41–7.
• If the signal is good on P41–7, replace the A31 Motherboard.
• If the signal is bad on P41–7, replace the A7 Reference.
1302 Output
• Replace A11 Pulse/Analog Modulation Generator.
1303 Voltage Ref DAC
• Replace A11 Pulse/Analog Modulation Generator.
1304 20 GHz Pulse
• Replace A11 Pulse/Analog Modulation Generator.
1305 Not Used
pp
Troubleshooting Assembly–Level Problems
Troubleshooting
.
1306 Standard 3 GHz Pulse
• Replace A11 Pulse/Analog Modulation Generator.
1307 High Performance 3 GHz Pulse
• Replace A11 Pulse/Analog Modulation Generator.
1308 Numeric Synthesizer
• Replace A11 Pulse/Analog Modulation Generator.
1309 Function Generator Channel 1
• Replace A11 Pulse/Analog Modulation Generator.
1310 Function Generator Channel 2
• Replace A11 Pulse/Analog Modulation Generator.
1311 Frequency Modulator
• Replace A11 Pulse/Analog Modulation Generator.
1312 Low Frequency Out
• Replace A11 Pulse/Analog Modulation Generator.
1313 Amplitude Modulation
• Replace A11 Pulse/Analog Modulation Generator.
1314 External 1
• Replace A11 Pulse/Analog Modulation Generator.
1315 External 2
• Replace A11 Pulse/Analog Modulation Generator.
1316 AM Path Loss
• Replace A11 Pulse/Analog Modulation Generator.
E8257D/67D, E8663D PSG Signal Generators Service Guide
• If the +3.4 VD, +2.6 VD, and +1.9 VD supply voltages are good on the A31 Motherboard, replace the A14 Baseband
Generator.
• If the +3.4 VD or +2.6 VD supply voltages are bad on the A31 Motherboard, check the origin of the supply.
— If the supply voltage is good at the origin, replace the A31 Motherboard.
— If the supply voltage is bad at the origin, troubleshoot the A19 Power Supply.
1-56
E8257D/67D, E8663D PSG Signal Generators Service Guide
Page 71
Troubleshooting Assembly–Level Problems
Troubleshooting
• If the +1.9 VD supply voltage is bad on the A31 Motherboard, check the +3.4 VD supply at the A19 Power Supply.
— If the +3.4 VD supply is good at the A19 Power Supply, replace the A31 Motherboard.
— If the +3.4 VD supply is bad at the A19 Power Supply, troubleshoot A19 Power supply.
1601 Apps 1 <–> Apps 2 Comm
• If the +1.8 VD supply voltage is good on the A31 Motherboard, replace the A14 Baseband Generator
• If the +1.8 VD supply voltage is bad on the A31 Motherboard, check the +2.6 VD supply at the A19 Power Supply.
— If the +2.6 VD supply is good at the A19 Power Supply, then replace the A31 Motherboard.
— If the +2.6 VD supply is bad at the A19 Power Supply, then troubleshoot the A19 Power supply.
1602 Apps 1 <–> SH4 Comm
• Replace the A14 Baseband Generator
1603 Apps 2 <–> SH4 Comm
• Replace the A14 Baseband Generator
1604 FLiegan <–> Apps 2 Comm
• Replace the A14 Baseband Generator
1605 SRAM Test
• Replace the A14 Baseband Generator
1606 SDRAM Test
• Replace the A14 Baseband Generator
1607 Paren <–> SH4 Comm
• Replace the A14 Baseband Generator
1608 VCO Tune Test
• If the +32 V, ±15V, –5.2 V2, and + 5.2V supply voltages are good on the motherboard, use an oscilloscope to check
the 10 MHz signal on the A31 Motherboard at P161 pins 26 and 91. The signal should have a period of 100 ns
with an amplitude greater than 0.4 Vpp.
— If the 10 MHz signal is good, replace the A14 Baseband Generator.
— If the 10 MHz signal is bad, check it at the A7 Reference.
• If the 10 MHz signal is bad at the A7 Reference, refer to A7 Reference troubleshooting.
• If the 10 MHz signal is good at the A7 Reference, replace the A31 Motherboard.
• If the +32 V, ± 15 V, and +5.2 V supply voltages are bad on the motherboard, check the origin of the supply.
— If the supply voltage is good at the origin, replace the A31 Motherboard.
— If the supply voltage is bad at the origin, troubleshoot the A19 Power Supply.
• If the –5.2 V2 supply voltage is bad on the motherboard, check the –7 V supply voltage at the A19 Power Supply.
— If the –7 V supply voltage is good at the A19 Power Supply, replace the A31 Motherboard.
— If the –7 V supply voltage is bad at the A19 Power Supply, troubleshoot the A19 Power supply.
1609 IQ DAC Output
• Replace the A14 Baseband Generator
1610 PLL Test
• Replace the A14 Baseband Generator
E8257D/67D, E8663D PSG Signal Generators Service Guide
Before proceeding to the reported self–test error code, check the following voltages. If any voltages are out of
specification troubleshoot the supply problem first.
Supply Voltage
(Vdc)
+15P52–6, 21+14.55+15.45Main Supply
–15 P52–2, 17–15.45–14.55Main Supply
+5.2P52–14, 29+5.04+5.36Main Supply
+9P52–5, 20+8.82+9.18YIG Driver
–6P52–3, 18–6.12–5.88YIG Driver
Connector PinsMinimum Value
(Vdc)
Maximum Value
(Vdc)
Origin
2200 Ground and PTAT Test
• Replace A8 Output.
2201 Prelevel Loop Test
NOTEIf the A8 Output board has been replaced recently and self test 2201 is failing, run the ALC Mod Cal
adjustment before replacing the A8 Output board. See Chapter 4, “Post–Repair Procedures.”
1. With the signal generator powered on, carefully remove the A8 Output.
2. Set the signal generator to 3 GHz CW.
3. Connect a spectrum analyzer to the A6 Frac–N RF output at J4 of the A8 Output. The signal at J4 should be at
3 GHz and ≥0 dBm.
1-58
E8257D/67D, E8663D PSG Signal Generators Service Guide
Page 73
Troubleshooting Assembly–Level Problems
Troubleshooting
• If the signal is not present or at the correct level, replace the Frac–N.
• If the signal is present, replace the A8 Output.
WARNINGDo not re–install the A8 Output with the signal generator powered on. This can cause serious
Before proceeding to the reported self–test error code, check the following voltages. If any voltages are out of
specification troubleshoot the supply problem first.
Supply Voltage
(Vdc)
+32P142–4+31.04+32.96Main Supply
+15P142–28+14.55+15.45Main Supply
–15 P142–3–15.45–14.55Main Supply
E8257D/67D, E8663D PSG Signal Generators Service Guide
+5.2 Digital HighP141–64, 65, 129, 130+5.04+5.36Main Supply
+3.4 Digital LowP141–60, 61, 62, 63,
+2.6P141–57, 58, 59, 123,
+1.8P141–55, 56, 120, 121–1.75–1.85Motherboard
Connector PinsMinimum Value
125, 126, 127, 128
124
(Vdc)
+3.3+3.5Main Supply
+2.52+2.68Main Supply
Maximum Value
(Vdc)
Origin
2400 Power Supply Test
• If the +15V and –15V power supplies are good in the above table, replace the A38 Lowband Filter.
2401 RF Path Test
1. Remove the A38 Lowband Filter and insert a semi–rigid extender cable into J3.
2. Connect the extender cable to a spectrum analyzer.
3. Tune the spectrum analyzer and signal generator to 2 GHz. Turn on the signal generator’s RF.
4. You should see a high power signal (>+20 dBm) at 2 GHz on the spectrum analyzer.
• If the signal is good, replace the A38 Lowband Filter.
• If the signal is troubleshoot the RF path.
2402 Lowband Amp/Filter Power Supply
• Replace the A38 Lowband Filter.
2403 RF Path
• Replace the A38 Lowband Filter.
Self–Tests 25xx: A43 Amp Filter Self–Test Errors
1-60
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Troubleshooting Assembly–Level Problems
Troubleshooting
Before proceeding to the reported self–test error code, check the following voltages. If any voltages are out of
specification troubleshoot the supply problem first.
Supply Voltage
(Vdc)
+15P142–28+14.55+15.45Main Supply
–15 P142–3–15.45–14.55Main Supply
+5.2P142–2, 27+5.04+5.36Main Supply
–5.2 P142–1, 26–5.30–5.10YIG Driver
+5.2 Digital HighP141–64, 65, 129, 130+5.04+5.36Main Supply
+3.4 Digital LowP141–60, 61, 62, 63,
+10P142, 10, 11, 36+9.7+10.3Main Supply
Connector PinsMinimum Value
125, 126, 127, 128
(Vdc)
+3.3+3.5Main Supply
Maximum Value
(Vdc)
Origin
2500 Power Supply Test
• If the power supplies, in the table above, are good, replace the A43 Amp Filter.
2501 RF Amp Test
• Replace the A43 Amp Filter.
2502 Filter Path Test
• Replace the A43 Amp Filter.
2503 Pulse Modulator Test
• Replace the A43 Amp Filter.
2504 Step Attenuator Test
• Replace the A43 Amp Filter.
2505 Divider On/Off Test
• Replace the A43 Amp Filter.
E8257D/67D, E8663D PSG Signal Generators Service Guide
Before proceeding to the reported self–test error code, check the following voltages. If any voltages are out of
specification troubleshoot the supply problem first.
Supply Voltage
(Vdc)
+15P52–6, 21+14.55+15.45Main Supply
–15 P52–2, 17–15.45–14.55Main Supply
+5.2P52–14, 29+5.04+5.36Main Supply
+9P52–5, 20+8.82+9.18YIG Driver
–6P52–3, 18–6.12–5.88YIG Driver
Connector PinsMinimum Value
(Vdc)
Maximum Value
(Vdc)
Origin
2600 Power Supply Test
• Replace A8 Output.
2601 Prelevel Loop Test
NOTEIf the A8 Output board has been replaced recently and self test 2201 is failing, run the ALC Mod Cal
adjustment before replacing the A8 Output board. See Chapter 4, “Post–Repair Procedures.”
1. With the signal generator powered on, carefully remove the A8 Output.
2. Set the signal generator to 3 GHz CW.
3. Connect a spectrum analyzer to the A6 Frac–N RF output at J4 of the A8 Output. The signal at J4 should be at
3 GHz and ≥0 dBm.
• If the signal is not present or at the correct level, replace the Frac–N.
1-62
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Troubleshooting Assembly–Level Problems
Troubleshooting
• If the signal is present, replace the A8 Output.
WARNINGDo not re–install the A8 Output with the signal generator powered on. This can cause serious
E8257D/67D, E8663D PSG Signal Generators Service Guide
1-63
Page 78
Troubleshooting
Troubleshooting Unlocks
2802 ALC Mod System Test
• Replace the A8.
2803 Pulse Mod System Test
• Replace the A8.
2804 Clamp Detector Test
• Replace the A8.
2805 Bias Switch Test
• Replace the A8.
2806 Switch Filters Test
• Replace the A8.
2807 DAC Functionality Test
• Replace the A8.
Troubleshooting Unlocks
The phase lock loop refers to part of the frequency generating circuit used to maintain the phase relationship between
the frequency generation loop and a reference frequency. By maintaining the phase relationship, the frequency
accuracy of the signal generator is guaranteed.
To maintain frequency accuracy the phase lock loop compares the phase of a signal from the reference assembly to
the phase of the frequency loop signal. If the signals are slightly out of phase, the phase comparator circuit adjusts
the frequency loop signal until the two signals are in phase. If the phase comparator circuit cannot adjust the phase
of the frequency loop signal to agree with the reference signal, the phase comparator rails and generates an unlocked
message. The unlock message is immediately displayed on the front panel display.
There are four phase lock circuits in the frequency generation loop that can generate error messages. These phase lock
loops are located on the A6 Frac–N, A5 Sampler, and A7 Reference. There is also one other phase lock loop on the
A11 Pulse/Analog Modulation Generator that can generate an error message when the signal generator is in phase
modulation mode.
CAUTIONTo avoid damage to the signal generator, turn it off and disconnect it from the power source before
installing or reinstalling any assembly.
508 A6 Frac–N Loop Unlock
This error can indicate a failure in other than the A6 Frac–N Loop board. To determine which assembly is defective,
check whether the error occurs in both the CW and sweep modes, or in just the sweep mode.
• Occurs in both the CW and sweep modes:
Check P33–15 on the A31 Motherboard for the 10 MHz sync. approximately 2 V
— If the signal is present replace the A6 Frac–N.
— If the signal is not present, troubleshoot back to the A7 Reference.
• Occurs in only the sweep mode:
1. Start narrowing the sweep frequency range and increasing the sweep time.
2. If making the sweep adjustments resolves the error, replace the A28 YIG Oscillator.
3. If the A28 YIG Oscillator does not resolve the error, replace the A9 YIG Driver.
pp
.
1-64
E8257D/67D, E8663D PSG Signal Generators Service Guide
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Troubleshooting
Troubleshooting Unlocks
512 A7 Reference Unlock
The instrument’s reference is unlocked. Use the following list to troubleshoot the problem.
NOTEThe error message remains until it is cleared. Ensure that you clear the error message prior to each check to
properly determine whether the error still persists.
• If an external reference is connected:
1. Measure the external reference signal frequency.
2. Measure the external reference signal power level.
3. Compare the results from Step 1 and Step 2 against the specifications found in the E82x7D PSG data sheet.
4. Check the connection to the PSG along with the connectors.
5. Connect a different external reference source.
6. If the error persists, replace the A7 reference board:
• If the error occurs when you initially connect or disconnect the external reference:
1. Clear the error queue: press
2. With no changes to the external reference connection, check to ensure that the error does not reappear.
3. If the error reappears, replace the A7 reference board.
• If none of the above apply, replace the A7 reference board.
Utility > Error Info > Clear Error Queue(s).
513 1 GHz Out of Lock
A 513 1 GHz Out of Lock message indicates a failure on the A7 Reference.
• Replace the A7 Reference.
514 Reference Oven Cold
The Reference Oven Cold Error message indicated the reference has not been connected to electrical power for 30
minutes. This message appears when the signal generator is unplugged or the reference assembly is removed. The
message is controlled by a timer and should turn off after 30 minutes. This is not a failure unless the message does
not go off after 30 minutes. If it continues to be displayed after 30 minutes, replace the A7 Reference.
515 10 MHz Signal Bad
A 515 10 MHz Signal Bad message indicates a problem on the A7 Reference.
A7 Reference (Standard)
• Replace the A7 Reference.
A7 Reference (Option UNR/UNX)
1. Check the 10 MHz signal into the A7 Reference from the 10 MHz standard. The signal should be 10 MHz 1.8 V
into 1 MΩ.
2. If the 10 MHz signal is bad, replace the A32 10 MHz Crystal Oscillator.
3. If the signal is good, replace the A7 Reference.
pp
520 Sampler Unlocked
A 520 Sampler unlock message indicates a failure of the A5 Sampler VCO loop.
1. Run self–test. If self–test fails, troubleshoot the problem reported.
2. Power–up the signal generator. Remove the A5 Sampler. Probe the mmx connection center pin on the right side of
the A31 Motherboard in the A5 Sampler slot. There should be a 1 GHz signal >0 dBm.
3. If the 1 GHz signal is present, replace the A5 Sampler.
4. If the 1 GHz signal is not present, replace the A7 Reference.
E8257D/67D, E8663D PSG Signal Generators Service Guide
1-65
Page 80
Troubleshooting
Troubleshooting Unlocks
521 YO Loop Unlocked
A 521 YO Loop unlocked message indicates a failure of the A5 Sampler’s YO Phase detector circuit.
Execute the YIG pretune calibration: Press
Cal
.
• If this resolves the error, the repair is complete.
• If this does not resolve the error, perform the following steps:
1. Run self tests.
a. If the self tests pass, continue to step 2.
b. If the self tests fail, troubleshoot the reported failure.
2. Set the signal generator to 5 GHz.
3. While the signal generator is on, remove the A5 Sampler.
4. Probe the mmx connectors on the A31 Motherboard:
left mmx connectorapproximately 850 MHz >–6 dBm from A6 Frac–N
5 GHz from A29 20 GHz Doubler –6 dBm
— If all signals are present:
1. Turn off the signal generator and disconnect the power cord.
2. Replace the A5 Sampler.
— If a signal is not present for a connector listed above:
1. Troubleshoot back to that connector’s assembly.
2. If the signal is not present at the assembly:
a. Turn off the signal generator and disconnect the power cord.
b. Replace the assembly.
3. Reinstall the A5 Sampler.
4. Replace W11.
625 Internal Pulse Generator Unlock
A 625 internal pulse generator unlocked message indicates a failure on the A11 Pulse/Analog Modulation Generator.
• Replace the A11 Pulse/Analog Modulation Generator.
626 Internal Mod Source Unlock
A 626 Internal Mod Source Unlock error message indicates a problem with the digital 10 MHz signal to the
A11 Pulse/Analog Modulation Generator. This error message is turned on if the signal generator is in phase
modulation mode and there is a problem with the 10 MHz digital signal to the in phase clock.
1. Set the signal generator to phase modulation mode.
2. Measure pin P131–91. The waveform is not a sine wave, but more like a distorted pulse waveform >2 V
3. If the waveform is present, replace the A11 Pulse/Analog Modulation Generator.
4. If the signal is not present, replace the A7 Reference.
pp
.
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Troubleshooting Unlevels
Troubleshooting Unlevels
A leveled output power is obtained by comparing a detected voltage with a reference voltage. The reference voltage is
generated using DACs on the A10 ALC and the detected voltage is generated by coupling off a portion of the RF
output signal and converting it to dc using detector diodes. When the reference and detected levels are the same the
integrated output level remains constant. When the detected and reference levels are not the same, the integrator
output ramps either up or down to increase or decrease the detected level. If the integrator can not get the detected
voltage and the reference voltage to match, an unleveled annunciator is displayed.
The Automatic Leveling Circuit (ALC) uses two detectors and two modulator diodes. The A23 Lowband
Coupler/Detector is used for frequencies 2 GHz and below. The A25 Highband Coupler/Detector is used for all
frequencies above 2 GHz. The modulator in the A23 Lowband Coupler/Detector is used to control the RF amplitude for
frequencies 3.2 GHz and below. The modulator in the A30 Modulation Filter is used to control the amplitude for
frequencies above 3.2 GHz.
The RF path must provide a minimum power level to the ALC loop for the ALC loop to work properly. The minimum
power required is slightly higher than the maximum leveled power. The first step to troubleshooting a leveling problem
is to verify the RF path power level.
Troubleshoot and correct any unlock problems before troubleshooting unleveled problems.
If the unleveled annunciator is on:
1. Verify the signal generator’s amplitude is not set higher than the maximum level specified on the data sheet. Verify
that the signal generator’s RF output is terminated into 50 ohms. If the unleveled indication turns off after
resetting the amplitude or terminating the RF output into 50 ohms, the signal generator is operating correctly. If
the unleveled indicator remains on, proceed to step 2.
2. Using a spectrum analyzer check the RF signal level at the RF output connector.
a. Signal generator and spectrum analyzer setup:
Signal Generator:
•Turn ALC Off
• Set Amplitude to 30 dBm
• Turn Modulation Off
•Turn RF On
• Set Sweep to Frequency
• Set Sweep Type to Step (if Option 007 is installed, you can use ramp sweep)
• Set Start Frequency to 250 kHz
• Set Stop Frequency to 3.2 GHz
• Set Number of Points to 500 (skip this step if using ramp sweep)
Spectrum Analyzer:
• Set Start Frequency to 225 kHz
• Set Stop Frequency to 3.25 GHz
• Set Reference Level to +30 dBm
• Set Display to Max Hold
b. Connect the RF output of the signal generator to the spectrum analyzer. Measure and record the minimum
power level.
c. Set the signal generator and spectrum analyzer start/stop frequencies to the next start/stop frequencies in
Table 1- 16. Repeat step b above.
Table 1-16
Signal GeneratorSpectrum Analyzer
Start StopStart Stop
3.2 GHz 20 GHz3.15 GHz20 GHz
20 GHzMax. Freq.20 GHzMax. Freq.
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d. If any of the frequency ranges do not produce power levels ≥ the maximum leveled power shown in the tables
below, set the signal generator to the frequency with the lowest power level and measure the power with a
power meter. If the power level is low, troubleshoot the RF path before proceeding.
250 kHz to 3.2 GHz+13+16+11+15+9+15+7+14+5+14+3+13
250 kHz to 3.2 GHz w/UNW+11+11+10+10+9+10+7+9+5+9+3+8
b
250 kHz to 3.2 GHz w/1EH
250 kHz to 3.2 GHz
w/UNW + 1EH
b
+13+13+11+12+9+12+7+11+5+11+3+10
+10+10+9+9+9+9+7+8+5+8+3+7
>3.2 GHz to 20 GHz+13+20+11+18+9+18+7+16+5+14+3+13
>20 GHz to 30 GHz+9+14+7+12+5+11+3+9
>30 GHz to 40 GHz+9+14+7+12
>30 GHz to 65 GHz+5+11+3+9
>65 GHz to 67 GHz+5+10+3+8
>67 GHz to 70 GHz+5+8+3+6
a
always check data sheet for updates to specifications
b
with filters switched out
1EA/
1EU
Table 1-18 E8267D Maximum Leveled Power (dBm)
a
Frequency20 GHz Models32 & 44 GHz Models
250 kHz to 3.2 GHz+13+12
250 kHz to 3.2 GHz w/UNW+9+8
250 kHz to 3.2 GHz w/1EH
b
250 kHz to 3.2 GHz w/UNW + 1EH
b
+10+9
+7+6
>3.2 GHz to 20 GHz+18+14
>20 GHz to 31.8 GHz+14
>31.8 GHz to 40 GHz+12
>40 GHz to 44 GHz+10
a
Always check data sheet for updates to specifications
b
With filters switched out
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Troubleshooting Unlevels
Table 1-19 E8663D Maximum Leveled Power (dBm)
FrequencyAll Models
Std.1EU1E11E1+
100 kHz to 3.2 GHz+15+23+15+23
100 kHz to 3.2 GHz w/UNX+13+23+15+23
b
100 kHz to 3.2 GHz w/1EH
100 kHz to 3.2 GHz
w/UNX + 1EH
>3.2 GHz to 9 GHz+15+23+14+22
a
Always check data sheet for updates to specifications
b
With Option 1EH Low-pass Filters below 2 GHz switched off. With filters on, this
specification applies above 2 GHz.
b
+13+23+15+23
+12+23+15+23
a
1EU
3. If the RF signal levels are good, most likely the problem is either a detector, ALC, or modulator. Before proceeding,
turn ALC On and set the signal generator to maximum leveled power for the model and options you have and note
the frequencies where the unleveled condition occur. Later, when troubleshooting in ALC Off mode the unleveled
indication is turned off.
4. For each of the failed conditions listed, always start with the following signal generator settings:
• ALC Mode ALC Off
• Amplitude +30 dBm (max.)
• Attenuator Hold Mod On (if Option 1E1 is installed)
•RF On
• Modulation Off
Conditions:
5. Unleveled only between 250 kHz and 2 GHz. (Applies to all frequency options)
If the unleveled problem only occurs between 250 kHz and 2 GHz, the problem is most likely the
A23 Lowband Coupler/Detector.
a. Checking the A23 Lowband Coupler/Detector:
• Set the signal generator to 1.9 GHz or an unleveled signal generator frequency.
• Connect a power meter or spectrum analyzer to the A23 Lowband Coupler/Detector output.
• Set the signal generator to 1 GHz. Using the RPG, adjust the amplitude level so the detected voltage on
cable J5 of A10 ALC (W14) is –0.117 Vdc. Using a power meter, measure the signal level at the end of the
cable going to J3 of A30 Modulation Filter (W27). Use Table 1- 20 to determine the expected power level. If
the power can not be adjusted to this level, troubleshoot the RF path.
• If the problem is at some frequency other than 1 GHz, repeat the above step using the problem frequency.
The dB p–p variation from 250 kHz to 2 GHz should be <2 dB.
• If the dc level is bad, replace the A23 Lowband Coupler/Detector.
• If the signal is good, replace the A10 ALC.
Table 1-20
OptionExpected Power Level
Standard 2.3 dBm ±.5 dBm
UNW4.5 dBm ±.6 dBm
1EH6.5 dBm ±1 dBm
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Troubleshooting Unlevels
Table 1-20
OptionExpected Power Level
UNW+1EH9 dBm ±1 dBm
6. Unleveled only between 250 kHz and 3.2 GHz. If the unleveled problem only occurs between 250 kHz and 3.2 GHz,
the problem is most likely the A8 Output or A10 ALC. (Applies to all frequency options)
a. Checking Lowband Modulator Drive signal:
• Set the signal generator to a frequency between 250 kHz and 3.2 GHz. Set the amplitude so the power
meter reads +21 dBm (or the maximum settable power) on cable W27 going to J3 on A30 Modulation Filter.
If the power can not be set and options 1EH and/or UNW are installed, use the RF path block diagram to
verify the power levels through each device.
• Measure the voltage on the center pin on A31 Motherboard connector J1122. The voltage should be around
+2.0 Vdc.
• Reduce the amplitude setting to 0 dBm and the voltage on J1122 should move towards +0.15 Vdc.
• If the voltages are not correct or do not change as power is changed, replace the A10 ALC.
• If the voltage changes, replace the A8 Output.
7. Unleveled only between 2 GHz and the maximum frequency. If the unleveled condition occurs only for frequencies
>2 GHz to the maximum frequency, the problem is most likely the A25 Highband Coupler/Detector. (Applies to all
frequency options)
a. Checking the A25 Highband Coupler/Detector:
• Set the signal generator frequency to 19 GHz or a frequency where the signal generator is unleveled.
• Connect a power meter or spectrum analyzer to the RF output connector.
• Using the RPG, adjust the power to the highest level possible. This level will be either +9 dBm, +7 dBm, or
+3 dBm, depending on the mix of installed options. If the power can not be adjusted to one of these levels,
troubleshoot the RF path.
• Remove the cable from J3 on the A10 ALC and measure the dc voltage on the center pin of the cable. Use
Table 1- 21 to determine the expected power level.
• Set the power level to 0 dBm and repeat the center pin measurement. The voltage should be –5 mVdc
±10 mVdc.
• If the voltages are good, go to step 8.
• If the voltages are the same, replace the A25 Highband Coupler/Detector.
Table 1-21
Power
Level
+9 dBm –30 mVdc ±10Vdc
+7 dBm–20 mVdc ±10Vdc
+3 dBm–10 mVdc ±10Vdc
Expected Voltage Level
at J3 Center Pin
8. Unleveled only between 3.2 GHz and 20 GHz. (Applies to all frequency options)
If the unleveled condition occurs between 3.2 GHz and 20 GHz, the problem is most likely the A30 Modulation
Filter.
a. Checking the A30 Modulation Filter:
• Set the signal generator to 20 GHz or a frequency where the signal generator is unleveled and measured RF
output level is +7 dBm or +3 dBm, depending on options. If the power can not be set to +7 dBm or +3 dBm,
troubleshoot the RF path.
• Remove the cable going to J6 on the A30 Modulation Filter and measure the voltage on the center pin. The
voltage should be approximately +5.4 Vdc.
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Troubleshooting Unlevels
• Set the amplitude to –15 dBm. The voltage on the center pin should decrease a few mVdc.
• If the voltages are good, replace the A30 Modulation Filter.
• If the voltages are bad, go to step 7.
b. If Option 540, measure the signal going into J3 and out of J2 on the A27 40 GHz Doubler. If the loss is greater
than 2.5 dBm, replace the A27 40 GHz Doubler.
c. If Option 550 or 567, measure the signal going into J3 and out of J2 on the A27 40 GHz Doubler. If the loss is
greater than 2.5 dBm, replace the A36 Quadraplier.
d. If Option 532 or 544, measure the signal going into J1 and out of J2 on the A37 Upconverter. The loss should
be less than 5 dBm. If the loss is 5 dBm or greater, replace the A37 Upconverter.
9. Unleveled only between 20 GHz and 40 GHz or 44 GHz. If the unleveled condition occurs between 20 GHz and
40 GHz, the problem is either with the A27 40 GHz Doubler or the A25 Highband Coupler/Detector.
a. Checking the A25 Highband Coupler/Detector:
• Using a spectrum analyzer, check at the RF output signal level to the level shown in the Maximum Leveled
Power table. The RF output level must be greater than the maximum specified power level.
• If the maximum power level is not greater than the maximum power level specified, troubleshoot the RF
path starting with the signals out of the A30 Modulation Filter to the A27 40 GHz Doubler.
— If Option 550 or 567, replace the A36 Quadraplier.
— If Option 532 or 544, replace the A37 Upconverter.
• If the signal is greater than the maximum specified power level, replace the A25 Highband
Coupler/Detector.
10. Unleveled from >3.2 GHz to the maximum frequency.
Option 540 – Using the RF path block diagram, check the output levels of the A29 20 GHz Doubler, the
A30 Modulation Filter, and the A27 40 GHz Doubler.
Options 550 and 567 – Using the RF path block diagram, check the output levels of the A29 20 GHz Doubler, the
A30 Modulation Filter, and the A36 Quadraplier.
Option 532 and 544 – Using the RF path block diagram, check the output levels of the A35 20 GHz IQ Modulator,
the A27 40 GHz Doubler, and the A37 Upconverter.
11. Unleveled at all frequencies.
If the signal generator is unleveled at all frequencies, the problem is most likely the A10 ALC.
a. Checking the A10 ALC:
• Run a complete self–test and troubleshoot the reported failure.
E8257D/67D, E8663D PSG Signal Generators Service Guide
When an adjustment does not work or fails to resolve a problem and all self–tests have passed, use the following table
to locate the most likely failure.
Table 1-22 Troubleshooting Help for Failed Adjustments
Adjustment that is failing...Assemblies most likely causing failure...
The ADC adjustment adjusts the ADC reference voltage to match the A18 CPU +10 Vdc reference. There are three
reasons the adjustment could fail:
• problems with the +10 Vdc reference
• A18 CPU problems
• analog mux on another assembly is starting to fail
Procedure:
1. Run self–test 1100. If self–test 1100 passes, the +10 Vdc reference is good; proceed to step 2.
2. To see if an analog mux is failing and loading the supply, turn power off and remove the A5 Sampler, A6 Frac–N,
and A7 Reference.
3. Run the adjustment. If the adjustment passes, turn power off, reinstall one assembly at a time and run the
adjustment until the problem assembly is located.
4. If self–test fails, turn power off, reinstall the assemblies and remove the A8 Output, A9 YIG Driver, and A10 ALC.
5. Run the adjustment. If the adjustment passes, turn power off, reinstall one assembly at a time and run the
adjustment until the problem assembly is located.
6. If self–test fails, turn power off, reinstall the assemblies and remove the ribbon cable from J10 on the A26 MID
(W35).
7. If self–test passes, replace the A26 MID.
8. If self–test fails, replace A18 CPU.
Troubleshooting Performance Test Problems
If a performance test fails and all self–tests pass, use the following to find the most likely failure:
Performance test that is failing...Action to perform...
Maximum Leveled Output PowerRefer to “Troubleshooting the RF Path” on page 1- 75.
External AM Frequency ResponseIf the frequency is ≤3.2 GHz, check the
Internal FM Frequency ResponsePerform FM adjustments.
External Phase Modulation Frequency ResponsePerform FM adjustments.
Power Flatness Calibration,
Attenuator Calibration–Lowband and Highband Power,
Attenuator Calibration–Highband and High Power,
Attenuator Calibration–Lowband and Low Power, and
Attenuator Calibration–Highband and Low Power.
If the frequency ≤3.2 GHz, check the
A11 Pulse/Analog Modulation Generator or the A8 Output.
If the frequency is >3.2 GHz, check
A11 Pulse/Analog Modulation Generator and the A10 ALC.
If the Internal Pulse Modulation Minimum Pulse Width test fails,
perform a Pulse Width Calibration prior to replacing any assembly.
If still failing, check A11 Pulse/Analog Modulation Generator and A6 Frac–N.
A11 Pulse/Analog Modulation Generator or the A8 Output.
If the frequency is >3.2 GHz, check the
A11 Pulse/Analog Modulation Generator and the A10 ALC.
If still failing check A11 Pulse/Analog Modulation Generator and A6 Frac–N.
If still failing check A11 Pulse/Analog Modulation Generator and A6 Frac–N.
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Performance test that is failing...Action to perform...
Troubleshooting the RF Path
Troubleshooting
Internal FM DistortionPerform FM adjustments.
Internal Phase Modulation DistortionPerform FM adjustments.
External FM Deviation AccuracyPerform FM adjustments.
External Phase Modulation Deviation AccuracyPerform FM adjustments.
External Pulse Modulation ON/OFF RatioIf the frequency is ≤3.2 GHz, check the
Harmonic Spurious
Sub–Harmonic Spurious
Non–Harmonic SpuriousRefer to “Troubleshooting Non–Harmonic Spurious” on page 1- 81.
Single–Sideband Phase NoiseRefer to “Troubleshooting the RF Path” on page 1- 75.
Internal EVM Digital Modulation QualityPerform I/Q and digital calibrations.
Digital Modulation Power Relative to CWPerform I/Q and digital calibrations.
If still failing check A11 Pulse/Analog Modulation Generator and A6 Frac–N.
If still failing check A11 Pulse/Analog Modulation Generator and A6 Frac–N.
If still failing check A11 Pulse/Analog Modulation Generator and A6 Frac–N.
If still failing check A11 Pulse/Analog Modulation Generator and A6 Frac–N.
A11 Pulse/Analog Modulation Generator or the A8 Output.
If the frequency is >3.2 GHz, check the
A11 Pulse/Analog Modulation Generator and the A10 ALC.
Refer to “Troubleshooting Harmonic Spurious” on page 1- 78.
Troubleshooting the RF Path
Troubleshooting RF Path procedure:
• preset the signal generator
• set a frequency
• open ALC loop (ALC Off)
• set signal generator to maximum power
• check power levels in the RF path using “Troubleshooting RF Power Levels”, below.
Troubleshooting RF Power Levels
The following information has been provided to aid in troubleshooting power levels in the RF path:
• RF Block Diagrams (see Figure 1- 9 on page 107 and Figure 1- 10 on page 109 for the E8257D, and Figure 1- 13 on
page 115 and Figure 1- 14 on page 117 for the E8267D). The block diagrams show signal flow, path frequency
ranges, and minimum power levels ts a few key points in the RF path.
•A Gain/Loss table (Table 1- 30 on page 1- 105). The table provides the minimum gain or maximum loss level
between the input and output for each part
When troubleshooting the instrument, the troubleshooting procedure may refer you to the RF Block Diagram, the
Gain/Loss table, or both.
Examples:
Verifying the gain or loss of a part – Locate the part in the Gain/Loss table. Measure the output and input power
levels. Subtract the input from the output to determine the gain or loss. If the part is not meeting the gains or losses
specified (the gain is less than specified or the loss is more than specified), the part most likely needs to be replaced.
In cases where the part fails to meet its specification but comes very close, calculate and measure the minimum input
power level into the part before replacing the part.
Verifying the minimum power into a part – Locate a point on the RF path where output power is specified, then use
the Gain/Loss table to calculate the minimum power level at the specific location. If the minimum power level is not
present, measure the output of the first device showing a power level on the RF Block Diagram, then measure the
input and output power level for each device in the path until the defective part is located.
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Troubleshooting
Troubleshooting the RF Path
ALC and RF problems
1. Run a full self–test and troubleshoot any reported failures before proceeding.
2. From Table 1- 23, determine the frequencies where the problem occurs.
Table 1-23
FrequenciesAssemblies
All frequenciesA27 40 GHz Doubler (40 GHz models only)
• press Frequency, and set signal generator to frequency in problem area
• press Amplitude, and set to +25 dBm
• press RF ON/OFF (turn RF On)
•turn ALC Off
• Power Search Manual
• Do Power Search
4. Using the RF Path Block Diagram, check the power levels at the points shown.
5. Once the problem is located, verify that the cables between the two assemblies are good before replacing the
assembly.
6. To measure the A6 Frac–N output level, with the signal generator on, remove the A8 Output and probe the right
hand mmx connector’s center pin. The power level should be ≥+5 dBm.
WARNINGAlways turn the signal generator off before installing any assembly.
7. If power levels look good through the path in ALC Off mode, the problem is most likely in the ALC loop. Go to
troubleshooting the ALC loop.
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Troubleshooting the RF Path
Troubleshooting
Troubleshooting Pulse Modulation
1. Verify a license key has been entered for either Option UNU or UNW.
2. Run a full self–test and troubleshoot any reported failures before proceeding.
3. Determine the frequency of the pulse modulation problem.
4. Configure the signal generator to the pulse modulation setting that produces the problem.
5. Connect an oscilloscope to the LF OUTPUT connector. The waveform should be present on the oscilloscope.
6. If the waveform is present, continue to step 7.
7. If the waveform is not present or the signal is not the correct amplitude or type, replace the A11 Pulse/Analog
Modulation Generator.
8. Turn ALC Off. In ALC On mode, the ALC bandwidth limits pulse amplitudes at pulse widths <1μs. If turning ALC
Off corrects the problem, then verify that pulse modulation is setup in either ALC Off or Power Search Modes.
Troubleshooting Problems <3.2 GHz
9. If the pulse modulation problem occurs at <3.2 GHz, check P52–23 on the A31 Motherboard. Compare the results
with Table 1-24.
Table 1-24
Pulse OnPulse Off
+5 Vdc0 to +5 Vdc (pulses at modulation rate)
10. If signal levels are good, replace the A8 Output.
11. If the signals are bad, check the cable continuity. If the cable is bad, replace the cable. If the cable is good replace
the A11 Pulse/Analog Modulation Generator.
Troubleshooting Problems >3.2 GHz
12. If the pulse modulation problem occurs >3.2 GHz, remove the cable A30 Modulation Filter J7 (W17). Probe the end
of the cable. Compare the results with Table 1- 25.
Table 1-25
Pulse OnPulse Off
+5 Vdc0 to +5 Vdc (pulses at modulation
rate)
13. If the signal levels are good, replace the A30 Modulation Filter.
14. If the signal levels are bad, check the cable continuity. If the cable is bad, replace the cable. If the cable is good
replace the A11 Pulse/Analog Modulation Generator.
Troubleshooting AT1 Attenuator
The attenuator in a E8267D signal generator steps (changes levels) every 5 dBM. In a E8257D Option 520/532/540
signal generator the attenuator steps 5 dBM for the first change, then ever 10 dBM. In a E8257D 550/67 signal
generator the attenuator steps every 10 dBM.
1. If the attenuator switches at the switch points but the power does not change or the power changes more or less
than expected, replace the attenuator.
2. If the attenuator does not switch, press:
An Option 1E1 should be listed.
3. If Option 1E1 is not listed, the option is either not installed or the configuration file is bad. The signal generator
will need to be returned to Agilent for service.
4. If Option 1E1 is listed, turn the signal generator off and remove W36 from J13 on the A26 MID.
5. Turn the signal generator on and probe the following pins on J13.
Utility > more 1 of 2 > Instrument Info > Options Info
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Troubleshooting Harmonic Spurious
• Pin 1 +15 Vdc ±0.75 Vdc
• Pin 2 +5.2 Vdc ±0.5 Vdc
Table 1- 26 shows the amplitude ranges and the corresponding attenuator switch control line voltages. Attenuation
is switched in at +3 Vdc ±0.75 Vdc and switched out at 0 Vdc.
Table 1-26
Pin Numbers and Voltages
Amplitude
Levels
+25 to +5.1 dBm00000
+5.0 to –4 99 dBm0000+3
–5.0 to –14.99 dBm000+3+3
–15.0 to –24.99 dBm0+300+3
–25.0 to –34.99 dBm0+30+3+3
–35.0 to –44.99 dBm+3000+3
–45.0 to –54.99 dBm+300+3+3
–55.0 to –64.99 dBm+3+300+3
–65.0 to –74.99 dBm+3+30+3+3
–75.0 to –84.99 dBm+30+30+3
–85.0 to –94.99 dBm+30+3+3+3
–95.0 to –104.99 dBm+3+3+30+3
>–105.0 dBm+3+3+3+3+3
J13–5 40B dB
Atten. Step
J13–6 20 dB
Atten. Step
J13–7 40C dB
Atten. Step
J13–9 10 dB
Atten. Step
J13–10 5 dB
Atten. Step
6. If the voltages are correct, replace the attenuator.
7. If the voltages are not correct, replace the A26 MID.
Troubleshooting Harmonic Spurious
Harmonics are multiples of the output frequency. The second harmonic should be two times the output frequency at
an x dBc down. This section contains procedures for checking spurious harmonic emission levels to make sure they
are within specifications.
NOTEIf the harmonic falls beyond the frequency range of the signal generator, the harmonic is not specified or
measured.
To measure harmonics that fall within the signal generator frequency range, set the signal generator and spectrum
analyzer to the harmonic frequency and set the signal generator to a specified power level. Measure the output signals
peak power level on the spectrum analyzer. This peak power level is the reference level for the harmonic
measurement. Turn on Marker Delta, set the signal generator to the fundamental frequency, and measure the power
level of the fundamental frequency. The dBc value is the difference between the fundamental peak power level and the
harmonic frequency power level.
Table 1-27 Harmonic Specifications
Harmonic Specifications
< 10 MHz–28 dBc
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Table 1-27 Harmonic Specifications
Harmonic Specifications
10 MHz to 2 GHz–30 dBc
Troubleshooting Harmonic Spurious
Troubleshooting
10 MHz to 2 GHz (with Option 1EH filters
on)
> 2 GHz to 20 GHz–55 dBc
> 20 GHz to 40 GHz (Option 540)–50 dBc
> 20 GHz to 44 GHz (Options 532 & 544)–45 dBc
> 20 GHz to 67 GHz (Options 550 & 567)–45 dBc
–55 dBc
20 GHz Models
Use this procedure to troubleshoot harmonic problems with a fundamental frequency between 500 kHz and 3.2 GHz.
1. Set the signal generator as follows:
• Frequency: set to harmonic frequency to be measured
• Amplitude: +10 dBm
•ALC Off
• Amplitude Power Search (softkey)
2. Remove the cable on A30 Modulation Filter J3 (W27). Connect the spectrum analyzer to the cable.
3. Set the spectrum analyzer to the harmonic frequency, then press peak search and delta marker.
4. Set the signal generator to the fundamental frequency of the harmonic.
5. Using the delta marker, read the harmonic power level on the spectrum analyzer. Compare the spectrum analyzer
reading to the specifications in Table 1- 27 on page 1- 78.
6. If the harmonics do not meet specifications, replace the A8 Output.
7. If harmonic meet specifications reconnect the cable to the A30 Modulation Filter J3 and remove the cable going to
A30 Modulation Filter J2 (W31). Connect the spectrum analyzer to the A30 Modulation Filter J2.
8. Set the signal generator and spectrum analyzer to the harmonic frequency, then on the spectrum analyzer, press
marker peak search and then delta marker.
9. Set the signal generator to the fundamental frequency of the harmonic.
10. Using the delta marker, read the harmonic power level on the spectrum analyzer. Harmonic level should be
≤–55 dBc.
11. If the harmonic level is >–55 dBc, replace the A30 Modulation Filter.
20 GHz Models
Use this procedure to troubleshoot harmonic problems with a fundamental frequency between 3.2 GHz and 10 GHz.
1. Set the signal generator as follows:
• Frequency: set to harmonic frequency to be measured
• Amplitude: +10 dBm
•ALC Off
• Amplitude Power Search (softkey)
2. Remove the cable from the A29 20 GHz Doubler J2. Connect the spectrum analyzer to
A29 20 GHz Doubler J2.
3. Set the spectrum analyzer to the harmonic frequency, press marker peak search and then delta marker.
4. Set the signal generator to the fundamental frequency of the harmonic.
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Troubleshooting Harmonic Spurious
5. Using the delta marker, read the harmonic power level on the spectrum analyzer. Compare the spectrum analyzer
reading to the specifications in Table 1- 27 on page 1- 78.
6. If harmonics do not meet specification, replace the A29 20 GHz Doubler.
7. If harmonics meet or exceed specification, reconnect the cable to the A29 20 GHz Doubler J2 and remove the cable
going to the A30 Modulation Filter J2 (W31). Connect the spectrum analyzer to the A30 Modulation Filter J2.
8. Set the signal generator and spectrum analyzer to the harmonic frequency. On the spectrum analyzer, press marker
peak search and delta marker.
9. Set the signal generator to the fundamental frequency of the harmonic.
10. Using the delta marker, read the harmonic power level on the spectrum analyzer. Compare the spectrum analyzer
reading to the specifications in Table 1- 27 on page 1- 78.
11. If the harmonics do not meet specification, replace the A30 Modulation Filter.
32 GHz and 44 GHz Models Only
Use this procedure to troubleshoot harmonic problems with a fundamental frequency between 10 GHz and 16 GHz for
Option 532, and between 10 GHz and 22 GHz for Option 544.
1. Set the signal generator as follows:
• Frequency: set to harmonic frequency to be measured
• Amplitude: +10 dBm
•ALC Off
• Amplitude Power Search (softkey)
2. Remove the cable from the A37 20–44 GHz Upconverter (W102). Connect the spectrum analyzer to the
A37 20–44 GHz Upconverter (J4).
3. Set the spectrum analyzer to the harmonic frequency, then press peak search and delta marker.
4. Set the signal generator to the fundamental frequency of the harmonic.
5. Using the delta marker, read the harmonic power level on the spectrum analyzer. Compare the spectrum analyzer
reading to the specifications in Table 1- 27 on page 1- 78.
6. If the harmonics do not meet specifications, replace the A37 20–44 GHz Upconverter.
40 GHz Models Only
Use this procedure to troubleshoot harmonic problems with a fundamental frequency between 2 GHz and 20 GHz
1. Set the signal generator as follows:
• Frequency: set to harmonic frequency to be measured
• Amplitude +10 dBm
•ALC Off
• Amplitude Power Search (softkey)
2. Remove the cable from the A30 Modulation Filter J2 (W31). Connect the spectrum analyzer to
A30 Modulation Filter J2.
3. Set the spectrum analyzer to the harmonic frequency and press marker peak search and delta marker.
4. Set the signal generator frequency to the fundamental frequency of the harmonic.
5. Using the delta marker, read the harmonic power level on the spectrum analyzer. Compare the spectrum analyzer
reading to the specifications in Table 1- 27 on page 1- 78.
6. If the harmonics do not meet specification, replace the A30 Modulation Filter.
7. If the harmonics meet or exceed specification, reconnect the cable to the A30 Modulation Filter J2 and remove the
cable going to A27 40 GHz Doubler output (W30). Connect the spectrum analyzer to the A27 40 GHz Doubler J2.
8. Set the signal generator and spectrum analyzer to the harmonic frequency. Press marker peak search and delta
marker.
9. Set the signal generator to the fundamental frequency of the harmonic.
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Troubleshooting
10. Using delta marker, read the harmonic power level on the spectrum analyzer. Compare the spectrum analyzer
reading to the specifications in Table 1- 27 on page 1- 78.
11. If the harmonics do not meet specification, replace the A27 40 GHz Doubler.
50 and 67 GHz Models Only
Use this procedure to troubleshoot harmonic problems with a fundamental frequency between 20 GHz and 25 GHz for
Option 550, and between 20 GHz and 33.5 GHz for Option 567.
1. Set the signal generator as follows:
• Frequency: set to harmonic frequency to be measured
• Amplitude +10 dBm
•ALC Off
• Amplitude Power Search (softkey)
2. Remove the cable from the A30 Modulation Filter output going to the A36 Quadraplier (W107). Connect the
spectrum analyzer to A30 Modulation Filter (J2).
3. Set the spectrum analyzer to the harmonic frequency and press marker peak search and delta marker.
4. Set the signal generator frequency to the fundamental frequency of the harmonic.
5. Using the delta marker, read and record the harmonic power level on the spectrum analyzer.
6. Reconnect the cable to the A30 Modulation Filter (J2) and remove the cable from the A36 Quadraplier output
(W112). Connect the spectrum analyzer to the A36 Quadraplier (J3).
7. Set the signal generator and spectrum analyzer to the harmonic frequency. Press marker peak search and delta
marker.
8. Set the signal generator to the fundamental frequency of the harmonic.
9. Using delta marker, read the harmonic power level on the spectrum analyzer. There should be a decrease in the
harmonic power level from what was measured in step 3, at the output of the A30 Modulation Filter. If there isn’t,
or if the decrease is less than 15 dB, replace the A36 Quadraplier.
10. If the harmonics are decreased, replace the A30 Modulation Filter.
Troubleshooting Non–Harmonic Spurious
There are nine different groupings a spur can fall into. The grouping determines what assembly is most likely
generating the spur. The procedure for troubleshooting spurs is to identify the grouping based on failing a
performance test, checking for loose or broken cables or castings, and replacing the assembly.
Table 1-28 Non Harmonic Spurs
Mixing SpursThese spurs are generated by the mixing products of the RF and IF signals on the
A8 Output. The instrument is tuned to a frequency in the Heterodyne–Band
(250 kHz to 250 MHz) to measure these spurs.
Power Supply SpursThese spurs are generated by the power supply switching at a 100 kHz rate. If the
test fails for these spurs, change A19 Power Supply.
Offset Reference SpursThese spurs are generated by the 10 MHz frequency reference on the A7 Reference.
Clock SpursTwo clocks on the A11 Pulse/Analog Modulation Generator generate these spurs.
The first clock is 33.554432 MHz and is used by the numeric synthesizer. The
second clock is 100 MHz and is used by the internal pulse generator.
RF and LO Feedthrough
Spurs
Frac–N FeedthroughThese spurs are generated by the Frac–N frequency coupling onto the low–band
When the instrument is tuned to a Heterodyne Band (250 kHz to 250 MHz)
frequency, the RF and LO feeds through from the mixer on the A8 Output
generates spurs on the RF output.
signal as it leaves the A6 Frac–N. The spurs then appear at the Frac–N frequency
at the RF output.
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Troubleshooting Option UNR/UNX/UNY and Instruments with Serial Prefixes >= US4805/MY4805 Phase Noise
Table 1-28 Non Harmonic Spurs (Continued)
Sampler SpursThese spurs are generated on the A5 Sampler by the sampler LO and IF
frequencies.
Frac–N 250 MHz
Crossing Spurs
IF 250 MHz Crossing
Spurs
These spurs are generated by either the A5 Sampler, A6 Frac–N, or A7 Reference.
They occur when a harmonic of the Frac–N frequency equals a harmonic of
250 MHz. The spurs are measured in highband at 133 kHz offset from the CW
frequency.
These spurs are generated on the A5 Sampler. They are caused by harmonics of
the A5 Sampler IF. The spurs are measured in highband at 133 kHz offset from the
CW frequency.
Troubleshooting Option UNR/UNX/UNY and Instruments with Serial
Prefixes >= US4805/MY4805 Phase Noise
Poor grounds or shielding problems in either the test environment or the measurement system can cause the phase
noise measurement to fail. Physical vibration is another common cause of phase noise. Before performing a phase
nose measurement make sure all covers are installed, the work surface is free of physical vibrations, and the phase
noise system is working properly.
Phase noise failures at specific offsets are fairly predictable. After making sure the measurement accurately reflects a
failure, use Table 1- 29 to troubleshoot phase noise problems. The troubleshooting procedure consists of assembly
substitution.
Table 1-29 Phase Noise Failures
Frequency OffsetMost Likely Assembly
0 to 100 HzA32 High Stability Time Base
100 Hz to 10 kHzA7 Reference
<5 kHz to 10 kHzA6 Frac–N; A45 Frac- N (Option UNY)
10 kHz to 100 kHzA5 Sampler; A46 Offset (Option UNY)
>100 kHz to 1 MHzA28 YIG Oscillator or A9 YIG Driver
Frequencies <3.2 GHzA8 Output
Frequencies >3.2 GHzA29 20 GHz Doubler or A30 Modulation Filter
Frequencies >20 GHzA27 40 GHz Doubler
NOTEIn non–Option UNR/UNX and instruments with serial prefixes > US4805/MY4805, the most likely assemblies
and frequency offset are the same except for <100 Hz. In non–Option UNR/UNX and instruments with serial
prefixes > US4805/MY4805, the most likely assembly for <100 Hz offset is the A7 Reference.
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Overall Description
Overall Description
The overall description provides a functional overview of the Agilent PSG signal generators. Some of the functional
blocks discussed are common to many types of instruments, while others are more specific to analog and vector signal
generators.
Common functions:
• A18 CPU
• A19 Power Supply
• Input/Output Interface
Specific signal generator functions:
• Frequency Generation
• Output Power Level/Automatic Leveling Control
• Analog Modulation (Option UNU Standard Pulse, UNW Fast Pulse, UNT AM/FM and Phase Modulation) and Digital
Modulation
A18 CPU
The A18 CPU controls all activities in the signal generator:
• translating information entered from the front panel keys, LAN, GPIB, or Auxiliary Interface (RS–232) into
machine–level instructions
• communicating translated instructions on the internal buses
• monitoring critical circuits for problems, such as unleveled and unlocked conditions
• reporting (on the front panel display) any problems with critical circuits
A19 Power Supply
NOTEThe power supply has an internal line fuse that cannot be replaced. If the fuse opens, the power supply must
be replaced.
Voltag es
The main power supply converts line voltage (120 Vac or 240 Vac) to regulated dc voltages. Some of the required dc
voltages are not directly available from the main power supply and are provided by re–regulating one of the main
power supply voltages to the required voltage. This regulation can take place on any assembly and then routed to the
required assemblies.
Line Module
The line voltage connects to the power supply through the A22 Line Module. Because the power supply automatically
detects and adjusts to different line voltages, manual line voltage selection is neither necessary nor available.
Power Supply Thermal Sensors and fans
Two thermal sensors prevent the signal generator from overheating. One sensor is internal to the A19 Power Supply;
the other sensor is on the A8 Output. If the signal generator goes into thermal shutdown, the amber and green LEDs
on the front panel blink on and off.
There are two fans in the instrument. One fan cools the power supply. The other is a variable speed fan that increases
and decreases its speed to regulate the instrument’s internal temperature. For reliability, it is important to operate the
instrument with the covers installed to ensure proper airflow and cooling.
Input/Output Interface
Front Panel
The signal generator accepts inputs through the front panel hardkeys and the display softkeys, and provides outputs
on the front panel display, and through the RF output connector. Depending on the model, features, and options, the
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Overall Description
front panel may have modulation input/output BNC connectors installed but not operational if the option associated
with that connector is not also installed.
When line voltage is present and the signal generator is in standby mode, the amber LED above the power switch
lights. When the signal generator is in power–on mode, the green LED (also above the power switch) lights.
Hardkeys/Softkeys
The front panel has two types of keys:
Hardkeys are dedicated to specific functions, entering values for the most commonly used features, and controlling the
display’s contrast and intensity.
The front panel keypad uses a row and column configuration. Pressing a key makes a connection between a row and
column. The row and column information is routed to the A18 CPU where it is interpreted, and the corresponding
function executed.
Softkeys, located along the display, are used to select the function displayed to the left of the key (on the display).
When a softkey is pressed, the displayed function changes.
A2 Display
A liquid crystal display (LCD) provides information about the instrument's settings and condition. The LCD requires a
power supply, lighting, and data:
• The A4 inverter converts dc voltage to the ac voltage required by the display.
• A backlight (a bulb powered by the A4 Inverter) lights the display so that information is visible.
• The A18 CPU generates data, which is routed to the LCD through the A3 Power Switch assembly.
• To extend the life of the LCD, an available sleep mode turns the LCD off after a defined inactive period (no key
presses or program commands) and turns it back on with any key press.
RF Output Connector
On 20 GHz instruments, the RF output connector is an APC 3.5 male or Type–N (Option 1ED). On models with output
frequencies above 20 GHz and <
50 GHz, the RF output connector is a 2.4 mm male. On models with output
frequencies above 50 GHz, the RF output connector is a 1.85 mm male connector. Option 1EM moves all front panel
connectors to the rear panel.
Rear Panel
The rear panel contains the power line module, LAN, GPIB, RS–232, and A20 Source Module Interface (SMI), scalar
interface, and BNC connectors used for sweep interface. BNC and SMB connectors may be present on the rear panel
but not operational if the option associated with that connector is not installed.
Frequency Generation
The YIG oscillator generates frequencies from 3.2 to 10 GHz.
Output
Frequency
< 250 MHz3.2 to 10 GHz
250 MHz
to
3.2 GHz
Oscillator
Frequency
4 to 8 GHzOscillator output is divided by 2/4/8/16 on the A6 Frac–N assembly.
PathNotes
A6 Frac–N signal is mixed with a 1 GHz signal on the A8 output
assembly;
Lowband path,
and part of
highband path
the difference is used to generate the lower frequencies.
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Overall Description
Output
Frequency
> 3.2 GHz3.2 to 10 GHz Highband pathOn all models, the 3.2 to 10 GHz oscillator output is doubled to achieve
Oscillator
Frequency
PathNotes
frequencies between 10 and 20 GHz.
On analog models, the 10 to 20 GHz signal is doubled to achieve
frequencies between 20 and 40 GHz.
On vector models, frequencies between 20 and 44 GHz are developed
using a 40 GHz doubler and an upconverter. The 10 to 20 GHz signal from
the 20 GHz Doubler is doubled using the same 40 GHz Doubler used in
analog models, and then used as the LO input to the A37 Upconverter. A
3.2 to 10 GHz signal from the 20 GHz Doubler is fed to the IQ side of the
A37 Upconverter. Frequencies up to <28.5 GHz are the difference between
the LO and IQ inputs to the upconverter and frequencies 28.5 GHz to
44GHz are the sum.
In analog models with output frequencies >40 GHz, the output frequency
is developed by replacing the A27 40 GHz Doubler with the
A36 Quadraplier. The A36 Quadraplier doubles the 10 to 20 GHz signal to
develop frequencies up to 40 GHz and then doubles >20 GHz signals to
generate frequencies >40 GHz.
Highband Path – Frequencies 3.2 GHz and Above
The output of the YIG oscillator (3.2 to 10 GHz) is routed to the A29 20 GHz Doubler microcircuit. Depending on the
desired output frequency, the signal is routed either through a bypass circuit (for frequencies below 10 GHz), or
through a frequency doubler circuit (for frequencies above 10 GHz). After the bypass or doubler circuits, the signal is
amplified and filtered.
In analog models, the A29 20 GHz Doubler output is routed to the A30 Modulation Filter. The A30 contains amplitude
and pulse modulators, amplifiers, and filters. In 40 GHz analog models, the A30 Modulation Filter output is routed to
the doubler path of the A27 40 GHz Doubler for frequencies above 20 GHz, and to a bypass switch in the A27 40 GHz
Doubler for frequencies up to 20 GHz. The output of the A27 40 GHz Doubler is connected to the A24 Highband
Coupler and A25 Highband Detector, the optional AT1 attenuator, and the front panel RF output connector.
In analog models with output frequencies above 40 GHz, the A30 Modulator filter provides outputs for the two
A36 Quadraplier inputs. One input is to a bypass circuit for frequencies from 250 KHz to 20 GHz. The other input
takes a 10 to 20 GHz signal and doubles it to provide 20 to 40 GHz to a second doubler for frequencies above 40 GHz.
The A36 Quadraplier’s output then connects to the A24 Highband Coupler and A25 Highband Detector, to the optional
AT1 attenuator, and to the front panel RF output connector.
In vector models, the 20 GHz Doubler output is routed to the A35 3–20 GHz I/Q Modulator and then to the
A30 Modulation Filter. The A35 3–20 GHz I/Q Modulator contains I and Q modulation circuits used to transfer I/Q
information to the RF signal.
In 20 GHz vector models, the output of the A30 Modulation Filter is routed to the A24 Highband Coupler and
A25 Highband Detector, then through the AT1 attenuator to the front panel RF output connector.
In 32 and 44 GHz models, the A35 3–20 GHz I/Q Modulator routes two signals. One signal goes to the A27 40 GHz
Doubler. The second signal goes to the IQ input of the A37 Upconverter. The output of the 40 GHz Doubler is then
routed to the LO side of the A37 Upconverter.
Lowband Path – Frequencies Below 3.2 GHz
For frequencies below 3.2 GHz, the YIG oscillator output is tuned between 4 and 8 GHz. In analog models and 20 GHz
vector models, the YIG oscillator output is routed to the A29 20 GHz Doubler microcircuit, where a portion of the
signal is coupled off and routed to the A6 Frac–N. In vector models with output frequencies > 20 GHz, the
A39 Coupler is added at the YIG oscillator output to couple the signal to the A6 Frac–N. A divider on the A6 Frac–N
divides the 4 to 8 GHz signal to a frequency between 250 MHz and 3.2 GHz. This signal is then routed to the A8
Output assembly where it is amplified, filtered and modulated.
NOTEThe following paragraphs apply to E8257D instruments without Option 1EU, with serial
prefixes < US4928/MY4928/SG4928, and all E8267D & E8663B instruments.
Frequencies below 250 MHz are generated on the A8 Output by mixing the output signal from the A6 Frac–N (between
1000 and 750 MHz) with a 1 GHz LO from the A7 Reference. In vector models, the A8 Output also contains the I/Q
modulation circuit.
Option UNW (improved pulse performance below 3.2 GHz) adds a fast pulse modulator after the A8 Output.
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Overall Description
Option 1EH (reduced harmonics below 3.2 GHz) adds a filter assembly (A38 Low Band Switch Filter) after the
A8 Output. If Option UNW is installed, 1EH is installed after the A8 Output and before the UNW assembly.
The 100 kHz to 3.2 GHz signal is routed to the A23 Lowband Coupler/Detector, and then switched into the highband
path by a switch in the A30 Modulation Filter microcircuit. From this point, the low frequency signals flow to the
front panel through the highband path.
NOTEThe following paragraph applies to E8257D instruments with Option 1EU and all E8663D instruments.
The A43 Amp Filter assembly is added to the low band RF path. The RF signal f low goes from the A8 Output board
into the A43 Amp FIlter and then into the A23 Low Band Coupler. The A43 Amp Filter induces the circuitry for
Options UNU and UNW for frequencies from 250 MHz to 3.2 GHz, Option 1EH, Option 007, Option 1EU, and a divider
circuitry used with Option UNX.
Frequency Control
CW Mode
The A9 YIG Driver, A18 CPU, A7 Reference, A5 Sampler, and A6 Frac–N establish frequency accuracy and stability.
This circuitry is commonly referred to as a phase lock loop (PLL).
In CW operation, the A18 CPU programs the A9 YIG Driver pre–tune DAC to output a voltage that coarsely tunes the
YIG oscillator to the desired frequency. The A18 CPU also sets the A6 Frac–N VCO and the A5 Sampler phase dividers
and VCO to a frequencies such that when the A6 Frac–N, A5 Sampler signal, and the YIG oscillator signals are in
phase, the output of the phase comparator is 0 volts, and the phase lock loop is at the desired output frequency.
When the phases of these two signals (YO feedback and reference) are not the same (in phase), the output of the
phase detector changes to some voltage other than 0 volts.
The phase detector output is then integrated (the integrator voltage is proportional to the frequency error), and
routed to the A9 YIG Driver where it is summed with the pre–tune DAC voltage, causing the YIG’s output frequency
to change. Once the phase of the two signals matches, the phase detector output voltage returns to 0 volts, and the
integrator maintains a constant output voltage, holding the YIG output frequency constant.
To perform a phase comparison between the A6 Reference signal and the RF signal coupled off by the A20 Doubler, a
sampling function on the A5 Sampler converts the RF (in GHz) to an IF frequency in the MHz range. A 10 MHz signal
from the A7 Reference Assembly is used as the reference to the A6 Frac–N VCO (Voltage Controlled Oscillator) to
maintain the A6 Frac–N frequency accuracy. The frequency reference for the A7 Reference can be an:
• external 10 MHz signal
• internal standard 10 MHz OCXO (Oven Controlled Crystal Oscillator) on the A7 Reference
• optional high–stability 10 MHz OCXO
In summary:
• The A18 CPU coarse tunes the YIG, and sets the A5 Sampler VCO frequency and the A6 Frac–N VCO frequencies.
• The A5 Sampler and A6 Frac–N VCO frequencies are not fixed, and vary according to the YIG frequency.
• In some modes, the A6 Frac–N’s VCO is divided on the A5 Sampler.
• The A5 Sampler converts the RF signal to an IF signal for phase comparison.
• After a phase detector determines the phase difference between the two signals, the phase detector output is
integrated. The integrated voltage is summed with the A9 YIG Driver pre–tune DAC voltage, causing the YIG
oscillator output frequency to change to the desired frequency.
Ramp Sweep Mode (Option 007)
The A9 YIG Driver, A18 CPU, A7 Reference and the A6 Frac–N are used in sweep mode, but the A5 Sampler is not.
The A9 YIG Driver does the following:
• generates the sweep rate
• sets the start frequency
• generates the sweep ramp
• provides delay compensation
• adjusts the ALC leveling reference for improved power flatness during sweep
The A6 Frac–N contains the phase lock circuitry required to monitor and maintain phase lock during sweep. It also
provides a correction frequency voltage to the A9 YIG Driver.
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