75000 Series C
User & SCPI Programming Manual
Keysight E1459A / Z2404A 64-Channel Isolated Input Interrupt Module
Notices
© Keysight Technologies, Inc. 1991-2019
No part of this manual may be reproduced in any form or by any means
(including electronic storage and retrieval
or translation into a foreign language)
without prior agreement and written consent from Keysight Technologies, Inc. as
governed by United States and international copyright laws.
Manual Part Number
E1459-90001
Edition
Fourth Edition, October 2019
Published by
Keysight Technologies, Inc.
900 S. Taft Ave.
Loveland, CO 80537 USA
Sales and Technical Support
To contact Keysight for sales and technical support, refer to the support links on
the following Keysight websites:
www.keysight.com/find/E1459A
(product-specific information and support, software and documentation
updates)
www.keysight.com/find/assist (world-
wide contact information for repair and
service)
Declaration of Conformity
Declarations of Conformity for this product and for other Keysight products may
be downloaded from the Web. Go to
http://keysight.com/go/conformity and
click on “Declarations of Conformity.” You
can then search by product number to
find the latest Declaration of Conformity.
Technology Licenses
The hardware and/or software described
in this document are furnished under a
license and may be used or copied only in
accordance with the terms of such
license.
Warranty
THE MATERIAL CONTAINED IN THIS
DOCUMENT IS PROVIDED “AS IS,” AND
IS SUBJECT TO BEING CHANGED,
WITHOUT NOTICE, IN FUTURE EDITIONS. FURTHER, TO THE MAXIMUM
EXTENT PERMITTED BY APPLICABLE
LAW, KEYSIGHT DISCLAIMS ALL WARRANTIES, EITHER EXPRESS OR IMPLIED,
WITH REGARD TO THIS MANUAL AND
ANY INFORMATION CONTAINED
HEREIN, INCLUDING BUT NOT LIMITED
TO THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
PARTICULAR PURPOSE. KEYSIGHT
SHALL NOT BE LIABLE FOR ERRORS OR
FOR INCIDENTAL OR CONSEQUENTIAL
DAMAGES IN CONNECTION WITH THE
FURNISHING, USE, OR PERFORMANCE
OF THIS DOCUMENT OR OF ANY INFORMATION CONTAINED HEREIN. SHOULD
KEYSIGHT AND THE USER HAVE A SEPARATE WRITTEN AGREEMENT WITH
WARRANTY TERMS COVERING THE
MATERIAL IN THIS DOCUMENT THAT
CONFLICT WITH THESE TERMS, THE
WARRANTY TERMS IN THE SEPARATE
AGREEMENT SHALL CONTROL.
Keysight Technologies does not warrant
third-party system-level (combination of
chassis, controllers, modules, etc.) performance, safety, or regulatory compliance unless specifically stated.
DFARS/Restricted Rights
Notices
If software is for use in the performance
of a U.S. Government prime contract or
subcontract, Software is delivered and
licensed as “Commercial computer software” as defined in DFAR 252.227-7014
(June 1995), or as a “commercial item” as
defined in FAR 2.101(a) or as “Restricted
computer software” as defined in FAR
52.227-19 (June 1987) or any equivalent
agency regulation or contract clause.
Use, duplication or disclosure of Software
is subject to Keysight Technologies’ standard commercial license terms, and nonDOD Departments and Agencies of the
U.S. Government will receive no greater
than Restricted Rights as defined in FAR
52.227-19(c)(1-2) (June 1987). U.S. Government users will receive no greater
than Limited Rights as defined in FAR
52.227-14 (June 1987) or DFAR 252.2277015 (b)(2) (November 1995), as applicable in any technical data.
Safety Information
The following general safety precautions must be observed during all
phases of operation of this instrument.
Failure to comply with these precautions or with specific warnings or operating instructions in the product
manuals violates safety standards of
design, manufacture, and intended use
of the instrument. Keysight Technologies assumes no liability for the customer's failure to comply with these
requirements.
General
Do not use this product in any manner not
specified by the manufacturer. The protective features of this product must not be
impaired if it is used in a manner specified in
the operation instructions.
Before Applying Power
Verify that all safety precautions are taken.
Make all connections to the unit before
applying power. Note the external markings
described under “Safety Symbols”.
Ground the Instrument
Keysight chassis’ are provided with a
grounding-type power plug. The
instrument chassis and cover must be
connected to an electrical ground to
minimize shock hazard. The ground pin
must be firmly connected to an electrical ground (safety ground) terminal at
the power outlet. Any interruption of
the protective (grounding) conductor
or disconnection of the protective
earth terminal will cause a potential
shock hazard that could result in personal injury.
Do Not Operate in an Explosive
Atmosphere
Do not operate the module/chassis in
the presence of flammable gases or
fumes.
Do Not Operate Near Flammable
Liquids
Do not operate the module/chassis in
the presence of flammable liquids or
near containers of such liquids.
Cleaning
Clean the outside of the Keysight module/chassis with a soft, lint-free,
slightly dampened cloth. Do not use
detergent or chemical solvents.
Do Not Remove Instrument Cover
Only qualified, service-trained personnel who are aware of the hazards
involved should remove instrument
covers. Always disconnect the power
cable and any external circuits before
removing the instrument cover.
Keep away from live circuits
Operating personnel must not remove
equipment covers or shields. Procedures involving the removal of covers
and shields are for use by servicetrained personnel only. Under certain
conditions, dangerous voltages may
exist even with the equipment
switched off. To avoid dangerous electrical shock, DO NOT perform procedures involving cover or shield removal
unless you are qualified to do so.
DO NOT operate damaged
equipment
Whenever it is possible that the safety
protection features built into this product have been impaired, either through
physical damage, excessive moisture,
or any other reason, REMOVE POWER
and do not use the product until safe
operation can be verified by servicetrained personnel. If necessary, return
the product to a Keysight Technologies
Sales and Service Office for service and
repair to ensure the safety features are
maintained.
DO NOT block the primary
disconnect
The primary disconnect device is the
appliance connector/power cord when
a chassis used by itself, but when
installed into a rack or system the disconnect may be impaired and must be
considered part of the installation.
Do Not Modify the Instrument
Do not install substitute parts or perform any unauthorized modification to
the product. Return the product to a
Keysight Sales and Service Office to
ensure that safety features are maintained.
In Case of Damage
Instruments that appear damaged or
defective should be made inoperative
and secured against unintended operation until they can be repaired by
qualified service personnel
Do NOT block vents and fan exhaust:
To ensure adequate cooling and ventilation, leave a gap of at least 50mm
(2") around vent holes on both sides of
the chassis.
Do NOT operate with empty slots: To
ensure proper cooling and avoid damaging equipment, fill each empty slot
with an AXIe filler panel module.
Do NOT stack free-standing chassis:
Stacked chassis should be rackmounted.
All modules are grounded through the
chassis: During installation, tighten
each module's retaining screws to
secure the module to the chassis and
to make the ground connection.
Operator is responsible to maintain
safe operating conditions. To ensure
safe operating conditions, modules
should not be operated beyond the full
temperature range specified in the
Environmental and physical specification. Exceeding safe operating conditions can result in shorter lifespan,
improper module performance and
user safety issues. When the modules
are in use and operation within the
specified full temperature range is not
maintained, module surface temperatures may exceed safe handling conditions which can cause discomfort or
burns if touched. In the event of a
module exceeding the full temperature
range, always allow the module to cool
before touching or removing modules
from the chassis.
iv
Safety Symbols
A CAUTION denotes a hazard. It
calls attention to an operating procedure or practice, that, if not correctly performed or adhered to
could result in damage to the
product or loss of important data.
Do not proceed beyond a CAUTION
notice until the indicated conditions are fully understood and met.
A WARNING denotes a hazard. It
calls attention to an operating procedure or practice, that, if not correctly performed or adhered to,
could result in personal injury or
death. Do not proceed beyond a
WARNING notice until the indicated conditions are fully understood and met.
Products display the following symbols:
Warning, risk of electric
shock
Refer to manual for additional safety information.
Earth Ground.
Chassis Ground.
Alternating Current (AC).
Direct Current (DC)
v
vi
Contents
1 Installing and Configuring the E1459A
Functional Description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Watchdog Timer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Input Level Selection. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Input Isolation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Input Debounce Processing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Programmable Debounce Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Input Edge Detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Edge Detection Examples. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Input Data Capture . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Front Panel Markers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Interrupt Driven or Polled Mode Operations . . . . . . . . . . . . . . . . . . . . . . . . 18
Interrupt Parsing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Configuring for Installation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Setting the Logical Address . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Setting the Interrupt Priority. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Setting Input Threshold Levels . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Setting the Reset Time on the Watchdog Timer . . . . . . . . . . . . . . . . . . . . . 22
Connecting User Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Installing the Keysight E1459A in a VXIbus Mainframe . . . . . . . . . . . . . . . . 25
Terminal Block. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Wiring Guidelines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Wiring a Terminal Block . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
2 Using the Keysight E1459A Module
Power-on / Reset States . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Example 1: Reset, Self Test, and Module ID. . . . . . . . . . . . . . . . . . . . . . . . . 30
Digital Input. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
Example 2: Digital Input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
Edge Detected Event Detection. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
Polling the Port Summary Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
Polling the Status Subsystem. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
SRQ Interrupt . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
Example 3: Edge Interrupt . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
3 Keysight E1459A SCPI Command Reference
Common Command Format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
SCPI Command Format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
Command Separator. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
Keysight E1459/Z2404B User and SCPI Programming Guide vii
Abbreviated Commands . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
Implied Commands . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
Command Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
Linking Commands . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
DIAGnostic:SYSReset Subsystem . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
Syntax . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
DIAGnostic:SYSReset[:STATe]? . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
DIAGnostic:SYSReset:ENABle <state> . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
DIAGnostic:SYSReset:ENABle? . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
DISPlay:MONitor Subsystem . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46
DISPlay:MONitor:PORT <port> . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46
DISPlay:MONitor:PORT? [MINimum | MAXimum | DEFault]. . . . . . . . . . . . . 47
DISPlay:MONitor:PORT:AUTO <state> . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47
DISPlay:MONitor:PORT:AUTO? . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48
DISPlay:MONitor[:STATe] <state> . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48
Syntax . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50
INPutn:CLOCk[:SOURce] <source>. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50
INPutn:CLOCk[:SOURce]?. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51
INPutn:DEBounce:TIME <time> | MINimum | MAXimum | DEFault . . . . . . . 51
INPutn:DEBounce:TIME? [MINimum | MAXimum | DEFault] . . . . . . . . . . . . 52
MEASure Subsystem . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53
Syntax . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53
MEASure:DIGital:DATAn[:type] [:VALue]? . . . . . . . . . . . . . . . . . . . . . . . . . . . 53
MEASure:DIGital:DATAn[:type]:BITm?. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54
MEMory Subsystem . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55
MEMory:DELete:MACRo <name> . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55
SENSe Subsystem . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56
Syntax . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56
[SENSe:]EVENt:PORTn:DAVailable? . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57
[SENSe:]EVENt:PORTn:DAVailable:ENABle <state>. . . . . . . . . . . . . . . . . . . 57
[SENSe:]EVENt:PORTn:DAVailable:ENABle? . . . . . . . . . . . . . . . . . . . . . . . . 58
[SENSe:]EVENt:PORTn:EDGE? . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58
[SENSe:]EVENt:PORTn:EDGE:ENABle <state>. . . . . . . . . . . . . . . . . . . . . . . 59
[SENSe:]EVENt:PORTn:EDGE:ENABle? . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59
[SENSe:]EVENt:PORTn:NEDGe? . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60
[SENSe:]EVENt:PORTn:NEDGe:ENABle <mask> . . . . . . . . . . . . . . . . . . . . . 60
[SENSe:]EVENt:PORTn:NEDGe:ENABle? . . . . . . . . . . . . . . . . . . . . . . . . . . . 61
[SENSe:]EVENt:PORTn:PEDGe? . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61
[SENSe:]EVENt:PORTn:PEDGe:ENABle <mask> . . . . . . . . . . . . . . . . . . . . . 62
[SENSe:]EVENt:PORTn:PEDGe:ENABle? . . . . . . . . . . . . . . . . . . . . . . . . . . . 62
[SENSe:]EVENt:PSUMmary:DAVailable? . . . . . . . . . . . . . . . . . . . . . . . . . . . 63
viii Keysight E1459/Z2404B User and SCPI Programming Guide
[SENSe:]EVENt:PSUMmary:EDGE? . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63
STATus Subsystem. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65
Syntax . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65
STATus:OPERation:CONDition? . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67
Comments. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67
STATus:OPERation:ENABle <mask> . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67
STATus:OPERation:ENABle? . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68
STATus:OPERation[:EVENt]?. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68
Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68
STATus:OPERation:PSUMmary:CONDition?. . . . . . . . . . . . . . . . . . . . . . . . . 68
STATus:OPERation:PSUMmary:ENABle <mask> . . . . . . . . . . . . . . . . . . . . . 69
STATus:OPERation:PSUMmary:ENABle? . . . . . . . . . . . . . . . . . . . . . . . . . . . 70
STATus:OPERation:PSUMmary[:EVENt]? . . . . . . . . . . . . . . . . . . . . . . . . . . . 70
STATus:PRESet . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70
STATus:QUEStionable:CONDition?. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71
STATus:QUEStionable:ENABle <mask> . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71
STATus:QUEStionable:ENABle? . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72
STATus:QUEStionable[:EVENt]? . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72
SYSTem Subsystem. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73
Syntax . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73
SYSTem:CDEScription? <number>. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73
SYSTem:CTYPe? <number> . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74
SYSTem:ERRor? . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74
SYSTem:VERSion? . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75
IEEE 488.2 Common Commands . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76
Command Quick Reference. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78
A Keysight E1459A Specifications
B Keysight E1459A Register Definitions
Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83
Addressing the Registers. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85
Register Access with Logical Address . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85
Register Access with Memory Mapping. . . . . . . . . . . . . . . . . . . . . . . . . . . . 85
Register Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86
Manufacturer ID Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 87
Device Type Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 87
Status/Control Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 88
Edge Interrupt Status Register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90
Data Available Status Register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90
Watchdog Timer Control/Status Register . . . . . . . . . . . . . . . . . . . . . . . . . . 91
Command Register Port 0/2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 91
Channel Data Register Port 0/2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 93
Keysight E1459/Z2404B User and SCPI Programming Guide ix
Positive Edge Detect Register Port 0/2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . 94
Negative Edge Detect Register Port 0/2 . . . . . . . . . . . . . . . . . . . . . . . . . . . 95
Positive Mask Register Port 0/2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 95
Debounce Clock Register Port 0 and Port1/ Port 2 and Port 3 . . . . . . . . . . 96
Command Register Port 1/3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 98
Channel Data Register Port 1/3 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 99
Positive Edge Detect Register Port 1/3 . . . . . . . . . . . . . . . . . . . . . . . . . . . . 99
Negative Edge Detect Register Port 1/3 . . . . . . . . . . . . . . . . . . . . . . . . . . 100
Positive Mask Register Port 1/3 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100
Negative Mask Register Port 1/3 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 101
Debounce Clock Register Port 0 and Port 1/ Port 2 and Port 3 . . . . . . . . 101
Power On/Reset Conditions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 103
Programming Examples . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 103
Output and Edge Detection Examples . . . . . . . . . . . . . . . . . . . . . . . . . . . . 105
C Error Messages
x Keysight E1459/Z2404B User and SCPI Programming Guide
E1459A/Z2404B User and SCPI Programming Guide
1 Installing and Configuring the
E1459A
The Keysight E1459A 64-Channel Isolated Digital Input/Interrupt module
(formerly known as the Z2404B
configured as four 16-bit ports. The module is used for sensing signals and
detecting edge changes on digital inputs. The module is a C-Size VXIbus
register-based product that operates in a C-Size VXIbus mainframe.
Each isolated channel can withstand up to 115 Vac RMS or 115 Vdc difference in
ground potential between channels. The input threshold for each channel is
selectable with a jumper to allow for inputs with high logic levels from 5 to 48
volts. Each channel can be individually masked to generate an interrupt on a
positive and/or negative edge transition. Channel inputs are also "debounced" to
help prevent erroneous transition detection on noisy signals. Two programmable
clock sources control the debounce circuitry (one for ports 0 and 1, one for ports
2 and 3).
Functional Description
The Keysight E1459A simultaneously monitors each channel for the occurrence
of transitions, (i.e., edge events), or for level sensing signals which meet
preprogrammed parameters for magnitude and duty. Each channel is electrically
isolated from all other channels, power, ground, and other current paths within
the limits of specification. Each channel may be independently programmed to
sense only positive transitions, only negative transitions, or transitions of either
polarity.
1
) provides 64 isolated digital input channels
Figure 1 shows the functional block diagram for the module.
1 The Keysight E1459A and Z2404B are functionally identical. The Keysight E1459A is provided with a
downloadable SCPI driver and a VXIplug&play driver; the Z2404B was not provided with a language driver.
11
Installing and Configuring the E1459A Functional Description
To VXIbu s
Transceivers
Figure 1-1 Keysight E1459A 64-Channel Isolated Digital Input/Interrupt Block Diagram
12 Keysight E1459A/Z2404B User and SCPI Programming Guide
Functional Description Installing and Configuring the E1459A
The Keysight E1459A can be programmed to monitor channel occurrences either
internally with a 1.0 MHz sample clock, or externally, with a sourced capture
clock. Using either clocking technique, data channels may function as edge
detect inputs and/or data capture inputs.
Events at any channel may occur simultaneously or in overlap with events on any
other channel. Figure 2 is a block diagram of the hardware interrupt resolver
circuit. User software algorithms are also necessary to resolve issues of overlap
and to determine the occurring sequence of events.
Figure 1-2 Resolver Block Diagram
Watchdog Timer
The Keysight E1459A provides a programmable timer facility which, in the event
of time-out, will generate a "system wide" reset to all other card-cage modules.
This timer may be disabled by the SCPI command DIAG:SYSR:ENAB OFF.
Input Level Selection
Each channel is capable of operation over an input range from 2.0 through 60.0
Vdc. Input voltages are grouped into voltage ranges which are selected via a
series of jumpers on the module. These jumpers are described in more detail
later.
Input Isolation
Each channel is optically coupled and electrically isolated from all other
channels and current paths. Isolated channel inputs are polarized and require
that the user observe input signal polarity when connections are made.
Keysight E1459A/Z2404B User and SCPI Programming Guide 13
Installing and Configuring the E1459A Functional Description
Input Debounce Processing
Each channel is debounced by a digital circuit specific to this function. Two
programmable clock sources establish reference parameters which determine
the debounce criteria for validating inputs. Channels are not independently
programmed for debounce period, but are instead grouped together in blocks of
32 channels per clock source. Channels 00-31 (Ports 0 and 1) are collectively
programmed via one clock source and channels 32-63 (Ports 2 and 3) are
programmed via a second clock source.
Programmable Debounce Parameters
Debounce circuits require that a channel input remain in a stable state for 4 to
4.5 periods of the programmable clock before a channel transition is declared.
The debounce clocks may be programmed for frequencies ranging from 250 KHz
down to 466 Hz. The 4 to 4.5 clock period requirements of the debouncers
translate into debounce periods which range from 16 S minimum to 9600
seconds (2.67 hours) maximum.
The debounce circuits can add considerable latency in the signal path and an
additional delay occurs within the Register FPGA. Normally the signals pass
though without significant delay. However, during a VXIbus transaction to this
port, the input signals are momentarily captured by a latch and are held for the
duration of the bus transaction plus 500 nS. This prevents data events from being
lost due to potential timing conflicts with VXIbus transactions. The data signals
are then synchronized with the system clock and synchronously captured in
either the data register, the positive edge event register, or the negative edge
event register. This can potentially add another 500 nS depending upon timing
circumstances.
Thus the input data is delayed by the debounce circuits, possibly by the input
latches (equal to bus transaction time plus 500 nS), and a synchronizing delay of
500 nS. The external clocks (front panel external trigger inputs) are also delayed
but by no more than 500 nS. Therefore, an external capture clock concurrent with
a data event will not capture the event unless consideration is given for data
latency.
The user MUST ensure, based upon the programmed debounce
period and internal delays, that data to be captured has
propagated the debouncers and is fully setup prior to the
assertion of the externally generated capture clock.
The module has two primary modes of operation: the module can interrupt your
software when an event occurs or your software can periodically poll the module
to determine if an event has occurred. If the channel data registers are serviced
via a "polled mode" method (which is not keyed to the posting of the "marker
14 Keysight E1459A/Z2404B User and SCPI Programming Guide
Functional Description Installing and Configuring the E1459A
bits" or the occurrence of an interrupt), no timing relationship will necessarily
exist with the debounced event. As a result, a small window of uncertainty exists
between input latch timing and debounce circuit timing.
Input Edge Detection
Each channel may be programmed to sense the occurrence of a qualified edge
transition of either polarity, or both concurrently. All channels are preprocessed
via the debounce circuits before presentation to the edge detect logic. Edge
detection is performed (by sampling methods) within each of the four ports, in
groups of 16 channels per port. If enabled, each port will post an "Edge Interrupt
Marker" to the control logic circuitry on the occurrence of a qualified edge event
for any active channel within its channel group. (The static state of these markers
may be tested via the "Edge Interrupt Status Register" These markers are also
accessible at the front panel.)
Edge Detect Markers are cleared by a read of the register causing
the marker to be posted. Since there is no high-level method of
determining whether a positive or negative edge event is
generating the marker, both edge detect registers (positive and
negative) within a channel group, MUST be read during the
service interval to identify ALL edge events which may have
potentially occurred.
Each marker bit is forced inactive for a two clock (16 MHz) periods each time
either edge detect register is read. (The edge detect register is then cleared at
the end of the cycle.) If the register that is not being read is inactive and remains
inactive, the marker will continue to remain inactive. If the register that is not
read is active or becomes active, the marker is again posted to the "control"
logic. The control logic detects this event and stores this occurrence in a flip-flop
which marks the pending need for service. If this marking register, (now active),
is then read and ultimately cleared, the marker will become inactive and will
remain inactive until the subsequent occurrence of another qualified edge event.
The control logic detects this "cleared marker condition" and consequently clears
the pending service request flip-flop.
External edge events which occur concurrently with a register read/clear cycle
are queued and post-processed on completion of the cycle.
Edge Detection Examples
Figure 3 demonstrates a typical example. A channel that has been programmed
to detect both positive and negative edge transitions posts a marker at the
occurrence of a positive edge. Before user software can service this interrupt, a
Keysight E1459A/Z2404B User and SCPI Programming Guide 15
Installing and Configuring the E1459A Functional Description
negative transition occurs and is detected. Because both are detected and the
events are marked, user software first reads the positive edge detect register and
then the negative edge detect register.
Figure 1-3 Positive and Negative Edge Transitions
In Figure 4, a channel that has been programmed for data capture posts a
marker on the occurrence of an external capture clock. During the subsequent
data register read cycle, another data capture clock occurs to create a pending
DAV (Data AVailable) situation. The second DAV is retained (and valid) until a
subsequent read of the corresponding data register.
Figure 1-4 DAV Timing
16 Keysight E1459A/Z2404B User and SCPI Programming Guide
Functional Description Installing and Configuring the E1459A
Input Data Capture
The state of any channel, within any channel group, may be captured for
subsequent processing (as data) by an externally sourced capture clock
(XTRIG0N - XTRIG3N, the external trigger inputs for each port). Data channels
may be interspersed among all 64 channel inputs, but the user is cautioned to
ensure that all setup criteria and clock sources coincide with requirements for
synchronization. (Each channel group shares a common capture clock which may
not necessarily be synchronous with an external capture clock of some other
channel group.)
If enabled, each register FPGA will post a "Data Available Marker" to the control
FPGA on the occurrence of a corresponding capture clock. Data Available
Markers are cleared by a read of the corresponding "Channel Data Register."
(The static state of these markers may be tested via the "Data Available
Register.") Capture clocks which occur concurrently with a "register read/marker
clear" cycle, are queued and post- processed on completion of the present cycle.
In that event, the marker bit is forced inactive for a two clock (16 MHz) period
before again being posted to the control FPGA.
In the "Data Capture Mode", the Keysight E1459A may be programmed to
generate an interrupt on the occurrence of an external capture clock, or an
internal 1.0 MHz sample clock may be selected to allow the state of the data
channels to be tested in the absence of a capture clock. Capture clock selection
(internal/external) is controlled by bit 1 of the Command Register Word.
A potential hazard exists if software were to improperly program
the Keysight E1459A to post data-capture IRQ's with the
internally selected 1.0 MHz clock source. In this situation, a DAV
interrupt would be posted each microsecond (if software were
able to service at that rate), and would cause software to
continuously vector to interrupt service upon each "return from
service." Therefore, the Keysight E1459A should never be
programmed to generate DAV interrupts with the internal clock
source selected.
In the Keysight E1459A the Data Ready Marker is guaranteed to
be cleared when the clock source is switched from internal to
external. Therefore, any capture clock which occurs within the
internal/external clock selection interval will not post a marker to
the control FPGA and will be lost.
Keysight E1459A/Z2404B User and SCPI Programming Guide 17
Installing and Configuring the E1459A Functional Description
Front Panel Markers
All "Data Available" and "Edge Detect" marker bits are physically available via the
Keysight E1459A front panel. These outputs are TTL/HC compatible and may be
used to trigger other system-wide events or to provide logging information for
statistical tracking or other performance analysis purposes.
Interrupt Driven or Polled Mode Operations
Interrupts may be programmatically disabled for both edge-detect and
data-capture events. All registers remain active and valid and may be serviced on
a polled mode basis.
Interrupt Parsing
Since the command module interrupt handler must service multiple,
concurrently-occurring interrupts, (including those which may be sharing the
same IRQ line), some method is necessary to ensure that only a single IRQ is
posted by the Keysight E1459A during each service interval.
Individual interrupts must be serviced by a commander on a one-for-one basis.
The Keysight E1459A accomplishes this by inhibiting the generation of a second
IRQ each time an IRQ is posted. THE INHIBIT CONDITION IS CLEARED BY THE
REMOVAL AND REASSERTION OF EITHER INTERRUPT ENABLE BIT, "DAV" OR
"EDGE DETECT." (Refer to Figure 2.)
For this one-for-one interrupt parsing, the Keysight E1459A REQUIRES that a
global interrupt enable, either DAV or Edge Detect, be disabled and reasserted
within the context of the interrupt service procedure. Normally, you would simply
shut off interrupts at the top of the service procedure, and would then re-enable
them before returning from service. This is the suggested usage, although this
specific sequence is not necessary for proper Keysight E1459A hardware
function.
18 Keysight E1459A/Z2404B User and SCPI Programming Guide
Configuring for Installation Installing and Configuring the E1459A
Configuring for Installation
Before installing the module you should verify that the following jumpers and
switches are set correctly.
– Logical Address dip switch
– Interrupt priority jumper positions
– Input threshold levels
– Reset time of the Watchdog Timer
SHOCK HAZARD. Only qualified, service-trained personnel
who are aware of the hazards involved should install,
configure, or remove the module. Disconnect all power
sources from the mainframe, the terminal module and
installed modules before installing or removing a module.
SHOCK HAZARD. When handling user wiring connected to
the terminal module, consider the highest voltage present
accessible on any terminal.
SHOCK HAZARD. Use wire with an insulation rating greater
than the highest voltage which will be present on the
terminal module. Do not touch any circuit element
connected to the terminal module if any other connector to
the terminal module is energized to more than 30 Vac RMS
or 60 Vdc.
MAXIMUM VOLTAGE. Maximum allowable voltage per channel for
this module is 60 Vdc. Up to 115 Vdc or 115 Vac RMS can be
applied from one channel to another or from any channel to
chassis.
STATIC-SENSITIVE DEVICE. Use anti-static procedures when
removing, configuring, and installing a module. The module is
susceptible to static discharges. Do not install the module
without its metal shield attached.
Keysight E1459A/Z2404B User and SCPI Programming Guide 19
Installing and Configuring the E1459A Configuring for Installation
Setting the Logical Address
Each module within the VXIbus mainframe must be set to a unique logical
address. The setting is controlled by an 8 pin dip switch. This allows for values
from 0 to 255. The factory setting of this switch is decimal 144. No two modules
in the same mainframe can have the same logical address. The location is shown
in Figure 5.
Setting the Interrupt Priority
At power on, after a SYSRESET, or after resetting the module via the control
register, all masks will be cleared, interrupts will be disabled, and internal
triggering will be enabled. With interrupts enabled, an interrupt will be
generated whenever an edge occurs on a channel that has been enabled
properly.
The interrupt priority jumper selects which priority level will be asserted. As
shipped from the factory, the interrupt priority jumper should be in position 1. In
most applications this should not be changed. When set to level X interrupts are
disabled. The interrupt priority jumpers are identified on the sheet metal shield. A
hole has been cut into the shield for access to the jumpers. Interrupts can also be
disabled using the Control Register.
The jumper locations are shown in Figure 5. To change the setting, move the
jumper or jumpers to the desired setting. If the card uses two 2-pin jumpers
versus a single 4 pin jumper, the jumpers must all be placed in the same row for
proper operation.
Consult your mainframe manual to be sure that backplane
jumpers are configured correctly. If you are using the Keysight
E1401B Mainframe these jumpers are automatically set when the
card is installed.
20 Keysight E1459A/Z2404B User and SCPI Programming Guide
Configuring for Installation Installing and Configuring the E1459A
Figure 1-5 Keysight E1459A Logical Address Switch and IRQ Jumper Locations
Setting Input Threshold Levels
The threshold levels for each channel can be set independently. A six pin plug
with a two pin shorting jack is provided for each channel. The channel can be
identified from the silk-screen on the board. Each jumper is labeled JXCC, where
Keysight E1459A/Z2404B User and SCPI Programming Guide 21
Installing and Configuring the E1459A Configuring for Installation
12 Volt
24 Volt
48 Volt
5 Volt Settings
(Factory Default)
Ch 0 Ch 2
Ch 3
Ch 5
Ch 6
Ch 8
Ch 63
Ch 60
Ch 57 Ch 59
Ch 62
JM203
JM202
PET Time
Jumpers
.
Ch
1
Ch 61
.
J indicates jumper, X is a number that can be ignored and CC indicates channel
number. The default factory setting is for 5 volts. Pin 1 can be identified by the
square pad on the bottom of the board.
Figure 1-6 Input Threshold Level Jumpers and Watchdog Reset Time Jumpers
Setting the Reset Time on the Watchdog Timer
There are 2 jumpers located on the PC board used to control the reset time of the
Watchdog Timer (see Figure 6). The reset time is the maximum allowed time
between accesses to keep the Watchdog from asserting SYSRESET. The
Watchdog timer is reset by reading the Watchdog Control/Status register; use
22 Keysight E1459A/Z2404B User and SCPI Programming Guide
the DIAG:SYSR:STAT? command (see Chapter 3).
The following table shows the effect of the jumpers on the reset time. An X
means that the jumper is in place and O indicates the jumper is removed. The
factory default setting is 1.2 second.
Jumper Reset Time
600 ms 150 ms 1.2 sec Not Allowed
JM202 O X O X
JM203 O O X X
Configuring for Installation Installing and Configuring the E1459A
Connecting User Inputs
The Keysight E1459A Isolated Digital Input/Interrupt module consists of a
component module and a terminal block. User inputs for each channel consists
of a low and a high connection for each channel. The inputs will only detect
signals of a positive polarity. A logical "1" will only be detected if the high
terminal is at a higher potential than the low terminal. It must also meet the drive
requirements for the voltage threshold selected.
For each block of 16 channels an additional active low input and two active low
outputs are available. The table below lists the signal names and the associated
channels.
Port Channels External Trigger Data Available Interrupt
0 0 through 15 XTRIG0N DAV0N INTR0N
1 16 through 31 XTRIG1N DAV1N INTR1N
2 32 through 47 XTRIG2N DAV2N INTR2N
3 48 through 63 XTRIG3N DAV3N INTR3N
Figure 7 shows the front panel terminals and pinouts for the module. The cover
to the terminal module is silk-screened to indicate the function of each screw
terminal.
Keysight E1459A/Z2404B User and SCPI Programming Guide 23
Installing and Configuring the E1459A Configuring for Installation
A B C
32 CH 00 HI CH 00 LO
31 CH 01 HI CH 02 LO CH 01 LO
30 CH 02 HI CH 03 LO
29 CH 04 HI CH 03 HI CH 04 LO
28 CH 05 HI CH 05 LO
27 CH 06 HI CH 06 LO
26 CH 07 HI CH 07 LO
25 CH 08 HI CH 08 LO
24 CH 09 HI CH 09 LO
23 CH 10 HI CH 11 LO CH 10 LO
22 CH 11 HI CH 12 LO
21 CH 13 HI CH 12 HI CH 13 LO
20 CH 14 HI CH 14 LO
19 CH 15 HI CH 15 LO
18 CH 16 HI CH 16 LO
17 CH 17 HI CH 17 LO
16 CH 18 HI CH 18 LO
15 CH 19 HI CH 19 LO
14 CH 20 HI CH 20 LO
13 CH 21 HI CH 21 LO
12 CH 22 HI CH 23 LO CH 22 LO
11 CH 23 HI CH 24 LO
10 CH 25 HI CH 24 HI CH 25 LO
9 CH 26 HI CH 26 LO
8 CH 27 HI CH 27 LO
7 CH 28 HI CH 28 LO
6 CH 29 HI CH 29 LO
5 CH 30 HI CH 30 LO
4 CH 31 HI CH 31 LO
3 CH 32 HI CH 32 LO
2 CH 33 HI CH 33 LO
1 CH 34 HI CH 34 LO
A B C
32 CH 35 HI CH 35 LO
31 CH 36 HI CH 37 LO CH 36 LO
30 CH 37 HI CH 38 LO
29 CH 38 HI CH 39 HI CH 39 LO
28 CH 40 HI CH 40 LO
27 CH 41 HI CH 42 LO CH 41 LO
26 CH 42 HI CH 43 LO
25 CH 43 HI CH 44 HI CH 44 LO
24 CH 45 HI CH 45 LO
23 CH 46 HI CH 46 LO
22 CH 47 HI CH 47 LO
21 CH 48 HI CH 48 LO
20 CH 49 HI CH 49 LO
19 CH 50 HI CH 50 LO
18 CH 51 HI CH 51 LO
17 CH 52 HI CH 52 LO
16 CH 53 HI CH 53 LO
15 CH 54 HI CH 55 LO CH 54 LO
14 CH 55 HI CH 56 LO
13 CH 56 HI CH 57 HI CH 57 LO
12 CH 58 HI CH 58 LO
11 CH 59 HI CH 59 LO
10 CH 60 HI CH 61 LO CH 60 LO
9 CH 61 HI CH 62 LO
8 CH 62 HI CH 63 HI CH 63 LO
7
6
5 GND +5VTC GND
4 DAV3N INTR3N XTRIG3N
3 DAV2N INTR2N XTRIG2N
2 DAV1N INTR1N XTRIG1N
1 DAV0N INTR0N XTRIG0N
Figure 1-7 Front Panel Connections
24 Keysight E1459A/Z2404B User and SCPI Programming Guide
Configuring for Installation Installing and Configuring the E1459A
1
Set the extraction levers out.
2
Slide the into any slot
(except slot 0) until the backplane
connectors touch.
3
Seat the into the
mainframe by pushing in the
extraction levers
Extraction
Levers
4
Tighten the top and bottom screws to
secure the module to the mainframe.
To remove the from the mainframe
,
reverse the procedure.
NOTE: The extraction levers will not
seat the backplane connectors on older
VXIbus mainframes. You must manually
seat the connectors by pushing in the
module until the module's fron t panel is
flush with the front of the mainframe.
The extraction levers may be used to
guide or remove the .
module
module
module
module
Installing the Keysight E1459A in a VXIbus Mainframe
The Keysight E1459A may be installed in any C-size VXIbus mainframe
slot (except slot 0). Refer to Figure 8 to install the module in a
mainframe.
Figure 1-8 Installing the Keysight E1459A in a VXIbus Mainframe
To prevent electric shock, tighten faceplate screws when
installing module into mainframe.
Keysight E1459A/Z2404B User and SCPI Programming Guide 25
Installing and Configuring the E1459A Configuring for Installation
CH0 CH5
CH1
CH2
CH3
CH4
CH6
CH7
CH8
CH9
CH10
CH11
CH12
CH13
CH14
CH15
CH16
CH17
CH18
CH19
CH20
CH21
CH22
CH23
CH24
CH25
CH26
CH27
CH28
+5 GND
CH29
CH30
CH31
CH32
CH33
CH34
+5 GND
+5 GND
+5 GND
CH35
CH36
CH37
CH38
CH39
CH40
CH41
CH42
CH43
CH44
CH45
CH46
CH47
CH48
CH49
CH50
CH51
CH52
CH53
CH54
CH55
CH56
CH57
CH58
CH59
CH60
CH61
CH62
CH63
+5 GND
+5 GND
GNDDAVINTREXT
GNDDAVINTREXT
GNDDAVINTREXT
Not Used
Terminal Block
The Keysight E1459A includes both the input / interrupt module and a
screw-type standard terminal block. User inputs to the terminal block are to the
High and Low for each channel, +5Volt, Ground, Data Valid (DAV0 - DAV3),
External Trigger (XTRIG0 - XTRIG3), and Interrupt (INTR0 - INTR3) .
Figure 9 shows the Keysight E1459A’s standard screw-type terminal block
connectors and associated channel numbers. Use the guidelines below to wire
connections.
Figure 1-9 Keysight E1459A Standard Screw-type Terminal Block
Wiring Guidelines
– Be sure the wires make solid connections in the screw terminals.
– Maximum terminal wire size is No. 16 AWG. When wiring all channels, a
smaller gauge wire (No. 20 or 22 AWG) is recommended. Wire ends should
be stripped 5 to 6 mm (0.2 to 0.25 in.) and tinned to prevent single strands
from shorting to adjacent terminals.
26 Keysight E1459A/Z2404B User and SCPI Programming Guide
To prevent the spread of fire in the case of a fault, use
flame-rated field wiring whenever the input voltage will
exceed 30Vrms, 42Vpeak, or 60Vdc.
Configuring for Installation Installing and Configuring the E1459A
.
Wiring a Terminal Block
The following illustrations show how to connect field wiring to the terminal block.
Continued on Next Page
Keysight E1459A/Z2404B User and SCPI Programming Guide 27
Installing and Configuring the E1459A Configuring for Installation
5
Replace Wiring Exit Panel
Cut required
holes in panels
for wire exit
Keep wiring exit panel
hole as small as
possible
6
Replace Clear Cover
A. Hook in the top cover tabs
onto the fixture
B. Press down and
tighten screws
7
Install the Terminal
Module
HP E1459A
Module
8
Push in the Extraction Levers to Lock the
Terminal Module onto the HP E1459A
Extraction
Levers
.
28 Keysight E1459A/Z2404B User and SCPI Programming Guide
E1459A/Z2404B User and SCPI Programming Guide
2 Using the Keysight E1459A
Module
This chapter provides examples of using and programming the Keysight E1459A
using the Standard Commands for Programmable Instrumentation (SCPI). For
detailed information on all the SCPI commands for this module, refer to Chapter
3. Appendix B in this manual provides information on registers and
register-based programming.
If you are controlling the module by a high level language, such as
the downloaded SCPI driver or the VXIplug&play driver, do not do
register writes. This is because the high level driver will not know
the instrument state and an interrupt may occur causing the
driver and/or command module to fail.
The example programs in this chapter were developed with the ANSI C language
using the Keysight VISA extensions. For additional information, refer to the
Keysight VISA User’s Guide. These programs were written and tested in Microsoft
Visual C++ but should compile under any standard ANSI C compiler.
To run the programs you must have the Keysight SICL Library, the Keysight VISA
extensions, and an Keysight 82340 or 82341 GPIB module installed and properly
configured in your PC. An Keysight E1406 Command Module provides direct
access to the VXI backplane.
29
Using the Keysight E1459A Module Power-on / Reset States
Power-on / Reset States
At power-on or reset (*RST) the Keysight E1459A is set to the following
conditions:
– Watchdog timer is off (disabled).
– Clock Source is Internal
– Input Debounce Time is 18.0 S.
– DAV (Data Available) Event interrupts are disabled for all ports.
– Edge Event interrupts are disabled for all ports.
Also, refer to the
STATus:PRESet command in Chapter 3.
Example 1: Reset, Self Test, and Module ID
This first example resets the Keysight E1459A, performs the module self test, and
reads the module ID and description.
/* Self Test
This program resets the Keysight E1459A, performs a Self Test,
and reads the ID string
Created in Microsoft Visual C++ */
#include <visa.h>
#include <stdio.h>
#include <stdlib.h>
#define INSTR_ADDR "GPIB0::9::3::INSTR"
/* E1459A logical address */
int main()
{
ViStatus errStatus;
/* status from VISA call */
ViSession viRM;
/* Resource Mgr. session */
ViSession E1459;
/* session for Keysight E1459A */
char id_string [256] = {0};
/* ID string buffer */
char selftst_string[256] = {0};
/* Open a default Resource Manager */
30 Keysight E1459A/Z2404B User and SCPI Programming Guide
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