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A GREATER MEASURE OF CONFIDENCE
Model 7002 Specifications
SWITCHING & CONTROL
7002 Switch/Control Mainframe
400-Channel
System Throughput
300 channel per second scanning. The 7002
can scan through up to 300 channels per second. This scan process can be controlled by the
internal time base of the 7002 or through external triggers. The scan sequence is controlled by
what appears in the scan list. The scan list can
include channels, ranges of channels, and memory locations. This approach gives maximum
flexibility while obtaining maximum throughput.
Built-in Scan Control and Trigger Link. The
built-in scan control eliminates the need for the
computer to control every step of the test procedure. Simply program the 7002 to control the
channel spacing, scan spacing, and number of
scans. Trigger Link gives you access to six independent hardware trigger lines on a single cable.
Closed channel
Open channel
“Light Pen Keys” provide functional
programming with point and click.
Point and click the light pen on the
desired channel or crosspoint.
Matrix cards are displayed in RowColumn format. Only the available
rows and columns of the card are
displayed. Rows are horizontal and
columns are vertical.
Multiplexer card display. The first
row across represents channels 1 to
10. The second row is channels 11
to 20. Only the available channels
are displayed.
SYSTEM
CAPACITY: 10 plug-in cards per mainframe.
MEMORY: Batter y backed-up storage for 500 switch patterns.
SWITCH SETTLING TIME: Automatically selected by the mainframe
for each card. Additional time from 0 to 99999.999 seconds can
be added in 1ms increments.
TRIGGER SOURCES:
External Trigger (TTL-compatible, programmable edge,
600ns minimum pulse, rear panel BNC).
IEEE-488 bus (GET, *TRG)
Trigger Link
Manual (front panel)
Internal Timer, programmable from 0.5ms to 99999.999
seconds in 0.5ms increments.
STATUS OUTPUT: Channel Ready (TTL-compatible signal, rear
panel BNC). Low going pulse (10µs typical) issued after relay settling time. For different switch cards, 7002 will be set to the
slowest relay settling time.
SWITCHING SEQUENCE: Break-before-make (programmable).
MAINFRAME DIGITAL I/O: 4 open collector outputs (30V maxi-
mum pull up voltage, 100mA maximum sink current, 10Ω out-
put impedance), 1 TTL compatible input, 1 common.
RELAY DRIVE: 5A maximum for all 10 card slots.
CARD SIZE: 32mm high × 114mm wide × 272mm long (1
1
⁄4 in ×
4
1
⁄2 in × 10
3
⁄4 in).
CARD COMPATIBILITY: Fully compatible with all 7001 cards.
ANALOG BACKPLANE
SIGNALS: Four 3-pole rows (Hi, Lo, Guard). These signals provide
matrix and multiplexer expansion between cards within one
mainframe.
MAXIMUM VOLTAGE: 250V DC, 250V rms, 350V AC peak, signal
path to signal path or signal path to chassis.
MAXIMUM CURRENT: 1A peak.
PATH ISOLATION:
>10
10
Ω, <50pF path to path (any Hi, Lo, Guard to another
Hi, Lo, Guard)
>10
10
Ω, <50pF differential (Hi to Lo or Hi, Lo to Guard).
>10
9
Ω, <75pF path to chassis.
CHANNEL CROSSTALK: <–65dB @ 1MHz (50Ωload).
BANDWIDTH: <3dB loss at 100MHz (50Ω load).
THROUGHPUT
EXECUTION SPEED OF SCAN LIST (channels or memory locations per
second): Break-Before-Make: OFF 300; ON 270.
TRIGGER EXECUTION TIME (maximum time from activation of
Trigger Source to start of switch open or close
2
):
SOURCE LATENCY JITTER
GET
1
100 µs <50 µs
*TRG
1
5.0 ms
Trigger Link 100 µs <13 µs
External 100 µs <13 µs
Timer 100 µs <13 µs
1
Assuming no IEEE-488 commands are pending execution.
2
Excluding switch settling time.
IEEE-488 COMMAND EXECUTION TIME
COMMAND EXECUTION TIME
1
:ROUT:CLOS (@1!1) <5ms + Relay Settle Time
:ROUT:OPEN (@1!1) <5ms + Relay Settle Time
:ROUT:MEM:REC M1 <3ms + 2×Relay Settle Time
(BBM ON)
< 3ms + Relay Settle Time
(BBM OFF)
1
Measured from the time at which the command terminator is taken from the
bus to relay energize. With display OFF.
IEEE-488 BUS
STANDARDS CONFORMANCE: Conforms to SCPI-
1990, IEEE-488.2 and IEEE-488.1.
MULTILINE COMMANDS: DCL, LLO, SDC, GET, GTL,
UNT, UNL, SPE, SPD.
UNILINE COMMANDS: IFC, REN, EOI, SRQ, ATN.
INTERFACE FUNCTIONS: SH1, AH1,T5, TE0, L4, LE0,
SR1, RL1, PP0, DC1,DT1, C0, E1.
All aspects of 7002 operation are available from the front
panel or over the IEEE-bus interface. The 7002 conforms to
IEEE- 488.2 and the SCPI (Standard Commands for
Programmable Instruments) command language protocol.
• Scan List
• Scan Spacing
• Channel Spacing
• Number of Scans
• Number of Channels
• Trigger Source
• Single Channel Mode
• Channel Restrictions
• Save Mainframe Configuration Setups
• Digital I/O
• Card Pair
• Channel Delay
• Number of Poles
• Channel Pattern Memory
GENERAL
DISPLAY: Dual-line vacuum fluorescent. 1st line: 20-character
alphanumeric. 2nd line: 32-character alphanumeric. Channel
status LED grid.
LIGHT PEN OPTION: Provides interactive programming of chan-
nels, cross points, scan lists, and memory.
REAR PANEL CONNECTORS: IEEE-488; 9-pin DB9 Female; 8-pin
micro DIN for Trigger Link; 8-pin micro DIN for Trigger Link
expansion; BNC for External Trigger; BNC for Channel Ready
POWER: 100V to 240Vrms, 50/60Hz, 110VA maximum.
EMC: Conforms to European Union Directive 89/336/ EEC.
SAFETY: Conforms to European Union Directive 73/23/ EEC
(meets EN61010-1/IEC 1010).
EMI/RFI: Meets VDE 0871B and FCC Class B.
ENVIRONMENT: Operating: 0°C to 50°C, <80% RH (0°C to
35°C). Storage: –25°C to +65°C.
DIMENSIONS, WEIGHT: 178mm high × 438mm wide × 448mm
deep (7 in × 17
1
⁄4 in × 17
5
⁄8 in). Net weight 8.6kg (19 lb).