Keithley KPCI-3101 Series, KPCI-3104 Series, KPCI-3103 Series, KPCI-3102 Series User Manual

User’s Manual

KPCI-3101, -3102, -3103, -3104 Series

PCI Bus Data Acquisition Boards

98150 Rev. A / 10-99

WARRANTY

Hardware

Keithley Instruments, Inc. warrants that, for a period of three (3) years from the date of shipment, the Keithley Hardware product will be free from defects
in materials or workmanship. This warranty will be honored provided the defect has not been caused by use of the Keithley Hardware not in accordance
with the instructions for the product. This warranty shall be null and void upon: (1) any modification of Keithley Hardware that is made by other than
Keithley and not approved in writing by Keithley or (2) operation of the Keithley Hardware outside of the environmental specifications therefore.

Upon receiving notification of a defect in the Keithley Hardware during the warranty period, Keithley will, at its option, either repair or replace such
Keithley Hardware. During the first ninety days of the warranty period, Keithley will, at its option, supply the necessary on site labor to return the product
to the condition prior to the notification of a defect. Failure to notify Keithley of a defect during the warranty shall relieve Keithley of its obligations and
liabilities under this warranty.

Other Hardware

The portion of the product that is not manufactured by Keithley (Other Hardware) shall not be covered by this warranty , and K eithley shall ha v e no duty of
obligation to enforce any manufacturers' warranties on behalf of the customer. On those other manufacturers’ products that Keithley purchases for resale,
Keithley shall have no duty of obligation to enforce any manufacturers’ warranties on behalf of the customer.

Software

Keithley warrants that for a period of one (1) year from date of shipment, the Keithley produced portion of the software or firmware (K eithley Softw are) will
conform in all material respects with the published specifications provided such Keithley Software is used on the product for which it is intended and other­wise in accordance with the instructions therefore. Keithley does not warrant that operation of the Keithley Software will be uninterrupted or error-free and/
or that the Keithley Software will be adequate for the customer's intended application and/or use. This warranty shall be null and void upon any modification
of the Keithley Software that is made by other than Keithley and not approv ed in writing by Keithley.

If Keithley receives notification of a K eithley Software nonconformity that is cov ered by this warranty during the warranty period, Keithle y will revie w the
conditions described in such notice. Such notice must state the published specification(s) to which the Keithley Software fails to conform and the manner
in which the Keithley Software fails to conform to such published specification(s) with sufficient specificity to permit Keithley to correct such nonconfor­mity. If Keithley determines that the Keithley Software does not conform with the published specifications, Keithley will, at its option, provide either the
programming services necessary to correct such nonconformity or develop a program change to bypass such nonconformity in the Keithley Software.
Failure to notify Keithley of a nonconformity during the warranty shall relieve Keithley of its obligations and liabilities under this warranty.

Other Software

OEM software that is not produced by Keithley (Other Software) shall not be covered by this warranty, and Keithley shall have no duty or obligation to
enforce any OEM's warranties on behalf of the customer.

Other Items

Keithley warrants the following items for 90 days from the date of shipment: probes, cables, rechargeable batteries, diskettes, and documentation.

Items not Covered under Warranty

This warranty does not apply to fuses, non-rechargeable batteries, damage from battery leakage, or problems arising from normal wear or failure to follow
instructions.

Limitation of Warranty

This warranty does not apply to defects resulting from product modification made by Purchaser without Keithley's express written consent, or by misuse
of any product or part.

Disclaimer of Warranties

EXCEPT FOR THE EXPRESS WARRANTIES ABOVE KEITHLEY DISCLAIMS ALL OTHER WARRANTIES, EXPRESS OR IMPLIED,
INCLUDING WITHOUT LIMITATION, ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
PURPOSE. KEITHLEY DISCLAIMS ALL WARRANTIES WITH RESPECT TO THE OTHER HARDWARE AND OTHER SOFTWARE.

Limitation of Liability

KEITHLEY INSTRUMENTS SHALL IN NO EVENT, REGARDLESS OF CAUSE, ASSUME RESPONSIBILITY FOR OR BE LIABLE FOR: (1)
ECONOMICAL, INCIDENTAL, CONSEQUENTIAL, INDIRECT, SPECIAL, PUNITIVE OR EXEMPLARY DAMAGES, WHETHER CLAIMED
UNDER CONTRACT, TORT OR ANY OTHER LEGAL THEORY, (2) LOSS OF OR DAMAGE TO THE CUSTOMER'S DATA OR PROGRAM­MING, OR (3) PENALTIES OR PENALTY CLAUSES OF ANY DESCRIPTION OR INDEMNIFICATION OF THE CUSTOMER OR OTHERS FOR
COSTS, DAMAGES, OR EXPENSES RELATED TO THE GOODS OR SERVICES PROVIDED UNDER THIS WARRANTY.

Keithley Instruments, Inc.

BELGIUM: Keithley Instruments B.V.
CHINA: Keithley Instruments China
FRANCE: Keithley Instruments Sarl
GERMANY: Keithley Instruments GmbH Landsberger Strasse 65 • D-82110 Germering • 089/84 93 07-40 • Fax: [phone]
GREAT BRITAIN: Keithley Instruments Ltd The Minster • 58 Portman Road • Reading, Berkshire RG30 1EA • 0118-9 57 56 66 • Fax: [phone]
INDIA: Keithley Instruments GmbH Flat 2B, WILOCRISSA • 14, Rest House Crescent • Bangalore 560 001 • 91-80-509-1320/21 • Fax: [phone]
ITALY: Keithley Instruments s.r.l. Viale S. Gimignano, 38 • 20146 Milano • 02/48 30 30 08 • Fax: [phone]
NETHERLANDS: Keithley Instruments B.V. Postbus 559 • 4200 AN Gorinchem • 0183-635333 • Fax: [phone]
SWITZERLAND: Keithley Instruments SA
TAIWAN: Keithley Instruments Taiwan 1 Fl. 85 Po Ai Street • Hsinchu, Taiwan, R.O.C. • 886-3572-9077• Fax: [phone]

• 28775 Aurora Road • Cleveland, OH 44139 • 440-248-0400 • Fax: [phone] • http://www.keithley.com

Bergensesteenweg 709 • B-1600 Sint-Pieters-Leeuw • 02/363 00 40 • Fax: [phone]

Yuan Chen Xin Building, Room 705 • 12 Yumin Road, Dewai, Madian • Beijing 100029 • 8610-62022886 • F ax: 8610-62022892

B.P. 60 • 3, allée des Garays • 91122 Palaiseau Cédex • 01 64 53 20 20 • Fax: [phone]

Kriesbachstrasse 4 • 8600 Dübendorf • 01-821 94 44 • Fax: [phone]

6/99

KPCI-3101, -3102, -3103, -3104 Series

PCI Bus Data Acquisition Board

User’s Manual

DriverLINX, SSTNET, and LabOBJX are registered trademarks and DriverLINX/VB are trademarks of Scientific Software Tools, Inc.

Microsoft and Windows are registered trademarks and Visual C++ and Visual Basic are trademarks of Microsoft Corporation.

Borland is a registered trademark and Borland C++, Delphi, and Turbo Pascal are trademarks of Borland International, Inc.

IBM is a registered trademark of International Business Machines Corporation.

Acrobat is a registered trademark of Adobe Systems Incorporated.

All other brand and product names are trademarks or registered trademarks of their respective companies.

Copyright © Keithley Instruments, Inc., 1999.

All rights reserved. Reproduction or adaptation of any part of this documentation beyond that permitted by Section 117

of the 1979 United States Copyright Act without permission of the Copyright owner is unlawful.

©1999, Keithley Instruments, Inc.

All rights reserved.

Cleveland, Ohio, U.S.A.

First Printing, October 1999

Document Number: 98150 Rev. A

Manual Print History

The print history shown below lists the printing dates of all Revisions and Addenda created for this manual. The Revision
Level letter increases alphabetically as the manual undergoes subsequent updates. Addenda, which are released between Revi­sions, contain important change information that the user should incorporate immediately into the manual. Addenda are num­bered sequentially. When a new Revision is created, all Addenda associated with the previous Revision of the manual are
incorporated into the new Revision of the manual. Each new Revision includes a revised copy of this print history page.

Revision A (Document Number 98150).............................................................................................October 1999

All Keithley product names are trademarks or registered trademarks of Keithley Instruments, Inc.
Other brand and product names are trademarks or registered trademarks of their respective holders.

Safety Precautions

The following safety precautions should be observed before using
this product and any associated instrumentation. Although some in­struments and accessories would normally be used with non-haz­ardous voltages, there are situations where hazardous conditions
may be present.

This product is intended for use by qualified personnel who recog­nize shock hazards and are familiar with the safety precautions re­quired to avoid possible injury. Read the operating information
carefully before using the product.

The types of product users are:

Responsible body

and maintenance of equipment, for ensuring that the equipment is
operated within its specifications and operating limits, and for en­suring that operators are adequately trained.

Operators

trained in electrical safety procedures and proper use of the instru­ment. They must be protected from electric shock and contact with
hazardous live circuits.

Maintenance personnel

to keep it operating, for example, setting the line voltage or replac­ing consumable materials. Maintenance procedures are described in
the manual. The procedures explicitly state if the operator may per­form them. Otherwise, they should be performed only by service
personnel.

Service personnel

safe installations and repairs of products. Only properly trained ser­vice personnel may perform installation and service procedures.

is the individual or group responsible for the use

use the product for its intended function. They must be

perform routine procedures on the product

are trained to work on live circuits, and perform

Users of this product must be protected from electric shock at all
times. The responsible body must ensure that users are prevented
access and/or insulated from every connection point. In some cases,
connections must be exposed to potential human contact. Product
users in these circumstances must be trained to protect themselves
from the risk of electric shock. If the circuit is capable of operating
at or above 1000 volts,

exposed.

As described in the International Electrotechnical Commission
(IEC) Standard IEC 664, digital multimeter measuring circuits
(e.g., Keithley Models 175A, 199, 2000, 2001, 2002, and 2010) are
Installation Category II. All other instruments’ signal terminals are
Installation Category I and must not be connected to mains.

Do not connect switching cards directly to unlimited power circuits.
They are intended to be used with impedance limited sources.
NEVER connect switching cards directly to AC mains. When con­necting sources to switching cards, install protective devices to lim­it fault current and voltage to the card.

Before operating an instrument, make sure the line cord is connect­ed to a properly grounded power receptacle. Inspect the connecting
cables, test leads, and jumpers for possible wear, cracks, or breaks
before each use.

For maximum safety, do not touch the product, test cables, or any
other instruments while power is applied to the circuit under test.
ALWAYS remove power from the entire test system and discharge
any capacitors before: connecting or disconnecting cables or jump­ers, installing or removing switching cards, or making internal
changes, such as installing or removing jumpers.

no conductive part of the circuit may be

Exercise extreme caution when a shock hazard is present. Lethal
voltage may be present on cable connector jacks or test fixtures. The
American National Standards Institute (ANSI) states that a shock
hazard exists when voltage levels greater than 30V RMS, 42.4V
peak, or 60VDC are present.

that hazardous voltage is present in any unknown circuit bef ore
measuring.

A good safety practice is to expect

Do not touch any object that could provide a current path to the
common side of the circuit under test or power line (earth) ground.
Always make measurements with dry hands while standing on a
dry, insulated surface capable of withstanding the voltage being
measured.

The instrument and accessories must be used in accordance with its
specifications and operating instructions or the safety of the equip­ment may be impaired.

Do not exceed the maximum signal levels of the instruments and ac­cessories, as defined in the specifications and operating informa­tion, and as shown on the instrument or test fixture panels, or
switching card.

The

WARNING

result in personal injury or death. Alw ays read the associated infor ­mation very carefully before performing the indicated procedure.

The

CAUTION

damage the instrument. Such damage may invalidate the warranty.

Instrumentation and accessories shall not be connected to humans.

heading in a manual explains dangers that might

heading in a manual explains hazards that could

When fuses are used in a product, replace with same type and rating
for continued protection against fire hazard.

Chassis connections must only be used as shield connections for
measuring circuits, NOT as safety earth ground connections.

If you are using a test fixture, keep the lid closed while power is ap­plied to the device under test. Safe operation requires the use of a
lid interlock.

If a screw is present, connect it to safety earth ground using the
wire recommended in the user documentation.

!

The symbol on an instrument indicates that the user should re­fer to the operating instructions located in the manual.

The symbol on an instrument shows that it can source or mea­sure 1000 volts or more, including the combined effect of normal
and common mode voltages. Use standard safety precautions to
avoid personal contact with these voltages.

Before performing any maintenance, disconnect the line cord and
all test cables.

To maintain protection from electric shock and fire, replacement
components in mains circuits, including the power transformer, test
leads, and input jacks, must be purchased from Keithley Instru­ments. Standard fuses, with applicable national safety approvals,
may be used if the rating and type are the same. Other components
that are not safety related may be purchased from other suppliers as
long as they are equivalent to the original component. (Note that se­lected parts should be purchased only through Keithley Instruments
to maintain accuracy and functionality of the product.) If you are
unsure about the applicability of a replacement component, call a
Keithley Instruments office for information.

To clean an instrument, use a damp cloth or mild, water based
cleaner. Clean the exterior of the instrument only. Do not apply
cleaner directly to the instrument or allow liquids to enter or spill
on the instrument. Products that consist of a circuit board with no
case or chassis (e.g., data acquisition board for installation into a
computer) should never require cleaning if handled according to in­structions. If the board becomes contaminated and operation is af­fected, the board should be returned to the factory for proper
cleaning/servicing.

Rev. 2/99

1 Overview

Features............................................................................................................................................................... 1-2

DriverLINX software.......................................................................................................................................... 1-3

Viewing the KPCI-3101–4 series documentation online.................................................................................... 1-4

System requirements........................................................................................................................................... 1-5

Software .............................................................................................................................................................. 1-5

Accessories.......................................................................................................................................................... 1-6

Table of Contents

2 Principles of Operation

Analog input features.......................................................................................................................................... 2-2

Input resolution ........................................................................................................................................... 2-3

Analog input channels................................................................................................................................. 2-3

Input ranges and gains................................................................................................................................. 2-4

A/D sample clock sources........................................................................................................................... 2-6

Analog input conversion modes.................................................................................................................. 2-7

Triggers..................................................................................................................................................... 2-10

Data format ............................................................................................................................................... 2-14

Data transfer.............................................................................................................................................. 2-14

Error conditions......................................................................................................................................... 2-15

Analog output features...................................................................................................................................... 2-16

Output resolution....................................................................................................................................... 2-16

Analog output channels............................................................................................................................. 2-16

Output ranges and gains............................................................................................................................ 2-16

Analog output conversion modes.............................................................................................................. 2-17

Data format ............................................................................................................................................... 2-17

Digital I/O features............................................................................................................................................ 2-17

Digital I/O lines......................................................................................................................................... 2-17

Combining or splitting logical channels ................................................................................................... 2-18

Using single value and continuous digital input....................................................................................... 2-18

Counter/Timer features ..................................................................................................................................... 2-19

Counter/Timer channels............................................................................................................................ 2-19

C/T Clock sources..................................................................................................................................... 2-19

Gate types.................................................................................................................................................. 2-21

Pulse outputs ............................................................................................................................................. 2-22

Counter/Timer operation modes ............................................................................................................... 2-22

i

3 Installation and Configuration

Unpacking............................................................................................................................................................ 3-2

Installing the software ......................................................................................................................................... 3-2

Software options.......................................................................................................................................... 3-2

Installing DriverLINX................................................................................................................................. 3-4

Installing application software and drivers.................................................................................................. 3-4

Installing the board.............................................................................................................................................. 3-5

Setting up the computer............................................................................................................................... 3-5

Selecting an expansion slot ......................................................................................................................... 3-5

Inserting the KPCI-3101–4 series board in the computer ........................................................................... 3-6

Configuring the board to work with DriverLINX............................................................................................... 3-7

Checking the combined board and DriverLINX installations..................................................................... 3-7

Attaching the STA-300 screw terminal panel ..................................................................................................... 3-8

Jumper W1................................................................................................................................................. 3-10

Resistors .................................................................................................................................................... 3-11

Screw terminal assignments ...................................................................................................................... 3-11

Power......................................................................................................................................................... 3-14

Wiring signals.................................................................................................................................................... 3-14

Connecting analog input signals................................................................................................................ 3-15

Connecting analog output signals.............................................................................................................. 3-19

Connecting digital I/O signals................................................................................................................... 3-20

Connecting counter/timer signals.............................................................................................................. 3-21

Attaching the STP-68 screw terminal panel...................................................................................................... 3-25

4 T esting the Board

DriverLINX analog I/O panel ............................................................................................................................. 4-2

5 Calibration

Introduction ......................................................................................................................................................... 5-2

Objectives.................................................................................................................................................... 5-2

Calibration summary................................................................................................................................... 5-2

Equipment.................................................................................................................................................... 5-2

Calibration procedure.................................................................................................................................. 5-3

Preparing for the calibrations ...................................................................................................................... 5-3

Calibrating the analog inputs....................................................................................................................... 5-3

Calibrating the analog outputs..................................................................................................................... 5-3

6 T roubleshooting

General checklist ................................................................................................................................................. 6-2

Using the DriverLINX event viewer................................................................................................................... 6-2

Device initialization error messages............................................................................................................ 6-2

Problem isolation................................................................................................................................................. 6-3

Troubleshooting table.......................................................................................................................................... 6-4

Testing the board and host computer................................................................................................................... 6-5

Testing the accessory slot and I/O connections................................................................................................... 6-5

Technical support ................................................................................................................................................ 6-6

Returning equipment to Keithley ........................................................................................................................ 6-7

ii

A Specifications

Supported capabilities........................................................................................................................................ A-9

B Connector Pin Assignments
C Systematic Problem Isolation

Problem isolation Scheme A: basic system ............................................................................................... C-3

Problem isolation Scheme B: installation.................................................................................................. C-5

Problem isolation Scheme C: application software ................................................................................. C-10

Problem isolation Scheme D: expansion slot connectors ........................................................................ C-12

Problem isolation Scheme E: user wiring................................................................................................ C-13

Problem isolation Scheme F: the board ................................................................................................... C-13

Problem isolation Scheme G: verification of problem solution............................................................... C-13

Specified hardware I/O tests ............................................................................................................................ C-14

Analog input hardware test ...................................................................................................................... C-14

Analog output hardware test .................................................................................................................... C-17

General-purpose digital I/O hardware test............................................................................................... C-20

Specified software I/O tests ............................................................................................................................. C-20

Analog input software test ....................................................................................................................... C-20

Analog output software test ..................................................................................................................... C-22

General-purpose digital I/O software test................................................................................................ C-25

iii

iv

List of Illustrations

2 Principles of Operation

Figure 2-1 Block diagram of the KPCI-3101–4 series boards...................................................................................... 2-2

Figure 2-2 Continuous post-trigger mode without triggered scan.............................................................................. 2-11

Figure 2-3 Continuous post-trigger mode with triggered scan ................................................................................... 2-11

Figure 2-4 Continuous pre-trigger mode .................................................................................................................... 2-12

Figure 2-5 Continuous pre-trigger mode with triggered scan..................................................................................... 2-12

Figure 2-6 Continuous about-trigger mode ................................................................................................................ 2-13

Figure 2-7 Continuous about-trigger mode with triggered scan................................................................................ 2-14

Figure 2-8 Counter/Timer channel ............................................................................................................................ 2-19

Figure 2-9 Example of a Low-to-High pulse output type........................................................................................... 2-22

Figure 2-10 Connecting event counting signals (shown for clock input 0 and external gate 0)................................... 2-23

Figure 2-11 Example of event counting ....................................................................................................................... 2-24

Figure 2-12 Connecting frequency measurement signals without an external gate input (shown for clock input 0) .. 2-24

Figure 2-13 Connecting frequency measurement signals (shown for clock input 0 and external gate 0).................... 2-25

Figure 2-14 Example of frequency measurement......................................................................................................... 2-26

Figure 2-15 Connecting rate generation sIgnals (shown for counter 0; a software gate is used)................................. 2-27

Figure 2-16 Example of rate generation mode with a 75% duty cycle........................................................................ 2-28

Figure 2-17 Example of rate generation mode with a 25% duty cycle......................................................................... 2-28

Figure 2-18 Connecting one-shot signals (shown for counter output 0 and gate 0)..................................................... 2-29

Figure 2-19 Example of one-shot mode using a 99.99% duty cycle............................................................................ 2-30

Figure 2-20 Example of one-shot mode using a 50% duty cycle................................................................................. 2-30

Figure 2-21 Example of repetitive one-shot mode using a 99.99% duty cycle............................................................ 2-31

Figure 2-22 Example of repetitive one-shot mode using a 50% duty cycle................................................................. 2-32

v

3 Installation and Configuration

Figure 3-1 Inserting the KPCI-3101–4 series board in the computer ........................................................................... 3-6

Figure 3-2 Attaching the STA-300 screw terminal panel to a KPCI-3101–4 series board........................................... 3-8

Figure 3-3 Layout of the STA-300 screw terminal panel ............................................................................................. 3-9

Figure 3-4 Removal of jumper W1 for remote ground sensing .................................................................................. 3-10

Figure 3-5 Connecting single-ended voltage inputs (shown for channels 0, 1, and 8) ............................................... 3-15

Figure 3-6 Connecting pseudo-differential voltage inputs (shown for channels 0, 1, and 8) ..................................... 3-16

Figure 3-7 Connecting differential voltage inputs (shown for channel 0) .................................................................. 3-17

Figure 3-8 Connecting differential voltage inputs from a grounded signal source (shown for channel 0) ................ 3-18

Figure 3-9 Connecting current inputs (shown for channel 0) ..................................................................................... 3-18

Figure 3-10 Connecting analog output voltages using an external +10V reference (shown for channel 0)................. 3-19

Figure 3-11 Connecting analog output voltages using the board’s internal +10V reference (shown for channel 0) ... 3-19

Figure 3-12 Connecting digital inputs (shown for channels 0 and 1, port A)............................................................... 3-20

Figure 3-13 Connecting digital outputs (shown for channel 0, port B) ........................................................................ 3-20

Figure 3-14 Connecting event counting signals (shown for clock input 0 and external gate 0)................................... 3-21

Figure 3-15 Connecting event counting signals without an external gate input (shown for clock input 0) ................. 3-22

Figure 3-16 Cascading counters (shown for event counting using counters 0 and 1 and external gate 0)................... 3-22

Figure 3-17 Connecting frequency measurement signals (shown for clock input 0 and external gate 0) .................... 3-23

Figure 3-18 Connecting pulse output signals (shown for counter output 0 and gate 0) ............................................... 3-23

Figure 3-19 Cascading counters (shown for rate generation using counters 0 and 1 and external gate 0)................... 3-24

Figure 3-20 Cascading counters (shown for one-shot using counters 0 and 1 and external gate 1)............................. 3-24

vi

List of Tables

1 Overview

Table 1-1 Differences among KPCI-3101–4 Series boards........................................................................................ 1-2

Table 1-2 System requirements................................................................................................................................... 1-5

2 Principles of Operation

Table 2-1 Supported analog input resolutions............................................................................................................. 2-3

Table 2-2 Gains and effective ranges.......................................................................................................................... 2-5

Table 2-3 Maximum frequency supported.................................................................................................................. 2-6

Table 2-4 Maximum retrigger frequency.................................................................................................................... 2-8

Table 2-5 Supported analog output resolutions...................................................................................................... 2-16

Table 2-6 Extended channel addressing of digital I/O channels using DriverLINX................................................. 2-18

3 Installation and Configuration

Table 3-1 Analog input screw terminal assignments on the STA-300...................................................................... 3-12

Table 3-2 Analog output and power screw terminal assignments on the STA-300.................................................. 3-13

Table 3-3 Counter/Timer and digital I/O screw terminal assignments on the STA-300........................................... 3-13

6 Troubleshooting

Table 6-1 Troubleshooting problems.......................................................................................................................... 6-4

A Specifications

Table A-1 A/D subsystem specifications.................................................................................................................... A-2

Table A-2 D/A subsystem specifications.................................................................................................................... A-4

Table A-3 DIN/DOUT subsystem specifications........................................................................................................ A-5

Table A-4 C/T subsystem specifications..................................................................................................................... A-6

Table A-5 Power, physical, and environmental specifications................................................................................... A-7

Table A-6 Connector specifications............................................................................................................................ A-7

Table A-7 STA-300 specifications.............................................................................................................................. A-8

Table A-8 CAB-305 cable specifications.................................................................................................................... A-8

Table A-9 KPCI-3101–4 series supported options...................................................................................................... A-9

vii

B Connector Pin Assignments

Table B-1 Pin assignments for connector J1 on the KPCI-3101–4 series boards....................................................... B-2

Table B-2 Pin assignments for connector J1 on the STA-300 .................................................................................... B-3

Table B-3 Pin assignments for connector J2 on the STA-300 .................................................................................... B-4

C Systematic Problem Isolation

Table C-1 Wiring for analog input hardware test using an STA-300 screw terminal accessory connected

to the Analog I/O connections ........................................................................................................... C-15

Table C-2 Terminals on STA-300 screw terminal accessory to which DVM/DMM will be connected

during analog output hardware test.................................................................................................... C-17

Table C-3 Test connections and correct readings for zero-voltage analog output, using an STA-300 screw

terminal accessory connected to J1.................................................................................................... C-19

Table C-4 Test connections and correct readings for mid-range analog output, using an STA-300 screw

terminal accessory connected to the upper “Analog” I/O connector................................................. C-19

Table C-5 Wiring for analog input hardware test using an STA-300 screw terminal accessory connected

to the Analog I/O connections ...........................................................................................................C-21

Table C-6 Terminals on STA-300 screw terminal accessory to which DVM/DMM will be connected

during analog output hardware test.................................................................................................... C-23

Table C-7 Test connections and correct readings for zero-voltage analog output, using an STA-300 screw

terminal accessory connected to J1.................................................................................................... C-24

Table C-8 Test connections and correct readings for mid-range analog output, using an STA-300 screw

terminal accessory connected to the KPCI-3101–4 board................................................................. C-24

viii

1

Overview

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1-2 Overview KPCI-3101 — KPCI-3104 Series User’s Manual

Features

The KPCI-3101–4 Series is a family of low-cost, multifunction data acquisition boards for the
PCI bus. The KPCI-3101–4 Series consists of the following boards: KPCI-3101, KPCI-3102,
KPCI-3103, and KPCI-3104. These board types differ in analog I/O resolution, analog input
sample frequency, analog input ranges, and the number of analog output channels, as shown in

Table 1-1.

Table 1-1

Differences among KPCI-3101–4 Series boards

Board Type

Analog I/O
Resolution

Analog Input
Sample Frequency

Analog Input
Ranges

1

Analog Output
Channels

KPCI-3101 12 bit 225kHz ±10V, 0 to 10V 0
KPCI-3102 12 bit 225kHz ±10V, 0 to 10V 2
KPCI-3103 12 bit 400kHz ±10V, 0 to 10V 0
KPCI-3104 12 bit 400kHz ±10V, 0 to 10V 2

1

Assumes a gain of 1. Using these ranges with gains of 2, 4, or 8 yields a number of effective input ranges; refer to

page 2-4

for more information.

All KPCI-3101–4 Series boards share the following major features:

PCI bus mastering capability for analog inputs
16 single-ended or pseudo-differential analog input channels, or 8 differential analog input

channels (for information on pseudo-differential analog input channels, see “Connecting

pseudo-differential voltage inputs” in Section 3)

Signal conditioning through connections to 5B Series backplanes
Input gains of 1, 2, 4, and 8
Continuously-paced and triggered scan capability
A 1024-location channel-gain list that supports sampling analog input channels at the same

or different gains in sequential or random order
Up to 256 scans per trigger for a total of 262,144 samples per trigger in triggered scan mode
Internal and external clock sources for the analog input subsystem
Digital TTL triggering for the analog input subsystem
Software calibration of the analog I/O circuitry
Two 8-bit digital ports programmable as inputs or outputs on a per-port basis; digital input

lines from these lines can be included as part of the analog input channel-gain list to corre­late the timing of analog and digital events; digital outputs can drive external solid-state
relays

One 7-bit digital I/O port programmable as a general-purpose (non-clocked) input or output
port

Four user counter/timers programmable for event counting, frequency measurement, rate
generation (continuous pulse output), one-shot pulse output, and repetitive one-shot pulse
output

Programmable gate types
Programmable pulse output polarities (output types) and duty cycles

For a discussion of these features in detail, refer to Section 2.

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KPCI-3101 — KPCI-3104 Series User’s Manual Overview 1-3

DriverLINX software

The following software is available for use with the KPCI-3101–4 Series board:

KPCI-3101–4 Series standard software package — Shipped with KPCI-3101–4 Series

boards. Includes DriverLINX for Microsoft Windows and function libraries for writing
application programs under Windows in a high-level language such as C/C++, Visual Basic,
Delphi, and Test Point; LabVIEW support files; utility programs; and language-specific
example programs.

DriverLINX — the high-performance real-time data-acquisition device drivers for W indo ws

application development includes:

DriverLINX API DLLs and drivers supporting the KPCI-3101–4 Series hardware
Analog I/O Test Panel — a DriverLINX program that verifies the installation and opera-

tion of your KPCI-3101–4 Series board and demonstrates several virtual bench-top
instruments

Learn DriverLINX — an interactive learning and demonstration program for Driv erLINX

that includes a Digital Storage Oscilloscope

Source Code — for the sample programs
DriverLINX Application Programming Interface files — for the KPCI-3101–4 Series

interfaces

DriverLINX Calibration Utility — used to calibrate the ADC and DAC functions of the

KPCI-3101–4 Series board

DriverLINX On-line Help System — provides immediate help as you operate Driver-

LINX

Supplemental Documentation — on DriverLINX installation and configuration; analog

and digital I/O programming; counter/timer programming; technical reference; and infor­mation specific to the KPCI-3101–4 Series hardware.

•

1-4 Overview KPCI-3101 — KPCI-3104 Series User’s Manual

Viewing the KPCI-3101–4 series documentation online

The DriverLINX Manuals and this manual have been provided in electronic form (in PDF file
format) on the KPCI-3101–4 Series CD-ROM. To vie w these documents, you need to install Rev

3.01 or later of Adobe Acrobat Reader on your hard drive (refer to DriverLINX for installation
instructions).

View the KPCI-3101–4 Series documentation by clicking the manual title.
Here are a few helpful hints about using Adobe Acrobat Reader:

To navigate to a specific section of the document, click a heading from the table of contents
on the left side of the document.

Within the document, click the text shown in blue to jump to the appropriate reference (the
pointer changes from a hand to an index finger).

To go back to the page from which the jump was made, click the right mouse button and Go

Back, or from the main menu, click View , then Go Back .

To print the document, from the main menu, click File , then Print .
T o increase or decrease the size of the displayed document, from the main menu, click View ,

then Zoom .
By default, text and monochrome images are smoothed in Acrobat Reader, resulting in

blurry images. If you wish, you can turn smoothing off by clicking File , then Preferences/

General , and unchecking Smooth Text and Monochrome Images .

•

•

•

•

•

KPCI-3101 — KPCI-3104 Series User’s Manual Overview 1-5

System requirements

The system capabilities required to run the KPCI-3101–4 Series board, and to use the Driver­LINX software supplied with the board, are listed in Table 1-2.

Table 1-2

System requirements

CPU Type
Operating system

Memory

Hard disk space

Other

*Any CD-ROM drive that came installed with the required computer should be satisfactory. However, if you have

post-installed an older CD-ROM drive or arrived at your present system by updating the microprocessor or replacing
the motherboard, some early CD-ROM drives may not support the long file names often used in 32 bit Windows files.

Pentium or higher processor on motherboard with PCI bus version 2.1
Windows 95 or 98
Windows NT version 4.0 or higher
16 MB or greater RAM when running Windows 95 or 98
32 MB or greater RAM when running Windows NT
4 MB for minimum installation
50 MB for maximum installation
A CD-ROM drive*
A free PCI-bus expansion slot capable of bus mastering
Enough reserve computer power supply capacity to power the

KPCI-3101–4 Series board, which draws 0.9A at 5VDC and 48mA at
+12VDC.

A VGA, or compatible, display (640 x 480 or higher, 256 colors
recommended)

Software

The user can select a fully integrated data acquisition software package such as TestPoint or
LabVIEW or write a custom program supported by DriverLINX.

DriverLINX is the basic Application Programming Interface (API) for the KPCI-3101–4 Series
boards:

•

It supports programmers who wish to create custom applications using Visual C/C++, Visual
Basic, or Delphi.

•

It accomplishes foreground and background tasks to perform data acquisition.

•

It is the needed interface between T estPoint and LabVIEW and a KPCI-3101–4 Series board.
DriverLINX software and user’s documentation on a CD-ROM are included with your board.
TestPoint is an optional, fully featured, integrated application package with a graphical drag-

and-drop interface which can be used to create data acquisition applications without
programming.

LabVIEW is an optional, fully featured graphical programming language used to create virtual
instrumentation.

Refer to Section 3, “Installation and Configuration” for more information about DriverLINX,
TestPoint, and LabView.

1-6 Overview KPCI-3101 — KPCI-3104 Series User’s Manual

Accessories

The following optional accessories are available for the KPCI-3101–4 Series board:

•

ST A-300 scr ew terminal panel

includes features such as jumpers for selecting AMP LO connections for use with “pseudo­differential” input; convenient locations for addition of bias return resisters for use when
measuring floating inputs in differential mode; convenient locations for current sense shunt
resistors for sensing current loops. Connector J1 accommodates the analog and digital I/O
signals from the KPCI-3101–4 Series board, and connector J2 allows you to connect 5B sig­nal conditioning backplanes. In addition, the STA-300, in conjunction with the CAB-305
cable, is the configuration in which KPCI-3101–4 was tested for CE emissions.

•

STP-68 screw terminal panel

nector accommodates the analog and digital I/O signals from the KPCI-3101–4 Series board.
The screw terminals are wired so that when connected using a CAB-305 cable, the terminal
number corresponds to a terminal number on the attached plug-in board. The STP-68 is not
shielded and was not used in CE emission testing.

• CAB-305 cable — A 2-meter, twisted pair , shielded cable that connects the 68-pin connector

(J1) on the KPCI-3101–4 Series board to the J1 connector on the STA-300 screw terminal
panel or to the 68-pin connector on the STP-68 screw terminal panel.

— Screw terminal panel with two connectors. The STP-300

— Screw terminal panel with one connector. The 68-pin con-

2

Principles of Operation

2-2 Principles of Operation KPCI-3101 — KPCI-3104 Series User’s Manual

This section describes the analog input, analog output, digital I/O, and counter/timer features of
the KPCI-3101–4 Series board. To frame the discussions, refer to the block diagram shown in

Figure 2-1. Note that bold entries indicate signals you can access.

Figure 2-1

Block diagram of the KPCI-3101–4 series boards

Ext A/D Clock
Ext TTL Trig

20 MHz Clock

Analog In

Ch. Sel

Gain Sel

A/D Clk

DIO Ports A
and B

Input Sel

Trigger/Clock
Logic

A/D Counter,
24-bits

TScan Counter
24-bit

16 Channel Mux

Gain Amp
(1, 2, 4, 8)

ADC

Tristate Buffers

1 kSample
Input FIFO

A/D Clk

1 K Entry
CGL FIFO

SW_Clk1

SW_Clk0

PCI Bus Interface

20 MHz
Clock

Ser_Da

Ser_Clk

CGL Reg.
Channel
Parameter
Reg.

Bidirectional
8-bit Latch

Bidirectional
8-bit Latch

4 User
Counter/
Timers,
16-bit ea.

Multiplying
DAC*

Multiplying
DAC*

Ch. Sel

Gain Sel

Input Sel

Discard
sample

DIO Port B
[7:0]

DIO Port A
[7:0]

User Clk [3:0]
User Gate [3:0]
User Out [3:0]

Analog
Output 1

Analog
Output 0

DIO Port C [6:0]

Analog input features

This section describes the features of the analog input (A/D) subsystem, including the following:

• Input resolution

• Analog input channels

• Input ranges and gains

• A/D sample clock sources

• Analog input conversion modes

• Trigger sources and trigger acquisition modes

• Data formats and transfer

• Error conditions

PCI Bus

*DACs not included on KPCI-3101,
or KPCI-3103 boards.

KPCI-3101 — KPCI-3104 Series User’s Manual Principles of Operation 2-3

Input resolution

Table 2-1 lists the input resolutions supported by the KPCI-3101–4 Series boards. The resolu-

tion is fixed for each board type; therefore, it cannot be programmed in software.

Table 2-1

Supported analog input resolutions

Board Type Supported Resolution

KPCI-3101 12 bits
KPCI-3102 12 bits
KPCI-3103 12 bits
KPCI-3104 12 bits

Analog input channels

The KPCI-3101–4 Series board supports 16 single-ended or pseudo-differential analog input
channels, or 8 differential analog input channels on board. Refer to Section 3, “Wiring signals”
for a description of how to wire these signals. You configure the channel type through Driver­LINX software.

NOTE For pseudo-differential inputs, specify single-ended in software; in this

case, how you wire these signals determines the configuration. Choose
this configuration when noise or common-mode voltage (the difference
between the ground potentials of the signal sour ce and the ground of the
STA-300 screw terminal panel or between the grounds of other signals)
exists and the differential configuration is not suitable for your applica­tion. This option provides less noise rejection than the differential con­figuration; however, all 16 analog input channels are available.

The KPCI-3101–4 Series board can acquire data from a single analog input channel or from a
group of analog input channels. Onboard channels are numbered 0 to 15 for single-ended and
pseudo-differential inputs or 0 to 7 for differential inputs. The following subsections describe
how to specify the channels.

Specifying a single channel

The simplest way to acquire data from a single channel is to specify the channel for a single
value analog input operation using software; refer to page 2-7 for more information on single
value operations.

You can also specify a single channel using the analog input channel list, described in the next
section.

2-4 Principles of Operation KPCI-3101 — KPCI-3104 Series User’s Manual

Specifying one or more channels

On the KPCI-3101–4 Series board, you can read data from one or more analog input channels
using an analog input channel list. You can group the channels in the list sequentially (either
starting with 0 or with any other analog input channel) or randomly. You can also specify a sin­gle channel or the same channel more than once in the list.

Using DriverLINX software, specify the channels in the order you want to sample them. The
analog input channel list corresponds to the Channel-Gain List FIFO (first-in, first-out buffer) on
the board. You can enter up to 1,024 entries in the channel list. The channels are read in order
(using continuous paced mode or triggered scan mode) from the first entry to the last entry in the
channel list. You can read the channels in the channel list up to 256 times per trigger (for a total
of 262,144 samples per trigger) using triggered scan mode. Refer to page 2-7 for more informa­tion on the supported conversion modes.

Specifying digital input lines in the analog input channel list

In addition to the analog input channels, the KPCI-3101–4 Series board allows you to read 16
digital I/O lines (Port A, lines 0 to 7 and Port B, lines 0 to 7) using the analog input channel list.
This feature is particularly useful when you want to correlate the timing of analog and digital
events.

To read these 16 digital I/O lines, specify channel 0 in the DriverLINX analog input channel list
with a special gain modifier. Refer to the DriverLINX Analog I/O Programming Guide, pro vided
with DriverLINX.

NOTE If channel 0 is programmed with digital capabilities and is the only

The digital channel is treated like any other channel in the analog input channel list; therefore,
all the clocking, triggering, and conversion modes supported for analog input channels are sup­ported for these digital I/O lines, if you specify them in this manner.

Input ranges and gains

Each channel on the KPCI-3101, KPCI-3102, KPCI-3103, and KPCI-3104 board can measure
unipolar and bipolar analog input signals. A unipolar signal is always positive (0 to 10V on a
KPCI-3101–4 Series board), while a bipolar signal extends between the negative and positive
peak values (±10V on a KPCI-3101–4 Series board).

Through software, specify the range as 0 to 10V for unipolar signals or −10V to +10V for bipo­lar signals. Note that you specify the range for the entire analog input subsystem, not the range
per channel.

channel in the channel-gain list, the board can read this channel at a
rate of 3MSamples/s. Refer to the DriverLINX Analog I/O Pr ogr amming
Guide, provided with DriverLINX.

KPCI-3101 — KPCI-3104 Series User’s Manual Principles of Operation 2-5

KPCI-3101–4 Series boards provide gains of 1, 2, 4, and 8, which are programmable per chan­nel. Table 2-2 lists the effective ranges supported by the KPCI-3101–4 Series board using these
gains.

Table 2-2

Gains and effective ranges

Unipolar Analog

Gain

1 0 to 10V ±10V
2 0 to 5V ±5V
4 0 to 2.5V ±2.5V
8 0 to 1.25V ±1.25V

For each channel, choose the gain that has the smallest effective range that includes the signal
you want to measure. For example, if the range of your analog input signal is ±1.5V, specify a
range of −10V to +10V for the board and use a gain of 4 for the channel; the effective input
range for this channel is then ±2.5V, which provides the best sampling accuracy for that channel.

The way you specify gain depends on how you specified the channels, as described in the fol­lowing subsections.

Input Range

Bipolar Analog
Input Range

Specifying the gain for a single channel

The simplest way to specify the gain for a single channel is to specify the gain for a single value
analog input operation using software; refer to page 2-7 for more information on single value
operations.

You can also specify the gain for a single channel using an analog input gain list, described in
the next section.

Specifying the gain for one or more channels

For KPCI-3101–4 Series boards, you can specify the gain for one or more analog input channels
using an analog input gain list. Using software, set up the gain list by specifying the gain for
each entry in the channel list. The gain list parallels the channel list. (The two lists together are
often referred to as the channel-gain list.)

For example, assume the analog input channel list contains three entries: channels 5, 6, and 7;
the gain list might look like this: 2, 4, 1, where a gain of 2 corresponds to channel 5, a gain of 4
corresponds to channel 6, and a gain of 1 corresponds to channel 7.

NOTE For analo g input channel 0 pr ogr ammed with digital capabilities (the 16

digital I/O lines). Refer to the DriverLINX Analog I/O Programming
Guide, provided with DriverLINX.

2-6 Principles of Operation KPCI-3101 — KPCI-3104 Series User’s Manual

A/D sample clock sources

The KPCI-3101–4 Series board provides two clock sources for pacing analog input operations in
continuous mode:

• An internal A/D sample clock that uses the 24-bit A/D Counter on the board; and

• An external A/D sample clock that you can connect to the screw terminal panel.

You use an A/D sample clock to pace the acquisition of each channel in the channel-gain list;
this clock is also called the A/D pacer clock.

NOTE If you specify Digital Capabilities for channel 0, the A/D sample clock

(internal or external) also paces the acquisition of the 16 digital input
lines. Refer to the DriverLINX Analog I/O Programming Guide, pro­vided with DriverLINX.

The following subsections describe the internal and external A/D sample clocks in more detail.

Internal A/D sample clock

The internal A/D sample clock uses a 20MHz time base. Conversions start on the falling edge of
the counter output; the output pulse is active low.

Using software, specify the clock source as internal and the clock frequency at which to pace the
operation. The minimum frequency supported is 1.2Hz (1.2 Samples/s); the maximum fre­quency supported differs depending on the board type, as shown in Table 2-3.

Table 2-3

Maximum frequency supported

Board Type Maximum Frequency

KPCI-3101 225kHz
KPCI-3102 225kHz
KPCI-3103 400kHz
KPCI-3104 400kHz

According to sampling theory (Nyquist Theorem), specify a frequency that is at least twice as
fast as the input’s highest frequenc y component. F or e xample, to accurately sample a 20kHz sig­nal, specify a sampling frequency of at least 40kHz. Doing so avoids an error condition called
aliasing, in which high frequency input components erroneously appear as lower frequencies
after sampling.

NOTE If input channel 0 is programmed for Digital Capabilities, and is the

only channel programmed, the maximum frequency is 3MHz
(3MSamples/s). Refer to the DriverLINX Analog I/O Programming
Guide, provided with DriverLINX.

KPCI-3101 — KPCI-3104 Series User’s Manual Principles of Operation 2-7

External A/D sample clock

The external A/D sample clock is useful when you want to pace acquisitions at rates not avail­able with the internal A/D sample clock or when you want to pace at uneven intervals.

Connect an external A/D sample clock to screw terminal TB48 on the STA-300 screw terminal
panel (pin 22 on connector J1). Conversions start on the falling edge of the external A/D sample
clock input signal.

Using software, specify the clock source as external. (Refer to the DriverLINX Analog I/O Pro-
gramming Guide provided with DriverLINX.) For the KPCI-3101–4 Series board, the clock fre­quency is always equal to the frequency of the external A/D sample clock input signal that you
connect to the board through the screw terminal panel.

Analog input conversion modes

KPCI-3101–4 Series boards support the following conversion modes:

• Single value operations are the simplest to use but offer the least flexibility and efficiency.

Using software, you can specify the range, gain, and analog input channel (among other
parameters); acquire the data from that channel; and convert the result. The data is returned
immediately. For a single value operation, you cannot specify a clock source, trigger source,
trigger acquisition mode, scan mode, or buffer.

Single value operations stop automatically when finished; you cannot stop a single value
operation.

• Scan mode takes full advantage of the capabilities of the KPCI-3101–4 Series boards. In a

scan, you can specify a channel-gain list, clock source, trigger source, trigger acquisition
mode, scan mode, buffer, and buffer wrap mode using software. Two scan modes are sup­ported: continuously-paced scan mode and triggered scan mode. These modes are described
in the following subsections.

Using DriverLINX software, you can stop a scan when the hardware fills the host b uffer you
specified or when your application issues a stop command.

Continuously-Paced scan mode

Use continuously-paced scan mode if you want to accurately control the period between conver­sions of individual channels in a scan.

When it detects an initial trigger, the board cycles through the channel-gain list, acquiring and
converting the value for each entry in the channel list (this process is defined as the scan). The
board then wraps to the start of the channel-gain list and repeats the process continuously until
either the allocated buffers are filled or until you stop the operation. Refer to page 2-14 for more
information on buffers.

The conversion rate is determined by the frequency of the A/D sample clock; refer to page 2-6
for more information on the A/D sample clock. The sample rate, which is the rate at which a sin­gle entry in the channel-gain list is sampled, is determined by the frequency of the A/D sample
clock divided by the number of entries in the channel-gain list.

To select continuously-paced scan mode, use software to specify the dataflow as continuous,
continuous pre-trigger, or continuous about-trigger. The initial trigger source depends on the
trigger acquisition mode you use. Refer to page 2-10 for more information on the supported trig­ger sources and trigger acquisition modes.

2-8 Principles of Operation KPCI-3101 — KPCI-3104 Series User’s Manual

T riggered scan mode

KPCI-3101–4 Series boards support two triggered scan modes: internally-retriggered and
externally-retriggered. These modes are described in the following subsections.

Internally-Retriggered Scan Mode

Use internally-retriggered scan mode if you want to accurately control both the period between
conversions of individual channels in a scan and the period between each scan. This mode is
useful when synchronizing or controlling external equipment, or when acquiring a buffer of data
on each trigger or retrigger. Using this mode, you can acquire up to 262,144 samples per trigger
(256 times per trigger x 1024-location channel-gain list).

When it detects an initial trigger, the KPCI-3101–4 Series board scans the channel-gain list a
specified number of times (up to 256), then waits for an internal retrigger to occur. When it
detects an internal retrigger, the board scans the channel-gain list the specified number of times,
then waits for another internal retrigger to occur. The process repeats continuously until either
the allocated buffers are filled or until you stop the operation; refer to page 2-14 for more infor­mation on buffers.

The sample rate is determined by the frequency of the A/D sample clock divided by the number
of entries in the channel-gain list; refer to page 2-6 for more information on the A/D sample
clock. The conversion rate of each scan is determined by the frequency of the internal retrigger
clock. The internal retrigger clock is the Triggered Scan Counter on the board; the Triggered
Scan Counter is a 24-bit counter with a 20 MHz clock.

Using DriverLINX software, specify the frequency of the internal retrigger clock. The minimum
retrigger frequency is 1.2Hz (1.2 Samples/s). Table 2-4 lists the maximum retrigger frequency
supported by the KPCI-3101–4 Series boards.

Table 2-4

Maximum retrigger frequency

Maximum

Board

Retrigger Frequency

KPCI-3101/3102 155kHz
KPCI-3103/3104 219kHz

The appropriate retrigger frequency depends on a number of factors, determined by the follow-
ing equations:

No. of CGL entries No. of CGLs per trigger×

Min. Retrigger Period

Max. Retrigger



--------------------------------------------------------------------------------------------------------------- -2µs+

=



-------------------------------------------------------------------------------=
Frequency Min. Retrigger Period

A/D sample clock frequency

1

For example, if you are using 16 channels in the channel-gain list (CGL), scanning the channel­gain list 256 times every trigger or retrigger, and using an A/D sample clock with a frequency of
100kHz, set the maximum retrigger frequency to 24.41Hz, since

24.41Hz

-----------------------------------------------=




1

16 256×()

------------------------- -2µs+

100kHz

KPCI-3101 — KPCI-3104 Series User’s Manual Principles of Operation 2-9

To select internally-retriggered scan mode, use software to specify the following parameters:

• The dataflow as continuous, continuous pre-trigger, or continuous about-trigger

• Triggered scan mode usage as enabled

• The retrigger mode as internal

• The number of times to scan per trigger or retrigger (also called the multiscan count)

• The frequency of the retrigger clock

The initial trigger source depends on the trigger acquisition mode you use; refer to page 2-10 for
more information on the supported and trigger sources and trigger acquisition modes.

Externally-Retriggered scan mode

Use externally-retriggered scan mode if you want to accurately control the period between con­versions of individual channels and retrigger the scan based on an external event. Like internal
retrigger scan mode, this mode allows you to acquire 262,144 samples per trigger (256 times per
trigger€× 1024-location channel-gain list).

NOTE Use externally-retriggered scan mode with continuous post-trigger

acquisitions only; refer to page 2-10 for more information on post­trigger acquisitions.

When a KPCI-3101–4 Series board detects an initial trigger (post-trigger source only), the board
scans the channel-gain list up to 256 times, then waits for an external retrigger to occur. You can
specify any supported post-trigger source as the initial trigger . Specify the external digital (TTL)
trigger for the retrigger.

When the retrigger occurs, the board scans the channel-gain list the specified number of times,
then waits for another external retrigger to occur. The process repeats continuously until either
the allocated buffers are filled (if buffer wrap mode is none) or until you stop the operation (if
buffer wrap mode is single or multiple); refer to page 2-14 for more information on buffers.

The conversion rate of each channel is determined by the frequency of the A/D sample clock;
refer to page 2-6 for more information on the A/D sample clock. The conversion rate of each
scan is determined by the period between external retriggers; therefore, it cannot be accurately
controlled. The board ignores external triggers that occur while it is acquiring data. Only exter­nal retrigger events that occur when the board is waiting for a retrigger are detected and acted
on.

To select externally-retriggered scan mode, use software to specify the following parameters:

• The dataflow as continuous (post-trigger)

• The triggered scan mode usage as enabled

• The retrigger mode as an external retrigger

• The number of times to scan per trigger or retrigger (also called the multiscan count)

• The retrigger source as the external digital (TTL) trigger

2-10 Principles of Operation KPCI-3101 — KPCI-3104 Series User’s Manual

T riggers

A trigger is an event that occurs based on a specified set of conditions. The KPCI-3101–4 Series
boards support a number of trigger sources and trigger acquisition modes, described in the fol­lowing subsections.

T rigger sources

The KPCI-3101–4 Series board supports a software trigger and an external digital (TTL) trigger .
A software trigger event occurs when you start the analog input operation (the computer issues a

write to the board to begin conversions). Specify the software trigger source in software.
An external digital trigger event occurs when the KPCI-3101–4 Series board detects either a ris-

ing or falling edge on the External TTL Trigger input signal connected to screw terminal TB46
on the STA-300 screw terminal panel (pin 56 of connector J1). The trigger signal is TTL-com­patible. Using software, specify the trigger source as a rising-edge external digital trigger or fall­ing-edge external digital trigger.

T rigger acquisition modes

KPCI-3101–4 Series boards can acquire data in post-trigger mode, pre-trigger mode, or about­trigger mode. These trigger acquisition modes are described in more detail in the following sub­sections.

Post-Trigger acquisition

Use post-trigger acquisition mode (continuous mode) when you want to acquire data when a
post-trigger or retrigger, if using triggered scan mode, occurs.

Using DriverLINX software, specify

• The dataflow as continuous, and

• The trigger source to start the post-trigger acquisition (the post-trigger source) as any of the

supported trigger sources.

Refer to page 2-7 for more information on the supported conversion modes; refer to page 2-10
for information on the supported trigger sources.

Post-trigger acquisition starts when the board detects the post-trigger event and stops when the
specified number of post-trigger samples has been acquired or when you stop the operation.

If you are using triggered scan mode, the board continues to acquire post-trigger data using the
specified retrigger source to clock the operation. Refer to page 2-8 for more information on trig­gered scan mode.

Figure 2-2 illustrates continuous post-trigger mode using a channel-gain list with three entries:

channel 0, channel 1, and channel 2. Triggered scan mode is disabled. In this example, post­trigger analog input data is acquired on each clock pulse of the A/D sample clock. When it
reaches the end of the channel-gain list, the board wraps to the beginning of the channel-gain list
and repeats this process. Data is acquired continuously (continuously-paced scan mode).