JVC XVE-100-SL, XVS-42-SL, XVS-40-BK Service manual

Page 1
XV-S40BK/XV-S42SL
SERVICE MANUAL
DVD VIDEO PLAYER
XV-S40BK / XV-S42SL
XV-E100SL
Area Suffix (XV-S40BK)
B ------------------------- U.K. E --- Continental Europe EN ---- Northern Europe
Area Suffix (XV-S42SL)
B ------------------------- U.K. E --- Continental Europe
Each difference point
Model XV-S40BK XV-S42SL XV-E100SL
In regard with component parts appearing on the silk-screen printed side (parts side) of the PWB diagrams, the parts that are printed over with black such as the resistor ( ), diode ( ) and ICP ( ) or identified by the " " mark nearby are critical for safety. When replacing them, be sure to use the parts of the same type and rating as specified by the manufacturer. (Except the JC version)
Body color
Black Silver Silver
EN ---- Northern Europe EV ------ Eastern Europe
Area Suffix(XV-E100SL)
B ------------------------- U.K. E --- Continental Europe EN ---- Northern Europe EV ------ Eastern Europe EE -- Russian Federation
Contents
Safety precautions ------------------------ 1-2 Preventing static electricity ------------- 1-3 Precautions for service ------------------ 1-4
This service manual is printed on 100% recycled paper.
COPYRIGHT 2001 VICTOR COMPANY OF JAPAN, LTD.
Important for laser products ----------- 1-5 Disassembly method -------------------- 1-6 Adjustment method ---------------------- 1-15 Description of major ICs ---------------- 1-21
No.A0006
Apr. 2001
Page 2

Block diagrams

DVD Servo control & AV decoder section(SHEET 5,6)
TO CN701
SHEET 4
TX
IC503
C/R/V
Y/B/U
CVBS/G/Y
IC505
16M SDRAM
IC502
27MHz
DA-IEC
SYSCLK
DA_DATA1
IC501
CVBS
CN502CN503
TO CN961
SHEET 2
V+5V
XV-S40BK/XV-S42SL
XV-E100SL
CPURST
IC504
16M SDRAM
FEPEN CPSCK SDOUT SLEEP
AV DECODER
STD0~7
85
/WR
/RD
59
60
ODC
IC301
(Optical disc controller)
BDO OFTR TGBAL
TBAL TE RFENV
FBAL FE TG AS
ARF+ ARF-
TESTSG JLINE
/WR
PLLOK
CDDET1
CDDET2
/RD
WAITODC
DAT0~3
IC201
ADSC
(Digital servo controller)
WAITDEC
IC311
IC312
ADSCEN
EPDO
CIRCEN
CPSCK
SDOUT
EPDI
EPSK
EPCS
EPROM
ZIV A W AIT
ADSCIRQ
IC403
IC321
IC322
WAIT
IC401
Unit CPU
SBRK SPMUTE
U2SDT S2UDT
SCLKO REQ
BUSY
X401
OSCI/O
DECIRQ
CPUA1~20
CPUD0~7
CPUD0~7 CPUA0~2
LSIRST
CPUD0~7 CPUA0~17
IC402
16M ROM
FEP
LVB10226-A1
IC101
(Front end processor)
T1CD T2CD F1CD F2CD
TR TC TD T A F2D VD F1DVD
T+ T-
CN101
FROM
IC271
4CH Driver
F+ F-
EXL-V7-1
FM+
TDOFS FODRV
FM-
TRDRV TRSDR V
FG
DRVMUTE
VH
SM1~3
H1+~H3+
H1-~H3-
LM+
CN201 CN202
FROM
EXL-V7-1
LM-
MOTOR
SPINDLE
FROM
FLM-J1-1
IC251
DRIVER
SWOPEN SWUPDN
2-1
Page 3
XV-S40BK/XV-S42SL XV-E100SL
System control & audio output section(SHEET 4)
TO FW801
SHEET 1
TO FW802
SHEET 1
AIN0 AIN2
CN703CN702CN701
POWERSW STANDBYIND REMO
SYSTEM
CONTROLLER
IC701
AVCI, AVCO
RESET
RESET
IC702
OSC
X701(8MHz)
AV
COMPULINK
Q709
LEA10016-A1
J702
B5V
+12V
-12V
P.MUTE
AV COMPULINK
TO SHEET 2
TO SHEET 1
S1~S24
1G~13G
DAC
CONTROL
DAC
IC703
U2SDT S2UDT
SCLK
REQ
BUSY
CPURST SWOPEN SWUPDN
TO CN503
SHEET 6
DA_DATA1
TX
FL Display & Operation switch section(SHEET 1)
S1~S24
TO SHEET 4
TO SHEET 2
1G~13G
B5V F- F+
FL DISPLAY
DI801
OUT1C OUT1D OUT2C OUT2D
D3.3V
LPF
IC741,IC751
IC704
MUTE
TO CN703
SHEET 4
FW801
AIN0 AIN2
OPERATION
SWITCH
S831~S835
S821
MUTE
Q791
Q743,Q753
Q744, Q754
D791,D792
AUDIO_R
AUDIO_L
OPTICAL
DIGITAL OUT
Rch
Lch
J703
TO SHEET 3
ANALOG AUDIO OUT
COAXIAL DIGITAL OUT
OPTICAL DIGITAL OUT
2-2
POWER
SWITCH
S801
STANDBY
INDICATOR
D801
POWERSW
STANDBYIND
FW803
TO CN702
SHEET 4
FW802
REMO
REMOTE
CONTROL
IC801
Page 4
DC Regulator section (SHEET 2)
XV-S40BK/XV-S42SL
XV-E100SL
TO SHEET 1
Q951,Q952
FL ON/OFF
D951
C960
AC-DC
F+F--VDISP
B5V
D950
Q953
-30V REG.
IC953
+5V REG.
D952
AC-DC
C963,C964
TO CN502
L951
D5V
SHEET 6
CN961
+5V REG.
D953
AC-DC
M9V
IC951
L952
C965,C966
D3.3V
D954
AC-DC
TO SHEET 3
+3.3V REG.
L955
C979,C997
CVBS
SVBS/Y/G
Y/Pb/B
C/Pr/R
Q964,Q965
Q966
D972,D973
C995,C996
MUTE DETECTION
TO SHEET 4
B5V
P.ON
AC-DC
+12V
P.MUTE
L957
D956
C982,C984
-12V
AC-DC
L959
D957
C987,C989
LEA10016-A1
AC-DC
LINE FILTER
AC IN
D901
L901
T901
TRANSFORMER
D904
C914
AC-DC
IC901
SWITCHING
REGULATOR
AC-DC
D908
D910
Q991
PC902
MODE SW.
PC901
FEED BACK
2-3
Page 5
XV-S40BK/XV-S42SL XV-E100SL
Audio & Video signal output section(SHEET 3)
LVA10016-A1
TO SHEET 2
TO SHEET 4
C/Pr/R
Y/Pb/B
CVBS/Y/G
CVBS
DOUT
AUDIO_L AUDIO_R
L601, L602
L611, L612
L621, L622
L631, L632
Lch Rch
LPF
LPF
LPF
LPF
T701
Q631
Q601 Q611
Q621
COMPOSITE
Y/C SWITCH
S691
J691
R/C B G
Y/COMPOSITE Lch Rch
S-VIDEO OUT COAXIAL
DIGITAL OUT
J603
COMPOSITE VIDEO OUT
L
AUDIO OUT
R
J602
2-4
Page 6

Standard schematic diagrams

FL Display & operation switch section
XV-S40BK/XV-S42SL
XV-E100SL
6
FW803
FW803
QUM123-12Z4Z4
S801
QSW0651-001Z
R801
330
D801 SLR-342VC-T
QUM123-12Z4Z4
5
FW802
QUM125-09DGZ4
IC801 GP1U271X
C801
0.1
C802
47/10
FW801
QUM123-11DGZ4
S821
S831
S832
S833
S834
S835
R845R847 R846R848
4301.1K 6802.2K
4
B5V
TO SHEET 2
TO SHEET 4
S6S8S9
F­F+
S13
S17
S18
S11
S12
S10
S19
S15
S14
S21
S16
S22
S24
S23
S20
6G
2G3G4G5G7G8G9G
1G
10G
11G
12G
13G
4.7/50
C821
S2S3S4
S5S1S7
3
2
1
BC
DE
F
G
HA
I
2-5
Page 7
Power supply section
XV-S40BK/XV-S42SL
XV-E100SL
XV-S40BK/XV-S42SL XV-E100SL
T901
C906
C905
6
P901
F901
C902
0.068/AC250V
0.001/AC250V
L901
QQR1105-001
IC901
STR-G6651
5
4
D901
S1WB/A/60-4101
R905
68k
R911R910
750K750K
C907
C913
100p/1k
C908
0.0033/1K
R907
0.47
K902
R906
680
R901 68K
D903
F1T4-T2
D902
F1T4-T2
C914
39/25
PC902
PC123Y02
D904
F1T4-T2
D910
F1T4-T2
PC901
PC123Y02
C909 100p/1k
R903
D908 F1T4-T2
R904
2.2k
C910C915 220P470P
R900 220
27
QQS0097-001
R969 220
C951
D951
C952
100p
F1T4-T2
100p
D952
F1T4-T2
10
R954
C963
39/50
ICP-N10-T
CP951
C960 C961
82/10 0.1
L951
0.22
C964 R955
22/50 22k
C953
100p
D953
FMB-24
C965
1000/10
Q953
KTA1267/G/-T
1.5k
R980
C994
0.022/25
L952 22
C966
470/10 0.1 0.1220/10
D960
22/50
C962
MTZJ4.7B-T2
D950
MTZJ36C-T2
IC951
C967 C968C969
Q964
2SB1184/QR/-X
R972
1.2k Q965
KTC3199/Y/-T
R971
3.9k D970 1SS133-T2
Q951
KTD863/Y/-T
R953 10K
Q952
KRA104S-X
PQ05RD21
R952 10k
C970
0.1
IC953
NJM78M05FA
C973
100/10
R956
12
F+ F-
-VDISP B5V
CVBS CVBS/Y/G Y/Pb/B C/Pr/R
CVBS
CVBS/Y/G
Y/Pb/B
C/Pr/R
0.1
C917
TO SHEET 1
TO SHEET 3
EP951
R908
3.3K
3
2
Parts are safety assurance parts. When replacing those parts make sure to use the specified one.
1
C918
0.1
D911
1SS133-T2
KTC3199/Y/-T
C916
0.0033/AC250V
C993 100p
Q991
Video signal
C992
0.47/50
R960
100
MTZJ5.1C-T2
680
R961
D991
R962
R964
C976
C981
0.1
Q966
KTA1267/G/-T
5.6K
R974
C995 220/16
0.1
R975
5.6k R973
1K C996
22/16
1M
100
R963
1M
10k
R965
C956 100p
D956
F1T4-T2
C982
560/25
D957
F1T4-T2
C957
100p
L957 10
L959 10
C954
D954
F1T4-T2
C984 220/25
C989C987 100/25180/25
C979
820/16
100p
CP952
ICP-N5-T
L955
22
C997
220/16
D973 D974
1SS133-T2 1SS133-T2
R976
220
D972
1SS133-T2
C977
0.1
C978
100/10
CN961
QGB2027M8-26
D5V P.ON
P.MUTE +12V
-12V
TO SHEET 4
BC
DE
2-6
F
G
HA
I
Page 8
XV-S40BK/XV-S42SL
XV-E100SL
Audio / video signal output section
J604
QNZ0499-001
R661
10k
R663
10k
R665
D609D619
2.2k
1SS133-T21SS133-T2
Q694
KRC102S-X
C609
R609 J601
82
470/6.3
C619
R619
470/6.3
82
6
C603
C613
220p
220p
L602
L612L611
R605
2.2
47p
C604
2.25.6
47p
C614
R604
R613
220 KTA1267/G/-T
150
R603
R615
220
0
R614
Q601
Q611
KTA1267/G/-T
R616 R606
560 560
0
150
L601
R601
R602
0
150
5
TO SHEET 2
C/Pr/R
Y/Pb/B
CVBS/Y/G
CVBS
C985
220/16
R612
0
R611 150
C601
C611
5.6
470p
470p
R664
9.1k
QNN0387-001
J602 QNN0361-001
560
R650
R621 150
R622
L622L621
2.25.6
47p
C623
220p
C624
470p
C621
0
R623
R625
220
Q621
KTA1267/G/-T
150
0
R624
D629
1SS133-T2
4
560
R636
R634
R635
220
Q631
KTA1267/G/-T
150
0
R633
D639
1SS133-T2
L632L631
R631
R632
C631
150
D5V
DOUT
3
AUDIO_L
AUDIO_R
Rch
K605
NQR0227-004X
470p
0
C633
220p
2.25.6
47p
C634
TO SHEET 4
Lch
VS3 VS1
2
+12V
NTSC/PAL
RGBSEL
R1732
10
C659
470/6.3
R659
68
C649
K604
NQR0227-004X
C1703
QQR1185-001
150p
R649
68470/6.3
KRA102S-X
T701
470/6.3
Q693
K708
NQR0227-004X
C629
C639
0.1/16
R1723
R629
68
R639
68
10K
R660
2.2K
R661
C1704
220p
27
J603 QND0086-001
J691 QNZ0516-001
68
68
100p
C691
S691
QSW0454-001
C686C685
R1731
1k Q691
KRC102S-X
R696
470P470P
C696
470/6.3
470/6.3
C697
R686
150
0
R697
1k
C694
R698
C695
470/6.3
R682
NI
R685
100k
470/6.3
150
Q692
KRC102S-X
Q696
KRA102S-X
R688
68
R681
150
Q697
KRC102S-X
R695
R694
R687
68
1
Video signal Audio signal
BC
DE
F
G
HA
I
2-7
Page 9
System control & audio signal DAC section
XV-S40BK/XV-S42SL
XV-E100SL
XV-S40BK/XV-S42SL XV-E100SL
EP711
6
5
CN701
QGB2027M8-26
4
CN702
QGD2501C1-05Z
POWER_SW
REMO
3
CN703
QGD2501C1-03Z
2
C704
0.1 R1713
/LMMUTE
BUSY CPURST
SWOPEN
SWUPDN
TOPEN
TCLOSE
S2UDT
SCLKO
U2SDT
REQ
100
DA_BCK DA_LRCK
DA_DATA1
1SS133-T2
D701
C701
L709R708
2.2100
R707
L710
NI
D791
D792
R1721
330
R767 100
R777
100
R769
R779
1SS133-T2
R768
10K
R778
10K
10k
10k
R1722
75
C1702 47/25
NI
NI
C708
C713 470p
IC703
MN35505-X
K703
K701
R1730
K704
10k
10
R711
1.5
NQR0227-004X
-VDISP
NQR0227-004X
DA_DATA1 DA_LRCK DA_BCK
C711
DDATA
R709
10k
D709
1SS133-T2
Q709 KRC107S-X
C709
330P
AVCO
AVCI
IC791
R1711
X701
QAX0667-001Z
R702
4.7k
R704
1K
NI
DO DI
NI
R703
1M
R1714
4.7K R795
R1726
NI
R788
NI
R1728
2.2k
DDATA DCLK DAC0CS
DO
DI
CS
SK
C728
C706
100/10
0.1
10k
0
0
R789
R1715
R1727
R1710
1K
R1709
1K4.7K
R1725
1k 1k
R1704
R1707
2.2k
R1708
2.2k
C705
0.1
C729
NI
0.1
C702
C735
NI
CS SK
R1729
2.2k
IC-PST9140-T
IC702
1K
R701
1/50
NI
C722
470
R721 R723
470
R724
470
R725
470
K702
10
C715
NI
C716
1000/6.3
S3
S4S5S6S7S8S9S10
S1
S2
IC701
MN101C35D*
NQR0227-004X
10
C724
R717
NI
R731
3.3k
C731
C717
1.5
0.01
RA703
NI
S11
S12
S13
R728 R729
C730
C721
NI
C714 1000/6.3
R713R715
2222
DCLK
470
DAC0CS
470
C718
470/6.3
0.22
S14 S15 S16
S17 S18 S19 S20 S21 S22 S23 S24
1G 2G 3G 4G 5G 6G 7G 8G
9G 10G 11G 12G 13G
RA702 NI
RA701
NI
R742
R743
27k
27k
R741
R740
R763
3.6k
R752
R753
27k
27k
R751
R750
R773
3.6k
R745
18k
18k
1000p
C740
R744
3.6k
18k
18k
1000p
C750
R754
3.6k
18K
R746
C741
3.3k
220p
R748 R761
1.1k 1.1k
IC741 NJM4580M-X
0.033
3.6K
C742
R747
R755
18K
R756
C751
3.3k
220p
R758 R771
1.1k 1.1k
IC751 NJM4580M-X
0.033
3.6K
C752
R757
C745
0.01
R762
C744
680p
680
C749
R764
NI
18K
IC751 NJM4580M-X
C755
0.01
R772
C754
680p
680
C739
NI
IC741 NJM4580M-X
100/16
C762
100/16
R774
18K
R782
220
R783
220
100/16
C761
R792
220
R793
220
100/16
C771
C772
R797
Q791
47K
KRA102S-X 1SS133-T2
C797
33K
0.0015
R786
C746
22/25
R765 560
R766
C747
27K
2200p
Q743 2SD2144S/VW/-T
C756 22/25
R775
560
R776
C757
2200p
27K
C737
R780
1.1K
22/25
C738
R790
1.1K
22/25
R781
1.1K
R791
1.1K
D702
MTZJ3.3B-T2
C1701 47/25
Q753 2SD2144S/VW/-T
Q744
2SD2144S/VW/-T
Q754
2SD2144S/VW/-T
IC704
TC7S08F-W
R1724
QNS0089-001
100
AUDIO_L
A.GND
AUDIO_R
Rch
Lch
VS1
VS3
+12V
DGND
DOUT
NTSC/PAL
RGBSEL
J702
TO SHEET 3
AVCO
AVCI
TO SHEET 1
TO
P.ON
TCLOSE
D5V
R1716
B5V
1k
TOPEN
SWOPEN
/LMMUTE
SWUPDN
REQ
BUSY
SCLK
U2SDT
CPURST
S2UDT
K706
NQR0227-004X
K705
NQR0227-004X
R706 100K
R705
2.2
C707 C736
100/6.3 0.1
J703 QNZ0487-001
SHEET 2
1
-12V P.MUTE
BC
DE
2-8
Audio signal
F
G
HA
I
Page 10
XV-S40BK/XV-S42SL
XV-E100SL
DVD Servo control section
TP158
TP156 TP154
RF+
RF-
6
TP125
TP126
TP124
TP123
TP121
TP120
TP115
TP114
TP113
TP111
TP109
TP108
CN101
QGF0501F2-30X
5
R124
TP127
TP128
TP142
TP143
TP144
TP129
TP145
R125
R122
0
NQR0265-003X
TP146
TP106
TP107
T2CD F2CD
TP110
T1CD
C109
0.1/16
F1CD
0
R121
C108
0.1/16
TP116
TB
TP117
TC
TP118
TD
TP119
TA
0
R123
0
F2DVD F1DVD
T­F­F+ T+
TP122
C104
0.1/16
RF­RF+
0.1/16
C107
C101
0.1/16
R102
TP112
R108
18k
TGBAL TBAL FBAL
Q101
Q102
KTA1001/Y/-X
C102
C103
NI
NI
27
2.2272.2
R106
R104
R105
33kNI33k
R103
C105
C106
47/6.3
47/6.3
10k
R101
KTA1001/Y/-X
R107
SLEEP FEPEN CPSCK SDOUT
JLINE
LDCUR
HAGUP
R110 27k
R112
R154
27k
NI
R155
0
R114R113
1k6.8k
NI1NI
NI
C117
C116
C115
C118
220p
C119
0.15/16
24k
R115
R109
Q104
NI
NI
Q105
4
K103
NQR0007-002X
C152
15/6.3
C151 22/6.3
F-
TP4
TP5
TP6
TP7
TP1
TP2
TP3
CN201
QGF1016F2-15W
3
TP8
TP9
TP10
TP11
TP12
TP13
TP15
TP14
CN202 QGF1016F2-06W
SWOPEN SWUPDN
LM+ LM-
TP16
TP17
TP18
TP19
TP20
M9V
VH H3+ H3­H2+ H2­H1+ H1-
R271
47
SM3 SM2 SM1
TRVSW
FM­FM+
C272
NI
M.GND
2
T-T+F+
D5V
R272
C271
22/6.3
NI
R287
R288
0
C273
0.1/16
D.GND
C283
NI NI
LM+
LM-
VH
M9V
D5V
R257
C287
0.1/16
C284
FM+
FM-
R256
47
1
1
M.GND
D.GND
C274
0.1/16
IC102
MM3022JN-X
0.1/16
IC271
BA5983FM-X
H3-
H3+
C257
0.01/16
C256
HMFON
TP176
D271
R273
NI
0
R274
R278
C275
H2-
C258
0.01/16
SBRK
10k
C276
NI270p
R275 10k
R277R276
12k12k
0.001
C277
R289
7.5k
R290
7.5k
R291
6.8k
R292 R293
R281
10K 9.1k
2.4k R282
R283 10k
10k
C280
NI
R284
C281
10k
0.022
C282
C286
0.01/16
H2+
H1-
H1+
SM1
SM2
C259
0.01/16
IC251
BA6664FM-X
R259
10k
0
20k
R258
R254
22/16
C254 22/6.3
C255
0.022
/SPMUTE
TRDRV
10k
R279
FODRV
10k
NI
C279
0.001
C278
R280
2.4k
C288 1/50
R286
9.1k R285
TRSDRV
10k
1/50
C260
SM3
0.1/16
C261
0.1/16
C262
0.1/16
C263
0.1/16
R251
NI
1
C264
R253
R252
0.01/16
3.3 C251
0.1/16
C252
0.1/16
C253
R255 10k
SPDRV
R116
68k
C120
82p
/DRVMUTE
FG
TA
TD
TB
TC
T2CD
T1CD
8.2k
10k
R131
R132
C145
0.01/16
C146
NI
1.8k
R166
IC101
AN8702FH
C121
NI
22p
0
0
R165
R147
R117
C110
12k
C122
R111
180p R118
NI
30k
FE
TE
AS
TCLOSE
/LMMUTE
TOPEN
F1CD
F2CD
F1DVD
F2DVD
TP131
STD7
0.1/16
C143
0.1/16
C144
0.1/16
TP102
TP103
C123
C124
C159
0.1/16
0.1/16
TG
FE TE
LDCUR
TG RFENV
AS
ARF+ ARF-
C138
0.1/16
TESTSG
RFENV
BDO
OFTR
TP568
TP567
C127
0.001 NI
C129
C128
0.1/16
NI
C158
C125
ARF+
ARF-
0.1/16
0.1/16
0
R231
TP233
TP234
C208
0.1/16
27k
R211
R212
NI
12k
27k
C211
5.6k
R213
R214
C222
0.1/16
C223
0.1/16
C201
0.47/16
12k
R226
C141
C139
0.1/16
NI
R119
C136
0.047/16
0.027/16
C135
NI
C137
560p
C134
R129
1M
C133
560p
R128
1M
C132
0.1/16
R127
C131
C130
12p
2.2k
0.1/16
TP101
R152
1
R153
4.7 NQR0007-002X
33/4
C161
C126
C160
0.1/16
56/6.3
0
R236
330p
C203
C204
R207
47k
R202
47k
R203
47k
R204
47k
R205
470p
270p
C207
C206
R208 47k
R209
12k
R210
47k
0.001
C209
0.001
C210
0.0056/25
C231
0.001
C232
0.1/16
C233
R218
NI
C226
0.001
C227
0.001
C228
R219 47k
C239
0.018/16 C240
47p
TP212
D5V
22/6.3
C140
K301
NQR0007-002X
/WR
TP105
S3V
S5V
K102
S.GND
560pNI560p
560P
C221
C202
120p
C205
TP219
TP220
R215
1M
15k
C230
NI
TP202
TP201
/RD
C345
100/6.3
C346
1/16
D.GND
TP231
TP214
TP215
TP216
TP221
TP217
TP218
C225
1/16
47k
R220
TESTSG
TP224
TP211
0.1/16
C237
TP210
TP208
47k
R223
C241
0.01/16
C224
0.01/16
C245
0.1/16
TC7SH32FU-XTC7SH08FU-X
C341
0.1/16
TP301
R312
CPSCK
SDOUT
ADSCEN
CIRCEN
TP225
TP226
IC201
MN67706ZY
TP203
TP204
C242
1/16
18k
6.8k
R225
R228
1k
R227
C244
0.1/16
TGBAL
JLINE
R341
NI
R342
IC312IC311
1k
R343
27k
TBAL
0
C342
0.1/16
1k
IC321
0.1/16
TC7WH74FU-X
C343
DAT3
DAT2
DAT1
DAT0
CHCK40
220
220
220
220
220
0.1/16
R241
R240
R239
R238
R237
C238
0.1/16
C246
R232 R233
27k
R229
R230
FBAL
R234
0
R235
C247
0.1/16
C248
0.15/16 C249 C214 C229
OFTR
BDO
TP132
STD6
TP133
STD5
TP134
STD4
TP135
STD3
TP136
STD2
TP137
STD1
TP138
STD0
STEN ODCIRQ2 ODCIRQ
1k
R311
TP160
0.1/16
C344
FG
SPDRV
TRSDRV
TP207 TP206 TP205 TP213
4.7k
4.7k
4.7k
0.1/16
0.1/16
0.1/16
R301
47k
R302
C324
0.1/16
47k R303
47k
R304
C301
0.1/16
47k R305 47k
C302
0.1/16
R306 47k
R307 47k
R308
47k
TP139
R309
C303
0.1/16
10k
TP302
R332 NI
D301
NI
C304
0.1/16
1k
TP303
5.6k
R310
R345
C305
0.1/16
TP140
IC322
TC74VHC00FT-X
TP161
D5V
R221
NI
C212
0.1/16
C213
0.1/16
TP570
R242 R243
C218
47k
47k
47k
0.1/16
R248
R250
R249
K201
NQR0007-002X
C215 33/6.3
NQR0007-002X
C216
1/16
C217 100/6.3
R206
K203
C220 1/16
4.7
C219
NQR0007-002X
100/6.3
NI
R331
R330
TP157
TP159
CPUA17
CPUA16
CPUA15
CPUA14
CPUA13
R222
ADSCIRQ
NI
0
R224
IC202
TC7WT125FU-X
1k 1k
TP232
1k
R245
1k
R246
D2.7V
K202
D.GND
S3V
S.GND
STCLK
STVALID
47k
NI
NI
NI
R322
R323
R325
R326
NI
NI
NI
R329
R327
47k
47k
R324
R328
TP155
0.1/16
C321
C306
CPUA12
S3V
NCLOCK
IPFLAG
NTRON
JMPINH
PLLOK CPDET1 CPDET2
D3V
SYSCLK
0.1/16
0.1/16
C320
C319
IC301
MN103S13BDA
0.1/16
CPUA11
CPUA10
CPUA9
CPUA8
CPUA7
CPUA6
CPUA5
CPUA4
CPUA3
CPUA2
CPUA1
CPUA0
SDIN
/SPMUTE
TP167
CPUA0 CPUA1 CPUA2 CPUA3
X401
NAX0331-001X
/DRVMUTE
SBRK
SUBC
LG
TP153
TP152
0.1/16
C307
/WR
/RD
/RD
/WR
TP164
TP405
C413 C414 NI
DAT0
DAT1
DAT2
DAT3
SUBC
CHCK40
NCLOCK
NI
NI
R320
R321
C317 1/16
0.1/16
C318
TP151
TP150
R318 R317
C315
0.1/16
C314
0.1/16
R347 R348 R349
R350
C311
0.1/16
0.1/16
C309
CPUD2
CPUD3
CPUD4
CPUD5
CPUD6
CPUD7
TP163
TP162
TP401
TP166
R404
R403
4.7k
NI
TP169
C401
R405
0.1/16
4.7k C402
0.1/16
TP170
R408
NI
R407
4.7k R409
NI
NI
D2.7V
D3V
K302
K303
NQR0007-002X
NQR0007-002X
C316
100/4
0.1/16
C326
C327
100/4
D.GND
TP306 0 0
R316
1M
X301 NAX0375-001X
C312
C313
18p
18p
TP149 TP148
1k 1k 1k
1k
C325
NI
TP141
C310
0.1/16
CPUD1
CPUD0
CPUD3
CPUD4
CPUD5
CPUD6
CPUD7
CPUA4
CPUA5
CPUA6
CPUA7
CPUA8
IPFLAG
R346
4.7k
NTRON
LG
JMPINH
TP307
PLLOK
SYSCLK
CPDET1 CPDET2
BDO
TP305 TP304
TP175
NI
0
R363
R364
WAITDEC
LSIRST
CSROM
CSDEC
DECIRQ
ODCIRQ2
ODCIRQ
0.1/16
*
R421
CPUA19
R419
C410
NI
C408
R417
22/6.3
4.7k
4.7k
R418
0.1/16
C409
D.GND
CPUA20
HAGUP
HMFON
TRVSW
*******
CPUD0
CPUD1
CPUD2
R428
R427
R426
R425
R424
R423
R422
IC401
MN102L25G*
0.1/16
C405
CPUA9
CPUA10
CPUA11
CPUA12
CPUA13
CPUA14
CPUA15
CPUA16
CPUA17
CPUA18
C412
0.1/16 IC403
BR93LC66F-X
TP173
EPSK
R416
4.7k
R415
4.7k R414
4.7k
C407
0.1/16
C406
R413
4.7k R412
10k
TP413
R411
4.7k
TXSEL ADSCTX
TP174
EPDOEPCS EPDI
D.GND
CPURST
K402
NQR0007-002X
D5V
ADSCIRQ
SDOUT
SDIN CPSCK U2SDT S2UDT SCLKO
EPDO EPDI EPSK EPCS
CIRCEN
REQ BUSY
SLEEP FEPEN
0.1/16 ADSCEN
TO SHEET 6TO SHEET 6
TP425
TP415
Digital data signal
BC
DE
F
G
HA
I
2-9
Page 11
AV Decoder section
XV-S40BK/XV-S42SL
XV-E100SL
XV-S40BK/XV-S42SL XV-E100SL
Z3V
R531
33
K503
NQR0007-002X
6
0.1/16
C537
22/6.3
TP506
K502
Z3V
1SR154-400-X
K501
NQR0007-002X
D501
NQR0007-002X
C534
100/6.3
C533
0.1/16 D.GND
C536
C535
0.01/16
0.1/16
5
CPUD7
CPUD6
CPUD5
CPUD4
CPUD3
CPUD2
CPUD1
K506
NQR0007-002X
C530
CSDEC
/RD
SD_CLK
/WR
WAITDEC LSIRST
DECIRQ
LDQM
MA9
MA8
MA7
MA6
MA5
MA4
K504
CSROM
C542
4
3
2
SHEET 5
D5V
CPUA19 CPUA18 CPUA8 CPUA7 CPUA6 CPUA5 CPUA4 CPUA3 CPUA2 CPUA1
/RD CPUD0
CPUD1
CPUD2
CPUD3
K401
NQR0007-002X
MD0
MD1
MD2
MD3
MD4
MD5
MD6
R432
4.7k CPUA20 CPUA9
CPUA10 CPUA11 CPUA12 CPUA13 CPUA14 CPUA15 CPUA16 CPUA17
R431
4.7k
K3N5C1000D-J*
C411
0.1/16
IC402
D.GND
MD7
LDQM
/MWE
SD_CAS
SD_RAS
SD-CS1
CPUA0
CPUD7
CPUD6
CPUD5
CPUD4
MA11
MA10
MA0
MA1
MA2
MA3
TO
22/6.3
C543
0.1/16
IC505
KM416S1120DT-G8
MD15
MD14
MD13
MD12
MD11
MD10
MD9
MD8
LDQM
SD_CLK
MA9
MA8
MA7
MA6
MA5
MA4
NQR0201-001X
C540
22/6.3
C541
0.1/16
IC504
KM416S1120DT-G8
MD0
MD1
MD2
MD3
MD4
MD5
MD6
MD7
LDQM
/MWE
SD_CAS
SD_RAS
SD-CS0
MA11
MA10
MA0
MA1
MA2
MA3
MD15
MD14
MD13
MD12
MD11
MD10
MD9
MD8
D.GND
100/6.3
R559 NI
R501
1k
R502
4.7k
D.GND
CPUD0
C532
C531
0.1/16
C556 100/6.3
C557
0.1/16
C501
0.1/16
C502
0.1/16
C503
0.1/16
C504
0.1/16
C505
0.1/16
C506
0.1/16
C507
0.1/16
C547
0.1/16
0.1/16
C508
0.1/16
MD6
MD5
MD4
MD3
MD2
MD1
MD0
C544
0.1/16
C511
C510
C509
0.1/16
0.1/16
MD7
MD15
MD9
MD10
MD11
MD12
MD13
MD14
C529
0.1/16
C538
0.1/16
ZIVA-4.1-PA2
MD8
IC502
NAX0393-001X
TP507
D.GND
STD5
STD6
STD7
STEN
STCLK
000
33
33
CPUA0
CPUA1
CPUA2
C527
0.1/16
C528
IC501
C512
0.1/16
33
NQR0269-001X
R513
R511
K505
R504
LDQM
SD_CLK
MA9
MA8
STVALID
R538
R539
R540
R543
R542
R541
R545
4.7k
0.1/16
C514
C513
0.1/16
0.1/16
33
33
R519
R515
R517
MA7
MA6
MA5
33
33
33333333333333
33
33
R521
R509
R507
R508
R506
SD_CAS
SD_RAS
/MWE
MA4
SD-CS0
STD4
R537
C526
R512
SD-CS1
TP505
Q1
KTC4377/C/-X
R1
D2.7V
S3V
Z3V
D3V
S5V
D5V
M9V
D.GND
STD0
STD3
STD2
STD1
33
3333333333
R533
R534
R535
R536
0.1/16
C515
0.1/16
33
R516
R514
R510
MA10
MA0
MA11
R552
0
1k
R532
R546
R528
180
1k
C523
0.1/16
C521
0.1/16
C519
0.1/16
C518
0.1/16 R529
180
R530
NI
C517
0.1/16
R527
180
R523
NI
R524
180
R525
NI
R526
NI
C516
0.1/16
33
33
33
R522
R518
R520
MA1
MA2
MA3
ADSCTX
10
C17
0.1/16
C11
C6
0.1/16
0.1/16
C2
C4
C3
C1
0.1/16
C525
0.1/16
C566
C/R/V
0.1/16
C524
0.1/16 Y/B/U
C522
0.1/16 CVBS/G/Y
0.1/16
C520
CVBS
DA_BCK DA_XCK
DA_LRCK DA_DATA0 DA_DATA1 DA_DATA2 DA_DATA3
C5
22/6.3
22/6.3
22/6.3
C10
C9C8C7
NININI
NI
TP94
TP93
TP92
TP91
D5V
NI
R550
R549
0
C567
22/6.3
V.GND
Z3V
C539
0.1/16
R548
3.3k
2.2k
R547
TXSEL
C561
0.1/16
R558
NI
NI
D552
IC503
TC74VHC00FT-X
NI
D551
C562
22/6.3
R571
NI
D.GND
DECTX
D.GND
IC1
MM3023DN-X
C15
0.1/16 C16
33/4
TP39
TP40
TP42
TP44
TP45
TP43
TP38
L1
NQL044K-100X
NI
NI
C13
V5V C/R/V
V3V
Y/B/U
CVBS/G/Y
CVBS
CPURST BUSY
REQ
U2SDT
SCLKO
S2UDT
/LMMUTE
TCLOSE DA_DATA3 TOPEN DA_DATA2 SWUPDN
SWOPEN DA_DATA0 DA_DATA1
DA_XCK DA_LRCK TX DA_BCK
C14
M.GND
R553
R551
NI
NQR0007-002X
R554
NQR0007-002X
R556
NQR0007-002X
R555
R557
0
NQR0007-002X
R583: NI
R586
NI
R587
NI
R599
NI R598 NI
R597
NI
R594
NI R596 NI R595
NI
R585
NI
R584
NI
NQR0007-002X
C571
R582
NI
R588
NI
R581
100/6.3
C12
0.1/16
S.GND
TP41
D3V Z3V M9V D5V
NI
C568
C569
NI
NI
C570
NI
CN502 QGB2027L1-26X
TP47
TP49
TP52
TP48
TP50
TP54
TP59
TP63
TP56
TP55
TP57
TP61
TP65
CN503
QGB2027L1-26X
TP67
TP69
TP72
TP73
TP66
D.GND
TP68
TP70
TP71
TO SHEET 5
1
Audio signalDigital data signal Video signal
BC
DE
2-10
F
G
HA
I
Page 12

Printed circuit boards

Main board
C707
K706
C1701
6
D702
R706
K705
C931
5
4
3
2
C736
R1721
R705
IC704
R1722
C1703
C704
K604
C1702
C718
K703
R729 R728
C724
C722
R721
R724
R723
T1B
S831
S821
XV-S40BK/XV-S42SL
XV-E100SL
R663
R664
R629
K708
R725
R845
R639
C1704
R1723
R661
R660
C639
C755
Q693
R792
R771
C771
R758
C751
R755
C731
R717
K702
K701
S832
R750
C730
R715
R731
R711
R846 R847 R848
R778
R649
C757
C649
C629
R772
C739
IC751
C754
R757
C752
R773
R756
R751
R752
R753
C714
R741
R743
IC703
C715
C716
K704
R713
C709
Q709
D709
R709
CN703
S833 S834S835
R777
R767
R775
R765
C756
Q753
R776
R774
C772
R793
R742
R740
R701
D701
C701
R766
C746
R761
C745
R748
R783
C762
R747
R744
C741
C742
C740
R763
IC702
R704
C702
R762
IC741
R746
R745
R1728
R702
R1708
R788
C705
R1707
R1709
R1710
R609
R619
C609
R768
Q743
C747
R786
C797
Q791
R764
D792
R782
R1729
R795
R1727
R1726
R1704
R1725
R1715
X701
C706
R703
IC701
R1711
IC791
C619
R659
C659
R797
D791
C728
R789
R1714
C735
R665
CN701
R1732
Q694
R1713
RA701
R662
K605
RA702
C691
R623 R633
R634
R635
C634
S691
D639
Q631
R636
C985
C624
R631
Q697
R682
Q696
Q621
R625
D619
R624
C613
R612
C631
R611
R632
C623
C633
C621
R621
R622
RA703
R695
R694
R681
R699
Q611
R613
C611
R614
C601
C604
R602
R601
R615
C614
CN961
R698
R697
R688
R696
Q601
R606
C973
R605
D970
R604
R603
C603
R1731
C685
R685
R687
Q754
R779
C970
Q964
D974
D972
R686
Q744
C686
R707
L709
L710
R781
C737
R791
R790
R780
R971
R972
Q965
C984
C989
L959
C956
C987
R973
R975
D973
Q966
R974
C996
C995
C969
C821
R708
R769
L957
C982
D956
D957
C957
D954
C954
D953
C979
L955
L952
C997
C966
IC951
C967
C968
C977
C981
IC953
C976
C978
C713
C708
R1724
R911
C908
R901
C909
C952
C953
C965
C963
C964
C917
EP951
C904
D901
C907
D903
D902
C913
IC901
R903
T901
D951
D952
C993
Q991
C951
R960
R954
C960
L951
Q953
R980
Q952
R1716
R962
[B7074]
C961
R961
R964
R963
R965
C962
D960
C994
Q951
R952
R956
R953
CN702
P901
FC901
C902
C914
IC801
FC902
C905
C906
C910
C915
D908
R908
D910
PC901
PC902
R900
R801
S801
FW803
C801
FW802
L901
R905
R907
HS901
K902
R904
D904
C918
D911
R969
D801
C992
D991
R955
D950
C802
1
FW801
BC
DE
F
G
HA
I
2-11
Page 13
XV-S40BK/XV-S42SL
XV-E100SL
XV-S40BK/XV-S42SL XV-E100SL
DVD Servo control board
6
Forward side Reverse side
R551
R554
TP5
C247
R271
TP6
TP207
R222 R224 R221
TP205 TP206
IC402
TP213
TP570 TP232
TP14
TP13
R556
TP12
C228
R219
C222
C233
TP11
C225
TP10
C216
C223
R214 C211
TP9
CN502
K202
TP208
C262 C261
TP8
R257
C248
TP210
R226 R212R213
R211
C260
C263
C258
C306
TP139
R225
C259
C257
IC311
TP140
R232
R233
R228
R229
C249
C214
IC322
TP138
C326
R234
R230
C229
TP161
TP136
TP137
TP302TP303
TP301
R235
TP148
TP149
TP135
R252
C251
TP134
IC251
TP42
C344
TP160
TP306
TP133
C341
C342
C302
TP43
TP132
R312
R343
TP131
IC312
C301
R251
R259
TP39
C317
R341R342
C324
TP45
C4
C343
TP48
TP41
IC321
C314
C315
TP175
TP141
TP304
TP305
C310
C311
C307C309
TP307
TP150
C318
TP151
TP152 TP153 C319
TP154 TP155
TP157
TP156
TP158 TP159
TP93
R253 C253
C255 R258
R254
C264
TP44
K302
TP91
C7
R349
R324
C320 R328
C321
C9
C288
TP40
R317
R348
TP38
R318
R347
TP59
TP57
R549
R528 R546
IC101
C503
C122
CN101
TP505
C525
R502
R118
TP114
TP61
C502
C547
C529C544
R111
TP55
R501
R116 C120
R559
C528 C527 R542 R543 R539 R537 R535 R533
R531
R532
R114
TP111
TP56
C8
C501
TP415
R236
TP233
TP234
TP109
TP63
TP92
R545 R541 R540 R538 R536 R534
R416 R415 R414
TP108
IC403
TP173
C412
R115
R419 R418 C409
C406
TP506
R231
TP102
TP103
TP107
C117 C116 C115
TP110
C210 C209 R210 C205 R209 C206
TP413
TP507
IC502
C226
C118 R113
TP106
TP121
TP120
TP113
TP164 TP166
R405 R404 R403
R413
R411
TP212 TP202
TP201
C220
TP568
TP220 TP219 TP218 TP221 TP217
TP567
TP174
TP425
C405
R412
C242
TP162 TP163 TP401 TP167
TP405
TP169 TP170
C224
TP231
R205
TP143
TP47
R557
TP214
TP215
R204
TP144
C401
R408
R203
R409
TP203
TP216
TP211
R202
TP146
TP145 CN201
C571
C402
R432
TP204
C208
C237
TP224
TP225
TP1
TP54
C201
TP2
TP52
TP50
TP49
TP226
TP3
C238
TP15
TP4
IC202
C212
TP7
TP68
TP71
TP72
C10
TP125
TP126
TP128
CN202
IC501
C508
R526 R524
TP124
TP65
TP69 TP70 TP73
R155
C119 R112 R110
R108 R123
TP119
TP123
TP66
C516
TP117
TP118
TP20
TP67
TP116
TP19
C507
R525 R523
IC1
C12
K102
C160
TP115
R104
TP18
C517
C506
R106
R101 R102 R103
R571
C15
R152R153
TP112
TP16
C518
TP17
C505
C519
C520
C159
C127
C125
R107
R105
TP176
C504
C124
TP101
C130 R127 C132 C133 R129 C135 C136 C137
TP142
IC102
TP129
TP122
CN503
C521
C522 C523
R165
C123
C110
TP105
C138
C139
R124
C524
C2C3
C13
C14
C1
Q1
R1
C17
C313
R316
R321
R322 R323 R325 R326 R327 R329 R330 R331
C316
C312
R346
X301
R320
5
C6
C5
R350 R363 R364 C325
R553
C345
C346
K401
L1
IC301
X401
R431
4
R301
R302
R303
R304
R305
R306
R307
R308
R309
C327
C272
C252
C286 C281 R283
R291
R286
R282
C280
R280
C273
3
R293
R292
R281
C282 R284
R277 R275 C277
R290
C278
C275C276 R276
R289
K303
R274
R273
R345
C279
C303
R288
C256 R256
C254
C287
C274 D271
R272
R287
D301
C271
IC271
C283C284
C217
K201
R285 R255 C218 R248 R250 R246 R245 R249
R243 R242 C213
R332
C215
R310
R311
C304
C305
R241
R555
K301
C411
K203
R240
K402
C414
C413
C246
R239
C408
R407
R238
C570
C244
R237
C569
R206
IC201
C568
R428
R427
R208
C207
R426
C221
R425
C202
R424
C219
C203
R423
C204
R422
R227
C230
R207
R421
C245
C410
C241
R278R279
R417
R223
C227 C239 C240
R218
C232 C231
R215
C534
R220
C141
IC401
C536
C537
R166
C535 C526
C538
R599 R598
C407
Q104
R109
R154
C109
C530
R147
C140
C532 C531
C533
R131
R117
C145
K502
C121
R122
C146
IC505
K503
R132
R550
Q105
C144
C108
C107
R597
C128
R121
C143
C104
R594
C567
C566
C129
R125
R596
R128 C134
R119
C101
R595
K501
K504
C561
C131
C562
C152
C158
Q102
R548
R547
R585
C103
K103
R584
C539
C543
IC504
C126
C106
IC503
C542
D551 D552
R529
C151
R582
R583
R530
R588
R586
R527
K561
R558
R587
C540
C11
C556
R512 R514 R518 R522
C102
C541
C161
C105
Q101
C16
R504 K505 R511 R513 R515 R517 R519 R521 R506 R507 R508 R509 R510 R516 R520
C557
K506
D501
C509 C510
C511
C512
C513
C514
C515
TP94
TP127
2
1
BC
DE
2-12
F
G
HA
I
Page 14
XV-S40BK/XV-S42SL/XV-E100SL
1. This design of this product contains special hardware and many circuits and components specially for safety purposes. For continued protection, no changes should be made to the original design unless authorized in writing by the manufacturer. Replacement parts must be identical to those used in the original circuits. Services should be performed by qualified personnel only.
2. Alterations of the design or circuitry of the product should not be made. Any design alterations of the product should not be made. Any design alterations or additions will void the warranty and will further relieve the manufacture of responsibility for personal injury or property damage resulting therefrom.
3. Many electrical and mechanical parts in the products have special safety-related characteristics.
These characteristics are often not evident from visual inspection nor can the protection afforded by them necessarily be obtained by using replacement components rated for higher voltage, wattage, etc. Replacement parts which have these special safety characteristics are identified in the Parts List of Service Manual. Electrical components having such features are identified by shading on the schematics and by ( ) on the Parts List in the Service Manual. The use of a substitute replacement which does not have the same safety characteristics as the recommended replacement parts shown in the Parts List of Service Manual may create shock, fire, or other hazards.
4. The leads in the products are routed and dressed with ties, clamps, tubings, barriers and the like to be separated from live parts, high temperature parts, moving parts and/or sharp edges for the prevention of electric shock and fire hazard. When service is required, the original lead routing and dress should be observed, and it should be confirmed that they have been returned to normal, after reassembling.
5. Leakage current check (Electrical shock hazard testing) After reassembling the product, always perform an isolation check on the exposed metal parts of the product (antenna terminals, knobs, metal cabinet, screw heads, headphone jack, control shafts, etc.) to be sure the product is safe to operate without danger of electrical shock. Do not use a line isolation transformer during this check.
Plug the AC line cord directly into the AC outlet. Using a "Leakage Current Tester", measure the leakage current from each exposed metal parts of the cabinet , particularly any exposed metal part having a return path to the chassis, to a known good earth ground. Any leakage current must not exceed 0.5mA AC (r.m.s.)
Alternate check method Plug the AC line cord directly into the AC outlet. Use an AC voltmeter having, 1,000 ohms per volt or more sensitivity in the following manner. Connect a 1,500 10W resistor paralleled by a 0.15 F AC-type capacitor between an exposed metal part and a known good earth ground. Measure the AC voltage across the resistor with the AC voltmeter.
AC VOLTMETER (Having 1000 ohms/volts, or more sensitivity)
Move the resistor connection to each exposed metal part, particularly any exposed metal part having a return path to the chassis, and measure the AC voltage across the resistor. Now, reverse the plug in the AC outlet and repeat each measurement. voltage measured Any must not
0.15 F AC TYPE
1500 10W
Place this probe on each exposed metal part.
exceed 0.75 V AC (r.m.s.). This corresponds to 0.5
Good earth ground
1. This equipment has been designed and manufactured to meet international safety standards.
2. It is the legal responsibility of the repairer to ensure that these safety standards are maintained.
3. Repairs must be made in accordance with the relevant safety standards.
4. It is essential that safety critical components are replaced by approved parts.
5. If mains voltage selector is provided, check setting for local voltage.
!
Burrs formed during molding may be left over on some parts of the chassis. Therefore, pay attention to such burrs in the case of preforming repair of this system.
1-2
Page 15
XV-S40BK/XV-S42SL/XV-E100SL

Preventing static electricity

Electrostatic discharge (ESD), which occurs when static electricity stored in the body, fabric, etc. is discharged, can destroy the laser diode in the traverse unit (optical pickup). Take care to prevent this when performing repairs.
1.1. Grounding to prevent damage by static electricity
Static electricity in the work area can destroy the optical pickup (laser diode) in devices such as DVD players. Be careful to use proper grounding in the area where repairs are being performed.
1.1.1. Ground the workbench
1. Ground the workbench by laying conductive material (such as a conductive sheet) or an iron plate over it before placing the traverse unit (optical pickup) on it.
1.1.2. Ground yourself
1. Use an anti-static wrist strap to release any static electricity built up in your body.
(caption) Anti-static wrist strap
Conductive material (conductive sheet) or iron plate
1.1.3. Handling the optical pickup
1. In order to maintain quality during transport and before installation, both sides of the laser diode on the replacement optical pickup are shorted. After replacement, return the shorted parts to their original condition. (Refer to the text.)
2. Do not use a tester to check the condition of the laser diode in the optical pickup. The tester's internal power source can easily destroy the laser diode.
1.2. Handling the traverse unit (optical pickup)
1. Do not subject the traverse unit (optical pickup) to strong shocks, as it is a sensitive, complex unit.
2. For specific details, refer to the replacement procedure in the text. Be careful not to take too long a time when attaching it to the connector.
3. Handle the flexible cable carefully as it may break when subjected to strong force.
4. It is not possible to adjust the semi-fixed resistor that adjusts the laser power. Do not turn it
1-3
Page 16
XV-S40BK/XV-S42SL/XV-E100SL

Precautions for Service

Handling of Traverse Unit and Laser Pickup
1. Do not touch any peripheral element of the pickup or the actuator.
2. The traverse unit and the pickup are precision devices and therefore must not be subjected to strong shock.
3. Do not use a tester to examine the laser diode. (The diode can easily be destroyed by the internal power supply of the tester.)
4. When replacing the pickup, after mounting a new pickup, remove the solder on the short land which is provided at the center of the flexible wire to open the circuit.
6. Half-fixed resistors for laser power adjustment are adjusted in pairs at shipment to match the characteristics of the optical block. Do not change the setting of these half-fixed resistors for laser power adjustment.
Destruction of Traverse Unit and Laser Pickup by Static Electricity
Laser diodes are easily destroyed by static electricity charged on clothing
or the human body. Before repairing peripheral elements of the traverse unit or pickup, be sure to take the following electrostatic protection:
1. Wear an antistatic wrist wrap.
2. With a conductive sheet or a steel plate on the workbench on which
the traverse unit or the pick up is to be repaired, ground the sheet or the plate.
3. Pick-up's laser diode might be destroyed by static electricity, and put up solder to "Soldering part A",
please before extracting the card wire from connector (CN101).
4. Moreover, please remove solder from "Soldering part A" after inserting the card wire in connector (CN101) at assembly.
Please refer to "Fig.4" of "Disassembly method" for details.
Soldering part A
1-4
Servo control board
Page 17

Important for Laser Products

XV-S40BK/XV-S42SL/XV-E100SL
1.CLASS 1 LASER PRODUCT
2.DANGER : Invisible laser radiation when open and inter
lock failed or defeated. Avoid direct exposure to beam.
3.CAUTION : There are no serviceable parts inside the Laser Unit. Do not disassemble the Laser Unit. Replace the complete Laser Unit if it malfunctions.
4.CAUTION : The compact disc player uses invisible laser radiation and is equipped with safety switches which prevent emission of radiation when the drawer is open and the safety interlocks have failed or are de feated. It is dangerous to defeat the safety switches.
5.CAUTION : If safety switches malfunction, the laser is able to function.
6.CAUTION : Use of controls, adjustments or performance of procedures other than those specified herein may result in hazardous radiation exposure.
!
Please use enough caution not to see the beam directly or touch it in case of an adjustment or operation check.
REPRODUCTION AND POSITION OF LABEL and PRINT
WARNING LABEL and PRINT
CAUTION: Invisible laser
radiation when open and interlock failed or defeated. AVOID DIRECT EXPOSURE TO BEAM. (e)
VARNING: Osynlig laser­strålning när denna del är öppnad och spärren är urkopplad. Betrakta ej strålen. (s)
ADVARSEL: Usynlig laser­stråling ved åbning, når sikkerhedsafbrydere er ude af funktion. Undgå udsæt­telse for stråling (d)
VARO: Avattaessa ja suo­jalukitus ohitettaessa olet alttiina näkymättömälle lasersäteilylle. Älä katso säteeseen. (f)
CLASS 1 LASER PRODUCT
1-5
Page 18
XV-S40BK/XV-S42SL/XV-E100SL

Disassembly method

<Main body>
Removing the top cover (see Fig.1)
1.Remove the two screws A attaching the top cover on both sides of the body.
2.Remove the three screws B attaching the top cover on the back of the body.
3.Remove the top cover from the body by lifting the rear part of the top cover.
ATTENTION: Do not break the front panel tab fitted to the top cover.
Removing the mechanism assembly (see Fig.2,3)
* Prior to performing the following procedure, remove the top cover. * There is no need to remove the front panel assembly.
A x 2
CN703
B
B
B
C
Fig.1
CN702
C
1.Remove the three screws C attaching the mechanism assembly on the bottom chassis.
2.The servo control board is removed from the connector CN961 and CN701 connected with the main board respectively.
3.Remove the mechanism assembly by lifting the rear part of the mechanism assembly.
*Please remove lug wire when you do not remove the mechanism assembly easily.
Removing the servo control board (see Fig.4)
* Prior to performing the following procedure, remove the top cover and mechanism assembly.
1.Disconnect the card wire from connector CN201 and CN202 on the servo control board respectively.
2.Disconnect the flexible wire from connector CN101 on the servo control board from pick-up.
Mechanism
assembly
Main board
C
Fig.2
CN701 CN961
Fig.3
Servo control board
ATTENTION At this time, please extract the wire after short-circuited of two places on the wire in part a with solder. Please remove the solder two places of part a after connecting the wire with CN101 when reassembling.
3.Two places in hook b are removed, the servo control board is lifted, and it is removed.
1-6
Hook b
Hook b
Servo control board
Fig.4
Page 19
Removing the rear panel (see Fig.5)
*Prior to performing the following procedure, remove the top cover.
1.Remove the eight screws D attaching the rear panel on the back of the body.
XV-S40BK/XV-S42SL/XV-E100SL
Rear panel
Removing the front panel assembly (see Fig.6,7)
* Prior to performing the following procedure, remove the top cover. * There is no need to remove the mechanism assembly.
1.Remove the one screw E attaching the front panel assembly on the bottom chassis.
2.Disconnect the wire from CN702 and CN703 on the main board respectively.
3.Hook c and d are removed respectively, and the front panel assembly is removed.
Removing the main board (see Fig.8)
* Prior to performing the following procedure, remove the top cover, mechanism assembly and rear panel.
1.Disconnect the wire from CN702 and CN703 on the main board respectively.
2.Remove the four screws F attaching the main board on the bottom chassis.
Front panel
assembly
D
Hook d
Hook c
CN703
Fig.5
D
D
Hook d
E
Fig.6
CN702
Fig.7
F
CN703
F
Fig.8
F
CN702
F
1-7
Page 20
XV-S40BK/XV-S42SL/XV-E100SL
<Loading assembly section>
Removing the clamper assembly
(See Fig.1)
1.
Remove the four screws A attaching the clamper assembly.
2.
Move the clamper in the direction of the arrow to release the two joints a on both sides.
ATTENTION:
When reattaching, fit the clamper to the two joints a.
Removing the tray (See Fig.2 and 3)
Prior to performing the following procedure, remove the clamper assembly.
1.
Push b of the slide cam into the slot on the left side of the loading base until it stops.
2.
Draw out the tray toward the front.
Joint a
A
Joint a
A
AA
Fig.1
ATTENTION:
Before reattaching the tray, slide the part c of the slide cam to the right as shown in Fig.3.
Clamper base
Push
Tray
b
Fig.2
Part c
Slide cam
Fig.3
1-8
Page 21
Removing the traverse mechanism assembly (See Fig.4 and 5)
XV-S40BK/XV-S42SL/XV-E100SL
Prior to performing the following procedure, remove the clamper assembly and the tray.
1.
Remove the four screws B attaching the traverse mechanism assembly.
ATTENTION:
Before reattaching the traverse mechanism assembly, pass the card wire extending from the spindle motor board through the notch d of the elevator.
Removing the elevator (See Fig.6 and 7)
Prior to performing the following procedure, remove the clamper assembly, the tray and the traverse mechanism assembly.
1.
Extend each bar e inside of the loading base outward and detach the elevator shaft.
B
Traverse mechanism assembly
B
B
BB
BB
Fig.4
Traverse mechanism assembly
BB
Elevator
Notch d
ATTENTION:
Elevator
When reattaching, first fit the two shafts on the front of the elevator to the slots f of the slide cam.
Shafts
Slide cam
Elevator
Fig.5
e
Elevator
Elevator
Loading base
Slots f
e
Fig.6Fig.7
1-9
Page 22
XV-S40BK/XV-S42SL/XV-E100SL
Removing the motor assembly
(See Fig.8 and 9)
Prior to performing the following procedure, remove the clamper assembly, the tray, the traverse mechanism assembly and the elevator.
1.
Remove the belt from the pulley.
2.
Remove the screw C attaching the motor assembly.
3.
Turn over the body and remove the screw D attaching the motor assembly.
4.
Release the two tabs g retaining the motor board.
Belt
C
Motor assembly
Fig.8
Tabs g
Motor assembly
D
Loading base
Fig.9
1-10
Page 23
XV-S40BK/XV-S42SL/XV-E100SL
Pulley gear
Pulley gear bracket
Motor assembly
Pulley gear bracket
E
Idle gear
Fig.10
Idle gear
Pulley gear
Tads h
Pulley gear
Removing the Idle gear / pulley gear / middle gear / slide cam (See Fig.10 to 12)
Prior to performing the following procedure, remove the clamper assembly, the tray, the traverse mechanism assembly, the elevator and the motor assembly.
1.
Press the two tabs h inward and pull out the idle gear.
2.
Remove the screw E attaching the pulley gear bracket. Slide the pulley gear bracket in the direction of the arrow and pull out the pulley gear.
3.
Slide the slide cam in the direction of the arrow to release the two joints i and remove upward.
4.
Remove the middle gear.
Slide cam
Joint i
Slide cam
Middle gear
Joint i
Fig.11
Middle gear
Fig.12
Loading base
1-11
Page 24
XV-S40BK/XV-S42SL/XV-E100SL
<Traverse mechanism assembly section>
Removing the feed motor assembly
(See Fig.13)
1.
Unsolder the two soldering j on the spindle motor board.
2.
Remove the two screws F attaching the feed motor assembly.
Removing the feed motor
(See Fig.13 to 15)
Prior to performing the following procedure, remove the feed motor assembly.
1.
Remove the screw G attaching the thrust spring.
Feed motor assembly
F
F
Notch k
Soldering j
Spindle motor board
Pickup
Spindle motor
Fig.13
Feed gear (M)
Thrust spring
ATTENTION:
2.
Remove the feed gear (M).
3.
Pull out the feed gear (E) and the lead screw.
4.
Remove the two screws H attaching the feed motor.
ATTENTION:
When reattaching the thrust spring, make sure that the thrust spring presses the feed gear (M) and the feed gear (E) reasonably.
When reattaching, pass the two cables extending from the feed motor through the notch k of the feed holder as shown in Fig.13.
G
Lead screw
Feed gear (E)
Fig.14
Feed motor
1-12
Feed holder
H
Fig.15
Page 25
XV-S40BK/XV-S42SL/XV-E100SL
Removing the pickup (See Fig.16 and 17)
1.
Remove the screw I attaching the T spring (S) and the shaft holder. Remove also the plate.
ATTENTION:
2.
Pull out the part l of the shaft upward. Move the part m in the direction of the arrow and detach from the spindle base.
3.
Disengage the joint n of the pickup and the shaft in the direction of the arrow.
4.
Pull out the shaft from the pickup.
5.
Remove the two screws J attaching the actuator.
6.
Disengage the joint of the actuator and the lead spring. Pull out the lead spring.
When reattaching, make sure that the T spring (S) presses the shaft.
Shaft holder
I
Plate
T spring (S)
Lead spring
Pickup
Joint n
Part m
Part l
Fig.16
Actuator
J
Actuator
Lead spring
Shaft
Spring
The spring must be under the shaft when you install pick-up.
Removing the shaft holder / shaft
(See Fig.18)
1.
Remove the screw K attaching the shaft holder.
2.
Remove the shaft.
Pick-up
Pickup
K
Shaft
Fig.17
Shaft
Shaft holder
Fig.18
1-13
Page 26
XV-S40BK/XV-S42SL/XV-E100SL
Removing the spindle motor assembly
(See Fig.19 to 21)
1.
Remove the three screws L attaching the spindle motor on the bottom of the mechanism base.
ATTENTION:
2.
Remove the three screws M attaching the spindle base.
When reattaching, pass the card wire extending from the spindle motor board through the notch of the spindle base.
L
L
Spindle motor assembly
Spindle motor
Fig.19
Spindle base
M
L
Fig.20
M
Spindle base
Mechanism base
Fig.21
1-14
Page 27
XV-S40BK/XV-S42SL/XV-E100SL

Adjustment method

(1) Initialization method
If microprocessor (IC401,IC402,IC403) or pick-up is replaces, initialize the DVD player in the following matter
1)Take out the disc and close the tray.
2)Unplug the power plug.
3)Insert power plug into outlet while pressing both PLAY button and OPEN/CLOSE button.
4)FL Display indicate "TEST " . :Destination area code, :Region code
5)Press 3D-PHONIC key button of remote controller. and EEPROM initialize start.
6)When indicate "DTS" on the display, initialize finishes.
7)The power is turned OFF, and Unplug the power plug.
(2) Display of "Laser current value" and "Jitter value"
"Laser current value" and "Jitter value" are displayed on the FL display by the undermentioned method. Please refer to the failure diagnosis.
1)Take out the disc and close the tray.
2)Unplug the power plug.
3)Insert power plug into outlet while pressing both PLAY button and OPEN/CLOSE button.
4)FL Display indicate "TEST " . :Destination area code, :Region code
5)Press the "OPEN/CLOSE" button to move the tray outward. Put the test disc (VT-501) on the tray and press "OPEN/CLOSE" button. The tray should move inward (Note:Don't push to close the tray directly by hand etc.)
6)Press the "PLAY" button.
7)The laser current value and the jitter value is displayed on the FL indicator as follows.
FL Display
* The test mode is canceled when
0 0 4 0 3 9 7 8
Laser current value Jitter value
the power is turned off.
For Laser current value
The laser current value becomes 40mA for the above-mentioned. Becomes a test mode by doing above-mentioned procedure 1) - 4). Afterwards, the laser current value can be switched by pushing the key to remote control without turning on the disk.
Remote control "4" key --- Laser of CD Remote control "5" key --- Laser of DVD
If the laser current value is 64mA or less, it is roughly good. There is a possibility to which pick-up is deteriorated, and exchange pick-up, please when there are 65mA or more laser current value.
*Returns to a usual test mode by the thing to push the stop button of remote control.
1-15
Page 28
XV-S40BK/XV-S42SL/XV-E100SL
For Jitter value
The jitter value is displayed by the hexadecimal number and refer to the conversion table of following,please. If the indication value is 11% or less, it can be judged by this simple checking method that the signal read precision of the set is satisfactory. Before using the TEST disc VT-501, careful check it if there is neither damage nor dirt on the read surface.
OPEN
STANDBY/ON
/CLOSE
3D
PLAY
PHONIC
MODE
123
4
7
SUBTITLEANGLE AUDIO
DIGEST
S
U
VIO
E
PR
AR
LE
C
W
SLO
LE
IT
T
C
H
OIC
E
RM-SXVB40A REMOTE CONTROL
3D PHONIC
CANCEL
RETURN
BUTTON (Initialize start)
56
89
0+1010
5 BUTTON
THEATER POSITION
ZOOM
(LASER OF DVD)
N
EX
T
SELECT
S
TR
O
BE
SLO
W
+
4 BUTTON
M
E
NU
(LASER OF CD)
ENTER
Y
PLA
IS
D
POWER BUTTON
STANDBY
STANDBY ON
DOLBY
D I G I T A L
DTS display part
FL Display
DVD/CD PLAYER
OPEN/CLOSE
BUTTON
PLAY BUTTON
OPEN/CLOSE
SKIP
DVD/VIDEO CD/CD
PAUSEPLAYSTOP
Jitter value
FL display FL display
3818 3828 3838 3848 3858 3868 3878 3888 3898 38A8 38b8 38c8 38d8 38E8 38F8 3918 3928 3938 3948 3958 3968 3978 3988
Conversion value(%)
4.7
4.8
4.9
5.1
5.2
5.3
5.4
5.5
5.7
5.8
5.9
6.0
6.1
6.3
6.4
6.6
6.7
6.9
7.0
7.1
7.2
7.3
7.5
3998 39A8 39B8 39C8 39D8 39E8 39F8 3A18 3A28 3A38 3A48 3A58 3A68 3A78 3A88 3A98 3AA8 3AB8 3AC8 3AD8 3AE8 3AF8
Conversion value(%)
7.6
7.7
7.8
7.9
8.1
8.2
8.3
8.5
8.7
8.8
8.9
9.0
9.1
9.3
9.4
9.5
9.6
9.7
9.9
10.0
10.1
10.2
FL display FL display
3B18 3B28 3B38 3B48 3B58 3B68 3B78 3B88 3B98 3BA8 3BB8 3BC8 3BD8 3BE8 3BF8 3C18 3C28 3C38 3C48 3C58 3C68 3C78 3C88
Conversion value(%)
10.5
10.6
10.7
10.8
10.9
11.1
11.2
11.3
11.4
11.5
11.7
11.8
11.9
12.0
12.1
12.4
12.5
12.7
12.7
12.9
13.0
13.1
13.2
3C98 3CA8 3CB8 3CC8 3CD8 3CE8 3CF8 3D18 3D28 3D38 3D48 3D58 3D68 3D78 3D88 3D98 3DA8 3DB8 3DC8 3DD8 3DE8 3DF8
Conversion value(%)
13.3
13.5
13.6
13.7
13.8
13.9
14.1
14.3
14.4
14.5
14.7
14.8
14.9
15.0
15.1
15.3
15.4
15.5
15.6
15.7
15.9
16.0
1-16
Page 29
Troubleshooting
Servo volume
Press OPEN /CLOSE key
XV-S40BK/XV-S42SL/XV-E100SL
Is tray
operation
Confirmation of tray drive circuit
N
and circuit in surrounding
correct?
Y
Is the traverse moving along the innermost
N
perimeter for SW detection?
Y
"NO DISC" message appears
Y
immediately after vertical movement of the pick-up lens
N
The state that DISC does not rotate continues for several seconds, and becomes NO DISC or an error display afterwards. The rotation of DISC becomes high-speed and abnormal, and becomes NO DISC or an error display afterwards.
N
Is focus retraction OK?
FE
OFF
Even when it retracts correctly, if it is out of focus and makes repeated retries with a clicking sound, it is in error.
ON
See "(4) Focus ON error"
N
in "Check points for individual errors"
Y
Is tracking retraction OK?
See "(3) Traverse movement error" in "Check points for individual errors"
See "(2) Disk detection, distinction error" in "Check points for individual errors"
Y
See "(1) Spindle startup error" in "Check points for individual errors"
Is the inter-layer jump OK?
FE
LO LI
A
Two layers of DVD only.
N
(8) Inter-layer
jump error
Y
TE
OFF
If TE waveform reappears or fails to converge after the TE retraction, it is in error.
ON
Y
Is the spindle servo
locked correctly?
Is the RF OUT waveform
locked correctly?
Y
A
See "(5) Tracking ON error"
N
in "Check points for individual errors"
See "(6) Spindle CLV error"
N
in "Check points for individual errors"
Has the disc information
been collected?
Stop will result
Y
Is playback
N
possible?
Y
OK !
N
(7) Address read
error
Check (9),(10),(11), and (12) items in "Check points for individual errors"
1-17
Page 30
XV-S40BK/XV-S42SL/XV-E100SL
Check points for each error
(1) Spindle start error
1.Defective spindle motor
*Are there several ohms resistance between each pin of CN201 "5-6","6-7","5-7"? (The power supply is turned off and measured.)
*Is the sign wave of about 100mVp-p in the voltage had from each terminal? [ CN201"9"(H1-),"10"(H1+),"11"(H2-),"12"(H2+),"13"(H3-),"14"(H3+) ]
2.Defective spindle motor driver (IC251)
*Has motor drive voltage of a sine wave or a rectangular wave gone out to each terminal(SM1~3) of CN201"5,6,7" and IC251"2,4,7"?
*Is FG pulse output from the terminal of IC251"24"(FG) according to the rotation of the motor?
*Is it "L(about 0.9V)" while terminal of IC251"15"(VH) is rotating the motor?
3.Has the control signal come from servo IC or the microcomputer?
*Is it "L" while the terminal of IC251"16"(SBRK) is operating? Is it "H" while the terminal of IC251"23"(/SPMUTE) is operating?
*Is the control signal input to the terminal of IC251"22"(EC)? (changes from VHALF voltage while the motor is working.)
*Is the VHALF voltage input to the terminal of IC251"21"(ECR)?
4.Is the FG signal input to the servo IC?
*Is FG pulse input to the terminal of IC201"53"(FG) according to the rotation of the motor?
(2) Disc Detection, Distinction error (no disc, no RFENV)
* Laser is defective. * Front End Processor is defective (IC101). * APC circuit is defective. --- Q101,Q102. * Pattern is defective. --- Lines for CN101 - All patterns which relate to pick-up and patterns between IC101 * Servo IC is defective (IC201). * IC101 --- For signal from IC101 to IC201, is signal output from IC101 "20" (ASOUT) and IC101 "41"(RFENV) and IC101 "22" (FEOUT)?
1-18
Page 31
(3) Traverse movement NG
1.Defective traverse driver *Has the voltage come between terminal of CN101 "1" and "2" ?
2.Defective BTL driver (IC271) *Has the motor drive voltage gone out to IC271"17" or "18"?
3.Has the control signal come from servo IC or the microcomputer? *Is it "H" while the terminal of IC271"9"(STBY1) ? *TRSDRV Is the signal input?
4.TRVSW is the signal input from microcomputer?
(4) Focus ON NG
* Is FE output ? --- Pattern, IC101 * Is FODRV signal sent ? (R279) --- Pattern, IC201 * Is driving voltage sent ?
IC271 "13", "14" --- If NG, pattern, driver, mechanical unit .
* Mechanical unit is defective.
(5) Tracking ON NG
XV-S40BK/XV-S42SL/XV-E100SL
* When the tracking loop cannot be drawn in, TE shape of waves does not settle. * Mechanical unit is defective.
Because the self adjustment cannot be normally adjusted, the thing which cannot be normally drawn in is thought. * Periphery of driver (IC271)
Constant or IC it self is defective. * Servo IC (IC201)
When improperly adjusted due to defective IC.
(6) Spindle CLV NG
* IC101 -- "35"(RF OUT), "30"(RF-), "31(RF+). * Does not the input or the output of driver's spindle signal do the grip? * Has the tracking been turned on? * Spindle motor and driver is defective. * Additionally, "IC101 and IC201" and "Mechanism is defective(jitter)", etc. are thought.
(7) Address read NG
* Besides, the undermentioned cause is thought though specific of the cause is difficult because various factors are thought.
Mechanism is defective. (jitter)
IC201, IC301, IC401.
The disc is dirty or the wound has adhered.
(8) Between layers jump NG (double-layer disc only)
Mechanism defective Defect of driver's IC(IC271) Defect of servo control IC(IC201)
1-19
Page 32
XV-S40BK/XV-S42SL/XV-E100SL
(9) Neither picture nor sound is output
1.It is not possible to search *Has the tracking been turned on?
"(5) Tracking ON error" in "Check points for individual errors"
*To *Is the feed operation normal? To "(3) traverse movement NG" in "Check points for individual errors" when it is not normal. Are not there caught of the feeding mechanism etc?
(10) Picture is distorted or abnormal sound occurs at intervals of several seconds.
Is the feed operation normal? Are not there caught of the feeding mechanism etc?
(11) Others
The image is sometimes blocked, and the image stops. The image is blocked when going to outer though it is normal in surroundings in the disk and the stopping symptom increases.
when the tracking is not normal.
There is a possibility with bad jitter value for such a symptom.
(12) CD During normal playback operation
a) Is TOC reading normal? Displays total time for CD-DA. Shifts to double-speed mode for V-CD.
YES
NO
b)Playback possible?
*--:-- is displayed during FL search. According to [It is not possible to search ] for DVD(9), check the feed and tracking systems. *No sound is output although the time is displayed.(CA-DA) DAC, etc, other than servo. *The passage of time is not stable, or picture is abnormal.(V-CD) *The wound of the disc and dirt are confirmed.
1-20
Page 33

Description of major ICs

AN8702FH(IC101):Frontend processor
1.Pin layout
HDTYPE
646362616059585756555453525150
VIN12
VIN11
GND1
VIN4
VIN3
VIN2
VIN1
VREF1
VCC1
VIN10
VIN9
VIN8
VIN7
VIN6
VIN5
49
XV-S40BK/XV-S42SL/XV-E100SL
2.Pin function
Pin No.
1 2 3 4 5 6 7 8 9
10
11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33
Symbol
PC1
PC01
PC2
PC02
TGBAL
TBAL FBAL
POFLT
DTRD
IDGT
STANDBY
SEN SCK
STDI RSEL JLINE
TEN
TEOUT
ASN
ASOUT
FEN
FEOUT
VSS
TG
VDD
GND2
VREF2
VCC2
VHALF DFLTON DFLTOP
DSFLT
GND3
1
PC1
2
PC01
3
PC2
4
PC02
5
TGBAL
6
TBAL
7
FBAL
8
POFLT
9
DTRD
10
IDGT
SEN SCK
STDI
RSEL
JLINE
11 12 13 14 15 16
171819202122232425262728293031
TEN
TEOUT
STANDBY
I/O Description
Tangential phase balance control terminal
I I
Tracking balance control terminal
I
Focus balance control terminal
O
Track detection threshold level terminal
I
Data slice part data read signal input terminal (For RAM)
I
Data slice part address part gate signal input terminal( For RAM)
I
Standby mode control terminal
I
SEN(Serial data input terminal)
I
SCK(Serial data input terminal)
I
STDI(Serial data input terminal)
Tracking error signal output terminal
O
I
Focus error output amplifier reversing input terminal
O
Focus error signal output terminal
-
Connect to GND
O
Tangential phase error signal output terminal
-
Power supply terminal 3V
-
Connect to GND
O
VREF2 voltage output terminal
-
Power supply terminal 5V
O
VHALF voltage output terminal
Connect to GND
-
AN8702FH
FEN
ASN
FEOUT
ASOUT
VSS
48
RFINN RFINP
47
TESTSG
46
AGCO
45
AGCG
44
PEAK
43 42
BOTTOM
41
RFENV
40
BDO
39
OFTR
38
DCRF
37
RFC
36
VCC3
35
RFOUT
34
RFDIFO
33
GND3
32
TG
VDD
VCC2
GND2
VREF2
Pin No.
Symbol I/O Description
34
RFDIFO
35
RFOUT 36 37 38 39 40 41
RFENV 42
BOTTOM 43 44
AGCG
45
AGCO
46
TESTSG
47
RFINP
48
RFINN 49 50 51 52 53 54 55 56
VREF1
57
58
59
60
61 62 63 64
HDTYPE
VHALF
VCC3
RFC DCRF OFTR
BDO
PEAK
VIN5
VIN6
VIN7
VIN8
VIN9 VIN10 VCC1
VIN1
VIN2
VIN3
VIN4
GND1 VIN11 VIN12
DSFLT
DFLTOP
DFLTON
Power supply terminal 5V
-
All addition amplifier capacitor terminal
O
OFTR output terminal
O
RF envelope output terminal
O
Bottom envelope detection filter terminal
O
Peak envelope detection filter terminal
O
AGC amplifier gain control terminal
O
TEST signal input terminal
I
RF signal positive input terminal
I
RF signal negative input terminal
I
Focus input of external division into two terminal
I
Focus input of external division into two terminal
I I I I I
Power supply terminal 5V
-
VREF1 voltage output terminal
O
External division into four (DVD/CD) RF input
I
terminal1 External division into four (DVD/CD) RF input
I
terminal2 External division into four (DVD/CD) RF input
I
terminal3 External division into four (DVD/CD) RF input
I
terminal4 Connect to GND
­I I
1-21
Page 34
XV-S40BK/XV-S42SL/XV-E100SL
BA5983FM-X (IC271) : 4CH DRIVER
1.Block Diagram
27
26
10k
25
20k
28
Vcc
24
23 22
10k
20k
21
STAND BY CH4
20
Vcc
19
10k
10k
18
Level Shift
17 16
10k
10k
10k
10k
15
10k
10k
Level Shift
10k
10k
1
2
3
5
4
10k
10k
6
7
2.Pin Function
Pin No. Pin No.
Symbol Symbol
1
BIAS IN
2
OPIN1(+)
3
OPIN1(-)
4
OPOUT1
5
OPIN2(+)
6
OPIN2(-)
7
OPOUT2
8
9 10 11 12 13 14
GND
STBY1
PowVcc1
VO2(-)
VO2(+)
VO1(-)
VO1(+)
I/O I/O
Input for Bias-amplifier
I
Non inverting input for CH1 OP-AMP
I
Inverting input for CH1 OP-AMP
I
Output for CH1 OP-AMP
O
Non inverting input for CH2 OP-AMP
I
Inverting input for CH2 OP-AMP
I
Output for CH2 OP-AMP
O
Substrate ground
­Input for CH1/2/3 stand by control
I
Vcc for CH1/2 power block
­Inverted output of CH2
O
Non inverted output of CH2
O
Inverted output of CH1
O
Non inverted output of CH1
O
Function
15 16 17 18 19 20 21 22 23 24 25 26 27 28
STAND BY CH1/2/3
89
VO4(+)
VO4(-)
VO3(+)
VO3(-)
PowVcc2
STBY2
GND OPOUT3 OPIN3(-)
OPIN3(+)
OPOUT4 OPIN4(-)
OPIN4(+)
PreVcc
Level Shift
Level Shift
12
10k
10k
10k
10k
13
Function
10k
Vcc
10k
11
10
O
Non inverted output of CH4
O
Inverted output of CH4
O
Non inverted output of CH3
O
Inverted output of CH3
-
Vcc for CH3/4 power block
I
Input for Ch4 stand by control
-
Substrate ground
O
Output for CH3 OP-AMP
I
Inverting input for CH3 OP-AMP
I
Non inverting input for CH3 OP-AMP
O
Output for CH4 OP-AMP
I
Inverting input for CH4 OP-AMP
I
Non inverting input for CH4 OP-AMP
-
Vcc for pre block
10k
10k
14
BR93LC66F-X(IC403):EEPROM
1.Terminal layout
NC
VCC
CS
SK
1 2 3 4
8
NC
7
GND
6
DO
5
DI
1-22
2.Pin Functions Symbol
VCC GND
CS SK
DI
DO
I/O
O
Function
-
Power supply
-
Connect to GND
I
Chip select input
I
Serial clock input
I
Start bit,OP-code,address,serial data input Serial data output, Internal state display output of READY/BUSY
Page 35
KM416S1120DT-G8(IC504,IC505):DRAM
1.Terminal Layout
VSS
DQ15
DQ14
VSSQ
DQ13
DQ12
VDDQ
DQ11
DQ10
VSSQ
DQ9
DQ8
VDDQNCUDQM
CLK
CKENCA9A8A7A6A5A4VSS
50494847464544434241403938373635343332313029282726
XV-S40BK/XV-S42SL/XV-E100SL
123456789
DQ0
DQ1
DQ2
VSSQ
DQ3
VDD
2.Block Diagram
CLK
ADO
LCKE
101112131415161718192021222324
CS
DQ4
VDDQ
DQ5
DQ6
VSSQ
DQ7
VDDQ
LDQM
WE
CAS
RAS
Bank Select
Refresh Counter
Row Buffer
Address Register
LCBR
LRAS
LRAS LCBR LWE LCAS
A0A1A2
A11
A10
Timing register
25
A3
VDD
Row Decoder
Col.Buffer
Data input register
512K x 16
512K x 16
Column decoder
Latency & burst length
Programming register
LWCBR
Sense AMP
I/O Control
LWE
LDQM
Output Buffer
DQI
LDQM
3.Pin Function
Pin No. Symbol Function Pin No. Symbol Function
1 2 3 4 5 6 7 8
9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25
CLK CKE CS RAS CAS WE L(U)DQM
VDD DQ0 DQ1
VSSQ
DQ2 DQ3
VDDQ
DQ4 DQ5
VSSQ
DQ6
DQ7 VDDQ LDQM
WE CAS RAS
CS A11 A10
A0 A1 A2 A3
VDD
Power Supply Data Input/Output Data Input/Output To Ground Data Input/Output Data Input/Output Power Supply Data Input/Output Data Input/Output To Ground Data Input/Output Data Input/Output Power Supply Data Input/Mask Output Write Enable Column Address Strobe Raw Address Strobe Chip Select Address Address Address Address Address Address Power Supply
26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50
VSS
A4 A5 A6 A7 A8 A9
NC CKE CLK
UDOM
NC
VDDQ
DQ8 DQ9
VSSQ DQ10 DQ11
VDDQ
DQ12 DQ13 VSSQ DQ14 DQ15
VSS
To Ground Address Address Address Address Address Address Non Connection Clock Enable System Clock Data Input/Mask Output Non Connection Power Supply Data Input/Output Data Input/Output To Ground Data Input/Output Data Input/Output Power Supply Data Input/Output Data Input/Output To Ground Data Input/Output Data Input/Output To Ground
1-23
Page 36
XV-S40BK/XV-S42SL/XV-E100SL
MN101C35DGD(IC701):System controller
Pin function
Pin No.
1 2 3
4~7
8
9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48
49~51 52~64 65~88 89~99
100
Symbol
D DATA
DCLK
DACOCS
DI/DO/CS/SK
VDD OSC2 OSC1
VSS
XI
XO
MMOD
VREF-
POWER SW
NTSEL
RGB/YC SW
S/COMPO
AIN0
AIN2 TEST0 TEST1
VREF+
RGBSEL
RESET
AVCO
AVCI
POWERON
TCLOSE
YOPEN /LMMUTE SWOPEN SWUPDN
REMO
NC
REQ
NC S2UDT U2SDT
SCLK BUSY
CPURST
NC
VS3 VS1
MUTE
STANDBYIND
NC
1G~13G
S1~S24
NC
VPP
I/O
O O O
-
-
O
I
-
-
-
-
­I I
-
­I I
-
-
-
O
I
O
I O O O O
I
I
I
-
I
-
O
I O O O
­O O O O
­O O
-
-
DAC control data DAC control clock DAC control chip select Non connect Power supply +B 5V Oscillation terminal 8MHz Oscillation terminal 8MHz Connect to ground Unused, Connect with ground Unused Connect to ground Connect to ground Key input (power) NTSC/PAL switch input Un used Un used Key input (S831~S835) Key input (open/close) Un used Un used Power supply +B 5V RGB select control (H:RGB L:other) Reset input AV COMPULINK output AV COMPULINK input Power ON output Tray close control output Tray open control output Tray muting output (L:muting) Detection switch of tray open/close (L:open/close) Detection switch of traverse mechanism up/down (H:UP L:DOWN) Remote control interruption Non connect Communication between unit microcomputers request Non connect Communication between unit microcomputers DATA output Communication between unit microcomputers DATA input Communication between unit microcomputers CLK Communication between unit microcomputers BUSY Unit microcomputers reset Non connect S3 control (H:standby L:power ON) S1 control Muting output LED control signal output (standby) Non connect FL grid control signal output FL segment control signal output Non connect
-VDISP (apply -35V)
Description
1-24
Page 37
MN102L25GGE1(IC401):Unit CPU
Pin function
Pin No. Pin No.
Symbol Symbol
1 2 3 4 5 6 7 8
9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50
WAIT
RE
SPMUTE
WEN
­CS1 CS2 CS3
DRVMUTE
SPKICK
LSIRST
WORD
A0 A1 A2 A3
VDD
SYSCLK
VSS
XI
XO
VDD
OSCI OSCO MODE
A4 A5 A6 A7 A8
A9 A10 A11
VDD
A12 A13 A14 A15 A16 A17 A18 A19 VSS A20
TXSEL
HAGUP
-
-
HMFON
TRVSW
I/O I/O
Micon wait signal input
I
Read enable
O
Spindle muting output to IC251
O
Write enable
O
Non connect
­Chip select for ODC
O
Chip select for ZIVA
O
Chip select for outer ROM
O
Driver mute
O
Spin kick (Non connect)
O
LSI reset
O
Bus selection input
O
Address bus 0 for CPU
O
Address bus 1 for CPU
O
Address bus 2 for CPU
O
Address bus 3 for CPU
O
Power supply
­System clock signal output
O
Ground
­Not use (Connect to vss)
­Non connect
­Power supply
­Clock signal input(13.5MHz)
I
Clock signal output(13.5MHz)
O
CPU Mode selection input
I
Address bus 4 for CPU
O
Address bus 5 for CPU
O
Address bus 6 for CPU
O
Address bus 7 for CPU
O
Address bus 8 for CPU
O
Address bus 9 for CPU
O
Address bus 10 for CPU
O
Address bus 11 for CPU
O
Power supply
­Address bus 12 for CPU
O
Address bus 13 for CPU
O
Address bus 14 for CPU
O
Address bus 15 for CPU
O
Address bus 16 for CPU
O
Address bus 17 for CPU
O
Address bus 18 for CPU
O
Address bus 19 for CPU
O
Ground
­Address bus 20 for CPU
O
TX Select
O O
Non connect
­Non connect
-
Detection switch of traverse
I
inside
Function
51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99
100
-
-
ADSCEN
VDD FEPEN SLEEP
BUSY
REQ
CIRCEN
-
VSS EPCS EPSK
DPDI
EPDO
VDD SCLKO S2UDT U2SDT
CPSCK
SDIN
SDOUT
-
-
NMI
ADSCIRQ
ODCIRQ DECIRQ
WAKEUP
ODCIRQ2
ADSEP
RST
VDD TEST1 TEST2 TEST3 TEST4 TEST5 TEST6 TEST7 TEST8
VSS
D0 D1 D2 D3 D4 D5 D6 D7
XV-S40BK/XV-S42SL/XV-E100SL
Function
-
­Serial enable signal for ADSC
O
Power supply
­Serial enable signal for FEP
O
Standby signal for FEP
O
Communication busy
I
Communication Request
O
CIRC command select
O
Non connect
­Ground
­EEPROM chip select
O
EEPROM clock
O
EEPROM data input
I
EEPROM data output
O
Power supply
­Communication clock
I
Communication input data
I
Communication output data
O
Clock for ADSC serial
O
ADSC serial data input
I
ADSC serial data output
O
Not use
­Not use
­Not use
­Interrupt input of ADSC
I
Interrupt input of ODC
I
Interrupt input of ZIVA
I
Not use
O
Interruption of system control
I
Address data selection input
I
Reset input
I
Power supply
­Test signal 1 input
I
Test signal 2 input
I
Test signal 3 input
I
Test signal 4 input
I
Test signal 5 input
I
Test signal 6 input
I
Test signal 7 input
I
Test signal 8 input
I
Ground
­Data bus 0 of CPU
I/O
Data bus 1 of CPU
I/O
Data bus 2 of CPU
I/O
Data bus 3 of CPU
I/O
Data bus 4 of CPU
I/O
Data bus 5 of CPU
I/O
Data bus 6 of CPU
I/O
Data bus 7 of CPU
I/O
1-25
Page 38
XV-S40BK/XV-S42SL/XV-E100SL
MN103S13BDA(IC301):Optical disc controller
1.Pin layout
DMARQ
NIOWR
VSS
NIORD
IORDY
NDMACK
VDD
INTRQ
NIOCS16
DA1
VSS
144
143
142
141
140
139
138
137
136
135
HDD15
HDD0
HDD14
VDD
HDD1
HDD13
HDD2
VSS
HDD12
VDD
HDD3
HDD11
HDD4
HDD10
VDD HDD5 HDD9
VSS HDD6 HDD8 HDD7 VDDH
NRESET MASTER
NINT0 NINT1
WAITDOC
NMRST
DASPST
VDD
OSCO2
OSCI2
UATASEL
VSS
PVSSDRAM PVDDDRAM
1 2 3 4 5 6 7 8
9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36
3738394041424344454647484950515253545556575859606162636465666768697071
134
NPDIAG
DA0
DA2
VDD
NCS1FX
NCS3FX
NDASP
NTRYCL
VDD
NEJECT
VSS
133
132
131
130
129
128
127
126
125
124
123
MN103S13BDA
MONI0
MONI1
122
121
MONI2
MONI3
120
119
SDATA
SCLOCK
118
117
VDD
116
DAT0
115
DAT1
114
DAT2
113
DAT3
CHCK40
112
111
NCLDCK
SUBC
110
109
108 107 106 105 104 103 102 101 100
99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76 75 74 73
72
SBCK VSS P0 P1 PVDD PVSS VDD OSCO1 OSCI1 VSS LRCK BLKCK IPFLAG DACCLK DACLRCK DA C DATA NTRON LG JMPINH IDHOLD SBCK/PLLOK CLKOUT2 VDD NRST MMOD VSS CPDET1 CPDET2 BDO IDGT DTRD TEHLD VDD CLKOUT1 CPUDT0 CPUDT1
2.Block diagram
DVD-ROM Formatter
CGEN
MODE
CPUADR17
CPUADR16
VSS
CPUADR15
CPUADR14
CPUADR13
CD-PRE
Instruction memory (40KB)
DATA
MEMORY
(6KB)
VDD
CPUADR9
CPUADR8
CPUADR11
CPUADR10
CPUADR7
CPUADR12
Formatter
General purpose IO bus
CPUADR6
CPUADR5
CPUADR4
CPUADR3
CPUADR2
i /t
High speed IO bus
32 bit
CPU core
GCAL
CPUADR1
VSS
CPUADR0
NCS
NWR
ECC
NRD
VDD
CPUDT7
CPUDT6
PVPPDRAM
PTESTDRAM
Host i / f
MPEG i / t
DMA
BCU
DRAMC
CPUDT5
CPUDT4
PVSSDRAM
PVDDDRAM
VSS
CPUDT3
CPUDT2
ATAPI
4Mbit
DRAM
1-26
WDT
16 bit
timer x 2
SYSTEM
i / f
INTC
Page 39
3.Pin function (1/3)
XV-S40BK/XV-S42SL/XV-E100SL
Pin No.
1 2 3 4 5 6 7 8
9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50
Symbol
HDD15
HDD0
HDD14
VDD
HDD1
HDD13
HDD2
VSS
HDD12
VDD
HDD3
HDD11
HDD4
HDD10
VDD HDD5 HDD9
VSS HDD6 HDD8 HDD7 VDDH
NRESET
MASTER
NINT0 NINT1
WAITDOC
NMRST
DASPST
VDD
OSCO2
OSCI2
UATASEL
VSS
PVSSDRAM PVDDDRAM
CPUADR17 CPUADR16
VSS
CPUADR15 CPUADR14 CPUADR13 CPUADR12
VDD
CPUADR11 CPUADR10
CPUADR9 CPUADR8 CPUADR7 CPUADR6
I/O I/O I/O I/O
I/O I/O I/O
I/O
I/O I/O I/O I/O
I/O I/O
I/O I/O I/O
I/O
O O O O
O
Description ATAPI Data ATAPI Data ATAPI Data Power supply 3V
­ATAPI Data ATAPI Data ATAPI Data Connect to GND
­ATAPI Data Power supply 2.7V
­ATAPI Data ATAPI Data ATAPI Data ATAPI Data Power supply 3V
­ATAPI Data ATAPI Data Connect to GND
­ATAPI Data ATAPI Data ATAPI Data
ATAPI Reset input
I
ATAPI Master/slave select Interruption of system control 0 Interruption of system control 1 Wait control of system control Reset of system control (Connect to TP302) Setting of initial value of DASP signal
I
Power supply 3V
­Non connect Non connect
I
Connect to VSS
I
Connect to GND
­Connect to VSS Connect to VDD(2.7V) System control address
I
System control address
I
Connect to GND
­System control address
I
System control address
I
System control address
I
System control address
I
Power supply 2.7V
­System control address
I
System control address
I
System control address
I
System control address
I
System control address
I
System control address
I
1-27
Page 40
XV-S40BK/XV-S42SL/XV-E100SL
3.Pin function (2/3)
Pin No.
51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99
100
Symbol CPUADR5 CPUADR4 CPUADR3 CPUADR2 CPUADR1
VSS
CPUADR0
NCS
NWR
NRD
VDD CPUDT7 CPUDT6
PVPPDRAM
PTESTDRAM
PVDDDRAM
PVSSDRAM
CPUDT5 CPUDT4 CPUDT3
VSS CPUDT2 CPUDT1 CPUDT0
CLKOUT1
VDD
TEHLD
DTRD
IDGT
BDO CPDET2 CPDET1
VSS
MMOD
NRST
VDD
CLKOUT2
SBCK/PLLOK
IDOHOLD
JMPINH
LG
NTRON
DA CD ATA
DACLRCK
DACCLK
IPFLAG
BLKCK
LRCK
VSS
OSCI1
I/O
I I I I I
­I I I I
­I/O I/O
O
I
I/O I/O I/O
­I/O I/O I/O
O
-
O O O
I I I
-
I I
-
O O O O O
I O O
I
I
I
I
-
I
Description System control address System control address System control address System control address System control address Connect to GND System control address System control chip select Writing system control Reading system control Power supply 3V System control data System control data Connect to VSS Connect to VSS Connect to VDD(2.7V) Connect to VSS System control data System control data System control data Connect to GND System control data System control data System control data Clock signal output (16.9/11.2/8.45MHz) Power supply 3V Mirror gate (Connect to TP141) Data frequency control switch (Connect to TP304) CAPA switch RF Dropout/BCA data Outer capacity detection Inner capacity detection Connect to GND Connect to VSS System reset Power supply 3V Clock 16.9MHz Flame mark detection ID gate for tracking holding Jump prohibition Land/group switch Tracking ON Serial data output (Connect to TP148) Identification signal of L and R (Connect to TP149) Clock for serial data output Input of IP flag Sub code/block/input clock Identification signal of L and R (Connect to VSS) Connect to GND Oscillation input terminal 16.9MHz
1-28
Page 41
3.Pin function (3/3)
XV-S40BK/XV-S42SL/XV-E100SL
Pin No.
101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144
Symbol OSCO1
VDD
PVSS
PVDD
P1 P0
VSS SBCK SUBC
NCLDCK
CHCK40
DAT3 DAT2 DAT1 DAT0
VDD
SCLOCK
S DATA MONI3 MONI2 MONI1 MONI0
VSS
NEJECT
VDD
NTRYCL
NDASP NCS3FX NCS1FX
VDD DA2 DA0
NPDIAG
VSS DA1
NIOCS16
INTRQ
VDD
NDMACK
IORDY
NIORD
VSS
NIOWR
DMARQ
I/O
O
-
-
­I/O I/O
-
O
­I/O I/O
O O O O
-
-
I/O
­I/O I/O I/O
­I/O
O O
-
O
­I/O
O
Description Oscillation output terminal 16.9MHz Power supply 3V Connect to GND Power supply 3V Terminal master polarity switch input CIRC-RAM,OVER/UNDER Interruption Connect to GND Clock output for sub code,serial input Sub code,serial input
I
Sub code,flame clock input
I
Clock is read to DAT3~0 (Output of division frequency from ADSC)
I
Data is read from disc (Going side by side output from ADSC)
I
Data is read from disc (Going side by side output from ADSC)
I
Data is read from disc (Going side by side output from ADSC)
I
Data is read from disc (Going side by side output from ADSC)
I
Power supply 3V Debug serial clock (270 ohm pull up) Debug serial data (270 ohm pull up) Internal good title monitor (Connect to TP150) Internal good title monitor (Connect to TP151) Internal good title monitor (Connect to TP152) Internal good title monitor (Connect to TP153) Connect to GND Eject detection
I
Power supply 2.7V Non connect (Tray close detection)
I
ATAPI drive active / slave connect I/O Non connect (ATAPI host chip select)
I
Non connect (ATAPI host chip select)
I
Power supply 3V ATAPI host address Non connect (ATAPI host address) ATAPI Slave master diagnosis input Connect to GND Non connect (ATAPI host address) Output of selection of width of ATAPI host data bus ATAPI Host interruption output Power supply 3V Non connect (ATAPI Host DMA characteristic)
I
ATAPI Host ready output (Connect to TP157) Non connect (ATAPI host read)
I
Connect to GND ATAPI Host write ATAPI Host DMA request (Connect to TP159)
1-29
Page 42
XV-S40BK/XV-S42SL/XV-E100SL
MN67706ZY (IC201) : Auto digital servo controller
1.Terminal Layout
33VDD
33VSS
TEST
MINTEST
NCLDCK/JUMP
SUBC
IPFLAG
DACCLK
NTRON
DACDATA/LG
DACLRCK/JMPINH
IDHOLD
SBCK/PLLOK
BLKCK/CPDET1
LRCK/CPDET2
IDGT/TEMUTE
75747372717069686766656463626160595857565554535251
CHCK40
DAT3 DAT2 DAT1 DAT0
33VSS
33VDD
XRESET
ENS
ENC
CPUIRQ
CPUCLK
CPUDTIN
CPUDTOUT
MONA MONB MONC
25VSS
25VDD LDCUR(AD6) TDOFS(AD5)
TG(AD4)
RFENV(AD3)
NC
TX
76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99
100
123456789
MN67706ZY
101112131415161718192021222324
DTRD
25VDD
25VSS
TILTN
TILT
TILTPFGSPDRV
TRSDRV
50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26
25
TSTSG BDO SYSCLK OFTR 33VDD 33VSS FBAL TBAL TGBAL AVSS ROUT LOUT AVDD JLINE DBALO VCOF TRCRS CMPIN LPFOUT LPFIN AVSS HPFOUT HPFIN AVDD VFOSHORT
TE(AD1)
FE(AD0)
AS(AD2)
AVSS
AVDD
TRDRV(DA0)
FODRV(DA1)
ARF
NARF
IREF1
IREF2
DSLF1
AVDD
DSLF2
PLPG
VHALF
PLFG
2.Pin Functions (1/3)
Pin No. Symbol I/O Function
I
AS : Full adder signal(FEP)
I
Phase difference/3 beam tracking error(FEP)
I
Focus error(FEP)
-
Apply 3.3V(For analog circuit) Focus drive(DRVIC) Tracking drive(DRVIC)
-
Ground(For analog circuit)
I
Equivalence RF+(FEP)
I
Equivalence RF-(FEP)
I
Reference current1(For DBAL)
I
Reference current2(For DBAL) Connect to capacitor1 for DSL Connect to capacitor2 for DSL
-
Apply 3.3V(For analog circuit)
I
Reference voltage 1.65+-0.1V(FEP)
-
Not use(PLL phase gain setting resistor terminal)
-
Not use(PLL frequency gain setting resistor terminal)
I
Reference voltage 2.2V+-0.1V(FEP) Connect to resistor for VREFH reference current source
-
Ground(For analog circuit) Connect to capacitor1 for PLL Connect to capacitor2 for PLL Output for jitter signal monitor
I
Not use Pull-up to VHALF
10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25
1 2 3 4 5 6 7 8 9
AS(AD2) TE(AD1) FE(AD0) AVDD FODRV(DA1) TRDRV(DA0) AVSS ARF NARF IREF1 IREF2 DSLF1 DSLF2 AVDD VHALF PLPG PLFG VREFH RVI AVSS PLFLT1 PLFLT2 JITOUT RFDIF CSLFL1
O O
I/O I/O
I/O
O O
I/O
I/O
RVI
VREFH
AVSS
PLFLT1
JITOUT
PLFLT2
RFDIF
CSLFL1
1-30
Page 43
2.Pin function (2/3)
Pin No. Symbol I/O Function
VFOSHORT
26
AVDD
27
HPFIN
28
HPFOUT
29
AVSS
30
LPFIN
31
LPFOUT
32
CMPIN
33
TRCRS
34
VCOF
35
DBALO
36
JLINE
37
AVDD
38
LOUT
39
ROUT
40
AVSS
41
TGBAL
42
TBAL
43
FBAL
44
33VSS
45
33VDD
46
OFTR
47
SYSCLK
48
BDO
49
TSTSG
50
TRSDRV
51
SPDRV
52
FG
53
TILTP
54
TILT
55
TILTN
56
25VSS
57
25VDD
58
DTRD
59 60
IDGT/TEMUTE
61
LRCK/CPDET2
62
BLKCK/CPDET1
63
SBCK/PLLOK
64
IDHOLD
65
DACLRCK/JMPINH
66
DACDATA/LG
67
NTRON
68
DACCLK
69
IPFLAG
70
SUBC
71
NCLDCK/JUMP
72
MINTEST
73
TEST
74
33VSS
75
33VDD
76
CHCK40
77
DAT3
78
DAT2
79
DAT1
80
DAT0
O
O
O
I/O
O O
O O
O O O
O O O
O O O
O O
O O O O O
O O O O O
VFO short output
-
Apply 3.3V(For analog circuit)
I
Pull-up to VHALF Connect to TP208
-
Ground(For analog circuit)
I
Pull-up to VHALF Not use
I
Connect to TP210
I
Input signal for track cross formation JFVCO control voltage DSL balance adjust output J-line setting output(FEP)
-
Apply 3.3V(For analog circuit) Connect to TP203 (Analog audio left output) Connect to TP204 (Analog audio right output)
-
Ground(For analog circuit) Tangential balance adjust(FEP) Tracking balance adjust(FEP) Focus balance adjust(FEP)
-
Ground(For I/O)
-
Apply 3.3V(For I/O)
I
Off track signal
I
16.9344MHz system clock input(ODC)
I
Drop out(FEP) Calibration signal(FEP) Traverse drive(DRVIC) Spindle drive output(DRVIC)
I
FG signal input (Spindle motor driver) Connect to TP205 Connect to TP206 Connect to TP207
-
Ground(For internal core)
-
Apply 2.5V(For internal core)
I
Data read control signal(ODC)
I
Pull-down to Ground LR channel data strobe(ODC)/ CD sub code synchronous signal(ODC)/
I
CD sub code data shift clock(ODC)/PLL pull-in OK signal input
I
Pull-down to Ground
I
1bit DAC-LR channel data strobe(ODC)/
I
CD 1bit DAC channel data(ODC) L : Tracking ON(ODC) 1bit DAC channel data shift clock(ODC) CIRC error flag(ODC) CD sub code(ODC) CD sub code data frame clock(ODC)/DVD JUMP signal(ODC)
I
Pull-down to Ground(For MINTEST)
I
Pull-down to Ground(For TEST)
-
Ground(For I/O)
-
Apply 3.3V(For I/O) Clock for SRDATA(ODC) SRDATA3(ODC) SRDATA2(ODC) SRDATA1(ODC) SRDATA0(ODC)
XV-S40BK/XV-S42SL/XV-E100SL
1-31
Page 44
XV-S40BK/XV-S42SL/XV-E100SL
2.Pin function (3/3)
Pin No. Symbol I/O Function
81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99
100
33VSS 33VDD TX XRESET ENS ENC CPUIRQ CPUCLK CPUDTIN CPUDTOUT MONA MONB MONC NC 25VSS 25VDD LDCUR(AD6) TDOFS(AD5) TG(AD4) RFENV(AD3)
-
-
O
I I I
O
I
I O O O O O
-
-
I
I
I
I
Ground(For I/O) Apply 3.3V(For I/O) Digital audio interface Reset input (System control) Servo DSC serial I/F chip select (System control) CIRC serial I/F chip select (System control) Interrupt request (System control) Syscon serial I/F clock (System control) Syscon serial I/F data input (System control) Syscon serial I/F data output (System control) Connect to TP226 (Monitor terminal A) Connect to TP225 (Monitor terminal A) Connect to TP224 (Monitor terminal A) Connect to TP211 Ground(For internal core) Apply 2.5V(For internal core)
Tangential phase difference(FEP) RF envelope input(FEP)
NJM4580M-X(IC741,IC751):Dual OP amplifier
Block diagram
V+ B OUT B -IN B +IN
8765
B
A
1234
V-A +INA -INA OUT
TC74VHC00FT-X(IC322,IC503) : Write timing control
1.Terminal layout / Block diagram Vcc 4B 4A 4Y 3B 3A 3Y
14 13
12
11 10 9 8
1-32
2
1
6
543
7
1A 1B 1Y 2A 2B 2Y GND
Page 45
ZIVA-4.1-PA2(IC501):Back end - Digital decoder
1.Terminal layout ~
208 157
1
~
156
~
XV-S40BK/XV-S42SL/XV-E100SL
52
~
53 104
2.Pin function (1/5)
Pin No.
1 2 3 4
5 6 7 8
9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29
30
31 32 33 34 35 36
Symbol
RD
R/W
VDD
WAIT
RESET
VSS VDD
INT
NC NC NC
NC VDD VSS
NC
NC
NC
NC VSS VDD
V DATA 0 V DATA 1 V DATA 2 V DATA 3 V DATA 4 V DATA 5 V DATA 6 V DATA 7
VSYNC
HSYNC
VSS VDD
NC
NC
NC VDD
105
I/O
I I
-
O
I
-
-
O
-
-
-
-
-
-
-
-
-
-
-
­O O O O O O O O
I/O
I/O
-
-
-
-
-
-
Description Read strobe input Read/write strobe input Power supply terminal 3.3V Transfer not complete / data acknowledge. Active LOW to indicate host initiated transfer is complete. Active LOW : reset signal input Connect to ground Power supply terminal 3.3V Host interrupt signal output Non connect Non connect Non connect Non connect Power supply terminal 2.5V Connect to ground Non connect Non connect Non connect Non connect Connect to ground Power supply 3.3V Video data bus output. Byte serial CbYCrY data synchronous with VCLK. Video data bus output. Byte serial CbYCrY data synchronous with VCLK. Video data bus output. Byte serial CbYCrY data synchronous with VCLK. Video data bus output. Byte serial CbYCrY data synchronous with VCLK. Video data bus output. Byte serial CbYCrY data synchronous with VCLK. Video data bus output. Byte serial CbYCrY data synchronous with VCLK. Video data bus output. Byte serial CbYCrY data synchronous with VCLK. Video data bus output. Byte serial CbYCrY data synchronous with VCLK. Vertical sync. Bi-directional, the decoder output the top border of a new field on the first HSYNC after the falling edge of VSYNC. Horizontal sync. The decoder begins outputting pixel data for a new horizontal line after the falling (active) edge of HSYNC. Connect to ground Power supply terminal 3.3V Non connect Non connect Non connect Power supply terminal 2.5V
1-33
Page 46
XV-S40BK/XV-S42SL/XV-E100SL
2.Pin function (2/5)
Pin No.
37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84
Symbol
VSS
NC NC NC NC NC
PIO0
VSS
VDD PIO1 PIO2 PIO3 PIO4 PIO5 PIO6 PIO7
M DATA 0 M DATA 1
VDD
VSS M DATA 2 M DATA 3 M DATA 4 M DATA 5 M DATA 6 M DATA 7
MDATA15
VDD
VSS
MDATA14
VDD
VSS
MDATA13 MDATA12 MDATA11 MDATA10
M DATA 9
VDD
VSS M DATA 8
LDQM
SD-CLK
CLKSEL MADDR9 MADDR8
VDD
VSS
MADDR7
I/O
Connect to ground
­Non connect
­Non connect
­Non connect
­Non connect
­Non connect
­Programmable I/O terminal
I/O
Connect to ground
­Power supply terminal 3.3V
­Programmable I/O terminal
I/O
Programmable I/O terminal
I/O
Programmable I/O terminal
I/O
Programmable I/O terminal
I/O
Programmable I/O terminal
I/O
Programmable I/O terminal
I/O
Programmable I/O terminal
I/O
SDRAM data
I/O
SDRAM data
I/O
Power supply terminal 3.3V
­Connect to ground
­SDRAM data
I/O
SDRAM data
I/O
SDRAM data
I/O
SDRAM data
I/O
SDRAM data
I/O
SDRAM data
I/O
SDRAM data
I/O
Power supply terminal 3.3V
­Connect to ground
­SDRAM data
I/O
Power supply terminal 2.5
­Connect to ground
­SDRAM data
I/O
SDRAM data
I/O
SDRAM data
I/O
SDRAM data
I/O
SDRAM data
I/O
Power supply terminal 3.3V
­Connect to ground
­SDRAM data
I/O
SDRAM Lower or upper mask
O
SDRAM Clock
O
Selects SYSCLK or VCLK as clock source. Normal operation is to tie HIGH.
I
SDRAM address
O
SDRAM address
O
Power supply terminal 3.3V
­Connect to ground
­SDRAM address
O
Description
1-34
Page 47
2.Pin function (3/5)
XV-S40BK/XV-S42SL/XV-E100SL
Pin No.
85 86 87 88 89 90 91 92 93 94 95 96 97 98
99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118
119
120
121
122 123 124 125 126 127 128
Symbol
MADDR6 MADDR5
VDD VSS
MADDR4
MWE
SD-CAS
VDD
VSS SD-RAS SD-CS0
SD-CS1/MADDR11
SD-BS
MADDR10
MADDR0
VDD
VSS
MADDR1 MADDR2 MADDR3
RESERVED
NC NC
RESERVED
NC RESERVED RESERVED RESERVED
DAI-LRCK
DAI-BCK
VDD VSS
DAI-DATA
DA-DATA3
DA-DATA2
DA-DATA1
DA-DATA0
DA-LRCK
VDD
VSS DA-XCK DA-BCK
DA-IEC
VDD
I/O
SDRAM address
O
SDRAM address
O
Power supply terminal 2.5V
­Connect to ground
­SDRAM address
O
SDRAM write enable
O
Active LOW SDRAM column address
O
Power supply terminal 3.3V
­Connect to ground
­Active LOW SDRAM row address
O
Active LOW SDRAM chip select 0
O
Active LOW SDRAM chip select 1 or use as MADDR11 for larger SDRAM
O
SDRAM bank select
O
SDRAM address
O
SDRAM address
O
Power supply terminal 3.3V
­Connect to ground
­SDRAM address
O
SDRAM address
O
SDRAM address
O
Tie to VSS or VDD_3.3 as specified in table1
I
Non connect
­Non connect
­Tie to VSS or VDD_3.3 as specified in table1
I
Non connect
­Tie to VSS or VDD_3.3 as specified in table1
I
Tie to VSS or VDD_3.3 as specified in table1
I
Tie to VSS or VDD_3.3 as specified in table1
I
PCM left/right clock
I
PCM input bit clock
I
Power supply 3.3V
­Connect to ground
­PCM data input
I
PCM data output. Eight channels. Serial audio samples relative to
O
DA_BCK and DA_LRCK PCM data output. Eight channels. Serial audio samples relative to
O
DA_BCK and DA_LRCK PCM data output. Eight channels. Serial audio samples relative to
O
DA_BCK and DA_LRCK PCM data output. Eight channels. Serial audio samples relative to
O
DA_BCK and DA_LRCK PCM left clock. Identifies the channel for each sample
O
Power supply terminal 3.3V
­Connect to ground
­Audio external frequency clock input or output
I/O
PCM bit clock output
O
PCM data out in IEC-958 format or compressed data out in IEC-1937 format
O
Power supply terminal 2.5V
-
Description
1-35
Page 48
XV-S40BK/XV-S42SL/XV-E100SL
2.Pin function (4/5)
Pin No.
129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162
163
164
165
166 167 168
169
Symbol
VSS
NC
VSS_DAC
VSS_VIDEO
CVBS
VDD_DAC
VDD_VIDEO
NC
VSS_DAC
VSS_VIDEO
CVBS/G/Y VDD_DAC
VDD_VIDEO
NC
VSS_DAC
VSS_VIDEO
Y/B/U
VDD_DAC
VDD_VIDEO
NC
VSS_DAC
VSS_VIDEO
C/R/V
VDD_DAC
VDD_VIDEO
VSS_RREF
RREF
VDD_RREF
A_VSS
SYSCLK
VCLK
A_VDD
DVD-DATA0/CD-DATA
DVD-DATA1/CD-LRC
DVD-DATA2/CD-BCK
DVD-DATA3/CD-C2PO
DVD-DATA4/CDGSDATA
VSS
VDD
DVD-DATA5/CDG-VFSY
DVD-DATA6/CDG-SOS1
I/O
Connect to ground
­Non connect
­Connect to ground for analog video DAC
­Connect to ground for analog video
­DAC video output format : CVBS. Macrovision encoded
O
Power supply terminal for analog video DAC
­Power supply terminal for analog video
­Non connect
­Connect to ground for analog video DAC
­Connect to ground for analog video
­DAC video output format. Macrovision encoded
O
Power supply terminal for analog video DAC
­Power supply terminal for analog video
­Non connect
­Connect to ground for analog video DAC
­Connect to ground for analog video
­DAC video output format. Macrovision encoded
O
Power supply terminal for analog video DAC
­Power supply terminal for analog video
­Non connect
­Connect to ground for analog video DAC
­Connect to ground for analog video
­DAC video output format. Macrovision encoded
O
Power supply terminal for analog video DAC
­Power supply terminal for analog video
­Connect to ground for analog video
­Reference resistor. Connecting to pin 154
O
Power supply terminal for analog video 3.3V
­Power supply terminal for analog PLL 3.3V
­Optical system clock. Tie to A_VDD through a 1K ohm resistor
I
System clock input
I
Power supply terminal for analog PLL 3.3V
­Serial CD data. This pin is shared with DVD compressed data DVD-DATA0
I
Programmable polarity 16-bit word synchronization to the decoder.
I
Description
This pin is shared with DVD compressed data DVD-DATA1 CD bit clock. Decoder accept multiple BCK rates. This pin is shared with
I
DVD compressed DVD-DATA2 Asserted HIGH indicates a corrupted byte. This pin is shared with DVD
I
compressed data DVD-DATA3 DVD parallel compressed data from DVD DSP. or CD-G data indicating
I
serial subcode data input Connect to ground
­Power supply terminal 3.3V
­DVD parallel compressed data from DVD DSP. or CD-G frame sync
I
indicating frame-start or composite synchronization input. DVD parallel compressed data from DVD DSP. or CD-G block sync
I
indicating block-start synchronization input
1-36
Page 49
2.Pin function (5/5) Pin No.
170
171
172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197
198 199
200
201
202
203
204 205 206
207
208
Symbol
DVD-DATA7/CDG-SCLK
VDACK
VREQUEST
VSTROBE
ERROR
VDD
RESERVED
VDD VSS
NC
RESERVED
NC HADDR0 HADDR1 HADDR2
RESERVED RESERVED RESERVED
VSS VDD
RESERVED
VSS
VDD RESERVED RESERVED RESERVED RESERVED
H DATA 7
VSS
H DATA 6
H DATA 5
H DATA 4
H DATA 3
H DATA 2
VDD
VSS
H DATA 1
H DATA 0
CS
XV-S40BK/XV-S42SL/XV-E100SL
I/O
DVD parallel compressed data from DVD DSP. or CD-G clock indicating
I
sub code data clock input or output In synchronous mode, bitstream data acknowledge. Asserted when DVD
I
data is valid.Polarity is programmable Bitstream request
O
Bitstream strobe
I
Error in input data
I
Power supply terminal 3.3V
­Tie to VSS or VDD_3.3 as specified in table 1
I
Power supply terminal 3.3V
­Connect to ground
­Non connect
­Tie to VSS or VDD_3.3 as specified in table 1
I
Non connect
-
Host addressbus. 3-bit address bus selects one of eight host interface registers
I
Host addressbus. 3-bit address bus selects one of eight host interface registers
I
Host addressbus. 3-bit address bus selects one of eight host interface registers
I
Tie to VSS or VDD_3.3 as specified in table 1
I
Tie to VSS or VDD_3.3 as specified in table 1
I
Tie to VSS or VDD_3.3 as specified in table 1
I
Connect to ground
­Power supply terminal 2.5V
­Tie to VSS or VDD_3.3 as specified in table 1
I
Connect to ground
­Power supply terminal 3.3V
­Tie to VSS or VDD_3.3 as specified in table 1
I
Tie to VSS or VDD_3.3 as specified in table 1
I
Tie to VSS or VDD_3.3 as specified in table 1
I
Tie to VSS or VDD_3.3 as specified in table 1
I
The 8-bit bi-derectional host data through which the host writes data to
I/O
the decoder code. Connect to ground
­The 8-bit bi-derectional host data through which the host writes data to
I/O
the decoder code. The 8-bit bi-derectional host data through which the host writes data to
I/O
the decoder code. The 8-bit bi-derectional host data through which the host writes data to
I/O
the decoder code. The 8-bit bi-derectional host data through which the host writes data to
I/O
the decoder code. The 8-bit bi-derectional host data through which the host writes data to
I/O
the decoder code. Power supply terminal 3.3V
­Connect to ground
­The 8-bit bi-derectional host data through which the host writes data to
I/O
the decoder code. The 8-bit bi-derectional host data through which the host writes data to
I/O
the decoder code. Host chip select input
I
Description
1-37
Page 50
XV-S40BK/XV-S42SL
VICTOR COMPANY OF JAPAN, LIMITED
PERSONAL & MOBILE NETWORK BUSINESS UNIT 1644, Shimotsuruma, Yamato, Kanagawa 242-8514, Japan
No.A0006
Printed in Japan 200104(O)
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