JVC GZ-MC100EK, GZ-MC100EX, GZ-MC100EY, GZ-MC100EZ Schematics
SCHEMATIC DIAGRAMS
DIGITAL MEDIA CAMERA
YF060200411
GZ-MC100EK, GZ-MC100EX, GZ-MC100EY, GZ-MC100EZ
CD-ROM No.SML200412
GZ-MC100EK, GZ-MC100EX,
GZ-MC100EY, GZ-MC100EZ [M4S327]
COPYRIGHT © 2004 Victor Company of Japan, Limited
No.YF060SCH
2004/11
CHARTS AND DIAGRAMS
NOTES OF SCHEMATIC DIAGRAM
Safety precautions
The Components indentified by the symbol are
critical for safety. For continued safety, replace safety
critical components only with manufacturer's recommended parts.
1. Units of components on the schematic diagram
Unless otherwise specified.
1) All resistance values are in ohm. 1/6 W, 1/8 W (refer to
parts list).
Chip resistors are 1/16 W.
K: KΩ(1000Ω), M: MΩ (1000KΩ)
2) All capacitance values are in µF, (P: PF).
3) All inductance values are in µH, (m: mH).
4) All diodes are 1SS133, MA165 or 1N4148M (refer to parts
list).
Note: The Parts Number, value and rated voltage etc. in
the Schematic Diagram are for references only.
When replacing the parts, refer to the Parts List.
2. Indications of control voltage
AUX : Active at high.
AUX or AUX(L) : Active at low.
!
4. Voltage measurement
1) Regulator (DC/DC CONV) circuits
REC : Colour bar signal.
PB : Alignment tape (Colour bar).
— : Unmeasurable or unnecessary to measure.
2) Indication on schematic diagram
Voltage indications for REC and PB mode on the schematic diagram are as shown below.
REC mode
12 3
2.5
(5.0)
PB mode
1.8
PB and REC modes
(Voltage of PB and REC modes
are the same)
Note: If the voltages are not indicated on the schematic
diagram, refer to the voltage charts.
5. Signal path Symbols
The arrows indicate the signal path as follows.
NOTE : The arrow is DVC unique object.
Playback signal path
Playback and recording signal path
CIRCUIT BOARD NOTES
1. Foil and Component sides
1) Foil side (B side) :
Parts on the foil side seen from foil face (pattern face)
are indicated.
2) Component side (A side) :
Parts on the component side seen from component face
(parts face) indicated.
rts location are indicated by guide scale on the circuit board.
2. Parts location guides
Parts location are indicated by guide scale on the circuit board.
REF No.
IC101 B C 6 A
(A : Component side)
D : Discrete component)
B : Foil side
C : Chip component
Note: For general information in service manual, please
refer to the Service Manual of GENERAL INFORMATION Edition 4 No. 82054D (January 1994).
LOCATION
IC
Category : IC
Horizontal “A” zone
Vertical “6” zone
3. Interpreting Connector indications
1
2
Removable connector
3
1
2
Wire soldered directly on board
3
1
Non-removable Board connector
2
3
1
2
4
Board to Board
3
Connected pattern on board
The arrows indicate signal path
Note: For the destination of each signal and further line
connections that are cut off from the diagram,
refer to "BOARD INTERCONNECTIONS"
Recording signal path
(including E-E signal path)
Capstan servo path
Drum servo path
(Example)
R-Y
Playback R-Y signal path
Y
Recording Y signal path
6. Indication of the parts for adjustments
The parts for the adjustments are surrounded with the circle
as shown below.
7. Indication of the parts not mounted on the circuit board
“OPEN” is indicated by the parts not mounted on the circuit
board.
R216
OPEN
2-1 2-2
BOARD INTERCONNENTION
YTU94129A-33
YTU94109-33
CN101
5
CN102
CN5201
(Page2-39)
YTU94074-10
YTU94077-10
CN103
CN107
CN304
CN305
(Page2-43)
YTU94074-24
YTU94077-24
LCD MODULE
CN110
CN106
CSV
DSG
VBB
CSHSCSTH
DSD
ENB
STV
XSTV
XENB
CKV2
(Page2-27)
PMD0
PMD1
PMA2
PMD3
PMD4
PMD5
PMD6
PMD7
PMD0
PMD6
PMD5
PMD4
PMD3
PMD2
PMD1
PMD7
ARMTMS
ARMTDO
ARMTCK
ARMTDI
nARMTRST
nJRESET
CKV1
PMD8
PMD8
NU_RX
LCD_R
PMD9
PMD9
NU_TX
MOD0
LCD_G
PMD10
PMD10
LCD_B
PMD11
PMD11
HDCVF
PMD12
PMD12
VDCVF
REG_2.5V
PMD14
PMD13
PMD13
PMD14
DSP_RST
LCD_BL
PMA12
PMA13
PMA14
PMA15
PMD15
PMD15
LCD_CS
nPMWE
nPMOE
nPMOE
nPMWE
VIF_OUT
VIF_CLK
MON_B
MON_R
MON_G
MON_RPD
PMA15
PMA14
DV1IN0
DV1IN1
DV1IN2
DV1IN3
DV1IN4
DV1IN5
DV1IN6
DV1INH
DV1INV
DV1CLKIN
nPMCS0
MPEG_RST
PLLSTOP
DV1IN7
DV2OUT7
DV2OUT6
DV2OUT5
DV2OUT4
DV2OUT3
DV2OUT2
DV2OUT1
DV2OUT0
REG_2.5V
REG_3.1V
REG_1.2V
REG_4.8V
VCOM
nCINT
nVOEN
PMA13
GND
PMA12
XDSG
XSTH
CKH2
CKH1
VHVDD
PMA17
PMA17
SDCMD
SDDAT3
PMA18
PMA18
PMA19
PMA19
SDCLK
PMA20
PMA20
SDDAT1
SDDAT0
PMA21
PMA21
SDCD
SDDAT2
LCD_BLK
REG_3.1V
REG_8.5V
REG_4.8V
REG_14V
GND
PMA1
PMA2
PMA2
PMA1
SDWP
PMA3
PMA3
PMA4
PMA4
PMA5
PMA5
PMA6
PMA6
PMA7
PMA7
PMA0
PMA8
PMA8
PMA9
PMA9
PMA10
PMA10
PMA11
PMA11
FLSH_RST
REG_3.1V
GND
SDR_DQ31
SDR_DQ30
SDR_DQ31
SDR_DQ30
TG_FLD
NDPWM
nUSBDP_PU
nUSB_DET
USBDP
USBDN
STRB_EVR
PPRD0
PPRD1
PPRD2
PPRD3
PPRD4
PPRD5
PPRD6
PPRD7
PPRD8
PPRD9
PPRD10
PPRD11
VLD_PIX
SOF
VCLK
SSGFLD
DMACLR
DMABREQ
DMASREQ
nPMBLS1
nPMBLS0
nPMCS1
PMINT
FLDCPU
VDCPU
ID_LAT
AFE_RST
CLK27A
DV2CKOUT
nPMWAIT
SDR_DQ29
SDR_DQ28
SDR_DQ27
SDR_DQ29
SDR_DQ27
SDR_DQ28
nUSBDP_PU
nUSB_DET
USBDP
USBDN
IR_OUT
S_PDIF
SDR_DQ26
SDR_DQ25
SDR_DQ24
SDR_DQ24
SDR_DQ26
SDR_DQ25
PWR_CHEK
ACPLLOFF
SDR_DQ23
SDR_DQ22
SDR_DQ22
SDR_DQ23
AUDOUT
AUDBITCLK
SDR_DQ21
SDR_DQ21
AUDIN
AUDSYNC
SDR_DQ20
SDR_DQ20
(Page2-19)
SDR_DQ19
SDR_DQ18
SDR_DQ17
SDR_DQ16
SDR_DQ17
SDR_DQ18
SDR_DQ16
SDR_DQ19
nAUDRESET
nCFCD1
SDR_DQ15
SDR_DQ14
SDR_DQ15
SDR_DQ14
CFD3
CFD11
GND
SDR_DQ13
SDR_DQ12
SDR_DQ13
SDR_DQ12
CFD4
CFD12
(Page2-5)
REG_3.1V
SDR_DQ11
SDR_DQ10
SDR_DQ9
SDR_DQ8
SDR_DQ9
SDR_DQ8
SDR_DQ10
SDR_DQ11
CFD6
CFD5
CFD14
CFD13
SDR_DQ7
SDR_DQ6
SDR_DQ6
SDR_DQ7
CFD7
CFD15
TALY_LED
SDR_DQ5
SDR_DQ4
SDR_DQ4
SDR_DQ5
nCFCE1
nCFCE0
SDR_DQ3
SDR_DQ2
SDR_DQ2
SDR_DQ3
CFA10
nCFOE
SDR_DQ1
SDR_DQ0
SDR_DQ1
SDR_DQ0
CFA9
nCFIORD
SDR_DQM2
SDR_DQM3
SDR_DQM3
SDR_DQM2
CFA8
nCFWE
nCFIOWR
SDR_DQM1
SDR_DQM0
SDR_WE
SDR_WE
SDR_DQM0
SDR_DQM1
CFA7
CFRDY
SDR_CAS
SDR_CAS
CFA6
CFCSEL
SDR_RAS
SDR_CSO
SDR_RAS
SDR_CSO
CFA5
CFA4
SDR_BA1
SDR_BA0
SDR_BA1
SDR_BAO
CFA3
CFRESET
VIOYSOUT
VIOCOUT
ASPECT_S
PS_CTL
ANA_IN_H
SDR_CKE
SDR_CKE
(Page2-13)
SDR_CLK
SDR_A10
SDR_A9
SDR_A8
SDR_A7
SDR_A9
SDR_A8
SDR_A7
SDR_A10
SDR_CLK
(Page2-15)
CFA0
CFBVD2
CFA2
CFA1
nCFWAIT
nCFREG
REG_4.8V
SDR_A6
SDR_A5
SDR_A5
SDR_A6
CFD0
GND
SDR_A4
SDR_A4
CFD1
CFBVD1
SDR_A3
SDR_A2
SDR_A2
SDR_A3
CFD8
Y_OUT
V_OUT
C_OUT
SDR_A1
SDR_A1
CFD9
CFD2
SDR_A0
SDR_A11
SDR_A0
SDR_A11
CFWP
SDR_A12
SDR_A12
CFD10
nCFCD2
PMA16
nPMCS7
PMA16
nPMCS7
H2
H1
HL
RG
OV4
ACHI2
ACHI2
TG_HD
ACHI3
ACHI3
PMD5
TG_CS
PMD6
FLSH_RST
(Page2-17)
ACHI5
ACHI6
ACHI7
ACHI4
ACHI5
ACHI6
ACHI7
ACHI4
PMD10
PMD8
PMD9
PMD7
CAM_CLK
ACHI8
ACHI9
ACHI8
ACHI9
PMD11
OV3
CAM_OUT
ACHI10
ACHI10
PMD12
CAM_OUT
DRIVE-IS
REG_3.1V
REG_4.8V
DRV_4.8V
GND
DRIVE+IS
HGVcc+IS
HGout+IS
HGVss-IS
Z_LED
HGout-IS
ISO200
GATE_PLS
ZOOM02
ZOOM03
IR_OUT
ZOOM01
ZOOM04
NDPWM
F_VCC
ASPECT_S
FOCUS02
FOCUS01
FOCUS04
FOCUSO3
(Page2-23)
HDIRS
VDIRS
HGout-ND
HGVcc+ND
LENS_LED
F/Z_CS
CAM_VD
DRIVE-ND
DRIVE+ND
CLK1MO
CLK4M5
HGout+ND
HGVss-ND
TG_RST
NDHAL_LV
ND_O/C
CAM_CLK
IRIS_CS
IRIS_PS
CAM_IN
4
PMA1
PMA9
PMA8
PMA7
PMA6
PMA2
PMA3
PMA4
PMD9
PMD7
PMD6
PMD5
PMD8
PMD4
PMD2
PMD11
VI0
VIF_CLK
PMD10
VI1
VIOYSOUT
VI3
VI2
VIOCOUT
VI4
VI0
DV2OUT0
VI5
VI6
VI2
VI1
DV2OUT1
DV2OUT2
PMD3
(Page2-9)
VI7
VI3
VI5
VI4
DV2OUT4
DV2OUT3
PMD15
PMD13
PMD14
PMD12
REG_1.5V
REG_2.5V
REG_3.1V
GND
PMA0
MPGVSYNC
MPGFLD
MPGHSYNC
3
LCD_B
LCD_R
LCD_G
VDCVF
HDCVF
VIF_OUT
REG_2.5V
REG_4.8V
REG_3.1V
GND
V_OUT
C_OUT
Y_OUT
PMD0
PMD1
PMA11
PMA10
nCACK
AIOLRCK
AIBD
AOMCLK
AOBD
AIOBCK
VI6
VI7
MPGFLD
MPGVSYNC
MPGHSYNC
(Page2-11)
DV2OUT7
DV2OUT5
DV2OUT6
VC0
VC1
PMA5
nCREQ
VC2
nPMWAIT
DV2CKOUT
VC3
BLKA
BLKB
nPMWE
DV2CKOUT
VENC_RST
VENC_CS
S2_DET
OSD_HD
BLKC
nPMOE
CLK27B
OUTV2
VIF_IN
S_IN_L
OSD_VD
DOT_CLK
PMA14
PMA15
DV1CLKIN
MPEG_RST
PMA12
PMA13
DV1IN0
DV1IN1
DV1IN2
DV1IN3
DV1IN4
DV1IN5
DV1IN6
DV1IN7
DV1INH
DV1INV
nCINT
nVOEN
nPMCSO
PLLSTOP
S_PDIF
STRB_AD
STRB_CHG
VDIRS
HDIRS
LENS_LED
F/Z_CS
CAM_VD
CLK1M0
CLK4M5
TG_RST
NDHAL_LV
ND_D/C
IRIS_PS
IRIS_CS
CAM_IN
LCD_CS
LCD_BL
VIF_OUT
VIF_CLK
nCREQ
nCACK
nPMWAIT
CLK27B
OUTV2
VIF_IN
VENC_RST
VENC_CS
S_IN_L
S2_DET
S_SHUT
G_RST
P_GYAMP
Y_GYAMP
ANA_IN_H
PS_CTL
PMA0
STRB_SNS
PMA3
PMA2
PMA1
PMA4
CAM_CLK
CAM_OUT
PMA6
PMA5
PMA7
MCLKI
PMA8
REG-7.5V
REG_3.1V
REG_4.8V
GND
CCDOUTA
CCDOUTB
REG_4.8V
REG_3.1V
GND
TG_CS
TG_HD
PMA10
PMA9
MCLKI
ACHI0
TG_ID
ACHI0
TG_VD
(Page2-21)
PMA11
PMD2
PMD0
PMD1
REG_12V
TG_VD
ACHI1
ACHI1
PMD3
TG_ID
PMD4
OV2
OV1
SUB
CCD-7.5V
(Page2-25)
CPOB2
TG_VCC
CPOB
CPOB
CPOB2
TG_VCC
ACHI13
ACHI12
ACHI11
BCHI2
BCHI1
BCHI0
BCHI0
BCHI2
BCHI1
ACHI12
ACHI11
ACHI13
nPMDE
nPMWE
PMD15
PMD13
PMD14
ADCLK
PBLK
PBLK
ADCLK
BCHI3
BCHI3
SCPU_CS
SCPU_SCK
TG_FLD
DS1a
DS1a
BCHI4
BCHI4
SCPU_SI
DS2a
DS2a
BCHI5
BCHI6
BCHI5
BCHI6
SCPU_SO
DS1b
DS1b
DS2b
DS2b
BCHI7
BCHI8
BCHI7
BCHI8
Z_PTR_AD
BCHI11
BCHI10
BCHI9
BCHI9
BCHI11
BCHI10
REG_3.1V
REG_1.5V
VLD_PIX
OP_THRMO
F_PTR_AD
BCHI12
BCHI13
BCHI13
BCHI12
PPRD0
PPRD1
PPRD2
PPRD3
PPRD4
PPRD5
PPRD6
PPRD7
PPRD8
PPRD9
PPRD10
PPRD11
VCLK
SSGFLD
DMACLR
DMABREQ
DMASREQ
nPMBLS1
nPMBLSO
nPMCS1
PMINT
FLDCPU
VDCPU
ID_LAT
AFE_RST
CLK27A
CDS_STBY
CDS_STBY
GND
SOF
CN113
CN9901
(Page2-41)
CN9902
2
YTU94128A-4
CN206
YTU94128A-4
CN302
CN303
(Page2-44)
CN201
YTU94128A-4
CN202
1
REG_3.1V
GND
G_RST
P_GYAMP
(Page2-37)
NOTE: The number of patch cords () are indicated by interconnected.
A
CN301
BCDEFG
CN105
CN204
MIC/L
MIC/R
SPKSPK+
PD_L
S_SHUT
BUZZER
AIBD
AOBD
AIOBCK
L_MUTE
A_MUTE
AOMCLK
AIOLRCK
AUEE_CTL
(Page2-33)
AUD_CLK
AUDIO_CS
AU_SIG/L
AU_SIG/R
HP_SIG/L
HP_SIG/R
AUD_DATA
M_AUD/R
AC_AUD/L
AC_AUD/R
REG_4.8V
REG_3.1V
M_AUD/L
REG_14V
CN104
CN203
REG_1.5V
REG_1.2V
REG_12V
REG_8.5V
AL_3.3V
REG-7.5V
BATT_+
TT_BATT
BATT_L
YTU94074-30
YTU94077-30
DRV_4.8V
DRV_3.3V
CN205
(Page2-37)
REG_3.1V
Y_GYAMP
M_AUD/L
M_AUD/R
AUDIN
AC_AUD/L
AC_AUD/R
AU_SIG/L
AU_SIG/R
HP_SIG/L
HP_SIG/R
GND
CLK27A
AUDOUT
AUDSYNC
AUDBITCLK
nAUDRESET
(Page2-31)
(Page2-29)
ACPLLOFF
BATT_L
REG_3.1V
TT_BATT
BATT_+
GND
P_DET
HP_DET
C_OUT
ADP_DC
V_BATT
ADP_L
GND
V_OUT
Y_OUT
G_RST
GND
CHRG_EVR
ADP_L
V_BATT
REG_4.8V
REG_14V
ADP_DC
REG_3.1V
GND
SJIG_RST
I_MTR
T_BATT
REG_CS
REG_CLK
DC_CHEK
REG_DATA
(Page2-35)
LIT_3V
PWR_CHEK
SCPU_CS
VCO
VC1
VC2
VC3
BLKA
BLKB
BLKC
OSD_HD
OSD_VD
DOT_CLK
FLSH_RST
SCPU_SI
SCPU_SO
SCPU_SCK
LIT_3V
AUEE_CTL
SJIG_RX
VPP
I_MTR
V_BATT
SJIG_TX
REG_CS
DC_CHEK
REG_CLK
REG_DATA
CHRG_EVR
ADP_L
T_BATT
P_DET
BATT_L
L_MUTE
HP_DET
AUD_CLK
AUDIO_CS
(Page2-7)
BUZZER
AUD_DATA
PD_L
A_MUTE
LCD_RVS
KEY_C
CHRG_LED
LCD_OPEN
POFF_SW
CF_SLOT
SJIG_RST
PLAY_SW
REC_SW
MODE_SW
VIDE_LED
STIL_LED
KEY_A
VOIC_LED
MD_THRMO
ZOOM_SW
KEY_B
ACES_LED
TALY_LED
DSP_RST
AL_3.3V
REG_3.1V
GND
CN108
CN111
YTU94074-20
YTU94077-20
OPE. UNIT
(Page2-51)
y10495001a_rev0
2-3 2-4
DIGITAL(DIGI IF) SCHEMATIC DIAGRAM
TO OP DRV
CN101
QGF0306F2-33X
QGF0307F2-33W
DRIVE-IS
HGout+IS
DRIVE+IS
HGVcc+IS
5
TO SUB CPU
MD_THRMO
TO NUCORE
GND
nCFCD1
CFD3
CFD11
CFD4
CFD12
CFD5
CFD13
CFD6
CFD14
CFD7
CFD15
nCFCE0
nCFCE1
CFA10
4
3
2
1
nCFOE
nCFIORD
CFA9
nCFIOWR
CFA8
nCFWE
CFA7
CFRDY
DRV_3.3V
CFA6
CFCSEL
CFA5
CFA4
CFRESET
CFA3
nCFWAIT
CFA2
CFA1
nCFREG
CFA0
CFBVD2
CFD0
CFBVD1
CFD1
CFD8
CFD2
CFD9
CFD10
nCFCD2
GND
REG_3.1V
TO NUCORE
SDDAT2
SDDAT3
SDCMD
GND
SDCLK
SDDAT0
SDDAT1
SDCD
SDWP
L601
NQR0339-001X
L401
C601
47
/6.3
NQR0129-002X
D401
C602
0.1
T
47k
47k
47k
R644
R645
R646
D402
HGVss-IS
47k
R647
HGout-IS
47k
R648
Z_LED
47k
R649
Z_PTR_AD
47k
47k
R653
R650
C401
10
/6.3
ZOOM02
47k
R654
T
ZOOM03
ZOOM04
47k
R655
ZOOM01
47k
R656
R414
22k
F_VCC
F_PTR_AD
OP_THRMO
R401
47k
GND
FOCUS02
R403
47k
R402
47k
FOCUS04
FOCUS03
R404
47k
FOCUS01
R405
47k
C402
GND
CN106
R406
10k
GND
GND
HGout-ND
DRIVE-ND
HGout+ND
HGVss-ND
DRIVE+ND
HGVcc+ND
TO CF(CN9901)
QGB0404L1-60X
TO SD CARD
R407
47k
CN113
NNZ0102-001X
22
R408
22
R409
0.1
22
R412
22
R413
TO NUCORE
REG_3.1V
nUSBDP_PU
nUSB_DET
USBDP
USBDN
SDDAT2
SDDAT3
SDCMD
VSS( GND)
VDD( DSC_3V)
SDCLK
VSS2/CD
SDDAT0
SDDAT1
SDOCD
SW_COM
SD_WP
GND
GND
GND
CN102
QGB0503M2-30X
GND
TO CCD(CN5201) TO STROBE UNIT
CN103
QGF0532F2-10X
HL
H1
CCDOUTB
CCDOUTA
CCDOUTB
CCDOUTA
TO CDS
R201
47K
DTC144EM-X
GND
GND
GND
GND
GND
GND
R202
Q201
GND
GND
R203
R204
6.8k
CN108
QGB0512L1-30X
GND
GND
GND
Q202
2SA2029/QRS/-X
GND
TL103
GND
CCD-7.5V
L201
NQR0536-001X
ARMTCK
ARMTDO
0Ω
R702
REG_12V
CCD-7.5V
TO NUCORE
ARMTMS
ARMTDI
SUB
REG_12V
nJRESET
nARMTRST
0Ω
R703
REG_3.1V
NU_RX
TO NUCORE
H2
OV1
OV2
NU_TX
0Ω
R704
AL_3.3V
OV3
TO SUB CPU
TO NUCORE
SJIG_TX
SJIG_RX
OV4
MOD0
RG
TO USB
TO SUB CPU
SJIG_RST
VPP
J101
QNZ0616-001
MON_B
GND
VCOM
TO LCD DRV
MON_R
ISO200
STRB_AD
DRV_4.8V
DRV_4.8V
GATE_PLS
STRB_SNS
STRB_EVR
STRB_CHG
TO P.PRCS
TO P.PRCS
TO OP DRV
TO OP DRV
TO NUCORE
MON_G
MON_RPD
GND
TO JIG CONNECTOR
TO LCD SUB(CN304)
CN107
QGA0503F1-30X
GND
GND
VHVDD
LCD_BLK
10
STH
CKH2
CKH1
XSTH
VHVDD
REG_14V
DIGITAL(DIGI IF
TL101 S_PDIF
TL104
TALY_LED
SC
CSH
DSD
MON_B
MON_G
MON_R
XDSG
DSG
GND
GND
GND
GND
GND
STV
VBB
CSV
ENB
XSTV
CKV2
XENB
IR_OUT
C101
10
/6.3
)
TO MPEG2
TO SUB CPU
TO SUB CPU
KEY_C
CHRG_LED
AL_3.3V
CF_SLOT
POFF_SW
REC_SW
PLAY_SW
MODE_SW
VIDE_LED
STIL_LED
VOIC_LED
REG_3.1V
KEY_A
ZOOM_SW
ACES_LED
KEY_B
GND
CKV1
VCOM
T
TO NUCORE, P.PRCS
TO MPEG2, P.PRCS
TO LCD HINGE
CN110
QGA1001F1-03X
REG_1.2V
GND
REG_3.1V
LCD_RVS
LCD_OPEN
DRV_4.8V
L101
10µ
REG_4.8V
Q101
RPM-22PB
TO V OUT
TO V OUT
AL_3.3V
REG_14V
REG_12V
REG_8.5V
REG-7.5V
DRV_3.3V
REG_1.5V
AIOLRCK
AOMCLK
nAUDRESET
AUDSYNC
AUDBITCLK
AUDOUT
ACPLLOFF
AUD_DATA
AUEE_CTL
AUDIO_CS
AUD_CLK
P_GYAMP
Y_GYAMP
SJIG_RST
CHRG_EVR
REG_CLK
REG_DATA
DC_CHEK
PWR_CHEK
AUEE_CTL
R101
3k
TO P.PRCS
TO MPEG2
TO NUCORE
TO SUB CPU
TO SUB CPU
TO SUB CPU
TO P.PRCS
TO SUB CPU
TO NUCORE
TO SUB CPU
TO P.PRCS
TO SUB CPU
S_SHUT
AIBD
AOBD
AIOBCK
AUDIN
CLK27A
CLK27B
A_MUTE
PD_L
BUZZER
L_MUTE
HP_DET
P_DET
C_OUT
BATT_L
Y_OUT
V_OUT
T_BATT
ADP_LCFWP
REG_CS
V_BATT
I_MTR
LIT_3V
G_RST
CN104
QGF0530F3-30W
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
TO ANALOG
(CN203)
CN105
QGF0306F2-45X
TO ANALOG
(CN204)
CN111
QGF0517F2-20X
TO OPE. UNIT
NOTES: 1. For the destination of each signal and further line connections that are cut off from this diagram, refer to "BOARD INTERCONNECTIONS".
2. The parts with marked () is not used.
A
BCD EFG
2-5 2-6
y10492001a_rev0
DIGITAL(SUB CPU) SCHEMATIC DIAGRAM
LIT_3V
TO CN105
5
TO CN111
TO CN105, 108
BATT_L
ADP_L
AL_3.3V
REG_3.1V
GND
SJIG_RST
L1001
10µ
C1037
C1001
10/
6.3V
C1002
6.3V VSS
10/
0.1
L1002
IC1007
MB90097PFV155-X
SCLK
IC1003
10µ
C1003
0.1
IC1002
IC-PST3423U-X
100K
R1001
C1004
0.1
RS5C314-X
VDD
CLKCSXin
SIO
Xout
INTR
X1002
NAX0491-001X
C1005
8p
IC1004
SN74LV32ADGV-X
C1008
0.01
R1028
1K
0.1
C1036
CS
DATA
RST
VDD
SDR
BLKA
XD
EXD
BLKB
TEST
TST0
VSS BLKC
HD
VD
VC0
VC1
VC2
VC3
OSD_HD
OSD_VD
VC0
VC1
VC2
BLKA
VC3
BLKB
BLKC
DOT_CLK
TO V I/O
100K
R1058
A_MUTE
CHRG_EVR
P_DET
AUEE_CTL
HP_DET
100k
R1016
CF_SLOT
L_MUTE
LCD_RVS
PLAY_SW
REC_SW
MODE_SW
SJIG_RX
SJIG_TX
AUD_CLKREG_DATA
AUD_DATA
PD_L
AUDIO_CS
R1060
47K
MD_THRMO
KEY_B
KEY_A
ZOOM_SW
KEY_C
I_MTR
T_BATT
V_BATT
DC_CHEK
SCPU_CS
)
R1002
150K
Q1001
R1054
100K
100K
R1055
1018
C
R1005
R1006
4.7K
0.1
2SC4617/QR/-X
10K
0.1
C1019
UN9212J-X
DTC124EE-X
PDTC124EE-X
Q1002
SN74LV86ADGV-X
4
TO CN105
TO CN111
TO DIGI IF
(TL104)
3
TO CN108
TO CN105
TO CN111
2
TO CN110
TO P.PRCS
TO CN105
TO MEMORY
TG V.DR
1
TO NUDORE
BUZZER
VOIC_LED
STIL_LED
VIDE_LED
CHRG_LED
ACES_LED
TALY_LED
REG_CLK
POFF_SW
LCD_OPEN
SCPU_SI
SCPU_SCK
SCPU_SO
REG_CS
FLSH_RST
DSP_RST
VPP
100K
100K
R1051
R1050
R1052
1K
R1053
1K
IC1006
C1020
R1003
2.7K
R1004
D1001
18K
DA221-X
C1006
1
47K
R1007
R1039
470
R1025
470
R1015
470
R1008
2.2K
R1049
470
2.2K
100K
2.2K
R1020
R1033
R1012
AVSS
TALLY
KEY_A
KEY_B
V_BATT
10K
R1027
C1007
C1010
R1048
2.2K
NAX0647-001X
X1001
R1011
100K
0.01
C1021
0.1
C1011
C1012
C1013
C1014
C1015
C1016
C1017
0.01
0.01
0.01
0.01
0.01
0.01
0.01
T_BATT
I_MTR
KEY_C
VPP
AVDD
VDD
OSC2
OSC1
VSS
XI
XO
MMOD
RESET
REG_DATA
RTC_DATAIN
ZOOM_SW
REG_CLK
SUB_CPU_SO
CHRG_LED
MN101C77CJC
SUB_CPU_SI
SUB_CPU_SCK
REG_CS
FLSH_RST
ACCESS_LED
IC1001
RTC_CS
STILLLED
VIDEOLED
DSP_RST
OSD_CS
A_MUTE
VOICELED
P_DET
CF_SLOT
AUDIO_CLK
AUDIO_DATA
DC_CHEK
CHRG_WKUP
BZ_ENV
BZ_FREQ
CHRG_EVR
LCD_OPEN_SW
SUB_CPU_CS
REMOTE
OSD_VD
R1059
HP_DET
AUEE_CTL
SD_SLOT
L_MUTE
LCD_RVS_SW
PLAY_SW
POFF_SW
REC_SW
MODE_SW
PD_L
AUDIO_CS
JIG_CLK
JIG_DATA
KEY_WKUP
SYSTEM_SIG
470K
R1046
R1030
1K
1K
R1031
R1017
TL1002
R1024
1K
DIGITAL(SUB CPU
10
100K
R1044
SN74AHC2G53T-X
C1038
IC1005
R1042
R1043
R1041
R1038
R1036
R1021
R1022
R1023
R1013
TL1001
0.01
1K
1K
100k
R1018
1K
1K
1K
1K
1K
1K
1K
TO CN105
TO CN105
TO CN111
TO CN105
TO CN110
TO CN111
TO CN108
TO CN105
TO CN106
TO CN111
TO CN105
TO CN105
TO P.PRCS
NOTES: 1. For the destination of each signal and further line connections that are cut off from this diagram, refer to "BOARD INTERCONNECTIONS".
2. The parts with marked () is not used.
A
BCDEFG
2-7 2-8
y20337001a_rev0
DIGITAL(MPEG2) SCHEMATIC DIAGRAM
R3043
VO0
VO1
VO2
VO3
VO4
VO5
VO6
VO7
VOCLK
nVOEN
VOHSYNC
VOVSYNC
0
IC3002
R3048
C3018
R3045
R3044
100
TO CN105
TO NUCORE
CLK27B
MPEG_RST
PLLSTOP
5
REG_1.5V
REG_2.5V
TO REG
REG_3.1V
4
TO V I/O
TO V I/O
3
NUCORE
TO NUCORE
MPGFLD
MPGHSYNC
MPGVSYNC
DV2CKOUT
DV1IN0
DV1IN1
DV1IN2
DV1IN3
DV1IN4
DV1IN5
DV1IN6
DV1IN7
DV1CLKIN
nVOEN
DV1INH
DV1INV
GND
MPGFLD
MPGHSYNC
MPGVSYNC
VI0
VI0
VI1
VI1
VI2
VI2
VI3
VI3
VI4
VI4
VI5
VI5
VI6
VI6
VI7
VI7
#
R3049
#
R3050
#
R3051
#
R3052
#
R3053
#
R3054
#
R3055
#
R3056
#
R3057
R3058
R3059
2
L3001
NQR0129-002X
L3002
NQR0129-002X
L3006
L3003
NQR0129-002X
L3004
NQR0129-002X
C3001
C3003
T
C3004
T
L3005
NQR0006-001X
0
nCINT
nCACK
nCREQ
nPMWAIT
nPMOE
nPMWE
nPMCS0
PMD15
PMD14
PMD13
PMD12
PMD11
PMD10
PMD9
PMD8
PMD7
PMD6
PMD5
PMD4
PMD3
PMD2
PMD1
PMD0
PMA15
PMA14
PMA13
PMA12
PMA11
PMA10
PMA9
PMA8
PMA7
PMA6
PMA5
PMA4
PMA3
PMA2
PMA1
PMA0
TO NUCORE
TO P.PRCS
TO NUCORE, P.PRCS
TO NUCORE,
MEMORY, P.PRCS
TO NUCORE
TO
NUCORE
MEMORY
P.PRCS
TO
NUCORE
P.PRCS
TO
NUCORE
MEMORY
P.PRCS
TO NUCORE, P.PRCS
R3024
4.7k
47k
R3037
R3036
NDI/JTDI
NDO/JTDO
nNRST/nJTRST
SISYNC
SIVLD
SICLK/SISTB
OPEN
R3042
R3035 R3034
4.7k 4.7k
NMOD/JTMS
NCLK/JTCLK
SI0
SI1
R3033 R3041
JMOD
SI2
OPEN
4.7k
PSTOP
SI3
10k
10k
10k
R3032
R3031
R3030
PWM
nGNT
nREQ
nPME
IDSEL
SI7
nCLKRUN
nSOREQ
SOCLK/SOSTB
SOSYNC
SOVLD/SORDY
nCBE3
SO0
STCLK
PCICLK
SI4
SI5
SI6
R3029
10k
nCBE2
SO1
R3028
10k
nCBE1
SO2
R3027
10k
nCBE0
SO3
10k
R3026
nRESET
SO4
10k
10k
R3020
R3021
CB16
nCINT
nCACK1
SO5
SO6
SO7
R3014
10k
R3022
nCREQ1
nSOEN
R3023
nCACK0
MA0
nCREQ0
MA1
nCWAIT
MA2
nCRE
MA3
4.7k
R3025
nCWE
MA4
nCCS
MA5
CD15
MA6
CD14
MA7
CD13
MA8
CD12
MA9
CD11
MA10
CA15
CA14
CA13
CA12
CA11
CA10
HMODE2
HMODE1
HMODE0
MDQM
nMWE
nMCAS
nMRAS
nMCS
MCLKE
MCLK
MD31
MD30
MD29
MD28
MD27
MD26
MD25
MD24
MD23
MD22
MD21
MD20
MD19
MD18
MD17
MD16
MD15
MD14
MD13
MD12
MD11
MD10
MA13
MA12
MA11 CD10
CD9
CD8
CD7
CD6
CD5
CD4
CD3
CD2
CD1
CD0
CA9
CA8
CA7
CA6
CA5
CA4
CA3
CA2
CA1
CA0
22
R3015
MD9
MD8
MD7
MD6
MD5
MD4
MD3
MD2
MD1
MD0
C3017
C3016
C3015
C3014
C3013
C3012
0.1
0.1
0.1
0.1
C3002
T
VDD1
VDD1
VDD1
VDD1
VDD1
VDD1
VDD1
VDD1
VDD1
VDD1
VDD1
VDD1
VDD1
VDD1
VDD1
VDD1
VDDR
VDDR
VDDR
VDDR
VDDR
VDDR
VDDR
VDDR
VDDR
VDDH
VDDH
VDDH
VDDH
VDDH
VDDH
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
PVDD
PVDD
PGND
PGND
CSCLK
CSDI
CSDO
VDD1
VI0
VI1
VI2
VI3
VI4
VI5
VI6
VI7
VIHSYNC
VIVSYNC
VICLK
VO0
VO1
VO2
VO3
VO4
VIFLD/VIVLD
VI0
VI1
VI2
VI3
VI4
VI5
VI6
VI7
MPGHSYNC
MPGVSYNC
MPGFLD
VO5
VO0
VO1
VO2
VO3
VO4
VO5
0.1
C3006
0.1
C3007
T
0.1
C3008
0.1
C3009
C3005
C3010
0.1
T
10
/6.3
R3001
10k
R3002
10k
C3011
0.1
0.1
0.1
10k
10k
4.7k
R3039
GPIO5
AIOBCK
GPIO4
AIOBD
GPIO3
ATX
R3008
GPIO2
AIMCLK
0
GPIO1
AOMCLK
R3038
GPIO0
SIREQ
R3040
VDD3
VDD3
VDD3
VDD3
VDD3
VDD3
VDD3
VDD3
VDD3
VDD1
IC3001
UPD61152F1-A03
VO6
VO7
VOCLK
nVOEN
VOHSYNC
VOVSYNC
AILRCK
AIBCK
AIBD
AIOLRCK
0
0
R3012
VOCLK
nVOEN
VOHSYNC
10k
R3003
R3004
VOVSYNC
10k
R3013
VO6
VO7
C3019
MDQM
nMWE
nMCAS
nMRAS
nMCS
MMCLKE
MMCLK
MD31
MD30
MD29
MD28
MD27
MD26
MD25
MD24
MD23
MD22
MD21
MD20
MD19
MD18
MD17
MD16
MD15
MD14
MD13
MD12
MD11
MD10
MD9
MD8
MD7
MD6
MD5
MD4
MD3
MD2
MD1
MD0
MA13
MA12
MA11
MA10
MA9
MA8
MA7
MA6
MA5
MA4
MA3
MA2
MA1
MA0
C3312
0.1
MD0
TL3301
MD1
MD2
MD3
MD4
MD5
MD6
MD7
MDQM
TL3302
nMWE
TL3303
nMCAS
TL3304
nMRAS
TL3305
nMCS
TL3306
MA13
MA12
TL3307
MA10
TL3308
MA0
MA1
MA2
C3318
0.1
T
MA3
MD16
MD17
MD18
MD19
MD20
MD21
MD22
MD23 MD24
MDQM
C3321
0.1
C3311
10
/6.3
R3016
R3017
R3018
R3019
IC3301
K4S283233F-HN75
VDD
DQ0
VDDQ
DQ1
DQ2
VSSQ
DQ3
DQ4
VDDQ
DQ5
DQ6
VSSQ
DQ7
VDD
DQM0
WE_
CAS_
RAS_
CS_
BA0
BA1
A10/AP
A0
A1
A2
A3
VDD VSS
VDD
DQ16
VDDQ
DQ17
DQ18
VSSQ
DQ19
DQ20
VDDQ
DQ21
DQ22
VSSQ
DQ23
VDDQ
DQM2
NC
NC
VDDQ
IC3301
0Ω
DQ15
VSSQ
DQ14
DQ13
VDDQ
DQ12
DQ11
VSSQ
DQ10
VDDQ
DQM1
DQ31
VSSQ
DQ30
DQ29
VDDQ
DQ28
DQ27
VSSQ
DQ26
DQ25
VDDQ
DQ24
VSSQ
DQM3
VSSQ
2.2k
VSS
MD15
MD14
MD13
MD12
MD11
MD10
MD9
DQ9
DQ8
VSS
NC
CLK
CKE
NC
A11
A9
A8
A7
A6
A5
A4
VSS
NC
NC
MD8
MDQM
MMCLKE
MA11
MA9
MA8
MA7
MA6
MA5
MA4
MD31
MD30
MD29
MD28
MD27
MD26
MD25
MDQM
R3301
0
C3316
0.1
C3322
0.1
MMCLK
R3009
R3010
R3011
10k
10k
10k
AIBD
AIOLRCK
TO CN105
AIOBCK
(TL101)
AOBD
AOMCLK
S_PDIF
1
TO DIGI IF
NOTES: 1. For the destination of each signal and further line connections that are cut off from this diagram, refer to "BOARD INTERCONNECTIONS".
2. The parts with marked () is not used.
A
BCD EFG
# EXCHANGE PARTS LIST
R3012
GZ-MC200**
GZ-MC100**
1000100
2-9 2-10
R3013 R3048 R3049 R3050 R3051 R3052 R3053 R3054 R3055 R3056 R3057
0
0
100
10001000100010001000100010001000100
0
L3302
L3301
NQR0129-002X
DIGITAL(MPEG2
10
)
y10483001a_rev0
DIGITAL(V I/O) SCHEMATIC DIAGRAM
IC3202
R3231
R3232
R3233
R3234
R3235
R3236
R3237
R3238
R3216
)
VIOYSOUT
TO V OUT
VIOCOUT
R3239
0
C3238
R3209
0
0
0
0
0
0
0
R3207
0
TL3203
0
TL3204
0Ω
R3217
OPEN
C3206
C3207
R3218
R3201
0.1
47k
0.01
100
C3236 C3233
0.1
YSI7
YSI6
YSI5
YSI4
VSSQ
VCCQ
VDD(I/O)
NC
NC
VSS
RST
CS00
CS01
CS02
CS03
YS00
YS01
YS02
YS03
VDD(I/O)
OUTH
OUTV
OUTH2
OUTV2
ZCNT
SDOUT
VDD(CORE)
VSS
CLK
SDIN
SCLK
CS
VC0
VC1
VC2
VC3
BLK1
BLK2
BLK3
HDOUT
VDOUT
CLKOSD
HDCVF
VDCVF
VSS
NC
NC
NC NC
VDD(I/O)
CSYNC
SCANMODE
SCANEN
ADDATEST
VCC
IPTEST
C3201
10
/6.3
C3202
1
T
TL3202
0.1
C3209
YSI3
VCCQ
VDD(I/O)
HRP1
YSI2
VSSQ
HRP2
VDD(CORE)
0.01
C3211
C3234
YSI1
VDD( CORE)
WYSI0
WYSI1
0.01
0.1
VSS
VSS
VCC
YSI0
VDD(I/O)
WYSI2
WYSI3
MONI1
MONI2
VDD(CORE)
OPEN
R3210
INV
VDD(CORE)
IC3201
JCP8075
VSS
WCLK
INH
WCSI0
CSI7
WCSI1
CSI6
WCSI2
VSSQ
WCSI3
C3230
CSI5
WINV
0.01
VSS
VDD(CORE)
WINH
SDR_ONH
0.1
C3213
CSI4
VDD( I/O)
VSS
VDD(I/O)
CSI3
VCCQ
VDD(CORE)
RESVD
0.01
C3214
CSI2
RESHD
VSSQ
AMUTE
CSI1
SCANI1
C3227
CSI0
SCANI2
0.1
VCCQ
VSS
NCNCNCNCNC
VSS(8AD)
VDD(8AD)
VDD(8AD)
VSS(8AD)
CLPY
IREF1
YCOUT
ABAR1
COMP1
YSOUT
VREF1
VSS(10DA)
VDD(10DA)
VSS(8DA)
VDD(8DA)
IREF2
CROUT
ABAR2
COMP2
CBOUT
VREF2
COUT
VDD(8DA)
VSS(8DA)
SCANI3
VDD(CORE)
NCNCNCNCNC
NC
NC
VSS
CIN
VRH
VRL
VRM
VYIN
NC
NC
NC
NC
NC
NC
C3226
C3225
C3224
C3223
C3222
R3205
C3221
C3220
C3219
C3218
R3204
C3217
C3216
C3215
R3202 R3203
18k 12k
0.1
0.1
0.1
0.1
0.1
R3221
R3222
270
R3224
300
3.3k
Q3201
EMT1-W
R3223
3.3k
Q3201
R3225
4.7k
VDCVF
HDCVF
LCD_R
LCD_G
LCD_B
TO LCD DRV
820
1.0
0.1
0.1
0.1
820
1.0
0.1
0.01
DIGITAL(V I/O
10
5
DV2OUT0
DV2OUT1
DV2OUT2
NUDORE
DV2OUT3
DV2OUT4
DV2OUT5
DV2OUT6
DV2OUT7
DV2CKOUT
R3215
TO NUDORE
TO MPEG2
4
VI0
VI1
VI2
VI3
VI4
MPGHSYNC
MPGVSYNC
MPGFLD
OUTV2
VI5
VI6
VI7
R3213
R3214
0
0
TO MPEG2
TO P.PRCS
VIF_IN
TO P.PRCS
LCD DRV
TO P.PRCS
VIF_OUT
VIF_CLK
VENC_CS
VENC_RST
3
VC0
VC1
VC2
VC3
BLKA
TO SUB CPU
2
BLKB
BLKC
OSD_HD
OSD_VD
DOT_CLK
L3201
NQR0129-002X
L3205
10µ
L3203
0
L3202
0
C3244
1
C3203
C3208
10
L3204
0
/6.3
T
C3204 C3205
TT
TO REG
REG_2.5V
REG_3.1V
IC3203
MM1612FN-X
C3240
GND
1
C3241
0.01
C3242
1
IC3204
MM1611JN-X
C3243
0.01
1
NOTES: 1. For the destination of each signal and further line connections that are cut off from this diagram, refer to "BOARD INTERCONNECTIONS".
2. The parts with marked () is not used.
A
BCDEFG
2-11 2-12
C3210
0.01
R3226
130
Q3203
EMT1-W
R3228
4.7k
Q3202
2SA2029/QRS/-X
R3227
4.7k
R3229R3230
130130
y10485001a_rev0
DIGITAL(V OUT) SCHEMATIC DIAGRAM
5
TO REG
4
TO V I/O
REG_4.8V
GND
VIOYSOUT
VIOCOUT
L3701
10µ
C3701
/6.3
10
10
T
C3708
C3709
1
0.1
R3709
0
IC3701
BH7612FV-X
DIGITAL(V OUT)
C3702
/4
100
C3703
/4
22
C3704
100
T
/4
3
R3703
68
D3701
C3705
/4
22
C3710
0.01
2
R3708
0
R3705
1Ω
Q3701
EMZ1-W
T
C3706
0.01
R3701
68
R3702
68
TO CN105
Y_OUT
V_OUT
C_OUT
TO OP DRV
ASPECT_S
TO
P.PRCS
ANA_IN_H
PS_CTL
1
NOTES: 1. For the destination of each signal and further line connections that are cut off from this diagram, refer to "BOARD INTERCONNECTIONS".
2. The parts with marked () is not used.
A
BCD EFG
2-13 2-14
R3707
100k
R3706
82k
C3707
R3704
10k
Q3702
Q3703
y30295001a_rev0
DIGITAL(NUCORE) SCHEMATIC DIAGRAM
VLD_PIX
3CCDCLK
AFEVPIX
SCANE
TESTSCAN
47k
R4010
R4008
nJRESET
TO CN108
PPRO10
PPRO11
VCLK
AFED10
AFED11
AFECLK
TRACESYNC
TRACECLK
DBGRQ
OPEN
TO P.PRCS
PPRO5
PPRO6
PPRO7
PPRO8
PPRO9
AFED5
AFED6
AFED7
AFED8
AFED9
DBQACK
PMA0
PMA1
PMA2
PMA3
TL4002
PMA3
PMA2
PMA1
PMA0
TO MPEG2, P.PRCS
PPRO3
PPRO4
AFED3
AFED4
PMA4
PMA5
PMA4
PMA5
TO MPEG2
PPRO1
PPRO2
AFED1
AFED2
PMA6
PMA7
PMA6
PMA7
P.PRCS
MEMORY
PPRO0
SDR_CKE
AFED0
PMA8
PMA8
SDR_DQ31
MCKE
PMA9
PMA9
SDR_DQ31
SDR_DQ31
SDR_DQ29
SDR_DQ30
SDRAM_D29
SDRAM_D30
SDRAM_D31
PMA10
PMA11
PMA12
PMA10
PMA11
PMA12
SDR_DQ29
SDR_DQ30
SDR_DQ30
SDR_DQ29
SDR_DQ27
SDR_DQ28
SDRAM_D27
SDRAM_D28
PMA13
PMA14
PMA13
PMA14
MEMORY
TO MPEG2
SDR_DQ28
SDR_DQ28
SDR_DQ27
SDR_DQ25
SDR_DQ26
SDRAM_D26
PMA15
PMA15
SDR_DQ25
SDR_DQ26
SDR_DQ27
SDR_DQ26
SDR_DQ25
SDR_DQ23
SDR_DQ24
SDRAM_D23
SDRAM_D24
SDRAM_D25
PMA16
PMA17
PMA18
PMA16
PMA17
PMA18
SDR_DQ22
SDR_DQ23
SDR_DQ24
SDR_DQ24
SDR_DQ23
SDR_DQ22
SDR_DQ21
SDR_DQ19
SDR_DQ20
SDR_DQ21
SDR_DQ22
SDRAM_D20
SDRAM_D21
SDRAM_D22
PMA19
PMA20
PMA21
TL4003
PMA21
PMA20
PMA19
TO MEMORY
SDR_DQ19
SDR_DQ20
SDR_DQ21
SDR_DQ20
SDR_DQ19
SDR_DQ17
SDR_DQ18
SDRAM_D17
SDRAM_D18
SDRAM_D19
PMD0
PMD1
PMD2
PMD2
PMD1
PMD0
SDR_DQ17
SDR_DQ18
SDR_DQ18
SDR_DQ17
SDR_DQ15
SDR_DQ16
SDRAM_D15
SDRAM_D16
PMD3
PMD4
PMD4
PMD3
SDR_DQ16
SDR_DQ16
SDR_DQ15
SDR_DQ13
SDR_DQ14
SDRAM_D14
PMD5
PMD5
SDR_DQ13
SDR_DQ14
SDR_DQ15
SDR_DQ14
SDR_DQ13
SDR_DQ11
SDR_DQ12
SDRAM_D11
SDRAM_D12
SDRAM_D13
PMD6
PMD7
PMD8
PMD8
PMD7
PMD6
P.PRCS
MEMORY
TO MPEG2
SDR_DQ11
SDR_DQ12
SDR_DQ12
SDR_DQ11
SDR_DQ9
SDR_DQ10
SDRAM_D9
SDRAM_D10
PMD9
PMD10
PMD9
PMD10
SDR_DQ10
SDR_DQ10
SDR_DQ8
SDRAM_D8
PMD11
PMD11
TO P.PRCS
TO MPEG2
TO CN108
PMINT
SOF
nCINT
MOD0
VDCPU
ID_LAT
5
R4081
47k
10k
0603
R4058
R4061
47k
0Ω
PLLSTOP
SSGFLD
CFWP
nCFWE
nCFWAIT
CFRESET
nCFREG
CFRDY
nCFOE
nCFIOWR
nCFIORD
CFCSEL
CFD10
CFD11
CFD12
CFD13
CFD14
CFD15
nCFCE0
nCFCE1
nCFCD1
nCFCD2
CFBVD1
CFBVD2
CFA10
NDPWM
CLK27A
R4062
R4063
R4064
R4065
R4066
R4101
R4102
R4103
R4104
R4105
R4106
R4107
CFD0
RA4007
CFD1
CFD2
CFD3
CFD4
RA4008
CFD5
CFD6
CFD7
CFD8
RA4009
CFD9
RA4010
R4110
R4111
R4112
CFA0
RA4011
CFA1
CFA2
CFA3
CFA4
RA4012
CFA5
CFA6
CFA7
CFA8
RA4013
CFA9
GPIO7
0Ω
GPIO26
0Ω
GPIO28
0Ω
GPIO25
GPIO27
0Ω
GPIO29
0Ω
CFWP
0Ω
nCFWE
0Ω
nCFWAIT
0Ω
CFRESET
0Ω
nCFREG
0Ω
CFRDY
0Ω
nCFOE
nCFIOWR
nCFIORD
CFCSEL
0Ω
CFD0
CFD1
CFD2
CFD3
0Ω
CFD4
CFD5
CFD6
CFD7
0Ω
CFD8
CFD9
CFD10
CFD11
0Ω
CFD12
CFD13
CFD14
CFD15
0Ω
nCFCE0
0Ω
nCFCE1
nCFCD1
0Ω
nCFCD2
CFBVD1
CFBVD2
0Ω
CFA0
CFA1
CFA2
CFA3
0Ω
CFA4
CFA5
CFA6
CFA7
0Ω
CFA8
CFA9
CFA10
PWM0
PWM1
TL4015
PWM2
TL4016
PWM3
TL4017
GPIO31
R4068
NC3
47k
NC4
GPIO39
R4001 D4001
TO CN105
TO MPEG2
TO P.PRCS
TO MPEG2
PWR_CHEK
MPEG_RST
4
TO CN106
3
TO OP DRV
TO CN103
2
TO CN105
TO CN105
STRB_EVR
ACPLLOFF
1
MCLKINNCAMBACLKIN
0Ω
GPIO5
GPIO4
GPIO3
GPIO2
GPIO6
AFESOF
nRESET
nRESETPERH
TL4001
3.3k
R4005
DSP_RST
AFE_RST
TO P.PRCS
TO SUB CPU
47k
R4009
0Ω
R4006
SDR_DQ9
SDR_DQ9
SDR_DQ8
SDR_DQ6
SDR_DQ7
SDRAM_D7
PMD12
PMD12
SDR_DQ7
SDR_DQ8
SDR_DQ7
SDR_DQ6
SDR_DQ4
SDR_DQ5
SDRAM_D5
SDRAM_D6
PMD13
PMD14
PMD14
PMD13
SDR_DQ4
SDR_DQ5
SDR_DQ6
SDR_DQ5
SDR_DQ4
SDR_DQ2
SDR_DQ3
SDRAM_D2
SDRAM_D3
SDRAM_D4
nPMCS7
nPMCS1
PMD15
R4012
R4011
PMD15
nPMCS1
nPMCS7
TO P.PRCS
TO MEMORY
TO MEMORY
SDR_DQ1
SDR_DQ2
SDR_DQ3
SDR_DQ3
SDR_DQ2
SDR_DQ1
SDR_DQ0
SDR_DQ0
SDR_DQ1
SDR_DQM2
SDR_DQM3
DQM3
SDRAM_D0
SDRAM_D1
nPMCS0
nPMWE
nPMOE
R4016
R4015
R4014
R4013
nPMOE
nPMWE
nPMCS0
TO MPEG2
TO MPEG2
MEMORY, P.PRCS
SDR_DQM0
SDR_DQM1
SDR_DQM2
SDR_DQM3
SDR_DQ0
SDR_DQM3
SDR_DQM2
SDR_DQM1
SDR_DQM0
SDR_WE
SDR_CAS
SDR_DQM0
SDR_DQM1
nCAS
nMWE
DQM0
DQM1
DQM2
nPMBLS0
nPMBLS1
nPMWAIT
nARMTRST
TCK
0Ω0Ω0Ω0Ω0Ω0Ω0Ω0Ω0Ω
R4019
R4018
R4017
ARMTCK
nPMBLS1
nPMBLS0
nPMWAIT
nARMTRST
TO P.PRCS
TO MPEG2, P.PRCS
SDR_WE
SDR_WE
SDR_CAS
SDR_CS0
SDR_RAS
nRAS
TMS
ARMTMS
TO CN108
SDR_RAS
SDR_CAS
SDR_RAS
SDR_BA1
nMCS0
SDRAMBS1
TDI
AMBATDO
47k6847k
R4020
R4069
ARMTDI
ARMTDO
SDR_CS0
SDR_CS0
SDR_BA0
SDRAMBS0
SIO0
TL4026
R4021
1k
R4007
SDR_BA0
SDR_BA1
SDR_BA1
SDR_BA0
SDR_CLK
R4055
33
R4056
SDRAMCLK
SDRAMCLKR
SIO1
TL4027
10k
SDR_CKE
SDR_CKE
SDR_CLK
SDR_A11
SDR_A12
SDRAM_A12
47k
R4022
0Ω
R4023
SDR_CLK
SDR_A10
SDR_A10
SDRAM_A11
GPIO24
nVOEN
TO MPEG2
NOTES: 1. For the destination of each signal and further line connections that are cut off from this diagram, refer to "BOARD INTERCONNECTIONS".
2. The parts with marked () is not used.
A
BCDEFG
2-15 2-16
SDR_A10
SDR_A9
SDR_A8
SDR_A9
SDR_A8
SDR_A8
SDR_A9
SDRAM_A8
SDRAM_A9
SDRAM_A10
DMASREQ
DMACLR
DMABREQ
0Ω
R4024
DMACLR
DMABREQ
DMASREQ
TO P.PRCS
SDR_A7
SDR_A6
SDR_A7
SDR_A6
L4010
NQR006-001X
47k
R4025
L4007
SDR_A5
SDR_A4
SDR_A5
SDR_A4
SDR_A3
L4011
T
/6.3
C4045
10
R4029
NAX0710-001X
NQR0006-001X
C4043
SDR_A3
SDR_A2
SDR_A1
SDR_A0
SDR_A11
SDR_A2
SDR_A1
SDR_A0
SDR_A12
SDR_A11
SDR_A4
SDR_A5
SDR_A6
SDR_A7
SDRAM_A7
SDRAM_A6
SDRAM_A5
IC4001
SIP1280ISD-DVA2
USBPHYCLK
USBVSS
0Ω
R4028
0Ω
X4001
0.1
SDR_A12
SDR_A2
SDR_A3
SDRAM_A4
SDRAM_A3
USBVSS
USBVDD
0.1
C4042
R4030
0Ω
SDR_A0
SDR_A1
SDRAM_A1
SDRAM_A2
USBVSS
USBVDD
0.1
6.8k
C4041
R4031
22
R4054
SDRAM_A0
USB4XCLK
USBREXT
6.8k
R4032
SDCLK
SD_CLK
USBDp
USBDP
SDWP
SDCD
22
R4053
SD_WP
SD_CD
USBDn
USBVDD
0.1
C4040
USBDN
nUSB_DET
TO DIGI IF
TO CN113
SDDAT3
SDCMD
SD_CMD
SD_DAT3
USBVSS
GPIO0
GND
nUSBDP_PU
(USB)
SDDAT1
SDDAT2
SD_DAT2
SD_DAT1
GPIO1
AUDIN/GPIO13
AUDIN
SDDAT0
DV1INH
DV1INV
DV1CLKIN
SD_DAT0
DV1CLKIN
DV1VSYNC
DV1HSYNC
AUDOUT/GPIO12
AUDSYNC/GPIO10
AUDBITCLK/GPIO9
nAUDRESET/GPIO8
0Ω
R4036
AUDOUT
AUDSYNC
AUDBITCLK
nAUDRESET
TO CN105
DV1IN7
DV1UV7
GPIO11
DV1IN6
DV1UV6
GPIO41
TL4008
DV1IN5
DV1UV5
GPIO40
TO MPEG2
DV1IN2
DV1IN3
DV1IN4
DV1UV2
DV1UV4
DV1UV3
GPIO43
GPIO42
UART2RXD
TL4010
TL4011
FLDCPU
DV1IN0
DV1IN1
TL4019
DV1UV0
DV1UV1
UART2TXD
VCLKIN
220
R4040
CLK27A
TG_FLD
CN105
TO P.PRCS
TO P.PRCS
TO TG V.DR
R4050
R4051
R4052
VSS42
VSS43
VSS44
DV1CLKOUT
GPIO32/PHASEERR
GPIO33/nVRESET
GPIO34/ZEBRASKIN
47k
R4042
47k
R4041
47k
47k
VSS39
VSS40
VSS41
GPIO35/CSYNC
GPIO36/HSYNC
GPIO37/VSYNC
47k
R4044
TL4013
VSS38
FSADJp
VSS37
FSADJn
VSS36
TVOUTG
VSS35
TVOUTR
VSS34
TVOUTB
VSS33
TVOUTY
VSS31
VSS32
TVOUTCHR
DV2CLKIN
220
47k
R4046
R4045
TO MPEG2
VSS28
VSS29
VSS30
DV2CLKOUT
DV2HSYNC
DV2VSYNC
TL4004
TL4005
DV2CKOUT
V I/O
VSS27
DV2UV7
DV2OUT7
DIGITAL(NUCORE
10
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
DV2UV6
DV2UV5
DV2UV4
DV2UV3
DV2UV2
DV2UV1
DV2UV0
CVDD1
CVDD2
CVDD3
CVDD4
CVDD5
CVDD6
CVDD7
RA4001
RA4002
220
DV2OUT6
DV2OUT5
220
DV2OUT4
DV2OUT2
DV2OUT3
DV2OUT0
DV2OUT1
0.1 0.1
C4036 C4035
IC4002
SN74AHC1G04DC-X
TO V I/O
VSS8
VSS9
VSS10
VSS11
VSS12
CVDD8
CVDD9
CVDD10
CVDD11
CVDD12
0.1 0.1 0.1
C4034 C4033 C4032
C4018
0.1
CVDD13
R4071
4.7k
D4002
R4070
4.7k
D4003
1SS376-X
VSS6
CVDD14
VSS5
CVDD15
Q4001
VSS4
CVDD16
R4072
NU_RX
VSS2
VSS3
nMCS3
nMCS2
nMCS1
MVDD11
MVDD10
MVDD9
MVDD8
MVDD7
MVDD6
MVDD5
MVDD4
MVDD3
MVDD2
MVDD1
VDD26
VDD25
VDD24
VDD23
VDD22
VDD21
VDD20
VDD19
VDD18
VDD17
VDD16
VDD15
VDD14
VDD13
VDD
VDD10
AVDD5
AVDD4
AVDD3
AVDD2
AVDD1
AVDD0
AVSS10
AVSS9
AVSS8
AVSS7
AVSS6
AVSS5
AVSS4
AVSS3
AVSS2
AVSS1
AVSS0
PLLDVDD2
PLLDVDD1
PLLPVDD
PLLAVDD2
PLLAVDD1
PLLDVSS2
PLLDVSS1
PLLPVSS
PLLAVSS2
PLLAVSS1
CVDD17
NU_TX
TO CN108
)
VDD9
VDD8
VDD7
VDD6
VDD5
VDD4
VDD3
VDD2
VDD1
2SC5658/QRS/-X
0.01
C4021
C4031
C4028
C4030
T
R4033
C4027
C4029
0.1
C4006
22
/6.3
MM1613DN-X
C4019
C4007
C4008
C4009
C4010
C4014
C4015
C4016
0.1
C4011
C4012
C4013
C4017
0.1
IC4003
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0Ω
0.1
0.1
1
L4003
L4001
NQR0129-002X
C4001
T
10
/6.3
L4002
NQR0129-002X
C4002
T
10
/6.3
L4004
C4004
10
L4005
T
C4005
T
10
/6.3
R4049
0Ω
L4006
NQR0448-002X
C4020
1
R4057
0Ω
REG_2.5V
TO REG
REG_3.1V
NQR0006-001X
REG_1.2V
GND
TO REG
REG_4.8V
y10482001a_rev0
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