JRC NJW1106FC2, NJW1106FC2-80 Datasheet

DOLBY PRO LOGIC SURROUND DECODER

SDA

SCL

AUX0

MD1

MD2

NJW1106

PPRELIMINARY

GENERAL DESCRIPTION

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NJW1106

The

is a surround process or including all of the necessary circuits of Dolby Pro Logic Surround decoder and digital delay.

All of internal statuses are controlled by I

C BUS interface.

In addition to Dolby Pro Logic Surround function, it performs easily other surround function such as Hall, Live, Disco and others.

Dolby and double-D symbol are trademarks of Dolby Laboratories Licensing Corporation. San Francisco, CA94103-4813.US A. This device is available only t o l i censees of Dolby Lab. Licensing and application information may be obtained from Dolby Lab.

Purchase of I2C com ponents of New Japan Radio Co., Ltd. or one of its sublicens ed Associated Companies conveys a license under the Philips I2C Patent Right s to use these components in an I2C system, provided that the system conforms to the I2C Standard Specification as defined by Philips.

FEATURES

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l Operating Voltage : V

l Digital Delay on chip

l I

C BUS Interface SDA, SCL

=10V(Analog Block), VDD=5V(Digital Block)

l Bi-CMOS Technology

l Package Outline QFP80, QFP100

FUNCTION

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[Dolby Pro Logic Surround] l Automatic input balance l Noise sequencer l Adaptive matrix l Center channel control (Wide, Normal, Phantom, Off) l Modified B-type noise reduction l 7kHz low-pass filter l Dolby 3 stereo mode l Digital time delay (15,20,25,30msec.)

PACKAGE OUTLINE

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NJW1106FC2-80 NJW1106FC2

[Other Surround] l Surround Signal Selector (L+R, L-R, EXTIN) l Front mixing control l Digital time delay (15,20,25,30,40,50,60msec.) [Other Function] l Digital auxiliary outputs (AUX0-AUX7)

SYSTEM BLOCK DIAGRAM

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LIN

RIN

EXTIN

Input Autobalance

Noise Sequencer Adaptive Matrix

L+R L-R

I2C Interface

Center Mode

7KHz

LPF

Modified

BNR

ADD/SUB

Delay

SW. Controller

LOUT

COUT

ROUT

SOUT

Ver.1.0

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NJW1106

ABSOLUTE MAXIMUM RATING (Ta=25°C)

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PARAMETER

Supply Voltage

Power Dissipation

Operating Temperature Range

Storage Temperature Range

SYMBOL

opr

stg

RATING

6.5

(QFP80) 1.3

(QFP100) 1.3

-40 to +85

-40 to +150

UNIT

°C °C

*On board

ELECTRICAL CHARACTERISTICS (V

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PARAMETER SYMBOL TEST CONDITION MIN. TYP. MAX. UNIT

OVERALL

X

Supply Voltage Range V

Supply Current I

Reference Voltage V

Threshold Voltage V

INPUT AUTO BALANCE

X

Capture Range CPR - 5 -

Error Correction CER - 4 -

ADAPTIVE MATRIX (0dB=300mVrms, f=1kHz at Cin Cout)

X

Output Level Accuracy

relative to Cch Matrix Rejection relative MR L,R,S’ch.out 25 40 - dB Headroom HR-AM VCC=9V at THD=1% 15 17 - dB Total Harmonic Distor tion THD-AM L,R,C,S’ch.out at 4ch.mode

Signal to Noise Ratio SNAM Rg=0,wt:CCIR-ARM at 4ch.mode

NOISE SEQUENCER

X

Output Noise Level Vno -15.0 -12.5 -10.0 dB Output Noise Level Accuracy relative to Cch

MODIFIED B-TYPE NOISE REDUCTION (0dB=300mVrms, f=100Hz at Sin Sout)

X

Voltage Gain GV-NR Vin=0dBd,f=100Hz - 9.5 - dB Decode Responce1 DEC1 Vin=0dBd,f=1kHz -1.6 -0.1 1.4 dB Decode Responce2 DEC2 Vin=-15dBd,f=1.4kHz -3.0 -1.5 0.0 dB Decode Responce3 DEC3 Vin=-20dBd,f=1.4kHz -4.9 -3.4 -1.9 dB Decode Responce4 DEC4 Vin=-40dBd,f=5kHz -6.8 -5.3 -3.8 dB Total Harmonic Distortion THDNR Vin=0dBd,f=1kHz - 0.07 0.3 % Headroom HRNR VCC=9V at THD=1% 15 17 - dB Signal to Noise Ratio SNNR Rg=0,weightted:CCIR/ARM 73 78 - dB

=10V, VDD=5V, Ta=25°C)

4.5

0.7V

0.0

DD REF

thh

Vol L,R,S’ch.out -0.5 0 0.5 dB

No Signal No Signal No Signal 3.6 4.0 4.4 V Digital input high level Digital input low level

thl

L,R,ch.out at 2ch.mode

Vno L,R,S’ch.out -0.5 0.0 0.5 dB

0.05

0.002 80

100

5.5 50 10

0.3V

0.2

0.1

V mA mA

% dB dB

Ver.1.0

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