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J-402BG

Jetway J-402B, J-402BG J-402B/J-402BG User Manual

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Page 1
J-402B/J-402BG
3/486
VL-BUS
USER'S
MAIN
BOARD
MANUAL
I I
Page 2
Page 3
Chapter
Chapter 1 Introduction
1.
Introduc tion
Congratulations on the /J-402BG
The
3/486 VL-Bus
J-402B/J-402BG
three-chip solution offering
386
mid range
/486-based AT system . The
VL-Bus main board
25
, 33 and 40MHz, or
It
50MHz.
486DL
The
J-402B/J-402BG
option
cache and
Because
/J-402BG
Megabytes
to 64 l M ,4M
supports
C,
M6, M7, P24T, and Three 32-bit local Bus.
to
accommodate
support
of
its
the
unique
3/486 VL-Bus
of
32-bit high speed
(lnd
purcha
main
3/486 VL-Bus
opt
is
designed for 386 systems running from
486
systems running from 25 , 33 and
386DX, 486SX,
3/486 VL-Bus main board. also has an
either
80387
num eric co processor.
memory
main
8M SIMM modules.
configurations are lMB, 2MB,
32MB ,64MB.
se
of y
our
r 2w J-402B
board.
main
board is a l
owcost
imal perform ance for low to
J-402B/J-402BG
486DX
64K, 128K ,
, 486DX2 Cyrix
256K
of
external
subsystem design, the J-402B
board, allows for 1 Megabyte
memory
4MB
, 5MB, 8MB, 16MB , 20MB,
by using
The
available memory
256K
,
1
Page 4
Chapter 1. Intr
oduction
Chapter
1.
Introduction
SPECIFICATION
Proce
ssor:
Coprocessor:
C
PU
Clock:
PU l
ock
Source:
M
emory:
M
emory
M
emory
SRAM BIOS
Additional
1
/0
Dimension: 22X25.5_ Additional
Mis
B
oard
config
usin
configuration:
Subsystem
BIOS features:
Subsystem
fea tures
cella
nous
design:
urati
g:
Typ
No.
connec
on:
e: AMI ROM BIOS
of
tor
386DX, 486DLC,
Int
el ULSI,
33 /
40MHz
25/33/40/50/DX2-50/DX2-66MHz,
for 486M/B
Clock Up
20 256KB memory
64K
Setup
slots: Six 16-bit &
Thr
s:
Reset dicator. Four noise
gerner
to
64.Nrn
l MB/2MB/ 4MB/ 5MB/
MB
/3 2MB/ 64MB
B/ l 28KB/
program
ee 32-b
layer operation
486SX, 486DX, 486DX2,
M6
,M7,
P24T
IIT
, Cyrix
for
386
ator
/1MB/4MB
up
to
64MB
256
resides in ROM.
Two 8-bit
it
Local Bus slots.
cm,
2/3 B
buttom.
Internal
implementation
.
80387
M/B
8MB/l 6MB/
/8MB
on
KB
aby
Turbo battery.
Module, board
ISA
Slots,
AT
size
speed in-
for low
SYSTEM
•
Low
• Bust-Line-Fi
•
Support
(P
• Up cache scheme. Support
• fo
• Adju st
•
387
• Hi
•
Copy 256KB.
• Up to memory
• Su 16MX9 Turbo/slow speed sel
•
•
Supp
lX
•
SO
Shadow
•
adaptor
•
Control
On-chip
•
FEATURES
cost
, low
power,
ll
during
386
DX (
GA),
M6,
M7,
to
10%
performance
VESA
rm
ance.
able
Coprocessor support
dden
refresh
-back Direc
64MB
space.
pports 1 through 2 banks
SIMM.
ort2-
and
2X
MHz.
RAM card BIOS. of
comparator
local
system
suppo
of loca
1-l-1
or3
clock
suppo
two
non-cacheable
l .Oµm CMOS te
cache-read-miss.
PGA)
, 4
86DLC/486DX/486DX2/486SX
P24T
CPU
enhancement
bus
to
speed cl
t-mapped
l high-speed,
-2-2-2
source,
ock
for
rt
to
ection.
cache
supporting
rt
for
determin
386
enhance
with
system
chnology.
from
write-
through
increasing video & IDE per-
by
clock
generator.
mode.
system
size
page-mode,
of
256KX9,
cyc
les.
systems
BIOS, video BIO S and
regions. es
cache
hit
performan
of 64KB
1MX9, 4MX9 ,
or
, l
DRAM
running
miss.
28KB,
up
ce.
to
2
3
Page 5
'
Chapter 1.
Intr
oducti
on
J-402 B/J-4028 G 3/486 VL-B US MAIN BOARD Layout
2
§~
.1_
-
D
JP !
_L__-~----_J
>
80
42 I > BIOS I
JP36
_c__
___
_,
- 1
D
-1---
JPl5
:o
JP29
~D
IPI
J
--
JP l 4
o:
:o
5>
0
,..,
z
<
"'
8K/32K
X8
I
IP400JP5
=
Chapte
r 2.
Intr
oduc
tion
Chapter 2 Installation
BEFORE TURNING FOLLOW YOUR YOU!l
On Board
The
expanded ,4M
3/486
THE FOLLOWING INSTRUCTIONS CAREFULLY
SYSTEM
SIMM
J-402BiJ-402BG 3/486 VL-Bus main board can be
memory
or
16M
SIM DRAM can
VL~bus
BANK 1 SIMM
3/
486
VL-Bus mainboard .
•
SIMM
Module Used:
BANK
O
ON
THE
SYSTEM
MAY
NOT OPE
Installation
from lMB
to
be
mainboard.
of
assembly available for
There
They
(256K
, lM ,
BANK
POWER
RATE
CORRECTLY. THANK
64MB.
used
Either
on
, PL
the
are spacial BANK 0 and
the
are:
4m,
16mx9
1
TOTAL
EASE
P-OL-
OR
256K
or
IM
J-402B/J-402BG
J-402B/J-402BG
of
SIMM 4 Pcs)
MEMORY
a! a!
~ ~
1.::1
L:J
SI JP31
QR
ESET D
J
PH
Os PK - -
122 IP27
KEY~
JP2
bro
1i?swe;
~ ~ ~
:o
~~
~~
00
8
-ooo
e;
ONE
256
486DX/P24T
386DX/486DLC
-
D
!'
K X 9, 4 pcs
256K X 9 , 4 pcs
1MX9,4pcs
256K
X 9, 4 pcs
X 9, 4 pcs
lM
4M
X 9, 4 pcs
lM
X 9, 4 pcs
4M
X 9, 4 p
4MX9,4p
16MX 9, 4 pcs
cs cs
SIMM MODULE DRAM BANK 0­first
BANK 0 should will
1.
When you install
completely
not
work
.
fill BANK 0,
be
4
N
256K
X 9, 4 p
NONE
lM X 9 , 4 pcs 1MX9,4p
NONE
4MX
1MX9,4pcs
4MX9,4pc
cs
cs
9,4pcs
s
NONE
on
the
motherboard
the
DRAM
then
on
fill BANK 1.
fully occupied, otherwise
5
lM
2M
4M
SM
8M
16M
20M 20M 32M
64M
consists
the
motherboard, The
spaces
the
motherboard
of
of
Page 6
Chapter 2. Installation
Chapter 2. Installation
SIM RAM ON BOARD POSITION
Please refer
•Plea
se
to th
e table
BANK
0 INSTALL:
BANK 1 INST
refer
to
the foll
for the
ALL:
owi
BANK 0 and
U4 U8 U9
ng figure
DRAM:
~
==========
OJ
[::::j~
ci
US
for
~D
BANK
U6
U7
UlO
Ull
operating
1 positio
the
SIM
n.
CACHE SRAM INSTALL
CACHE
SIZE
64K
12
8K
256K
•Please
BAt'-IK 0
U25,
U26, U27,
8KX8, 32KX8,
32KX8,
refer to
CACHE
4PCS
U28
4PCS
4PCS
SRAM
BANK
U3
3, U34, U35,
8
KX8,
32KX8,
the
following
4PCS
NONE
4PCS
JP6, JPl 7
SELECTION
TAG
RAM
I
Ul 9
U36
8KX8
8KX8
16KX8132KX8
for
setting
JUMPER
JP2
1 OP CL
CL CL
SETTING
JP24
OP OP
up the JP21, JP24,
"'VI
-0
r-
;:J
00
::>
;:J
;:J
;:J ;:J
JP6
2-3 1-2 2-3
<:l\
S:::::
;:J
-
~
<
"'
;:J
JP17
2-3 1
-2
2-3
1
hOlllllllllol
1
30
30
6
U4
us
U6
U7
U8
U9
UJO
Ul 1
30
1
BANK 0
~
BANK 1
Li
7
Page 7
Chapt
er
2.
I
nstallation
Chapte r 2. I
nstallation
CPU
ASSEMBLE OPERATION
A Type
CPU
Assemble 386DX/386DX+80387, 486DLC/
STEP 4 Pl
ease refe
JP25,
J
C2, JC3,
r to
JP1
6,
JC4, JP7:
the followin
g figure for setting
up
lo
JP34, JP14, JP29, JP20, JP15, JP31, JCl,
486DLC+80387
c:::::=JJ 2
1.
STEP 1 SET
CPU
TYPE
386
MODE
386
JP25
OP
MODE JP16 JP34
2-3 1-2
JP14
1-
2
JP29 JP31
1-
2
CL
JP20
OP
JP
7
1-2
JP4:
D
8042
-
-
JP36
JPI8
I
0
2
-
BIO
S
I
-
-
c::::JJ 3
I)____
4
~V\\Cr-000>~
::>
=i
::i ::i
::::>
::>
::>
::::>
0
"'~
"'"'
=·
:;;:
a...
00
N
"'
~
a..
-
-
-
-
"'
~
JP29
'.
I
JPI4
:1
L--
~
0
"'
~
L-
~
L--
'--
JP3J
~o
JP6
JPIJ
o:
495XLC
f--
32
0
z
"'
.,
.
"'
8K/32K
X8
z
""
.,
"'
I
JP4Q0JP5
l~J
L--
JP7
~oi~D
JPl7
-
D~
~
z"'
Ul
~
>"'
Ul
'.:".
1g
1
~
CJ
00
JP24
x
"'
g8
oi::;
~
s
Lr,
I
-
-
~
"'
§
N
"'
::>
~
00
x
"'
~
"'
;:;
~
~
::> ::>
~
~
~
~
~
;:;
§
~
~
~
~
;:;
~
~
Lr.
-
-;:
p D-
~ ~~D-
§
~
00
N
::>
~
~
EJ
I = JP37
- ('If"'">
uuu
Ht
'
486DX/P24T
3
QJPJ
386DX/486DLC
[]
~D-
JP328
JC4
:
m
iiii
-
8
....
STEP 2
CLOCK SELECT JU
CPU
MPER
TYPE
SETTING
386
CPU
JUMPER
386DX-33/ 486DLC-33 JCl JC2 JC
I
3
JC4
STEP 3 PLEASE REFER
486DLC,
2-3
1-2 1-2 CL CL
TO
THE
8038
7 POSITION.
86
3
DX-40/4
86DLC 2-3 2-3
1-
2
FIGURE FOR 386D
-40
X/
11
'"
-
f--
f--
-
EJ EJ
SI 0RESET
JP26
DSPK
122 JP27
c:::::J
KEYLOCK LED
f--
JPI5
:1
-
0
Ul
"'
~
~ 0 ~
JP31
I
f--oof--
JP2&
c:J
c:J
T/sw-
8
9
~-
Page 8
Chapter 2. Installation
Chapter 2. Installati on
B Type
CPU
OVERDRIVE:
STEP 1
CPU
4S6
STEP 2
SET
TYPE
MODE
SET
JP7
486DX
486SX
487DX
STEP 3
JUMPER ..
1-2 1-2 1-2
4S6
486DX2c50 486DX-25
...
.
486SX-25 OVERDRIVE-25
JCl JC2 JC3 JC4
Assemble 4S6DX,
4S6
MODE
JP25
CL
4S6DX,
JPS
OP OP OP
CPU
JP16
JP34
1-2
OP
4S6SX,
JPlO
JP9
1-2 OP
2-3 OP
1-2 2-3
CLOCK SELECT JUMPER SETTING
486DX2-66 486DX-33 486SX-33 OVERDRIVE-33
1-2 1-2
2-3
OP
4S6SX, 4S6DX2, 4S7
JP14
2-3
JP29
1-2
JP31
OP
4S7SX
JPll
1-2
2-3 1-2
CPU
JP12
TYPE
2-3 OP 1-2
JP37
OP OP OP
4S6DX-40
2-3 1-2 1-2 OP
2-3 2-3
1-2 OP
SX,
JP20
1-2
JP39
JP3S
2-3 2-3 2-3
OP OP OP
4S6DX-50
1-2 2-3 1-2 OP
11
~
·.
v
I•
STEP 4 Please refer
JP25
, JP16, JP34, JP14, JP29, JP31, JP20, JP15, JP7, JPS, JP9, JC2, JP3,
D
JPl
-
2
-
J
P4
D
JPlO,
JP4,
8042
-
-
JPl8
D
'--
'--
SI
0RESET
JP26
DSPK
c=::::::J
KEYLOCK
~
~
-
8
B
122 JP27
c=i
LED
JP
15
:1
JPJ
I
JP28
Do..
Tisw-
'--
-
0
"'
~
~
I
.__
::;
00
~
- -
-
"'
~
0
N
~
~
]
N~
NN
ooL--
~
a..
-
to
the
JPll
POSITION:
BIOS
2
I
JP36
D
JP29
]
L--
JP14
'.
I
J
Pl7
D~
0
"'
~
JP2 1
D -
~
D
JP24
L--
following figure
, JP12,
-
....._
~
~
s
zN
w"'
>
"'
'"
::".
~
00
x
Cl N
"'
8§
~
s
Le,
JP37, JP3S,
i::::::=:JJ 2 I 4
c::::JJ3
I
I
]___
-
JPl3
o:
'-- '--
JP
33
;o 495XLC
JP6
l=J
JP7
I J
-
~
"'
8
:::;
~
:0
!o'c
00
x
"'
8
:::;
~
s s
[,.,
"'
. /Coo
l
0 - o.
0:11
- -
-='
"'
I
00
p -
00
x
~ ~ ~
§
~~
00
s
JPJ
X J C4
::.c
- uu u
:m.=
1-
1-
2=
"'
8
:::;
s
~ ~
~
for
setting
JP39
D
C=:JC=:J
~
"' "'
...
:0
:0
:0
:0
0
z
"'
<
Ol
8K
/32K X8
5>
EJ
486DX/P2
I J
I 3
-JP
37
IJP
38
-N«"I
386D X/48
lit
D
, JCl,
00
"'
:0
:0
-
z
"'
<
"'
I JP4
4T
GDL
C
up
s
:0
00JP5
to
5
10
n
Page 9
Chapter
2.
Installation
Chapter 2. Installati on
C TYPE CPU ASSEMBLE M6, M7, P24T
STEP 1 SET P24T, M6,
MODE
P24T
M6/M7
JP25
JP16
CL
CL
1-2
1-2
M7
JP34
2-3
2-3
MODE
JP14
2-3
2-3
JP29
2-3
2-3
JP31
OP
OP
STEP 2 CPU TYPE SELECT JUMPER SETTING
P24T
M6
IM7
IXC
IM7
2XCLK
JP7
2-3 1-2
2-3
LK
2-3 2-3
2-3
JP8
2-3
2-3
JP9
1-2
OP 1-2 1-2
JPlO
JPll
1-2 1-2
2-3
1-2 1-2 1-2
1-2
1-2
JP12
2-3 OP 2-3 2-3
JP37
OP OP 1-2
2-3
STEP 3 CPU TYPE SELECT JUMPER SETTING
2-3 1-2 1-2 1-2
JC4
OP OP OP
OP
JCl
25M 33M
1-2 1-2
2-3
40M 2-3
SOM
l-2
JC2 JC3
lc2 2-3 2-3
JP20
1-2
1-2
JP38
2-3 1-2 1-2 1-2
JP39
OP CL CL CL
''
STEP 4 Please refer to the following figure for setting
6,
JP25, JPl
JP34, JP14, JP29, JP31, JP20,
JP8, JP9, JPlO,
JPll,
JP12, JP37, JP38, JP39,
JPl,~,
JC2, JC3, JC4 POSITION:
c::=:JJ2
JP!
D
-
>
JP4:
D
8042
JP18
BIOS
I?
-
JP36
-
-
0
1 4
CJJ3 1 3
0
JP29
:1
JP13
o:
To35
r-==l
L:J
Sl 0RESET
1n6
SPK
D
J22
KEY~
JP27'
ITo
JP15
JP14
:1
0
~
~
~ ~ ~
:i
Nr<""l
JP}
I
~~
1
DD
JP28
:;:;'.
!i?sw::;OO::;
~
:1
,,,,
0
3
~ 8 ~
I
z~
0
g;i
0::
~
~
~
w
00
JP21 § 8 §
1
4
~
g~~
0
00 00 00
~ ~ ~ ~
::i ::i
30
1 495XLC
JP6
:l'"i
~.1
N N
;a
~
O?
-
00
.
~i ~i
~
~
::i
5>
8K/32K
X8 I JP400JP5
..
_ I
""';;'11111
·~·-
CLI
[:~
.....
"""'~'-
~
- -l
486DX/P24T
up
,JP7
JCl,
to
12
13
Page 10
Chapter 2. Installati on
Chapter 2. Installation
4.INTERNAL THROUGH
W.B. W.T.
JP4
CL
OP
CACHE
(W.T
JPS
OP CL
5.J-402B/J-402BG STEP 1
VL-BUS
VL-BUS
<
33M
)
33M
0
ws
lWS
386 486
NOT:IF
YOU
PLEASE
HAVE
TRY
WRITE
.) SELECT
VL-BUS
SPEED
JP22
x x
OP CL
x
x
COMPARBILITY
JP13
SET
BACK
JUMPER
(W.B.) I WRITE
SETTING
JUMPER SETTING
&VL-BUS
JP23
OP CL
MODE
JUMPER SETTING
JP40
x x
x x x x x x x x
x
x
1-2
& JP32
OP CL
PROBLEM
SET
2-3
JP41
CL OP
IN VL-
BUS
STEP 2 Please refer
JP22,
m >
~---~
JP 4?
D
JP23
8042
JP18
0
r--
- -
!PIS
;o
µ\ µ\
r;; r;;
i.==-i
~
S l
0 RESET 0
l
~6
Os
rK
J22 JP27 JP28 -
K
EY~
JP
E?o
lfTs
~ .~
:o
31
~~
o..o..
ii
••
we';
~
o
e;
to
the following figure for
, JP40,
JP
JP41
I > BIOS
f---
14
-
To
30
30
I 49
JP6
c::::::Jl
I 4
JPl3
o:
5XLC
:o
JP I7
Fl
D~
z
w
~
0 0
0
set
ting
up
2
CJ
J3
I 3
5>
8K/32K XS I
~o~!D-
I
..
IP400JP
,
;:"Ill]
5
g;D-
o::e.O_
-
~0-
J
P3
2= JP38 = JP16=
JC4
CJ
I 3
-
N~
uuu
486DX/P2 4T
I 3
=
JP37
QJ
386DX
...11111
P38
/486DLC
00[
D
14
15
Page 11
Chapter 2. Installation
Chapter 2. Installation
J~402B/J402BG
JPl
•
•
•
•
:DISPLAY
JUMPER MEANING SETTING USAGE
JPl
JP22:
CONNECTOR
JP22 KEYLOCK & POWER LED
JP26 :
CONNECTOR USAGE PIN DESCRIPTION
JP26
JP28:TURBO
CONNECTOR USAGE
JP28 TURBO
DISPLAY TYPE PIN 1. 2
KEYLOCK & POWER
SPEAKER
3/486 VL-BUS MAIN BOARD .
ADAPTER
USAGE
CONNECTOR
SPEAKER
SW
CONNECTOR
SW
SETUP
OPEN SHORT COLOR
LED
MONOCHROME
CONNECTOR
PIN DESCRIPTION
LED power
1
not used
2
GROUND
3 4
ke
GROUND
5
data out
1
not used
2
GROUND
3 4 +
PI
N DESCRIPTION
GROUND
I
2 Select pin
yboard inhibiter
5V
, )
I',,
1
JPn:TURBO
•
CON
NECTOR USAGE
JP27
Sl
.
•
•
JP2 JP2
jNOTE: [ Must
•
RESET
CONNECTOR USAGE
'
Sl
EXTERNAL
JP2:
PIN
1-2
2-3
2-3
Normal
1-2 Clear CMOS
tern
KEYBOARD
J1
PI
N
1 2
3 space 4 GROUND
5
DESCRIPTION BATTERY DISCHARGE.
short
Operation
put
D
ESC
ke ke
+ 5V
LED
CONNECTOR
TU
RBO
LED
Reset
BATTERY
is
internal battery
Memory
on
2-3
location
CONNECTOR
RIPTION
yboard clock yboard data
de
CONNECTOR
(Default)
(206
just
PIN
DESCRIPTION
1
+ANODE
2 -CATHODE
PIN
DESCRIPTION
1 GROUND
2 Reset
3.
6V
Setup
can
in
by
used
of
Data)
operating
the
I
I
sys-
16
17
c
,
__
Page 12
Chapter
Chapt
er 3 AMI
AMI
BIOS System configuration Setup
BIOS Setup
3.
AM!
BIOS
Setup
This section wi
th
under
The SETUP program is contained than on a
To enter SETUP, pre
e AMI BIOS. After' booting the system and testing the memory.
AMIBIOS SETUP PROGRAM-AM AMI BIOS SETUP UTILITIES
(C)
ll tell
you how to set up the system configurations (CMOS)
in
the system's Read-Only-Memory Rather
di
skette.
ss
the "DEL" key. The following menu appears:
1992 American Megatrends Inc., All Rights Reserved
I STANDARD CMOS SETUP I
ADBANCED CMOS SETUP
ADVANCED CHIPSET SETUP
PEWER
AUTO CONFIGURATION WITII BIOS DEFAULTS
AUTO CONFIGURATION WITII POWER-ON DEFAULTS
WRITE TO CMOS AND EXIT
DO
NOT WRITE TO CMOS AND EXIT
MANAGEMENT
CHANGE
HARD DISK UTILITY
PASSWORD
SETUP
I Standard CMOS Setup for changing Time, Date, Hard Disk Type, etc. j
ESC:EXIT
~
---->
i :Se!
F2/F3:Color
FlO:Save
& Exit
"S
Please enter The following pages show simple charts and
TANDARD
C-MOS
SETUP" to enter the next screen.
18
in
structions for the CMOS setup.
Page 13
Chapter
3.
AMI
BIOS
Setup
Chapter
3.
AMI
BIOS
Setup
AMIBIOS
(C) 1
If
System
Hangs,
Hit "ESC" to Hit "ESC" to
A
MIBIOS
mm/da
Da te ( T ime ( h
Ha
rd disk C: type : Hard Floppy dr Fl
oppy dri Prim K
eyboa
Month Jan. Da te Ye
ar . 1901. 1902
ESC
te/
our/min/sec) : 19:35:25
disk D:ty
pc
ive A:
ve
B:
ary display : Monochro
rd : Installed
Fe
:0
1 02 0 L
: Exit J,_, I : Se lee r
SETUP
992 American M
Imp
Reboo t Syst
Do an y
(i) Alter (
ii
(iii) Load P
(C ) 19
yea
r) :I W
b ........... D
.....
PROGR
roper Use
of
the following Aft er Entering Setup
AM-WA
ega
trends Inc , A
of
Setup may Ca use Problems
em
and Enter Setup by Pressing the (
Option
s to mak e Sys tem Work
) Load BIOS Setup Defa ults
owe
r-on Defaults
Stop
now, An y other Key to Continue
Stop
now, Any ot her Key to Continue
SET
UP P R
92
ed,
37 Not Install
1.2 MB
:
NOi
.....
2099
OGRAM
Amer
ica
n Megatre nds Inc., All Rights Reserv
Jul
01
1
992\
ed
, S 1
/4"
Installed
me
ec 3 1
Co
F2/ F3:
lor
RNING !
ll
Rights Reserved
- ST ANDAR D COM
B F.xt. memory s
Head
Cyln 6
15
8
~!Mon
~
':
i
I_
t I:; i 14
l
'J i 20
l
~+-:;-:
~-
l o I 1 ' •
- t • •
PD M"dil)
PU/
NFORMAT
11
OS SET U P
ed
ase memory
WPcom LZonc
12
8
'i
--· • ..L
size
6 15 17 4 1
Tu
e W
ed Thu
I
8 9
~
15
21
22
"X
29
-
')
.+
i
I
IO
DEL
640
:
ize . 3072
Sect Size
Fr i
2
10
16 17
24
23
3 1
30
6
I
I
3
7
) key
KB
KB
MB Sa
I
I
25
4
11
18
x
AMIBIOS
I
1
If System
I
I
I
SETUP
PROGRAM-AM
(C) 1992 America n
STANDARD
I
ADV
ADVANCED
PEWER
AUTO
AUTO
CONFIGURATION
CONFIGURATION
WRITE
DO
NOT
Advanced
ESC:EXIT
AMIBIOS
(C) 1992
Hang
CMOS
t
--->
SETUP
American Megatrends Inc., All Rights R
Improp
er
s, Reboot Syst
Do
any
of (i) Alter (ii) Load (iii ) Load P
SC"
Hit "E
to
AMI
BIOS
SETUP
UTILITIES
Megatrends Inc., All Rights Reserved
AN
CED
CHIPSET
MANAGEMENT
WITH
CHANGE
HARD
i :Sel
TO
WRITE
Setup
DISK
CMOS
TO
for
F2/F3:Color
CMOS
CMOS
PASSWORD
WITH
POWER-ON
UTILITY
AND
CMOS
configur
SETUP
SETUP
I
SETUP
SETUP
BIOS
DEFAULTS
DEFAULTS
EXIT
AND
EXIT
ing
System
FlO:Save & Exit
Options
PROGRAM-WARNING I FORMATIO
ese
rve d
Setup
Work
Continue
1
!
Use
the fol l
Option BIOS
Stop
of
Setup may
em
and Enter
owing
s to make
Setup Defaults
ower-o
n Defaults
now, Any
Cause
Setup
After
other
Probl ems
by Press ing the (DEL) key
Entering
System
Key to
I
19
.
20
Page 14
Chapter
3. AMI
BIOS
Setup
Chapter
3.
AMI
BIOS
Setu
p
-
AMIBIOS
(C)
Typenlatic Ty pe
Typematic Rate {Char;;/Sec) :30 Above 1
Memory T Memory P
Hit {DEL) Message Display Ha rd Di sk Wait For (F System B
Weitek Processor
Floppy Dri
System Boot Up Sequence
System Boot
Externa
l
Turbo Switch Function Password
matic Rate
l Cache Memory
nt..erna
l Cache
Rate Programming
MB
Memory
est
arity
TJpe l)
oot Up
ve
Up CPU
Checking Option
SETUP
1993
American
Del
ay
(m;;ec) :500
Test
Tick S
ound
Error Check
4 7
RA.M
If
Seek
Ar
Any Error :
Num Lock
At
Boot
Speed :High
:Memory
(Ctrl)
F5:0ld
Values F6:
AMIBIOS
(C) 1992
SETUP
Americ
PROGRAM-ADVANCED
:D
:Disabled Adaptor :
Enabl
:
Enabled
:Enabled
ea
:0:300
Enabled :On :Absent
:Enabled :A
:Enab :Enabled :Enab :Setup
Pu-Pd:M
BIOS Setup
PROGRAM-AMI
an
STANDARD
ADV
AN
I
ADV
AN
PEWER
AUTO
AUTO
CONFIGURATION
CONFIGURATION
CHANGE
HARD
WRITE
DO
NOT
WRITE
Advanced
I
Chipset
ESC:EXIT
Setup
1
-4
1'
:Sel F2!F3:Color
M
ega
trends
isabled
ed
:,C: Syntem ROM Shadow F000,64K
led IDE Block Mode Transfer
led
odify
Meg
atrends Inc., All Ri ghts Re served
Inc.,All R
Video Video
Adaptor ROM
Adapt
or
Adapt
or ROM
Adaptor Adaptor ROM Adaptor Adaptor Adaptor ROM Adaptor ROM Shadow EC00,16K
Boot.Sedo r Virus Protection Disabled
IDE
Stan
Aut
o Key - Lock
Fl:Help Defaults
BIOS
ights Reserved
ROM Shadow
ROM Shadow C400 , 16K
RO~
!
RO~!
ROM Shadow D800,16K Disabled
ROM Shadow E000,16K Disabled ROM Shadow
dby mode Disabled
F2/F
3:C
F7:P
ower
COOO,
Shadow C800, 16K Disabled Shad
ow
CC00,16K Disabled
Shadow D
OOO
Shadow
D400, !6K Disabled
Shadow
DCOO, !6
E400
Shad
ow
E800
T
imt::o~t
olo
r
-On De
SETUP UTILITIES
CMOS SETUP
CMOS
CED
CMOS
CED
CHIPSET
MANAGEMENT
WITH
WITH
POWER-O
SETUP
SET
SETUP
BIOS D
UP I
EFAULTS
N DEFAULTS
PASSWORD
DISK UTILITY
TO
CMOS
for Contiquare and
TO
AND
CMOS
EXIT
AND
EXIT
Chipse
FlO:Save
t Registering
& Exit
SETUP
16K
Enab Enabled
, 16K Disabled
K Disabled
,16K Disabled ,16K Disabled
Disab Enabled
Disabled
Disabled
faults
led
led
If
System
AM!BIOS
(C) J 992 American M
Hangs, Reboot Sy stem and Enter
SET P PROGRAM-WAR
ega
trends Inc., A
NING IN
ll Rights Rese rved
Improper Use of Setup may Casuse Probl
Setup
by Pressing the (
Do any
of the follo wing Afte r Ent ering Setup
(i) Alte r Options to make System
Work
FORMATION
ems'!
DEL
) key
(ii) Load BJOS Setup Defaults (iii ) Load Po
Hit "ESC" to Sto p now, An y other Key to C
The Setup For Operation 486DX-50
AMIBJOS
Auto Hidden Single Keyboard Reset AT
BUS
Fast Decode Enable
Memory Read Wait
Memory Wr Cache Cache Write
Non
-Cacheable Block
No
n-Cach Non-Cach Non-Cach Cacheable Video
Internal
I
SETIJP
(C) 1992 American
Config
Function
Refresh
ALE
Enable
Control
Cloe·
Selection
ite
Wait
Read Cycle
Wait
eable Bloc eable
Block-2 Size
eab
le Block-2 Base
RAM
Address
BIOS
Area
Cacheable
Cache Write
F
(C
5:0
ld Values F6:BlOS S
we
r-on Defaults
MHz
PROGRAM -ADVANCED CHIPSET SET
Mega tren ds lnc.,All Rig
State
State
State
-! Size
k-! Base
Range
Policy
tr!)
Pu-Pd
: Modify F l: Help F2/F3:Color
etup Defaults
:Enable :Enable :NO :Disable :CLKl
16 :Disable :1
WI S
:1
WIS :3-2-2-2 :2
W I S
:Disabled
:0
KB
:Disabl
ed
:0
KB
:16
MB
:
Yes
:Wr·
Th
ru
F7:Power-On Defaults
ont
inue
CPU System
hts
UP
Reserved
21
22
Page 15
The
Setup
The
Setup
System
Chapter
For
Operation
AMIBIOS
Auto Hidden Refresh Single Keyboard AT
BUS Fast Decode Enable Memory Memory Write Wail State
Cache Cache Write Wait Stale
on-C
Non
-Ca Non-Cacheable Non-Cacheable Cacheable Video Intern
For
AMIBIOS
Auto Hidden Refresh
Single
Keyboard
AT
BUS Fast Decode Enable Memory Memory Write Wait State
Cache Cache Write Wait State
Non
-Cacheable on-Cacheable on-Cacheable on-Cacheable
Cacheable Video
Internal Cache Write
F5
SETIJP
(
C)
1992
Config Function
ALE
Read
acheable
cheable
BIOS
al
F5:0ld Values
American Megatrends lnc.,All Rights Reserved
Enable
Reset
Control
Clock Selection
Read
Wait State
Cycle
Block-! Block-1 Block-2 Block-2
RAM
Address Range
Area
Cac
Cache Write Policy
(Ct
r!
F6:BIOS
Operation
SETIJP
(C)
1992
Config Function
ALE
Read
BIOS
American
Enable
Reset Control
Clock Selection
Read
Wait
State
Cycle
Block-! Blo
ck-! Block-2 Block-2
RAM
Address Range
Area Cacheable
(Ctr!)
Old
Values
F6:BIOS
heable
) Pu-
Pu-
3. AMI BI
486DX·40 MHz
PROGRAM
Size
Base
Size
Base
Pd:Modify
Setup Defaults F7:Power
OS
-ADVANCED
:Enable :Enable :NO :Disable :Cl.Kl/5 :Disable :1
WIS
:1
W I S
:3-2-2-2 :2
WIS
:Disabled
:0
KB
:Disabled
:0
KB :16 :Yes :Wr
Fl:H
elp
F2/F3:Col
Se tup
System
CHIPSE'I' SETUP
MB
-Thru or
-On
Defau
486DX/SX-33, 486DX2-66
PROGRAM
Size
Base
Size
Base
Policy
-ADVANCED
Mega
trends
In
Pd:Modify Fl:Help
Setup Defaults
CHIPSE'I' SETUP
c.,All
Righis Reserved
:Enable :Enable :NO
le
:Disab :CLKl
14 :Disable :1
WI S
:1 WIS
:3-2-2-2 :2
WI S
:Disabled
:0
KB
:Disabled
:0
KB
:16
MB
:
Yes
:Wr-Thru
F2/F
3:Co!or
F7
Power-
On
Defaults
The
Setup
For
Operation
Chapte
r 3. AMI BI
486DX/SX
OS
Setup
-25, 486DX2-50
MHz
System
AMIBIOS
Auto Hidden Refresh Single A
Keyboard
AT
BUS Clo Fast Memory Memory Write Wait State
Cache Cache Write
Non-Cacheable Non-Cacheable Block·! Non-Cacheable Non-Cacheable
Cac
heable
Video BI
setup
Internal
For
lts
MHz
.
The
SETUP
(C)
1992
Config Function
LE
Enable
Reset
ck Selection
Decode Enable
Read
Read
Cycle
Wait
RAM Address Range
OS
Area Cacheable
Cac
he Write Policy
F5:0ld Values F6:BIOS Setup Defaults F
PROGRAM
American Megatrends lnc.,
Control
Wait State
State
Block-1
Size
Base
Block
-2 Size
Block-2
Base
(Ctr!)
Pu-P
Operation
-ADVANCED
d: Modify
Fl: Help F2/F3:Color
386DX-40/Cyrix
CHIPSE'I' SE'l'UP
All
Rights Reserved
:Enable :Enable :
NO :Disable :CLKl/3 :Disable :1
WIS
:! WIS
:3-
1-1-1
:2
W I S
:Disabled
:0
KB
:Disabled
:0
KB
MB
:16 :
Yes
:Wr-Th
ru
7:
Power
-On
Defaults
486DLC-40MHZ
system
AM!BIOS
Auto Hidden Refresh Single Keyboard AT
BUS Fast Memory Memory Write Wait State
Cac
he
Cache Write No
n-Ca
No
n·Cacheable Non-Cacheable Non-Cac Cacheab Video
Internal
SETIJP PROGRAM
(C) 1992
Config Function :D
ALE
Decode Enable
Read
BIOS
F5:0ld Values
American Megatrends lnc.,All
Enable
Reset
Control
Clock Selection
Read
Wait State
Cycle
Wait
cheable Block·l
State
Block-1 Block-2
heable
Block-2
le
RAM
Address Range
Area Cacheable
Cac
he
Writ
(Ctr!) Pu-P
Size Base Size Base
e Policy
F6:BIOS Setup Defaults F7:Power-On Defaults
-ADVAJ
d:Modify F !:
Help F2/F3:Color
CED
CHIPSE'I' SE'l'UP
Rights Reserved
isable
:Enable
:NO :Disable :Cl.Kl/S :Disable :1
W I S
:1
W I S
:2-l-1-1
IW/S
: :Disabled
:0
KB
:Disabled
:0
KB
MB
:16 :Yes :Wr-Thru
23
24
Page 16
Chapt
er 3.
AMI
BIOS
Setup
Chapte
r 3. AMI
BIOS
Setup
The setup For Operati
system
A.MIBI
OS
SETUP
(C)
1992
Auto
Hi
ing
S
Keybo
AT BUS
Fast
Memory
Memory Cache C
ache Non-Cacheab Non-Cacheable Bloc Non-Cacheab Non­Cacheable Video Internal
AMIBIOS
(C)
1992
AUTO
AUTO
Advanced CMOS
Config
dden
le A
ard
Decode
Read Cycle Write
Cache
BIOS
FS
SETUP
CONFIGURATION
American
Functi
Refresh
LE
Enable
Reset C
ontrol
Clock Selection
Enable
Read
Wait Stat
Write Wait S
Wait State
le Block-1 Size
le Block-2 S
able
Block-2 Base
RAM
Address
Area
Cac
Cache
Write
(Ctr!) Pu-
:Old
Values F6:B
PROGRAM-AM
American Mega
STANDARD
ADV
ADV
I
PEWER
CONFIGURATION
C
HARD
WRITE
DO
NOT WRI
on
386DX-33, Cyrix 486DLC-33MHz
PROGRAM
on
e
tate
k- i Base
ize
Range
heabl
Policy
IOS
AN
AN
MANAGEMENT
HANGE
Setup for configu ring
-AD
Megatrends
e
Pd:Modify Fl:H
Setup
Defaults F7:Power-On
trends Inc
CMOS
CED
CMOS
CED
CHIPSET SET
WITH
WITH
PASSWORD
DISK
TO
CMOS
TE
TO
CMOS
VANCED CHIPSET
lnc.,All
Rights
Reserv
:Enab
le
:
Enab
le
0
:Disable :C
LKl
/ 4
Disable
:
:1
WI S
:1 WIS
:
3-1
-1-1
:JW/S
:Disabled :0
KB
:Disab
led
:0
KB
:16
MB :Yes :Wr-Thru
elp
F2/F3
:Color
AMI
BIOS SETUP UT
.,
All Rights R
SETUP
SETUP
UP
SETOP
BIOS
DEFAULTS
POWER-ON
UTILITY
AND
EXIT
AND
EXIT
System
SETUP
ed
Defau
lts
I
DEFAULTS
Opti ons
ese
ILITIES
rved
AMIBIOS
Device-! Timeout Device-2 Timeout :Disabled ( Power off Device Timeout.) Device Device-4 T
Device-5 T
NOTE
:
1.
In J-402BG with
You ca
.n set Device
2.
In J-402D the p
3.The Green Function
Alternative
SOFfW
FOR
AMI
After
booting the system. Press "
se
lect
low
hi
gh- speed.
se
revi
Plea
CPU
SPEED
N
ORMAL
SETUP
(C) 1993 American
:Di
-3
Timeout :Disabled
imeout
:Disabled
im
eout
:Disabled
(
Ctr]) Pu-Pd:Modify
F5:0ld
Values
F6:BIOS Setup Defaults F7:P
MIGAKEY
1 timeo
Devi
ce
2 timeou t From 1
owe
r managemet doesn't funct ion.
only
System
ARE
SWITCH
BIOS:
-s p
eed
, Press "
ew
the follow
PROGRAM
-POWER
Megatrends
MANAGEMENT
Inc.,All Rights
sabled ( Keyboard/ Mouse Timeout.)
Fl:Help
F2/F
3:Colo ower-O
Keyboa
rd
ut
active
Bios the power managemen t Function
From 1
Min
to 255
Min,
Min
to
in
4ll6
mode & Please set JP42,
255
to slow
Min, to
speed
:
CTRL
" + "
ALT"+
CTR
L" + "ALT" + " +" at th e same
ing configuratio
KE
YBOARD
"C
TRL
" +
"ALT"
n:
+ "+"
CPU SPEED
TRL
" + "
TURBO
"C
ALT"+"-
"
Reserved
r
n De
down CPU
power
JPl8
SETU
fau
off
close.
"-"
CPU TU
CPU
OR
P
lts
speed.
MONITOR
at the
time
SPEED
RBO
SPEED
MAL
is
.
same
ENABLE
.
time to
to select
ESC:E
XIT
J
-:-
• i :Se!
F2/F3:Co
25
lor F l O:Save & Exit
26
Page 17
SHADOW
For
efficient BIOS Th
e OPTI-495XLC enabled allows BlOS BIOS E s
hadow
pe
rforman improv benc
hmark
fe
ature is
RAM
execution
code
through
provides the shadow
the
BIOS
EPROM. The
PROMs to the ystem RAM fea
ce
eme
nts
of
as
tests
tur
BIOS-ca ll
high
on
invoked
ROM enab le regist er
Chapter
RAM
3.
of
BIOS, it is prefe
rath
er
code
sof
twar
e s
e.
This feature
int
ensive
as
300
the
shad
by
enabling the
and the RAM
/\MI
BIOS
than
to be
executed from
hould
tran
RA
sig appl
to
400
ow
RAM. The
corresponding
mapping
Setup
r able to
through
RAM
slow
er
feature
addre
sfer
code
sto
1,
befo
re
enabling
nificantly improv
icati ons. Pe
% have
bee
n observed in
shadow
registe
r.
execute
EPROM s.
which
s like
red
in
the
es
rform
ance
RAM
bit
s in
if
the
the
the
•
FIGURE
THA
4MB
3MB
2MB
1MB
640KB
OKS
I RAM
I MB
SYSTEM
OF
Chapter
RAM)
3. AMI
MAPPING
->
+-
->
+-
->
+-
->
+-
BIOS
WITH
MAPPING RAM
RAM
RAM
/ I
/SHADOW
RAM
Setup
SHADOW
ROM
RAM
RAM
ADDRESS 3FFFFf:FH
300000H
2FFFFFH
200000H 1FFFFFH
~
100000H OFFFFFH
I
010000H 09FFFFH OOOOOOH
(MORE
When the RAM is
Shadow
mapped
as
shown
RAM fe
ing the EPROM area. In 1 M
byte addr
prote
cted
•
FIGURE
THA 1 MB
ess
rang
e, the
mode from
BIOS.
l RAM MAPPI G WITH SHADOW RAM (
OF
RAM )
ature is
in
Figur
e l , overlapping
both
cases, for accesses
processo
r is
27
being
switched
utili
zed,
th en
the
or
Shadow-
beyond
the
from real to
MORE
28
Page 18
APPENDIX
Appendix
NOTICE : PLEASE REMEMBER YO R PASSWORD
SETTED PASSWORD
CHARACTERS'
TH
E SYSTEM
IF
CAN'T
KEY IN
BOOT 0
ERROR
A Y MORE!!
AMI
Bl
OS
SETUP
•
(1)
PLEASE
IS
(2)
IF
KEY IN
(C) 1992
AUTO
AUTO
CONFIGURATION
PROGRAM-AMI
American
STANDARD
ADVANCED
ADVANCED
CONFIGURATION WITH BIOS
I C
WRI
DO
NOT
[Change
ESC:
"AMI" (FIRST
YOU HAVE
EXIT
KEY IN
YOUR
the User
-1-
-+t:
Megatrends Inc., A ll
HANGE
HARD
DISK
TE
TO CMOS
WRITE
Pass
F2/F3:
Sel
DEFAULT
TIME)
SET
PASSWORD ......... .
CMOS CMOS
CH IPSET
WITH
POWER-ON
PASSWO
UTILITY
AND
TO
CMOS
word
Stored
Color
OWN
BIOS
SETUP
UTILI
Rights
Reserved
SETUP SETUP
SETUP
DEFAULTS
DEFAUL
RD
l
EXIT
AND EXIT
in
the CMOS \
F10
: Save &
PASSWORD DE
PASSWORD
TIE
S
TS
Exit
FAULT
ALREADY,
OF
AMI
(C)
BIOS
SETUP
1992
American
I En ter
USE
Maximum 6 ASCI
PROGRAM-CHANGE
Megatrends Inc
CURR
ENT
.,
Password:
I Characters, ESC :
29
All
Rights
AMI
PASSWORD
Reserved
I
Exit
Page 19
Appendix
Append
ix
• IF
• N
TO
EXT
YOU
NEXT
AMIBIOS
(
C)
AMI BIOS SET
(C) 1992
SCREEN
WA
'T
TO
SETUP'
SETUP
1992 American
Enter NEW Password :
J
Maximum 6 ASC
USE
UP
American
I
Re-Enter
USE Maxi
mum 6 ASCII
OF
CHA,
PROGRAM-CHANGE
Mega
PROGRAM-CHANGE
Megatrends Inc.,
MEANING
ED PASSWORD SETTINGS! FINAL!
AMIBIOS SETUP
(C) 1992
American
PROGRAM-CHANGE
Megatrends Inc
EW
Password Insta
JN
GE
tre
nds
Inc
.,
All Rights
II Characters, E
All
N EW Password:
Characters,
rs
PRESS
.,
All
lled:
EW PASSWORD GO
PASSWORD
Reserved
SC
· Ex it
PASSWORD
Righ
ts
Reserved
I
ESC. Exit
YOU
HA
VE
FINISH-
"EN
TER" TO
PASSWORD
Righ
ts Reserved
J
Hard Hard Ha
I Hard
Main
AM
(C)
AU
I
Format
ESC :
AMIBIOS
(C)
Disk
C:
Disk
D: Type
Disk Type Menu
I BI
OS
SETUP
1992
American Mega
AUTO
CONFIGURATION
TO
CONFIGURATION
DO NOT WR I
the
Hard
Disk,
EX
IT
.j,
SETUP
1992
American
T ype
: 33
Not
can
be
changed
PROGRAM-A
STANDARD ADVANCED CMOS
ADVANCED
I H
WRITE
--+
t:
Installed
trends Inc.,
CMOS
CHIPSET SETUP
C
Auto
WITH
HA
NGE PASSWORD
ARD DISK UTILITY!
TO
CMOS
TE
TO
inte
rlea
Se
l
F2
/ F3 :
PROGRAM-HARD
Megatrends Inc.,
Cyln 1024
from
the
I Hard D isk
Auto
Interleave
Media
Analysis
MI
BIOS SETUP
All Rights
SETUP SETUP
WITH BIOS DEFAULTS
POWER-ON DEFAULTS
AND EXIT
CMOS
AND
ve
Detection
Color
All
Head
WPcom LZone Sect Si 1023
5
STANDARD
Forma
t I
EXIT
and
F10
: Save &
DISK
UTILITY
Rig
hts Reserved
1024
CMOS
UTILITI
Reserved
Media
SETUP
ES
Analysis
Exit
17
ze(MB)
43
opt
ion
I
in I
USE
Maximum 6 ASCII
Characters, ESC : E
30
xit
ESC:
EXIT
.j,--+ t :
Sel
F2
/F3:
31
Color
F10:
Save & E
xit
Page 20
Hard Hard
(C)
Disk C: T Disk D:
AM
Type
I BI
1992
ype
OS
Americ
:
33
Not In
Appendix
SETUP
PROGRAM-HARD DISK
an Megatrends I
Cy
ln
1024
stalled
nc.,
Head
5
All
Rights
WPcom 1024
UTILITY
Reserved
LZ
one
1
024
Sect
Size(MB)
17 43
I J-
402
B 3/486 VL-BUS
( f K REFER
.I
UM
PER
.JP
21 OPEN
JP24
,-
JP6 2-3 1-2
.JPl 7
ENCE
64K
OPEN
2-3
:
CACHE
Appendix
MAIN
BOARD JUMPER SETTING
RAM
128K 256K
CLOSE
OPEN
1-2
CLOSE CLOSE
2-3 2-3
Ha
rd
Disk
Disk Drive (C/ D ) D isk Drive T I
nte
rleave (
Mar
k Bad Tracks
Proceed
1-16
I Y
/N)
ESC :
ype
EXIT
For
)
(Y/N)
mat
7C 733 ?1 7N ?Y
.J,-+t:
386DX-33
PER
4 5 7 S
1'
9
I I
12 14
16 20 22 23 25
29 31
38
0
41
SETUP
OIOS
defualt first (
chonge
the
Confi g Fane
k Selection
Read W
ry
Write
486DLC-
2-3 1-2 1-2
CLOSE
OPEN
CLOS
1-2
x x x x x
1-2
2-3
OPEN
CLOSE
OP
E
OPEN
1-2
CLOSE
x
OPEN
CLOSE
following
tion
ait
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Wait
JlfM
JCI
J 2 JC3 J 4 .11' .11' .11'
Se
l
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/F3 :
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F 1 0: Save &
Exit
JP
J
JPIO
.IP
JP JP
JP JP JP )1' JP JP JP
JP37 x
JP
Jl'39 x x
JP4
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1.ond '!'lien
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Mem
ory
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Coe lie Read Cycle
'nclie Weite Cycle
33
E O
AUTO
State
386DX-40
486DLC-40
2-3 2-3 1-
CLOSE
OPEN
PEN
1-2
x
1-2
2-3
OPEN
LO
C CLOSE
OPEN
1-2
CLOSE
x x
OPEN
CLOSE
CONFIGU
seffings
Enable
CLKI/4
3-
486DX2-50
486DX-25 486DX-33 486SX-25 486SX-
2
x x
l-2(SX:OP)
x
2-3(
x l-2(
2-3(SX:OP)
SE
RATION
in
CMOS
CLKI/5
1-1-1
2-1-1-1
1
-2 1-2 2-3
OPEN OPEN
CLOSE CLOSE CLOSE
1-2
OPEN
SX:OP) SX:2-3
2-3 2-3
1-2 1-2 1-2
OPEN OPEN
CLOSE
1-2 1-2 OPEN OPEN
2-3 OPEN
CLOSE
OPEN
Disable
I
DX
486
2-3 2-3
1-2
1-2 1-2 OPEN OPEN OPEN
1-2
OPEN OPEN
(SX:OP)
l-2
2-3(
SX:OP
) l-2(
SX:2
2-3(SX:OP
1­OPEN OPEN
CLOSE
OPEN OPEN
2-3
OPEN
CLOSE
OPEN
WITH
BIO
Enable
CLKI/3
3-1-1-1
2
2-66
33
486DX-40
OPEN
) 2-3
-3) )
2
S DEf'AULT)
CLOSE CLOSE
CLOSE
OPEN OPEN OPEN
OPEN
CLOSE
OPEN
Enable Enable CLKI/4
l
3-2-2-2
2
2-3
1-2
1-
1-2 2-3 2-3 1-2 1-2
1-2
2-3
2
CL
3-2-2
486DX-50
1-2 2-3
1-2 OPEN OPEN
CLOSE
1-2 OPEN
-2
1
2-3 1-2 2-3 2-3 1-
1­CLOSE CLOSE
CLOSE
1
-2
OP
EN
2-3
OPEN
CLOSE
OPEN
Enable
KI/5
CLKI/6
-2
3-2-2-2
2 2
2 2
l
32 33
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