"SecureJet Intelligent Appliance 8.1 - COMPANY CONFIDENTIAL"
Ref. SIA8.1_SRM Rev. B 1.0.0
TABLE OF CONTENTS
1 Introduction.............................................................................................................................................................. 4
2 Change History........................................................................................................................................................ 5
2.1 Document Change History ........................................................................................5
2.2 Board Changes.........................................................................................................5
2.2.1 Rev A 1.0.2.................................................................................................................................... 5
2.2.2 Rev B 1.0.0.................................................................................................................................... 5
3 SecureJet Intelligent Appliance 8.1 Overview.......................................................................................................... 6
3.1 SecureJet Intelligent Appliance 8.1 Features and Specification........................................6
3.2 Board Component Locations ......................................................................................7
4 SecureJet Intelligent Appliance 8.1 BOARD High Level Specification....................................................................9
4.1 Processor ................................................................................................................9
4.2 Memory ..................................................................................................................9
4.2.1 256MB DDR3L .............................................................................................................................. 9
4.2.2 2GB Embedded MMC ................................................................................................................... 9
4.2.3 MicroSD Connector ...................................................................................................................... 9
4.2.4 Boot Modes ................................................................................................................................... 9
4.3 Power Management ................................................................................................10
4.4 Serial Debug Port ...................................................................................................10
4.5 USB1 Host Port ......................................................................................................10
4.6 Power Sources .......................................................................................................10
4.7 Reset Button .........................................................................................................10
4.8 Power Button .........................................................................................................10
5 Detailed Hardware Design..................................................................................................................................... 12
5.1 Power Section ........................................................................................................12
5.1.1 TPS65217C PMIC ...................................................................................................................... 12
5.1.2 DC POWER................................................................................................................................. 13
5.1.3 Power Button .............................................................................................................................. 13
5.1.4 Power Consumption ................................................................................................................... 13
5.1.5 Processor Interfaces ................................................................................................................... 14
5.1.5.1 I2C0 ............................................................................................................................... 14
5.1.5.2 PMC_POWR_EN ........................................................................................................... 14
5.1.5.3 LDO_GOOD .................................................................................................................. 14
5.1.5.4 PMIC_PGOOD .............................................................................................................. 14
5.1.5.5 WAKEUP ....................................................................................................................... 14
5.1.5.6 PMIC_INT ...................................................................................................................... 14
5.1.6 Power Rails ................................................................................................................................. 15
5.1.6.1 VRTC Rail ...................................................................................................................... 15
5.1.6.2 VDD_3V3A Rail ............................................................................................................. 15
5.1.6.3 VDD_3V3B Rail ............................................................................................................. 15
5.1.6.4 VDD_1V8 Rail ................................................................................................................ 16
5.1.6.5 VDD_CORE Rail ............................................................................................................ 16
5.1.6.6 VDD_MPU Rail .............................................................................................................. 16
5.1.6.7 VDDS_DDR Rail ............................................................................................................ 16
5.1.6.8 Power Sequencing.......................................................................................................... 16
5.1.7 TPS65217C Power Up Process ................................................................................................. 17
5.1.8 Processor Control Interface ........................................................................................................ 18
5.1.9 Low Power Mode Support ........................................................................................................... 18
5.1.9.1 RTC Only ....................................................................................................................... 18
5.1.9.2 RTC Plus DDR ............................................................................................................... 18
5.1.9.3 Voltage Scaling .............................................................................................................. 18
5.2 Sitara XAM3352BZCZ Processor ...............................................................................19
5.2.1 Description .................................................................................................................................. 19
5.3 DDR3L Memory ......................................................................................................20
5.3.1 Memory Device ........................................................................................................................... 20
5.3.2 DDR3L Memory Design .............................................................................................................. 20
5.3.3 Power Rails ................................................................................................................................. 21
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