JDI TX54D14VC0CAA Specification

Page 1
TECHNICAL DATA
仕様書パターン2 CAS表紙
Date : July. 27, 2012
Product Name
(NOTES)
1. This document may, wholly or partially, be subject to change without notice.
2. All rights are reserved ; No one is permitted to reproduce, duplicate or distribute in any form, the whole or part of this document without Japan Display's prior written consent.
3. No one is permitted to explain nor disclose the contents of this document to third parties without Japan Display's prior written consent.
4. Japan Display will not be held responsible for any damage to the user that may result from accidents or any other reasons during operation of the user's unit according to this document, any previous reports or oral discussions.
5. Circuitry and other examples described herein are meant merely to indicate the characteristics and performance of Japan Display's products. Japan Display assumes no responsibility for any intellectual property claims or other problems that may result from applications based on the examples described herein.
6. No license is granted by implication or otherwise under any patents or other rights of any third party or Japan Display Inc.
7. LIFE SUPPORT APPLICATIONS use in LIFE SUPPORT SYSTEMS.
: The product covered by this document is not authorized for
TX54D14VC0CAA
Page 2
No. Item Sheet No. Page
—
COVER
DPBC
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10000266-1 1-1/1 — RECORD OF REVISION DPBC10000266-1 2-1/1 — APPLICATION DPBC10000266-1 3-1/1 — DESCRIPTION DPBC10000266-1 4-1/1
1 ABSOLUTE MAXIMUM RATINGS DPBC10000266-1 5-1/1 2 OPTICAL CHARACTERISTICS DPBC10000266-1 6-1/2 - 6-2/2 3 ELECTRICAL CHARACTERISTICS DPBC10000266-1 7-1/2 - 7-2/2 4 BLOCK DIAGRAM DPBC10000266-1 8-1/1 5 INTERFACE PIN ASSIGNMENT DPBC10000266-1 9-1/6 - 9-6/6 6 INTERFACE TIMING DPBC10000266-1 10-1/3 - 10-3/3 7 DIMENSIONAL OUTLINE DPBC10000266-1 11-1/2 - 11-2/2 8 DESIGNATION OF LOT MARK DPBC10000266-1 12-1/1 9 COSMETIC SPECIFICATIONS DPBC10000266-1 13-1/3 - 13-3/3
10 PRECAUTION DPBC10000266-1 14-1/3 - 14-3/3
Japan Display Inc. Date July. 27, 2012 DPBC10000266-1 Page
.
No.
1-1/1
Page 3
RECORD OF REVISION
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The upper section : Before revision The lower section : After revision
Sheet No. Page
SummaryDate
Date PageJapan Display Inc. July. 27, 2012 DPBC10000266-1
.
No.
2-1/1
Page 4
APPLICATION
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In the case of applying this product for such as control and safety device of transportation facilities (airplane, train, automobile, ship, etc), equipments aiming for rescue and security, and the other safety related devices which should secure higher reliability and safety, please make it sure that proper countermeasure such as fail-safe functions and enough system design for the protection are mandatory.
Please do not apply this product for equipments or devices which need exceedingly high reliability, such as aerospace applications, telecommunication facilities (trunk lines), nuclear related equipments or plants, and critical life support devices or applications. Usage style of this product is limited to Landscape mode. Optical characteristics mentioned in this spec. sheet is applied for only initial stage after delivery, and the characteristics will be changed by long time usage. Reliability of this product is secured as normal office use.
Date PageJapan Display Inc. July. 27, 2012 DPBC10000266-1
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No.
3-1/1
Page 5
DESCRIPTION
N
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The following specifications are applied to the following IPS-Pro module.
Note :The LED driver for the backlight unit is built in this module.
Product Name : TX54D14VC0CAA
GENERAL SPECIFICATIONS
Effective Display Area : (H) 432.0 × (V) 324.0 (mm)
Number of Pixels : (H) 1,600 × (V) 1,200 (pixels)
Pixel Pitch : (H) 0.270 × (V) 0.270 (mm)
Color Pixel Arrangement : R + G + B Vertical Stripe
Display Mode : Transmissive Mode
ormally Black Mode
IPS-Pro
Top Polarizer Type :
Number of Colors :
Viewing Angle Range :
Input Signal : 2-channel LVDS (LVDS: Low Voltage Differential Signaling)
Back Light : Edge Light Type with White LED
External Dimensions : (H) 460.6 × (V) 362 × (t) 27.5 (mm)
Weight : Typ. 3,000 (g) (Max.3,400 (g))
RoHS : Compliance
Anti-glare
16,777,216 colors
Super Wide Version
Date PageJapan Display Inc. July. 27, 2012 DPBC10000266-1
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No.
4-1/1
Page 6
1. ABSOLUTE MAXIMUM RATINGS
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1.1 ELECTRICAL ABSOLUTE MAXIMUM RATINGS
Item Unit
Temperature 0 50 -20 60 °C 1)
Humidity 2) 2) %RH 1) Vibration — (0.5G) — (1.0G) 3)
Shock — (3G) — (30G) 4)
Corrosive Gas Not Acceptable Not Acceptable — —
Illumination at
LCD Surface
Notes 1) Temperature and Humidity should be applied to the center glass surface of TFT-LCD module,
not to the system installed with a module. The temperature at the center of rear surface should be less than 60°C on the condition of operating. Function of module is guaranteed in above operating temperature range, but optical characteristics is specified for only 25°C operating condition.
2) Ta ≤ 40°C ……… Relative humidity should be less than 85%RH max. Dew is prohibited. Ta > 40°C ……… Relative humidity should be lower than the moisture of the 85%RH at 40°C.
3) Frequency of the vibration is between 15Hz and 100Hz. (Except the resonance point)
4) Pulse width of the shock is 10 ms.
Operating Storage
Min. Max. Min. Max.
4.9
9.8
29.4 294
— 50,000 —
50,000 lx —
m/s
2
Note
1.2 ELECTRICAL ABSOLUTE MAXIMUM RATINGS (1) TFT-LCD Module
Item Symbol Min. Max. Unit Note
Power Supply Voltage
Input Voltage for logic
Electrostatic Durability
Notes 1) It is applied to pixel data signal and clock signal.
2) Discharge Coefficient: 200pF-250Ω, Environmental: 25°C-70%RH
3) It is applied to I/F connector pins.
4) It is applied to the surface of a metallic bezel and a LCD panel.
V V V V
DD
I
ESD0
ESD1
0 13.5 V —
-0.3 3.6 V 1)
(2) Back-Light
Item Symbol Min. Max. Unit Note
Input Voltage
V
IN
ON/OFF Control Input Voltage ON/OFF 0 5.5 V
Analog Dimming Signal Voltage
PWM Dimming Signal Voltage
V
BC
PWM 0
Notes 1) These signals should not be inputted simultaneously.
Vss=0V
±100 V 2),3)
±8 kV 2),4)
Vss=0V
028V
05.5V
5.5
V1)
1)
Date PageJapan Display Inc. July. 27, 2012 DPBC10000266-1
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No.
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Page 7
2. OPTICAL CHARACTERISTICS
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The following optical characteristics are measured when the LCD is set alone (apart from driving circuits and monitor cabinets) and under stable conditions. It takes about 30 minutes to reach stable conditions. The measuring point is the center of display area unless otherwise noted. The optical characteristics should be measured in a dark room or equivalent state.
Measuring equipment :KONICA MINOLTA CS-2000, CS-1000A, CA-210 or EZ-contrast Ambient Temperature =25±3°C, V and V
=3.3V or PWM=100%
BC
Item Symbol Condition Min. Typ. Max. Unit Note
Contrast Ratio CR 700 1100 — — 2)
Response Rise ton — 12 22
Time Fall toff — 10 21
Brightness of white Bwh 680 820 —
Brightness uniformity Buni 75 — — % 4)
x θ = 0° 0.620 0.650 0.680 y 1) 0.295 0.325 0.355 x 0.278 0.308 0.338 y 0585 0.615 0.645 — x 0.120 0.150 0.180 y 0.025 0.055 0.085 x 0.269 0.299 0.329 y 0.285 0.315 0.345
Δx——0.04 Δy——0.04 Δx θ = +50° — — 0.04 Δy φ = 0°, 90° — — 0.04 — Δx 180°, 270° — — 0.04 Δy1)——0.04 Δx——0.04 Δy——0.04
Color
Chromaticity
(CIE)
Variation of
Color Position
(CIE)
Red
Green
Blue
White
Red
Green
Blue
White
θ = +85°
Contrast Ratio at 85° CR85° φ = 0°, 90° 10 — — — —
180°, 270° 1)
=12.0V, fV=60Hz, VIN=24V
DD
ms
cd/m
2
Gray scale
= 255
Gray scale
= 255
3)
—
5)
Date PageJapan Display Inc. July. 27, 2012 DPBC10000266-1
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No.
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Page 8
Notes 1) Definition of Viewing Angle
Displayi
Sh
φ=90°
(12 o'clock)
θ=0°
z
y
θ
eye
φ=180°
(9 o'clock)
TFT-LCD Module
2) Definition of Contrast Ratio (CR)
CR =
3) Definition of Response Time
Data Signal
Optical Response ( Luminance)
(Luminance at displaying WHITE) (Luminance at displaying BLACK)
ng
%
100
90
10
0
φ
φ=270°
y'
z'
WhiteBlack Black
ton toff
(6 o'clock)
xx'
(3 o'clock)
φ=0°
4) Definition of Brightness Uniformity
10%
90%
5) Variation of color position on CIE is defined as difference between colors at θ = 0° and
(1) (2) (3)
(4) (5) (6)
(7) (8) (9)
10%
50%
: measuring points
at θ = 50° & φ = 0°, 90°,180°, 270°.
50%
90%
Date PageJapan Display Inc. July. 27, 2012 DPBC10000266-1
Display pattern is white (255 level). The brightness uniformity is defined as the following equation. Brightness at each point is measured, and average, maximum and minimum brightness is calculated.
Buni = × 100
Bmin
Bmax
where, Bmax = Maximum brightness
Bmin = Minimum brightness
.
No.
6-2/2
Page 9
3. ELECTRICAL CHARACTERISTICS
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3.1 TFT-LCD MODULE
Item Symbol Min. Typ. Max. Unit Note
Power Supply Voltage
Power Supply Current
Vsync Frequency Hsync Frequency
DCLK Frequency
Notes 1)
DC current at f
=60Hz, f
V
DC Ampere Meter
Current capacity of power supply for V
2) opened at the trouble of power supply.
3) The picture on maximum current is white picture.
V
DD
I
DD
f
V
f
H
f
CLK
=67.5MHz and VDD=12V
CLK
TFT-LCD Module
V
DD
Vss
Ta=25°C, Vss=0V
11.0 12.0 13.0 V — — 0.4 0.7 A 1),2),3) 57 60 63 Hz — —7275kHz— 40 67.5 81 MHz —
should be larger than 5A, so that the fuse can be
DD
Date PageJapan Display Inc. July. 27, 2012 DPBC10000266-1
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No.
7-1/2
Page 10
3.2 BACK LIGHT
M
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Ta=25°C
Item Symbol Min. Typ. Max. Unit Note Input Voltage Input Current ON/OFF ON 2.5 — 5.0 V B/L=ON Control Voltage OFF 0 — 0.8 V B/L=OFF Brightness Control Voltage PWM dimming signal High 3.0 — 5.0 V 3) Input Voltage Low 0 — 0.8 V
V
IN
I
IN
ON/OFF
V
BC
PW
21.6 24 26.4 V — — 2.48 2.74 A 4)
1.0 — 3.6 V 1), 2)
PWM Frequency PWM f 125 135 145 Hz
Notes 1) As for Vbc, it is recommendable to use more than 1.0V.
If Vbc is set less than 1.0V in which brightness becomes less than 20% to the maximum, display image may look unstable since relative change of brightness tends to become large by the slight drift of Vbc.
Notes 2) Brightness rises almost linearly by increaseing the Vbc in less than 3.0V.
However, brightness is saturated when Vbc exceeds 3.0V. Notes 3) Brightness is almost proportional to the on-duty ratio of PWM signal input. Notes 4) The protection fuse is built into this module. Current capacity of power supply for Vin should
be greater than 8A, so that the fuse can blow if there is a problem with the power supply.
Date PageJapan Display Inc. July. 27, 2012 DPBC10000266-1
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No.
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Page 11
4. BLOCK DIAGRAM
)
)
)
Sh
(1) TFT-LCD Module
LVDS (ODD data)
Timing signals Display data Control signals
LVDS (EVEN data)
Display data
DC power supply
(2) Back Light Unit
CN1
CN2
Receiver
ODD pixel
EVEN
pixel
Receiver
Timing
converter
DC/DC
converter
LED (Series
Gate driver
G1
G2
G1200
Drain driver
D1
D2
TFT-LCD cell
D4800
DC power supply
ON/OFF Control
Brightness Control
LED (Series
LED driver
LED (Series
Date PageJapan Display Inc. July. 27, 2012 DPBC10000266-1
No.
.
8-1/1
Page 12
5. INTERFACE PIN ASSIGNMENT
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5.1 TFT-LCD MODULE
CN1: HIROSE: MDF76GW-30S-1H(55) or Equivalent (Matching connector: JAE FI-X30H or FI-X30M or Equivalent)
Pin No. Symbol Function Note
1 RAIN0- ODD pixel data 2) 2 RAIN0+ 3 RAIN1- ODD pixel data 2) 4 RAIN1+ 5 RAIN2- ODD pixel data 2) 6 RAIN2+ 7 Vss GND (0V) 1) 8 RACLKIN- ODD pixel clock 2)
9 RACLKIN+ 10 RAIN3- ODD pixel data 2) 11 RAIN3+ 12 RBIN0- EVEN pixel data 2) 13 RBIN0+ 14 Vss GND (0V) 1) 15 RBIN1- EVEN pixel data 2) 16 RBIN1+ 17 Vss GND (0V) 1) 18 RBIN2- EVEN pixel data 2) 19 RBIN2+ 20 RBCLKIN- EVEN pixel clock 2) 21 RBCLKIN+ 22 RBIN3- EVEN pixel data 2) 23 RBIN3+ 24 Vss GND (0V) 1) 25 NC No connection 3) 26 NC No connection 3) 27 NC No connection 3) 28 29 30
Notes 1) All Vss pins should be grounded.
2) RnINm+ and RnINm- (n=A,B m=0,1,2,3) should be wired by twist-pairs or side-by-side FPC patterns, respectively.
3) Please keep open. All V
4)
5) Pin assignment is as follows.
DD
V
DD
V
DD
V
DD
pins should be connected to +12.0 V (typ.).
Power supply (12V) 4)
1pin
(Figure from top-view)
30pin
Date PageJapan Display Inc. July. 27, 2012 DPBC10000266-1
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No.
9-1/6
Page 13
5.2 BACK-LIGHT UNIT
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CN2 : TARNG YU Enterprise TU2001WNR-14S or Equivalent (Matching connector : JST PHR-14 or TARNG YU Enterprise TU2001HNO-14)
Pin No. Symbol
1 2 3 4 5
V
IN
V
IN
V
IN
V
IN
V
IN
Power Supply (typ. 24.0V)
6Vss 7Vss 8 Vss GND (0V) 9Vss
10 Vss 11 NC NC 12 ON/OFF High : Backlight ON, Low : Backlight OFF 13
V
BC
Brightness Control Signal
14 PWM External PWM for Dimming Control
Notes 1) Vin pins should be connected to +24.0V (Typ.).
2) Vss pins should be grounded. The metal bezel is internally connected to GND.
3) Please set the terminal to NC (No Connection).
4) High level:3.0~5.0V, Low level:0~0.8V (High:Max. Brightness, Low:Min. Brightness)
5) Input Voltage : 1.0 ~ 3.6V DC (Brightness becomes maximum at 3.3 +/- 0.3V.)
6) These signals should not be inputted simultaneously. i.e. when the PWM signal is to be inputted, please set the terminal of V when the V
signal is to be inputted, please set the PWM terminal to NC.
BC
7) Pin assignment is as follows.
Description Note
5),6)
4),6)
to NC. Or
BC
1)
2)
3)
4)
14pin1pin
(Figure from top-view)
Japan Display Inc. July. 27, 2012 DPBC10000266-1Date Page
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Page 14
BLOCK DIAGRAM OF INTERFACE
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System (PC) side IPS-Pro module side
RA0~RA7
GA0~GA7
BA0~BA7
(Reserved) (Reserved)
DTMG
Host Graphics Controller
RB0~RB7
GB0~GB7
BB0~BB7
(Reserved) (Reserved) (Reserved)
1)
1)
TAIN
TBIN
LVDS Transceiver
TTL
Parallel-to-LVDS
PL
RAIN0+ RAIN0­RAIN1+ RAIN1­RAIN2+ RAIN2-
RAIN3+ RAIN3-
RCLKAIN+
RCLKAIN-
LVDS Receiver
ODD pixel ODD pixel
LVDS ReceiverLVDS Transceiver
RBIN0+ RBIN0­RBIN1+ RBIN1-
TTL
Parallel-to-LVDS
RBIN2+ RBIN2-
RBIN3+ RBIN3-
LVDS-to-TTL
PL
LVDS-to-TTL
Parallel
Parallel
RAOUT
RA0~RA7 GA0~GA7 BA0~BA7
Hsync Vsync
DTMG
RBOUT
RB0~RB7 GB0~GB7 BB0~BB7
(Reserved) (Reserved) (Reserved)
PL
RCLKBIN+
RCLKBIN-
PL
LCD Panel Controller
EVEN pixel EVEN pixel
RA0~7, RB0~7 : R data Receiver: Equivalent of THC63LVDF84B by THine GA0~7, GB0~7 : G data BA0~7, BB0~7 : B data DTMG : Display timing data
Notes 1) RSVD (reserved) pins on a transmitter should be connected with Vss.
2) The system must have a LVDS transmitter to drive a module.
3) The impedance of LVDS cable should be 50 ohms per a signal line or about 100 ohms per a twist-pair line when it is used differentially.
Date PageJapan Display Inc. July. 27, 2012 DPBC10000266-1
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No.
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Page 15
LVDS INTERFACE
g
RSVD 1)
25
TAIN23
2
RAOUT23
RSVD
K
K
K
K
Sh
Input
nal Pin Input System side
Si RA0 51 TAIN0 27 RAOUT0 RA0 RA1 52 TAIN1 29 RAOUT1 RA1 RA2 54 TAIN2 TA OUT0+ RA IN0+ 30 RAOUT2 RA2 RA3 55 TAIN3 32 RAOUT3 RA3 RA4 56 TAIN4 33 RAOUT4 RA4 RA5 3 TAIN6 TA OUT0- RA IN0- 35 RAOUT6 RA5 GA0 4 TAIN7 37 RAOUT7 GA0 GA1 6 TAIN8 38 RAOUT8 GA1 GA2 7 TAIN9 39 RAOUT9 GA2 GA3 11 TAIN12 TA OUT1+ RA IN1+ 43 RAOUT12 GA3 GA4 12 TAIN13 45 RAOUT13 GA4 GA5 14 TAIN14 46 RAOUT14 GA5 BA0 15 TAIN15 TA OUT1- RA IN1- 47 RAOUT15 BA0
LVDS BA1 19 TAIN18 51 RAOUT18 BA1
ODD BA2 20 TAIN19 53 RAOUT19 BA2
BA3 22 TAIN20 54 RAOUT20 BA3 BA4 23 TAIN21 TA OUT2+ RA IN2+ 55 RAOUT21 BA4 BA5 24 TAIN22 1 RAOUT22 BA5 RSVD 1) 27 TAIN24 3 RAOUT24 RSVD RSVD 1) 28 TAIN25 TA OUT2- RA IN2- 5 RAOUT25 RSVD DTMG 30 TAIN26 6 RAOUT26 DTMG RA6 50 TAIN27 7 RAOUT27 RA6 RA7 2 TAIN5 34 RAOUT5 RA7 GA6 8 TAIN10 TA OUT3+ RA IN3+ 41 RAOUT10 GA6 GA7 10 TAIN11 42 RAOUT11 GA7 BA6 16 TAIN16 49 RAOUT16 BA6 BA7 18 TAIN17 TA OUT3- RA IN3- 50 RAOUT17 BA7
Transmitter Interface connector Receiver TFT
Super-TFT module
Pin Output Control input
DCL
RB0 51 TBIN0 27 RBOUT0 RB0 RB1 52 TBIN1 29 RBOUT1 RB1 RB2 54 TBIN2 TB OUT0+ RB IN0+ 30 RBOUT2 RB2 RB3 55 TBIN3 32 RBOUT3 RB3 RB4 56 TBIN4 33 RBOUT4 RB4 RB5 3 TBIN6 TB OUT0- RB IN0- 35 RBOUT6 RB5 GB0 4 TBIN7 37 RBOUT7 GB0 GB1 6 TBIN8 38 RBOUT8 GB1 GB2 7 TBIN9 39 RBOUT9 GB2 GB3 11 TBIN12 TB OUT1+ RB IN1+ 43 RBOUT12 GB3 GB4 12 TBIN13 45 RBOUT13 GB4 GB5 14 TBIN14 46 RBOUT14 GB5 BB0 15 TBIN15 TB OUT1- RB IN1- 47 RBOUT15 BB0
LVDS BB1 19 TBIN18 51 RBOUT18 BB1
EVEN BB2 20 TBIN19 53 RBOUT19 BB2
BB3 22 TBIN20 54 RBOUT20 BB3 BB4 23 TBIN21 TB OUT2+ RB IN2+ 55 RBOUT21 BB4 BB5 24 TBIN22 1 RBOUT22 BB5 RSVD 1) 27 TBIN24 3 RBOUT24 RSVD RSVD 1) 28 TBIN25 TB OUT2- RB IN2- 5 RBOUT25 RSVD RSVD 1) 30 TBIN26 6 RBOUT26 RSVD RB6 50 TBIN27 7 RBOUT27 RB6 RB7 2 TBIN5 34 RBOUT5 RB7 GB6 8 TBIN10 TB OUT3+ RB IN3+ 41 RBOUT10 GB6 GB7 10 TBIN11 42 RBOUT11 GB7 BB6 16 TBIN16 49 RBOUT16 BB6 BB7 18 TBIN17 TB OUT3- RB IN3- 50 RBOUT17 BB7 RSVD 1) 25 TBIN23 2 RBOUT23 RSVD DCL
31 TCLKA IN TCLKA OUT+ RCLKA IN+ 26 RCLKA OUT DCL
TCLKA OUT- RCLKA IN-
31 TCLKB IN TCLKB OUT+ RCLKB IN+ 26 RCLKB OUT DCL
TCLKB OUT- RCLKB IN-
Date PageJapan Display Inc. July. 27, 2012 DPBC10000266-1
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No.
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Page 16
CORRESPONDENCE BETWEEN INPUT DATA AND DISPLAY IMAGE
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ODD pixel: RA0~RA7 : R data
(1, 1) (1, 2) GA0~GA7 : G data
BA0~BA7 : B data
RA GA BA RB GB BB EVEN pixel: RB0~RB7 : R data
GB0~GB7 : G data BB0~BB7 : B data
1, 1 1, 2 1, 3 1, 1600
2, 1 2, 2 2, 3 2, 1600
3, 1 3, 2 3, 3 3, 1600
1200, 1 1200, 2 1200, 3 1200, 1600
DCLK
RA0~RA7 GA0~GA7 BA0~BA7
RB0~RB7 GB0~GB7 BB0~BB7
1, 31, 1INVALID 1, 5 1, 7
1, 41, 2INVALID 1, 6 1, 8
Date PageJapan Display Inc. July. 27, 2012 DPBC10000266-1
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Page 17
RELATIONSHIP BETWEEN DISPLAY COLORS AND INPUT SIGNALS
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Input data R data G data B data
0
… …
BA7 BA6 BA5
000 0 11
… …
111
1
000
0
00
00
…
…
… …
… …
Color
BASIC
COLOR
RED
BLACK
RED (255)
GREEN (255)
BLUE (255)
CYAN
MAGENTA
YELLOW
WHITE BLACK RED (1) RED (2)
……
RA3 RB3
MSB LSB MSB LSB MSB LSB
0000 000 0000000 0 0 00 1111 110 0000000 0 0 000
0000 00 000 000 1111 110 0111000 00111 111 1111 111 1111111 1 1 111
0000 010 0 00000 000 0 0000 1 00000 0
…
…
…
…
0001
1 111 10111 11100
00 000 0000000 00
…
… … …
…
RA1 RA0 GA7RA2 GA6 GA5 GA4 GA1 GA0GA2GA3RA7 RA6 RA5 RA4 BA4 BA1 BA0
RB0 GB7 GB6 GB5 GB4 GB3 BB6
0
0
1
1
0
0
0
0
0
0
1
1
1
1
1
00 0
000
…
……
…
0
111 11
000
0000
…
…
…
…
…
…
…
…
… …
GB2
0
0
0
0
1
1
0
11 00000
…
…
…
…
111
……
BA3
BA2
000
00000 001110111 11 11 1 1 0 1 0 0 0
… …
BB1 BB0BB5 BB4 BB3 BB2RB7 RB6 RB5 RB4 RB2 RB1 GB1 GB0 BB7
0 0 0
1 1 0 1 0 0 0
……
001 11
0
…
… …
…
GREEN
BLUE
RED (254) RED (255)
BLACK GREEN (1) GREEN (2)
… …
GREEN (254) GREEN (255)
BLACK
BLUE (1) BLUE (2)
……
BLUE (254) BLUE (255)
11 111 0 000 0000
… …
00 0
0000 00
… …
00 0000 000
11 100 0
000 000
…
…
…
00 001 000 00
00 …
…
…
…
000
1
1
1 0
0
0 0
…
… …
…
0 0 0
0
0 0
…
…
…
…
Notes 1) Definition of gray scale: Color (n)
n indicates gray scale level. Higher n means brighter level.
2) Data signals: 1: High, 0: Low
1
110
1
0000 10000 000
0
…
… …
…
0 0
001 10 0 0 0
…
…
… …
……
0 0
0
0
000000
…
… …
… …
…
…
…
1
0000
000
000
…
… …
…
00
0
00
00
……… ………
1110011 0 1111
00 0
00
……… …
…
… …
1
… …
00 000
00
00
0000
000
00
0
0
0000
0
0100 …
… …
…
00
0
…
…
…
…
0
1
0 00 000
…
… …
…
001 0000 0000 00 0 0000000 00 0
0 …
… …
………
0
0
00000
0
00
0
0
0
…
……
…
0 00
…
……
1
1
1
0
0 0 0 0 0
… …
0 0 0
… …
1 1
0
00
0
0
00
00
……
… …
00
000
0 001 1000
000 …
…
…
…
0
11100000
1000101110
100 0
Date PageJapan Display Inc. July. 27, 2012 DPBC10000266-1
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No.
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Page 18
6. INTERFACE TIMING
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6.1 LVDS RECEIVER TIMING CHARACTERISTICS
(Regulation with the Input Terminal of the Module)
RinX
Rx6 Rx5 Rx4
1/14* t 1/14* t
Rx3
CLK
CLK
5/14 * t 5/14 * t
3/14 * t 3/14 * t
Rx1 Rx0Rx2
t
SU
13/14 * t
13/14 * t 11/14 * t 11/14 * t
9/14 * t
CLK
9/14 * t
CLK
7/14 * t
CLK
7/14 * t
CLK
CLK
CLK
CLK
CLK
t
HD
t
CLK
CLK
CLK
CLK
CLK
+100mV
-100mV
RCLKin
RCLKin+ RCLKin-
Vdiff=0V
RinX=(RinXp)-(RinXn)
+100mV
-100mV
(X=0,1,2)
Item Condition Symbol Min. Typ. Max. Unit Remarks DCLK frequency RinX (X=0,1,2) Set up time
Hold time
t
=12ns
CLK
=15ns t
t
CLK
=25ns
t
CLK
t
=12ns
CLK
=15ns t
t
CLK
=25ns
t
CLK
1/t
SU
HD
CLK
40 67.5 81 MHz 350 - - ps 450 - -
1000 - -
350 - ­450 - -
1000 - -
Date PageJapan Display Inc. July. 27, 2012 DPBC10000266-1
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No.
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Page 19
6.2 TIMING PARAMETERS
Sh
Signal Item Symbol Min. Typ. Max. Unit Note
Frequency 1/Tc 40 67.5 81 MHz
Clock High Time
Low Time
Data
DTMG Setup Time
Frame Frequency Cycle
Vertical Active
Display Term
One Line
Scanning Time
Horizontal Active
Display Term
Setup Time
Hold Time
Display Period
Vertical Blank
Period
Display Period
T
CH
T
CL
T
DS
T
DH
T
ES
T
V
T
VD
T
VB
Cycle clocks
T
H
T
HD
4——nsec 4——nsec 4——nsec— 4——nsec 4——nsec
15.90 16.7 17.5 msec 1,203 1,203 1,270 lines — 1,200 1,200 1,200 lines —
33 —
840 936
800 800
70
lines
1,080
800 clocks —
2pxl/clk
—
Date PageJapan Display Inc. July. 27, 2012 DPBC10000266-1
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No.
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Page 20
6.3 TIMING BETWEEN INTERFACE SIGNALS AND POWER SUPPLY
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Power supply voltage V
10V
0V
Input signals V
0V
1V
TPR
I
Back Light
DD
(a)
valid
TBR TBF
(b)
1V
TINTDR TDF
Timing of power supply voltage and input signals should be used under the following specifications.
0ms
10ms
0ms
TPR
≤
TDR
≤
TDF
≤
TIN TBR TBF
≤ ≤ ≤ ≥ ≥ ≥
10ms 50ms 50ms 1s 500ms 100ms
Notes (1) Please set the time of (a) to 500ms, or less.
(a) is the interval from the input of power supply V
to synchronization
DD
signal of UXGA and clock. (2) Please set the time of (b) 1s, or as short as possible. (b) is the interval from the input to synchronization signal of UXGA and clock to the power supply OFF. When the synchronization signal or clock becomes off, please set the input signal for the display image to black. (3) V
supply without synchronization signal and clock input should be avoided
DD
to avoid abnormal display or module defect.
Date PageJapan Display Inc. July. 27, 2012 DPBC10000266-1
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No.
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Page 21
7. DIMENSIONAL OUTLINE
Sh
(1) Front View
Note1) Dimension in parentheses are reference value. Unit: mm
Tolerance not specified is +/- 0.5mm. Scale:NTS Maximum torque for M3 screw: 0.588N
-m.
Sh.
Japan Display Inc. Date July. 27, 2012 DPBC10000266-1 Page 11-1/2
No.
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Page 22
(2) Rear View
Sh
CN2
CN2
LED Driver with Cover
Note1) Dimension in parentheses are reference value.
2) Tolerance not specified is +/- 0.5mm.
3) LED driver is protected by the plastic cover. For this cover, please take the clearance at least 10mm Unit: mm from conductive materials such as back chassis in order to suppress the electromagnetic coupling. Scale:NTS
Sh.
Japan Display Inc. Date July. 27, 2012 DPBC10000266-1 Page 11-2/2
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Page 23
8. DESIGNATION OF LOT MARK
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8.1 LOT MARK
Production management sign 4)
Week 3)
Month 2)
Year 1)
Notes
1) Year Mark 2) Month Mark Month Mark 3) Week (Days) Mark 2012 2 1 01 7 07 1~7 1 2013 3 2 02 8 08 8~14 2 2014 4 3 03 9 09 15~21 3 2015 5 4 04 10 10 22~28 4 2016 6 5 05 11 11 29~31 5
6061212
Special mark 5)
5 digits for production number (00001~99999)
4) Production management sign 5) It is the mark that was opened up by production person
H Made in Japan to take correspondence with production number.
T Made in Taiwan
8.2 REVISION (REV.) CONTROL REV. is the column for manufacturing convenience. A-Z except I and O may be written on this column.
8.3 LOCATION OF LOT MARK The Lot mark is a label. The label is on the rear bezel as shown in 7. DIMENSIONAL OUTLINE. The style of character can be changed without prior notice.
TX54D14VC0CAA
Lot mark REV.
TX54D14VC0CAA
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Page 24
9. COSMETIC SPECIFICATIONS
h
Sh
9.1 CONDITIONS FOR COSMETIC INSPECTION
(1) Viewing zone
Inspection view
a) The figure shows the correspondence
between eyes (of inspector) and TFT-LCD module.
≤
5° : when non-operating inspection
θ
≤
θ
5° : when operating inspection
b) Inspection should be executed only from
front side and only A-zone. Cosmetic of B-zone and C-zone are ignore. (refer to 9.2 DEFINITION OF ZONE)
(2) Environment
a) Temperature : 25°C b) Ambient light : Sufficient darker condition when operating inspection.
: about 1000 lx and non-directive when non-operating inspection.
c) Back-light:w
en non-operating inspection, back-light should be off.
about 300mm
θ
TFT-LCD module
θ
0
Light
9.2 DEFINITION OF ZONE
A-zone
B-zone
C-zone
•A-zone : Display area (pixel area).
•B-zone : Area between A-zone and C-zone.
•C-zone : Metal bezel area. (Include I/F connector)
Japan Display Inc. Date July. 27, 2012 DPBC10000266-1 Page
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9.3 COSMETIC SPECIFICATIONS
Sh
When displaying conditions are not stable (ex. at turn on or off), the following specifications are not applied.
Operating
inspection
No. Item Unit Note
Max acceptable number
A-zone
1 Dot Sparkle 1-dot 0 pcs 1), 2), 4)
Defect mode 2-dot 0
3-dot 0 1), 2), 5) 4-dots 0 pcs Density 0 pcs/φ20mm 1), 2), 6)
Total 0 pcs ­ Black 1-dot 7 pcs 1), 3), 4) mode 2-dot 3
3-dot 0 Units 1), 3), 5)
4-dots 0
Density 2 pcs/φ20mm 1), 3), 6)
Total 7 pcs ­ Total (Without slightly bright dot) 10 pcs -
2 Line defect Serious one is — ­ 3 Uneven brightness not allowed.
Stain inclusion
4
Line shape W: width (mm) L: length (mm)
Stain inclusion
5
Dot shape D: ave. dia. (mm)
W ≤ 0.1 pcs 7)
D ≤ 0.22 Ignore D ≤ 0.4 5 pcs 7)
0.4 < D ≤ 0.5 4
L < 1.0 4
L ≥ 1.0 0
D > 0.5 0
Scratch on polarizer
6
Line shape W: width (mm)
W ≤ 0.02 L: Ignore Ignore W ≤ 0.04 L ≤ 40 10
L > 40 0 pcs 8)
W ≤ 0.08 L ≤ 20 10
L > 20 0
L: length (mm)
Scratch on polarizer
7
Dot shape D: ave. dia. (mm)
W > 0.08 — 0 D ≤ 0.2 Ignore D ≤ 0.6 10 pcs 8) D > 0.6 0
Japan Display Inc. Date July. 27, 2012 DPBC10000266-1 Page
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Max. acceptable number
Sh
A-zone
non-
operating
inspection
No. Item Unit Note
Bubbles, peeling
8
in polarizer
D: ave. dia. (mm)
D ≤ 0.3 Ignore D ≤ 0.5 10 pcs 8) D ≤ 1.0 5 D > 1.0 0
Wrinkles on polarizer
9
Serious one is - ­ not allowed.
Notes 1) Dot defect : defect area > 1/2 dot
2) Sparkle mode : brightness of dot is more than DDL:147(W≧147,R≧147,G≧147,B≧147) at Black (0 level).
3) Black mode: brightness of dot is less than 70% at white. (visible to eye)
4) 1 dot: defect dot is isolated, not attached to other defect dot.
5) N dots: N defect dots are consecutive. (N means the number of defects dots)
6)
Density: Number of defect dots inside 20mm φ.
7) Those stains which can be wiped out easily are acceptable.
8) Polarizer area inside of B-zone is not applied.
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10. PRECAUTION
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Please pay close attention to the following precautions whilst using, handling and mounting the TFT module.
10.1 PRECAUTION FOR HANDLING AND MOUNTING
(1) Applying excessive force to any part of the module may result in partial deformation of the frame or mould, which could result in permanent damage to the display. (2) The module should be held gently and firmly using both hands. In order to avoid internal damage, never hold the module by just one hand. Also never drop or hit the module. (3) The module should be installed using the mounting holes of the module. (4) Uneven force such as twisted stress should not be applied directly to the module once it is mounted within the cover case. The cover case must have sufficient strength such that any external forces are not transmitted directly to the module. (5) It is recommended that you maintain a gap between the display module and the rear chassis so as to avoid any mechanical stress being passed to the module.
Cover case
(6) The edge of the cover case should be positioned with more than a 1mm overlap from the edge of the module's upper frame. (7) A transparent protective plate should be added to the front of the display in order to protect both the polarizer and TFT cell. The transparent protective plate should have sufficient strength such that the plate can not be deformed, due to external forces, and touch the module. (8) Materials containing acetic acid and chlorine should not be used for the cover case nor for other parts which are positioned in close proximity to the module. This is because the Acetic acid will attack the polarizer, whilst the chlorine will attack the electric circuits by way of electro-chemical reaction. (9) The front polarizer on the TFT cell should be handled carefully, due to its softness, and must not be touched, pushed or rubbed with glass, tweezers or anything harder than an HB pencil lead. The surface of the polarizer should not be touched nor rubbed with bare hands, greasy or dusty clothes. (10) If the surface of polarizer becomes dirty, it should be gently wiped using an absorbent cotton, chamois or other soft material with recommended potion. Do not rub strongly to avoid damaging the surface. IPA (isopropyl alcohol) is recommended to clean away the traces of adhesive which is used to attach the front/rear polarizers to the TFT cell. Other cleaning chemicals such as acetone, toluene and alcohol should not be used to clean adhesives because they cause chemical damage to the polarizer. (11) Saliva or water drops should be immediately wiped off. Otherwise, the affected portion of the polarizer may become deformed and its color may fade. (12) The module should not be opened or modified, under any circumstances, as this may cause it to malfunction.
B-zone
Fig.1 Cross sectional view of a monitor set
Effective display area
Edge of cover case
TFT module
Polarizer
above precaution (5)
Japan Display Inc. Date July. 27, 2012 DPBC10000266-1 Page
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(13) The metallic bezel of the module should not be handled with bare hand or dirty gloves. Otherwise,
(8) C
hil
Sh
the color of the metallic frame may become dirty during its storage. It is recommended to use clean soft gloves and clean finger stalls whilst the module is handled during incoming inspection and production assembly processes. (14) Please pay attention to the packing and handling not to apply strong Z axis vibration. Because during our vibration test, of course we didn't have any functional failure, but we observed very tiny bright dots (within spec though) at Z axis direction.
10.2 PRECAUTION TO OPERATION
(1) Spike noise could result in the mis-operation of this module. The level of spike noise should be as follows:
-200mV ≤ over- and under- shoot of V V
including over- and under- shoot should not exceed the absolute maximum ratings.
DD
≤ +200mV
DD
(2) Optical response times, luminance and chromaticity depend on the temperature of the TFT module. (3) Sudden temperature changes may cause dew on and/or in the module. Dew can cause damage to the polarizer and/or electrical contacting areas of the module. Dew causes fading of the image quality. (4) Using screen saver is recommended that it avoids any potential of sticking image. (5) This module has high frequency circuits. Sufficient suppression to electromagnetic interference should be done by the system manufacturers. Grounding and shielding methods may be effective to minimize such interference. (6) Noise may be heard when the back-light is operated. If necessary, sufficient suppression should be done by the system manufacturers. (7) The module should not be connected or disconnected whilst the main system is operating.
onnecting or disconnecting the I/F cables, w
st the power and data signals are present, could result in permanent damage to the module. The I/F connectors should only be connected and disconnected after the power supply and data signal have been turned off. (9) The ambient temperature near the operated module should be satisfied with the absolute maximum ratings.
Unless it meets the specifications, sufficient cooling system should be adopted to system.
10.3 ELECTROSTATIC DISCHARGE CONTROL
(1) This module consists of a TFT cell and electronic circuits with CMOS-ICs, which are very susceptible to electrostatic discharge. Persons who are handling the module should be grounded through adequate methods such as a wrist band. I/F connector pins should not be touched directly with bare hands. (2) The polarizer protective film should be removed slowly so as to avoid an excessive build-up of electrostatic charge.
10.4 PRECAUTION TO STRONG LIGHT EXPOSURE
(1) The module should not be exposed to strong light. Otherwise, characteristics of the polarizer and color filter, may be degraded.
10.5 PRECAUTION TO STORAGE
When modules are stored, for long period's of time, the following precautions should be taken: (1) Modules should be stored in a dark place. It is prohibited to apply direct sunlight or fluorescent light during storage. Modules should be stored between 0 to 35°C at normal humidity (60%RH or less). (2) The surface of the polarizer should not come into direct contact with other objects. It is recommended that modules should be stored in the original shipping box.
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10.6 PRECAUTION TO HANDLING PROTECTION FILM
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(1) The protective film for polarizers should be pealed off slowly and carefully by people who are electrically grounded with adequate methods such as wrist bands. Also ionized air should be blown over the module during the peeling process. Dust on the polarizer should be blown off gently using an ionized nitrogen gun. (2) The protective film should be peeled off carefully to avoid it rubbing on the polarizer. If the film rubs together with the polarizer it is possible that a small amount of adhesive may remain on the polarizer. (3) The module with protective film should be stored under the conditions explained in 10.5 (1). However , in case's where the storage time is excessive, some adhesive may remain on the polarizer even after the protective film has been removed. In the case where a module is stored at higher temperatures and/or higher humidity, adhesive may remain on the polarizer. Any remaining adhesive may cause non-uniformity of the displayed image.
10.7 SAFETY
(1) Since the TFT cell is made of glass, handling of any broken module's should be carried out with the utmost care so as to avoid any injury. Hands which have come into direct contact with liquid crystal material should be washed immediately and thoroughly. (2) The module should not be taken apart during operation so that back-light drives by high voltage.
10.8 USE RESTRICTIONS AND LIMITATIONS
(1) In no event shall Japan Display Inc. be liable for any incidental, indirect or consequential damages in connection with the installation or use of this product, even if informed of the possibility there of in advance. These limitations apply to all causes action in aggregate, including without limitation breach of contract, breach of warranty, negligence, strict liability, misrepresentation and other torts. (2) This product is not authorized for military applications or other applications which pose a significant risk of personal injury. (3) This specification is valid only for a bare panel. The specification values are not valid for a panel after fabrication work, which gives any effect on panel characteristics such as disassemble, glass bonding, or else.
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