Page 1
Hitachi Displays, Ltd.
TECHNICAL DATA
TX43D90VM0BAA
CONTENTS
Date; May. 20, 2011
TENTATIVE
No. Item Sheet No. Page
— COVER DPBC10000118-1 1-1/1
— RECORD OF REVISION DPBC10000118-1 2-1/1
— APPLICATION DPBC10000118-1 3-1/1
— DESCRIPTION DPBC10000118-1 4-1/1
1 ABSOLUTE MAXIMUM RATINGS DPBC10000118-1 5-1/1
2 OPTICAL CHARACTERISTICS DPBC10000118-1 6-1/2 - 6-2/2
3 ELECTRICAL CHARACTERISTICS DPBC10000118-1 7-1/2 - 7-2/2
4 BLOCK DIAGRAM DPBC10000118-1 8-1/1
5 INTERFACE PIN ASSIGNMENT DPBC10000118-1 9-1/6 - 9-6/6
6
7 DIMENSIONAL OUTLINE DPBC10000118-1 11-1/1
TIMING DIAGRAMS OF INTERFACE TIMING
DPBC10000118-1 10-1/3 - 10-3/3
The information described in this technical specification is tentative and it is possible to be changed
without prior notice.
Hitachi Displays, Ltd. DPBC10000118-1 Page
Sh.
No.
1-1/1
Page 2
RECORD OF REVISION
The upper section : Before revision
The lower section : After revision
Sheet No. Page
SummaryDate
Hitachi Displays, Ltd. May. 20, 2011 DPBC10000118-1
Date Page
Sh.
No.
2-1/1
Page 3
APPLICATION
In the case of applying this product for such as control and safety device of
transportation facilities (airplane, train, automobile, ship, etc), equipments
aiming for rescue and security, and the other safety related devices which should
secure higher reliability and safety, please make it sure that proper countermeasure
such as fail-safe functions and enough system design for the protection are mandatory.
Please do not apply this product for equipments or devices which need exceedingly
high reliability, such as aerospace applications, telecommunication facilities (trunk lines),
nuclear related equipments or plants, and critical life support devices or applications.
Usage style of this product is limited to Landscape mode. Optical characteristics
mentioned in this spec. sheet is applied for only initial stage after delivery, and
the characteristics will be changed by long time usage. Reliability of this product
is secured as normal office use.
Date PageHitachi Displays, Ltd. May. 20, 2011 DPBC10000118-1
Sh.
No.
3-1/1
Page 4
DESCRIPTION
The following specifications are applied to the following 17inch WXGA IPS-Pro-TFT module.
Note :The LED driver for the backlight unit is built in this module.
Product Name : TX43D90VM0BAA
GENERAL SPECIFICATIONS
Effective Display Area : (H)369.60 × (V)221.76 [mm]
Number of Pixels : (H)1,280 × (V)768 [pixels]
Pixel Pitch : (H)0.28875 × (V)0.28875 [mm]
Color Pixel Arrangement : R + G + B Vertical Stripe
Display Mode : Transmissive Mode
Normally Black Mode
Top Polarizer Type :
Number of Colors :
Color Reproducibility :
Viewing Angle Range :
Input Signal : 1-channel LVDS (LVDS: Low Voltage Differential Signaling)
Back Light : Edge Light Type with White LED
External Dimensions : (H)400 × (V)258 × (t)(20.0) [mm]
Weight : Typ. (1,700) [g]
RoHS : Compliance
Anti-glare (Surface hardness: 2H)
16,777,216 colors
NTSC-Ratio (77)%
Super Wide Version
(Horizontal & Vertical : 170°, CR ≥ 10)
Date PageHitachi Displays, Ltd. May. 20, 2011 DPBC10000118-1
Sh.
No.
4-1/1
Page 5
1. ABSOLUTE MAXIMUM RATINGS
…
1.1 ENVIRONMENT ABSOLUTE MAXIMUM RATINGS
Item Unit
Temperature 0 50 -20 60 °C 1)
Humidity 2) 2) %RH 1)
Vibration — (0.5G) — (1.0G) 3)
Shock — (3G) — (30G) 4)
Corrosive Gas Not Acceptable Not Acceptable — —
Illumination at
LCD Surface
Notes 1) Temperature and Humidity should be applied to the center glass surface of TFT-LCD module,
not to the system installed with a module.
The temperature at the center of rear surface should be less than 60°C on the condition of operating.
Function of module is guaranteed in above operating temperature range, but optical characteristics
is specified for only 25°C operating condition.
2) Ta 40°C ……… Relative humidity should be less than 85%RH max. Dew is prohibited.
Ta > 40°C ……
3) Frequency of the vibration is between 15Hz and 50Hz. (Remove the resonance point)
4) Pulse width of the shock is 3 ms.
Operating Storage
Min. Max. Min. Max.
4.9
29.4 294
— 50,000 —
Relative humidity should be lower than the moisture of the 85%RH at 40°C.
9.8
m/s
2
50,000 lx —
Note
1.2 ELECTRICAL ABSOLUTE MAXIMUM RATINGS
(1) TFT-LCD Module
Item Symbol Min. Max. Unit Note
V
V
V
V
V
ESD0
ESD1
DD
IL
I
Power Supply Voltage
Differential signal input voltage
Input Voltage for logic
Electrostatic Durability
Notes 1) It is applied to LVDS signal.
2) It is applied to except LVDS signal.
3) Discharge Coefficient: 200pF-0Ω, Environmental: 25°C-70%RH
4) Discharge Coefficient: 200pF-250Ω, Environmental: 25°C-70%RH
5) It is applied to I/F connector pins.
6) It is applied to the surface of a metallic bezel and a LCD panel.
(2) Back-Light
Item Symbol Min. Max. Unit Note
Input Voltage
ON/OFF Control Input Voltage ON/OFF 0 5.0 V
Analog Dimming Signal Voltage
PWM Dimming Signal Voltage PWM 0 5.5 V 1)
Notes 1) These signals can’t input at the same time.
V
IN
V
BC
Vss=0V
0 6.5 V —
0 3.4 V 1)
-0.3 5.0 V 2)
±100 V 3),5)
±8 kV 4),6)
Vss=0V
0 (15.0) V
0 3.6 V 1)
Date PageHitachi Displays, Ltd. May. 20, 2011 DPBC10000118-1
Sh.
No.
5-1/1
Page 6
2. OPTICAL CHARACTERISTICS
The following optical characteristics are measured when the LCD is set alone (apart from driving
circuits and monitor cabinets) and under stable conditions. It takes about 30 minutes to reach stable
conditions. The measuring point is the center of display area unless otherwise noted.
The optical characteristics should be measured in a dark room or equivalent state.
Measuring equipment : KONICA MINOLTA: CS-2000 or equivalent.
Ambient Temperature =25±3°C, V
Item Symbol Condition Min. Typ. Max. Unit Note
Contrast Ratio CR 700 1000 — — 2)
Response Rise ton — (12) (20)
Time Fall toff — (10) (18)
Brightness of white Bwh (420) (500) —
Brightness uniformity Buni 75 — — % 4)
x θ = 0° (0.620) (0.650) (0.680)
y 1) (0.299) (0.329) (0.359)
x (0.271) (0.301) (0.331)
y (0.594) (0.624) (0.654) —
x (0.120) (0.150) (0.180)
y (0.023) (0.053) (0.083)
x (0.313)
y (0.329)
Color
Chromaticity
(CIE)
Red
Green
Blue
White
=5.0V, fV=60Hz, Vin=12V
DD
(0.283)
(0.299)
(0.343)
(0.359)
ms 3)
2
cd/m
Gray scale
= 255
—
Date PageHitachi Displays, Ltd. May. 20, 2011 DPBC10000118-1
Sh.
No.
6-1/2
Page 7
Notes 1) Definition of Viewing Angle
f
=90°
(12 o'clock)
θ=0°
z
y
θ
eye
=180°
(9 o'clock)
TFT-LCD Module
2) Definition of Contrast Ratio (CR)
CR =
3) Definition of Response Time
Displaying
Data Signal
Optical
Response
( Luminance)
(Luminance at displaying WHITE)
(Luminance at displaying BLACK)
%
100
90
10
0
=270°
y'
z'
WhiteBlack Black
ton tof
(6 o'clock)
xx'
(3 o'clock)
=0°
4) Definition of Brightness Uniformity
25%
50%
75%
25% 50% 75%
(1) (2) (3)
(4) (5)
(7) (8) (9)
: measuring points
(6)
Date PageHitachi Displays, Ltd. May. 20, 2011 DPBC10000118-1
Display pattern is white (255 level). The brightness
uniformity is defined as the following equation.
Brightness at each point is measured, and average,
maximum and minimum brightness is calculated.
Buni = × 100
Bmin
Bmax
where, Bmax = Maximum brightness
Bmin = Minimum brightness
Sh.
6-2/2
No.
Page 8
3. ELECTRICAL CHARACTERISTICS
3.1 TFT-LCD MODULE
Ta=25°C, V
Item Symbol Min. Typ. Max. Unit Note
Power Supply Voltage
Power Supply Current
Differential Input Voltage High
For LVDS Receiver Threshold Low
Frame Frequency
One line scanning Frequency
DCLK Frequency
Notes 1)
DC current at f
=60Hz, f
V
CLK
DC Ampere Meter
=66MHz and VDD=5.0V
TFT Module
V
DD
V
SS
V
I
V
V
f
DD
DD
IH
IL
f
V
f
H
CLK
4.5 5.0 5.5 V —
— 0.65 0.85 A
— — +100 mV VCM=1.2V
-100 — — mV VCM=1.2V
55 60 65 Hz 4)
44.8 47.1 52.3 kHz 4)
65 66 73 MHz 4)
2) As this module contains fuse (1.6A), prepare current source that is enough for cutting current
fuse (larger than 4.0A) or set a protection circuit when a trouble happens.
3) The picture on maximum current is white picture.
4) When at low frequency drive, flicker may appear on screen. Therefore, please verify the flicker
level before system design.
SS
1),2),3)
=0V
Date PageHitachi Displays, Ltd. May. 20, 2011 DPBC10000118-1
Sh.
No.
7-1/2
Page 9
3.2 BACK LIGHT
M
Ta=25°C
Item Symbol Min. Typ. Max. Unit Note
Input Voltage
Input Current
ON/OFF ON 2.5 — 5.0 V B/L=ON
Control Voltage OFF 0 — 0.8 V B/L=OFF
Brightness Control Voltage
PWM dimming signal High 2.5 — 5.0 V 3)
Input Voltage Low 0 — 0.8 V
PWM Frequency PWMf 140 150 (160) Hz
V
IN
I
IN
ON/OFF
V
BC
PW
10.8 12.0 13.2 V —
— (1.2) — A —
1.0 — 3.6 V 1), 2)
Dimensions in parentheses are reference value.
Notes 1)
2)
3) Brightness is almost proportional to the on-Duty ratio of PWM signal input.
As for V
, it is recommendable to use more than 1.0V.
BC
If VBC is set less than 1.0V in which brightness becomes less than 20% to the maximum,
display image may look unstable since relative change of brightness tends to become large
by the slight drift of V
Brightness rises almost linearly by increaseing the V
BC
.
in less than 3.0V.
BC
However, brightness is saturated when VBC exceeds 3.0V.
Date PageHitachi Displays, Ltd. May. 20, 2011 DPBC10000118-1
Sh.
No.
7-2/2
Page 10
4. BLOCK DIAGRAM
(1) TFT-LCD Module
LVDS
Timing signals
Display data
CN1
LVDS
Receiver
Tcon
Timing
Converter
G1
G2
Drain Driver
D1
D2
D3840
DC power supply
(2) Back Light Unit
DC power supply
ON/OFF Control
Brightness Control
CN
LED driver
DC/DC
Converter
LED (Series)
LED (Series)
LED (Series)
Gate
Driver
TFT-LCD cell
(IPS-Pro)
G768
Date PageHitachi Displays, Ltd. May. 20, 2011 DPBC10000118-1
Sh.
No.
8-1/1
Page 11
5. INTERFACE PIN ASSIGNMENT
5.1 TFT-LCD MODULE
CN1: JAE: FI-X30SSLA-HF or Equivalent
(Matching connector: JAE: FI-X30HL or FI-X30C2L-NPB or Equivalent)
Pin No. Symbol Function Note
1 VDD
2 VDD
3 VDD
4 VDD
5 VSS
6 VSS
7 VSS
8 VSS
9 TEST1 Test Pin (OPEN) 3)
10 TEST2 Test Pin (OPEN) 3)
11 VSS GND (0V) 1)
12 RX013 RX0+
14 VSS GND (0V) 1)
15 RX116 RX1+
17 VSS GND (0V)
18 RX219 RX2+
20 VSS GND (0V) 1)
21 CLK22 CLK+
23 VSS GND (0V) 1)
24 RX325 RX3+
26 VSS GND (0V) 1)
27 AMODE LVDS Mode Select 5)
28 TEST3 Test Pin (OPEN) 3)
29 TEST4 Test Pin (OPEN) 3)
30 VSS GND (0V) 1)
Notes 1) All Vss pins should be grounded.
2) RXn- and RXn+ (n=0,1,2,3), CLK- and CLK+ should be wired by twist-pairs
or side-by-side FPC patterns, respectively.
3) Please keep open. HITACHI test only.
All V
4)
5) Please refer to page 9-4/6 "LVDS interface"
for LVDS data mapping.
6) Pin assignment is as follows.
pins should be connected to +5.0 V (typ.).
DD
Power Supply (+5.0V) 4)
GND (0V) 1)
Pixel Data 2)
Pixel Data 2)
Pixel Data
1)
Pixel Clock 2)
Pixel Data 2)
1pin
(Figure from top-view)
30pin
Date PageHitachi Displays, Ltd. May. 20, 2011 DPBC10000118-1
Sh.
No.
9-1/6
Page 12
5.2 BACK-LIGHT UNIT
V
)
)
CN2 : TARNG YU Enterprise: TU2001WNR-12S or Equivalent
(Matching connector : JST: PHR-12 or TARNG YU Enterprise: TU2001HNO-12)
Pin No. Symbol
1
2
3
4
V
IN
V
IN
V
IN
V
IN
Power Supply (typ. 12.0
5 ON/OFF High : Backlight ON, Low : Backlight OFF
6
7
8
V
SS
V
SS
V
BC
GND (0V
Brightness Control Signal
9 PWM PWM Dimming Signal
10 FLT LED Fault Signal
11
12
V
SS
V
SS
GND (0V
Notes
pins should be connected to +12.0V (Typ.).
1) V
IN
2) VSS pins should be grounded. The metal bezel is internally connected to GND.
3) High level:2.5 ~ 5.0V, Low level:0 ~ 0.8V
4) High level:2.5 ~ 5.0V, Low level:0 ~ 0.8V
5) Input Voltage : 1.0 ~ 3.6V DC (Brightness becomes maximum at 3.3 +/- 0.3V.)
6) These signals should not be inputted simultaneously. i.e.
when the PWM signal is to be inputted, please set the terminal of V
when the VBC signal is to be inputted, please set the PWM terminal to NC.
7) Depending on the state of the LED string, the following voltage is output.
Voltage Level Condition Definition
2.1～3.3V Normal Operation
0～0.8V LED String Open Circuit One or more strings are occured open circuit.
LED String Short Circuit One or more strings are occured short circuit
If this is not used in particular, please set the terminal of FLT to NC (No Connection).
8) Pin assignment is as follows.
Description Note
－
between string+ and string-.
to NC. Or
BC
1)
4)
2)
5),6)
3),6)
7)
2)
1pin
12pin
(Figure from top-view)
Date PageHitachi Displays, Ltd. May. 20, 2011 DPBC10000118-1
Sh.
No.
9-2/6
Page 13
BLOCK DIAGRAM OF INTERFACE
System device side TFT module side
LVDS Transmitter
TxIN
R0~R7
CN1
Rx0+
Rx0-
LVDS Receiver
RxOUT
Rx1+
G0~G7
TTL
B0~B7
Parallel-to-LVDS
DTMG
Rx1-
Rx2+
Rx2-
Rx3+
Rx3-
Parallel
LVDS-to-TTL
termination termination termination termination
CLK+
DCLK DCLK
Host
PLL
CLK-
termination
PLL
Graphics
Controller
Receiver: Equivalent of THC63LVDF84B by THine
R0~R7
G0~G7
B0~B7
DTMG
LCD Panel
Controller
R0~7 : R data
G0~7 : G data
B0~7 : B data
DTMG : Display timing data
Notes 1) The system must have a LVDS transmitter to drive a module.
2) The impedance of LVDS cable shall be about 100 ohms per twist-pair line
when it is used differentially.
Date PageHitachi Displays, Ltd. May. 20, 2011 DPBC10000118-1
Sh.
No.
9-3/6
Page 14
LVDS INTERFACE
A
K
K
K
A
K
K
27pin Transmitter Interface Connector Receiver TFT Control
MODE Pin Input System Device TFT Module Pin Output Input
=L (GND)
Signal
R0 (LSB) 51 TxIN0 27 RxOUT0 R0 (LSB)
R1 52 TxIN1 29 RxOUT1 R1
R2 54 TxIN2 Tx OUT0+ Rx IN0+ 30 RxOUT2 R2
R3 55 TxIN3 32 RxOUT3 R3
R4 56 TxIN4 33 RxOUT4 R4
R5 3 TxIN6 Tx OUT0- Rx IN0- 35 RxOUT6 R5
G0 (LSB) 4 TxIN7 37 RxOUT7 G0 (LSB)
G1 6 TxIN8 38 RxOUT8 G1
G2 7 TxIN9 39 RxOUT9 G2
G3 11 TxIN12 Tx OUT1+ Rx IN1+ 43 RxOUT12 G3
G4 12 TxIN13 45 RxOUT13 G4
G5 14 TxIN14 46 RxOUT14 G5
B0 (LSB) 15 TxIN15 Tx OUT1- Rx IN1- 47 RxOUT15 B0 (LSB)
B1 19 TxIN18 51 RxOUT18 B1
B2 20 TxIN19 53 RxOUT19 B2
B3 22 TxIN20 54 RxOUT20 B3
B4 23 TxIN21 Tx OUT2+ Rx IN2+ 55 RxOUT21 B4
DCL
24 TxIN22 1 RxOUT22 B5
RSVD 1) 27 TxIN24 3 RxOUT24 Not use
RSVD 1) 28 TxIN25 Tx OUT2- Rx IN2- 5 RxOUT25 Not use
DTMG 30 TxIN26 6 RxOUT26 DTMG
R6 50 TxIN27 7 RxOUT27 R6
R7 (MSB) 2 TxIN5 34 RxOUT5 R7 (MSB)
G6 8 TxIN10 Tx OUT3+ Rx IN3+ 41 RxOUT10 G6
G7 (MSB) 10 TxIN11 42 RxOUT11 G7 (MSB)
B6 16 TxIN16 49 RxOUT16 B6
B7 (MSB) 18 TxIN17 Tx OUT3- Rx IN3- 50 RxOUT17 B7 (MSB)
RSVD 1) 25 TxIN23 2 RxOUT23 Not use
DCL
31 TxCLK IN TxCLK OUT+ RxCLK IN+ 26 RxCLK OUT DCL
TxCLK OUT- RxCLK IN-
27pin Transmitter Interface Connector Receiver TFT Control
MODE Pin Input System Device TFT Module Pin Output Input
Signal
R2 51 TxIN0 27 RxOUT0 R2
R3 52 TxIN1 29 RxOUT1 R3
R4 54 TxIN2 Tx OUT0+ Rx IN0+ 30 RxOUT2 R4
R5 55 TxIN3 32 RxOUT3 R5
R6 56 TxIN4 33 RxOUT4 R6
R7 (MSB) 3 TxIN6 Tx OUT0- Rx IN0- 35 RxOUT6 R7 (MSB)
G2 4 TxIN7 37 RxOUT7 G2
G3 6 TxIN8 38 RxOUT8 G3
G4 7 TxIN9 39 RxOUT9 G4
G5 11 TxIN12 Tx OUT1+ Rx IN1+ 43 RxOUT12 G5
G6 12 TxIN13 45 RxOUT13 G6
G7 (MSB) 14 TxIN14 46 RxOUT14 G7 (MSB)
B2 15 TxIN15 Tx OUT1- Rx IN1- 47 RxOUT15 B2
B3 19 TxIN18 51 RxOUT18 B3
=H (3.3V)
B4 20 TxIN19 53 RxOUT19 B4
B5 22 TxIN20 54 RxOUT20 B5
B6 23 TxIN21 Tx OUT2+ Rx IN2+ 55 RxOUT21 B6
B7 (MSB) 24 TxIN22 1 RxOUT22 B7 (MSB)
RSVD 1) 27 TxIN24 3 RxOUT24 Not use
RSVD 1) 28 TxIN25 Tx OUT2- Rx IN2- 5 RxOUT25 Not use
DTMG 30 TxIN26 6 RxOUT26 DTMG
R0 (LSB) 50 TxIN27 7 RxOUT27 R0 (LSB)
R1 2 TxIN5 34 RxOUT5 R1
G0 (LSB) 8 TxIN10 Tx OUT3+ Rx IN3+ 41 RxOUT10 G0 (LSB)
G1 10 TxIN11 42 RxOUT11 G1
B0 (LSB) 16 TxIN16 49 RxOUT16 B0 (LSB)
B1 18 TxIN17 Tx OUT3- Rx IN3- 50 RxOUT17 B1
RSVD 1) 25 TxIN23 2 RxOUT23 Not use
DCL
31 TxCLK IN TxCLK OUT+ RxCLK IN+ 26 RxCLK OUT DCL
TxCLK OUT- RxCLK IN-
Note 1) RSVD (reserved) pins on the transmitter shall be "H" or "L".
Date PageHitachi Displays, Ltd. May. 20, 2011 DPBC10000118-1
No.
9-4/6
Sh.
Page 15
CORRESPONDENCE BETWEEN INPUT DATA AND DISPLAY IMAGE
R0~R7 : R data
(1, 1) G0~G7 : G data
B0~B7 : B data
RGB
1, 1 1, 2 1, 3 1, 1280
2, 1 2, 2 2, 3 2, 1280
3, 1 3, 2
768, 1 768, 2 768, 3 768, 1280
DCLK
R0~R7
4)
G0~G7
B0~B7
DTMG
INVALID
3, 3 3, 1280
1, 2
1, 1279 1, 12801, 1 2, 1 2, 2
INVALID
Date PageHitachi Displays, Ltd. May. 20, 2011 DPBC10000118-1
Sh.
No.
9-5/6
Page 16
RELATIONSHIP BETWEEN DISPLAY COLORS AND INPUT SIGNALS
Input data R data G data B data
R3
Color MSB LSB MSB LSB MSB LSB
000000000000000 00000
…
…
1
0
0
0
1
1
1
0
0
0
…
1111 110000 000000 00
0000 001111 110000 00
0000 000000 00 01111 11
0000 001111 111111 11
1111 110000 001111 11
1111 111111 110000 00
1111 111111 111111 11
0000 000000 000000 00
0000 010000 000000 00
0000 100000 000000 00
…
…
…
…
…
…
Basic
Color
Red
Black
Red (255)
Green (255)
Blue (255)
Cyan
Magenta
Yellow
White
Black
Red (1)
Red (2)
…
…
R1 R0 G7R2 G6 G5 G4 G1R7 R6 R5 R4 G0 B7 B6 B5 B4 B1 B0
1
0
0
0
1
1
1
0
0
0
…
…
…
…
…
…
…
…
…
…
…
…
G3
00
11
0
1
0
1
1
00
00
00
………
…
…
G2
B3 B2
000
0
0
0
0
1
1
…
…
1
1
1
1
0
0
1
1
0
0
0
0
0
0
…
…
…
…
1
0
1
1
…
…
…
…
…
…
…
…
…
…
…
…
…
0
…
…
Green
Blue
Red (254)
Red (255)
Black
Green (1)
Green (2)
…
……
Green (254)
Green (255)
Black
Blue (1)
Blue (2)
…
Blue (254)
Blue (255)
1111 100
11
0000
0000 000000 000 10000 00
0000 000000 100 00000 00
…
…
0000 001
0
0000 000000 000 00000 00
0000 000000 000 00000 01
0000 000000 000 00000 10
…
…
0000 000 1000 000 1 10
…
…
0
…
…
11
…
…
00
…
…
…
…
…
…
1
1
0
0
0
…
……
0
0
0
0
0
…
…
0
Notes 1) Definition of gray scale: Color (n)
n indicates gray scale level. Higher n means brighter level.
2) Data signals: 1: High, 0: Low
00000000
00
1
110
1
000000 00 00000 00
0
0
0
…
…
…
0
0
0
0
0
……
0
0
…
…
…
001
…
…
…
…
000
0
00 000000
…
…
…
…
…
…
111 111 0
111 111 10000 00
…
…
…
…
…
…
00
00
0
………
………
………
………
…
…
…
…
…
…
…
…
…
…
…
…
00 0 000
…
…
…
…
…
…
…
…
011
0
00
000
0
0
0
0
0
0
…
…
…
…
11000 0000000
0
……
……
0
0
0
0
0
0
0
0
0
0
……
……
1
1
1
1
…
…
…
…
…
…
…
…
101110
Date PageHitachi Displays, Ltd. May. 20, 2011 DPBC10000118-1
Sh.
No.
9-6/6
Page 17
6. TIMING DIAGRAMS OF INTERFACE TIMING
K
K
K
K
K
K
K
K
K
K
K
K
K
K
K
K
K
K
K
V
V
K
V
6.1 LVDS RECEIVER TIMING
(Interface of TFT module)
t
t
RP5
t
RP6
t
RP0
t
RP1
RP4
t
RP3
t
RP2
RinX
Rx6 Rx5 Rx4 Rx3 Rx2 Rx1 Rx0
CLK+
RinX=(RinX+) - (RinX-) (X=0,1,2)
Item Symbol Min. Typ. Max.
DCLK Frequency
RinX 0 data position
(X=0,1,2) 1st data position
2nd data position
3rd data position
4th data position
5th data position
6th data position
1/t
t
t
t
t
t
t
t
CL
RP0
RP1
RP2
RP3
RP4
RP5
RP6
t
CL
diff=0V
65 66 73
1/7t
-0.29 1/7t
CL
CL
1/7t
-0.29 0 +0.29
6/7t
5/7t
4/7t
3/7t
2/7t
-0.29 6/7t
CL
-0.29 5/7t
CL
-0.29 4/7t
CL
-0.29 3/7t
CL
-0.29 2/7t
CL
CL
CL
CL
CL
CL
6/7t
5/7t
4/7t
3/7t
2/7t
CL
CL
CL
CL
CL
CL
+0.29
+0.29
+0.29
+0.29
+0.29
+0.29
diff=0V
diff=0V
Unit Note
MHz
ns
Date PageHitachi Displays, Ltd. May. 20, 2011 DPBC10000118-1
Sh.
10-1/3
No.
Page 18
6.2 TIMING CONVERTER TIMING
K
K
K
V
V
V
V
(Input timing for transmitter)
DTMG
DTMG
D
CLK
T
T
VD
T
H
T
HD
t
CLK
DATA
SIGNALS
DCLK
DTMG
Item Symbol Min.
Cycle time
Duty
Horizontal period
Horizontal width-Active
Vertical period
Vertical width-Active
Frame frequency
t
CL
D 0.35 0.5 0.65 -
T
T
HD
T
T
f
t
CLK
Typ.
Max.
Unit Note
13.7 15.1 15.4 ns
H
1396 1406 1450
1280 1280 1280
773 783 825
D
768 768 768
t
CL
t
CL
T
H
T
H
55 60 65 Hz
Date PageHitachi Displays, Ltd. May. 20, 2011 DPBC10000118-1
Sh.
10-2/3
No.
Page 19
6.3 TIMING BETWEEN INTERFACE SIGNALS AND POWER SUPPLY
V
V
Power supply voltage V
0.9V
DD
0.1V
DD
0
TPR
Input signals V
0
I
Back-Light
DD
TINTDR TDF
valid
ON
TBR TBF
Timing of power supply voltage and input signals should be used under
the following specifications.
1ms
40ms
20ms
TPR
TDR
TDF
TIN
TBR
TBF
10ms
50ms
1s
500ms
100ms
Date PageHitachi Displays, Ltd. May. 20, 2011 DPBC10000118-1
Sh.
10-3/3
No.
Page 20
)
)
)
)
7. DIMENSIONAL OUTLINE
Note1)Interface connector (CN1
JAE: FI-X30SSLA-HF or equivalent
2)Converter PCB connector (CN2
TARNG YU Enterprise: TU2001WNR-12S or equivalent
3)Dimension in parentheses are reference value.
The unspecified tolerance: ±0.5mm
4)Hole in mouting panel: M3: 6 holes (right and left side), M4: 6 holes (upper and lower side
5)Maximum torque for the screw in mounting panel : 0.294N・m (3kgf・cm
6) There are all screws attached to side of the module.
Hitachi Displays, Ltd. Date May. 20, 2011 DPBC10000118-1 Page 11-1/1
Sh.
No.
Unit: mm
Scale:NTS
Loading...