查询IXTH8P50供应商
Standard Power MOSFET
P-Channel Enhancement Mode
Avalanche Rated
Symbol Test Conditions Maximum Ratings
V
DSS
V
DGR
V
GS
V
GSM
I
D25
I
DM
I
AR
E
AR
P
D
T
J
T
JM
T
stg
TJ= 25°C to 150°C -500 V
TJ= 25°C to 150°C; RGS = 1 MΩ -500 V
Continuous ±20 V
Transient ±30 V
TC= 25°C -11 A
TC= 25°C, pulse width limited by T
TC= 25°C -11 A
TC= 25°C30mJ
TC= 25°C 300 W
IXTH 11P50
IXTT 11P50
J
-55 ... +150 ° C
-55 ... +150 °C
-44 A
150 °C
V
I
D25
R
DSS
DS(on)
= -500 V
= -11 A
= 0.75
TO-247 AD (IXTH)
TO-268 (IXTT) Case Style
G
S
G = Gate D = Drain
S = Source TAB = Drain
ΩΩ
Ω
ΩΩ
(TAB)
D
(TAB)
D
T
L
M
d
Maximum lead temperature for soldering 300 °C
1.6 mm (0.062 in.) from case for 10 s
Mounting torque (TO-247) 1.13/10 Nm/lb.in.
Weight TO-247 AD 6 g
TO-268 4 g
Symbol Test Conditions Characteristic Values
(TJ = 25°C, unless otherwise specified)
min. typ. max.
V
V
I
I
R
DSS
GS(th)
GSS
DSS
DS(on)
VGS= 0 V, ID = -250 µA -500 V
BV
Temperature Coefficient 0.054 %/K
DSS
VDS= VGS, ID = -250 µA -3.0 -5.0 V
V
Temperature Coefficient -0.122 %/K
GS(th)
VGS= ±20 VDC, VDS = 0 ±100 nA
VDS= 0.8 • V
VGS= 0 V TJ = 125°C-1mA
DSS
VGS= -10 V, ID = 0.5 • I
R
Temperature Coefficient 0.6 %/K
DS(on)
TJ =25°C -200 µA
D25
0.75 Ω
Features
z
International standard packages
z
Low R
z
Rugged polysilicon gate cell structure
z
Unclamped Inductive Switching (UIS)
HDMOSTM process
DS (on)
rated
z
Low package inductance
- easy to drive and to protect
Advantages
z
Easy to mount
z
Space savings
z
High power density
© 2005 IXYS All rights reserved
DS94535J(01/05)
IXTH 11P50
IXTT 11P50
Symbol Test Conditions Characteristic Values
(TJ = 25°C, unless otherwise specified)
min. typ. max.
g
C
C
C
t
t
t
t
Q
Q
Q
R
R
fs
iss
oss
rss
d(on)
r
d(off)
f
G(on)
GS
GD
thJC
thCS
VDS= -10 V; ID = I
, pulse test 5 9 S
D25
4700 pF
VGS= 0 V, VDS = -25 V, f = 1 MHz 430 pF
135 pF
33 ns
VGS= -10 V, VDS = 0.5 V
, ID = 0.5 I
DSS
D25
27 ns
RG = 4.7 Ω (External) 35 ns
35 ns
130 nC
VGS= -10 V, VDS = 0.5 V
, ID = 0.5 I
DSS
D25
46 nC
92 nC
0.42 K/W
(TO-247) 0.25 K/W
Source-Drain Diode Characteristic Values
(TJ = 25°C, unless otherwise specified)
Symbol Test Conditions min. typ. max.
TO-247 AD Outline
1 2 3
Terminals: 1 - Gate 2 - Drain
TO-268 Outline
3 - Source Tab - Drain
Dim. Millimeter Inches
Min. Max. Min. Max.
A 4.7 5.3 .185 .209
A
2.2 2.54 .087 .102
1
A
2.2 2.6 .059 .098
2
b 1.0 1.4 .040 .055
1.65 2.13 .065 .084
b
1
b22.87 3.12 .113 .123
C .4 .8 .016 .031
D 20.80 21.46 .819 .845
E 15.75 16.26 .610 .640
e 5.20 5.72 0.205 0.225
L 19.81 20.32 .780 .800
L1 4.50 .177
∅P 3.55 3.65 .140 .144
Q 5.89 6.40 0.232 0.252
R 4.32 5.49 .170 .216
S 6.15 BSC 242 BSC
I
S
I
SM
V
SD
t
rr
VGS= 0 10P50 -10 A
11P50 -11 A
Repetitive; pulse width limited by TJM10P50 -40 A
11P50 -44 A
IF = IS, VGS = 0 V, -3 V
Pulse test, t ≤ 300 µs, duty cycle d ≤ 2 %
IF = IS, di/dt = 100 A/µs 500 ns
Terminals: 1 - Gate 2 - Drain
3 - Source Tab - Drain
IXYS reserves the right to change limits, test conditions, and dimensions.
IXYS MOSFETs and IGBTs are covered by 4,835,592 4,931,844 5,049,961 5,237,481 6,162,665 6,404,065 B1 6,683,344 6,727,585
one or moreof the following U.S. patents: 4,850,072 5,017,508 5,063,307 5,381,025 6,259,123 B1 6,534,343 6,710,405B2 6,759,692
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