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“iWave Systems Tech. Pvt. Ltd.”
Document Revision History
Rev 2.0
Page 2 of 164
Generic Qseven Carrier Board Hardware User Guide
iWave Systems Technologies Pvt. Ltd.
Disclaimer
iWave Systems reserves the right to change details in this publication including but not limited to any
Product specification without notice.
No warranty of accuracy is given concerning the contents of the information contained in this
publication. To the extent permitted by law no liability (including liability to any person by reason of
negligence) will be accepted by iWave Systems, its subsidiaries or employees for any direct or indirect
loss or damage caused by omissions from or inaccuracies in this document.
Trademarks
All registered trademarks and product names mentioned in this publication are used for identification
purposes only.
Technical Support
iWave Systems technical support team is committed to provide the best possible support for our
customers so that our Hardware and Software can be easily migrated and used.
For assistance, contact our Technical Support team at,
Figure 44: Power Jack ............................................................................................................................... 141
Figure 45: Power Sequence to Qseven CPU Module ................................................................................ 142
Table 47: Power Jack Pin Out .................................................................................................................... 141
Table 48: Power Output to Qseven CPU Modules .................................................................................... 142
Table 49: Power Sequence Timing to Qseven CPU Module ..................................................................... 142
Table 50: Carrier Board Expansion Connector pin-out based on i.MX6 SOM .......................................... 146
Table 51: Carrier Board Expansion Connector pin-out based on AM389x SOM ...................................... 152
Table 52: Carrier Board Expansion Connector pin-out based on i.MX51 SOM ........................................ 158
Rev 2.0
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Generic Qseven Carrier Board Hardware User Guide
iWave Systems Technologies Pvt. Ltd.
Acronyms
Description
AC’97
Audio Codec ‘97
ARM
Advanced RISC Machine
BPP
Bits Per Pixel
CAN
Controller Area Network
CSI
Camera Sensor Interface
GBE
Gigabit Ethernet
GPIO
General Purpose Input Output
HDMI
High-Definition Multimedia Interface
1 INTRODUCTION
1.1 Purpose
This document is the Hardware Reference Manual for the Qseven Generic Carrier Board. This board is
fully supported by iWave Systems Technologies Pvt. Ltd. This Manual includes system setup, debugging
and provides detailed information on the overall design and usage of the Qseven Generic Carrier Board
from a Hardware Systems perspective.
1.2 Qseven Overview
The Qseven concept is an off-the-shelf, multi-vendor, Single-Board-Computer that integrates all the core
components of a common PC and is mounted onto an application specific carrier board. Qseven
modules have a standardized form factor of 70mm x 70mm and have specified pinouts based on the
high speed MXM system connector that has a standardized pinout regardless of the vendor.
The Qseven module provides the functional requirements for an embedded application. These functions
include, but are not limited to, graphics, sound, mass storage, network and multiple USB ports. A single
ruggedized MXM connector provides the carrier board interface to carry all the I/O signals to and from
the Qseven module. This MXM connector is a well-known and proven high speed signal interface
connector that is commonly used for high speed PCI Express graphics cards in notebooks.
iWave’s Qseven Generic carrier board is also incorporated with additional two 80pin expansion
connectors which can be used to connect iWave’s Qseven CPU modules. These Expansion connectors
bring the additional interfaces to carrier board which are not supported by Qseven Edge connector.
1.3 List of Acronyms
The following acronyms will be used throughout this document.
This section is designed to provide detailed information about the electrical design and practical
considerations that went into the Qseven Generic Carrier Board. This section is organized to discuss
each block in the following high level block diagram, as shown below.
Qseven Generic Carrier Board supports the following features to validate Qseven Edge Connector
Interfaces and iWave’s Qseven CPU Module specific Expansion Connector interfaces.
Qseven Edge Connector Features
Serial Interface Features
Debug UART console through DB9 Connector
UART0 header for iWave GPS
Communication Features
10/100/1000 Mbps Ethernet through RJ45MagJack
SDIO Ports
USB 2.0 Host x 2 Ports through Type-A Stacked Connector
Mini PCIe connector with USB 2.0 Host Interface²
USB 2.0 OTG Port through Mini AB Connector
CAN port1 through DB9 Connector
High Speed Interface Features
SATA
22pin Serial ATA Connector for SATA port0
7pin Serial ATA Connector for SATA port1
PCI Express
4-port PCIe Switch through PCIe Port0
Mini PCIe Connector through PCIe Switch Port1²
PCIe x1 Connector through PCIe Switch Port2
PCIe to USB 3.0 Hub controller through PCIe Switch Port3 for USB 3.0 Host x 2
PCIe Port 2 - SMD Pad Header
PCIe Port 3 - SMD Pad Header
Rev 2.0
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iWave Systems Technologies Pvt. Ltd.
Audio/Video Features
AC’97 Audio Codec with 3.5mm Audio IN/OUT jack
LVDS Display Interface
SPI Header
LPC Header
SDVO Header
Qseven control signal Header
Note:
1. Either 8-bit MMC/SDIO or Wi-Fi Module only can be used at a time.
2. Mini PCIe connector supports both USB interface and PCIe interface.
3. Either LVDS0 connector or 7” RGB resistive LCD or 7” RGB capacitive LCD can be used at a time.
Rev 2.0
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iWave Systems Technologies Pvt. Ltd.
iWave’s Qseven CPU Module specific Expansion Connector Features
UART2 Header
CAN port2 connector
TV-In Composite Video through RCA Jack
8bit CMOS Camera Connector
MIPI Camera Connector
4X4 Keypad Header
TV Out Composite Video Header
VGA Interface Header
120-pin Carrier Board Expansion Connector
General Specification
Power Supply : 12V, 2A Power Input Jack
LED Indicators
Power Indicator Red LEDs
Reset Indicator Red LED
Temperature : 0°C to +60°C
Form Factor : 120mm X 120mm Nano ITX
Rev 2.0
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iWave Systems Technologies Pvt. Ltd.
2.3 Qseven MXM Connector
The Qseven module utilizes a 230-pin board-edge connector that is also used for PCI Express capable
notebook graphics cards following the MXM specification. Therefore this connector type is also known
as MXM connector. The MXM connector (J12) is a robust, low-cost edge connector that is capable of
handling high-speed serialized signals.
Display ID DDC data line used for LVDS
flat panel detection.
126
eDP0_HPD#/
LVDS_BLC_DAT
Input/Output
3.3V CMOS/
4.7K Pull-up
Control data signal for external SSC
clock chip.
127
GP2_I2C_CLK/
LVDS_DID_CLK
Input
3.3V CMOS/
4.7K Pull-up
Display ID DDC clock line used for LVDS
flat panel detection.
128
eDP1_HPD#/
LVDS_BLC_CLK
Input
3.3V CMOS/
4.7K Pull-up
Control clock signal for external SSC
clock chip.
129
CAN0_TX
Input
3.3V CMOS
CAN channel one TX line.
130
CAN0_RX
Output
3.3V CMOS
CAN channel one RX line
131
DP_LANE3+/
TMDS_CLK+
Input
TMDS
HDMI differential clock positive.
132
RSVD2
(Differential Pair)
NC
NC
Default NC.
Connected to 2nd Pin of SDVO Header
(J47) through resistor and default not
populated.
133
DP_LANE3-/
TMDS_CLK-
Input
TMDS
HDMI differential clock negative
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134
RSVD3
(Differential Pair)
NC
NC
Default NC.
Connected to 4th Pin of SDVO Header
(J47) through resistor and default not
populated.
135
GND17
Power
0V
Ground.
136
GND18
Power
0V
Ground.
137
DP_LANE1+/
TMDS_LANE1+
Input
TMDS
HDMI differential data1 positive.
138
DP_AUX+
Input/Output
TMDS
HDMI differential device control data
positive.
Default NC.
Connected to 6th Pin of SDVO Header
(J47) through resistor and default not
populated.
139
DP_LANE1-/
TMDS_LANE1-
Input
TMDS
HDMI differential data1 negative.
140
DP_AUX-
Input/Output
TMDS
HDMI differential device control data
negative.
Default NC.
Connected to 8th Pin of SDVO Header
(J47) through resistor and default not
populated.
141
GND19
Power
0V
Ground.
142
GND20
Power
0V
Ground.
143
DP_LANE2+/
TMDS_LANE0+
Input
TMDS
HDMI differential data0 positive.
144
RSVD4
(Differential Pair)
Input
TMDS
Default NC.
Connected to 10th Pin of SDVO Header
(J47) through resistor and default not
populated.
145
DP_LANE2-/
TMDS_LANE0-
Input
TMDS
HDMI differential data0 negative.
146
RSVD5
(Differential Pair)
NC
NC
Default NC.
Connected to 12th Pin of SDVO Header
(J47) through resistor and default not
populated.
Rev 2.0
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147
GND21
Power
0V
Ground.
148
GND22
Power
0V
Ground.
149
DP_LANE0+/
TMDS_LANE2+
Input
TMDS
HDMI differential data2 positive.
150
HDMI_CTRL_DAT
Input/Output
3.3V CMOS
I2C2 Data signal.
151
DP_LANE0-/
TMDS_LANE2-
Input
TMDS
HDMI differential data2 negative.
152
HDMI_CTRL_CLK
Input
3.3V CMOS/
4.7K Pull-up
I2C2 Clock signal.
153
DP_HDMI_HPD#
Output
3.3V CMOS
HDMI Hot Plug Detect.
154
RSVD6
NC
NC
Default NC.
Connected to 9th Pin of SDVO Header
(J47) through resistor and default not
populated.
155
PCIE_CLK_REF+
Input
Differential
PCIe differential reference clock
positive.
156
PCIE_WAKE#
Output
3.3V CMOS
PCIe interface wake up signal.
157
PCIE_CLK_REF-
Input
Differential
PCIe differential reference clock
negative.
158
PCIE_RST#
Input
3.3V CMOS
PCIe Reset.
159
GND23
Power
0V
Ground.
160
GND24
Power
0V
Ground.
161
PCIE3_TX+
Input
Differential
PCIe3 differential transmit line positive.
162
PCIE3_RX+
Output
Differential
PCIe3 differential receive line positive.
163
PCIE3_TX-
Input
Differential
PCIe3 differential transmit line negative.
164
PCIE3_RX-
Output
Differential
PCIe3 differential receive line negative.
165
GND25
Power
0V
Ground.
166
GND26
Power
0V
Ground.
167
PCIE2_TX+
Input
Differential
PCIe2 differential transmit line positive.
168
PCIE2_RX+
Output
Differential
PCIe2 differential receive line positive.
169
PCIE2_TX-
Input
Differential
PCIe2 differential transmit line negative.
170
PCIE2_RX-
Output
Differential
PCIe2 differential receive line negative.
171
UART0_TX
Input
3.3V CMOS
UART3 Transmit signal.
172
UART0_RTS#
Input
3.3V CMOS
UART3 RTS signal.
173
PCIE1_TX+
Input
Differential
PCIe1 differential transmit line positive.
174
PCIE1_RX+
Output
Differential
PCIe1 differential receive line positive.
Rev 2.0
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iWave Systems Technologies Pvt. Ltd.
175
PCIE1_TX-
Input
Differential
PCIe1 differential transmit line negative.
176
PCIE1_RX-
Output
Differential
PCIe1 differential receive line negative.
177
UART0_RX
Output
3.3V CMOS
UART3 Receive signal.
178
UART0_CTS#
Output
3.3V CMOS
UART3 CTS signal.
179
PCIE0_TX+
Input
Differential
PCIe0 differential transmit line positive.
180
PCIE0_RX+
Output
Differential
PCIe0 differential receive line positive.
181
PCIE0_TX-
Input
Differential
PCIe0 differential transmit line negative.
182
PCIE0_RX-
Output
Differential
PCIe0 differential receive line negative.
183
GND27
Power
0V
Ground.
184
GND28
Power
0V
Ground
185
LPC_AD0/GPIO0
Input/Output
3.3V CMOS
GPIO.
Connected to Touch Controller interrupt
and to 5th Pin of LPC Header (J34).
186
LPC_AD1/GPIO1
Input/Output
3.3V CMOS
GPIO.
Connected to Digital eCompass
interrupt & 6th Pin of LPC Header (J34).
187
LPC_AD2/GPIO2
Input/Output
3.3V CMOS
GPIO.
Connected to 3-Axis Accelerometer
interrupt & 7th Pin of LPC Header (J34).
188
LPC_AD3/GPIO3
Input/Output
3.3V CMOS
GPIO.
Connected to Ambient Light Sensor
interrupt & 8th Pin of LPC Header (J34).
189
LPC_CLK/GPIO4
Input/Output
3.3V CMOS
GPIO.
Connected to Altimeter/ Barometer
interrupt & 9th Pin of LPC Header (J34).
190
LPC_FRAME#/
GPIO5
Input/Output
3.3V CMOS
GPIO.
Connected to SATA and to 10th Pin of
LPC Header (J34).
191
SERIRQ/GPIO6
Input/Output
3.3V CMOS
GPIO
Connected to MIPI power down signal
and to 11th Pin of LPC Header (J34).
192
LPC_LDRQ#/
GPIO7
Input/Output
3.3V CMOS
GPIO.
Connected to USB power switch and to
12th Pin of LPC Header (J34).
193
VCC_RTC
Power
3V
RTC battery voltage input.
Rev 2.0
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iWave Systems Technologies Pvt. Ltd.
194
SPKR/
GP_PWM_OUT2
Input
3.3V CMOS
PWM used to control the LVDS LCD
Backlight.
195
FAN_TACHOIN/
GP_TIMER_IN
Output
3.3V CMOS
Fan tachometer input.
Default NC.
Connected to 5th Pin of SDVO Header
(J47) through resistor and default not
populated.
196
FAN_PWMOUT/
GP_PWM_OUT1
Input
3.3V CMOS
Fan PWM input.
Default NC.
Connected to 7th Pin of SDVO Header
(J47) through resistor and default not
populated.
197
GND29
Power
0V
Ground.
198
GND30
Power
0V
Ground.
199
SPI_MOSI
Input/Output
3.3V CMOS
SPI Master Out Slave In.
Connected to 4th Pin of SPI Header (J29).
200
SPI_CS0#
Input
3.3V CMOS
SPI chip select 0.
Connected to 1st Pin of SPI Header (J29).
201
SPI_MISO
Input/Output
3.3V CMOS
SPI Master In Slave Out.
Connected to 2nd Pin of SPI Header
(J29).
202
SPI_CS1#
Input
3.3V CMOS
SPI chip select 1.
Connected to 7th Pin of SPI Header (J29).
203
SPI_SCK
Input
3.3V CMOS
SPI clock input.
Connected to 5th Pin of SPI Header (J29).
204
MFG_NC4
Output
3.3V CMOS
JTAG Reset Output.
205
VCC_5V_SB1
Power
5V
Standby Power Supply.
206
VCC_5V_SB2
Power
5V
Standby Power Supply.
207
MFG_NC0
Output
3.3V CMOS
JTAG Test Clock.
208
MFG_NC2
Output
3.3V CMOS
Debug UART RX data line UART2_RXD
(EIM_D27).
209
MFG_NC1
Input
3.3V CMOS
Debug UART TX data line. UART2_TXD
(EIM_D26).
210
MFG_NC3
Output
3.3V CMOS
JTAG Test Mode Select.
211
VCC1
Power
5V
Input Supply Voltage.
212
VCC2
Power
5V
Input Supply Voltage.
Rev 2.0
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iWave Systems Technologies Pvt. Ltd.
213
VCC3
Power
5V
Input Supply Voltage.
214
VCC4
Power
5V
Input Supply Voltage.
215
VCC5
Power
5V
Input Supply Voltage.
216
VCC6
Power
5V
Input Supply Voltage.
217
VCC7
Power
5V
Input Supply Voltage.
218
VCC8
Power
5V
Input Supply Voltage.
219
VCC9
Power
5V
Input Supply Voltage.
220
VCC10
Power
5V
Input Supply Voltage.
221
VCC11
Power
5V
Input Supply Voltage.
222
VCC12
Power
5V
Input Supply Voltage.
223
VCC13
Power
5V
Input Supply Voltage.
224
VCC14
Power
5V
Input Supply Voltage.
225
VCC15
Power
5V
Input Supply Voltage.
226
VCC16
Power
5V
Input Supply Voltage.
227
VCC17
Power
5V
Input Supply Voltage.
228
VCC18
Power
5V
Input Supply Voltage.
229
VCC19
Power
5V
Input Supply Voltage.
230
VCC20
Power
5V
Input Supply Voltage.
Rev 2.0
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Generic Qseven Carrier Board Hardware User Guide
iWave Systems Technologies Pvt. Ltd.
2.4 Serial Interface Features
2.4.1 Debug UART console
Debug UART signals from Qseven MXM connector is connected to RS232 Transceiver and to DB9 Male
Debug UART Connector (J26A). This DB9 port can be used for Debug purpose. This is not the full
functional UART and supports only TX and RX signals.
Figure 3: Debug UART Connector
Rev 2.0
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Generic Qseven Carrier Board Hardware User Guide
iWave Systems Technologies Pvt. Ltd.
Pin No
Pin Name
Signal Type
Voltage Level/
Termination
Description
A1
NC
NC
NC
NC.
A2
UART_RXD
Input
RS232
Debug UART receive signal.
Connected to 208th Pin of Qseven
MXM Connector through RS232.
Transceiver.
A3
UART_TXD
Output
RS232
Debug UART transmit signal.
Connected to 209th Pin of Qseven
MXM Connector through RS232.
Transceiver.
A4
NC
NC
NC
NC.
A5
GND
Power
0V
Ground.
A6,A7,A8,
A9
NC
NC
NC
NC.
M1,M2,
M3,M4
DSUB_SHLD_GND
Power
0V
Shield Ground.
Table 3: Debug UART Connector Pin Out
2.4.2 UART0 header for iWave GPS
Qseven Generic Carrier Board supports on board UART0 header (J2) through UART0 interface of Qseven
MXM connector. This header can be used to connect iWave’s GPS module and physically located on the
top of the board as shown below.
Number of Pins: 6
Connector Part number: GRPB061VWVN-RC
Mating Connector: LPPB061NFFN-RC from Sullins Connector Solutions
Rev 2.0
Page 30 of 164
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