ISSI IS61LV25616AL User Manual
IS61LV25616AL ISSI
®
256K x 16 HIGH SPEED ASYNCHRONOUS
CMOS STATIC RAM WITH 3.3V SUPPLY
FEATURES
• High-speed access time:
— 10, 12 ns
• CMOS low power operation
• Low stand-by power:
— Less than 5 mA (typ.) CMOS stand-by
• TTL compatible interface levels
• Single 3.3V power supply
• Fully static operation: no clock or refresh
required
• Three state outputs
• Data control for upper and lower bytes
• Industrial temperature available
DESCRIPTION
The ISSI IS61LV25616AL is a high-speed, 4,194,304-bit
static RAM organized as 262,144 words by 16 bits. It is
fabricated using ISSI's high-performance CMOS technology. This highly reliable process coupled with innovative
circuit design techniques, yields high-performance and low
power consumption devices.
When CE is HIGH (deselected), the device assumes a
standby mode at which the power dissipation can be
reduced down with CMOS input levels.
Easy memory expansion is provided by using Chip Enable
and Output Enable inputs, CE and OE. The active LOW
Write Enable (WE) controls both writing and reading of the
memory. A data byte allows Upper Byte (UB) and Lower
Byte (LB) access.
The IS61LV25616AL is packaged in the JEDEC standard
44-pin 400-mil SOJ, 44-pin TSOP Type II, 44-pin LQFP and
48-pin Mini BGA (8mm x 10mm).
FEBRUARY 2003
FUNCTIONAL BLOCK DIAGRAM
A0-A17
VDD
GND
I/O0-I/O7
Lower Byte
I/O8-I/O15
Upper Byte
CE
OE
WE
UB
LB
Copyright © 2003 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time
without notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to
obtain the latest version of this device specification before relying on any published information and before placing orders for products.
DECODER
I/O
DATA
CIRCUIT
CONTROL
CIRCUIT
256K x 16
MEMORY ARRAY
COLUMN I/O
Integrated Silicon Solution, Inc. — www.issi.com —
Rev. A
02/21/03
1-800-379-4774
1
IS61LV25616AL ISSI
TRUTH TABLE
I/O PIN
Mode
WEWE
WE
WEWE
Not Selected X H X X X High-Z High-Z ISB1, ISB2
Output Disabled H L H X X High-Z High-Z ICC
Read H L L L H DOUT High-Z ICC
Write L L X L H DIN High-Z ICC
CECE
CE
CECE
OEOE
OE
OEOE
LBLB
LB
LBLB
UBUB
UB I/O0-I/O7 I/O8-I/O15 VDD Current
UBUB
X L X H H High-Z High-Z
H L L H L High-Z DOUT
HLLLL DOUT DOUT
L L X H L High-Z DIN
LLXLL DIN DIN
®
PIN CONFIGURATIONS
44-Pin TSOP (Type II) and SOJ
1
A0
A1
2
A2
3
A3
4
A4
5
CE
6
I/O0
7
I/O1
8
I/O2
9
I/O3
10
VDD
GND
I/O4
I/O5
I/O6
I/O7
WE
A5
A6
A7
A8
A9
11
12
13
14
15
16
17
18
19
20
21
22
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
A17
A16
A15
OE
UB
LB
I/O15
I/O14
I/O13
I/O12
GND
VDD
I/O11
I/O10
I/O9
I/O8
NC
A14
A13
A12
A11
A10
PIN DESCRIPTIONS
A0-A17 Address Inputs
I/O0-I/O15 Data Inputs/Outputs
CE Chip Enable Input
OE Output Enable Input
WE Write Enable Input
LB Lower-byte Control (I/O0-I/O7)
UB Upper-byte Control (I/O8-I/O15)
N C No Connection
VDD Power
GND Ground
2
Integrated Silicon Solution, Inc. — www.issi.com —
1-800-379-4774
Rev. A
02/21/03
IS61LV25616AL ISSI
PIN CONFIGURATIONS
®
44-Pin LQFP
44 43 42 41 40 39 38 37 36 35 34
CE
I/O0
I/O1
I/O2
I/O3
VDD
GND
I/O4
I/O5
I/O6
I/O7
1
2
3
4
5
6
7
8
9
10
11
12 13 14 15 16 17 18 19 20 21 22
A17
A16
A15
A14
A13
A12
A11
A10OEUB
TOP VIEW
A0A1A2A3A4A5A6A7A8
WE
LB
33
32
31
30
29
28
27
26
25
24
23
A9
I/O15
I/O14
I/O13
I/O12
GND
VDD
I/O11
I/O10
I/O9
I/O8
NC
48-Pin mini BGA
1 2 3 4 5 6
LB
I/O
I/O
GND
V
DD
I/O
I/O
NC
8
9
14
15
OE
UB A3
I/O10A5
I/O
I/O12NC
I/O
NC
A8
A
B
C
D
E
F
G
H
1
2
A1
A0
A17
11
A14
13
A12
A9
A6
A7
A16
A15
A13
A10
A4
A2
N/C
CE I/O
I/O1I/O
I/O
V
3
I/O
GND
4
I/O
I/O
5
WE
I/O
A11 NC
3
0
2
DD
6
7
4
5
6
PIN DESCRIPTIONS
A0-A17 Address Inputs
I/O0-I/O15 Data Inputs/Outputs
CE Chip Enable Input
OE Output Enable Input
WE Write Enable Input
LB Lower-byte Control (I/O0-I/O7)
UB Upper-byte Control (I/O8-I/O15)
N C No Connection
VDD Power
GND Ground
7
8
9
10
11
12
Integrated Silicon Solution, Inc. — www.issi.com —
Rev. A
02/21/03
1-800-379-4774
3
IS61LV25616AL ISSI
®
ABSOLUTE MAXIMUM RATINGS
(1)
Symbol Parameter Value Unit
VTERM Terminal Voltage with Respect to GND –0.5 to VDD+0.5 V
TSTG Storage Temperature –65 to +150 °C
PT Power Dissipation 1.0 W
Note:
1. Stress greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause
permanent damage to the device. This is a stress rating only and functional operation of
the device at these or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect reliability.
OPERATING RANGE
VDD
Range Ambient Temperature 10ns 12ns
Commercial 0°C to +70°C 3.3V +10%, -5% 3.3V + 10%
Industrial –40°C to +85°C 3.3V +10%, -5% 3.3V + 10%
DC ELECTRICAL CHARACTERISTICS (Over Operating Range)
Symbol Parameter Test Conditions Min. Max. Unit
VOH Output HIGH Voltage VDD = Min., IOH = –4.0 mA 2.4 — V
VOL Output LOW Voltage VDD = Min., IOL = 8.0 mA — 0.4 V
VIH Input HIGH Voltage 2.0 VDD + 0.3 V
VIL Input LOW Voltage
ILI Input Leakage GND ≤ VIN ≤ VDD Com. –2 2 µA
ILO Output Leakage GND ≤ VOUT ≤ VDD Com. –2 2 µA
Notes:
1. VIL (min.) = –2.0V for pulse width less than 10 ns.
4
(1)
–0.3 0.8 V
Ind. –5 5
Outputs Disabled Ind. –5 5
Integrated Silicon Solution, Inc. — www.issi.com —
1-800-379-4774
Rev. A
02/21/03
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