ISSI IS61C25616AL-10T Datasheet

IS61C25616AL IS61C25616AS
IS64C25616AL IS64C25616AS

256K x 16 HIGH-SPEED CMOS STATIC RAM

FEATURES

HIGH SPEED: (IS61/64C25616AL)

• High-speed access time: 10ns, 12 ns

• Low Active Power: 150 mW (typical)

• Low Standby Power: 10 mW (typical)
CMOS standby

LOW POWER: (IS61/64C25616AS)

• High-speed access time: 25 ns

• Low Active Power: 75 mW (typical)

• Low Standby Power: 1 mW (typical)
CMOS standby

• TTL compatible interface levels

• Single 5V ± 10% power supply

• Fully static operation: no clock or refresh
required

• Available in 44-pin SOJ package and
44-pin TSOP (Type II)

• Commercial, Industrial and Automotive tempera­ture ranges available

• Lead-free available

DESCRIPTION

The ISSI IS61C25616AL/AS and IS64C25616AL/AS are
high-speed, 4,194,304-bit static RAMs organized as 262,144
words by 16 bits. They are fabricated using ISSI's high­performance CMOS technology. This highly reliable process
coupled with innovative circuit design techniques, yields
access times as fast as 12 ns with low power consumption.

When CE is HIGH (deselected), the device assumes a
standby mode at which the power dissipation can be reduced
down with CMOS input levels.

Easy memory expansion is provided by using Chip Enable
and Output Enable inputs, CE and OE. The active LOW Write
Enable (WE) controls both writing and reading of the memory.
A data byte allows Upper Byte (UB) and Lower Byte (LB)
access.

The IS61C25616AL/AS and IS64C25616AL/AS are pack­aged in the JEDEC standard 44-pin 400-mil SOJ and 44-pin
TSOP (Type II).

MARCH 2008

FUNCTIONAL BLOCK DIAGRAM

A0-A17

VDD

GND

I/O0-I/O7

Lower Byte

I/O8-I/O15

Upper Byte

CE
OE

WE

UB

Copyright © 2006 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without notice. ISSI assumes no liability
arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the latest version of this device specification before relying on any
published information and before placing orders for products.

DECODER

I/O

DATA

CIRCUIT

CONTROL

CIRCUIT

LB

Integrated Silicon Solution, Inc. — www.issi.com

Rev. C

03/21/2008

256K x 16

MEMORY ARRAY

COLUMN I/O

1

IS61C25616AL IS61C25616AS

4

3

0

4
3

0

IS64C25616AL IS64C25616AS

PIN CONFIGURATIONS

44-Pin SOJ

CE

WE

A9

A8

A7

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

A15

A14

A13

A12

A11

I/O0

I/O1

I/O2

I/O3

VDD

GND

I/O4

I/O5

I/O6

I/O7

A10

A16

44

43

42

41

40

39

38

37

36

35

34

33

32

31

30

29

28

27

26

25

24

23

A0

A1

A2

OE
UB
LB

I/O15

I/O1

I/O1

I/O12

GND

VDD

I/O11

I/O1

I/O9

I/O8

NC

A3

A4

A5

A6

A17

44-Pin TSOP (Type II)

I/O0
I/O1
I/O2
I/O3

VDD

GND

I/O4
I/O5
I/O6
I/O7

A15
A14
A13
A12
A11

CE

WE

A10

A9
A8
A7

A16

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22

44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23

A0
A1
A2

OE
UB
LB

I/O15
I/O1
I/O1
I/O12
GND
VDD
I/O11
I/O1
I/O9
I/O8
NC
A3
A4
A5
A6
A17

PIN DESCRIPTIONS

A0-A17 Address Inputs

I/O0-I/O15 Data Inputs/Outputs

CE Chip Enable Input
OE Output Enable Input
WE Write Enable Input

2

LB Lower-byte Control (I/O0-I/O7)
UB Upper-byte Control (I/O8-I/O15)

NC No Connection

VDD Power

GND Ground

Integrated Silicon Solution, Inc. — www.issi.com

Rev. C

03/21/2008

IS61C25616AL IS61C25616AS
IS64C25616AL IS64C25616AS

TRUTH TABLE

I/O PIN

Mode

WEWE

WE

WEWE

Not Selected X H X X X High-Z High-Z ISB1, ISB2
Output Disabled H L H X X High-Z High-Z ICC1, ICC2

X L X H H High-Z High-Z

Read H L L L H DOUT High-Z ICC1, ICC2

H L L H L High-Z DOUT
HLLLL DOUT DOUT

Write L L X L H DIN High-Z ICC1, ICC2

L L X H L High-Z DIN
LLXLL DIN DIN

CECE

CE

CECE

OEOE

OE

OEOE

LBLB

LB

LBLB

UBUB

UB I/O0-I/O7 I/O8-I/O15 VDD Current

UBUB

ABSOLUTE MAXIMUM RATINGS

(1)

Symbol Parameter Value Unit

VTERM Terminal Voltage with Respect to GND –0.5 to +7.0 V
TSTG Storage Temperature –65 to +150 °C
PT Power Dissipation 1.5 W
IOUT DC Output Current (LOW) 20 mA

Notes:

1. Stress greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the

device. This is a stress rating only and functional operation of the device at these or any other conditions above
those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect reliability.

CAPACITANCE

(1,2)

Symbol Parameter Conditions Max. Unit

CIN Input Capacitance VIN = 0V 5 pF

COUT Output Capacitance VOUT = 0V 7 pF

Notes:

1. Tested initially and after any design or process changes that may affect these parameters.

2. Test conditions: T

A = 25°C, f = 1 MHz, VDD = 5.0V.

DC ELECTRICAL CHARACTERISTICS (Over Operating Range)

Symbol Parameter Test Conditions Min. Max. Unit

VOH Output HIGH Voltage VDD = Min., IOH = –4.0 mA 2.4 — V

VOL Output LOW Voltage VDD = Min., IOL = 8.0 mA — 0.4 V

VIH Input HIGH Voltage 2.2 VDD + 0.5 V

VIL Input LOW Voltage

(1)

–0.3 0.8 V

ILI Input Leakage GND ≤ VIN ≤ VDD Com. –1 1 µA

Ind. –2 2

Auto. –5 5

ILO Output Leakage GND ≤ VOUT ≤ VDD Com. –1 1 µA

Outputs Disabled Ind. –2 2

Auto. –5 5

Note: 1. VIL = –3.0V for pulse width less than 10 ns.

Integrated Silicon Solution, Inc. — www.issi.com —

Rev. C

03/21/2008

1-800-379-4774

3

IS61C25616AL IS61C25616AS
IS64C25616AL IS64C25616AS

OPERATING RANGE: HIGH SPEED OPTION (IS61/64C25616AL)

Range Ambient Temperature VDD Speed (ns)

Commercial 0°C to +70°C 5V ± 10% 10

Industrial -40°C to +85°C 5V ± 10% 10

Automotive -40°C to +125°C 5V ± 10% 12

OPERATING RANGE: LOW POWER OPTION (IS61/64C25616AS)

Range Ambient Temperature VDD Speed (ns)

Commercial 0°C to +70°C 5V ± 10% 25

Industrial -40°C to +85°C 5V ± 10% 25

Automotive -40°C to +125°C 5V ± 10% 25

4

Integrated Silicon Solution, Inc. — www.issi.com

Rev. C

03/21/2008

IS61C25616AL IS61C25616AS
IS64C25616AL IS64C25616AS

HIGH SPEED OPTION (IS61/64C25616AL)
POWER SUPPLY CHARACTERISTICS

Symbol Parameter Test Conditions Min. Max. Min. Max. Unit

I

CC1 VDD Operating VDD = VDD MAX., CE = VIL

Supply Current IOUT = 0 mA, f = 0

CC2 VDD Dynamic Operating VDD = VDD MAX., CE = VIL

I

Supply Current IOUT = 0 mA, f = fMAX

I

SB1 TTL Standby Current VDD = VDD MAX.,

(TTL Inputs) VIN = VIH or VIL

CE ≥ VIH, f = 0

(1)

(Over Operating Range)

Com.

Ind.

Auto.

Com.

Ind.

Auto.

(2)

typ.

30 25

Com.

Ind.

Auto.

-10 ns -12 ns

—45 —45 mA
—50 —50
—55 —55

—50 —45 mA
—55 —50
—70 —60

—15 —15 mA
—20 —20
—30 —30

ISB2 CMOS Standby VDD = VDD MAX.,

Current (CMOS Inputs) CE ≤ VDD – 0.2V,

VIN ≥ VDD – 0.2V, or
VIN ≤ 0.2V, f = 0

Note:

1. At f = f

2. Typical values are measured at VDD = 5V, TA = 25oC and not 100% tested.

MAX, address and data inputs are cycling at the maximum frequency, f = 0 means no input lines change.

Com.

Ind.

Auto.

typ.

(2)

—8 —8 mA
—12 —12
—20 —20

2

LOW POWER OPTION (IS61/64C25616AS)

POWER SUPPLY CHARACTERISTICS

Symbol Parameter Test Conditions Min. Max. Unit

ICC Average operating CE = VIL, Com. — 10 mA

Current VDD = Max., Ind. — 15

I OUT= 0 mA, f = 0 Auto. — 20

ICC1VDD Dynamic Operating VDD = Max., CE = VIL Com. — 25 mA

Supply Current IOUT = 0 mA, f = fMAX Ind. — 30

VIN = VIH or VIL Auto. — 40

ISB1 TTL Standby Current VDD = Max., Com. — 1 mA

(TTL Inputs) VIN = VIH or VIL, CE ≥ V IH, Ind. — 1.5

f = 0 Auto. — 2

(1)

(Over Operating Range)

-25 ns

(2)

typ.

15

ISB2 CMOS Standby VDD = Max., Com. — 0.8 mA

Current (CMOS Inputs) CE ≥ V DD – 0.2V, Ind. — 0.9

VIN ≥ V DD – 0.2V, Auto. — 2
or VIN ≤ V SS + 0.2V, f = 0

Note:

1. At f = f

2. Typical values are measured at VDD = 5V, TA = 25oC and not 100% tested.

MAX, address and data inputs are cycling at the maximum frequency, f = 0 means no input lines change.

Integrated Silicon Solution, Inc. — www.issi.com —

Rev. C

03/21/2008

(2)

typ.

1-800-379-4774

0.2

5

IS61C25616AL IS61C25616AS
IS64C25616AL IS64C25616AS

READ CYCLE SWITCHING CHARACTERISTICS

(1)

(Over Operating Range)

-10 -12 -25

Symbol Parameter Min. Max. Min. Max. Min. Max. Unit

tRC Read Cycle Time 10 — 12 — 25 — ns
tAA Address Access Time — 10 — 12 — 25 ns
tOHA Output Hold Time 3 — 3 — 3 — ns
tACE CE Access Time — 10 — 12 — 25 ns
tDOE OE Access Time — 5 — 6 — 15 ns

(2)

tHZOE
tLZOE
tHZCE
tLZCE

(2)

(2)

(2)

OE to High-Z Output 0 5 0 6 0 8 ns
OE to Low-Z Output 0 — 0 — 2 — ns
CE to High-Z Output 0 5 0 6 0 8 ns
CE to Low-Z Output 2 — 2 — 2 — ns

tBA LB, UB Access Time — 5 — 6 — 25 ns
tHZB LB, UB to High-Z Output 0 5 0 6 0 8 ns
tLZB LB, UB to Low-Z Output 0 — 0 — 0 — ns

Notes:

1. Test conditions assume signal transition times of 3 ns or less, timing reference levels of 1.5V, input pulse levels of 0
to 3.0V and output loading specified in Figure 1.

2. Tested with the load in Figure 2. Transition is measured ±500 mV from steady-state voltage. Not 100% tested.

3. Not 100% tested.

AC TEST CONDITIONS

Parameter Unit

Input Pulse Level 0V to 3.0V
Input Rise and Fall Times 3 ns
Input and Output Timing 1.5V

and Reference Level
Output Load See Figures 1 and 2

AC TEST LOADS

480 Ω

OUTPUT

5V

30 pF

Including

jig and

scope

255 Ω

Figure 1

5V

OUTPUT

Including

5 pF

jig and

scope

Figure 2

480 Ω

255 Ω

6

Integrated Silicon Solution, Inc. — www.issi.com

Rev. C

03/21/2008