IRF IRS2183STRPBF, IRS21834STRPBF, IRS21834, IRS2183 Datasheet
Data Sheet No. PD60265
IRS2183/IRS21834(S)PbF
Features
Floating channel designed for bootstrap operation
•
Fully operational to +600 V
•
Tolerant to negative transient voltage, dV/dt
•
Packages
HALF-BRIDGE DRIVER
immune
Gate drive supply range from 10 V to 20 V
•
Undervoltage lockout for both channels
•
3.3 V and 5 V input logic compatible
•
Matched propagation delay for both channels
•
Logic and power ground +/- 5 V offset
•
Lower di/dt gate driver for better noise immunity
•
Output source/sink current capability 1.4 A/1.8 A
•
RoHS compliant
•
Description
The IRS2183/IRS21834 are high voltage,
8-Lead SOIC
IRS2183S
8-Lead PDIP
IRS2183
14-Lead PDIP
IRS21834
14-Lead SOIC
IRS21834S
high speed power MOSFET and IGBT
drivers with dependent high-side and
low-side referenced output channels.
Proprietary HVIC and latch immune
CMOS technologies enable ruggedized
monolithic construction. The logic input
is compatible with standard CMOS or
LSTTL output, down to 3.3 V logic. The
output drivers feature a high pulse current buffer stage designed for minimum
Feature Comparison
Part
2181 COM
21814
2183 Internal 400 COM
21834
2184 Internal 400 COM
21844
Input
logic
HIN/LIN no none
HIN/LIN yes
IN/SD yes
Cross-
conduction
prevention
logic
Deadtime
(ns)
Program 400-5000 VSS/COM
Program 400-5000 VSS/COM
Ground Pins
VSS/COM
ton/t
(ns)
180/220
180/220
680/270
off
driver cross-conduction. The floating channel can be used to drive an N-channel power MOSFET or IGBT
in the high-side configuration which operates up to 600 V.
Typical Connection
V
CC
V
HIN
LIN
(Refer to Lead Assignment for correct pin
configuration) These diagrams show electrical
connections only. Please refer to our Application
Notes and DesignTips for proper circuit board layout.
HIN
LIN
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CC
V
B
HO
V
S
LOCOM
IRS2183
V
HIN
V
LIN
up to 600 V
TO
LOAD
up to 600 V
HO
V
V
CC
CC
SS
HIN
LIN
DT
V
R
DT
B
V
S
COM
SS
LO
IRS21834
TO
LOAD
1
IRS2183/IRS21834(S)PbF
LIN
LIN
Absolute Maximum Ratings
Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage parameters are absolute voltages referenced to COM. The thermal resistance and power dissipation ratings are measured
under board mounted and still air conditions.
Symbol Definition Min. Max. Units
V
B
V
S
V
HO
V
CC
V
LO
DT Programmable deadtime pin voltage (IR21834 only) VSS - 0.3 V
V
IN
V
SS
dVS/dt Allowable offset supply voltage transient — 50 V/ns
P
D
Rth
JA
T
J
T
S
T
L
Note 1: All supplies are fully tested at 25 V and an internal 20 V clamp exists for each supply.
Recommended Operating Conditions
The input/output logic timing diagram is shown in Fig. 1. For proper operation the device should be used within the
recommended conditions. The VS and VSS offset rating are tested with all supplies biased at 15 V differential.
Symbol Definition Min. Max. Units
V
B
V
S
V
HO
V
CC
V
LO
V
IN
DT Programmable deadtime pin voltage (IR21834 only) V
V
SS
T
A
Note 2: Logic operational for VS of -5 V to +600 V. Logic state held for VS of -5 V to -VBS. (Please refer to the Design Tip
DT97-3 for more details).
High-side floating absolute voltage -0.3 620 (Note 1)
High-side floating supply offset voltage VB - 20 VB + 0.3
High-side floating output voltage VS - 0.3 V
+ 0.3
B
Low-side and logic fixed supply voltage -0.3 20 (Note 1)
Low-side output voltage -0.3 VCC + 0.3
+ 0.3
CC
Logic input voltage (HIN &
Logic ground (IR21834 only) V
) VSS - 0.3 V
- 20 VCC + 0.3
CC
CC
+ 0.3
(8-lead PDIP) — 1.0
Package power dissipation @ TA ≤ +25 °C
(8-lead SOIC) — 0.625
(14-lead PDIP) — 1.6
W
(14-lead SOIC) — 1.0
(8-lead PDIP) — 125
Thermal resistance, junction to ambient
(8-lead SOIC) — 200
(14-lead PDIP) — 75
°C/W
(14-lead SOIC) — 120
Junction temperature — 150
Storage temperature -50 150
°C
Lead temperature (soldering, 10 seconds) — 300
High-side floating supply absolute voltage VS + 10 VS + 20
High-side floating supply offset voltage Note 2 600
High-side floating output voltage V
S
V
B
Low-side and logic fixed supply voltage 10 20
Low-side output voltage 0 V
Logic input voltage (HIN &
) V
SS
SS
CC
V
CC
V
CC
Logic ground (IR21834 only) -5 5
Ambient temperature -40 125 °C
V
V
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IRS2183/IRS21834(S)PbF
LIN
LIN
LIN
LIN
Dynamic Electrical Characteristics
V
(VCC, VBS) = 15 V, VSS = COM, CL = 1000 pF, TA = 25 °C, DT = VSS unless otherwise specified.
BIAS
Symbol Definition Min. Typ. Max.UnitsTest Conditions
t
on
t
off
MT Delay matching | ton - t
t
t
DT
MDT Deadtime matching = | DTLO-HO - DTHO-LO |
Static Electrical Characteristics
V
BIAS
parameters are referenced to VSS/COM and are applicable to the respective input leads: HIN and LIN. The VO, IO, and
Ron parameters are referenced to COM and are applicable to the respective output leads: HO and LO.
Symbol Definition Min. Typ.Max.UnitsTest Conditions
V
V
V
OH
V
OL
I
LK
I
QBS
I
QCC
I
IN+
I
IN-
V
CCUV+
V
BSUV+
V
CCUV-
V
BSUV-
V
CCUVH
V
BSUVH
I
O+
I
O-
Turn-on propagation delay — 180 270 VS = 0V
Turn-off propagation delay — 220 330 VS = 0V or 600V
off
|
Turn-on rise time — 40 60
r
Turn-off fall time — 20 35
f
Deadtime: LO turn-off to HO turn-on(DT
HO turn-off to LO turn-on (DT
(VCC, VBS) = 15 V, VSS = COM, DT= VSS and TA = 25 °C unless otherwise specified. The VIL, V
IH
Logic “1” input voltage for HIN & logic “0” for
Logic “0” input voltage for HIN & logic “1” for
IL
High level output voltage, V
Low level output voltage, V
Offset supply leakage current — — 50 VB = VS = 600 V
Quiescent VBS supply current 20 60 150
Quiescent VCC supply current 0.4 1.0 1.6 mA
Logic “1” input bias current — 25 60 HIN = 5 V,
Logic “0” input bias current — — 5.0 HIN = 0 V,
VCC and VBS supply undervoltage positive going
threshold
VCC and V
threshold
Hysteresis 0.3 0.7 —
Output high short circuit pulsed current 1.4 1.9 —
Output low short circuit pulsed current 1.8 2.3 —
supply undervoltage negative going
BS
BIAS
O
- V
LO-HO) &
HO-LO)
O
— 0 35
280 400 520 RDT= 0 Ω
4 5 6 µs RDT = 200 kΩ (IR21834)
— 0 50 RDT=0 Ω
— 0 600 RDT = 200kΩ (IR21834)
2.5 — —
— — 0.8
— — 1.4 IO = 0 A
— — 0.2 IO = 20 mA
8.0 8.9 9.8
7.4 8.2 9.0
ns
ns
V
µA
µA
V
A
VS = 0 V
and I
IH,
IN
VCC = 10 V to 20 V
V
= 0 V or 5 V
IN
= 0 V
= 5 V
VO = 0 V,
PW ≤ 10 µs
VO = 15 V,
PW ≤ 10 µs
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Functional Block Diagrams
2183
HIN
VSS/COM
LEVEL
SHIFT
PULSE
GENERATOR
IRS2183/IRS21834(S)PbF
VB
UV
HV
LEVEL
SHIFTER
PULSE
FILTER
DETECT
R
Q
R
S
HO
VS
LIN
HIN
DT
LIN
DT
+5V
VSS
+5V
DEADTIME &
SHOOT-THROUGH
PREVENTION
21834
DEADTIME &
SHOOT-THROUGH
PREVENTION
VSS/COM
LEVEL
SHIFT
VSS/COM
LEVEL
SHIFT
VSS/COM
LEVEL
SHIFT
PULSE
GENERATOR
DELAY
DELAY
HV
LEVEL
SHIFTER
PULSE
FILTER
UV
DETECT
UV
DETECT
DETECT
VCC
LO
COM
VB
R
Q
R
S
HO
VS
VCC
UV
LO
COM
VSS
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IRS2183/IRS21834(S)PbF
LIN
Lead Definitions
SymbolDescription
HIN
DT Programmable deadtime lead, referenced to VSS (IRS21834 only)
V
SS
V
B
HO High-side gate driver output
V
S
V
CC
LO Low-side gate driver output
COM Low-side return
Lead Assignments
Logic input for high-side gate driver output (HO), in phase (referenced to COM for IRS2183
and VSS for IRS21834)
Logic input for low-side gate driver output (LO), out of phase (referenced to COM for IRS2183
and VSS for IRS21834)
Logic ground (IRS21834 only)
High-side floating supply
High-side floating supply return
Low-side and logic fixed supply
1
HIN
2
LIN
3
COM
4
LO
V
8
B
HO
7
V
6
S
V
5
CC
1
HIN
2
LIN
3
COM
4
LO
8-Lead PDIP 8-Lead SOIC
IRS2183PbF IRS2183SPbF
V
HO
V
14
13
B
12
11
S
10
9
8
1
HIN
2
LIN
3
VSS
4
DT
5
COM
6
LO
7
V
CC
14-Lead PDIP 14-Lead SOIC
1
HIN
2
LIN
3
VSS
4
DT
5
COM
6
LO
7
V
CC
IRS21834PbF IRS21834SPbF
V
8
B
HO
7
V
6
S
V
5
CC
14
V
13
B
HO
12
V
11
S
10
9
8
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IRS2183/IRS21834(S)PbF
Figure 1. Input/Output Timing Diagram
Figure 2. Switching Time Waveform Definitions
Figure 3. Deadtime Waveform Definitions
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IRS2183/IRS21834(S)PbF
500
400
300
Max.
200
Typ.
100
0
Turn-On Propagation Delay (ns)
-50 -25 0 25 50 75 100 125
o
Temperature (
C)
Figure 4A. Turn-On Propagation Delay
vs. Temperature
600
500
400
Max.
300
Typ.
200
500
400
Max.
300
Typ.
200
100
0
Turn-On Propagation Delay (ns)
10 12 14 16 18 20
Supply Voltage (V)
Figure 4B. Turn-On Propagation Delay
vs. Supply Voltage
600
500
Max.
400
300
Typ.
200
100
100
Turn-Off Propagation Delay (ns)
-50 -25 0 25 50 75 100 125
o
Temperature (
C)
Figure 5A. Turn-Off Propagation Delay
vs. Temperature
0
Turn-Off Propagation Delay (ns)
10 12 14 16 18 20
Supply Voltage (V)
Figure 5B. Turn-Off Propagation Delay
vs. Sup ply Voltag e
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IRS2183/IRS21834(S)PbF
120
100
80
60
Max.
40
Typ.
20
Turn-On Rise Time (ns)
0
-50 -25 0 25 50 75 100 125
o
Temperature (
C)
Figure 6A. Turn-On Rise Time vs. Temperature
80
60
40
Max.
Typ
20
Turn-Off Fall Time (ns)
0
-50 -25 0 25 50 75 100 125
o
Temperature (
C)
120
100
Max.
80
60
Typ.
40
20
Turn-On Rise Time (ns)
0
10 12 14 16 18 20
Supply Voltage (V)
Figure 6B. Turn-On Rise Time vs. Supply Voltage
80
60
Max.
40
Typ.
20
Turn-Off Fall Time (ns)
0
10 12 14 16 18 20
Supply Voltage (V)
Figure 7A. Turn-Off Fall Time vs. Temperature
Figure 7B. Turn-Off Fall Time vs. Supply Voltage
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