IPS Alpha AF094F030B Specification

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The following specifications are applied to the following TFT open cell.
Product Name : AF094F030B
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DESCRIPTION
General Specifications
Effective Display Area
Number of Pixels (H)1,920×(V)1,080 (pixels)
Color Pixel Arrangement : R+G+B Vertical Stripe
Display Mode : Transmissive Mode
Top Polarizer Type : Anti-Glare
Number of Colors 16,777,216 (colors)
Weight :Typ. 1,755 (g)
㧦*8
Normally Black Mode
(mm)
IPS4PS 2603 -AF094F030B-1IPS Alpha Technology, Ltd. Date Page 3-1/1Apr. 21, 2009 Sheet No.
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1. ABSOLUTE MAXIMUM RATINGS
1.1 Environmental Absolute Maximum Ratings
ITEM
Temperature 0 50
Humidity
Vibration
Shock
Corrosive Gas
Note 1) Temperature and Humidity should be applied to the glass surface of a TFT module,
not to the system installed with a module.
The temperature at the center of rear surface should be less than 70 on the condition of operating.
2) Ta҇40 Relative humidity should be less than 85%RH max. Dew is prohibited.
Ta40 Relative humidity should be lower than the moisture of the 85%RH at 40.
3) Frequency of the vibration is between 15Hz and 100Hz. (Remove the resonance point)
4) Pulse width of the shock is 10 ms.
5) Long operation under low temperature may cause some portion of display area to be reddish for
ޓ several minutes after turning on the product. ޓ However, it does not affect the characteristics and reliability of the product.
6) Environmental Absolute Maximum Ratings is Based on IPS Alpha Technology TFT module AX094F030F.
Leave TFT open cell alone,this environmental ratings can't be guaranteed.The users have a responsibility
in considering ability of other parts of TFT module and TFT module process.
Min.
- 4.9(0.5G) -
- 29.4(3G)
Not Acceptable Not Acceptable
Operating
2)
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Storage
Max. Min. Max.
-20
2)
- 196(20G)
60
9.8(1.0G)
Unit
RH
m/s
m/s
-
Note
1),5),6)
1),6)
2
2
3),6)
4),6)
6)
1.2 Electrical Absolute Maximum Ratings
Based on IPS Alpha Technology, Ltd. Module AX094F030F Vss = 0 V
ITEM SYMBOL Min. Max.
Power Supply Voltage
Input Voltage for logic
Electrostatic Durability
DD
1
ESD0
ESD1
0 13.2
-0.3
±8
Unit
V
3.6 V
V
Note
1)
2),3)±100
2),4)kV
Noteޓ1)It is applied to pixel data signal and clock signal.
ޓޓޓ2)Discharge Coefficient㧦200pF-250ǡ, Environmental㧦25-70㧑RH ޓޓޓ3)It is applied to I/F connector pins. ޓޓޓ4)It is applied to the surface of a metallic bezel and a LCD panel.
1.3 Environmental Absolute Ratings of TFT open cell
Storage Condition : With shipping package Storage temperatue range : 25㫧㪌䇭㷄 Storage humidity range : 5010%RH
Shelf life : a month
Date Apr. 21, 2009
Sheet No. IPS4PS Page 4-1/12604 -AF094F030B-1IPS Alpha Technology, Ltd.
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2. INITIAL OPTICAL CHARACTERISTICS
The following optical characteristics are measured under stable conditions. It takes about 30 minutes
to reach stable conditions. The measuring point is the center of display area unless otherwise noted.
The optical characteristics should be measured in a dark room or equivalent state. ޓޓMeasuring equipmentCS-1000A, or equivalent Ambient Temperature =25ޔVDD=12.0Vޔf V=60Hzޔ
Light source is backlight of IPS Alpha Technology TFT module AX094F030F that voltage
setting is VBL=24V, BRT=3.1V.
ITEM SYMBOL CONDITION Min. Typ. Max. UNIT NOTE
Contrast Ratio
Response Time
Brightness of white Bwh 350 450
Brightness uniformity Buni - - 30
Color
Chromaticity
CIE
Variation of
Color Position
(CIE)
Contrast Ratio at 85° CR85 10
Rise ton - 8 20 ms
Fall toff - 6 20 ms 3)
Red
Green
Blue
White
Red
Green
Blue
White
㧯㧾
ǿ 㨥 ǿ 㨥 ǿ 㨥 ǿ
㨥 Ǎǿ Ǎ㨥 Ǎǿ Ǎ㨥 Ǎǿ Ǎ㨥 Ǎǿ Ǎ㨥
ǰ㧩㧜° 0.30 0.33 0.36
1) 0.27 0.30
ǰ㧩+50° Ǿ㧩0°ޔ90°
180°ޔ270°
1)
Ǿ㧩0°, 90°, Estimated value
180°, 270° 1)
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600 1100
0.62
0.59
0.12 0.15 0.18
0.04 0.07 0.10
0.243 0.273
0.245 0.275 0.305
-
- - 0.04
--
- - 0.04
- - 0.04
--
- - 0.04
- - 0.04
0.65 0.68
0.62 0.65
- 0.04
---
-- 2)
3)
-
0.33
0.303
0.04
0.04
cd/m
-
-
2
4)
ޣGray scale
=255ޤ
5)
ޣGray scale
=255ޤ
IPS Alpha Technology, Ltd. Date Apr. 21, 2009
Sheet No. IPS4PS 2605 -AF094F030B-1
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t
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Note 1) Definition of Viewing Angle
㧔QENQEM㧕
Ǿ㧩q
:
㧔QENQEM㧕
2) Definition of Contrast Ratio (CR)
(Luminance at displaying WHITE)
CR=
(Luminance at displaying BLACK)
3) Definition of Response Time
Displaying
Data Signal
㪙㪣㪘㪚㪢
Ǿ㧩q
;
6(6.%/
ǰ㧩q <
G[G
ǰ
<
; 㧔QENQEM㧕
㪮㪟㪠㪫㪜
㫋㫆㫅 㫋㫆㪽㪽
Ǿ
Ǿ㧩q
:㧔QENQEM㧕
Ǿ㧩q
㪙㪣㪘㪚㪢
Optical
Response
㪈㪇㪇
㪐㪇
( Luminance)
㪈㪇
4 Definition of Brightness Uniformi
(1) (2) (3)
10%
90%
(4) (5) (6)
(7) (8) (9)
10%
50%
50%
90%
measuring points
Display pattern is white (255 level) . The brightness
uniformity is defined as the following equation. Brightness at each
point is measured, and average, maximum and minimum
brightness is calculated.
Buni
Bmax or Bmin - Bave
Bave
where, Bmax = Maximum brightness
Bmin = Minimum brightness
㰿㩷㩿㪙㩿㫂㪀㪀
Bave Average brightness=
㫂㪔㪈
5Variation of color position on CIE is defined as difference between colors at ǰ=0°and
atǰ㧩50°& Ǿ=0°90°180°270°.
×100
IPS Alpha Technology, Ltd.
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Date
5-2/2Apr. 21, 2009 Sheet No. PageIPS4PS 2605 -AF094F030B-1
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3. ELECTRICAL CHARACTERISTICS
Based on IPS Alpha Technology, Ltd. Module AX094F030F Ta=25ޔVss=0V
ITEM
Power supply Voltage
Power supply Current
Ripple voltage of power Supply
LVDS select
Note 1)fV=60.0HzfCLK=66MHzVDD=12.0Vand Display pattern is horizontal stripe.
High
Low 0
㪛㪚㩷㪘 㫄㫇㪼㫉㪼㩷㪤㪼㫋㪼㫉
2) Current fuse is built in a module. Current capacity of power supply for VDD
should be larger than 4A, so that the fuse can be opened at the trouble of electrical circuit of module.
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SYSTEM
䌄䌄
䌄䌄
䌄䌄䌒
LVDSSEL
Min.
11.4
-
- 150 m-
2.2
㪫㪝㪫㩷㪤㫆㪻㫌㫃㪼
㪛㪛
㪪㪪
Typ
12.0 12.6
0.82 1.25
2.5 3.6
0 0.4
Max
න૏
㨂 㧭
㨂 㨂
஻⠨
1),2)
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r
r
r
4. BLOCK DIAGRAM
Based on IPS Alpha Technology, Ltd. Module AX094F030F
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Source Driver
2ch-LVDS
Display data
Timing signal
DC Power supply
CN1
Tcon PCB Assy
LVDS Receiver
DC/DC Converte
Timing Converter
G1
G2
Gate Drive
G1080
S1 S2 S5760
G1
G2
TFT-LCD
Gate Drive
G1080
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IPS Alpha Technology, Ltd. 7-1/1Date Apr. 21, 2009 Sheet No. PageIPS4PS 2607 -AF094F030B-1
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5. INTERFACE PIN ASSIGNMENT
5. 1 TFT-LCD MODULE
Based on IPS Alpha Technology, Ltd. Module AX094F030F.
CN1:JAE FI-R51S-HF
(Matching connector : JAE FI-R51-HL)
PIN
Symbol Description Note
1 VSS 28 RxB0-
2IC 29
3
IC
4IC
5IC 32
6IC
LVDSSEL
7
8IC
9IC
10 IC
11 VSS 38 RxB3-GND(0V)
12 RxA0-
13 RxA0+
14 RxA1-
15 RxA1+
16 RxA2-
17 RxA2+
18 VSS
19 CLKA-
20 CLKA+
21 VSS
22 RxA3-
23 RxA3+
24
25
26 VSS
27 VSS
IC
IC
Select LVDS Data Format GND(0V) 2)
GND(0V) 2)
Internally Connected ,
Keep Open
Internally Connected,
Keep Open
ODD Pixel Data 3)
ODD Pixel Data 3)
ODD Pixel Data 3)
GND(0V) 2) 45 VSS
ODD Pixel Clock 3)
GND(0V) 2) 48 VDD
Internally Connected,
Keep Open
GND(0V) 2)
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PIN
No. No.
30 RxB1-
31
33 RxB2+
34 VSS
35 CLKB-
37
2)
39 RxB3+
40 IC
41 IC
42 VSS
43 VSS
44 VSS
46 VSS
47 NC No Connection
49 VDD
50 VDD
51 VDD
Symbol
RxB0+
RxB1+
RxB2-
CLKB+36
VSS
Description Note
EVEN Pixel Data 3)
EVEN Pixel Data 3)
EVEN Pixel Data 3)
EVEN Pixel Clock 3)
GND(0V) 2)
EVEN Pixel Data 3)
Internally Connected,
Keep Open
GND(0V) 2)
Power Supply (typ.+12V) 1)ODD Pixel Data 3)
Notes 1) All VDD pins shall be connected to +12.0V(Typ.).
2) All VSS pins shall be grounded. Metal bezel is internally connected to VSS.
3) Rx n+ and Rx n- (n=0,1,2,3) should be wired by twist-pairs or side-by-side FPC patterns, respectively.
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N
5.2 BLOCK DIAGRAM OF INTERFACE
Based on IPS Alpha Technology, Ltd. Module AX094F030F.
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CN1
RA0-RA7 GA0-GA7 BA0-BA7
VSYNC or RSVD HSYNC or RSVD
DE
DCLK
RB0-RB7 GB0-GB7 BB0-BB7
VSYNC or RSVD HSYNC or RSVD
DE
TV set Side
TxIN
PLL
TFT-LCD Module Side
RxA 0+
RxA 0-
RxA 1+
RxA 1­RxA 2+
RxA 2-
RxA 3+ RxA 3-
100
100
100
100
㪫㪫㪣㩷㪧㪸㫉㪸㫃㫃㪼㫃㪄㫋㫆㪄㪣㪭㪛㪪
CLKA+
CLKA-
RxB 0+ RxB 0­RxB 1+
RxB 1­RxB 2+
RxB 2­RxB 3+ RxB 3-
100
100
100
100
100
㪫㪫㪣㩷㪧㪸㫉㪸㫃㫃㪼㫃㪄㫋㫆㪄㪣㪭㪛㪪
PLL
RxOUT
RA0-RA7 GA0-GA7 BA0-BA7
not connect not connect
DE
DCLK
RB0-RB7 GB0-GB7 BB0-BB7
not connect not connect DE
㪣㪭㪛㪪㪄㫋㫆㪄㪣㪭㪛㪪㩷㪧㪸㫉㪸㫃㫃㪼㫃 㪣㪭㪛㪪㪄㫋㫆㪄㪣㪭㪛㪪㩷㪧㪸㫉㪸㫃㫃㪼㫃
DCLK
Host Graphics Controller
PLL
RA0RA7, RB0RB7 Pixel R Data GA0GA7, RB0RB7 Pixel G Data BA0BA7BB0BB7 Pixel B Data
CLKB+
CLKB-
(7; MSB, 0; LSB)
(7; MSB, 0; LSB)
(7; MSB, 0; LSB)
100
Timing Converter
PLL
DE Data Enable
1) The system must have the transmitter to drive the module.
otes
2) LVDS cable impedance shall be 50 ohms per signal line or about 100 ohms per twist-pair line
when it is used differentially.
DCLK
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5.3 LVDS INTERFACE
Based on IPS Alpha Technology, Ltd. Module AX094F030F.
The 7st LVDSSEL signal of the connector pin specification is “L”or open.LVDSSEL = L or open
SIGNAL TRANSMITTER
THC63LVDM83A CONTROL
PIN INPUT
RA0/RB0 51 Tx IN0 27 Rx OUT0 RA0/RB0
RA1/RB1 52 Tx IN1 Rx OUT1 RA1/RB1
RA2/RB2 54 Tx IN2 TA OUT0+ RxA/B 0+ 30 Rx OUT2 RA2/RB2
RA3/RB3 55 Tx IN3 Rx OUT3 RA3/RB3
RA4/RB4 56 Tx IN4 33 Rx OUT4 RA4/RB4
RA5/RB5 3 Tx IN6 TA OUT0- Rx OUT6 RA5/RB5
GA0/GB0 4 Tx IN7 37 Rx OUT7 GA0/GB0
GA1/GB1 6 Tx IN8 Rx OUT8 GA1/GB1
GA2/GB2 7 Tx IN9 39 Rx OUT9 GA2/GB2
GA3/GB3 11 Tx IN12 TA OUT1+ RxA/B 1+ 43 Rx OUT12 RA3/RB3
GA4/GB4 12 Tx IN13 45 Rx OUT13 RA4/RB4
GA5/GB5 14 Tx IN14 46 Rx OUT14 RA5/RB5
BA0/BB0
24bit
BA1/BB1 19 Tx IN18 51 Rx OUT18 RA1/RB1
BA2/BB2 20 Tx IN19 Rx OUT19 RA2/RB2
BA3/BB3 22 Tx IN20 54 Rx OUT20 RA3/RB3
BA4/BB4 23 Tx IN21 TA OUT2+ Rx OUT21 RA4/RB4
BA5/BB5 24 Tx IN22 1 Rx OUT22 RA5/RB5
HSYNC/RSVD 1) 27 Tx IN24
VSYNC/RSVD 1) 28 Tx IN25 TA OUT2-
DE 30 Tx IN26
RA6/RB6 50 Tx IN27 7 Rx OUT27 RA6/RB6
RA7/RB7
GA6/GB6 8 Tx IN10 TA OUT3+ RxA/B 3+ 41 Rx OUT10 GA6/GB6
GA7/GB7 10 Tx IN11 42 Rx OUT11 GA7/GB7
BA6/BB6 16 Tx IN16 49 Rx OUT16 BA6/BB6
BA7/BB7 18 Tx IN17 TA OUT3- Rx OUT17 BA7/BB7
RSVD 1) 25 Tx IN23 2 Rx OUT23 RSVD 1)
DCLK 31 TxCLK IN TxCLK OUT+
RA0RA7, RB0RB7 :Pixel R Data (7;MSB, 0;LSB) GA0GA7, GB0GB7 :Pixel G Data (7;MSB, 0;LSB) BA0BA7, BB0BB7 :Pixel B Data (7;MSB, 0;LSB)
DE :Data Enable
15 Tx IN15 TA OUT1- RxA/B 1- Rx OUT15 RA0/RB0
2 Tx IN5 34 Rx OUT5 RA7/RB7
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INTERFACE CONNECTOR
TV Set TFT-LCD
RxA/B 0- 35
RxA/B 2+ 55
RxA/B 2- 5 Rx OUT25 VSYNC/RSVD 1)
RxA/B 3- 50
RxCLKA/B IN+ 26
TxCLK OUT- RxCLKA/B IN-
RECEIVER TFT
PIN
OUTPUT INPUT
29
32
38
47
53
3 Rx OUT24
6 Rx OUT26
RxCLK OU
HSYNC/RSVD 1)
DE
DCLK
Notes 1)RSVD(reserved)pins on the transmitter shall be tied to"H"or"L".
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T
The 7st LVDSSEL signal of the connector pin specification is “H”.LVDSSEL = H
SIGNAL TRANSMITTER
THC63LVDM83A
PIN INPUT TV Set TFT-LCD PIN OUTPUT
RA2/RB2 51 Tx IN0 27
RA3/RB3 52 Tx IN1
RA4/RB4 54 Tx IN2 TA OUT0+ Rx OUT2 RA4/RB4
RA5/RB5 55 Tx IN3
RA6/RB6 56 Tx IN4 Rx OUT4 RA6/RB6
GA2/GB2 4 Tx IN7
GA3/GB3 6 Tx IN8 38 Rx OUT8 GA3/GB3
GA4/GB4 7 Tx IN9
GA5/GB5 11 Tx IN12 TA OUT1+ RxA/B 1+ 43 Rx OUT12 GA5/GB5
24bit
BA3/BB3 19 Tx IN18
BA4/BB4 20 Tx IN19
BA5/BB5 22 Tx IN20 Rx OUT20 BA5/BB5
BA6/BB6
BA7/BB7 24 Tx IN22 Rx OUT22 BA7/BB7
VSYNC/RSVD 1) 28 Tx IN25
DE 30 Tx IN26
RA0/RB0 50 Tx IN27
RA1/RB1 2 Tx IN5
GA0/GB0
RSVD 1) 25 Tx IN23
DCLK 31 TxCLK IN TxCLK OUT+ RxCLKA/B IN+ 26 RxCLK OU
RA0RA7, RB0RB7 :Pixel R Data (7;MSB, 0;LSB) GA0GA7, GB0GB7 :Pixel G Data (7;MSB, 0;LSB) BA0BA7, BB0BB7 :Pixel B Data (7;MSB, 0;LSB)
DE :Data Enable
23 Tx IN21 TA OUT2+ RxA/B 2+
8 Tx IN10 TA OUT3+ RxA/B 3+ 41 Rx OUT10 GA0/GB0
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INTERFACE CONNECTOR
RxA/B 0+ 30
RxA/B 0- 35 Rx OUT6 RA7/RB7RA7/RB7 3 Tx IN6 TA OUT0-
RxA/B 1- 47 Rx OUT15 BA2/BB2BA2/BB2 15 Tx IN15 TA OUT1-
TA OUT2- RxA/B 2- 5 Rx OUT25
RxA/B 3- 50 Rx OUT17 BA1/BB1BA1/BB1 18 Tx IN17 TA OUT3-
TxCLK OUT-
RxCLKA/B IN-
RECEIVER TFT
Rx OUT0 RA2/RB2
Rx OUT1 RA3/RB3
29
Rx OUT3 RA5/RB5
32
33
Rx OUT7 GA2/GB2
37
Rx OUT9 GA4/GB4
39
45 Rx OUT13 GA6/GB6GA6/GB6 12 Tx IN13
46 Rx OUT14 GA7/GB7GA7/GB7 14 Tx IN14
51
Rx OUT18 BA3/BB3
53 Rx OUT19
54
55
Rx OUT21 BA6/BB6
1
3 Rx OUT24 HSYNC/RSVD 1)HSYNC/RSVD 1) 27 Tx IN24
6 Rx OUT26 DE
7 Rx OUT27
34 Rx OUT5
42 Rx OUT11 GA1/GB1GA1/GB1 10 Tx IN11
49 Rx OUT16 BA0/BB0BA0/BB0 16 Tx IN16
2
Rx OUT23 RSVD 1)
CONTROL
INPUT
BA4/BB4
VSYNC/RSVD 1)
RA0/RB0
RA1/RB1
DCLK
Notes 1)RSVD(reserved)pins on the transmitter shall be tied to"H"or"L".
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5.4 CORRESPONDENCE BETWEEN INPUT DATA AND DISPLAY IMAGE
Based on IPS Alpha Technology, Ltd. Module AX094F030F.
Display data of adjacent one pixel is latched during one cycle of DCLK.
㩿㪈㪃㪈㪀 㩿㪈㪃㪉㪀
㪩㪘 㪞㪘 㪙㪘 㪩㪙 㪞㪙 㪙㪙
   
   
   
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odd pixel㧦RA0㨪RA7 :R data
GA0㨪GA7 :G data BA0㨪BA7 :B data
Even pixel㧦RB0㨪RB7 :R data
GB0㨪GB7 :G data BB0㨪BB7 :B data
  
&%.-
4#㨪4# )#㨪)# $#㨪$#
4$㨪4$ )$㨪)$ $$㨪$$
㩷㪛㪜
&6/)
㪠㫅㫍㪸㫃㫀㪻

㪈㪃㪈 㪊㪃㪈 㪈㪐㪈㪎㪃㪈 㪈㪐㪈㪐㪃㪈 㪈㪃㪉 㪊㪃㪉
㪠㫅㫍㪸㫃㫀㪻
㪠㫅㫍㪸㫃㫀㪻㪠㫅㫍㪸㫃㫀㪻 㪉㪃㪈 㪋㪃㪈 㪈㪐㪈㪏㪃㪈 㪈㪐㪉㪇㪃㪈 㪉㪃㪉 㪋㪃㪉
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5.5 RELATIONSHIP BETWEEN DISPLAY COLORS AND INPUT SIGNALS
Based on IPS Alpha Technology, Ltd. Module AX094F030F.
Red Data Green Data Blue Data
R4 R3 R2 R1 R0 G7 G6Input R7 R6 R5 G5 G4 G3 G2 G1 G0 B7 B6 B5 B4 B3 B2 B1 B0
Color
Black
Red(255)
Green(255)
Basic Blue(255)
Color
Cyan 000000001111111111111111
Magenta 111111110000000011111111
Yellow 111111111111111100000000
White 111111111111111111111111
Black
Red (1)
Red (2)
Red
Red(254)
Red(255)
Black
Green (1)
Green (2)
Green
Green(254)
Green(255)
Black
Blue (1)
Blue (2)
Blue
Blue (254)
Blue (255)
MSB LSB MSB LSB MSB LSB
000000000000000000000000
111111110000000000000000
000000001111111100000000
000000000000000011111111
000000000000000000000000
000000010000000000000000
000000100000000000000000
: ::::::::::::::::::::::::
: ::::::::::::::::::::::::
111111100000000000000000
111111110000000000000000
000000000000000000000000
000000000000000100000000
000000000000001000000000
: ::::::::::::::::::::::::
: ::::::::::::::::::::::::
000000001111111000000000
000000001111111100000000
000000000000000000000000
000000000000000000000001
000000000000000000000010
: ::::::::::::::::::::::::
: ::::::::::::::::::::::::
000000000000000011111110
0000000000000000111 11111
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Notes 1) Definition of gray scale: Color(n)࡮࡮࡮࡮Number in parenthesis indicates gray scale level. Larger n corresponds to brighter level.
2) Data: 1:High, 0:Low
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A
N
N
N
N
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6. INTERFACE TIMING
6.1 LVDS receiver timing
RxA0
RxA1
RxA2
RxA3
CLK
CLKB
GA2/0 RA7/5 RA6/4 RA5/3 RA3/1 RA2/0
BA3/1 BA2/0 GA7/5 GA6/4 GA4/2 GA3/1
DE
X BA1/7 BA0/6 GA1/7 RA1/7 RA0/6
VSY
tRPA2
tRPA3
tRPA4
tRPA5
tRPA6
tRPA0
tRPA1
RA4/2
GA5/3
HSY
C
BA7/5 BA5/3 BA4/2
C
BA6/4
GA0/6
Vdiff=0V
Vdiff=0V
Vdiff=0V
Vdiff=0V
tCLKA
Vdiff=0V
tSC
tCLKB
Vdiff=0V
Rx0=(Rx0+)-(Rx0-)
Rx1=(Rx1+)-(Rx1-)
Rx2=(Rx2+)-(Rx2-)
Rx3=(Rx3+)-(Rx3-)
CLK=(CLK+)-(CLK-)
RxB0
RxB1
RxB2
RxB3
GB2/0 RB7/5 RB6/4 RB5/3 RB4/2 RB3/1 RB2/0
BB3/1 BB2/0 GB7/5 GB6/4 GB5/3 GB4/2 GB3/1
DE
X BB1/7 BB0/6 GB1/7 GB0/6 RB1/7 RB0/6
CLK Frequency DCLK 65 66 71 MHz =1/tclk
Rx*0
2nd data position tRP2 6/7tCLK -0. 6/7tCLK 6/7tCLK +0.
Rx*1
Rx*2
Rx*3
tRPB2
tRPB3
tRPB4
tRPB5
tRPB6
tRPB0
tRPB1
VSY
Item
CLK Skew
HSY
C
BB7/5 BB6/4 BB5/3 BB4/2
C
Symbol
tSC
Min
-4.0
Typ Max
0
+4.0 ns
0 data position tRP0 1/7tCLK - 0.4 1/7tCLK 1/7tCLK +0.
1st data position
tRP1 -0.
3rd data position tRP3 5/7tCLK -0. 5/7tCLK
0 +0.
5/7tCLK + 0.
4th data position tRP4 4/7tCLK - 0. 4/7tCLK 4/7tCLK +0.
5th data position tRP5 3/7tCLK - 0. 3/7tCLK
3/7tCLK + 0.
6th data position tRP6 2/7tCLK - 0. 2/7tCLK 2/7tCLK + 0.
Vdiff=0V
Vdiff=0V
Vdiff=0V
Vdiff=0V
Unit Note
ns
Based on IPS Alpha Technology, Ltd. Module AX094F030F.
IPS Alpha Technology, Ltd. Date Apr. 21, 2009 Sheet No.
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6.2 SYNCRONIZATION SIGNAL TIMING
Based on IPS Alpha Technology, Ltd. Module AX094F030F.
DE
DE
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tV
tVD
tH
tHD
DE
ITEM SYMBOL Min. Typ. Max. UNIT NOTE
Vertical Frequency fV 48 60 62 Hz
Vertical Period tV 1090 1100 1350 tH
Vertical Valid tVD
Horizontal Frequency fH 63 66 68 kHz
Horizontal Period tH 990 1000
Horizontal Valid tHD 960 tCLK
1080 tH
1049 tCLK
2pxl/clk
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6.3 TIMING BETWEEN INTERFACE SIGNALS POWER SUPPLY
Based on IPS Alpha Technology, Ltd. Module AX094F030F.
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Power Supply VDD
LVDS Sel
LVDS Signals VI
Back light power supply VBL
0V
12V
0V
24V
0V
11.4V
1V
T1
Hi-Z or Lo
T2
T11 T12
T3
Active Signal
21.6V
T4
T9
T8
T7
T10
Hi-Z or Lo
Back light ON/OFF
1)
Back light BRT
1)
Note 1) In all periods, the backlight ON/OFF signal voltage and the BRT signal voltage should be lower than
the backlight power supply voltage.
0V
T5
0V
010
T1
350 0 0
T2 T7 T12
10
T3 T8
00
T4 T9
0 350
T5 T10
0
T6 T11 T2-150
0
T6
10
Unit : ms
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IPS4PS-2610-AF094F030B-1
Apr. 21, 2009
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Apr. 21, 2009
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8. DESIGNATION OF LABEL
The barcode label is pasted on each TFT open cell. Users use this bar code label to write adjustment Vcom value and data to Tcon ROM which is specified by IPS Alpha Technology,Ltd..
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㪘㪝㪇㪐㪋㪝㪇㪊㪇㪙
Item Description
㽲 㽳
㽵 㽶
Product Name
Rev. is the column for manufacturing convinience. A-Z except I and O may be written on this column.
Lot mark
 information Bar code(+)
㪩㪼㫍
㪪㪘㪤㪧㪣㪜㪇㪇㪇㪈
㪝㪈㪈㪈㪇㪇㪇㪈㪩㪇㪈
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9. COSMETIC SPECIFICATIONS
Based on IPS Alpha Technology, Ltd. Module AX094F030F.
9.1 Condition for cosmetic inspection
(1) Viewing zone
a) The figure shows the correspondence
between eyes (of inspector) and
TFT-LCD module. ǰ45: when non-operating inspection 䇭䇭䇭䇭 ǰ5 : when operating inspection
b) Inspection should be executed only from
front side and only A-zone.
Cosmetic of B-zone and C-zone are ignore.
(refer to 9.2 Definition of zone)
(2) Environmental
a) Temperature : 25 degrees
b) Ambient light : about 700 lx and non-directive when operating inspection.
: about 1000 lx and non-directive when non-operating inspection.
c) Back-light : when non-operating inspection, back-light should be off .
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㪠㫅㫊㫇㪼㪺㫋㫀㫆㫅㩷㫍㫀㪼㫎
㪣㫀㪾㪿㫋
㪸㪹㫆㫌㫋㩷㪌㪇㪇㫄㫄
㪫㪝㪫㪄㪣㪚㪛㩷㪤㫆㪻㫌㫃㪼
9.2 Definition of zone A-zone : Display area (pixel area)B-zone : Area between A-zone and C-zoneC-zone : Metallic bezel area
㪘㪄㫑㫆㫅㪼 㪙㪄㫑㫆㫅㪼
㪚㪄㫑㫆㫅㪼
IPS Alpha Technology, Ltd. 12-1/3Date Apr. 21, 2009 Sheet No. PageIPS4PS 2612 -AF094F030B-1
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9.3 COSMETIC SPECIFICATIONS
When displaying conditions are not stable (ex. at turn on or off), the following specifications
are not applied.
No ITEM
1
Operating
inspection
2
3 Uneven brightness
4
5
6
Dot defect
Stain inclusion
Line shape W : width (mm) L : length (mm)
Stain inclusion
Dot shape
D : ave. dia (mm)
Scratch on polarizer
Line shape W : width (mm) L : length (mm)
Scratch on polarizer
Dot shape
D : ave. dia (mm)
Sparkle
mode
Black mode
Line defect
W0.02
W0.04
W0.08
W>0.08
W
W0.08
W>0.08
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Max. acceptable number
㪪㩷㪾㫉㪸㪻㪼 㪘㩷㪾㫉㪸㪻㪼
1-dot
2-dots
3-dots
Density
Total
1-dot
2-dots
3-dots
Density
Total
Total
L : Ignore
L4.0
L>4.0
L2.0
L>2.0
-
D0.22
D0.5
D>0.5
0.02 L : Ignore
L20 10
L>20 0
-
D0.2 Ignore
D>0.6 0
㪇㪉 㪇 㪇㪇 㪇㪉 㪇㪉 㪌㪎 㪈㪈 㪇㪇 㪊 㪌㪎 㪌㪎
Serious one is
not allowed
(See dot shape)
㪘㪄㫑㫆㫅㪼
Ignore
8
0
8
0
Ignore
8
0
Ignore
0
Unit
pcs
Units
pcs/20mm 1),2),6)
pcs 1),2)
pcs
Units
pcs/20mm
pcs
--
pcs 7)
pcs
pcs 8)
pcsD0.6 10
Note
1),2),4)
1),2),5)
1),3),4)
1),3),5)
1),3),6)
1),3)pcs
1)
7)
8)7
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N
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No
Bubbles, peeling
8 pcs
9
in polarizer
D : ave. dia (mm)
Wrinkles on polarizer
ITEM
D0.2 D0.5
D>0.5
Max. acceptable number
㪘㪄㫑㫆㫅㪼
Ignore
0
Serious one is
not allowed.
ote 1) Dot defect : defect area > 1/2 dot
2) Sparkle mode : brightness of dot is more than 30% at black. (visible to eye)
3) Black mode : brightness of dot is less than 70% of L255 brightness.
4) 1 dot : defect dot is isolated, not attached to other defect dot.
5) N dots : N defect dots are consecutive. (N means the number of defects dots)
6) Density : number of defect dots inside 20mm.
7) Those stains which can be wiped out easily are acceptable.
8) Polarizer area inside of B-zone is not applied.
9) No major (serious) defects when viewed in gray scale mode.
Unit
-
Note
8)10
-
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㪚㪦㩿
㪚㪦㪝㩿㪛㫉㪸㫀㫅㪀
㪧㪚㪙㩿㪛㫉㪸㫀㫅 㪀
㩿
㪫㪝㪫㪄㪣㪚㪛㪂㪧㫆㫃㪸㫉㫀㫑㪼㫉
㪚㪦㪝㩿㪞㪸㫋㪼㪀
㪚㪦㪝㩿㪛㫉㪸㫀㫅㪀
㪧㪚㪙㩿㪛㫉㪸㫀㫅 㪀
㪧㪚㪙㩿㪛㫉㪸㫀㫅㪀
㪫㪝㪫㪄㪣㪚㪛㪂㪧㫆㫃㪸㫉㫀㫑㪼㫉
㪪㪼㪺㫋㫀㫆㫅㩷㪘㪄㪘
㪫㪝㪫㪄㪣㪚㪛
㪧㫆㫃㪸㫉㫀㫑㪼㫉
㪚㫆㫅㪻㫌㪺㫋㫀㫍㪼㩷㫃㪸㫐㪼㫉
㪪㪼㪺㫋㫀㫆㫅㩷㪘㪄㪘
㪫㪝㪫㪄㪣㪚㪛
㪧㫆㫃㪸㫉㫀㫑㪼㫉
㪚㫆㫅㪻㫌㪺㫋㫀㫍㪼㩷㫃㪸㫐㪼㫉
㪘㪺㫋㫀㫍㪼㩷㪘㫉㪼㪸
㪫㪝㪫㪄㪣㪚㪛㪆㪧㫆㫃㪸㫉㫀㫑㪼㫉㪙㪼㫑㪼㫃
㪚㫌㫊㪿㫀㫆㫅㩷㪫㪸㫇㪼 䇭䌴㻢 㪇㪅㪍
㪤㫆㫃㪻㪼㪻㩷㪝㫉㪸㫄㪼
㪚㫌㫊㪿㫀㫆㫅㩷㪫㪸㫇㪼 䇭䌴㻢 㪈㪅㪌
㪚㫃㪼㪸㫉㪸㫅㪺㪼㻢
㪇㪅㪌
㪘㪺㫋㫀㫍㪼㩷㪘㫉㪼㪸
㪫㪝㪫㪄㪣㪚㪛㪆㪧㫆㫃㪸㫉㫀㫑㪼㫉㪙㪼㫑㪼㫃
㪚㫌㫊㪿㫀㫆㫅㩷㪫㪸㫇㪼 䇭䌴㻢 㪇㪅㪍
㪤㫆㫃㪻㪼㪻㩷㪝㫉㪸㫄㪼
㪚㫌㫊㪿㫀㫆㫅㩷㪫㪸㫇㪼 䇭䌴㻢 㪈㪅㪌
㪚㫃㪼㪸㫉㪸㫅㪺㪼㻢
㪇㪅㪌
㪬㫅㫀㫋㩷㪑㩷㪲㫄㫄㪴
10. PRECAUTION
Please pay attention to the followings when a TFT open cell is used,
handled and mounted.
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10.1 Recommendation of GND c
(1) Please connect LCD surface (front side) to GND for prevention of static charge.
䌯䌮䌮䌥䌣䌴䌩䌯n of TFT open cell
10.2 Recommendation of structure for supporting TFT-LCD Rim
(1) When the LCD is applied by stress, it occurs abnormal image quality.
(It is confirmed visually especially in case of gray raster.)
The system shown on the drawing down below is recommended to maintain the LCD by cutting down the LCD stress.
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㪫㫆㫉㪼㫃㪸㫅㪺㪼㩷㫆㪽㩷㪛㫀㫄㪼㫅㫊㫀㫆㫅㩷㪘㪃㪙㩷㻡㩷㫧㪇㪅㪍 㪚㩷㪔㩷㪇㪅㪏㪃㩷㪛㩷㪔㩷㪇㪅㪍 㪝㩷㪔㩷㪌㪇䌾㪎㪇 㪜㩷㪔㩷㪈㪉㪇䌾㪈㪊㪇
㪣㪚㪛
㪣㪚㪛㩷㫄㫆㫃㪻㩷㪽㫉㪸㫄㪼
㪚㪦㪝㩿㪞㪸㫋㪼㪀
㪚㪦㪝㩿㪛㫉㪸㫀㫅㪀
㪬㫅㫀㫋㩷㪑㩷㪲㫄㫄㪴
㪫㪝㪫㪄㪣㪚㪛
㪧㫆㫃㪸㫉㫀㫑㪼㫉
㪚㪦㪝
㪧㪚㪙
(2)The dimension of mold frame and LCD is reccomended as follows.
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(3)The wall of the mold frame should be laid on whole sides of the LCD as much as possible.
(4)The holding space for the LCD should be maintained by the mold frame and the bezel.
(5)Screw the mold frame to the lower frame at many places to keep flatness of LCD support area.
(6)The mold frame should be the structure that is divided into four sides to keep flatness of LCD support area.
(7)LCD support surface at lower side should smooth to cutting down the LCD stress.
(Put PET tape between LCD and support area, etc.)
(8)At the time of ground connection, take a method that does not put a load to the LCD.
(9)Use silicon rubber with hardness 20 for cushion to the mold frame side.
(10)Use foaming cushion to Bezel side.
(11)Flatness of the Bezel should be 0.5 which also should be the shape does not have partial changing points.
(12)The bezel should be the structure that is divided into four sides and screwed from the upper side.
(13)The surface of the cushion (the surface which attaches to the LCD) should be mat finishing or
should put PET tape to avoid the LCD and the cushion from sticking together.
10.3 Precaution to handling and mounting
(1)The polarizer on a TFT cell should carefully be handled due to its softness, and should not be
touched, pushed or rubbed with glass, tweezers or anything than HB pencil lead. The surface of
a polarizer should not be touched and rubbed with bare hand,greasy clothed or dusty clothes.
(2)The surface of a polarizer should be gently wiped with absorbent cotton, chamois or other soft
materials slightly contained petroleum benzene when the surface becomes dirty. Normal-hexane
on a TFT cell . Other cleaning chemicals such as acetone, toluen and alcohol should not be used
to clean adhesives because they cause chemical damage to a polarizer. (3)Saliva or water drops should be immediately wiped off. Otherwise, the portion of a polarizer and
electronic parts may be deformed. (4)Applying upward bend to COF may cause a malfunction electrically and mechanically.
(5)Applying too much force and stress to PCB and COF may cause a malfunction electrically and mechanically.
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10.4 Precaution to operation
(1) The ambient temperature near the operated cell and electronic parts should be satisfied with the
ratings. Unless it meets the specifications, sufficient cooling system should be adopted to system.
(2) The spike noise causes the mis-operation of a TFT open cell. The level of spike noise should be as follows:
-200mV<=over- and under- shoot of VDD<= +200mV
VDD including over- and under- shoot should be satisfied with the absolute maximum ratings.
(3) Optical response time, luminance and chromaticity depend on the temperature of a TFT open cell.
(4) Sudden temperature change may cause dew on and/or in the a TFT open cell. Dew males damage to a
polarizer and/or electrical contacting portion. Dew causes fading of displayed quality.
(5) Fixed patterns displayed on a TFT open cell for a long time may cause after-image. It will be recovered
soon.
(6) The TFT open cell has high frequency circuits. Sufficient suppression to electromagnetic interference should
be done by system manufacturers. Grounding and shielding methods may be effective to minimize
the interference. (7) Noise may be heard when a back-light is operated. If necessary, sufficient suppression should be
done by system manufacturers.
(8) Inserting or pulling I/F connectors causes any trouble when power supply and signal dates are
on-state.I/F connectors should be inserted and pulled after power supply and signal dates are
turned off.
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10.5 Electrostatic discharge control
(1) Since a TFT open cell consists of a TFT cell and electronic circuits with CMOS-ICs, which are
very weak to electrostatic discharge, persons who are handling a TFT open cell should be grounded
through adequate methods such as a list band. Connector pins should not be touched directly with bare hands.
(2) Protection film for a polarizer on a TFT open cell should be slowly peeled off so that the electrostatic
charge can be minimized.
10.6 Precaution to strong light exposure
(1) The TFT open cell should not be exposed under strong light. Otherwise, characteristics of a polarizer and
color filter in a TFT open cell may be degraded.
10.7 Precaution to storage
When TFT open cells for replacement are stored for a long time, following precautions should be taken care of:
(1) TFT open cells should be stored in a dark place. It is prohibited to apply sunlight or fluorescent light during storage. TFT open cells should be stored at 0 to 35 at normal humidity (60%RH or less).
(2) The surface of polarizers should not come in contact with any other object. It is recommended that
TFT open cells should be stored in the IPS Alpha Technology's shipping box.
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10.8 Precaution to handling protection film
(1) The protection film for polarizers should be pealed off slowly and carefully by persons who are
electrically grounded with adequate methods such as a list band. Besides, ionized air should be blown
over during peeling action. Dusts on a polarizer should be blown off by an ionized nitrogen gun and
so on.
(2) The protection film should be peeling off without rubbing it to the polarizer. Because, if the film is
rubbed together with the polarizer, since the film is attached to the polarizer with a small amount
of adhesive, the adhesive may remain on a polarizer.
(3) The TFT open cell with protection film should be stored on the conditions explained in 10.7 (1). However,
in case that the storage time is too long, adhesive may remain on a polarizer even after a protection
film is peeled off. Besides, in case that a TFT open cell is stored at higher temperature and/or higher
humidity, adhesive may remain on a polarizer. The remained adhesive may cause non-uniformity
of display image.
(4) The adhesive can be removed easily with Normal-Hexane. The remained adhesive or its vestige on
the polarizer should be wiped off with absorbent cotton or other soft materials such as chamois
slightly contained Normal-Hexane.
(5) The procedure of peeling protection film on polarizer is recommended as follows.
(5-1)Set up LCD on the rest of the cell as the lower polarizer film comes on top gently.
(5-2)Peel off protection film from lower polarizer film with tape.
The protection film should be peeled as Drawing 1 or 2.
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Side of drain COF
Side of gate COF
Side of drain COF
Side of gate COF
Drawing 1 Drawing 2
(5-3)Set up LCD on the Backlight unit as the upper polarizer film comes on top gently.
(5-4)Connect LCD surface to GND.
(5-5)Peel off protection film from upper polarizer film with tape.
The protection film should be peeled as Drawing 3 or 4.
Side of gate COF
Side of drain COF
Side of gate COF
Side of drain COF
Drawing 3 Drawing 4
10.9 Safety
(1) Since a TFT cell is made of glass, handling to the broken TFT open cell should be taken
care sufficiently in order not to be injured. Hands touched liquid crystal from a broken TFT open cell should be
washed sufficiently.
10.10 Environmental protection
(1) Flexible printed circuits and printed circuits board contain small amount of lead.
Please follow local ordinance or regulations for its disposal.
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10.11 Use restrictions and limitations
(1) This product is not authorized for use in life support devices or systems, military applications or
other applications which pose a significant risk of personal injury. (2) In no event shall IPS Alpha Technology, Ltd., be liable for any incidental, indirect or consequential damages in
connection with the installation or use of this product, even if informed of the possibility thereof
in advance. These limitations apply to all causes of action in the aggregate, including without
limitation breach of contact, breach of warranty, negligence, strict liability, misrepresentation and
other torts.
10.12 Others
(1) Electrical components which may not affect electrical performance are subjective to change without
notice because of their availability.
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IPS Alpha Technology, Ltd. 13-5/5Date Apr. 21, 2009 Sheet No. PageIPS4PS 2613 -AF094F030B-1
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