• Floating channel designed for bootstrap operation
••
Fully operational to +600V or+1200V
Tolerant to negative transient voltage
dV/dt immune
••
• Gate drive supply range from 10V/12V to 20V DC and
••
up to 25V for transient
••
• Undervoltage lockout for all channels
••
••
• Over-current shut down turns off all six drivers
••
••
• Independent 3 half-bridge drivers
••
••
• Matched propagation delay for all channels
••
••
• 2.5V logic compatible
••
••
• Outputs out of phase with inputs
••
••
• All parts are also available LEAD-FREE
••
Description
The IR2133IR2135/IR2233IR2355 (J&S) are high voltage, high speed
power MOSFET and IGBT driver with three independent high side and
low side referenced output channels for 3-phase applications. Proprietary HVIC technology enables ruggedized monolithic construction.
Logic inputs are compatible with CMOS or LSTTL outputs, down to
2.5V logic. An independent operational amplifier provides an analog
feedback of bridge current via an external current sense resistor. A
current trip function which terminates all six outputs can also be derived from this resistor. A shutdown function is available to terminate all six outputs. An open drain FAULT signal is provided to
indicate that an over-current or undervoltage shutdown has occurred. Fault conditions are cleared with the FLT-CLR lead. The
output drivers feature a high pulse current buffer stage designed for minimum driver cross-conduction. Propagation delays are
matched to simplify use in high frequency applications. The floating channels can be used to drive N-channel power MOSFETs or
IGBTs in the high side configuration which operates up to 600 volts or 1200 volts.
Product Summary
V
OFFSET
V
OUT
t
on/off
Deadtime (typ.)250 ns
600V or 1200V max.
I
+/-
O
200 mA / 420 mA
10 - 20V or 12 - 20V
(typ.)750/700 ns
Packages
28-Lead SOIC
44-Lead PLCC w/o 12 leads
28-Lead PDIP
Typical Connection
(Refer to Lead Assignments for correct pin configuration). This/These diagram(s) show electrical connections only.
Please refer to our Application Notes and DesignTips for proper circuit board layout.
www.irf.com1
up to 600V or 1200V
IR2133/IR2135/IR2233/IR2235(J&S
) & (PbF)
Absolute Maximum Ratings
Absolute Maximum Ratings indicate sustained limits beyond which damage to the device may occur. All voltage parameters are absolute voltages referenced to COM. The Thermal Resistance and Power Dissipation
ratings are measured under board mounted and still air conditions.
Symbol Definition Min. Max. Units
V
B1,2,3
High side floating supply voltage (IR2133/IR2135) -0.3 625
(IR2233/IR2235) -0.3 1225
V
V
V
V
V
V
S1,2,3
HO1,2,3
CC
SS
LO1,2,3
IN
High side floating supply offset voltageV
High side floating output voltageV
- 25V
B1,2,3
- 0.3V
S1,2,3
B1,2,3
B1,2,3
+ 0.3
+ 0.3
Fixed supply voltage -0.3 25
Logic ground VCC - 25 VCC + 0.3
Low side output voltage -0.3 VCC + 0.3
Logic input voltage (HIN, LIN, ITRIP, SD & FLT-CLR) VSS - 0.3 (VSS + 15) or
(V
+ 0.3)
CC
V
whichever is
lower
V
V
V
dV
P
IN,AMP
OUT,AMP
FLT
D
Op amp input voltage (CA+ & CA-) VSS - 0.3 VCC + 0.3
Op amp output voltage (CAO) VSS - 0.3 VCC + 0.3
output voltage
FAULT
/dtAllowable offset supply voltage transient — 50
S
Package power dissipation @ T
≤ 25ºC (28 Lead PDIP) — 1.5
A
VSS - 0.3 VCC + 0.3
(28 Lead SOIC) — 1.6
V/ns
W
(44 lead PLCC) — 2.0
Rth
(28 Lead SOIC) — 78
Thermal resistance, junction to ambient (28 Lead PDIP) — 83
JA
ºC/W
(44 lead PLCC) — 63
T
J
T
S
T
L
Junction temperature — 125
Storage temperature -55 150
Lead temperature (soldering, 10 seconds — 300
ºC
Recommended Operating Conditions
The input/output logic timing diagram is shown in figure 1. For proper operation the device should be used within the
recommended conditions. All voltage parameters are absolute voltages referenced to COM. The VS offset rating is
tested with all supplies biased at 15V differential.
Symbol Parameter DefinitionMin.Max.Units
V
B1,2,3
V
S1,2,3
V
HO1,2,3
V
CC
V
SS
V
LO1,2,3
V
IN
V
IN,AMP
V
OUT,AMP
V
FLT
Note 1: Logic operational for VS of COM - 5V to COM + 600V/1200V. Logic state held for VS of COM -5V to COM -VBS. (Please refer to the Design Tip
DT97-3 for more details).
Note 2: All input pins, op amp input and output pins are internally clamped with a 5.2V zener diode.
High side floating supply voltage V
+ 10/12 V
S1,2,3
S1,2,3
High side floating supply offset voltage (IR2133/IR2135) Note 1 600
(IR2233/IR2235) Note 1 1200
High side floating output voltage V
S1,2,3
V
B1,2,3
Fixed supply voltage 10 or 12 20
Low side driver return -5 5
Low side output voltage 0 V
Logic input voltage (HIN, LIN, ITRIP, SD & FLT-CLR) V
Op amp input voltage (CA+ & CA-) V
Op amp output voltage (CAO) V
output voltage
FAULT
V
SS
SS
SS
SS
CC
VSS + 5
VSS + 5
VSS + 5
V
CC
+ 20
V
2www.irf.com
IR2133/IR2135/IR2233/IR2235(J&S
Dynamic Electrical Characteristics
(
V
BIAS
,
V
V
CC
BS1,2,3
)
= 15V,V
S1,2,3
= V
SS
,
TA = 25oC and C
= 1000 pFunless otherwise specified.
L
) & (PbF)
Symbol
t
on
t
off
t
r
t
f
t
sd
t
itrip
t
bl
t
flt
t
fil,in
t
fltclr
DefinitionMin. Typ. Max. Units Test Conditions
Turn-on propagation delay500 7501000
Turn-off propagation delay450 700 950
Turn-on rise time — 90 150
Turn-off fall time — 40 70
SD to output shutdown propagation delay500 7501000V
ITRIP to output shutdown propagation delay600 8501100V
ITRIP blanking time — 400 —ITRIP = 1V
ITRIP to FAULT propagation delay400 650 900V
Input filter time (HIN, LIN and SD) — 310 —V
FLT-CLR to FAULT clear time600 8501100V
DTDeadtime, LS turn-off to HS turn-on &100 250 400V
HS turn-off to LS turn-on
SR+Amplifier slew rate (positive) 5 10 —
SR-Amplifier slew rate (negative) 2 2.5 —
NOTE: For high side PWM, HIN pulse width must be ≥ 1µ sec
Static Electrical Characteristics
V
BIAS
are referenced to V
referenced to COM
Symbol
V
IH
V
IL
V
FCLR,IH
V
FCLR,IL
V
SD,TH
V
SD,TH
V
IT,TH
V
IT,TH
V
OH
V
OL
I
LK
I
QBS
I
QCC
+
I
IN
-
I
IN
I
SD
-
I
SD
I
ITRIP
I
ITRIP
,
(V
CC
V
) = 15V unless otherwise specified and TA = 25oC. All static parameters other than IO and VO
BS1,2,3
and are applicable to all six channels (H
SS
and V
and are applicable to the respective output leads: H