IOR IR2122 S User Manual
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Preliminary Data Sheet No. PD60130-J
CURRENT SENSING SINGLE CHANNEL DRIVER
Features
• Floating channel designed for bootstrap operation
Fully operational to +600V
T olerant to negative transient v oltage
dV/dt immune
• Gate drive supply range from 10 to 20V
• Undervoltage lockout
• 3.3V , 5V and 15V input logic compatib le
FAULT
•
• Output out of phase with input
Description
The IR2122(S) is a high voltage, high speed power
MOSFET and IGBT driver. Proprietary HVIC and latch
immune CMOS technologies enable ruggedized
monolithic construction. The logic input is compatible
with standard CMOS or LSTTL outputs, down to
3.3V. The protection circuity detects over-current in
the driven power transistor and terminates the gate
drive voltage. An open drain
vided to indicate that an over-current shutdown has
occurred. The output driver features a high pulse
current buffer stage designed for minimum cross-conduction. The floating channel can be used to drive an
N-channel power MOSFET or IGBT in the high side
or low side configuration which operates up to 600
volts.
lead indicates shutdown has occured
FAULT
signal is pro-
Product Summary
V
OFFSET
+/- 110 mA / 110 mA
I
O
V
OUT
V
CSth
t
(typ.) 250 & 200 ns
on/off
Packages
8-Lead PDIP
IR2122(S
600V max.
10 - 20V
500 mV
8-Lead SOIC
)
Typical Connection
V
CC
IN
FAULT
www.irf.com 1
V
CC
IN
FAULT
COM
V
B
HO
CS
V
S
(Refer to Lead Assignments for correct pin configuration). This/These
diagram(s) show electrical connections only. Please refer to our
Application Notes and DesignTips for proper circuit board layout.
IR2122(S)
Absolute Maximum Ratings
Absolute Maximum Ratings indicate sustained limits beyond which damage to the device may occur. All voltage parameters are absolute voltages referenced to COM. The Thermal Resistance and Power Dissipation ratings are measured
under board mounted and still air conditions.
Symbol Definition Min. Max. Units
V
B
V
S
V
HO
V
CC
V
IN
V
FLT
V
CS
dVs/dt Allowable Offset Supply Voltage Transient — 50 V/ns
P
D
R
THJA
T
J
T
S
T
L
High Side Floating Supply Voltage -0.3 625
High Side Floating Offset Voltage VB - 25 VB + 0.3
High Side Floating Output Voltage VS - 0.3 V
B
+ 0.3
Logic Supply Voltage -0.3 25 V
Logic Input Voltage -0.3 V
Output Voltage -0.3 V
FAULT
Current Sense Voltage VS - 0.3 V
CC
CC
B
+ 0.3
+ 0.3
+ 0.3
Package Power Dissipation @ TA ≤ +25°C (8 Lead DIP) — 1.0
(8 Lead SOIC) — 0.625
Thermal Resistance, Junction to Ambient (8 Lead DIP) — 125
(8 Lead SOIC) — 200
°C/W
Junction Temperature — 150
Storage Temperature -55 150
°C
Lead Temperature (Soldering, 10 seconds) — 300
W
Recommended Operating Conditions
The Input/Output logic timing diagram is shown in Figure 1. For proper operation the device should be used within the
recommended conditions. The VS offset rating is tested with all supplies biased at 15V differential.
Symbol Definition Min. Max. Units
V
B
V
S
V
HO
V
CC
V
IN
V
FLT
V
CS
T
A
Note 1: Logic operational f or VS of -5 to +600V. Logic state held f or VS of -5V to -VBS. (Please refer to the Design Tip
DT97-3 for more details).
2 www.irf.com
High Side Floating Supply Voltage VS + 13 VS + 20
High Side Floating Offset Voltage Note 1 600
High Side Floating Output Voltage V
S
V
B
Logic Supply Voltage 13 20 V
Logic Input Voltage 0 V
Output Voltage 0 V
FAULT
Current Sense Signal Voltage V
S
CC
CC
V
+ 5
S
Ambient Temperature -40 150 °C
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