n Floating channel designed for bootstrap operation
Fully operational to +600V
Tolerant to negative transient voltage
dV/dt immune
n Gate drive supply range from 10 to 20V
n Undervoltage lockout for both channels
n Separate logic supply range from 5 to 20V
Product Summary
V
OFFSET
IO+/-2A / 2A
V
OUT
t
(typ.)120 & 94 ns
on/off
600V max.
10 - 20V
Logic and power ground ±5V offset
n CMOS Schmitt-triggered inputs with pull-down
Delay Matching10 ns
n Cycle by cycle edge-triggered shutdown logic
n Matched propagation delay for both channels
n Outputs in phase with inputs
Description
The IR2113L6 is a high voltage, high speed power MOSFET
and IGBT driver with independent high and low side referenced output channels. Proprietary HVIC and latch immune
CMOS technologies enable ruggedized monolithic construction. Logic inputs are compatible with standard CMOS or
LSTTL outputs. The output drivers feature a high pulse
current buffer stage designed for minimum driver cross-conduction. Propagation delays are matched to simplify use in
high frequency applications. The floating channel can be
used to drive an N-channel power MOSFET or IGBT in the
high side configuration which operates up to 600 volts.
Absolute Maximum Ratings
Absolute Maximum Ratings indicate sustained limits beyond which damage to the device may occur. All
voltage parameters are absolute voltages referenced to COM. The Thermal Resistance and Power Dissipation ratings are measured under board mounted and still air conditions.
SymbolParameterMin.Max.Units
V
B
V
S
V
HO
V
CC
V
LO
V
DD
V
SS
V
IN
dVS/dtAllowable Offset Supply Voltage Transient (Fig. 16)—50V/ns
P
D
R
thJA
T
j
T
S
T
L
High Side Floating Supply Absolute Voltage-0.5VS + 20
High Side Floating Supply Offset Voltage—600
CC
DD
B
+ 0.5
+ 0.5
+ 0.5
V
°C
High Side Output VoltageVS -0.5V
Low Side Fixed Supply Voltage-0.520
Low Side Output Voltage-0.5VCC + 0.5
Logic Supply Voltage-0.5VSS + 20
Logic Supply Offset VoltageVCC - 20V
Logic Input Voltage (HIN, LIN & SD)VSS - 0.5V
Package Power Dissipation @ TA ≤ = 25°C (Fig. 19)—1.6W
Thermal Resistance, Junction to Ambient— 75°C/W
Junction Temperature-55125
Storage Temperature-55150
Package Mounting Surface Temperature 300
Weight
1.5 (typical)g
www.irf.com1
4/13/99
IR2113L6
Recommended Operating Conditions
The Input/Output logic timing diagram is shown in Figure 1. For proper operation the device should be used within the
recommended conditions. The VS and VSS offset ratings are tested with all supplies biased at 15V differential. Typical
ratings at other bias conditions are shown in Figures 36 and 37.
SymbolParameterMin.Max.Units
V
B
V
S
V
HO
V
CC
V
LO
V
DD
V
SS
V
IN
Dynamic Electrical Characteristics
V
(VCC, VBS, VDD) = 15V, and VSS = COM unless otherwise specified. The dynamic electrical characteristics are
BIAS
measured using the test circuit shown in Figure 3.
t
on
t
off
t
sd
t
r
t
f
MtDelay Matching, HS & LS Turn-On/Off ——10—— Hton-Lt
High Side Floating Supply Absolute VoltageVS + 10VS + 20
High Side Floating Supply Offset Voltage-4600
High Side Output VoltageV
S
V
B
Low Side Fixed Supply Voltage1020
Low Side Output Voltage0V
CC
Logic Supply VoltageVSS + 5VSS + 20
Logic Supply Offset Voltage-55
Logic Input Voltage (HIN, LIN & SD)V
Tj = 25°C
Tj = -55 to
SS
V
DD
125°C
ParameterMin Typ. Max. Min. Max UnitsTest Conditions
Turn-On Propagation Delay—120 150—260VS = 0V
Turn-Off Propagation Dela y—94125—220 VS = 600V
Shutdown Propagation Delay—110 140—235ns VS = 600V
Turn-On Rise Time—2535—50 CL = 1000pf
Turn-Off Fall Time—1725—40 CL = 1000pf
/ Ht
on
-Lt
off
off
V
T ypical Connection
V
DD
HIN
SD
LIN
V
SS
V
CC
V
HIN
SD
LIN
V
HO
V
COM
LO
V
B
V
S
CC
DD
SS
up to 500V
6
TO
LOAD
2www.irf.com
IR2113L6
Static Electrical Characteristics
V
(VCC, VBS, VDD) = 15V, TA = 25°C and VSS = COM unless otherwise specified. The VIN, VTH and
BIAS
IIN parameters are referenced to VSS and are applicable to all three logic input leads: HIN, LIN and SD.
The VO and IO parameters are referenced to COM and are applicable to the respective output leads: HO or
LO.
Tj = 25°C
Symbol ParameterMin Typ. Max. Min. Ma x Un its Test Conditions