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IR2110
User Manual
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IOR IR2110, IR2113S User Manual

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Data Sheet No. PD60147-
IR2110/IR2113 (S)
HIGH AND LOW SIDE DRIVER
Features
• Floating channel designed for bootstrap operation
Fully operational to +500V or +600V Tolerant to negative transient voltage dV/dt immune
• Gate drive supply range from 10 to 20V
• Undervoltage lockout for both channels
• 3.3V logic compatible
• CMOS Schmitt-triggered inputs with pull-down
• Cycle by cycle edge-triggered shutdown logic
• Matched propagation delay for both channels
• Outputs in phase with inputs
Description
The IR2110/IR2113 are high voltage, high speed power MOSFET and IGBT drivers with independent high and low side referenced output channels. Proprietary HVIC and latch immune CMOS technologies enable rugge­dized monolithic construction. Logic inputs are com­patible with standard CMOS or LSTTL output, down to
3.3V logic. The output drivers feature a high pulse cur­rent buffer stage designed for minimum driver cross-conduction. Propagation delays are matched to simplify use in high frequency applications. The floating channel can be used to drive an N-channel power MOSFET or IGBT in the high side configuration which operates up to 500 or 600 volts.
Product Summary
V
OFFSET
(IR2113) 600V max.
Delay Matching 10 ns
(IR2110) 500V max.
I
+/- 2A / 2A
O
V
OUT
t
(typ.) 120 & 94 ns
on/off
10 - 20V
Packages
14-Lead PDIP
IR2110/IR2113
16-Lead SOIC
IR2110S/IR2113S
Q
Typical Connection
HO
V
DD
HIN
SD LIN
V
SS
V
CC
(Refer to Lead Assignments for correct pin configuration). This/These diagram(s) show electrical connections only. Please refer to our Application Notes and DesignTips for proper circuit board layout.
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V
DD
HIN SD LIN V
SS
V V
V
COM
LO
B
S
CC
up to 500V or 600V
TO
LOAD
IR2110/IR2113 (S)
Absolute Maximum Ratings
Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage param­eters are absolute voltages referenced to COM. The thermal resistance and power dissipation ratings are measured under board mounted and still air conditions. Additional information is shown in Figures 28 through 35.
Symbol Definition Min. Max. Units
V
B
V
S
V
HO
V
CC
V
LO
V
DD
V
SS
V
IN
dVs/dt Allowable offset supply voltage transient (figure 2) — 50 V/ns
P
D
R
THJA
T
J
T
S
T
L
High side floating supply voltage (IR2110) -0.3 525
(IR2113) -0.3 625 High side floating supply offset voltage VB - 25 VB + 0.3 High side floating output voltage VS - 0.3 V Low side fixed supply voltage -0.3 25 Low side output voltage -0.3 VCC + 0.3 Logic supply voltage -0.3 VSS + 25 Logic supply offset voltage VCC - 25 V Logic input voltage (HIN, LIN & SD) VSS - 0.3 V
Package power dissipation @ TA ≤ +25°C (14 lead DIP) — 1.6
(16 lead SOIC) — 1.25
Thermal resistance, junction to ambient (14 lead DIP) — 75
(16 lead SOIC) — 100 Junction temperature — 150 Storage temperature -55 150 Lead temperature (soldering, 10 seconds) — 300
CC DD
B
+ 0.3
+ 0.3 + 0.3
V
W
°C/W
°C
Recommended Operating Conditions
The input/output logic timing diagram is shown in figure 1. For proper operation the device should be used within the recommended conditions. The VS and VSS offset ratings are tested with all supplies biased at 15V differential. Typical ratings at other bias conditions are shown in figures 36 and 37.
Symbol Definition Min. Max. Units
V
B
V
S
V
HO
V
CC
V
LO
V
DD
V
SS
V
IN
T
A
Note 1: Logic operational for VS of -4 to +500V. Logic state held for VS of -4V to -VBS. (Please refer to the Design Tip DT97-3 for more details). Note 2: When V
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High side floating supply absolute voltage VS + 10 VS + 20 High side floating supply offset voltage (IR2110) Note 1 500
(IR2113) Note 1 600 High side floating output voltage V Low side fixed supply voltage 10 20 Low side output voltage 0 VCC Logic supply voltage VSS + 3 VSS + 20 Logic supply offset voltage -5 (Note 2) 5 Logic input voltage (HIN, LIN & SD) V Ambient temperature -40 125 °C
< 5V, the minimum VSS offset is limited to -V
DD
DD.
S
SS
V
B
V
DD
V
IR2110/IR2113 (S)
Dynamic Electrical Characteristics
V
(VCC, VBS, VDD) = 15V, CL = 1000 pF, T
BIAS
electrical characteristics are measured using the test circuit shown in Figure 3.
Symbol Definition Figure Min. Typ. Max. Units Test Conditions
t t t
MT Delay matching, HS & LS turn-on/off — — — 10 Figure 5
Turn-on propagation delay 7 — 120 150 VS = 0V
on
Turn-off propagation delay 8 — 94 125 VS = 500V/600V
off
Shutdown propagation delay 9 — 110 140 VS = 500V/600V
sd
t
Turn-on rise time 10 — 25 35
r
t
Turn-off fall time 11 — 17 25
f
Static Electrical Characteristics
V
(VCC, VBS, VDD) = 15V, T
BIAS
are referenced to V referenced to COM and are applicable to the respective output leads: HO or LO.
and are applicable to all three logic input leads: HIN, LIN and SD. The VO and IO parameters are
SS
Symbol Definition Figure Min. Typ. Max. Units Test Conditions
V
V
V
OH
V
OL
I
LK
I
QBS
I
QCC
I
QDD
I
IN+
I
IN-
V
BSUV+VBS
V
BSUV-VBS
V
CCUV+VCC
V
CCUV-
I
O+
I
O-
Logic “1” input voltage 12 9.5 — —
IH
Logic “0” input voltage 13 — — 6.0
IL
High level output voltage, V Low level output voltage, V Offset supply leakage current 16 — — 50 VB=VS = 500V/600V Quiescent VBS supply current 17 — 125 230 V Quiescent VCC supply current 18 — 180 340 VIN = 0V or V Quiescent VDD supply current 19 — 15 30 VIN = 0V or V Logic “1” input bias current 20 — 20 40 VIN = V Logic “0” input bias current 21 — — 1.0 V
supply undervoltage positive going 22 7.5 8.6 9.7
threshold
supply undervoltage negative going 23 7.0 8.2 9.4
threshold
supply undervoltage positive going 24 7.4 8.5 9.6 threshold VCC supply undervoltage negative going 25 7.0 8.2 9.4 threshold Output high short circuit pulsed current 26 2.0 2.5 — VO = 0V, VIN = V
Output low short circuit pulsed current 27 2.0 2.5 — VO = 15V, VIN = 0V
= 25°C and VSS = COM unless otherwise specified. The VIN, VTH and IIN parameters
A
BIAS
O
= 25°C and VSS = COM unless otherwise specified. The dynamic
A
ns
µA
V
V
IN
A
PW ≤ 10 µs
PW ≤ 10 µs
- V
O
14 — — 1.2 IO = 0A 15 — — 0.1 IO = 0A
= 0V or V
DD
= 0V
IN
DD DD DD
DD
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IR2110/IR2113 (S)
Functional Block Diagram
V
DD
HIN
SD
LIN
V
RSQ
RSQ
SS
VDD/V
LEVEL SHIFT
VDD/V
LEVEL SHIFT
CC
PULSE
GEN
CC
Lead Definitions
Symbol Description
V
DD
HIN Logic input for high side gate driver output (HO), in phase SD Logic input for shutdown LIN Logic input for low side gate driver output (LO), in phase V
SS
V
B
HO High side gate drive output V
S
V
CC
LO Low side gate drive output COM Low side return
Logic supply
Logic ground High side floating supply
High side floating supply return Low side supply
HV LEVEL SHIFT
UV
DETECT
PULSE FILTER
DETECT
UV
DELAY
R Q R S
V
B
HO
V
S
V
CC
LO
COM
Lead Assignments
14 Lead PDIP 16 Lead SOIC (Wide Body)
IR2110/IR2113 IR2110S/IR2113S
Part Number
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IR2110/IR2113 (S)
10% 10%
HOLO
HV =10 to 500V/600V
<50V/ns
Figure 1. Input/Output Timing Diagram Figure 2. Floating Supply Voltage Transient Test Circuit
HIN
50%
50%
LIN
(0 to 500V/600V)
t
on
t
r
90% 90%
t
off
t
f
HO LO
Figure 3. Switching Time Test Circuit Figure 4. Switching Time Waveform Definition
50% 50%
LO
10%
MT
HO
MT
90%
SD
HO LO
50%
t
sd
HIN LIN
90%
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Figure 6. Delay Matching Waveform DefinitionsFigure 5. Shutdown Waveform Definitions
IR2110/IR2113 (S)
02468101214161820
Turn-On Delay Time (ns)
Turn-Off Delay Time (ns)
250
200
150
Max.
Typ.
100
Turn-On Delay Time (ns)
50
0
-50 -25 0 25 50 75 100 125 Temperature (°C)
250
200
Max.
Typ.
150
100
Turn-On Delay Time (ns)
50
0
10 12 14 16 18 20
Figure 7A. Turn-On Time vs. Temperature Figure 7B. Turn-On Time vs. V
250
Max.
200
Typ.
150
100
50
0
0 2 4 6 8 10 12 14 16 18 20
VDD Supply Voltage (V)
Figure 7C. Turn-On Time vs. VDD Supply Voltage
250
200
150
Max.
100
Typ.
Turn-Off Delay Time (ns)
50
0
-50 -25 0 25 50 75 100 125
Figure 8A. Turn-Off Time vs. Temperature
VCC/VBS Supply Voltage (V)
CC/VBS Supply Voltage
Temperature (°C)
250
200
Max.
150
Typ.
100
Turn-Off Delay Time (ns)
50
0
10 12 14 16 18 20
Figure 8B. Turn-Off Time vs. V
V
CC/VBS Supply Voltage (V)
CC/VBS Supply Voltage
250
200
Max
.
150
100
Typ
50
0
DD Supply Voltage (V)
V
Figure 8C. Turn-Off Time vs. VDD Supply Voltage
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IR2110/IR2113 (S)
250
Typ
Max.
250
200
150
Max.
100
Typ.
Shutdown Delay Time (ns)
50
0
-50 -25 0 25 50 75 100 125 Temperature (°C)
Figure 9A. Shutdown Time vs. Temperature
200
Max.
150
100
50
Shutdown Delay Time (ns)
0
0 2 4 6 8 10 12 14 16 18 20
VDD Supply Voltage (V)
Figure 9C. Shutdown Time vs. VDD Supply Voltage
250
200
Max.
150
Typ.
100
Shutdown Delay time (ns)
50
0
10 12 14 16 18 20
VCC/VBS Supply Voltage (V)
Figure 9B. Shutdown Time vs. VCC/VBS Supply Voltage
100
80
60
40
Turn-On Rise Time (ns)
Typ.
20
0
-50 -25 0 25 50 75 100 125 Temperature (°C)
Figure 10A. Turn-On Rise Time vs. Temperature
100
80
60
Max.
40
Typ.
Turn-On Rise Time (ns)
20
0
10 12 14 16 18 20
VBIAS Supply Voltage (V)
Figure 10B. Turn-On Rise Time vs. Voltage
50
40
30
Max.
20
Typ.
Turn-Off Fall Time (ns)
10
0
-50 -25 0 25 50 75 100 125 Temperature (°C)
Figure 11A. Turn-Off Fall Time vs. Temperature
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IR2110/IR2113 (S)
Logic " 1" Input Threshold (V)
Max.
Logic "0" Input Threshold (V)
50
40
30
20
Max.
Turn-Off Fall Time (ns)
Typ.
10
0
10 12 14 16 18 20
VBIAS Supply Voltage (V)
Figure 11B. Turn-Off Fall Time vs. Voltage
15
12
9
6
3
0
0 2 4 6 8 10 12 14 16 18 20
VDD Logic Supply Voltage (V)
Figure 12B. Logic “1” Input Threshold vs. Voltage
15.0
12.0
Min.Max
9.0
6.0
Logic "1" Input Threshold (V)
3.0
0.0
-50 -25 0 25 50 75 100 125 Temperature (°C)
Figure 12A. Logic “1” Input Threshold vs. Temperature
15.0
12.0
9.0
Max.
Min.
6.0
Logic "0" Input Threshold (V)
3.0
0.0
-50 -25 0 25 50 75 100 125 Temperature (°C)
Figure 13A. Logic “0” Input Threshold vs. Temperature
15
12
9
6
Min.
3
0
0 2 4 6 8 10 12 14 16 18 20
VDD Logic Supply Voltage (V)
Figure 13B. Logic “0” Input Threshold vs. Voltage
5.00
4.00
3.00
2.00
Max.
High Level Output Voltage (V)
1.00
0.00
-50 -25 0 25 50 75 100 125 Temperature (°C)
Figure 14A. High Level Output vs. Temperature
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IR2110/IR2113 (S)
Max.
5.00
4.00
3.00
2.00
Max.
High Level Output Voltage (V)
1.00
0.00 10 12 14 16 18 20
VBIAS Supply Voltage (V)
Figure 14B. High Level Output vs. Voltage
1.00
0.80
0.60
0.40
Low Level Output Voltage (V)
0.20
Max.
0.00 10 12 14 16 18 20
VBIAS Supply Voltage (V)
Figure 15B. Low Level Output vs. Voltage
1.00
0.80
0.60
0.40
Low Level Output Voltage (V)
0.20
Max.
0.00
-50 -25 0 25 50 75 100 125 Temperature (°C)
Figure 15A. Low Level Output vs. Temperature
500
400
300
200
100
Offset Supply Leakage Current (µA)
Max.
0
-50 -25 0 25 50 75 100 125 Temperature (°C)
Figure 16A. Offset Supply Current vs. Temperature
500
400
300
200
100
Offset Supply Leakage Current (µA)
0
0 100 200 300 400 500 600
VB Boost Voltage (V)
IR2110 IR2113
Figure 16B. Offset Supply Current vs. Voltage
500
400
300
Max.
200
Supply Current (µA)
BS
V
Typ.
100
0
-50 -25 0 25 50 75 100 125 Temperature (°C)
Figure 17A. VBS Supply Current vs. Temperature
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IR2110/IR2113 (S)
Max.
V
DD
Supply Current (µA)
500
400
300
200
Supply Current (µA)
BS
V
100
Typ.
0
10 12 14 16 18 20
VBS Floating Supply Voltage (V)
Figure 17B. VBS Supply Current vs. Voltage
625
500
375
250
Supply Current (µA)
CC
Max.
V
125
Typ.
0
10 12 14 16 18 20
Figure 18B. V
VCC Fixed Supply Voltage (V)
Supply Current vs. Voltage
CC
625
500
375
Max.
250
Supply Current (µA)
CC
V
Typ.
125
0
-50 -25 0 25 50 75 100 125
Figure 18A. V
100
80
60
40
Supply Current (µA)
DD
V
Max.
20
Typ.
0
-50 -25 0 25 50 75 100 125
Temperature (°C)
Supply Current vs. Temperature
CC
Temperature (°C)
Figure 19A. VDD Supply Current vs. Temperature
60 50
100
80
40
60
30 20 10
0
0 2 4 6 8 10 12 14 16 18 20
VDD Logic Supply Voltage (V)
Figure 19B. V
Supply Current vs. VDD Voltage
DD
40
Max.
Logic "1" Input Bias Current (µA)
20
Typ.
0
-50 -25 0 25 50 75 100 125 Temperature (°C)
Figure 20A. Logic “1” Input Current vs. Temperature
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IR2110/IR2113 (S)
Max.
Logic “1” Input Bias Current (µA)
Logic “0” Input Bias Current (µA)
60 50 40 30 20
10
0
0 2 4 6 8 10 12 14 16 18 20
VDD Logic Supply Voltage (V)
Figure 20B. Logic “1” Input Current vs. V
5
4
3
2
1
0
0 2 4 6 8 10 12 14 16 18 20
VDD Logic Supply Voltage (V)
Figure 21B. Logic “0” Input Current vs. V
DD Voltage
DD Voltage
5.00
4.00
3.00
2.00
Max.
Logic "0" Input Bias Current (µA)
1.00
0.00
-50 -25 0 25 50 75 100 125 Temperature (°C)
Figure 21A. Logic “0” Input Current vs. Temperature
11.0
10.0
Max.
9.0
Typ.
8.0
Undervoltage Lockout + (V)
Min.
BS
V
7.0
6.0
-50 -25 0 25 50 75 100 125 Temperature (°C)
Figure 22. VBS Undervoltage (+) vs. Temperature
11.0
10.0
9.0
Typ.
8.0
Undervoltage Lockout - (V)
BS
V
7.0
Min.
6.0
-50 -25 0 25 50 75 100 125
Figure 23. V
BS
Temperature (°C)
Undervoltage (-) vs. Temperature
11.0
10.0
Max.
9.0
Typ.
8.0
Undervoltage Lockout + (V)
Min.
CC
V
7.0
6.0
-50 -25 0 25 50 75 100 125
Temperature (°C)
Figure 24. VCC Undervoltage (+) vs. Temperature
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IR2110/IR2113 (S)
Min.
140V
Min.
11.0
10.0
Max.
9.0
Typ.
8.0
Undervoltage Lockout - (V)
CC
V
7.0
6.0
-50 -25 0 25 50 75 100 125 Temperature (°C)
Figure 25. VCC Undervoltage (-) vs. Temperature
5.00
4.00
3.00
2.00
Typ.
Output Source Current (A)
1.00
Min.
0.00 10 12 14 16 18 20
VBIAS Supply Voltage (V)
Figure 26B. Output Source Current vs. Voltage
5.00
4.00
Typ.
3.00
Min.
2.00
Output Source Current (A)
1.00
0.00
-50 -25 0 25 50 75 100 125 Temperature (°C)
Figure 26A. Output Source Current vs. Temperature
5.00
4.00
Typ.
3.00
2.00
Output Sink Current (A)
1.00
0.00
-50 -25 0 25 50 75 100 125 Temperature (°C)
Figure 27A. Output Sink Current vs. Temperature
5.00
4.00
3.00
2.00
Typ.
Output Sink Current (A)
1.00
Min.
0.00 10 12 14 16 18 20
VBIAS Supply Voltage (V)
Figure 27B. Output Sink Current vs. Voltage
150
125
100
75
50
Junction Temperature (°C)
25
0
1E+2 1E+3 1E+4 1E+5 1E+6
Frequency (Hz)
Figure 28. IR2110/IR2113 TJ vs. Frequency
(IRFBC20) R
= 33Ω, VCC = 15V
GATE
320V
10V
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IR2110/IR2113 (S)
320V
320V
150
125
100
75
50
Junction Temperature (°C)
25
0
1E+2 1E+3 1E+4 1E+5 1E+6
Frequency (Hz)
Figure 29. IR2110/IT2113 TJ vs. Frequency
(IRFBC30) R
150
125
100
75
50
Junction Temperature (°C)
25
= 22Ω, VCC = 15V
GATE
320V
140V
10V
140V
150
125
100
75
50
Junction Temperature (°C)
25
0
1E+2 1E+3 1E+4 1E+5 1E+6
Frequency (Hz)
140V
10V
Figure 30. IR2110/IR2113 TJ vs. Frequency
(IRFBC40) R
150
125
10V
100
75
50
Junction Temperature (°C)
25
= 15Ω, VCC = 15V
GATE
320V 140V
10V
0
1E+2 1E+3 1E+4 1E+5 1E+6
Frequency (Hz)
Figure 31. IR2110/IR2113 TJ vs. Frequency
(IRFPE50) R
150
125
100
75
50
Junction Temperature (°C)
25
0
1E+2 1E+3 1E+4 1E+5 1E+6
= 10Ω, VCC = 15V
GATE
Frequency (Hz)
Figure 33. IR2110S/IR2113S TJ vs. Frequency
(IRFBC30) R
= 22Ω, VCC = 15V
GATE
320V 140V
10V
0
1E+2 1E+3 1E+4 1E+5 1E+6
Frequency (Hz)
Figure 32. IR2110S/IR2113S TJ vs. Frequency
(IRFBC20) R
150
125
100
75
50
Junction Temperature (°C)
25
0 1E+2 1E+3 1E+4 1E+5 1E+6
= 33Ω, VCC = 15V
GATE
Frequency (Hz)
Figure 34. IR2110S/IR2113S TJ vs. Frequency
(IRFBC40) R
= 15Ω, VCC = 15V
GATE
320V 140V
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10V
IR2110/IR2113 (S)
140V
150
320V
10V
0.0
125
100
75
50
Junction Temperature (°C)
25
0
1E+2 1E+3 1E+4 1E+5 1E+6
Frequency (Hz)
Figure 35. IR2110S/IR2113S TJ vs. Frequency (IRFPE50)
= 10Ω, VCC = 15V
R
GATE
20.0
16.0
12.0
8.0
Typ.
Logic Supply Offset Voltage (V)
SS
V
4.0
0.0 10 12 14 16 18 20
VCC Fixed Supply Voltage (V)
Figure 37. Maximum VSS Positive Offset vs.
Supply Voltage
V
CC
-2.0
Typ.
-4.0
-6.0
Offset Supply Voltage (V)
S
V
-8.0
-10.0 10 12 14 16 18 20
VBS Floating Supply Voltage (V)
Figure 36. Maximum VS Negative Offset vs.
Supply Voltage
V
BS
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Case Outlines
IR2110/IR2113 (S)
14-Lead PDIP
16-Lead SOIC (wide body)
WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245 Tel: (310) 252-7105
http://www.irf.com/ Data and specifications subject to change without notice. 1/24/2002
01-3002 03
01-3014 03
01-6010
(MS-001AC)
01 6015
(MS-013AA)
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