IOR IR2105 User Manual

Data Sheet No. PD60139J
IR2105
HALF BRIDGE DRIVER
Features
Floating channel designed for bootstrap operation
Fully operational to +600V Tolerant to negative transient voltage dV/dt immune
Gate drive supply range from 10 to 20V
Undervoltage lockout
5V Schmitt-triggered input logic
Cross-conduction prevention logic
Internally set deadtime
High side output in phase with input
Match propagation delay for both channels
Description
The IR2105 is a high voltage, high speed power MOSFET and IGBT driver with dependent high and low side referenced output channels. Proprietary HVIC and latch immune CMOS technologies en­able ruggedized monolithic construction. The logic input is compatible with standard CMOS or LSTTL outputs. The output drivers feature a high pulse current buffer stage designed for minimum driver cross-conduction. The floating channel can be used to drive an N-channel power MOSFET or IGBT in the high side configuration which operates from 10 to 600 volts.
Product Summary
V
OFFSET
IO+/- 130 mA / 270 mA
V
OUT
t
(typ.) 680 & 150 ns
on/off
Deadtime (typ.) 520 ns
600V max.
10 - 20V
Packages
8 Lead PDIP
8 Lead SOIC
T ypical Connection
V
CC
IN
V
CC
IN COM
LO
V
HO
V
up to 600V
B
TO
S
LOAD
IR2105
Absolute Maximum Ratings
Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage param­eters are absolute voltages referenced to COM. The thermal resistance and power dissipation ratings are measured under board mounted and still air conditions.
Symbol Definition Min. Max. Units
V
B
V
S
V
HO
V
CC
V
LO
V
IN
dVs/dt Allowable offset supply voltage transient 50 V/ns
P
D
Rth
JA
T
J
T
S
T
L
High side floating absolute voltage -0.3 625 High side floating supply offset voltage VB - 25 VB + 0.3 High side floating output voltage VS - 0.3 V Low side and logic fixed supply voltage -0.3 25 Low side output voltage -0.3 VCC + 0.3 Logic input voltage -0.3 V
Package power dissipation @ TA +25°C (8 Lead DIP) 1.0
(8 Lead SOIC) 0.625
Thermal resistance, junction to ambient (8 Lead DIP) 125
(8 Lead SOIC) 200 Junction temperature 150 Storage temperature -55 150 °C Lead temperature (soldering, 10 seconds) 300
CC
B
+ 0.3
+ 0.3
°C/W
V
W
Recommended Operating Conditions
The input/output logic timing diagram is shown in figure 1. For proper operation the device should be used within the recommended conditions. The VS offset rating is tested with all supplies biased at 15V differential.
Symbol Definition Min. Max. Units
V
B
V
S
V
HO
V
CC
V
LO
V
IN
T
A
Note 1: Logic operational for VS of -5 to +600V. Logic state held for VS of -5V to -VBS.
2
High side floating supply absolute voltage VS + 10 VS + 20 High side floating supply offset voltage Note 1 600 High side floating output voltage V Low side and logic fixed supply voltage 10 20 Low side output voltage 0 V Logic input voltage 0 V Ambient temperature -40 125
S
V
B
CC CC
V
°C
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IR2105
Dynamic Electrical Characteristics
V
(VCC, VBS) = 15V, CL = 1000 pF and TA = 25°C unless otherwise specified.
BIAS
Symbol Definition Min. Typ. Max. Units Test Conditions
t
on
t
off t
t
DT Deadtime, LS turn-off to HS turn-on & 4 00 520 650
MT Delay matching, HS & LS turn-on/off 60
Static Electrical Characteristics
V
BIAS
COM. The VO and IO parameters are referenced to COM and are applicable to the respective output leads: HO or LO.
Symbol Definition Min. Typ. Max. Units Test Conditions
V V
V
OH
V
OL
I
LK
I
QBS
I
QCC
I
IN+
I
IN-
V
CCUV+VCC
V
CCUV-
I
O+
I
O-
Turn-on propagation delay 68 0 820 VS = 0V Turn-off propagation delay 15 0 220 VS = 600V Turn-on rise time 10 0 170
r
Turn-off fall time 50 90
f
HS turn-on to LS turn-off
(VCC, VBS) = 15V and TA = 25°C unless otherwise specified. The VIN, VTH and IIN parameters are referenced to
Logic “1” (HO) & Logic “0” (LO) Input Voltage 3 VCC = 10V to 20V
IH
Logic “0” (HO) & Logic “1” (LO) Input Voltage 0.8 VCC = 10V to 20V
IL
High Level Output Voltage, V Low Level Output Voltage, V Offset Supply Leakage Current 50 VB = VS = 600V Quiescent VBS Supply Current 30 55 V Quiescent VCC Supply Current 150 270 VIN = 0V or 5V Logic “1” Input Bias Current 3 10 VIN = 5V Logic “0” Input Bias Current 1 VIN = 0V
Supply Undervoltage Positive Going 8 8.9 9.8 Threshold VCC Supply Undervoltage Negative Going 7.4 8.2 9 Threshold Output High Short Circuit Pulsed Current 130 210 VO = 0V
Output Low Short Circuit Pulsed Current 270 360 VO = 15V
BIAS
O
- V
O
100 IO = 0A — 100 IO = 0A
ns
V
mV
µA
V
mA
= 0V or 5V
IN
PW10 µs
PW10 µs
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3
IR2105
Functional Block Diagram
V
B
HV
LEVEL
DEAD
IN
TIME
DETECT
DEAD
TIME
UV
PULSE
GEN
SHIFT
PULSE
FILTER
Q
R S
Lead Definitions
Lead
Symbol Description
IN Logic input for high and low side gate driver outputs (HO and LO), in phase with HO V
B
HO High side gate drive output V
S
V
CC
LO Low side gate drive output COM Low side return
High side floating supply
High side floating supply return Low side and logic fixed supply
HO
V
S
V
LO
COM
CC
Lead Assignments
COM
LO
8 Lead PDIP 8 Lead SOIC
IR2105 IR2105S
4
COM
LO
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