Inventec Zenith UMA Cycle 1 MV 6050A2252601 Schematic

Zenith UMA
Cycle 1
MV BUILD
2009.03.18
DATE
CHANGE NO.
REV
DRAWER DESIGN CHECK RESPONSIBLE
SIZE = FILE NAME :
XXXXXXXXXXXX
P/N
EE
3
XXXX-XXXXXX-XX
DATE POWER
VER :
DATE
INVENTEC
TITLE
Zenith UMA C1
CODE
SIZE
A3
DOC. NUMBER
1310A22526-0-MTR
CS
SHEET
152
REV
A03
OF
TABLE OF CONTENTS
PAGE 5- DC& BATTERY CHARGER
6- SELECT & BATTERY CONN 7- SYSTEM POWER(3V/5V) 8- SYSTEM POWER(+V1.8/+V1.25S) 9- SYSTEM POWER(+VGFX/+VCCP)
10- SYSTEM POWER(+V1.5S) 11- CPU POWER(VCC_CORE) 12- DDR TERMINATION VOLTAGE
13- POWER(SLEEP) 14- POWER(SEQUENCE)
PAGE
15- CLOCK_GENERATOR 16- PENRYN-1 17- PENRYN-2 18- PENRYN-3 19- THERMAL&FAN CONTROLLER
20- CANTIGA-1 21- CANTIGA-2
22- CANTIGA-3 23- CANTIGA-4 24- CANTIGA-5
25- CANTIGA-6 26- DDR2-DIMM0 27- DDR2-DIMM1 28- DDR2-DAMPING 29- VGA CNTR
30- LCM CNTR 31- ICH9-1 32- ICH9-2 33- ICH9-3 34- ICH9-4 35- ICH9-5
PAGE 36- SYSTEM BIOS 37- HDD&ODD CNTR 38- USB CNTR 39- KBC 40- KB&TP CNTR 41- AUDIO CODEC 42- AUDIO JACK 43- Giga LAN 44-RJ-45 CONN 45- MINICARD(WLAN/WLAN+WiMAX/WWAN)
& SIM Card CNTR 46- Express card & 4 in 1 47- BT & MDC & TCM
48- SWB & Button & LEDs
49- HDMI CONN & LEVEL SHIFT
50- SCREW HOLE 51- Switch & LED Board
52- ODD Extend Board
CHANGE by
Jason Chiu
16-Mar-2009
INVENTEC
TITLE
Zenith UMA C1
SIZE
CODE
DOC. NUMBER REV
A3
1310A22526-0-MTRA03
CS
SHEET
OF
522
MAIN BATT
XDP
CNTR
Penryn
(478 uFCPGA)
System Charger &
DC/DC System power
Clock Generator
USB A
CNTR
(USB0)
USB B
CNTR
(USB1)
USB C
CNTR
(USB4)
USB D
CNTR
(USB5)
4 IN 1
CNTR
CARD READER
AU6371
(USB3)
Web CAM
(USB10)
BlueTooth
CNTR
(USB6)
LCM VGA
HDMI
ACCELEROMETER
LVDS
CRT
HDMI
USB2.0
HDA
SMBUS
FSB
Cantiga
GM47/GL40
(1299 PCBGA)
DMI
ICH9-M
DDR2
DDR2
SATA
PCI_EXPRESS
(WLAN/WLAN+WiMAX)
SPI
LPC
SATA0
SATA1
PCIE2
(USB2)
MINI CARD
CNTR
DDR II _SODIMM0
800MHz
DDR II_SODIMM1
800MHz
HDD
FIXED ODD
New Card
PCIE3
CNTR
SYSTEM
BIOS
PCIE6
Giga LAN
Marvell 8072
RJ45
SIM Card
WWAN
(USB7)
MDC V1.5
CONNECTOR
RJ11
Internal
MIC
AUDIO CODEC
Ext MIC
Headphone
Speaker
Keyboard
KBC
TouchPad
CHANGE by
TCM
Jason Chiu
16-Mar-2009
INVENTEC
TITLE
Zenith UMA C1
SIZE
A3
CODE
CS
SHEET
DOC. NUMBER
352
REV
A031310A22526-0-MTR
OF
Adapter
(65W)
LIMIT_SIGNAL
+VBDC
OCP
Charger
(BQ24740)
ADP_EN OCP_OC# ADP_PS0 ADP_PS1
CHGCTRL_3
ADP_PRES
AC_AND_CHG
ADP_PRES
KBC_PW_ON
5/3.3V
(TPS51125)
+V5A +V3A
+V5AL
+V3AL
+V5S
+V3S
BATSELB
AC_AND_CHG
CHGCTRL_3
Selector
(Discrete)
+VBATR
+VBATA
+VBATB
BATCON
Main Battery
Travel Battery
PWR_GOOD_3
PM_DPRSLPVR
PSI#
H_DPRSTP#
SLP_S4#_3R
SLP_S3#_3R
DFGT_VR_EN
IO POWER
(TPS51124)
IO POWER
(TPS51124)
GPU POWER
(TPS51610)
IMVP VI
(TPS51620)
SLP_S3#_3R
+V1.8
+VCCP
+VGFX_CORE
V1.8_PG
VCCP_PG
VGFX_PG
SLP_S3#_3R
+VCC_CORE
LR
(G2997)
LR
(APL5913)
VR_PWRGD_CK505#
CHANGE by
+V0.9S
M_VREF
+V1.5S
V1.5S_PG
Jason Chiu 16-Mar-2009
INVENTEC
TITLE
Zenith UMA C1
SIZE
A3
DOC. NUMBER
CODE
1310A22526-0-MTRA03
CS
SHEET
REV
OF
524
+VADPBL
5-,6-
FAIR_FDMC4435BZ_8P
ADP_EN#
1
R13 15K_5%
2
7-,14-
2VREF
14.3K_1%
+VBDC
5-,6-,48-
R1284
12
100K_1%
Q1032
S
D
1
8
2
7
3
6 54
G
R1266
220K_5%
Q1033
2N7002W
D1018
R1265
100K_5%
14-
21
CHENKO_LL4148_2P
1
R50 100K_1%
2
1
R14
8.25K_1%
2
C36
1
1
2
2
5-,6-
R1280
12
100K_1%
23.7K_1%
R1283
12
24K_1%
0.22uF_16V
R1282
R16
+VADPBL
+VADP
1
1
C1285
2
0.1uF_16V
2
3
D
G
1
S
2
12
R51
12
270K_5%
+V5AL
5-,7-,14-
8
5
U1-B
+
7
OUT
6
-
ON_LM393DR2G_SOP_8P
4
R15
1M_5%
12
+V5AL
5-,7-,14-
8
U1-A
3
+
OUT
2
­4
ON_LM393DR2G_SOP_8P
C1286
0.1uF_16V12
1 2 3
U1021
1
TI_LMV321IDBVR_SOT23_5P
2
14-
12
C1292
0.1uF_25V
1
R1267 220K_5%
2
14-
BATCAL#
+V3AL
5-,6-,7-,14-,31-,36-,39-,40-,45-,48-
2
R52
22K_5%
1
6-
1
1
C21
0.1uF_16V
2
+V5AL
5-,7-,14-
1IN+
Vcc+ GND 1IN-
OUT
3.42A(135mils)
L1027
NFM60R30T222
1
2
3
4
12
0.1uF_25V
B140_SMAD1017
21
D
8 7 6 54
G
FAIR_FDMC4435BZ_8P
6-,39-,43-
AC_AND_CHG
SSM3K7002F
R1273
12
100K_5%
R1281
12
1M_5%
5
4
1
DC JACK
ACES_91302_0047L_1_4P
CN4022
ADP_IN
1 2 3 4
C3033
Q1031
S
1 2 3
ADP_PRES
CHGCTRL_3
6-,39-
+V3AL
5-,6-,7-,14-,31-,36-,39-,40-,45-,48-
2
R1261
10K_5%
1
Q1028
3
D
1
G
S
2
5-
3
D
Q1035
G
SSM3K7002F
S
2
1 2
G
G1
3
G2
G
4
7A(280mils)
R1263
12
47K_5%
1
R1264
4.7K_5%
2
5-
ADPDRV#
R53
47K_5%
1
2
R20
294K_1%
12
1
1
R19
2
200K_1%
8-,9-,10-,12-,13-,14-,32-,39-,41-,43-,46-
SLP_S3#_3R
+V3A
7-,9-,13-,19-,30-,32-,33-,34-,43-,45-,47-,48-
ADPDRV#
VCTRL_3
39-
1uF_6.3V
2
CELLS
R22
453K_1%
R24
422K_1%
12
R23 1M_1%
P2U
C3
P2U
+VBAT
12
1uF_25V
R17
12
39-
0_5%
1
2
1
1 2
2
6-
C38
Kelvin sense
R18
12
300K_5%
R54
BQREF
100K_5%
1uF_6.3V
C30 1uF_6.3V
R1262
0.01_1%
12
C3073
2
1
0.1uF_16V
20K_5%
1
2
5-
1
R1
2
1
C28
2
P2U
ICS
5-
5-
BQREF
+VBATR
7-,8-,9-,11-,13-,30-,39-,48-
C25
12
1uF_25V
U2
2
ACN
3
ACP
5
ACDET
9
AGND
13
EXTPWR
16
SRSET
6
ACSET
10
VREF
8
IADSLP
21
DPMDET
4
LPMD
20
CELLS
1
CHGEN
11
VDAC
12
VADJ
15
IADAPT
TI_BQ24740_QFN_28P
5-
1
C29
100pF_50V
2
R55
12
169K_1%
100K_1%
LS_100R
LIMIT_SIGNAL
PVCC
HIDRV
BTST
REGN
LODRV
PGND
SRP
SRN
BAT
LPREF
ISYNSET
PowerPad
ICS
5-,11-,13-,14-,19-,23-,29-,32-,34-,37-,40-,41-,48-,49-
13-,14-,15-,19-,20-,21-,23-,24-,26-,27-,29-,30-,31-,32-,33-,34-,37-,39-,40-,41-,43-,45-,46-,47-,48-,49-,50-
+V5S
U4-C 9
+
OUT
8
-
OCP_OC
3
12
+V3S
14
80.6K_1%
14-
SSM3K7002F
1
1
R113
R118
133K_1%
2
2
10K_5%
1
R114
2
D1006
2
1
CHENKO_LL4148_2P
Q4
3
D
1
G
S
2
1 2
11
+
10
-
C90
0.027uF_10V
OUT
R117
12
10K_5%
R115
12
100K_5%
3
U4-D
13
ON_LM339DR2G_SOP_14P
12
R116
12
604K_1%
11-,14-,39-
PWR_GOOD_3
32-
OCP_OC#
R56
1
2
48-
C32
0.22uF_16V 12
12
10K_5%
14-
1
100_5%
R57
R29
VBIAS
5-,11-,13-,14-,19-,23-,29-,32-,34-,37-,40-,41-,48-,49-
1 2 3
U1020
1IN+ GND 1IN-
Vcc+
OUT
5
4
TI_LMV321IDBVR_SOT23_5P
2
D2018
DAN202K
Q1025
2
BSS84_3P
2
D
S
G
1
1
3
3.9K_1%
14-
R28
3
1
R30 2K_1%
2
12
100K_5%
1
2
3900pF_16V
ON_LM339DR2G_SOP_14P
+V5S
1
C33
0.1uF_10V
2
R26
1
B
C3112
R1244
330K_5%
R1246
3.9K_5%
3
C
E
Q1027
2
D_MMST3904
1
2
1
2
OCP
8
765
D
C1273
4.7uF_25V
C1291
4.7uF_25V1
2
Kelvin sense
C22
1
1 2
2
1
C24
1
2
1uF_25V
P2U
R2135
1uF_10V
R21
1 2
0_5%
2
13
CHENMKO_BAT54_3P
1
2
24.9K_1%
28
26
25
PH
P_CG_BST
27
P_CG_REG
24
23
22
19
18
17
7
14
29
4.7uF_25V1
2
12
P2U
1 2
0.1uF_25V
D1
P_CG_HD
P_CG_PH
C23
0.1uF_16V
P_CG_LD
C27
0.1uF_25V
P2U
Noisy Driver
Layout rule
1>Noisy driver(BST,SW node,DH&DL)keep trace short and wide. 2>Don’t route sensitive signal(Current & Voltage Sense,FB,REF,AGND...)close noisy driver area 3>Layout Kelvin sense as a differential pair to device 4>Layout Vout sense connect to output terminal 5>Place Cap and filter close to IC
C1290
C1274
G
4
G
4
FDMC8884
Q1030
S
1
2
3
8
765
D
1S2
3
Q1063
FDMC8884
Vout sense
C2O
L1026
PCMB0603T_8R2MS
12
C1271
4.7uF_25V
1 2
4.7uF_25V
C1270
1 2
C1
1uF_25V
+VBDCR
R1279
0.01_1%
12
Kelvin sense
4.7uF_25V
C26
0.033uF_16V 2
1
1
1
2
2
P2U
Place close to IC
INVENTEC
TITLE
Zenith UMA C1
DC &BATTERY CHARGER
SIZE
CODE
A3
CHANGE by
Jason Chiu
16-Mar-2009
CS
SHEET
+VBDC
3.6A(140mils)
1
1
C1268
2
2
C2 1uF_25V
DOC. NUMBER
OF
552
5-,6-,48-
C1269
4.7uF_25V
REV
A031310A22526-0-MTR
CHGCTRL_3
C1266
1000pF_50V
2
5-,39-
D1009
CHENKO_LL4148_2P
1
1
2
C1265
0.047uF_10V
R1257
12
1K_5%
1
R1258 470K_5%
2
1 2
1
G
1
R1256 470K_5%
2
3
D
S
Q1020
2
SSM3K7002F
AC_AND_CHG
+V3AL
5-,6-,7-,14-,31-,36-,39-,40-,45-,48-
U1019
5
74HC1G14GV
2
3
ADP_PRES
D1016
2
RLZ18C
+V3AL
3
D
G
1
+VBAT
5-
1
Q1029
1
S
2 3 4
G
AM4825P_AP
5-,6-,7-,14-,31-,36-,39-,40-,45-,48-
1
R31 220K_5%
2
+VBDC
5-,6-,48-
8
D
7 6 5
+VADPBL
5- 5-,6-,48-
R12
2
1
3K_5%
4
1
R1255 10K_5%
2
Q1022
2N7002W
5-
5-,39-,43-
2
S
1.5M_5%_OPEN
+V3AL
5-,6-,7-,14-,31-,36-,39-,40-,45-,48-
+VBDC
PAD2001
POWERPAD_4A
AM4825P_AP_OPEN
R33
12
1
+VBATA
48-
2 3
1
4
Q1039
1
8
D
S
7
2
6
3
54
G
1
S1
2
G1
6
D1
3
D2
5
G2
4
S2
3
D
Q1023
G
2N7002W_OPEN
S
2
Q1024
2N7002DW
1
R25
470K_5%_OPEN
2
5-,6-,7-,14-,31-,36-,39-,40-,45-,48-
1
R27
4.7K_5%_OPEN
2
CHENMKO_BAV99
5-,6-,7-,14-,31-,36-,39-,40-,45-,48-
R7 10K_5%
7A(280mils)
SDA_MAIN SCL_MAIN
39­39-
+V3AL
CHENMKO_BAV99
1
3
D1015
2
R1254
220K_5%_OPEN
21
D1008
CHENKO_LL4148_2P_OPEN
+V3AL
1
1
R9 10K_5%
2
2
D1014
1
3
2
EMI solution
39-
+V3AL
5-,6-,7-,14-,31-,36-,39-,40-,45-,48-
1
U1018
74HC1G14GV_OPEN
2
5
2
3
+V3AL
R8
12
100_5%
CHENMKO_BAV99
1
D1012
3
2
4
39-
5-,6-,7-,14-,31-,36-,39-,40-,45-,48-
1
R5 100K_5%
2
R10
12
100_5%
6cell#
R4
12
100_5%
1
C4
2
470pF_50V
BATCON
1
R6 10K_5%
2
CN1014
1
6
2 3 4 5 6
SYN_081006_TK001_6P
C5
1 2
0.1uF_25V
1
C1264
0.1uF_16V_OPEN
2
1 2 3 4 5 6
MAIN BATT
G1
G
G2
G
1
R32
0_5%
2
INVENTEC
TITLE
Zenith UMA C1
SELECT & BATTERY CONN
SIZE REV
CODE
CHANGE by
Jason Chiu
16-Mar-2009
CS
SHEET
DOC. NUMBER
652
A3
A031310A22526-0-MTR
OF
KBC_PW_ON
VCC1_POR#_3
C2O
39-
14-,39-
Q1052
S1
2
G1
D1 D2
5
G2
S2
2N7002DW
1
6 3
4
6.49K_1%
R190
P_5A_FB
+VBATR
5A(200mils)
51125GND
10K_1%
R157
12
12
15K_1%
R159
P2U
Connect to Vout
C2O
R2140
61.9K_1%
P2U
5-,7-,8-,9-,11-,13-,30-,39-,48-
1
2
51125GND
+V5AL
5-,7-,14-
1
R2058
330K_5%
2
R158
10K_1%
P2U
12
51125GND
P_3A_FB
12
Q1053
S1
2
G1
D1 D2
5
G2
S2
2N7002DW
1
6 3
4
51125GND
R2105
75K_1%
51125GND
1
2
P2U
5-,9-,13-,19-,30-,32-,33-,34-,43-,45-,47-,48-
+V3A
6A(240mils)
+V3A
C1151
1uF_10V12
C6
0.1uF_25V
1
2
C1170
5-,7-,8-,9-,11-,13-,30-,39-,48-
1
2
2200pF_50V_OPEN
CYNTEC_PCMC063_3R3
+VBATR
C189
1 2
4.7uF_25V
L1016
12
0_5%_OPEN
330uF_6.3V
0.1uF_10V_OPEN
1 2
1
2
1 2
4.7uF_25V
C190
Q1054
SI7326DN
R2170
SI7726DN
C3136
1 2
8
D
1S23
8D765
S
2
1
765
4
3
3
1
2
VREF
VFB1
ENTRIP1
PGOOD
VBST1 DRVH1
DRVL1
VREG5
VCLK
VIN
18
16
17
C3055
2.2uF_25V
U10
VO1
LL1
P2U
5-,14-
24
51125GND
23 22 21 20 19
2VREF
1 2C7
+V5AL
C156
1
4.7uF_6.3V
2
C151 1000pF_50V
R156
POWERPAD1x1m
R161 0_5%
12
P_5A_DH
5-,7-,14-
P2U
32-,39-
P_5A_BST
P_5A_LL P_5A_DL
P2U
RSMRST#
P2U
R162
4.7_5%
12
12
C152
0.1uF_16V
G
4S1
5
G
4
23
1
8765
2
D
4.7uF_25V
SI7326DN
876
D
S
123
C102
Q11
Q15
SI7726DN
+VBATR
5-,7-,8-,9-,11-,13-,30-,39-,48-
C3174
C103
1
1
2
2
4.7uF_25V
0.1uF_25V
L1023
12
CYNTEC_PCMC063_3R3
1
R2169
0_5%_OPEN
2
C3135
1
0.1uF_10V_OPEN
2
330uF_6.3V
C3175
1 2
2200pF_50V_OPEN
1
C1241
2
8-,9-,10-,11-,12-,13-,30-,34-,38-,48-
+V5A
1
C1204
2
1uF_10V
+V5A
5A(200mils)
12
R2102
0_5%
2
1
R2103
0_5%
R2104
12
R191
4.7_5%
12
TI_TPS51125_QFN_24P
+V3AL
5-,6-,14-,31-,36-,39-,40-,45-,48-
1
C176
4.7uF_6.3V
2
0402_OPEN
P_3A_BST
P_3A_DH P_3A_LL P_3A_DL
P2U
G
4
P2U
C175
0.1uF_16V
12
G
Q22
6
5
25
4
TML
VFB2
TONSEL
7
ENTRIP2
VO2
8
VREG3
9
VBST2
10
DRVH2
11
LL2
12
DRVL2
EN0
SKIPSEL
GND
13
14
15
1 2
INVENTEC
TITLE
Zenith UMA C1
SYSTEM POWER(3V/5V/12V)
CODE
CHANGE by
SIZE
18-Mar-2009Jason Chiu
A3
CS
SHEET
DOC. NUMBER
OF
752
REV
A031310A22526-0-MTR
Connect to Vout
C2O
R107
1
43.2K_1% C71
12
0402_OPEN
2
R110
12
30K_1%
51124GND
P2U
P_VCCP_VFBP_1.8_VFB
51124GND
R111
12
30K_1%
P2U
R108
12
12.4K_1%
C72
2
1
0402_OPEN
Connect to Vout
C2O
+V1.8
10-,12-,20-,23-,24-,26-,27-,48-
8A(320mils)
1
1
2
2
For EMI
C3008
C3007
0.1uF_10V
0.1uF_10V
1 2
C3006
0.1uF_10V
C3141
0.1uF_25V_OPEN
+V1.8
1
C1263
2
330uF_2.5V
2200pF_50V_OPEN
1
1
2
2
L1025
12
PCMC063T_2R2MN
0.1uF_10V_OPEN
+VBATR
C3142
R2171
0_5%_OPEN
C3137
1 2
C48
4.7uF_25V
1 2
C47
4.7uF_25V
1 2
SI7326DN
FDS6690AS
1
2
G
4
5
G
4
4.7uF_25V
8
765
D
S
123
6
7
8 D
S
23
1
+VBATR
C94
1 2
Q6
SI7326DN
Q5
FDS6690AS
4.7uF_25V
5-,7-,8-,9-,11-,13-,30-,39-,48-5-,7-,8-,9-,11-,13-,30-,39-,48-
C3139
0.1uF_25V_OPEN
1 2
C93
8A(320mils)
PCMC063T_2R2MN
1
R2172
0_5%_OPEN
2
C3138
1 2
0.1uF_10V_OPEN
1 2
+VCCP
L1024
12
C314012
2200pF_50V_OPEN
1
C1262
2
220uF_2V_15mR_Panasonic
+VCCP
9-,10-,11-,15-,16-,17-,18-,19-,20-,21-,23-,24-,31-,34-,48-
R122
1
C68
1uF_10V
4.7_5%
1 2
P2UP2U
R121
2
R101
12
10_5%
12
0_5%
0.022uF_16V_OPEN
C95
0.1uF_16V
12
14-
V1.8_PG
12-,32-
SLP_S4#_3R
1
R106
0.1uF_16V
13
C70
0_5%
2
R105
1
2
4.7_5%
8765
D
Q3
G
41S2
P_1.8_DH P_VCCP_DH
P_1.8_LL
6
5
7
8
D
Q2
G
S
23
1
4
2
P_1.8_BST
R109
12
0603_OPEN
6
VO2
7
PGOOD2
8
EN2
9
VBST2
10
DRVH2
TI_TPS51124RGER_QFN_24P
11
LL2
12
DRVL2
PGND2
13
5
4
VFB2
TONSEL
TRIP214V5FILT
15
U5
2
1
3
VO1
GND
VFB1
25
GND
24
PGOOD1
23
EN1
P_VCCP_BST
22
VBST1
21
DRVH1
20
LL1
19
DRVL1
TRIP1
V5IN
PGND1
17
16
18
7-,9-,10-,11-,12-,13-,30-,34-,38-,48-
P_1.8_V5F
P2U
1
P2U
R102
POWERPAD1x1m
51124GND
1
R103
13.7K_1%
2
1
R104
12K_1%
2
SLP_S3#_3R
5-,9-,10-,12-,13-,14-,32-,39-,41-,43-,46-
C3005
14-
VCCP_PG
P_VCCP_LL
P_VCCP_DLP_1.8_DL
+V5A
P2U
C69
1 22
4.7uF_6.3V
CHANGE by
Jason Chiu
16-Mar-2009
INVENTEC
TITLE
Zenith UMA C1
SYSTEM POWER(+V1.8/+V1.25S)
CODE
SIZE REV
A3
DOC. NUMBER
1310A22526-0-MTRA03
CS
SHEET
OF
528
DFGT_VR_EN
SLP_S3#_3R
5-,8-,10-,12-,13-,14-,32-,39-,41-,43-,46-
C3048
100pF_50V
12
R1191
0_5%
12
12
R1190
0_5%
+V3A
5-,7-,13-,19-,30-,32-,33-,34-,43-,45-,47-,48-
R1189
12
10K_5%_OPEN
R1188
20-
12
0402_OPEN
R1187
12
0_5%
TPS51610GND
9-
P_CSN
C3049
47pF_50V
9-
P_CSP
C3050
47pF_50V
TPS51610GND
P2U
DFGT_VID_4
DFGT_VID_3
DFGT_VID_2
DFGT_VID_1
DFGT_VID_0
1 2
1 2
1 2
P2U
C3051
47pF_50V
23-
23-
20-
20-
20-
20-
20-
GFX_VREF
P2U
TPS51610GND
12
R2094 20K_5%
TPS51610GND
V5FILT_CORE
Kelvin sense
VCC_AXG_SENSE
VSS_AXG_SENSE
Sensitive signal
V5FILT_CORE
9-
C3052
1uF_6.3V
9-
TPS51610GND
C3054
1uF_6.3V
C3053
12
220pF_25V
R2095
12
3.48K_1%
P2U
1
12
R2096 124K_1%
2
R2098
12
R2099
12
R2100
12
+V5A
9-
0_5%
9-
0_5%
V5FILT_CORE
9-
0_5%
7-,8-,10-,11-,12-,13-,30-,34-,38-,48-
GFX_VREF
GFX_VREF
12
TPS51610GND
26
30
28
27
31
29
33
1
VREF
2
GND
3
CSN
4
CSP
5
GSNS
6
VSNS
7
THERM
8
VR_T#
R2091
12
10K_5%
PGND
DPRST#
9
32
10
U1014
12
R2093 0_5%
+VCCP
8-,10-,11-,15-,16-,17-,18-,19-,20-,21-,23-,24-,31-,34-,48-
R2092 123
12
56K_5%
9-
R1182
12
0_5%
R1183
12
0_5%
R1184
12
0_5%
R1185
12
0_5%
R1186
12
0_5%
DROOP
V5FILT
VID511VID6
12
SLEW
VID4
OSRSEL
13
TRPSEL
TONSEL
VID214VID3
25
EN
PMON
24
CLKEN#
23
DPRSLP
22
PGOOD
21
V5IN
20
DRVL
19
LL
P_VGFX_BST
18
VBST
17
DRVH
VID015VID1
16
TI_TPS51610RHB_QFN_32P
1
2.2uF_6.3V
2
POWERPAD1x1m
R2082
1
0_5%
R2083
12
2
0_5%
C3045
1uF_10V
P2U
C1206
P2U
PAD2011
TPS51610GND
2
P_VGFX_DL P_VGFX_LL
1
P_VGFX_DH
P2U
14-
VGFX_PG
+VBATR
5-,7-,8-,11-,13-,30-,39-,48-
C1250
4.7uF_25V
1 2
P_CSN
P_CSP
765
8
D
G
Q1016
SI7326DN
S
4
123
765
8
D
G
Q1017
FDS6676AS
S
4
P2L
12
130K_1%
1
R2173
0_5%_OPEN
2
C3145
1 2
0.1uF_10V_OPEN
1
C1249
2
4.7uF_25V
9-
P2U
9-
R2085
PCMC063T_1R0MN
C3144
0.1uF_25V_OPEN
1 2
R2090
12
330_5%
R2089
12
330_5%
R2087
12
220K_5%
R2086
12
42.2K_1%
L1021
2
1
1
C3143
2
2200pF_50V_OPEN
C3047 2
1
0.0047uF_50V
R2088
12
63.4K_1%
47pF_50V_OPEN
For RF option
+VGFX_CORE
9.6A(380mils)
Ensure trace/via isolated other signal
+VGFX_CORE
1
C3148
1 2
390uF_2.5V
C1243
2
23-
CHANGE by
Jason Chiu
16-Mar-2009
INVENTEC
TITLE
Zenith UMA C1
GRAPHIC POWER (+VGFX_CORE)
SIZE
A3
CS
SHEET
DOC. NUMBER
OF
952
REVCODE
A031310A22526-0-MTR
SLP_S3#_3R
5-,8-,9-,12-,13-,14-,32-,39-,41-,43-,46-
+VCCP
8-,9-,11-,15-,16-,17-,18-,19-,20-,21-,23-,24-,31-,34-,48-
R112
12
0_5%
R123
0402_OPEN
1
2
3A(120mils)
+V5A
7-,8-,9-,11-,12-,13-,30-,34-,38-,48-
C78
1 2
1uF_10v
+V1.8
8-,12-,20-,23-,24-,26-,27-,48-
C81
1 2
22uF_6.3v
VOUT
VIN
45
VOUT
VCNTL
6
7 8 9
ANPEC_APL5930KAI_TRG_SOP_8P
3
FB
POK
2
EN VIN
GND
1
U7
14-
V1.5S_PG
C97
1 2
22uF_6.3v
+V1.5S
1 2
C98
1uF_10v
1 2
C96
39pF_50V
3A(120mils)
1
R125
27.4K_1%
2
1
R124
30K_1%
2
+V1.5S
13-,18-,24-,34-,41-,45-,46-,47-
CHANGE by
Jason Chiu
16-Mar-2009
INVENTEC
TITLE
Zenith UMA C1
SYSTEM POWER(+VCCP/+V1.5S)
DOC. NUMBER
CODE
SIZE REV
A3
1310A22526-0-MTRA03
CS
SHEET
OF
5210
AGND_VCORE
11-
CSP1
C3060
1
2
47pF_50V
C3061
12
47pF_50V
11-
CSN1
11-
CSN2 C3062
12
47pF_50V
C3063
12
47pF_50V
11-
CSP2
VSSSENSE
VCCSENSE
Kelvin sense
P2U
R2114
12
332_1%
C3059
47pF_50V
1 2
332_1%
R2115
12
R2116
12
332_1%
1
C3064
47pF_50V
2
332_1%
R2117
12
P2U
18-
18-
P_CORE_VREF
P2U
C305812
0.22uF_6.3V
AGND_VCORE
P2U
AGND_VCORE
R2118
12
0_5%
R2119
12
0_5%
AGND_VCORE
+V5S
5-,13-,14-,19-,23-,29-,32-,34-,37-,40-,41-,48-,49-
R2111
0_5%_OPEN
R2112
0_5%
1
C3065
0603_OPEN
2 1
C3066
0603_OPEN
2 1
C3067
0603_OPEN
2
H_DPRSTP#
Sensitive signal
PM_PWROK
PM_DPRSLPVR
VR_PWRGD_CK505#
PWR_GOOD_3
1
POWERPAD1x1m
AGND_VCORE
2
C3057
47pF_50V
1
1 2
2
17-,20-,31-
17-
PSI#
H_VID6
18-
H_VID5
18-
H_VID4
18-
H_VID3
18-
H_VID2
18-
H_VID1
18-
H_VID0
18-
20-,32-,39-
20-,32-
12
499_1%
32-
1
5-,14-,39-
124K_1%
R2110
12
P2U
PAD2019
R2107 0402_OPEN
12
C3056
2.2uF_6.3V
1
R2113
5.62K_1%
2
AGND_VCORE
+VCCP
41
PwPd
130
DROOP
2
VREF
3
GND
4
CSP1
5
CSN1
6
CSN2
7
CSP2
8
GNDSNS
9
VSNS
10
THERM
1
R2120 20K_1%
2
8-,9-,10-,15-,16-,17-,18-,19-,20-,21-,23-,24-,31-,34-,48-
1
R2106
1
56_5%
2
2
R193
R5004
2
0_5%
TP41
38
ISLEW
OSRSEL
DPRSTP#
PSI#
13
37
TONSEL
VID6
14
35
36
TRIPSEL
VID5
16
15
34
33
VR_ON
PWRMON
VID4
18
32
CLK_EN#
VID217VID3
19
39
40
V5FILT
U12
TI_TPS51620RHAR_QFN_40P
VR_TT#
12
11
31
DRVH1
PGOOD
VBST1
DPRSLPVR
DRVL1
DRVL2
VBST2 DRVH2
VID0
VID1
20
PGND
+VBATR
5-,7-,8-,9-,13-,30-,39-,48-
1 2
C108
4.7uF_25V
4A(160mils)
C3034
C107
1
1
2
2
4.7uF_25V
4.7uF_25V
X 3
0.1uF_25V_OPEN
C3147
2200pF_50V_OPEN
1
1
2
2
C3146
4G321
+V5A
7-,8-,9-,10-,12-,13-,30-,34-,38-,48-
12
P_CORE_DH1
C1260
68uF_25V
C109
1 2
4.7uF_25V
65
Q12
P2U
R165
C157
2.2_5%
12
29
P_CORE_BST1
28
LL1
27 26
V5IN
25 24 23
LL2
P_CORE_BST2
22 21
12
0.22uF_16V
12
12
0.22uF_16V
R168
C158
2.2_5%
P2U
P_CORE_LL1 P_CORE_DL1
C1200
12
P_CORE_DH2
P_CORE_LL2
2.2uF_6.3V
0.1uF_25V_OPEN
P2U
C3037
C3039
C124
1
1
2
2
2200pF_50V_OPEN
C126
C125
1 2
1 2
4.7uF_25V
4.7uF_25V
4.7uF_25V
C3035
1 2
X 3
FDMS8660S
1 2
4.7uF_25V
G
41S23
6789
4G321
765
G
Q16
FDMS8660S
P_CORE_DL2
4
56789
Q10
SI7686DP_T1_E3
9
87
D
R139
0805_OPEN
C99 0603_OPEN
Q19
SI7686DP_T1_E3
5
9
8
D
R164 0805_OPEN
S
123
C1202
0603_OPEN
Kelvin sense
11-
CSN1
11-
CSP1
1
2
1 2
1
2
1 2
Kelvin sense
CSP2
CSN2
0_5%
R2127
2
0.015uF_10V C3068
2
1
R2126
0402_OPEN
2
1
R2121
12
24.9K_1%
R2122
12
220K_5%
NTC thermistor, place near L1022
12
L1022
ETQP4LR36WFC_PANASONIC
L1020
12
ETQP4LR36WFC_PANASONIC
NTC thermistor, place near L1020
R2128
220K_5%
12
R2129
2
0402_OPEN
R2130
12
C3069
2
R2131
0_5%
0.015uF_10V
24.9K_1%
12
11-
11-
1
P2L
R2125
12
48.7K_1%
+VCC_CORE
18-,48-
Ensure trace/via isolated other signal
44A
48.7K_1%
12
R2132
1
1
Ensure trace/via isolated other signal
P2L
INVENTEC
TITLE
Zenith UMA C1
CPU POWER(VCC_CORE)
CODE
SIZE
A3
CHANGE by SHEET
Jason Chiu 18-Mar-2009
CS
DOC. NUMBER
1310A22526-0-MTRA03
REV
OF
5211
SLP_S4#_3R
SLP_S3#_3R
8-,32-
5-,8-,9-,10-,13-,14-,32-,39-,41-,43-,46-
+V1.8
8-,10-,20-,23-,24-,26-,27-,48-
2A(80mils)
C77
1 2
4.7uF_6.3V
+V5A
7-,8-,9-,10-,11-,13-,30-,34-,38-,48-
U6
GMT_G2997F6U_MSOP10_10P
11
TML1VDDQSNS
10
VIN VLDOIN
9
S5
8
GND4PGND
7
S3
6
C76 1uF_10V
C75
1
0.1uF_16V
2
VTTREF
1 2
NOTE: DDR2 REGULATOR
20-,26-,27-
VTTSNS
VTT
2 3
5
M_VREF
+V0.9S
1 2
28-,48-
2A(80mils)
C74 10uF_6.3V
1 2
C73 10uF_6.3V
CHANGE by
INVENTEC
TITLE
Zenith UMA C1
DDR TERMINATION VOLTAGE
SIZE DOC. NUMBER
CODE
A3
16-Mar-2009Jason Chiu
CS
12 52
REV
A031310A22526-0-MTR
OFSHEET
5-,7-,9-,13-,19-,30-,32-,33-,34-,43-,45-,47-,48-
D2006
CHENMKO_BAT54_3P
12
13-
GATE_3S
R192 120K_1%
+V3A
6
13
5 2
13
FDC655BN
1
C174
0.01uF_16V
2
4A(160mils)
Q21
D
G
+V3S
5-,14-,15-,19-,20-,21-,23-,24-,26-,27-,29-,30-,31-,32-,33-,34-,37-,39-,40-,41-,43-,45-,46-,47-,48-,49-,50-
7-,8-,9-,10-,11-,12-,30-,34-,38-,48-
4
S
12
13-
GATE_5S
1
1
R189 47_5%
C173
10uF_6.3V
2
2
R147 120K_1%
+V5A
1 2
Q14
6
D
5 2
1
FDC655BN
C122
0.01uF_16V
4A(160mils)
S
G
R148 100_5%
+V5S
5-,11-,14-,19-,23-,29-,32-,34-,37-,40-,41-,48-,49-
4
3
1
C123
2
10uF_6.3V
1
2
+V1.5S
10-,18-,24-,34-,41-,45-,46-,47-
1
R126 100_5%
2
SLP_S3_3R
Q18
3
Q20
3
D
G
1
S
2
SSM3K7002F
49-
5-,7-,9-,13-,19-,30-,32-,33-,34-,43-,45-,47-,48-
5-,8-,9-,10-,12-,13-,14-,32-,39-,41-,43-,46-
SLP_S3#_3R
1
C214
0402_OPEN
2
SLP_S3#_3R
5-,8-,9-,10-,12-,13-,14-,32-,39-,41-,43-,46-
SSM3K7002F
+VBATR
5-,7-,8-,9-,11-,13-,30-,39-,48-
1
R257 47K_5%
2
+V3A
1
R300 100K_5%
2
Q27
3
D
1
G
S
2
Q24
MMBT3904
3
C
1
B
E
2
1
2
SSM3K7002F
+VBATR
Q25
MMBT3906
1
R259 130K_1%
Q26
G
1
5-,7-,8-,9-,11-,13-,30-,39-,48-
1
R258
2.7K_5%
2
2
E
B
C
3
12
3
D
S
2
R256 0_5%
R299
12
1K_5%
D10
1
RLZ18C2
1
G
SSM3K7002F
D
S
1
2
1
2
2
R254 0_5%
R253 0_5%
1
R255 0_5%
13-
GATE_5S GATE_3S
2
1
2
R301 0_5%
1
G
SSM3K7002F
Q7
3
D
S
2
13-
INVENTEC
TITLE
Zenith UMA C1
POWER(SLEEP)
CODE REVDOC. NUMBER
CHANGE by
SIZE
A3
CS
16-Mar-2009Jason Chiu
SHEET
13 52
A031310A22526-0-MTR
OF
VGFX_PG
V1.5S_PG
V1.8_PG
VCCP_PG
5-,8-,9-,10-,12-,13-,14-,32-,39-,41-,43-,46-
SLP_S3#_3R
5-,13-,14-,15-,19-,20-,21-,23-,24-,26-,27-,29-,30-,31-,32-,33-,34-,37-,39-,40-,41-,43-,45-,46-,47-,48-,49-,50-
+V3S
5-,11-,13-,14-,19-,23-,29-,32-,34-,37-,40-,41-,48-,49-
+V5S
LS_100R
5-
9-
10-
8-
8-
12
R352
1K_5%
R354
12
68.1K_1%
R353
12
102K_1%
R359
12
10K_5%
R362
12
10K_5%
R361
12
10K_5%
R360
12
10K_5%
D14
21
CHENKO_LL4148_2P
R355
49.9K_1%
1
R1238 182K_1%
2
R1240
12
1M_5%
1
R1242 10K_1%
2
1
2
C264
1 2
1000pF_50V
+VADP
5-,14-
1
2
1
2
+VADP
5-,14-
1
2
1
2
100K_5%
R356
12
20K_5%
R1236
22.6K_1%
R140 10K_1%
R1241
29.4K_1%
R1239 10K_1%
2VREF
5-,7-,14-
R358
12
C263
1 2
0.1uF_16V
5-
ON_LM393DR2G_SOP_8P
R1237
12
1M_5%
ON_LM393DR2G_SOP_8P
3 2
5 6
VBIAS
+
OUT
-
+
OUT
-
8
4
8
4
U8-A
U8-B
1
7
R363
12
1M_5%
+V5AL
5
+
OUT
6
-
5-,13-,14-,15-,19-,20-,21-,23-,24-,26-,27-,29-,30-,31-,32-,33-,34-,37-,39-,40-,41-,43-,45-,46-,47-,48-,49-,50-
+V3S
1
R357 10K_5%
2
5-,7-,14-
8
U15-B
7
ON_LM393DR2G_SOP_8P
4
5-,6-,7-,14-,31-,36-,39-,40-,45-,48-
1
R1231 10K_5%
2
39-
+VADP
1
R1235 47K_5%
2
D1007
CHENKO_LL4148_2P
21
5-
ADP_EN#
ADP_ID
5-,14-
1
2
1
2
R1234 220K_5%
R1233 220K_5%
1
5-,11-,39-
+VADP
5-,14-
1
R2033 1_5%
2
+V3AL
C1261
1 2
1uF_25V
5-,8-,9-,10-,12-,13-,14-,32-,39-,41-,43-,46-
R135
12
100K_5%
1
R1232 47K_5%
2
3
D
Q8
G
SSM3K7002F
S
2
PWR_GOOD_3
SLP_S3#_3R
1
B
51.1K_1%
5-
3
C
Q9
E
D_MMST3904
2
39-
+V3AL
5-,6-,7-,14-,31-,36-,39-,40-,45-,48-
1
23.7K_1%
2
1
R2024
2
BATCAL#
ADP_EN
R2023
D2007
12
DAN202K
3
12
R2026
57.6K_1%
R2012
12
1M_5%
+V5AL
R2025
12
5-,7-,14-
1
100K_5%
2
1 2
R141
23.7K_1%
R2022
12
1M_5%
C91
1uF_16V
R120
1
5-
47K_5%
R1251
12
10K_5%
R1247
12
21K_1%
Q1043
1
SSM3K7002F
1 2
12
2
470K_5%
+V5AL
1
C3012
2
2200pF_50V
C105
0.1uF_16V
+V3S
5-,13-,14-,15-,19-,20-,21-,23-,24-,26-,27-,29-,30-,31-,32-,33-,34-,37-,39-,40-,41-,43-,45-,46-,47-,48-,49-,50-
1
R1250
71.5K_1%
2
OCP_OC
1
R1249 21K_1%
2
1
R1248
3.48K_1%
2
G
R119
3
+
OUT
2
-
3
D
2VREF
S
2
C92
1 2
0.1uF_16V
CHANGE by
1
R2027
5-,6-,7-,14-,31-,36-,39-,40-,45-,48-
115K_1%
5-,7-,14-
8 U15-A
1
ON_LM393DR2G_SOP_8P
4
5-,7-,14-
5-,11-,13-,14-,19-,23-,29-,32-,34-,37-,40-,41-,48-,49-
+V3AL
2
1
R2014
10K_5%
2
+V5S
R1252
12
1M_5%
3
U4-A
5
+
2
OUT
4
­12
ON_LM339DR2G_SOP_14P
R1243
12
1M_5%
3
U4-B
7
+
1
OUT
6
-
ON_LM339DR2G_SOP_14P
12
TITLE
SIZE CODE
16-Mar-2009Jason Chiu
A3
+V3AL
5-,6-,7-,14-,31-,36-,39-,40-,45-,48-
1
R2028
12.1K_1%
2
1
R2029
100K_5%
Thermistor (NTC)
2
7-,39-
VCC1_POR#_3
1
R1253 10K_5%
2
39-
ADP_PS0
1
R1245 10K_5%
2
39-
ADP_PS1
INVENTEC
Zenith UMA C1
POWER(SEQUENCE)
CS
SHEET
OF
14 52
REVDOC. NUMBER
A031310A22526-0-MTR
8-,9-,10-,11-,15-,16-,17-,18-,19-,20-,21-,23-,24-,31-,34-,48-
5-,13-,14-,15-,19-,20-,21-,23-,24-,26-,27-,29-,30-,31-,32-,33-,34-,37-,39-,40-,41-,43-,45-,46-,47-,48-,49-,50-
+VCCP
L1006
BLM18AG471SN1D
1
CLKREQ_NC#
CLKREQ_MCH#
CLKREQ_MINI_BOT#
2
1
C1096
10uF_6.3V
2
12
R1079
15-,46-
15-,20­15-,45-
12
R1081
+VCCP
8-,9-,10-,11-,15-,16-,17-,18-,19-,20-,21-,23-,24-,31-,34-,48-
R1124
10K_5%_OPEN
CPU_BSEL1 CPU_BSEL2
CLK_3S_REF
17-,20­15-
C1119
12pF_50V
17-,20-
1 2
1
2
R1122
12
12
For RF option
C1114
12pF_50V
10K_5%
10K_5%R1123
10K_5%
For RF option
1
C1149 33pF_50V
2
Please place close to CLKGEN within 500mils
*CLKREQ# pin controls SRC Table.
CR#_A
CR#_4
Byte5: bit6 =0(PWD)
ENABLE_SRC0
Byte5: bit4 =0(PWD)
DISABLE_SRC4
Byte5: bit6 =1
ENABLE_SRC2
Byte5: bit4 =1
ENABLE_SRC4
Layout note: All decoupling 0.1uF disperse closed to pin
C1097
C1120
1 2
0.1uF_16V
+V3S
10K_5% 10K_5%R1086 10K_5%1
2
1 2
2
CLK_R3S_MINICARD
R2045
1
CLK_PWRGD
ICH_3S_SMCLK
ICH_3S_SMDATA
X1002
12
1
14.318MHz
2
30PPM
1 2
CLK_R3S_ICH48
CLK_R3S_CARD48
CLK_R3S_ICH14
CLK_R3S_TPM
CLK_R3S_KBPCI
C1150 33pF_50V
C1115
1 2
0.1uF_16V
0.1uF_16V
8-,9-,10-,11-,15-,16-,17-,18-,19-,20-,21-,23-,24-,31-,34-,48-
32-
45­47­39-
C1116
5.6pF_50V
5.6pF_50V
32­19-,26-,27-,32-,37­19-,26-,27-,32-,37-
17-,20-
32-
46-
C1117
CPU_BSEL0
Byte5: bit5 =0(PWD)
CR#_3
DISABLE_SRC3
Byte5: bit3 =0(PWD)
CR#_6
DISABLE_SRC6
C1093
1 2
0.1uF_16V
10K_5%_OPEN
R1108
12
2.2K_5%
R2136
12
R2137 22_5%
12
1 2
For RF option
1
1
2
2
CLKREQ_MCH#
CLKREQ_SATA#
CLKREQ_NC#
C1094
1 2
0.1uF_16V
For RF option
+VCCP
1
R1107
2
1
R1112
10K_5%
2
22_5%
CLK_R3S_TPM
+V3S
C1118
12pF_50V
10K_5%_OPEN
15-,20­32-
15-,46-
Byte5: bit5 =1
ENABLE_SRC3
Byte5: bit3 =1
ENABLE_SRC6
1 2
C1095
47pF_50V
R2187
10K_5%
R3000
CLK_3S_ICH48
R1120
2
R1119
2
R1118
R1117
12
12
CR#_7
CR#_9
CR#_10
CR#_11
CLK_3S_REF
+V3S
5-,13-,14-,15-,19-,20-,21-,23-,24-,26-,27-,29-,30-,31-,32-,33-,34-,37-,39-,40-,41-,43-,45-,46-,47-,48-,49-,50-
Layout note: All decoupling 0.1uF disperse closed to pin
L1007
1
12 1 12
33_5%
33_5% 33_5%
33_5%
1
BLM18AG471SN1D
2
1
2
U1008
62
VDDSRC_IO
52
VDDSRC_IO
38
VDDSRC_IO
23
VDD96_IO
55
VDDSRC
6
VDDREF
31
VDDPLL3_IO
66
VDDCPU_IO
19
VDD48
12
VDDPCI
72
VDDCPU
27
VDDPLL3
20
USB_48MHZ_FSLA
2
FSLB_TEST_MODE
7
FSLC_TEST_SEL_REF0
8
REF1
13
PCI1
14
PCI2_TME
15
PCI3
1
CK_PWRGD_PD#
10
SCLK
9
SDATA
5
X1
4
X2
18
GNDPCI
22
GND48
26
GND
30
GND
42
GNDSRC
59
GNDSRC
69
GNDCPU
3
GNDREF
34
GNDSRC
11
NC
65
CR#7 CR#A
37
CR#3
41
CR#4
73
TML-PAD
74
TML-PAD
75
TML-PAD
76
TML-PAD
ICS_ICS9LPRS397_MLF_72P
C1121 10uF_6.3V
CPUC2_ITP_LPR_SRCC8_LPR
CPUT2_ITP_LPR_SRCT8_LPR
SRCT2_LPR_SATAT_LPR SRCC2_LPR_SATAC_LPR
27MHz_NonSS_SRCT1_LPR_SE1
27MHz_SS_SRCC1_LPR_SE2
SRCT0_LPR_DOTT_96_LPR SRCC0_LPR_DOTC_96_LPR
C222
1 2
0.1uF_16V
54
PCI_STOP#
53
CPU_STOP#
68
CPUT1_LPR_F
67
CPUC1_LPR_F
71
CPUT0_LPR_F
70
CPUC0_LPR_F
63 64
48
SRCT11_LPR
47
SRCC11_LPF
50
SRCT10_LPR
51
SRCC10_LPR
44
SRCT9_LPR
45
SRCC9_LPR
61
SRCT7_LPR
60
SRCC7_LPR
57
SRCT6_LPR
56
SRCC6_LPR
16
PCI4_27_Select
17
PCI_F5_ITP_EN
39
SRCT4_LPR
40
SRCC4_LPR
35
SRCT3_LPR
36
SRCC3_LPR
32 33
28 29
24 25
4321
CR#9
46
CR#11
49
CR#10
58
CR#6
5-,13-,14-,15-,19-,20-,21-,23-,24-,26-,27-,29-,30-,31-,32-,33-,34-,37-,39-,40-,41-,43-,45-,46-,47-,48-,49-,50-
C195
1
0.1uF_16V
CLK_XDP# CLK_XDP
CLK_3S_MINICARD
CLK_3S_ICHPCI
1 2
C194
0.1uF_16V
Byte5: bit2 =1Byte5: bit2 =0(PWD)
DISABLE_SRC7
Byte5: bit1 =0(PWD)
DISABLE_SRC9
Byte5: bit0 =0(PWD)
DISABLE_SRC10
Byte6: bit7 =0(PWD)
DISABLE_SRC11
ENABLE_SRC7
Byte5: bit1 =1
ENABLE_SRC9
Byte5: bit0 =1
ENABLE_SRC10
Byte6: bit7 =1
ENABLE_SRC11
15-
R1121
33_5%
12
LAYOUT NOTES : THE R1121 CLOSED TO U1008
5-,13-,14-,15-,19-,20-,21-,23-,24-,26-,27-,29-,30-,31-,32-,33-,34-,37-,39-,40-,41-,43-,45-,46-,47-,48-,49-,50-
+V3S
C192
C221
C193
1
1 2
0.1uF_16V
FSA
FSB
1 0 0
CHANGE by
1 1 0
1
22
2
47pF_50V
0.1uF_16V
For RF option
5-,13-,14-,15-,19-,20-,21-,23-,24-,26-,27-,29-,30-,31-,32-,33-,34-,37-,39-,40-,41-,43-,45-,46-,47-,48-,49-,50-
FSC
0 0 0
15-,45-
ITP_EN =0 SRC8/SRC8#
ITP_EN =1 ITP/ITP#
FREQUENCY
667 800
1066
1
R1084 10K_5%
2
43-
Jason Chiu
39-
R1083 10K_5%
1
2
12
33_5% 33_5%
CLKREQ_LAN# CLKREQ_MINI_BOT#
+V3S
HOST CLOCK
FREQUENCY
166 200 266
16-Mar-2009
CLK_R3S_KBC14
32­32-
21­21-
16­16-
19­19-
45­45-
43­43-
20­20-
R1115 R11141
2
R1109
2
10K_5%
R1111
2
0402_OPEN
39­33-
46­46-
32­32-
31­31-
20­20-
20­20-
12
1
0402_OPEN
12
1
10K_5%
INVENTEC
TITLE
Zenith UMA C1
CLOCK_GENERATOR
SIZE REV
A3
CS
SHEET
PCISTOP#_3 CPUSTOP#_3
CLK_MCHBCLK CLK_MCHBCLK#
CLK_CPUBCLK CLK_CPUBCLK#
CLK_XDP# CLK_XDP
CLK_PCIE_MINI_BOT CLK_PCIE_MINI_BOT#
CLK_PCIE_LAN CLK_PCIE_LAN#
CLK_PEG_MCH CLK_PEG_MCH#
CLK_R3S_DEBUG CLK_R3S_ICHPCI
CLK_PCIE_NC CLK_PCIE_NC#
CLK_PCIE_ICH CLK_PCIE_ICH#
CLK_SATA1 CLK_SATA1#
SSCLK1_DREF SSCLK1_DREF#
CLK_DREF CLK_DREF#
+V3S
R1113
R1116
27_Selet =0
LCD_SST 100MHZ
27_Selet =1
27MHZ non-spread clock
DOC. NUMBERCODE
1310A22526-0-MTRA03
OF
5215
H_A#(35:3)
H_ADSTB#1
H_STPCLK#
H_A20M# H_FERR#
H_IGNNE#
H_INTR
H_NMI
H_SMI#
21-
H_A#(3) H_A#(4) H_A#(5) H_A#(6) H_A#(7) H_A#(8) H_A#(9) H_A#(10) H_A#(11) H_A#(12) H_A#(13) H_A#(14) H_A#(15) H_A#(16)
H_REQ#(4:0) H_RS#(2:0)
H_A#(17) H_A#(18) H_A#(19) H_A#(20) H_A#(21) H_A#(22) H_A#(23) H_A#(24) H_A#(25) H_A#(26) H_A#(27) H_A#(28) H_A#(29) H_A#(30) H_A#(31) H_A#(32) H_A#(33) H_A#(34) H_A#(35)
21-
31­31­31-
31­31­31­31-
21-
H_REQ#(0) H_REQ#(1) H_REQ#(2) H_REQ#(3) H_REQ#(4)
H_ADSTB#0
21-
CN1009-1
J4
478
A3#
L5
A4#
L4
A5#
K5
A6#
M3
A7#
N2
A8#
J1
A9#
N3
A10#
P5
A11#
P2
A12#
L2
A13#
P4
A14#
P1
A15#
R1
A16#
M1
ADSTB0#
K3
REQ0#
H2
REQ1#
K2
REQ2#
J3
REQ3#
L1
REQ4#
Y2
A17#
U5
A18#
R3
A19#
W6
A20#
U4
A21#
Y5
A22#
U1
A23#
R4
A24#
T5
A25#
T3
A26#
W2
A27#
W5
A28#
Y4
A29#
U2
A30#
V4
A31#
W3
A32#
AA4
A33#
AB2
A34#
AA3
A35#
V1
ADSTB1#
A6
A20M#
A5
FERR#
C4
IGNNE#
D5
STPCLK#
C6
LINT0
B4
LINT1
A3
SMI#
M4
RSVD01
N5
RSVD02
T2
RSVD03
V3
RSVD04
B2
RSVD05
C3
RSVD06
D2
RSVD07
D22
RSVD08
D3
RSVD09
F6
RSVD010
FOX_PZ4782K_274M_41_478P
GMCH
CPU
ADS# BNR# BPRI#
DEFER#
DRDY# DBSY#
BR0#
IERR#
ADDR GROUP 0
INIT#
CONTROL
LOCK#
RESET#
RS0# RS1# RS2#
TRDY#
HIT#
HITM#
BPM0# BPM1# BPM2# BPM3# PRDY# PREQ#
TCK
TDI
ADDR GROUP 1
TDO TMS
XDP/ITP SIGNALS
TRST#
DBR#
THERMAL
PROCHOT#
THERMDA THERMDC
THERMTRIP#
ICH
H CLK
BCLK0 BCLK1
RESERVED
ICH8
H1 E2 G5
H5 F21 E1
F1
D20 B3
H4
C1 F3 F4 G3 G2
G6 E4
AD4 AD3 AD1 AC4 AC2 AC1 AC5 AA6 AB3 AB5 AB6 C20
8-,9-,10-,11-,15-,16-,17-,18-,19-,20-,21-,23-,24-,31-,34-,48-
56_5%
12
R150
D21 A24 B25
C7
A22 A21
+VCCP
10mils/10mils
+VCCP
21-
H_ADS#
21-
H_BNR#
21-
H_BPRI#
21-
H_DEFER#
21-
H_DRDY#
21-
H_DBSY#
21-
H_BREQ#0
31-
H_INIT#
21-
H_LOCK#
R207
2
19-,21-
16-,19­16-,19­16-,19-
16-,19-
19-,32-
20-,31-
21-
21­21-
19­19­19­19­19-
19-
19­19-
15­15-
+VCCP
1
H_CPURST#
51_5%
H_TRDY# H_HIT#
H_HITM#
H_BPM0_XDP# H_BPM1_XDP# H_BPM2_XDP#
H_BPM3_XDP# H_BPM4_PRDY#
H_BPM5_PREQ# H_TCK TDI_FLEX H_TDO
H_TMS XDP_DBRESET#
H_THERMDA THERM_MINUS
PM_THRMTRIP#
CLK_CPUBCLK CLK_CPUBCLK#
8-,9-,10-,11-,15-,16-,17-,18-,19-,20-,21-,23-,24-,31-,34-,48-
R1154
2
1
54.9_1% R204
12
54.9_1% R205
12
54.9_1%
R1151
12
54.9_1%
+VCCP
8-,9-,10-,11-,15-,16-,17-,18-,19-,20-,21-,23-,24-,31-,34-,48-
1
R149 56_5%
2
+VCCP
8-,9-,10-,11-,15-,16-,17-,18-,19-,20-,21-,23-,24-,31-,34-,48-
21-
H_RS#(0) H_RS#(1) H_RS#(2)
1
R203
54.9_1%
2
16-,19-
H_BPM5_PREQ#
16-,19-
TDI_FLEX
16-,19-
H_TMS
16-,19-
H_TCK
CLOSED TO CPU
51 ohm +/-1% pull-up to +VCCP (VCCP) if ITP is implemented
19-
H_TRST#
PM_THRMTRIP# should be T at CPU
CHANGE by
Jason Chiu
16-Mar-2009
INVENTEC
TITLE
Zenith UMA C1
PENRYN-1
SIZE CODE
A3
CS
SHEET
DOC. NUMBER
16 52
REV
A031310A22526-0-MTR
OF
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