Inventec Z11D Schematic

http://hobi-elektronika.net

D D

Inventec Corporation R&D Division

C C

Board name : Mother Board Schematic Project : Z11D (Santa Rosa)

Version : 0.4

B B

A A

Initial Date : March 02 , 2007

Inventec Corporation

5F, No. 35, Section 2, Zhongyang South Road

5F, No. 35, Section 2, Zhongyang South Road Beitou District, Taipei 11270, Taiwan

Beitou District, Taipei 11270, Taiwan

TEL:+886-2-2881-0721

Title

Z11D (Merom+Crestline+ICH8M)

Size

Document Number

Date: Sheet of

Tuesday, July 31, 2007

Date: Sheet of

Tuesday, July 31, 2007

Date: Sheet of

Tuesday, July 31, 2007

Title

Rev

0.4

1. Schematic Page Description :

http://hobi-elektronika.net

Santa Rosa Schematic Ver : 0.4

D D

1. Title

2. Schematic Page DESCR

3. Block Diagram

4. Annotations

5. Schematic Modify

6. Timing Diagram

7. DDRII Layout Guideline

8. Merom Processor(1/2)

9. Merom Processor(2/2)

10. CPU Core Power

11. CPU Thermal

12. Crestline Host(1/6)

13. Crestline DMI/Graph(2/6)

C C

14. Crestline DDRII(3/6)

15. Crestline Power(4/6)

16. Crestline Power(5/6)

17. Crestline Ground(6/6)

18. Clock Generator

19. DDRII SDRAM SO-DIMM0

20. DDRII SDRAM SO-DIMM1

21. ICH8M CPU/IDE/SATA(1/4)

22. ICH8M PCI/PCIE/DMI/USB(2/4)

23. ICH8M GPIO(3/4)

24. ICH8M Power/GND(4/4)

25. LCD&CRT

26. TV Connector

27. IDE&SATA

28. I/O Board CN(MB)

29. LAN (88E8055B0)

30. USB&Bluetooth Connector

31. KBC ITE8512F

32. Audio Codec ALC262/AMP

33. INT_MIC

34. DVI Transmitter Sil1364

35. Super I/O

36. Docking Connector

37. Adaptor in/Charge

38. 5VLA/5VA/3VA

39. 3VS/5VS/1.25VS/1.05VS

40. 1.5VS/1.8V

41. GPU_Core

42. Dual Battery

43. WLAN&New Card&MDC

44. 3G&Cardreader

45. Audio Board

46. USB Board

47. Glidepad Board

48. SW Board

B B

2. PCI & IRQ & DMA Description :

IDSEL AD17

AD27 AD29

IRQA IRQB IRQC IRQD

BUSMASTER

A A

REQ REQ0 / GNT0 REQ1 / GNT1 REQ2 / GNT2 REQ3 / GNT3 REQ4 / GNT4

CHIP

CHIPPCIINT

CHIP

Inventec Corporation

5F, No. 35, Section 2, Zhongyang South Road

5F, No. 35, Section 2, Zhongyang South Road Beitou District, Taipei 11270, Taiwan

Beitou District, Taipei 11270, Taiwan

TEL:+886-2-2881-0721

Title

Z11D (Merom+Crestline+ICH8M)

Size

Document Number

Schematic Page DESCR

Date: Sheet of

Tuesday, July 31, 2007

Date: Sheet of

Tuesday, July 31, 2007

Date: Sheet of

Tuesday, July 31, 2007

Rev

0.4

3. Block Diagram :

D D

LCD

P.25

CRT

P.25

FAN

P.11

S-OUT

P.26

Docking

P.36

LVDS

TVO

RGB_CRT RGB

RGB_DOCK

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PLL

ICS9LPRS365AGLF

P.18

Thermal

G784

CRT_SW

P.36

Thermal

CPU

uFCPGA 478pin

Merom

MCH

965GM/GML FCBGA 1299pin

Crestline GM

P.8-9P.11

FSB 1.05V 667/800MHz

35mmx35mm

P.12-17

DMI x4

DDR2 1.8V 533/667MHz

SODIMM0

P.19

SODIMM1

P.20

166MHz+/100MHz+/48MHz 33MHz 14MHz 27MHz/96MHz+/-

x2 x8 x1 x7 x1 x1

RJ45

31mmx31mm

ICH

C C

HDD

SATA 150

mBGA 676pin

ICH8M

P.27

ODD

PATA 100

P.27

PCI-Express x1 2.5GHz

PCI 3.3V 33MHz

GbE

88E8055

Port#2

P.29

Express Card

Port#1

P.43

MiniCard #1

UMTS/Robson

Port#4

P.44

SIM Slot

P.28

MiniCard #2

WLAN/Robson

Port#3

P.43

Cardreader

GL827

PMU&KBC

ITE8512F

P.31

PS/2

Glide Pad

Flash ROM

P.44

P.28P.44

Docking

P.36

P.31

P.45

P.31

4 IN 1

Slot

P.44

IntMic Stereo

P.33

Analog In

P.33

Super I/O

IT8305E

Out

Serial port

Parallel port

Audio Codec

ALC262

P.32

Docking

Out

Docking

P.36

80Port

P.43P.35

P.36

AMP

P.P32

SPK

P.33

Analog Out

P.33

Inventec Corporation

5F, No. 35, Section 2, Zhongyang South Road

5F, No. 35, Section 2, Zhongyang South Road Beitou District, Taipei 11270, Taiwan

Beitou District, Taipei 11270, Taiwan

TEL:+886-2-2881-0721

Title

Z11D (Merom+Crestline+ICH8M)

Size

Document Number

Date: Sheet of

Block Diagram

Tuesday, July 31, 2007

Rev

0.4

USB0USB1USB2USB3

System1System2System3WLAN

P.43P.30P.30P.43

EHCI#1

Support

B B

USB 2.0/1.1

S0~S3 state

USB4USB5

Docking

USB9

Bluetooth

P.30

A A

Web Cam

UMTS

P.44P.36

USB 2.0/1.1

USB6USB7USB8

New CardCardreader

P.43P.44P.25

EHCI#2

Support S0~S2 state

P.21-24

HDA 24MHz

MDC1.5 RJ11

LPC 3.3V 33MHz

SPI

4. Net name Description :

Voltage Rails

DCIN +5VLA 5.0V always on power rail by LATCH or ACIN

D D

+3VA 3.3V always on power rail by ECPWON +5VS

+1.8VS 1.8V switched power rail by SLP_S3#_3R VCC_CORE

+1.05VS +1.25VS 1.25V switched power rail by SLP_S3#_3R +1.5VS

+1.8V

0.9VDDT_DDRII

Primary DC system power supply

5.0V always on power rail by ECPWON+5VA

5.0V switched power rail by SLP_S3#_3R

3.3V switched power rail by SLP_S3#_3R+3VS

Core Voltage for CPU

1.05V power rail for AGTL+ termination/Core for GMCH by SLP_S3#_3R

1.5V power rail for CPU PLL/DMI;PCIE;DDRII DLLs for GMCH/Core;PCIE for ICH8m by SLP_S3#_3R

1.8V power rail for DDRII by SLP_S5#_3R

0.9V DDRII Termination Voltage by SLP_S3#_3R

Part Naming Conventions

Capacitor

C C

D F L Q R RP U Y

Connector

Diode

Fuse

Inductor Transistor

= =

Resistor

Resistor Pack

Arbitrary Logic Device

Crystal and Osc

Net Name Suffix

Active Low signal

5. Board Stack up Description

PCB Layers

B B

Layer 1 Layer 2 Layer 3

Layer 5 Stripline Layer Layer 6 Layer 7 Layer 8

Host Clock PCI-E Clock DDR2 CLK

A A

DDR2 Strobe DMI Bus PCIE Bus SDVO SATA USB LVDS Lan

Differential Impedance for Microstrip(5-mils) Differential Impedance for Stripline(4-mils)

95 ohm +/- 20% 100 ohm +/- 20% 95 ohm +/- 20% 100 ohm +/- 20% 70 ohm +/- 20% 70 ohm +/- 20% 85 ohm +/- 20%

95 ohm +/- 20% 95 ohm +/- 20% 100 ohm +/- 20% 95 ohm +/- 20% 90 ohm +/- 20%

95 ohm +/- 20% 100 ohm +/- 20%

Component Side, Microstrip signal Layer Ground Plane Stripline Layer Power PlaneLayer 4

Stripline Layer Ground Plane Solder Side,Microstrip signal Layer

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90 ohm +/- 20% 100 ohm +/- 20%95 ohm +/- 20% 100 ohm +/- 20%

100 ohm +/- 20% 95 ohm +/- 20% 100 ohm +/- 20%

Power Rail

VCC_CORE

+1.05VS

+1.5VS

+1.8V

0.9VDDT_DDRII:DDRII Terminator: +2.5VS

+3VS

1.8VS

+3VA

+5VS

+5VA USB: x 3 ports

+5VLA

Destination

Merom

HFM:

LFM: Merom: AGTL+ termination 965GM: Core 965GM: AGTL+ termination ICH8m: Merom PLL 965GM: PCIE 965GM: LVDS 965GM: TVDAC 965GM: Various PLLS analog supply 965GM: DDR DLLS,DDRII,FSB HSIO ICH8m: ICH8m: ICH8m: ICH8m: Mini Card: Express Card: 965GM: DDRII System Memory SO-DIMM:

965GM: PCIE analog 965GM: LVDS analog 965GM: LVDS I/O 965GM: CRT DAC

965GM: HV CMOS 965GM: TVDAC analog ICH8m: ICH8m: ICH8m: ICH8m: ICH8m: Mini Card: UMTS Express Card: CLK Generator: ICS9LPRS365AGLF Mini Card: WirelessLan Bluetooth: Super I/O: IT8305E Azalia Codec: ALC262 Azalia MDC: HDD: SATA

DVI: Sil1364

Thermal Sensor: Lan: Marvell 88E8055B0 Azalia MDC: EC: ITE8512F ICH8m: RTC Flash ROM: BIOS LCD: Cardreader: GL827 Azalia Codec: ALC262 FAN: HDD: SATA ODD: PATA Audio AMP: G1432 Woofer AMP: None Inverter:

Control Power

Voltage

1.3319V~1.4375V~1.4591V

0.9221V~0.9625V~0.9739V

0.997V~1.05V~1.102V

1.0V~1.05V~1.1V

0.9475V~1.05V~1.1025V

1.425V~1.5V~1.575V

1.7V~1.8V~1.9V

0.855V~0.9V~0.945V

2.32V~2.5V~2.625V

2.375V~2.5V~2.625V

2.32V~2.5V~2.625V

3.135V~3.3V~3.465V

3.0V~3.3V~3.6V

4.75V~5.0V~5.25V

5VA 1.5A

S0 Current

36A

2.5A

4.6A

1.4A

120mA

1.5A 60mA 24mA 320mA

1.885A

3.1A

1.0A 2mA

10mA 60mA 70mA

40mA 120mA

400mA

1.0A

Max: 1.0A ; R/W: 460mA ; STDBY: 70mA Max: 1.8A ; R/W: 900mA ; STDBY: 45mA

Inventec Corporation

5F, No. 35, Section 2, Zhongyang South Road

5F, No. 35, Section 2, Zhongyang South Road Beitou District, Taipei 11270, Taiwan

Beitou District, Taipei 11270, Taiwan

TEL:+886-2-2881-0721

Title

Z11D (Merom+Crestline+ICH8M)

Size

Document Number

Date: Sheet of

ANNOTATIONS

Tuesday, July 31, 2007

Rev

0.4

6.Schematic modify Item and History :

http://hobi-elektronika.net

V01--------V02

1.ADD R623 0-5%-1/16W-0402 (60130B0000ZT), R634 10K-1%-1/16W-0402 (60130B10029Z)

2.R243 from 47K-5%-1/16W-0402 (60130B4730ZT)change to 1K-5%-1/16W-0402 (60130B1020ZT)

3.R246 from 4.7K-5%-1/16W-0402 (60130B4720ZT)change to 0-5%-1/16W-0402 (60130B0000ZT)

D D

4.R234 10-5%-1/16W-0402,C302 1uF 6.3V 10% 0402 X5R,C308 0.01uF 16V 10% 0402 X7R(NU)

5.R599 change to 39.2K-1%-1/10W-0603(60130B39229T)

6.ADD Q62 NPN PDTC144EU 50V 100mA SOT223 (6015B0030601)

7.R385 change to 10K-1%-1/16W-0402 (60130B10029Z)

8.R13,R14,R15 from 2.2K-5%-1/16W-0402 change to 220 ohm(60130B2210ZT)

9.C487,C488 from 12pF 50V 5% 0603 NPO change to 15pF 5% 50V 0402(6010071502AT)

10.C586,C588 from 18pF 50V 5% 0402 NPO change to 22pF 50V 5% 0402 NPO(6010072202AT)

12.ADD C692,C693,C690,C691 (6010B0000501) ,C706(6010A0036305)

13.ADD C675,C676,C677,C678 (6010B0047301)

14.ADD R625(60130B47400Z),R624(60130B1010ZT) ,C652 (6010071012AT)

15.ADD C712(60100768120Z),C686(6010A0025301),C650(601007A0018T)

16.ADD C1106(601007A0018T)

17.C15,C1103 change to 150uF(601007A0018T)

18.ADD C651,C653,C654,C655,C656,C657,C658,C659,C660(6010B0000501)

19.ADD C704,C702,C703,C664,C665,C666,C667,C668,C669,C670,C671,C672,C673,C713,C714,C696,C697,C682,C683,C684,C685,C698,C709,C1005,C1006,C708,C681,C701,C705,C689,C694

20.L4,L5,L6 from 17ohm 25% 600mA 0805(FBM-11-201209-170T)change to 10ohm 25% 500mA 0603(BLM18BB100SN1D) (6014B0005601)

21.C9,C10,C12 10pF 50V 0.5% 0402 NPO(NU)

22.C3,C4,C5 from 22pF 50V 5% 0402 NPO change to 18pF 50V 5% 0402 NPO(6010A0036105)

23.C6,C333 from 12pF 50V 5% 0603 NPO change to 22pF 5% 50V 0603 NPO 60100722020Z

V02--------V03

1.ADD C715 0.1uF 10V 10% 0402 X7R (6010B0031401),R635 100K 1% 1/16W 0402 (6013A0014701)

C C

2.ADD R637,R641 0ohm 5% 1/16W 0402 (60130B0000ZT)

3.ADD R638 10K 5% 1/16W 0402 (60130B1030ZT)

4.Change U10 from 6019B0312301 change to 6019B0406201

5.DEL C138 T330uF 2V 9m 7343 PANASONIC (6010B0008501)

6.ADD C375 T330uF 2V 9m 7343 PANASONIC (6010B0008501)

7.DEL R253 10K-5%-1/16W-0402 (60130B1030ZT)

8.DEL C87 AL 68uF 25V 20% 105C 6.3X6 (60100M68658T)

9.ADD C321,C87 T5.6uF 25V 100m 3528 SANYO (6010B0048601)

10.ADD D37 PACDN042Y3R SOT23 (6011B0074901)

11.Change CN22 From 6012B0174101 to 6012B0198401

12.F2,F3 From 7A-125V-R451007 (6036A0004901) Change to 10A 125V R451010 (6036A0002901)

13.F1 From 5A 125V R451005-5A/125V(6036A0004001) Change to 7A-125V-R451007 (6036A0004901)

14.DEL R333,R337,R340 120 0.5% 1/16W 0402 (6013A0052101)

15.ADD C716,C717,C718 3pF 50V 0.25% 0402 C0G (6010B0070501)

16.DEL C3,C4,C5 18pF 50V 5% 0402 NPO (6010A0036105)

17.ADD C3,C4,C5 5.6pF 0.25% 50V C0G 0402 (6010A0013801)

18.DEL R7,R9,R10 220-5%-1/16W-0402 (60130B2210ZT)

19.ADD R7,R9,R10 75-5%-1/16W-0402 (60130B7500ZT)

20.DEL R13,R14,R15 220-5%-1/16W-0402 (60130B2210ZT)

21.DEL C596,C597,C106,C107 100pF 50V 5% 0402 NPO (6010071012AT)

22.ADD R647,R649,R651 75-5%-1/16W-0402 (60130B7500ZT)

23.DEL R503 0-5%-1/16W-0402 (60130B0000ZT)

24.ADD R492 0-5%-1/10W-0603 (60130B00000Z)

25.DEL CN14 FPC 20P 6700-F20C-00R ENTERY (6012B0170701)

26.ADD CN14 88214-20001 (6012B0199801)

27.DEL U1 TRANSFORMER LG-2413S-1 100/1000 SOP 24P (6016B0003202)

28.ADD U1 TRANSFORMER (6016B0000201)

B B

V03--------V04

1.ADD R655 0 ohm 5% 1/8W 0805 (60130BA0003T)

2.ADD R652,R653,R654 0 ohm 5% 1/16W 0402 (60130B0000ZT)

3.ADD R118 0 ohm 5% 1/16W 0402 (60130B0000ZT)

4.ADD R170 1K 5% 1/16W 0402 (60130B1020ZT)

5.DEL R154 1K 5% 1/16W 0402 (60130B1020ZT)

6.DEL R49 0 0hm 5% 1/10W 0603 (60130B00000Z)

7.ADD R51 10K 5% 1/16W 0402 (60130B1030ZT)

8.DEL R492 0 ohm 5% 1/10W 0603(60130B00000Z)

9.ADD R503 0 ohm 5% 1/10W 0603 (60130B00000Z)

10.ADD C1302,C1303 0.01uF 25V 10% 0402 X7R(6010B0009101)

11. L12,L14,L11,L10,L7,L13,L15 from 100 ohm 25% 2A 0.1ohm 0603(6014B0006301) Change to 300ohm 25% 500mA 0.7ohm 0603(6014B0018101)

A A

Inventec Corporation

5F, No. 35, Section 2, Zhongyang South Road

5F, No. 35, Section 2, Zhongyang South Road Beitou District, Taipei 11270, Taiwan

Beitou District, Taipei 11270, Taiwan

TEL:+886-2-2881-0721

Title

Z11D (Merom+Crestline+ICH8M)

Size

Document Number

Date: Sheet of

Schematic Modify

Tuesday, July 31, 2007

Rev

0.4



SYSTEM POWER ON/OFF SEQUENCE

Power on/off sequence AC insert(First)

Power on sequence Power off sequence

SW OFF:

SW ON:

RTCVCC

5VLA

5VAUXON

3VA,5VA

1.5VA,2.5VA

PWR_SWIN#

RSMRST#

PWR_BTN#

SUSB#

SUSC#

1.8V

5VS,3VS

1.5VS,2.5VS

0.9VS_DIMM

VR_ON

+VCCP

VCCP_PWRGD

VCORE_GD

CPU_PWRGOOD

ALL_SYSPWRGD

PLT_RST#

5VA must be powered up before 3VA, or after 3VA within 0.7V

10ms

D D

C C

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Battery only Power on/off sequence

Power on sequence Power off sequence

RTCVCC

3VLA,5VLA

PWR_SWIN#

LATCH_ON

3VA,5VA

1.5VA,2.5VA

MRST#

PWR_BTN#

SUSB#

SUSC#

1.8V

5VS,3VS

1.5VS,2.5VS

0.9VS_DIMM

VR_ON

+VCCP

VCCP_PWRGD

VCORE_GD

CPU_PWRGOOD

ALL_SYSPWRGD

PLT_RST#

Power on/off sequence AC insert(S4)

Power on sequence Power off sequence

RTCVCC

B B

A A

3VLA,5VLA

5VAUXON

3VA,5VA

PWR_SWIN#

1.5VA,2.5VA

RSMRST#

PWR_BTN#

SUSB#

SUSC#

1.8V

5VS,3VS

1.5VS,2.5VS

0.9VS_DIMM

VR_ON

+VCCP

VCCP_PWRGD

VCORE_GD

CPU_PWRGOOD

ALL_SYSPWRGD

PLT_RST# PLT_RST#

RTCVCC

3VLA,5VLA

PWR_SWIN#

LATCH_ON

3VA,5VA

1.5VA,2.5VA

RSMRST#

PWR_BTN#

SUSB#

SUSC#

1.8V_DIMM

5VS,3VS

1.5VS,2.5VS

0.9VS_DIMM

VR_ON

+VCCP

VCCP_PWRGD

VCORE_GD

CPU_PWRGOOD

ALL_SYSPWRGD

Power on sequence Power off sequence

Suspend resume sequence(S3)

Inventec Corporation

5F, No. 35, Section 2, Zhongyang South Road

5F, No. 35, Section 2, Zhongyang South Road Beitou District, Taipei 11270, Taiwan

Beitou District, Taipei 11270, Taiwan

TEL:+886-2-2881-0721

Title

Z11D (Merom+Crestline+ICH8M)

Document Number

Size

Custom

Date: Sheet of

Tuesday, July 31, 2007

Timing Diagram

Rev

0.4

8. Layout Guideline :

Crestline DDRII Layout Guidelines

DDRII Signal Groups

Group Signal Name

D D

Data

M_A_DQ[63..0]/M_B_DQ[63..0] M_A_DM[7..0]/M_B_DM[7..0] M_A_DQS[7..0]/M_A_DQS#[7..0] M_B_DQS[7..0]/M_B_DQS#[7..0]

M_A_A[13..0]/M_B_A[13..0]Address M_A_BS[2..0]/M_B_BS[2..0] M_A_RAS#/M_B_RAS# M_A_CAS#/M_B_CAS# M_A_WE#/M_B_WE#

M_CS#[3..0]Control M_CKE[3..0] M_ODT[3..0]

Clock M_CLK_DDR[3..0]

M_CLK_DDR#[3..0] SA_RCVEN#/SB_RCVEN#FeedBack

CLK group : M_CLK_DDR[3..0],M_CLK_DDR#[3..0]

GMCH

P1P1L0

C C

Topology Reference Plane Single Ended Trace Impedance Differential Mode Impedance Minimum Serpentine Spacing Inner Layer : 12 mils

Package Length Range - P1 350 mils ~ 625 mils Min. Serpentine Spacing 25 mils Trace Length Limit - L0 (MS)

Trace Length Limit - L1 (SL) (Breakout length segment)

B B

Stub Length S1-Stub from via to SO-DIMM Max = 200 mils (Breakin) MB Length Limits - L0 + L1 + L2 + S1 Min = 500 mils

Maximim Via Count 2 (Per side) SCK to SCK# Length Matching Match total length to within 5 mils Clock to Clock Length Match

(Total Length) Breakout Exceptions (Reduce geometries for GMCH break-out region)

Breakin Exceptions (Reduce geometries for SO-DIMM break-in region)

Feedback group : SA_RCVENIN#],SA_RCVENOUT#,SB_RCVENIN#],SB_RCVENOUT#

These signals are routed internally on the GMCH package and don't require any routing on the MB. As a result, can be left as NC.

A A

4/4/12 7/4/16 8/5/15

Escape

L0L1L1

Breakout Breakin

L2L2S1

SLMS SL MS

Length Matching and Length Formulas

Signal Group Minimum Length Maximum Length

Control-to-Clock Command-to-Clock Strobe-to-Clock Data-to-Strobe

SO-DIMM

Differential Pair Point-to-Point Ground 42 +/- 15% 70 +/- 20%

Outer Layer : 15 mils

Nominal Trace Width : 5mils, 4mils Length Limit: Max = 50 mils (Escape) Min. Trace Spacing : 5mils, 4mils Length Limit: Max = 700 mils Nominal Trace Width : 4mils Min. Trace Spacng (pair) : 4mils Min. Trace Spacng (Other) : 12 mils

Max = 4000 mils Max = 4500 milsTotal Length - P1 + L0 + L1 + L2 + S1 Total Length for Channel A : X0

Total Length for Channel B : X1

Match Channel A clocks to X0 +/- 20mils Match Channel A clocks to X1 +/- 20mils

Inner Layer : 4/12 mils to other DDR2 Outer Layer : 5/15 mils to other DDR2

Max. breakout length is 500 mils CK to CK# spacing rule waived at

connector spacing of 15 mils to other DDR2

Max. breakin length is 200 mils

http://hobi-elektronika.net

Clock - 1.0" Clock - 1.0" Clock - 0.5" Strobe - 220mils

Clock - 0.0" Clock + 1.0" Clock + 1.0" Strobe - 180mils

Control group : SM_CKE[3..0],SM_CS#[3..0],SM_ODT[3..0]

GMCH

Escape

MS SL/MS

4/4/12

Breakout SL

7/4/16

8/5/15

SL/MS

Vtt

SO-DIMM

Topology Reference Plane Characteristic Trace Impedance Nominal Trace Width

Minimum CTRL Trace Spacing

Minimum Spacing to Other DDR2

Minimum Isolation Spacing to non-DDR2 Package Length P1 Trace Length Limit - L0 Trace Length Limit - L1 Stub Length S1-Stub from via to SO-DIMM MB Length Limits - L0 + L1 + L2 + S1 -

From GMCH ball to SO-DIMM pad Total Length - P1 + L0 + L1 + L2 + S1 From GMCH die to SO-DIMM pad

Parallel Termination Resistor 56 +/- 5% Maximim Via Count CTRL to SCK/SCK# Length Matching

(Total Length including package) Breakout Exceptions (Reduce geometries for GMCH break-out region)

Command group : SA_MA[13..0],SB_MA[13..0],SA_BS[2..0],SB_BS[2..0],SA_RAS#, SB_RAS#,SA_CAS#,SB_CAS#,SA_WE#,SB_WE#

GMCH

Escape

4/4

Breakout

Point-to-Point with parallel termination Ground 55 +/- 15% Inner Layer : 4 mils

Outer Layer : 5 mils Inner Layer : 8 mils

Outer Layer : 10 mils Inner Layer : 12 mils

Outer Layer : 15 mils 25 mils 750 mils +/- 200 mils Max = 50 mils (Escape) Max = 500 mils (Breakout) Max = 200 mils (Breakin) Min = 500 mils

Max = 4500 mils Max = 5000 mils

Max = 1500 milsTrace Length L3

3 (CLK-1.0") </= CTRL </= (CLK-0.0")

Inner Layer : 4 mils spacing allowed Outer Layer : 5 mils spacing allowed Max. breakout length is 500 mils

4/6,5/10

SL/MS

SL/MSMS SL

Vtt

SO-DIMM

Topology Reference Plane Characteristic Trace Impedance Nominal Trace Width

Minimum CMD Bus Trace Spacing

Minimum Spacing to Other DDR2

Minimum Isolation Spacing to non-DDR2 Package Length P1 Trace Length Limit - L0 Trace Length Limit - L1 Stub Length S1-Stub from via to SO-DIMM MB Length Limits - L0 + L1 + L2 + S1 -

From GMCH ball to SO-DIMM pad Total Length - P1 + L0 + L1 + L2 + S1 From GMCH die to SO-DIMM pad Trace Length L3

Parallel Termination Resistor Maximim Via Count CTRL to SCK/SCK# Length Matching

(Total Length including package) Breakout Exceptions (Reduce geometries for GMCH break-out region)

Point-to-Point with parallel termination Ground 55 +/- 15% Inner Layer : 4 mils

Outer Layer : 5 mils Inner Layer : 6 mils

Outer Layer : 10 mils Inner Layer : 12 mils

Outer Layer : 15 mils 25 mils 750 mils +/- 350 mils Max = 50 mils (Escape) Max = 500 mils (Breakout) Max = 200 mils (Breakin) Min = 500 mils

Max = 4500 mils Max = 5000 mils

Max = 1500 mils 56 +/- 5% 3 (CLK-1.0") </= CMD </= (CLK+1.0")

Inner Layer : 4 mils spacing allowed Outer Layer : 5 mils spacing allowed Max. breakout length is 500 mils

Data group : SA_DQ[63..0],SB_DQ[63..0],SA_DM[7..0],SB_DM[7..0]

4/4

Breakout

4/6

GMCH

Escape

P1 L0

MS SLSL MS

Topology Reference Plane Characteristic Trace Impedance Nominal Trace Width

Minimum DQ Bus Trace Spacing

Minimum Serpentine Spacing Same as DQ-to-DQ routing Minimum Spacing to Other DDR2

Minimum Isolation Spacing to non-DDR2 Package Length P1 Trace Length Limit - L0 Trace Length Limit - L1 Stub Length S1-Stub from via to SO-DIMM MB Length Limits - L0 + L1 + L2 + S1 -

From GMCH ball to SO-DIMM pad Total Length - P1 + L0 + L1 + L2 + S1 From GMCH die to SO-DIMM pad Trace Length L3

Maximim Via Count DQ/DM to DQS Length Matching

(Total Length including package)

Breakout Exceptions (Reduce geometries for GMCH break-out region)

Data Strobe group : SA_DQS[7..0],SA_DQS[7..0]#,SB_DQS[7..0],SB_DQS[7..0]#

4/4/12

GMCH

P1 P1

Topology Reference Plane Single Ended Trace Impedance Differential Mode Impedance Nominal Trace Width

Nominal DQS to DQS# Spacing (edge to edge)

Minimum Serpentine Spacing

Minimum Spacing to Other DDR2

Minimum Isolation Spacing to non-DDR2 Package Length Range - P1 Trace Length Limit - L0 Trace Length Limit - L1 Stub Length S1-Stub from via to SO-DIMM MB Length Limits - L0 + L1 + L2 + S1 -

From GMCH ball to SO-DIMM pad Total Length - P1 + L0 + L1 + L2 + S1 From GMCH die to SO-DIMM pad Maximim Via Count

DQS to DQS# Length Matching Clock to Clock Length Match

(Total Length include package) Breakout Exceptions (Reduce geometries for GMCH break-out region)

Breakin Exceptions (Reduce geometries for SO-DIMM break-in region)

Escape

L0 L0

4/4/8

Breakout SL SL MS

SO-DIMM

Point-to-Point Ground 55 +/- 15% Inner Layer : 4 mils

Outer Layer : 5 mils Inner Layer : 6 mils

Outer Layer : 8 mils

Inner Layer : 12 mils Outer Layer : 15 mils

25 mils 750 mils +/- 350 mils Max = 50 mils (Escape) Max = 500 mils (Breakout) Max = 200 mils (Breakin) Min = 500 mils

Max = 4500 mils Max = 5000 mils

Max = 1500 mils 2 Match DQ/DM to [SDQS - 200mils]

+/- 20mils, per byte lane Inner Layer : 4 mils spacing allowed

Outer Layer : 5 mils spacing allowed Max. breakout length is 500 mils

SO-DIMM

5/5/10

S1 S1

Breakin

Differential Pair Point-to-Point Ground 55 +/- 15% 85 +/- 20% Inner Layer : 4 mils

Outer Layer : 5 mils Inner Layer : 4 mils

Outer Layer : 5 mils Inner Layer : 12 milsMinimum DQS to DQ Spacing

Outer Layer : 15 mils Inner Layer : 8 mils

Outer Layer : 10 mils Inner Layer : 12 mils

Outer Layer : 15 mils 25 mils 750 mils +/- 350 mils Max = 50 mils (Escape) Max = 500 mils (Breakout) Max = 200 mils (Breakin) Min = 500 mils

Max = 4500 mils Max = 5000 mils

2 (Per side) Match total length to within 5 mils (CLK-0.5") </= DQS </= (CLK+1.0")

Inner Layer : 8 mils to other DDR2 Outer Layer : 10 mils to other DDR2 Max. breakout length is 500 mils

DQS to DQS# spacing rule waived at connector spacing of 10 mils to other DDR2

Max. breakin length is 200 mils

Inventec Corporation

5F, No. 35, Section 2, Zhongyang South Road

5F, No. 35, Section 2, Zhongyang South Road Beitou District, Taipei 11270, Taiwan

Beitou District, Taipei 11270, Taiwan

TEL:+886-2-2881-0721

Title

Z11D (Merom+Crestline+ICH8M)

Size

Document Number

DDRII Layout Guideline

Date: Sheet of

Tuesday, July 31, 2007

Date: Sheet of

Tuesday, July 31, 2007

Date: Sheet of

Tuesday, July 31, 2007

Rev

0.4

CN8A

H_A#3 H_A#4 H_A#5 H_A#6 H_A#7 H_A#8 H_A#9 H_A#10 H_A#11 H_A#12 H_A#13 H_A#14

H_A#[35..3]

H_A#15 H_A#16

H_REQ#0 H_REQ#1 H_REQ#2 H_REQ#3 H_REQ#4

H_A#17 H_A#18 H_A#19 H_A#20 H_A#21 H_A#22 H_A#23 H_A#24 H_A#25 H_A#26 H_A#27 H_A#28 H_A#29 H_A#30 H_A#31 H_A#32 H_A#33 H_A#34 H_A#35

4 4

3 3

H_A#[35..3]<12>

H_ADSTB#0<12>

H_REQ#[4..0]<12>

H_ADSTB#1<12>

H_A20M#<21>

H_FERR#<21>

H_IGNNE#<21>

H_STPCLK#<21>

H_INTR<21>

H_NMI<21>

H_SMI#<21>

H_A#[35..3]

H_REQ#[4..0]

H_A#[35..3]<12>

No stub on H_STPCLK test point

CN8A

http://hobi-elektronika.net

A[3]#

A[4]#

A[5]#

A[6]#

A[7]#

A[8]#

A[9]#

A[10]#

A[11]#

A[12]#

A[13]#

A[14]#

A[15]#

A[16]#

ADSTB[0]#

REQ[0]#

REQ[1]#

REQ[2]#

REQ[3]#

REQ[4]#

A[17]#

A[18]#

A[19]#

A[20]#

A[21]#

A[22]#

A[23]#

A[24]#

A[25]#

A[26]#

A[27]#

A[28]#

A[29]#

A[30]#

A[31]#

A[32]#

AA4

A[33]#

AB2

A[34]#

AA3

A[35]#

ADSTB[1]#

A20M#

FERR#

IGNNE#

STPCLK#

LINT0

LINT1

SMI#

RSVD[01]

RSVD[02]

RSVD[03]

RSVD[04]

RSVD[05]

RSVD[06]

RSVD[07]

D22

RSVD[08]

RSVD[09]

RSVD[10]

SCKT CPU 478P PZ4782K-274M-41 FOXCONN

6026B0056801

Rout to TP via and place gnd via w/in 100mils

A#[32-39], APM#[0-1]:Leave escape routing on for future functionality

ICH

ADS#

ADDR GROUP 0 ADDR GROUP 1

BNR#

BPRI#

DEFER#

DRDY# DBSY#

BR0#

IERR#

INIT#

LOCK#

CONTROL

RESET#

RS[0]# RS[1]# RS[2]#

TRDY#

HITM#

BPM[0]# BPM[1]# BPM[2]# BPM[3]#

PRDY# PREQ#

TRST#

DBR#

XDP/ITP SIGNALS

THERMAL

PROCHOT#

THERMDA THERMDC

THERMTRIP#

H CLK

BCLK[0] BCLK[1]

RESERVED

H1 E2 G5

H5 F21 E1

H_IERR#

D20 B3

H4 C1

F3 F4 G3 G2

HIT#

E4 AD4

AD3 AD1 AC4 AC2 AC1 AC5

TCK

AA6

TDI

AB3

TDO

AB5

TMS

AB6 C20

D21 A24 B25

A22 A21

R350 56-5%-1/16W-0402R350 56-5%-1/16W-0402

R290 SHORT-0402-5MILR290 SHORT-0402-5MIL

XDP_BPM#5 XDP_TCK XDP_TDI XDP_TDO XDP_TMS XDP_TRST# XDP_DBRESET#

H_ADS# <12> H_BNR# <12>

H_BPRI# <12> H_DEFER# <12>

H_DRDY# <12> H_DBSY# <12>

H_BREQ#0 <12>

H_INIT# <21>

H_LOCK# <12>

H_CPURST# <12> H_RS#0 <12> H_RS#1 <12> H_RS#2 <12> H_TRDY# <12>

H_HIT# <12> H_HITM# <12>

1.05VS<9,12,15,16,18,21,24,39>

R351

R351 75-1%-1/16W-0402

75-1%-1/16W-0402

1.05VS <9,12,15,16,18,21,24,39>

R296

54.9-1%-1/16W-0402_NU

H_PROCHOT# <10> H_THERMDA <11> H_THERMDC <11>

PM_THRMTRIP# <13,21>

CLK_CPU_BCLK <18> CLK_CPU_BCLK# <18>

1.05VS <9,12,15,16,18,21,24,39>

Topology : FERR#

VCCP

CPU

CPU IMVP6

Rtt

ICH7m

VCCP L1

Rtt

L2 0" - 3.0" Micro-strip0.5" - 12"

0.5" - 12"L1

0" - 3.0"

VCCP

Rtt

L2+L1 L3 Strip-line

0.5" - 6.5"

Topology : PWRGOOD

CPU

ICH7m

Transmission Line

0.5" - 12"

Micro-strip

0.5" - 12" Strip-line

Topology : INTR , NMI , A20M# , DPSLP# , IGNNE# , INIT# , SMI# , STPCLK#

Transmission Line

L1CPU ICH7m

Topology : THERMTRIP#

GMCHL2CPU ICH8m

0.5" - 12" Micro-strip Strip-line

0.5" - 12"

VCCP

RttL1 L4

Rtt

L1 L2 1" - 12" 1" - 12" 1" - 6"

Rtt Transmission Line 56 +/-5% 56 +/-5%

Strip-line

L3 L4

0.5" - 6.5"

0" - 3.0" 0" - 3.0"

0.5" - 6.5"

Topology : CPUSLP#

Topology : RESET#

GMCH

L1+L3

1" - 6" 0" - 3.0"

1" - 12" 1" - 12"

0" - 3.0" 0" - 3.0"

Rtt Transmission LineL2L1

Micro-strip70 +/-5%

70 +/-5%0.5" - 6.5"

L1CPU

GMCH

Rss 24 +/-5% 24 +/-5%

0.5" - 12"

L1 1" - 6" 1" - 6"

Transmission Line Micro-strip Strip-line

Transmission LineCPU Micro-strip Strip-line

Rtt 56 +/-5% 56 +/-5%

Transmission LineL4 Micro-strip Strip-line0" - 3.0"

Should be connect to ICH8 and Calistoga without T-ing(no stub)

XDP P/U & P/D

XDP_DBRESET#

XDP_TMS XDP_TDI XDP_BPM#5

XDP_TRST# XDP_TCK

R338 1K-5%-1/16W-0402R338 1K-5%-1/16W-0402

R297 39.2-1%-1/16W-0402R297 39.2-1%-1/16W-0402

R311 150-5%-1/16W-0402R311 150-5%-1/16W-0402

R298 54.9-1%-1/16W-0402R298 54.9-1%-1/16W-0402 R312 649-1%-1/16W-0402R312 649-1%-1/16W-0402

R299 27-5%-1/10W-0603R299 27-5%-1/10W-0603

7/4 MODIFY

3VS <10,11,13,16,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,39,40,41,43,44>

1.05VS <9,12,15,16,18,21,24,39>

FSB Common Clock Signal Layout Guide :

H_ADS# , H_BNR# , H_BPRI# , H_BR0# , H_DBSY# , H_DEFER# , H_DPWR# , H_DRDY# , H_HIT# , H_HITM# , H_LOCK# ,H_ RS#[2..0] , H_TRDY# , H_CPURST#.

Transmission Line Type Total Trace Length Normal Impedance Spacing (mils)

Strip-line(Int. Layer)

Micro-strip(Ext. Layer)

1.0 ~ 6.5 inch

55+/-15%

W=4 & S=8 mils

W=5 & S=10 mils

H_D#[63..0]<12>

2 2

H_DSTBN#0<12>

H_DSTBP#0<12>

H_DINV#0<12>

H_D#[63..0]<12>

1.05VS<9,12,15,16,18,21,24,39>

R377

1K-1%-1/16W-0402

R378

2K-1%-1/16W-0402

1 1

2K-1%-1/16W-0402

H_DSTBN#1<12>

H_DSTBP#1<12>

H_DINV#1<12>

CLK_BSEL0<18> CLK_BSEL1<18> CLK_BSEL2<18>

Zo=55ohm, 0.5" max for GTLREF, Space any other switch signals away from GTLREF with a minimum of 25mils.

Don't allow the GTLREF routing to create splits or discontinuities in the reference planes of the FSB signals

H_D#[63..0]

1K-5%-1/16W-0402_NU

1K-5%-1/16W-0402_NU R115

R115 R114

R114

1K-5%-1/16W-0402_NU

1K-5%-1/16W-0402_NU C435

C435

0.1uF 10V 10% 0402 X5R_NU

R118 0-5%-1/16W-0402R118 0-5%-1/16W-0402 R119 0-5%-1/16W-0402_NUR119 0-5%-1/16W-0402_NU

H_TEST2

CN8B

H_D#0

E22

H_D#1 H_D#2 H_D#3 H_D#4 H_D#5 H_D#6 H_D#7 H_D#8 H_D#9 H_D#10 H_D#11 H_D#12 H_D#13 H_D#14 H_D#15

H_D#16 H_D#17 H_D#18 H_D#19 H_D#20 H_D#21 H_D#22 H_D#23 H_D#24 H_D#25 H_D#26 H_D#27 H_D#28 H_D#29 H_D#30 H_D#31

GTLREF COMP0 H_TEST1

H_TEST4

D[0]#

F24

D[1]#

E26

D[2]#

AD26

AF26

G22

F23

G25

E25

E23

K24

G24

J24

J23

H22

F26

K22

H23

J26

H26

H25

N22

K25

P26

R23

L23

M24

L22

M23

P25

P23

P22

T24

R24

L25

T25

N25

L26

M26

N24

C23

D25

C24

AF1

A26

B22

B23

C21

DATA GRP 0

D[3]# D[4]# D[5]# D[6]# D[7]# D[8]# D[9]# D[10]# D[11]# D[12]# D[13]# D[14]# D[15]# DSTBN[0]# DSTBP[0]# DINV[0]#

D[16]# D[17]# D[18]# D[19]#

DATA GRP 1

D[20]# D[21]# D[22]# D[23]# D[24]# D[25]# D[26]# D[27]# D[28]# D[29]# D[30]# D[31]# DSTBN[1]# DSTBP[1]# DINV[1]#

GTLREF

MISC

TEST1 TEST2 TEST3 TEST4 TEST5 TEST6

BSEL[0] BSEL[1] BSEL[2]

SCKT CPU 478P PZ4782K-274M-41 FOXCONN

6026B0056801

D[32]# D[33]# D[34]# D[35]# D[36]# D[37]# D[38]# D[39]# D[40]# D[41]# D[42]# D[43]# D[44]#

DATA GRP 2DATA GRP 3

D[45]# D[46]#

D[47]# DSTBN[2]# DSTBP[2]#

DINV[2]#

D[48]#

D[49]#

D[50]#

D[51]#

D[52]#

D[53]#

D[54]#

D[55]#

D[56]#

D[57]#

D[58]#

D[59]#

D[60]#

D[61]#

D[62]#

D[63]# DSTBN[3]# DSTBP[3]#

DINV[3]# COMP[0]

COMP[1] COMP[2] COMP[3]

DPRSTP#

DPSLP#

DPWR#

PWRGOOD

SLP#

Y22 AB24 V24 V26 V23 T22 U25 U23 Y25 W22 Y23 W24 W25 AA23 AA24 AB25 Y26 AA26 U22

AE24 AD24 AA21 AB22 AB21 AC26 AD20 AE22 AF23 AC25 AE21 AD21 AC22 AD23 AF22 AC23 AE25 AF24 AC20

R26 U26 AA1 Y1

E5 B5 D24 D6 D7 AE6

PSI#

H_D#[63..0] H_D#32 H_D#33 H_D#34 H_D#35 H_D#36 H_D#37 H_D#38 H_D#39 H_D#40 H_D#41 H_D#42 H_D#43 H_D#44 H_D#45 H_D#46 H_D#47

H_D#[63..0] H_D#48 H_D#49 H_D#50 H_D#51 H_D#52 H_D#53 H_D#54 H_D#55 H_D#56 H_D#57 H_D#58 H_D#59 H_D#60 H_D#61 H_D#62 H_D#63

R372 27.4-1%-1/16W-0402R372 27.4-1%-1/16W-0402

COMP1

R373 54.9-1%-1/16W-0402R373 54.9-1%-1/16W-0402

COMP2

R295 27.4-1%-1/16W-0402R295 27.4-1%-1/16W-0402

COMP3

R294 54.9-1%-1/16W-0402R294 54.9-1%-1/16W-0402

H_DPRSTP# <10,13,21> H_DPSLP# <21> H_DPWR# <12> H_PWRGD <21> H_CPUSLP# <12> PSI# <10>

H_PWRGD rise time : Max : 15ns

H_D#[63..0] <12>

H_DSTBN#2 <12> H_DSTBP#2 <12> H_DINV#2 <12>

H_D#[63..0] <12>

H_DSTBN#3 <12> H_DSTBP#3 <12> H_DINV#3 <12>

Comp0,2 connect with Zo=27.4ohm, make trace length shorter than 0.5" and width is 18mils.

Comp1,3 connect with Zo=55ohm, make trace length shorter than 0.5" and width is 5mils

FSB Source Synchronous Data Length Variation and Strobe Matching Requirements :

Signals Name

H_D#[15..0] , H_DINV#0 H_D#[31..16] , H_DINV#1 H_D#[47..32] , H_DINV#2 H_D#[63..48] , H_DINV#3

FSB Source Synchronous Data Signal Routing Topology#1 :

Signal Name

H_DINV#[3..0] H_DATA#[63..0] H_DSTBN#[3..0] H_DSTBP#[3..0]

FSB Source Synchronous Address Length Variation and Strobe Matching Requirements :

H_A#[16..3] , H_REQ#[4..0]

H_A#[35..17]

Signals Matching

+/- 100 mils +/- 100 mils +/- 100 mils

Transmission Line Type

Strip-line Strip-line Strip-line Strip-line

Signals MatchingSignals Name

+/- 200 mils

Strobes associated with the group Strobe-to-Strobe Complement Matching

H_DSTBP#0, H_DSTBN#0 H_DSTBP#1, H_DSTBN#1 H_DSTBP#2, H_DSTBN#2 H_DSTBP#3, H_DSTBN#3

Total Trace Length

0.5 ~ 5.5 inch

Strobes associated with the group

H_ADSTB#0+/- 200 mils H_ADSTB#1

Normal Impedance

55+/-15% 55+/-15% 55+/-15% 55+/-15%

+/- 25 mils+/- 100 mils +/- 25 mils +/- 25 mils +/- 25 mils

Width & Spacing (mils) Data-to-Data,Strobe-to-strobe Strobe-to-Data

W=4 & S=8 mils W=4 & S=8 mils W=4 & S=4 mils W=4 & S=4 mils

Strobe to Assoc. Address Signal Matching

+/- 200 mils +/- 200 mils

*** No length matching requirements exist between H_ADSTB#0 and H_ADSTB#1

FSB Source Synchronous Address Signal Routing :

Signal Name

H_A#[35..3] H_REQ#[4..0] H_ADSTB#[1..0]

Transmission Line Type

Strip-line Strip-line

Total Trace Length Normal Impedance

0.5 ~ 6.5 inch

55+/-15% 55+/-15% 55+/-15%Strip-line

Width & Spacing (mils)

W=4 & S=8 mils W=4 & S=8 mils W=4 & S=12 mils

Inventec Corporation

5F, No. 35, Section 2, Zhongyang South Road

5F, No. 35, Section 2, Zhongyang South Road Beitou District, Taipei 11270, Taiwan

Beitou District, Taipei 11270, Taiwan

TEL:+886-2-2881-0721

Title

Z11D (Merom+Crestline+ICH8M)

Size

Document Number

Merom Processor(1/2)

Date: Sheet of

Tuesday, July 31, 2007

Date: Sheet of

Tuesday, July 31, 2007

Date: Sheet of

Tuesday, July 31, 2007

N/A N/A W=4 & S=12 mils W=4 & S=12 mils

Rev

0.4

http://hobi-elektronika.net

Place these inside socket cavity on L8 (North side secondary)

4 4

3 3

VCORE_CPU<10>

Place these inside socket cavity on L1 (North side Primary)

C95

C97

C98

C96

10uF 6.3V 10% 0805 X5R

C385 10uF 6.3V 10% 0805 X5RC385 10uF 6.3V 10% 0805 X5R

C360 10uF 6.3V 10% 0805 X5RC360 10uF 6.3V 10% 0805 X5R

C366 10uF 6.3V 10% 0805 X5RC366 10uF 6.3V 10% 0805 X5R

C386 10uF 6.3V 10% 0805 X5RC386 10uF 6.3V 10% 0805 X5R

C99

10uF 6.3V 10% 0805 X5R

C384 10uF 6.3V 10% 0805 X5RC384 10uF 6.3V 10% 0805 X5R

North side secondary

C367 T330uF 2V 9m 7343 PANASONIC_ NU

C138 T330uF 2V 9m 7343 PANASONIC_NU

C131 T330uF 2V 9m 7343 PANASONIC

2 2

Place these inside socket cavity on L8 (South side secondary)

C123 10uF 6.3V 10% 0805 X5RC123 10uF 6.3V 10% 0805 X5R

C124 10uF 6.3V 10% 0805 X5RC124 10uF 6.3V 10% 0805 X5R

C125 10uF 6.3V 10% 0805 X5RC125 10uF 6.3V 10% 0805 X5R

C126 10uF 6.3V 10% 0805 X5RC126 10uF 6.3V 10% 0805 X5R

Place these inside socket cavity on L1 (South side Primary)

C364 10uF 6.3V 10% 0805 X5RC364 10uF 6.3V 10% 0805 X5RC122 10uF 6.3V 10% 0805 X5RC122 10uF 6.3V 10% 0805 X5R

C365 10uF 6.3V 10% 0805 X5RC365 10uF 6.3V 10% 0805 X5R

C361 10uF 6.3V 10% 0805 X5RC361 10uF 6.3V 10% 0805 X5R

C363 10uF 6.3V 10% 0805 X5RC363 10uF 6.3V 10% 0805 X5R

C362 10uF 6.3V 10% 0805 X5RC362 10uF 6.3V 10% 0805 X5R

South side secondary

C118 T330uF 2V 9m 7343 PANASONIC

C359 T330uF 2V 9m 7343 PANASONIC

C375 T330uF 2V 9m 7343 PANASONIC

CN8C

VCC[001]

VCC[068]

VCC[002]

VCC[069]

VCC[003]

VCC[070]

VCC[004]

VCC[071]

VCC[005]

VCC[072]

VCC[006]

VCC[073]

VCC[007]

VCC[074]

VCC[008]

VCC[075]

VCC[009]

VCC[076]

VCC[010]

VCC[077]

VCC[011]

VCC[078]

VCC[012]

VCC[079]

VCC[013]

VCC[080]

VCC[014]

VCC[081]

VCC[015]

VCC[082]

VCC[016]

VCC[083]

VCC[017]

VCC[084]

VCC[018]

VCC[085]

VCC[019]

VCC[086]

VCC[020]

VCC[087]

VCC[021]

VCC[088]

VCC[022]

VCC[089]

VCC[023]

VCC[090]

VCC[024]

VCC[091]

VCC[025]

VCC[092]

VCC[026]

VCC[093]

VCC[027]

VCC[094]

VCC[028]

VCC[095]

VCC[029]

VCC[096]

VCC[030]

VCC[097]

VCC[031]

VCC[098]

VCC[032]

VCC[099]

VCC[033]

VCC[100] VCC[034] VCC[035]

VCCP[01] VCC[036]

VCCP[02] VCC[037]

VCCP[03] VCC[038]

VCCP[04] VCC[039]

VCCP[05] VCC[040]

VCCP[06] VCC[041]

VCCP[07] VCC[042]

VCCP[08] VCC[043]

VCCP[09] VCC[044]

VCCP[10] VCC[045]

VCCP[11] VCC[046]

VCCP[12] VCC[047]

VCCP[13] VCC[048]

VCCP[14] VCC[049]

VCCP[15] VCC[050]

VCCP[16] VCC[051] VCC[052]

VCCA[01] VCC[053]

VCCA[02] VCC[054] VCC[055]

VID[0]

VCC[056]

VID[1]

VCC[057]

VID[2]

VCC[058]

VID[3]

VCC[059]

VID[4]

VCC[060]

VID[5]

VCC[061]

VID[6] VCC[062] VCC[063] VCC[064]

VCCSENSE VCC[065] VCC[066] VCC[067]

VSSSENSE

SCKT CPU 478P PZ4782K-274M-41 FOXCONN

6026B0056801

AA10 AA12 AA13 AA15 AA17 AA18 AA20

AC10 AB10 AB12 AB14 AB15 AB17 AB18

A9 A10 A12 A13 A15 A17 A18 A20

B9 B10 B12 B14 B15 B17 B18 B20

C9 C10 C12 C13 C15 C17 C18

D9 D10 D12 D14 D15 D17 D18

E9 E10 E12 E13 E15 E17 E18 E20

F9 F10 F12 F14 F15 F17 F18 F20 AA7 AA9

AB9

AB20 AB7 AC7 AC9 AC12 AC13 AC15 AC17 AC18 AD7 AD9 AD10 AD12 AD14 AD15 AD17 AD18 AE9 AE10 AE12 AE13 AE15 AE17 AE18 AE20 AF9 AF10 AF12 AF14 AF15 AF17 AF18 AF20

R335 SHORT-0603-PWRR335 SHORT-0603-PWR

G21

R310 SHORT-0603-PWRR310 SHORT-0603-PWR

V6 J6 K6 M6 J21 K21 M21 N21 N6 R21 R6 T21 T6 V21 W21

B26 C26

AD6 AF5 AE5 AF4 AE3 AF3 AE2

AF7

AE7

H_VID0 <10> H_VID1 <10> H_VID2 <10> H_VID3 <10> H_VID4 <10> H_VID5 <10> H_VID6 <10>

Route VCCSENSE and VSSSENSE traces at 27.4 ohms with 50mil spacing. Place PU and PD within 1 inch of CPU

C388 0.1uF 10V 10% 0402 X7RC388 0.1uF 10V 10% 0402 X7R

C393 0.1uF 10V 10% 0402 X7RC393 0.1uF 10V 10% 0402 X7R

C395 0.1uF 10V 10% 0402 X7RC395 0.1uF 10V 10% 0402 X7R

Close to CPU pin B26

C155

0.01uF 16V 10% 0402 X7R

VCORE_CPU<10>

R305

R305 100-1%-1/16W-0402

100-1%-1/16W-0402

R308

R308 100-1%-1/16W-0402

100-1%-1/16W-0402

C356 0.1uF 10V 10% 0402 X7RC356 0.1uF 10V 10% 0402 X7R

C357 0.1uF 10V 10% 0402 X7RC357 0.1uF 10V 10% 0402 X7R

C358 0.1uF 10V 10% 0402 X7RC358 0.1uF 10V 10% 0402 X7R

20mil

160mil

1.05VS <8,12,15,16,18,21,24,39>

C406

C406 T220uF 2V 15m 7343 PANASONIC

T220uF 2V 15m 7343 PANASONIC

Place these inside socket cavity on L8 (North side secondary)

1.5VS<16,24,39,40,43,44>

C157

C157 10uF 6.3V 10% 0805 X5R

10uF 6.3V 10% 0805 X5R

VCCSENSE <10> VSSSENSE <10>

18mil 7mil space

CN8D

VSS[001]

VSS[002]

A11

VSS[003]

A14

VSS[004]

A16

VSS[005]

A19

VSS[006]

A23

VSS[007]

AF2

VSS[008]

VSS[009]

VSS[010]

B11

VSS[011]

B13

VSS[012]

B16

VSS[013]

B19

VSS[014]

B21

VSS[015]

B24

VSS[016]

VSS[017]

VSS[018]

C11

VSS[019]

C14

VSS[020]

C16

VSS[021]

C19

VSS[022]

VSS[023]

C22

VSS[024]

C25

VSS[025]

VSS[026]

VSS[027]

VSS[028]

D11

VSS[029]

D13

VSS[030]

D16

VSS[031]

D19

VSS[032]

D23

VSS[033]

D26

VSS[034]

VSS[035]

VSS[036]

VSS[037]

E11

VSS[038]

E14

VSS[039]

E16

VSS[040]

E19

VSS[041]

E21

VSS[042]

E24

VSS[043]

VSS[044]

VSS[045]

F11

VSS[046]

F13

VSS[047]

F16

VSS[048]

F19

VSS[049]

VSS[050]

F22

VSS[051]

F25

VSS[052]

VSS[053]

VSS[054]

G23

VSS[055]

G26

VSS[056]

VSS[057]

VSS[058]

H21

VSS[059]

H24

VSS[060]

VSS[061]

VSS[062]

J22

VSS[063]

J25

VSS[064]

VSS[065]

VSS[066]

K23

VSS[067]

K26

VSS[068]

VSS[069]

VSS[070]

L21

VSS[071]

L24

VSS[072]

VSS[073]

VSS[074]

M22

VSS[075]

M25

VSS[076]

VSS[077]

VSS[078]

N23

VSS[079]

N26

VSS[080]

VSS[081]

SCKT CPU 478P PZ4782K-274M-41 FOXCONN

6026B0056801

VSS[082] VSS[083] VSS[084] VSS[085] VSS[086] VSS[087] VSS[088] VSS[089] VSS[090] VSS[091] VSS[092] VSS[093] VSS[094] VSS[095] VSS[096] VSS[097] VSS[098] VSS[099] VSS[100] VSS[101] VSS[102] VSS[103] VSS[104] VSS[105] VSS[106] VSS[107] VSS[108] VSS[109] VSS[110] VSS[111] VSS[112] VSS[113] VSS[114] VSS[115] VSS[116] VSS[117] VSS[118] VSS[119] VSS[120] VSS[121] VSS[122] VSS[123] VSS[124] VSS[125] VSS[126] VSS[127] VSS[128] VSS[129] VSS[130] VSS[131] VSS[132] VSS[133] VSS[134] VSS[135] VSS[136] VSS[137] VSS[138] VSS[139] VSS[140] VSS[141] VSS[142] VSS[143] VSS[144] VSS[145] VSS[146] VSS[147] VSS[148] VSS[149] VSS[150] VSS[151] VSS[152] VSS[153] VSS[154] VSS[155] VSS[156] VSS[157] VSS[158] VSS[159] VSS[160] VSS[161] VSS[162] VSS[163]

P6 P21 P24 R2 R5 R22 R25 T1 T4 T23 T26 U3 U6 U21 U24 V2 V5 V22 V25 W1 W4 W23 W26 Y3 Y6 Y21 Y24 AA2 AA5 AA8 AA11 AA14 AA16 AA19 AA22 AA25 AB1 AB4 AB8 AB11 AB13 AB16 AB19 AB23 AB26 AC3 AC6 AC8 AC11 AC14 AC16 AC19 AC21 AC24 AD2 AD5 AD8 AD11 AD13 AD16 AD19 AD22 AD25 AE1 AE4 AE8 AE11 AE14 AE16 AE19 AE23 AE26 A2 AF6 AF8 AF11 AF13 AF16 AF19 AF21 A25 AF25

1 1

Inventec Corporation

5F, No. 35, Section 2, Zhongyang South Road

5F, No. 35, Section 2, Zhongyang South Road Beitou District, Taipei 11270, Taiwan

Beitou District, Taipei 11270, Taiwan

TEL:+886-2-2881-0721

Title

Z11D (Merom+Crestline+ICH8M)

Size

Document Number

Date: Sheet of

Merom Processor(2/2)

Tuesday, July 31, 2007

Rev

0.4

http://hobi-elektronika.net

D D

5VA<24,28,30,36,38,39,40,41>

R72

10-5%-1/10W-0603

8770VCC

C52

2.2uF 10V 10% 0805 X5R

3VS <8,11,13,16,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,39,40,41,43,44>

R30

2.2K-5%-1/16W-0402

C C

B B

VCORE_GD<13,23> CLK_EN#<23>

H_VID0<9> H_VID1<9> H_VID2<9> H_VID3<9> H_VID4<9> H_VID5<9> H_VID6<9>

R65 SHORT-0402-5MILR65 SHORT-0402-5MIL R63 SHORT-0402-5MILR63 SHORT-0402-5MIL R61 SHORT-0402-5MILR61 SHORT-0402-5MIL R58 SHORT-0402-5MILR58 SHORT-0402-5MIL R46 SHORT-0402-5MILR46 SHORT-0402-5MIL R44 SHORT-0402-5MILR44 SHORT-0402-5MIL R41 SHORT-0402-5MILR41 SHORT-0402-5MIL C42

PSI#<8>

VR_ON<31>

H_DPRSTP#<8,13,21>

PM_DPRSLPVR<13,23>

8770GND

8770VCC

H_PROCHOT#<8>

R30

R28 0-5%-1/16W-0402R28 0-5%-1/16W-0402 R39 0-5%-1/16W-0402R39 0-5%-1/16W-0402 R33 0-5%-1/16W-0402R33 0-5%-1/16W-0402 R36 0-5%-1/16W-0402R36 0-5%-1/16W-0402

C29

470pF 50V 10% 0402 X7R

71.5K 1% 1/10W 0603

71.5K 1% 1/10W 0603 R24

R24

C30

0.22uF 10V 10% 0603 X7R

R26

R26 10K-5%-1/16W-0402

10K-5%-1/16W-0402

0-5%-1/16W-0402

0-5%-1/16W-0402 R27

R27

TP6TP6

R29

2.2K-5%-1/16W-0402

8770REF

8770GND

VCC

PWRGD

CLKEN

PSI

SHDN

DPRSTP

DPRSLPVR

CCV

TIME

REF

GND

THRM

VRHOT

POUT

MAX8770GTL+ TQFN 40P MAXIM

6019B0130201

8770GND

R292

SHORT-0402-40MIL

TON

VDD

BST1

LX1 DH1 DL1

PGND1

CCI

GNDS

CSN1 CSP1

CSP2 CSN2

DH2 DL2 LX2

BST2

PGND2

C64

C64 10uF 6.3V 10% 0805 X5R

10uF 6.3V 10% 0805 X5R

R25

R25 200K 1% 1/16W 0402

200K 1% 1/16W 0402

R71 2.2-5%-1/10W-0603R71 2.2-5%-1/10W-0603

30 28 29 26 27

3.9K 1% 1/10W 0603

10K-5%-0603-NTC(NU)

5.11K-1%-1/10W-0603(NU)

5.11K-1%-1/10W-0603(NU) R31

R31

20K-1%-1/16W-0402

C31

470pF 50V 10% 0402 X7R

8770CSN1

8770CSP1

8770CSP2

8770CSN2

21 24 22

R69 2.2-5%-1/10W-0603R69 2.2-5%-1/10W-0603

20 23

R32

R16

R19

0.22uF 25V 10% 0603 X5R

0.22uF 25V 10% 0603 X5R C58

C58

100-1%-1/16W-0402

100-1%-1/16W-0402 R17

R17

C16

C16 1000pF 50V 10% 0402 X7R

1000pF 50V 10% 0402 X7R

8770GND

R286

C33

C33 1000pF 50V 10% 0402 X7R

1000pF 50V 10% 0402 X7R

8770GND

C56

0.22uF 25V 10% 0603 X5R

100-1%-1/16W-0402

FDMS8690 30V 19.8A 8P

789

Q16

FDS6676AS 30V 14.5A SO8

VCCSENSE <9>

VSSSENSE <9>

FDMS8690 30V 19.8A 8P

789

Q21

FDS6676AS 30V 14.5A SO8

Q19

R632

2.2-5%-1/10W-0603_NU

Q12

Q12 FDS6294 30V 13A SO8(NU)

FDS6294 30V 13A SO8(NU)

C676

1000pF 50V 10% 0603 X7R

FDS6676AS 30V 14.5A SO8

R628

2.2-5%-1/10W-0603_NU

C677

C677 1000pF 50V 10% 0603 X7R

1000pF 50V 10% 0603 X7R

8770CSP1

8770CSN1

FDS6294 30V 13A SO8(NU)

Q18

D S

FDS6676AS 30V 14.5A SO8

R629

Q20

D S

2.2-5%-1/10W-0603_NU

C678

C678 1000pF 50V 10% 0603 X7R

1000pF 50V 10% 0603 X7R

8770CSP2

8770CSN2

DCIN

R627

2.2-5%-1/10W-0603_NU

C675

C675 1000pF 50V 10% 0603 X7R

1000pF 50V 10% 0603 X7R

L38

0.36uH 30A PCMC104T-R36MN

R45

2.67K 1% 1/10W 0603

2.67K 1% 1/10W 0603 10K-5%-0603-NTC

10K-5%-0603-NTC R358

R358

R57

2.1K 1% 1/10W 0603

C42

0.22uF 10V 10% 0603 X7R

C329

0.22uF 10V 10% 0603 X7R(NU)

L51

0.36uH 30A PCMC104T-R36MN

R38

2.67K 1% 1/10W 0603

R43

2.1K 1% 1/10W 0603

C35

0.22uF 10V 10% 0603 X7R

C445

0.22uF 10V 10% 0603 X7R(NU)

DCIN<36,37,38,40,41,42>

C87

T5.6uF 25V 100m 3528 SANYO

DCIN<36,37,38,40,41,42>

10K-5%-0603-NTC

10K-5%-0603-NTC R366

R366

C321

T5.6uF 25V 100m 3528 SANYO

VCORE_CPU<9>

C13

C661

10UF 25V 10% 1206 X5R

AL 68uF 25V 20% 105C 6.3X6

10UF 25V 10% 1206 X5R

C662

0.1uF 25V -20%+80% 0402 Y5V

C663

0.1uF 25V -20%+80% 0402 Y5V

C692

C690

C693

0.1uF 25V -20%+80% 0402 Y5V

C691

0.1uF 25V -20%+80% 0402 Y5V

C706

2200PF 50V 10% X7R 0402

A A

Inventec Corporation

5F, No. 35, Section 2, Zhongyang South Road

5F, No. 35, Section 2, Zhongyang South Road Beitou District, Taipei 11270, Taiwan

Beitou District, Taipei 11270, Taiwan

TEL:+886-2-2881-0721

Title

Z11D (Merom+Crestline+ICH8M)

Size

Document Number

Custom

Date: Sheet of

CPU Core Power

Tuesday, July 31, 2007

Rev

0.4

4810

http://hobi-elektronika.net

D D

THERMAL SENSOR

3VS<8,10,13,16,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,39,40,41,43,44>

C456

R396

0.1uF 10V 10% 0402 X7R

10mil

THRM#<31>

C C

H_THERMDA<8>

H_THERMDC

H_THERMDC<8>

R396 10K-5%-1/16W-0402

10K-5%-1/16W-0402

C167

2200pF 50V 5% 0603 X7R

U13

VDD

DXP

DXN

ALERT#

THERM#4GND

G784P81U MSOP 8P

6019B0221201

SCLK

SDATA

THRMSCK

THRMSDAH_THERMDA

7 6 5

THRMSCK <31> THRMSDA <31>

10mil

B B

Fan control

Q33

FDN338P 20V 1.6A SOT3

5VS<24,25,27,28,31,32,33,34,36,39,44>

C304

10uF 10V 10% 0805 X5R

C304

10uF 10V 10% 0805 X5R

0.01uF 16V 10% 0402 X7R_NU

A A

FANCTL1<31>

C308

S D

1K-5%-1/16W-0402

R243

0-5%-1/16W-0402

R246

Q34

NPN PDTC144EU 50V 100mA SOT223

E C

30mil

5VS_FAN

R234

10-5%-1/16W-0402_NU

R234

10-5%-1/16W-0402_NU

C302

1uF 6.3V 10% 0402 X5R_NU

C302

1uF 6.3V 10% 0402 X5R_NU

FAN_TACH1<31>

C301

3300pF 50V 10% 0402 X7R_NU

C301

3300pF 50V 10% 0402 X7R_NU

CN18

CN 3P 3702-F03C-02R ENTERY

6012B0191701

Inventec Corporation

5F, No. 35, Section 2, Zhongyang South Road

5F, No. 35, Section 2, Zhongyang South Road Beitou District, Taipei 11270, Taiwan

Beitou District, Taipei 11270, Taiwan

TEL:+886-2-2881-0721

Title

Z11D (Merom+Crestline+ICH8M)

Size

Document Number

Date: Sheet of

CPU Thermal

Tuesday, July 31, 2007

Rev

0.4

http://hobi-elektronika.net

H H

1.05VS<8,9,15,16,18,21,24,39>

H_A#[35..3]

H_REQ#[4..0]

H_SWING H_RCOMP

H_SCOMP H_SCOMP#

H_D#[63..0]

H_AVREF

H_D#0 H_D#1 H_D#2 H_D#3 H_D#4 H_D#5 H_D#6 H_D#7 H_D#8 H_D#9 H_D#10 H_D#11 H_D#12 H_D#13 H_D#14 H_D#15 H_D#16 H_D#17 H_D#18 H_D#19 H_D#20 H_D#21 H_D#22 H_D#23 H_D#24 H_D#25 H_D#26 H_D#27 H_D#28 H_D#29 H_D#30 H_D#31 H_D#32 H_D#33 H_D#34 H_D#35 H_D#36 H_D#37 H_D#38 H_D#39 H_D#40 H_D#41 H_D#42 H_D#43 H_D#44 H_D#45 H_D#46 H_D#47 H_D#48 H_D#49 H_D#50 H_D#51 H_D#52 H_D#53 H_D#54 H_D#55 H_D#56 H_D#57 H_D#58 H_D#59 H_D#60 H_D#61 H_D#62 H_D#63

R106

54.9-1%-1/16W-0402

G G

F F

54.9-1%-1/16W-0402

H_SCOMP#

1.05VS<8,9,15,16,18,21,24,39> 1.05VS<8,9,15,16,18,21,24,39>

R108

54.9-1%-1/16W-0402

H_SCOMP

H_RCOMP

R96

24.9-1%-1/16W-0402

10mil

R322

R322 221-1%-1/16W-0402

221-1%-1/16W-0402

R325

R325 100-1%-1/16W-0402

100-1%-1/16W-0402

10mil

H_SWING

H_D#[63..0]<8>

C383

0.1uF 10V 10% 0402 X7R

Trace should be 10-mil wide with 20-mil spacing

E E

D D

H_CPURST#<8>

1.05VS<8,9,15,16,18,21,24,39>

C C

R328

R328 1K-1%-1/16W-0402

1K-1%-1/16W-0402

H_CPUSLP#<8>

U11A

H_D#_0

H_D#_1

H_D#_2

H_D#_3

H_D#_4

H_D#_5

H_D#_6

H_D#_7

H_D#_8

H_D#_9

M10

H_D#_10

N12

H_D#_11

H_D#_12

H_D#_13

P13

H_D#_14

H_D#_15

H_D#_16

W10

H_D#_17

H_D#_18

H_D#_19

H_D#_20

H_D#_21

H_D#_22

H_D#_23

H_D#_24

H_D#_25

H_D#_26

H_D#_27

H_D#_28

H_D#_29

H_D#_30

H_D#_31

AD12

H_D#_32

AE3

H_D#_33

AD9

H_D#_34

AC9

H_D#_35

AC7

H_D#_36

AC14

H_D#_37

AD11

H_D#_38

AC11

H_D#_39

AB2

H_D#_40

AD7

H_D#_41

AB1

H_D#_42

H_D#_43

AC6

H_D#_44

AE2

H_D#_45

AC5

H_D#_46

AG3

H_D#_47

AJ9

H_D#_48

AH8

H_D#_49

AJ14

H_D#_50

AE9

H_D#_51

AE11

H_D#_52

AH12

H_D#_53

AJ5

H_D#_54

AH5

H_D#_55

AJ6

H_D#_56

AE7

H_D#_57

AJ7

H_D#_58

AJ2

H_D#_59

AE5

H_D#_60

AJ3

H_D#_61

AH2

H_D#_62

AH13

H_D#_63

H_SWING

H_RCOMP

H_SCOMP

H_SCOMP#

H_CPURST#

H_CPUSLP#

H_AVREF

H_DVREF

Crestline FBGA 1299P INTEL 6019B0412201

HOST

H_A#_3 H_A#_4 H_A#_5 H_A#_6 H_A#_7 H_A#_8

H_A#_9 H_A#_10 H_A#_11 H_A#_12 H_A#_13 H_A#_14 H_A#_15 H_A#_16 H_A#_17 H_A#_18 H_A#_19 H_A#_20 H_A#_21 H_A#_22 H_A#_23 H_A#_24 H_A#_25 H_A#_26 H_A#_27 H_A#_28 H_A#_29 H_A#_30 H_A#_31 H_A#_32 H_A#_33 H_A#_34 H_A#_35

H_ADS# H_ADSTB#_0 H_ADSTB#_1

H_BNR#

H_BPRI#

H_BREQ#

H_DEFER#

H_DBSY#

HPLL_CLK

HPLL_CLK#

H_DPWR#

H_DRDY#

H_HIT#

H_HITM# H_LOCK# H_TRDY#

H_DINV#_0 H_DINV#_1 H_DINV#_2 H_DINV#_3

H_DSTBN#_0 H_DSTBN#_1 H_DSTBN#_2 H_DSTBN#_3

H_DSTBP#_0 H_DSTBP#_1 H_DSTBP#_2 H_DSTBP#_3

H_REQ#_0 H_REQ#_1 H_REQ#_2 H_REQ#_3 H_REQ#_4

H_RS#_0 H_RS#_1 H_RS#_2

J13 B11 C11 M11 C15 F16 L13 G17 C14 K16 B13 L16 J17 B14 K19 P15 R17 B16 H20 L19 D17 M17 N16 J19 B18 E19 B17 B15 E17 C18 A19 B19 N19

G12 H17 G20 C8 E8 F12 D6 C10 AM5 AM7 H8 K7 E4 C6 G10 B7

K5 L2 AD13 AE13

M7 K3 AD2 AH11

L7 K2 AC2 AJ10

M14 E13 A11 H13 B12

E12 D7 D8

H_A#3 H_A#4 H_A#5 H_A#6 H_A#7 H_A#8 H_A#9 H_A#10 H_A#11 H_A#12 H_A#13 H_A#14 H_A#15 H_A#16 H_A#17 H_A#18 H_A#19 H_A#20 H_A#21 H_A#22 H_A#23 H_A#24 H_A#25 H_A#26 H_A#27 H_A#28 H_A#29 H_A#30 H_A#31 H_A#32 H_A#33 H_A#34 H_A#35

H_REQ#0 H_REQ#1 H_REQ#2 H_REQ#3 H_REQ#4

10mil

R327

R316

R316 2K-1%-1/16W-0402

2K-1%-1/16W-0402

C376

0.1uF 10V 10% 0402 X7R

R327 0-5%-1/16W-0402

0-5%-1/16W-0402

H_DVREF

H_A#[35..3] <8>

H_ADS# <8> H_ADSTB#0 <8> H_ADSTB#1 <8> H_BNR# <8> H_BPRI# <8> H_BREQ#0 <8> H_DEFER# <8> H_DBSY# <8> CLK_MCH_BCLK <18> CLK_MCH_BCLK# <18> H_DPWR# <8> H_DRDY# <8> H_HIT# <8> H_HITM# <8> H_LOCK# <8> H_TRDY# <8>

H_DINV#0 <8> H_DINV#1 <8> H_DINV#2 <8> H_DINV#3 <8>

H_DSTBN#0 <8> H_DSTBN#1 <8> H_DSTBN#2 <8> H_DSTBN#3 <8>

H_DSTBP#0 <8> H_DSTBP#1 <8> H_DSTBP#2 <8> H_DSTBP#3 <8> H_REQ#[4..0] <8>

H_RS#0 <8> H_RS#1 <8> H_RS#2 <8>

B B

Inventec Corporation

5F, No. 35, Section 2, Zhongyang South Road

5F, No. 35, Section 2, Zhongyang South Road Beitou District, Taipei 11270, Taiwan

Beitou District, Taipei 11270, Taiwan

A A

<OrgAddr4> Title

Title

Size

Date: Sheet of

Beitou District, Taipei 11270, Taiwan TEL:+886-2-2881-0721

TEL:+886-2-2881-0721

Z11D (Merom+Crestline+ICH8M)

Document Number

Crestline Host(1/6)

Tuesday, July 31, 2007

Rev

0.4

H H

Add for Intel ref design v1.3

G G

F F

<23,25>

<10,23>

MCH_BSEL0<18>

PM_ICH_PWROK

VCORE_GD

E E

R641 0-5%-1/16W-0402R641 0-5%-1/16W-0402

D D

C C

B B

A A

MCH_BSEL1<18> MCH_BSEL2<18>

R640 0-5%-1/16W-0402_NUR640 0-5%-1/16W-0402_NU

PM_BMBUSY#<23>

H_DPRSTP#<8,10,21> PM_EXTTS#0<19> PM_EXTTS#1<20>

PLT_RST#<22> PM_THRMTRIP#<8,21> PM_DPRSLPVR<10,23>

3VS <8,10,11,16,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,39,40,41,43,44>

R365

R365 10K-5%-1/16W-0402

10K-5%-1/16W-0402 R363

R363 10K-5%-1/16W-0402

10K-5%-1/16W-0402

MCH_CFG5

MCH_CFG9

MCH_CFG12 MCH_CFG13

MCH_CFG16 MCH_CFG18

MCH_CFG19 MCH_CFG20

R332 SHORT-0402-5MILR332 SHORT-0402-5MIL

R345 SHORT-0402-5MILR345 SHORT-0402-5MIL

PM_EXTTS#0 PM_EXTTS#1

R397 100-5%-1/16W-0402R397 100-5%-1/16W-0402

R330 SHORT-0402-5MILR330 SHORT-0402-5MIL

PM_EXTTS#0

PM_EXTTS#1

MCH_CFG18

R353 1K-5%-1/16W-0402_NUR353 1K-5%-1/16W-0402_NU

MCH_CFG19

R352 4.02K-1%-1/16W-0402_NUR352 4.02K-1%-1/16W-0402_NU

MCH_CFG20

R364 4.02K-1%-1/16W-0402_NUR364 4.02K-1%-1/16W-0402_NU

MCH_CFG5

R336 4.02K-1%-1/16W-0402_NUR336 4.02K-1%-1/16W-0402_NU

MCH_CFG9

R319 2.2K-5%-1/16W-0402_NUR319 2.2K-5%-1/16W-0402_NU

MCH_CFG16

R348 4.02K-1%-1/16W-0402_NUR348 4.02K-1%-1/16W-0402_NU

MCH_CFG12

R349 4.02K-1%-1/16W-0402_NUR349 4.02K-1%-1/16W-0402_NU

MCH_CFG13

R329 4.02K-1%-1/16W-0402_NUR329 4.02K-1%-1/16W-0402_NU

C378

0.1uF 10V 10% 0402 X5R

R355 SHORT-0402-5MILR355 SHORT-0402-5MIL

U11B

P36

RSVD1

P37

RSVD2

R35

RSVD3

N35

RSVD4

AR12

RSVD5

AR13

RSVD6

AM12

RSVD7

AN13

RSVD8

J12

RSVD9

AR37

RSVD10

AM36

RSVD11

AL36

RSVD12

AM37

RSVD13

D20

RSVD14

H10

RSVD20

B51

RSVD21

BJ20

RSVD22

BK22

RSVD23

BF19

RSVD24

BH20

RSVD25

BK18

RSVD26

BJ18

RSVD27

BF23

RSVD28

BG23

RSVD29

BC23

RSVD30

BD24

RSVD31

BH39

RSVD34

AW20

RSVD35

BK20

RSVD36

B44

RSVD39

C44

RSVD40

A35

RSVD41

B37

RSVD42

B36

RSVD43

B34

RSVD44

C34

RSVD45

P27

CFG_0

N27

CFG_1

N24

CFG_2

C21

CFG_3

C23

CFG_4

F23

CFG_5

N23

CFG_6

G23

CFG_7

J20

CFG_8

C20

CFG_9

R24

CFG_10

L23

CFG_11

J23

CFG_12

E23

CFG_13

E20

CFG_14

K23

CFG_15

M20

CFG_16

M24

CFG_17

L32

CFG_18

N33

CFG_19

L35

CFG_20

G41

PM_BM_BUSY#

L39

PM_DPRSTP#

L36

PM_EXT_TS#_0

J36

PM_EXT_TS#_1

AW49

PWROK

AV20

RSTIN#

N20

THERMTRIP#

G36

DPRSLPVR

BJ51

NC_1

BK51

NC_2

BK50

NC_3

BL50

NC_4

BL49

NC_5

BL3

NC_6

BL2

NC_7

BK1

NC_8

BJ1

NC_9

NC_10

NC_11

C51

NC_12

B50

NC_13

A50

NC_14

A49

NC_15

BK2

NC_16

Crestline FBGA 1299P INTEL 6019B0412201

3VS<8,10,11,16,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,39,40,41,43,44>

http://hobi-elektronika.net

SM_RCOMP_VOH SM_RCOMP_VOL

DDR MUXINGCLK

DPLL_REF_CLK

DPLL_REF_CLK#

DPLL_REF_SSCLK

DPLL_REF_SSCLK#

CFGRSVD

DMI

GRAPHICS VID

SDVO_CTRL_CLK

SDVO_CTRL_DATA

MISC

CRESTLINE (965GM) Strapping:

MCH_CFG5

MCH_CFG9 (PCIE Graphic Lane)

MCH_CFG16 (FSB Dynamic ODT)

MCH_CFG18 (VCC Select) MCH_CFG19 (DMI Lane Reversal) MCH_CFG20

SM_CK_0 SM_CK_1 SM_CK_3 SM_CK_4

SM_CK#_0 SM_CK#_1 SM_CK#_3

SM_CK#_4

SM_CKE_0 SM_CKE_1 SM_CKE_3 SM_CKE_4

SM_CS#_0 SM_CS#_1 SM_CS#_2 SM_CS#_3

SM_ODT_0 SM_ODT_1 SM_ODT_2 SM_ODT_3

SM_RCOMP

SM_RCOMP#

SM_VREF_0 SM_VREF_1

PEG_CLK

PEG_CLK#

DMI_RXN_0 DMI_RXN_1 DMI_RXN_2 DMI_RXN_3

DMI_RXP_0 DMI_RXP_1 DMI_RXP_2 DMI_RXP_3

DMI_TXN_0 DMI_TXN_1 DMI_TXN_2 DMI_TXN_3

DMI_TXP_0 DMI_TXP_1 DMI_TXP_2 DMI_TXP_3

GFX_VID_0 GFX_VID_1 GFX_VID_2 GFX_VID_3

GFX_VR_EN

CL_CLK

CL_DATA

CL_PWROK

CL_RST# CL_VREF

CLK_REQ#

ICH_SYNC#

TEST_1 TEST_2

AV29 BB23 BA25 AV23

AW30 BA23 AW25 AW23

BE29 AY32 BD39 BG37

BG20 BK16 BG16 BE13

BH18 BJ15 BJ14 BE16

BL15 BK14

BK31 BL31

AR49 AW4

B42 C42 H48 H47

K44 K45

AN47 AJ38 AN42 AN46

AM47 AJ39 AN41 AN45

AJ46 AJ41 AM40 AM44

AJ47 AJ42 AM39 AM43

E35 A39 C38 B39 E36

AM49 AK50 AT43 AN49 AM50

H35 K36 G39 G40

A37 R32

M_RCOMP M_RCOMP#

M_RCOMP_VOH M_RCOMP_VOL

M_VREF

DMI_TXN0 DMI_TXN1 DMI_TXN2 DMI_TXN3

DMI_TXP0 DMI_TXP1 DMI_TXP2 DMI_TXP3

DMI_RXN0 DMI_RXN1 DMI_RXN2 DMI_RXN3

DMI_RXP0 DMI_RXP1 DMI_RXP2 DMI_RXP3

MCH_CLVREF

MCH_TEST1 MCH_TEST2

Low

DMIx2

M_CLK_DDR0 <19> M_CLK_DDR1 <19> M_CLK_DDR2 <20> M_CLK_DDR3 <20>

M_CLK_DDR#0 <19> M_CLK_DDR#1 <19> M_CLK_DDR#2 <20> M_CLK_DDR#3 <20>

M_CKE0 <19> M_CKE1 <19> M_CKE2 <20> M_CKE3 <20>

M_CS#0 <19> M_CS#1 <19> M_CS#2 <20> M_CS#3 <20>

M_ODT0 <19> M_ODT1 <19> M_ODT2 <20> M_ODT3 <20>

DREFCLK <18> DREFCLK# <18> DREFSSCLK <18> DREFSSCLK# <18>

CLK_PCIE_3GPLL <18> CLK_PCIE_3GPLL# <18>

DMI_TXN[3..0]

DMI_TXP[3..0]

DMI_RXN[3..0]

DMI_RXP[3..0]

DFGT_VID_0 <41> DFGT_VID_1 <41> DFGT_VID_2 <41> DFGT_VID_3 <41>

CL_CLK0 <23>

CL_DATA0 <23> ALL_SYSPWRGD <23,31> CL_RST#0 <23> MCH_CLVREF

CLK_MCH_OE# <18> MCH_ICH_SYNC# <23>

MCH_TEST1 MCH_TEST2

Reverse Lane

Dynamic ODT Disable

1.05V Normal Lanes Reversed Only SDVO or PCIE x1 is

operation

Route M_OCDCMOP 0&1 as short as possible

M_VREF

C452

0.1uF 10V 10% 0402 X7R

C444

0.1uF 10V 10% 0402 X7R

20mil

M_VREF <19,20,40>

DMI_TXN[3..0] <22>

DMI_TXP[3..0] <22>

DMI_RXN[3..0] <22>

DMI_RXP[3..0] <22>

CRT_BLUE<36> CRT_GREEN<36> CRT_RED<36>

CRT_DDC_CLK<25> CRT_DDC_DATA<25> CRT_HSYNC<25>

CRT_VSYNC<25>

SDVO_CTRL_CLK <34>

SDVO_CTRL_DATA <34>

MCH_TEST1 MCH_TEST2

0-5%-1/16W-0402

High

DMIx4

Place 150ohm termination resistor close to GMCH

R362

R317

20K-5%-1/16W-0402

MCH_CLVREF

0.1uF 10V 10% 0402 X7R

Normal Operation

Dynamic ODT Enable

1.5V

Only SDVO or PCIE x1 with PEG port

10mil

C439

1.8V<15,16,19,20,34,40>

R124

R123

LUMA<26> CHROMA<26>

10K-5%-1/16W-0402

R339 0-5%-1/16W-0402_NUR339 0-5%-1/16W-0402_NU

INV_PWM<25,31>

BL_ENA<25>

LCM_DDCPCLK<25> LCM_DDCPDATA<25>

LVDS_VDDEN<25>

LVDS_TXCLK_LN<25> LVDS_TXCLK_LP<25> LVDS_TXCLK_UN<25> LVDS_TXCLK_UP<25>

LVDS_TXOUT_L0N<25> LVDS_TXOUT_L1N<25> LVDS_TXOUT_L2N<25>

LVDS_TXOUT_L0P<25> LVDS_TXOUT_L1P<25> LVDS_TXOUT_L2P<25>

LVDS_TXOUT_U0N<25> LVDS_TXOUT_U1N<25> LVDS_TXOUT_U2N<25>

LVDS_TXOUT_U0P<25> LVDS_TXOUT_U1P<25> LVDS_TXOUT_U2P<25>

R313 75-1%-1/16W-0402R313 75-1%-1/16W-0402 R314 120 0.5% 1/16W 0402R314 120 0.5% 1/16W 0402 R315 120 0.5% 1/16W 0402R315 120 0.5% 1/16W 0402

C717 3pF 50V 0.25% 0402 C0GC717 3pF 50V 0.25% 0402 C0G C716 3pF 50V 0.25% 0402 C0GC716 3pF 50V 0.25% 0402 C0G C718 3pF 50V 0.25% 0402 C0GC718 3pF 50V 0.25% 0402 C0G

CRT_BLUE CRT_GREEN CRT_RED

R324 30.1-0.5%-1/16W-0402R324 30.1-0.5%-1/16W-0402 R323 30.1-0.5%-1/16W-0402R323 30.1-0.5%-1/16W-0402

1.3K-1%-1/16W-0402

1.25VM_AXD <16>

R388

R388 1K-1%-1/16W-0402

1K-1%-1/16W-0402

R387

R387 392-1%-1/16W-0402

392-1%-1/16W-0402

M_RCOMP

20-1%-1/16W-0402

M_RCOMP#

10mil

3VS<8,10,11,16,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,39,40,41,43,44>

R334

SHORT-0402-5MIL

TP8TP8

LVDS_TXCLK_LN LVDS_TXCLK_LP LVDS_TXCLK_UN LVDS_TXCLK_UP

LVDS_TXOUT_L0N LVDS_TXOUT_L1N LVDS_TXOUT_L2N

LVDS_TXOUT_L0P LVDS_TXOUT_L1P LVDS_TXOUT_L2P

LVDS_TXOUT_U0N LVDS_TXOUT_U1N LVDS_TXOUT_U2N

LVDS_TXOUT_U0P LVDS_TXOUT_U1P LVDS_TXOUT_U2P

TP9TP9 TP10TP10

R318

R326

R326 10K-5%-1/16W-0402

10K-5%-1/16W-0402

R331

R3542.37K-1%-1/16W-0402 R3542.37K-1%-1/16W-0402

L_VBG

1 1

U11C

J40

L_BKLT_CTRL

H39

L_BKLT_EN

E39

L_CTRL_CLK

E40

L_CTRL_DATA

C37

L_DDC_CLK

D35

L_DDC_DATA

K40

L_VDD_EN

L41

LVDS_IBG

L43

LVDS_VBG

N41

LVDS_VREFH

N40

LVDS_VREFL

D46

LVDSA_CLK#

C45

LVDSA_CLK

D44

LVDSB_CLK#

E42

LVDSB_CLK

G51

LVDSA_DATA#_0

E51

LVDSA_DATA#_1

F49

LVDSA_DATA#_2

C48

LVDSA_DATA#_3

G50

LVDSA_DATA_0

E50

LVDSA_DATA_1

F48

LVDSA_DATA_2

D47

LVDSA_DATA_3

G44

LVDSB_DATA#_0

B47

LVDSB_DATA#_1

B45

LVDSB_DATA#_2

E44

LVDSB_DATA_0

A47

LVDSB_DATA_1

A45

LVDSB_DATA_2

E27

TVA_DAC

G27

TVB_DAC

K27

TVC_DAC

F27

TVA_RTN

J27

TVB_RTN

L27

TVC_RTN

M35

TV_DCONSEL_0

P33

TV_DCONSEL_1

H32

CRT_BLUE

G32

CRT_BLUE#

K29

CRT_GREEN

J29

CRT_GREEN#

F29

CRT_RED

E29

CRT_RED#

K33

CRT_DDC_CLK

G35

CRT_DDC_DATA

F33

REFSET

CRT_HSYNC

C32

CRT_TVO_IREF

E33

CRT_VSYNC

Crestline FBGA 1299P INTEL 6019B0412201

As close as possible to GMCH and Minimum spacing of 20 mils away from any toggle signals

When the display is completely white , the RGB voltage is between 665mV to 770mV by VESA Spec

If meet , CRT_IREF resistor value is optimal

1.8V <15,16,19,20,34,40>

R129

1K-1%-1/16W-0402

R130

3.01K 1% 1/16 0402

R133

1K-1%-1/16W-0402

LVDS

TV VGA

0.01uF 16V 10% 0402 X7R

M_RCOMP_VOH

C170

M_RCOMP_VOL

C174

0.01uF 16V 10% 0402 X7R

PEG_COMPI

PEG_COMPO

PEG_RX#_0 PEG_RX#_1 PEG_RX#_2 PEG_RX#_3 PEG_RX#_4 PEG_RX#_5 PEG_RX#_6 PEG_RX#_7 PEG_RX#_8

PEG_RX#_9 PEG_RX#_10 PEG_RX#_11 PEG_RX#_12 PEG_RX#_13 PEG_RX#_14 PEG_RX#_15

PEG_RX_10

PEG_RX_11

PEG_RX_12

PEG_RX_13

PEG_RX_14

PEG_RX_15

PEG_TX#_0 PEG_TX#_1 PEG_TX#_2 PEG_TX#_3 PEG_TX#_4 PEG_TX#_5 PEG_TX#_6 PEG_TX#_7 PEG_TX#_8 PEG_TX#_9

PEG_TX#_10

PCI-EXPRESS GRAPHICS

PEG_TX#_11 PEG_TX#_12 PEG_TX#_13 PEG_TX#_14 PEG_TX#_15

PEG_TX_10 PEG_TX_11 PEG_TX_12 PEG_TX_13 PEG_TX_14 PEG_TX_15

C171

2.2uF 10V 10% 0805 X5R

C180

2.2uF 10V 10% 0805 X5R

PEG_RX_0 PEG_RX_1 PEG_RX_2 PEG_RX_3 PEG_RX_4 PEG_RX_5 PEG_RX_6 PEG_RX_7 PEG_RX_8 PEG_RX_9

PEG_TX_0 PEG_TX_1 PEG_TX_2 PEG_TX_3 PEG_TX_4 PEG_TX_5 PEG_TX_6 PEG_TX_7 PEG_TX_8 PEG_TX_9

AC46 AC49 AC42 AH39 AE49 AH44

M45 T38 T46 N50 R51 U43 W42 Y47 Y39 AC38

N43 M43

J51 L51 N47 T45 T50 U40 Y44 Y40 AB51 W49 AD44 AD40 AG46 AH49 AG45 AG41

J50 L50 M47 U44 T49 T41 W45 W41 AB50 Y48 AC45 AC41 AH47 AG49 AH45 AG42

N45 U39 U47 N51 R50 T42 Y43 W46 W38 AD39

AD47 AC50 AD43 AG39 AE50 AH43

VCC_PEG<16>

R356

24.9-1%-1/16W-0402

PEG_COMP

SDVOB_INT- <34>

SDVOB_INT+ <34>

C145 0.1uF 10V 10% 0402 X5RC145 0.1uF 10V 10% 0402 X5R C151 0.1uF 10V 10% 0402 X5RC151 0.1uF 10V 10% 0402 X5R C142 0.1uF 10V 10% 0402 X5RC142 0.1uF 10V 10% 0402 X5R C137 0.1uF 10V 10% 0402 X5RC137 0.1uF 10V 10% 0402 X5R

C149 0.1uF 10V 10% 0402 X5RC149 0.1uF 10V 10% 0402 X5R C150 0.1uF 10V 10% 0402 X5RC150 0.1uF 10V 10% 0402 X5R C143 0.1uF 10V 10% 0402 X5RC143 0.1uF 10V 10% 0402 X5R C139 0.1uF 10V 10% 0402 X5RC139 0.1uF 10V 10% 0402 X5R

Inventec Corporation

5F, No. 35, Section 2, Zhongyang South Road

5F, No. 35, Section 2, Zhongyang South Road Beitou District, Taipei 11270, Taiwan

Beitou District, Taipei 11270, Taiwan

<OrgAddr4> Title

Title

Size

Date: Sheet of

Beitou District, Taipei 11270, Taiwan TEL:+886-2-2881-0721

TEL:+886-2-2881-0721

Z11D (Merom+Crestline+ICH8M)

Document Number

Crestline DMI/Graph2/6)

Tuesday, July 31, 2007

SDVOB_RED- <34> SDVOB_GREEN- <34>

SDVOB_BLUE- <34>

SDVOB_CLK- <34>

SDVOB_RED+ <34> SDVOB_GREEN+ <34> SDVOB_BLUE+ <34>

SDVOB_CLK+ <34>

Rev

0.4

http://hobi-elektronika.net

H H

G G

M_A_DQ[63..0]<19>

F F

E E

D D

M_A_DQ[63..0]

M_A_DQ0 M_A_DQ1 M_A_DQ2 M_A_DQ3 M_A_DQ4 M_A_DQ5 M_A_DQ6 M_A_DQ7 M_A_DQ8 M_A_DQ9 M_A_DQ10 M_A_DQ11 M_A_DQ12 M_A_DQ13 M_A_DQ14 M_A_DQ15 M_A_DQ16 M_A_DQ17 M_A_DQ18 M_A_DQ19 M_A_DQ20 M_A_DQ21 M_A_DQ22 M_A_DQ23 M_A_DQ24 M_A_DQ25 M_A_DQ26 M_A_DQ27 M_A_DQ28 M_A_DQ29 M_A_DQ30 M_A_DQ31 M_A_DQ32 M_A_DQ33 M_A_DQ34 M_A_DQ35 M_A_DQ36 M_A_DQ37 M_A_DQ38 M_A_DQ39 M_A_DQ40 M_A_DQ41 M_A_DQ42 M_A_DQ43 M_A_DQ44 M_A_DQ45 M_A_DQ46 M_A_DQ47 M_A_DQ48 M_A_DQ49 M_A_DQ50 M_A_DQ51 M_A_DQ52 M_A_DQ53 M_A_DQ54 M_A_DQ55 M_A_DQ56 M_A_DQ57 M_A_DQ58 M_A_DQ59 M_A_DQ60 M_A_DQ61 M_A_DQ62 M_A_DQ63

U11D

AR43

SA_DQ_0

AW44

SA_DQ_1

BA45

SA_DQ_2

AY46

SA_DQ_3

AR41

SA_DQ_4

AR45

SA_DQ_5

AT42

SA_DQ_6

AW47

SA_DQ_7

BB45

SA_DQ_8

BF48

SA_DQ_9

BG47

SA_DQ_10

BJ45

SA_DQ_11

BB47

SA_DQ_12

BG50

SA_DQ_13

BH49

SA_DQ_14

BE45

SA_DQ_15

AW43

SA_DQ_16

BE44

SA_DQ_17

BG42

SA_DQ_18

BE40

SA_DQ_19

BF44

SA_DQ_20

BH45

SA_DQ_21

BG40

SA_DQ_22

BF40

SA_DQ_23

AR40

SA_DQ_24

AW40

SA_DQ_25

AT39

SA_DQ_26

AW36

SA_DQ_27

AW41

SA_DQ_28

AY41

SA_DQ_29

AV38

SA_DQ_30

AT38

SA_DQ_31

AV13

SA_DQ_32

AT13

SA_DQ_33

AW11

SA_DQ_34

AV11

SA_DQ_35

AU15

SA_DQ_36

AT11

SA_DQ_37

BA13

SA_DQ_38

BA11

SA_DQ_39

BE10

SA_DQ_40

BD10

SA_DQ_41

BD8

SA_DQ_42

AY9

SA_DQ_43

BG10

SA_DQ_44

AW9

SA_DQ_45

BD7

SA_DQ_46

BB9

SA_DQ_47

BB5

SA_DQ_48

AY7

SA_DQ_49

AT5

SA_DQ_50

AT7

SA_DQ_51

AY6

SA_DQ_52

BB7

SA_DQ_53

AR5

SA_DQ_54

AR8

SA_DQ_55

AR9

SA_DQ_56

AN3

SA_DQ_57

AM8

SA_DQ_58

AN10

SA_DQ_59

AT9

SA_DQ_60

AN9

SA_DQ_61

AM9

SA_DQ_62

AN11

SA_DQ_63

Crestline FBGA 1299P INTEL 6019B0412201

DDR SYSTEM MEMORY A

SA_BS_0 SA_BS_1

SA_BS_2 SA_CAS# SA_DM_0

SA_DM_1 SA_DM_2 SA_DM_3 SA_DM_4 SA_DM_5 SA_DM_6 SA_DM_7

SA_DQS_0 SA_DQS_1 SA_DQS_2 SA_DQS_3 SA_DQS_4 SA_DQS_5 SA_DQS_6

SA_DQS_7 SA_DQS#_0 SA_DQS#_1 SA_DQS#_2 SA_DQS#_3 SA_DQS#_4 SA_DQS#_5 SA_DQS#_6 SA_DQS#_7

SA_MA_0 SA_MA_1 SA_MA_2 SA_MA_3 SA_MA_4 SA_MA_5 SA_MA_6 SA_MA_7 SA_MA_8

SA_MA_9 SA_MA_10 SA_MA_11 SA_MA_12 SA_MA_13 SA_MA_14

SA_RAS#

SA_RCVEN#

SA_WE#

BB19 BK19 BF29

BL17 AT45

BD44 BD42 AW38 AW13 BG8 AY5 AN6

AT46 BE48 BB43 BC37 BB16 BH6 BB2 AP3 AT47 BD47 BC41 BA37 BA16 BH7 BC1 AP2

BJ19 BD20 BK27 BH28 BL24 BK28 BJ27 BJ25 BL28 BA28 BC19 BE28 BG30 BJ16 BJ29

BE18 AY20

BA19

M_A_DM0 M_A_DM1 M_A_DM2 M_A_DM3 M_A_DM4 M_A_DM5 M_A_DM6 M_A_DM7

M_A_DQS0 M_A_DQS1 M_A_DQS2 M_A_DQS3 M_A_DQS4 M_A_DQS5 M_A_DQS6 M_A_DQS7 M_A_DQS#0 M_A_DQS#1 M_A_DQS#2 M_A_DQS#3 M_A_DQS#4 M_A_DQS#5 M_A_DQS#6 M_A_DQS#7

M_A_A0 M_A_A1 M_A_A2 M_A_A3 M_A_A4 M_A_A5 M_A_A6 M_A_A7 M_A_A8 M_A_A9 M_A_A10 M_A_A11 M_A_A12 M_A_A13 M_A_A14

M_A_BS0 <19> M_A_BS1 <19> M_A_BS2 <19>

M_A_DM[7..0]

M_A_DQS[7..0]

M_A_DQS#[7..0]

M_A_A[14..0]

TP11TP11

M_A_CAS# <19> M_A_DM[7..0] <19>

M_A_DQS[7..0] <19>

M_A_DQS#[7..0] <19>

M_A_A[14..0] <19>

M_A_RAS# <19>

M_A_WE# <19>

M_B_DQ[63..0]<20>

M_B_DQ[63..0]

M_B_DQ0 M_B_DQ1 M_B_DQ2 M_B_DQ3 M_B_DQ4 M_B_DQ5 M_B_DQ6 M_B_DQ7 M_B_DQ8 M_B_DQ9 M_B_DQ10 M_B_DQ11 M_B_DQ12 M_B_DQ13 M_B_DQ14 M_B_DQ15 M_B_DQ16 M_B_DQ17 M_B_DQ18 M_B_DQ19 M_B_DQ20 M_B_DQ21 M_B_DQ22 M_B_DQ23 M_B_DQ24 M_B_DQ25 M_B_DQ26 M_B_DQ27 M_B_DQ28 M_B_DQ29 M_B_DQ30 M_B_DQ31 M_B_DQ32 M_B_DQ33 M_B_DQ34 M_B_DQ35 M_B_DQ36 M_B_DQ37 M_B_DQ38 M_B_DQ39 M_B_DQ40 M_B_DQ41 M_B_DQ42 M_B_DQ43 M_B_DQ44 M_B_DQ45 M_B_DQ46 M_B_DQ47 M_B_DQ48 M_B_DQ49 M_B_DQ50 M_B_DQ51 M_B_DQ52 M_B_DQ53 M_B_DQ54 M_B_DQ55 M_B_DQ56 M_B_DQ57 M_B_DQ58 M_B_DQ59 M_B_DQ60 M_B_DQ61 M_B_DQ62 M_B_DQ63

U11E

AP49

SB_DQ_0

AR51

SB_DQ_1

AW50

SB_DQ_2

AW51

SB_DQ_3

AN51

SB_DQ_4

AN50

SB_DQ_5

AV50

SB_DQ_6

AV49

SB_DQ_7

BA50

SB_DQ_8

BB50

SB_DQ_9

BA49

SB_DQ_10

BE50

SB_DQ_11

BA51

SB_DQ_12

AY49

SB_DQ_13

BF50

SB_DQ_14

BF49

SB_DQ_15

BJ50

SB_DQ_16

BJ44

SB_DQ_17

BJ43

SB_DQ_18

BL43

SB_DQ_19

BK47

SB_DQ_20

BK49

SB_DQ_21

BK43

SB_DQ_22

BK42

SB_DQ_23

BJ41

SB_DQ_24

BL41

SB_DQ_25

BJ37

SB_DQ_26

BJ36

SB_DQ_27

BK41

SB_DQ_28

BJ40

SB_DQ_29

BL35

SB_DQ_30

BK37

SB_DQ_31

BK13

SB_DQ_32

BE11

SB_DQ_33

BK11

SB_DQ_34

BC11

SB_DQ_35

BC13

SB_DQ_36

BE12

SB_DQ_37

BC12

SB_DQ_38

BG12

SB_DQ_39

BJ10

SB_DQ_40

BL9

SB_DQ_41

BK5

SB_DQ_42

BL5

SB_DQ_43

BK9

SB_DQ_44

BK10

SB_DQ_45

BJ8

SB_DQ_46

BJ6

SB_DQ_47

BF4

SB_DQ_48

BH5

SB_DQ_49

BG1

SB_DQ_50

BC2

SB_DQ_51

BK3

SB_DQ_52

BE4

SB_DQ_53

BD3

SB_DQ_54

BJ2

SB_DQ_55

BA3

SB_DQ_56

BB3

SB_DQ_57

AR1

SB_DQ_58

AT3

SB_DQ_59

AY2

SB_DQ_60

AY3

SB_DQ_61

AU2

SB_DQ_62

AT2

SB_DQ_63

Crestline FBGA 1299P INTEL 6019B0412201

DDR SYSTEM MEMORY B

SB_BS_0 SB_BS_1 SB_BS_2

SB_CAS# SB_DM_0

SB_DM_1 SB_DM_2 SB_DM_3 SB_DM_4 SB_DM_5 SB_DM_6 SB_DM_7

SB_DQS_0 SB_DQS_1 SB_DQS_2 SB_DQS_3 SB_DQS_4 SB_DQS_5 SB_DQS_6

SB_DQS_7 SB_DQS#_0 SB_DQS#_1 SB_DQS#_2 SB_DQS#_3 SB_DQS#_4 SB_DQS#_5 SB_DQS#_6 SB_DQS#_7

SB_MA_0 SB_MA_1 SB_MA_2 SB_MA_3 SB_MA_4 SB_MA_5 SB_MA_6 SB_MA_7 SB_MA_8

SB_MA_9 SB_MA_10 SB_MA_11 SB_MA_12 SB_MA_13 SB_MA_14

SB_RAS#

SB_RCVEN#

SB_WE#

AY17 BG18 BG36

BE17

AR50 BD49 BK45 BL39 BH12 BJ7 BF3 AW2

AT50 BD50 BK46 BK39 BJ12 BL7 BE2

AV2 AU50 BC50 BL45 BK38 BK12 BK7 BF2 AV3

BC18 BG28 BG25 AW17 BF25 BE25 BA29 BC28 AY28 BD37

BG17

BE37

BA39

BG13

BE24 AV16

AY18 BC17

M_B_DM0 M_B_DM1 M_B_DM2 M_B_DM3 M_B_DM4 M_B_DM5 M_B_DM6 M_B_DM7

M_B_DQS0 M_B_DQS1 M_B_DQS2 M_B_DQS3 M_B_DQS4 M_B_DQS5 M_B_DQS6 M_B_DQS7 M_B_DQS#0 M_B_DQS#1 M_B_DQS#2 M_B_DQS#3 M_B_DQS#4 M_B_DQS#5 M_B_DQS#6 M_B_DQS#7

M_B_A0 M_B_A1 M_B_A2 M_B_A3 M_B_A4 M_B_A5 M_B_A6 M_B_A7 M_B_A8 M_B_A9 M_B_A10 M_B_A11 M_B_A12 M_B_A13 M_B_A14

M_B_BS0 <20> M_B_BS1 <20> M_B_BS2 <20>

M_B_DM[7..0]

M_B_DQS[7..0]

M_B_DQS#[7..0]

M_B_A[14..0]

TP12TP12

M_B_CAS# <20> M_B_DM[7..0] <20>

M_B_DQS[7..0] <20>

M_B_DQS#[7..0] <20>

M_B_A[14..0] <20>

M_B_RAS# <20>

M_B_WE# <20>

C C

B B

Inventec Corporation

5F, No. 35, Section 2, Zhongyang South Road

5F, No. 35, Section 2, Zhongyang South Road Beitou District, Taipei 11270, Taiwan

Beitou District, Taipei 11270, Taiwan

A A

<OrgAddr4> Title

Title

Size

Date: Sheet of

Beitou District, Taipei 11270, Taiwan TEL:+886-2-2881-0721

TEL:+886-2-2881-0721

Z11D (Merom+Crestline+ICH8M)

Document Number

Tuesday, July 31, 2007

Crestline DDRII(3/6)

Rev

0.4

http://hobi-elektronika.net

H H

VCC_GMCH<8,9,12,16,18,21,24,39>

U11G

AT35

VCC_1

AT34

VCC_2

AH28

VCC_3

AC32

VCC_5

AC31

VCC_4

AK32

VCC_6

AJ31

VCC_7

AJ28

VCC_8

AH32

VCC_9

AH31

1.8V<13,16,19,20,34,40>

10mil

AH29 AF32

AU32 AU33 AU35

AV33 AW33 AW35

AY35

BA32

BA33

BA35

BB33

BC32

BC33

BC35

BD32

BD35

BE32

BE33

BE35

BF33

BF34

BG32

BG33

BG35

BH32

BH34

BH35

BK32

BK33

BK34

BK35

BL33

AU30

AA20

AA23

AA26

AA28

AB21

AB24

AB29

AC20

AC21

AC23

AC24

AC26

AC28

AC29

AD20

AD23

AD24

AD28

AF21

AF26

AA31

AH20

AH21

AH23

AH24

AH26

AD31

AN14

R30

BJ32 BJ33 BJ34

R20

T14 W13 W14

Y12

AJ20

VCC_10 VCC_11 VCC_12

VCC_13

VCC_SM_1 VCC_SM_2 VCC_SM_3 VCC_SM_4 VCC_SM_5 VCC_SM_6 VCC_SM_7 VCC_SM_8 VCC_SM_9 VCC_SM_10 VCC_SM_11 VCC_SM_12 VCC_SM_13 VCC_SM_14 VCC_SM_15 VCC_SM_16 VCC_SM_17 VCC_SM_18 VCC_SM_19 VCC_SM_20 VCC_SM_21 VCC_SM_22 VCC_SM_23 VCC_SM_24 VCC_SM_25 VCC_SM_26 VCC_SM_27 VCC_SM_28 VCC_SM_29 VCC_SM_30 VCC_SM_31 VCC_SM_32 VCC_SM_33 VCC_SM_34 VCC_SM_35 VCC_SM_36

VCC_AXG_1 VCC_AXG_2 VCC_AXG_3 VCC_AXG_4 VCC_AXG_5 VCC_AXG_6 VCC_AXG_7 VCC_AXG_8 VCC_AXG_9 VCC_AXG_10 VCC_AXG_11 VCC_AXG_12 VCC_AXG_13 VCC_AXG_14 VCC_AXG_15 VCC_AXG_16 VCC_AXG_17 VCC_AXG_18 VCC_AXG_19 VCC_AXG_20 VCC_AXG_21 VCC_AXG_22 VCC_AXG_23 VCC_AXG_24 VCC_AXG_25 VCC_AXG_26 VCC_AXG_27 VCC_AXG_28 VCC_AXG_29 VCC_AXG_30 VCC_AXG_31 VCC_AXG_32 VCC_AXG_33 VCC_AXG_34

VCC CORE

POWER

G G

R370

SHORT-0402-15MIL

PLACE ON THE EDGE

F F

C169 0.1uF 10V 10% 0402 X7RC169 0.1uF 10V 10% 0402 X7R

C175 10uF 6.3V 10% 0805 X5RC175 10uF 6.3V 10% 0805 X5R

C173 T100uF 6.3V 45m 20% 3528

C172 10uF 6.3V 10% 0805 X5RC172 10uF 6.3V 10% 0805 X5R

E E

VGFX_CORE<41>

D D

C C

VCC SMVCC GFX

VCC_AXG_NCTF_1 VCC_AXG_NCTF_2 VCC_AXG_NCTF_3 VCC_AXG_NCTF_4 VCC_AXG_NCTF_5 VCC_AXG_NCTF_6 VCC_AXG_NCTF_7 VCC_AXG_NCTF_8

VCC_AXG_NCTF_9 VCC_AXG_NCTF_10 VCC_AXG_NCTF_11 VCC_AXG_NCTF_12 VCC_AXG_NCTF_13 VCC_AXG_NCTF_14 VCC_AXG_NCTF_15 VCC_AXG_NCTF_16 VCC_AXG_NCTF_17 VCC_AXG_NCTF_18 VCC_AXG_NCTF_19 VCC_AXG_NCTF_20 VCC_AXG_NCTF_21 VCC_AXG_NCTF_22 VCC_AXG_NCTF_23 VCC_AXG_NCTF_24 VCC_AXG_NCTF_25 VCC_AXG_NCTF_26 VCC_AXG_NCTF_27 VCC_AXG_NCTF_28 VCC_AXG_NCTF_29 VCC_AXG_NCTF_30 VCC_AXG_NCTF_31 VCC_AXG_NCTF_32 VCC_AXG_NCTF_33 VCC_AXG_NCTF_34 VCC_AXG_NCTF_35 VCC_AXG_NCTF_36 VCC_AXG_NCTF_37 VCC_AXG_NCTF_38 VCC_AXG_NCTF_39 VCC_AXG_NCTF_40 VCC_AXG_NCTF_41 VCC_AXG_NCTF_42 VCC_AXG_NCTF_43 VCC_AXG_NCTF_44 VCC_AXG_NCTF_45 VCC_AXG_NCTF_46 VCC_AXG_NCTF_47 VCC_AXG_NCTF_48 VCC_AXG_NCTF_49 VCC_AXG_NCTF_50 VCC_AXG_NCTF_51 VCC_AXG_NCTF_52 VCC_AXG_NCTF_53 VCC_AXG_NCTF_54

VCC GFX NCTF

VCC_AXG_NCTF_55 VCC_AXG_NCTF_56 VCC_AXG_NCTF_57 VCC_AXG_NCTF_58 VCC_AXG_NCTF_59 VCC_AXG_NCTF_60 VCC_AXG_NCTF_61 VCC_AXG_NCTF_62 VCC_AXG_NCTF_63 VCC_AXG_NCTF_64 VCC_AXG_NCTF_65 VCC_AXG_NCTF_66 VCC_AXG_NCTF_67 VCC_AXG_NCTF_68 VCC_AXG_NCTF_69 VCC_AXG_NCTF_70 VCC_AXG_NCTF_71 VCC_AXG_NCTF_72 VCC_AXG_NCTF_73 VCC_AXG_NCTF_74 VCC_AXG_NCTF_75 VCC_AXG_NCTF_76 VCC_AXG_NCTF_77 VCC_AXG_NCTF_78 VCC_AXG_NCTF_79 VCC_AXG_NCTF_80 VCC_AXG_NCTF_81 VCC_AXG_NCTF_82 VCC_AXG_NCTF_83

VCC_SM_LF1 VCC_SM_LF2 VCC_SM_LF3 VCC_SM_LF4 VCC_SM_LF5 VCC_SM_LF6 VCC_SM_LF7

VCC SM LF

T17 T18 T19 T21 T22 T23 T25 U15 U16 U17 U19 U20 U21 U23 U26 V16 V17 V19 V20 V21 V23 V24 Y15 Y16 Y17 Y19 Y20 Y21 Y23 Y24 Y26 Y28 Y29 AA16 AA17 AB16 AB19 AC16 AC17 AC19 AD15 AD16 AD17 AF16 AF19 AH15 AH16 AH17 AH19 AJ16 AJ17 AJ19 AK16 AK19 AL16 AL17 AL19 AL20 AL21 AL23 AM15 AM16 AM19 AM20 AM21 AM23 AP15 AP16 AP17 AP19 AP20 AP21 AP23 AP24 AR20 AR21 AR23 AR24 AR26 V26 V28 V29 Y31

AW45 BC39 BE39 BD17 BD4 AW8 AT6

VGFX_CORE<41>

Cavity Capacitors

C436 0.1uF 10V 10% 0402 X7RC436 0.1uF 10V 10% 0402 X7R

0.22uF 10V 10% 0603 X7R

0.1uF 10V 10% 0402 X7R

C451

C446

C410 1uF 6.3V 10% 0402 X5RC410 1uF 6.3V 10% 0402 X5R

C418 0.47uF 16V 10% 0603 X7RC418 0.47uF 16V 10% 0603 X7R

C417 0.1uF 10V 10% 0402 X7RC417 0.1uF 10V 10% 0402 X7R

0.47uF 16V 10% 0603 X7R

0.22uF 10V 10% 0603 X7R

C465

C459

C427 10uF 6.3V 10% 0805 X5RC427 10uF 6.3V 10% 0805 X5R

C419 10uF 6.3V 10% 0805 X5RC419 10uF 6.3V 10% 0805 X5R

370mils from the Edge

1uF 6.3V 10% 0402 X5R

C458

C466

C154 T100uF 6.3V 45m 20% 3528

C450

1.05VS<8,9,12,16,18,21,24,39>

308 mils from the Edge

1.05VS<8,9,12,16,18,21,24,39>

370mils from the Edge

C431 10uF 6.3V 10% 0805 X5RC431 10uF 6.3V 10% 0805 X5R

C133 T100uF 6.3V 45m 20% 3528

Cavity Capacitors

C414 10uF 6.3V 10% 0805 X5RC414 10uF 6.3V 10% 0805 X5R

C424 0.22uF 10V 10% 0603 X7RC424 0.22uF 10V 10% 0603 X7R

C426 0.22uF 10V 10% 0603 X7RC426 0.22uF 10V 10% 0603 X7R

VCC_GMCH<8,9,12,16,18,21,24,39>

C420 0.22uF 10V 10% 0603 X7RC420 0.22uF 10V 10% 0603 X7R

C440 0.1uF 10V 10% 0402 X7RC440 0.1uF 10V 10% 0402 X7R

C430 0.22uF 10V 10% 0603 X7RC430 0.22uF 10V 10% 0603 X7R

VCC_AXM<8,9,12,16,18,21,24,39>

C432 0.1uF 10V 10% 0402 X7RC432 0.1uF 10V 10% 0402 X7R

C433 0.1uF 10V 10% 0402 X7RC433 0.1uF 10V 10% 0402 X7R

C413 0.1uF 10V 10% 0402 X7RC413 0.1uF 10V 10% 0402 X7R

Cavity Capacitors

U11F

AB33

VCC_NCTF_1

AB36

VCC_NCTF_2

AB37

VCC_NCTF_3

AC33

VCC_NCTF_4

AC35

VCC_NCTF_5

AC36

VCC_NCTF_6

AD35

VCC_NCTF_7

AD36

VCC_NCTF_8

AF33

VCC_NCTF_9

AF36

VCC_NCTF_10

AH33

VCC_NCTF_11

AH35

VCC_NCTF_12

AH36

VCC_NCTF_13

AH37

VCC_NCTF_14

AJ33

VCC_NCTF_15

AJ35

VCC_NCTF_16

AK33

VCC_NCTF_17

AK35

VCC_NCTF_18

AK36

VCC_NCTF_19

AK37

VCC_NCTF_20

AD33

VCC_NCTF_21

AJ36

VCC_NCTF_22

AM35

VCC_NCTF_23

AL33

VCC_NCTF_24

AL35

VCC_NCTF_25

AA33

VCC_NCTF_26

AA35

VCC_NCTF_27

AA36

VCC_NCTF_28

AP35

VCC_NCTF_29

AP36

VCC_NCTF_30

AR35

VCC_NCTF_31

AR36

VCC_NCTF_32

Y32

VCC_NCTF_33

Y33

VCC_NCTF_34

Y35

VCC_NCTF_35

Y36

VCC_NCTF_36

Y37

VCC_NCTF_37

T30

VCC_NCTF_38

T34

VCC_NCTF_39

T35

VCC_NCTF_40

U29

VCC_NCTF_41

U31

VCC_NCTF_42

U32

VCC_NCTF_43

U33

VCC_NCTF_44

U35

VCC_NCTF_45

U36

VCC_NCTF_46

V32

VCC_NCTF_47

V33

VCC_NCTF_48

V36

VCC_NCTF_49

V37

VCC_NCTF_50

AL24

VCC_AXM_NCTF_1

AL26

VCC_AXM_NCTF_2

AL28

VCC_AXM_NCTF_3

AM26

VCC_AXM_NCTF_4

AM28

VCC_AXM_NCTF_5

AM29

VCC_AXM_NCTF_6

AM31

VCC_AXM_NCTF_7

AM32

VCC_AXM_NCTF_8

AM33

VCC_AXM_NCTF_9

AP29

VCC_AXM_NCTF_10

AP31

VCC_AXM_NCTF_11

AP32

VCC_AXM_NCTF_12

AP33

VCC_AXM_NCTF_13

AL29

VCC_AXM_NCTF_14

AL31

VCC_AXM_NCTF_15

AL32

VCC_AXM_NCTF_16

AR31

VCC_AXM_NCTF_17

AR32

VCC_AXM_NCTF_18

AR33

VCC_AXM_NCTF_19

Crestline FBGA 1299P INTEL 6019B0412201

VCC NCTF

POWER

VCC AXM NCTF

VSS_NCTF_1 VSS_NCTF_2 VSS_NCTF_3 VSS_NCTF_4 VSS_NCTF_5 VSS_NCTF_6 VSS_NCTF_7 VSS_NCTF_8

VSS_NCTF_9 VSS_NCTF_10 VSS_NCTF_11 VSS_NCTF_12 VSS_NCTF_13 VSS_NCTF_14 VSS_NCTF_15

VSS NCTF

VSS_NCTF_16 VSS_NCTF_17 VSS_NCTF_18 VSS_NCTF_19 VSS_NCTF_20 VSS_NCTF_21

VSS_SCB1 VSS_SCB2 VSS_SCB3 VSS_SCB4 VSS_SCB5 VSS_SCB6

VSS SCBVCC AXM

VCC_AXM_1 VCC_AXM_2 VCC_AXM_3 VCC_AXM_4 VCC_AXM_5 VCC_AXM_6 VCC_AXM_7

T27 T37 U24 U28 V31 V35 AA19 AB17 AB35 AD19 AD37 AF17 AF35 AK17 AM17 AM24 AP26 AP28 AR15 AR19 AR28

A3 B2 C1 BL1 BL51 A51

AT33 AT31 AK29 AK24 AK23 AJ26 AJ23

VCC_AXM<8,9,12,16,18,21,24,39>

Crestline FBGA 1299P INTEL 6019B0412201

B B

A A

Crestline FBGA 1299P INTEL 6019B0412201

Inventec Corporation

5F, No. 35, Section 2, Zhongyang South Road

5F, No. 35, Section 2, Zhongyang South Road Beitou District, Taipei 11270, Taiwan

Beitou District, Taipei 11270, Taiwan

<OrgAddr4> Title

Title

Size

Date: Sheet of

Beitou District, Taipei 11270, Taiwan TEL:+886-2-2881-0721

TEL:+886-2-2881-0721

Z11D (Merom+Crestline+ICH8M)

Document Number

Tuesday, July 31, 2007

Crestline Power(4/6)

Rev

0.4

+ 33 hidden pages

Inventec Z11D Schematic

Specifications and Main Features

Frequently Asked Questions

User Manual