Inventec Teton2 6050A2207701 Schematic

TETON2

DDRIII-Pre MV BUILD

2008.06.18

DATE

CHANGE NO.

REV

DRAWER
DESIGN
CHECK
RESPONSIBLE

SIZE =
FILE NAME :

XXXXXXXXXXXX

P/N

EE

3

XXXX-XXXXXX-XX

POWER

VER :

DATEDATE

INVENTEC

TITLE

TETON2

DOC. NUMBER

CODESIZE

A3

CS

SHEET

153

REV

A021310A22077-0-MTR

OF

TABLE OF CONTENTS

PAGE

MAINBOARD

1.COVER PAGE

2.INDEX

3.BLOCK DIAGRAM

4.POWER SEQUENCE BLOCK
5-12.SYSTEM POWER

13.CLOCK GENERATOR
14-17.CPU Merom

18.FAN & THERMAL CONTROLLER
19-25.N/B Crestline

26.DDR3 DIMM0

27.DDR3 DIMM1

28.MXM CONN

29.CRT CONN

30.HDMI & DP CONN

31.LCD CONN
32-36.S/B ICH8M

37.LAN CONTROLLER

38.RJ45 CONN

39.MINI CARD

PAGE

40.SATA HDD&ODD

41.USB CONN & eSATA

42.BLUE TOOTH & MDC CONN

43.KBC

44.AUDIO CODEC

45.AUDIO JACK

46.AUDIO AMP

47.AUDIO AMP & SPK CONN

48.SCREW

49.MB TO OTHER B CONN

50.USB BOARD

51.POWER BUTTON BOARD

52.TP BUTTON BOARD

53.HINGE LED BOARD 1 & 2

PAGE

I/O BOARD

1.EXPRESS CARD CONN

2.CARD READER CONTROLLER

HOTKEY BOARD

1.HOTKEY BOARD

CHANGE by

RDEE3

26-Jun-2008

INVENTEC

TITLE

TETON2

SIZE

CODE

DOC. NUMBER

A3

1310A22077-0-MTRA02

CS

SHEET

REV

OF

532

LCM

CPU

PENRYN

(uFCPGA)

PSB, 667/800/1066MHz

CLK GEN

ICS9LPRS365

THERMAL SENSOR

& FAN

SMsc EMC_1402

PWR Board

Batt Charger

MAIN BATT

8 Cell

HDMI

CRT

DisplayPort

MXM CARD

Type II/III

HDD

HDD

CD-ROM

eSATA

BIOS

KB / LED

TOUCH PAD

2 PICK BUTTON/

PCIE

SATA

SATA

SATA

SATA

SUPER I/O & KBC

IT8512

North Bridge

CANTIGA

1299 PCBGA

DMIx4

South Bridge

ICH9-M

676 BGA

LPC 3.3V 33MHZ

ITE

M P.57

HD Codec

REAL_ALC885/889

Azalia

DDR3 800/1066

DDR3 800/1066

PCI_Express Bus

USB 2.0

USB2.0 PORT

FingerPrint

DDR3_SODIMM0

DDR3_SODIMM1

JM385

x4

DSC

Azalia

BLUETOOTH

MDC

MDC 1.5

5 IN 1 SLOT

VER 2.0

RJ11 CNTR

Express Card

Mini Card

TV TUNER

M P.60

ANT

LOM

Controller

AR8121

RJ45

CONN

Mini Card

INTEL PRO

WIRELESS 3945ABG

ANT ANT

CIR

LINE IN

Jack

MIC IN

Jack

HP Jack
\SPDIF\

LINE OUT

G1432

Two

Speakers

G1432

Two

Speakers

G1432

One

Speakers

CHANGE by

MAX_9713

Sub

Woofer

RDEE3

26-Jun-2008

INVENTEC

TITLE

TETON2

SIZE CODE

A3

CS

SHEET

DOC. NUMBER

353

REV

A021310A22077-0-MTR

OF

+VADPTR

+VBAT

+VBATP

ADP_PRES

+V5AUXON

5/3.3V

(TPS51125)

+V5A
+V3A
+V5AL
+V3AL

+V5S

+V3S

+V2.5S

ADPRES

CHG_EN#

EC_3A_SMCLK
EC_3A_SMDATA

ACOK

(BQ24721C)

SCL
SDA

Main Battery

Charger

+VPACK

SLP_S4#_3R

SLP_S3#_3R

SLP_S3#_3R

+V1.8/+VCCP

(TPS51124)

+V1.5S

(SC412A)

+V1.8

SLP_S4#_3R

MCH_GOOD

V1.5S_PG

SLP_S3_3R

SLP_S3#

+VCCP

+V1.5S

FDS6574A

LR

(G2998F11U)

+V1.8S

+V0.9S

M_VREF

+V1.25S

PWR_GOOD_3

PM_DPRSLPVR

PSI#

V_CORE

(ADP3208)

CHANGE by

+VCC_CORE

VR_PWRGD_CK505

RDEE3 26-Jun-2008

INVENTEC

TITLE

TETON2

SIZE

A3

DOC. NUMBER

CODE

1310A22077-0-MTRA02

CS

SHEET

REV

OF

534

CN4

1

1

2

2

3

3

4

4

ACES_88334_047N_4P

C505

10pF_50v

+V3A +VPACK

5-,7-,11-,12-,31-,32-,33-,34-,35-,38-,39-,42-,43-,44-,49-

L507

NFM60R30T222

12

C685

1

1

2

2

0.01uF_25v

3

4

C523

1

10pF_50v

2

C728

1
2

0.01uF_25v

BATT_CLK

BATT_DATA

BATT_IN

43­5-,43­5-,43-

1

2

D2

UDZS5.6B

1

R546

OPEN

2

2

3

D3

AZ23C6V2

5-

CN501

1
2
3
4
5

G1

6

C2155

1000pF_50v

1

SYN_200275MR007G10VZR_7P

2

1

G2

7

+VBAT

6-,7-,8-,9-,10-,28-,31-,44-,47-

R567

31.6K_1%

CHG_EN#

BATT_CLK

BATT_DATA

1

R568

432K_1%

2

1

2

CHARGE_GND

ACPRES_R

ACPRES

Q506

1

8

D

S

2

7

3

6

4

5

G

AM4825P_AP

C2188

1
2

1

R5043

OPEN

10K_5%

2

6-

33-,43-,49-

5-,7-,11-,12-,31-,32-,33-,34-,35-,38-,39-,42-,43-,44-,49-

43-

5-,43-

5-,43-

MAX_ADPT_RST

67.84W

R545

2

1

100K_5%

1

R570

47K_5%

2

C29

1uF_10v

1

R569

100K_5%

2

CHARGE_GND

5-,7-,11-,12-,31-,32-,33-,34-,35-,38-,39-,42-,43-,44-,49-

1

2

43-

TI_LMV393IDGKR_SOP_8P

1

2

R338

100K_5%

1

2

U2-A

C522

33uF_25v

+V3A

+V3A

1

1

R548

100K_5%

2

1

R551

100K_5%

2

8

OUT

4

C28

1
2

CHARGE_GND

R566

1

10K_5%

3

+

2

-

C2189

0.1uF_25v

0.1uF_25v

2

2VREF

1
2

CHARGE_GND

5-,7-

1

R33

47K_1%

2

1

R35

26.1K_1%

2

R506

12

0.01_1%_1W

12

C2174

0.1uF_25v

C633

0.1uF_25v

12

10K_5%

R550

1
2

CHARGE_GND

1
2

1
2

C2148

0.1uF_25v

12

3

4

6

5

11

10

15

1

14
13
25

17

C2003

0.1uF_16v

U504

VCC

ACN

ACP

BYPASS#

ACDET

VREF5

AGND

TS

CHGEN#

SCL
SDA
ALARM#

IOUT

TI_BQ24721C_QFN_32P

ACDRV#

SYS

BATDRV#

PVCC

HIDRV

BTST

REGN

LODRV

PGND
SYNP
SYNN

SRP
SRN
BAT

EAO

FBO

ISYNSET

TML

2VREF +V3A

5-,7-

1

R34

47K_1%

2

1

R5111

39.2K_1%

2

2

23

24

32

30

29

PH

31

28

27
26
22
21
20
19
18

7

8

EAI

9

16
33

R10

1

0_5%

5
6

R507

12

21

SDM20U30

1

2

2

CHARGE_GND

5-,7-,11-,12-,31-,32-,33-,34-,35-,38-,39-,42-,43-,44-,49-

8

+

7

OUT

-

U2-B

TI_LMV393IDGKR_SOP_8P

4

1
2

10_5%

D5

R549

51.1K_1%

C2168

1
2

0.1uF_16v

C525

0.1uF_25v

C524

0.1uF_25v

12

1uF_25v

1

R70

200K_1%

2

12
C30

FAIR_FDMS9620S_MLP_8P

1

R69

18K_5%

2

C678

1

100pF_50v

2

1

R144

100K_5%

2

43-

Q507

Q1

1

Q2

8

1
2

MAX_ADPT

87.3W

1
2

2
3
4
9

10

SLF7055T_100M4R0_T3PF

5
6
7

1

R71

10K_1%

C667

2

56pF_50v

C666

1
2

1500pF_50v

C33

0.1uF_25v

L502

12

C16

10uF_25v_K_X5R

1
2

C35

10uF_25v_K_X5R

1
2

CHARGE_GND

1
2

10uF_25v_K_X5R

12

0.01_1%_1W

0.1uF_25v

1

C615

2

0.1uF_25v

RDEE3

C34

R503

12
C620

1
2

CHARGE_GND

R79

12

OPEN

12

C36

0.01uF_50v

C17

10uF_25v_K_X5R

C624

0.1uF_25v

26-Jun-2008

1
2
3
4

AM4825P_AP

+VPACK

5-

1
2

CHARGE_GND

Q9

8

S

D

7
6
5

G

Q504

AM4825P_AP

8

D

S

1

7

2

6

3

5

4

G

1

C631

2

0.1uF_25v

INVENTEC

TITLE

TETON2

DC &BATTERY CHANGER

CODE DOC. NUMBER

SIZE

A3

CS

SHEET

1

C19

2

0.1uF_25v

R36

12

OPEN

12

C18

0.01uF_50v

REV

A021310A22077-0-MTR

OF

553

+V3S

8-,9-,10-,11-,12-,13-,18-,19-,24-,26-,27-,28-,29-,30-,31-,32-,33-,34-,35-,39-,42-,43-,44-,49- 28-

+V5S

10-,12-,18-,28-,29-,30-,31-,33-,35-,39-,40-,43-,45-,46-,47-,49-

1
2

C64

10uF_6.3v

U7

1

POK TML

2

VEN

36

VIN

4

VPP

GMT_G966A_25ADJF11U_SOP_8P

1

C185

0.1uF_10v

2

9
8

GND

7

ADJ

VO

5

NC

1

2

1

2

R229

OPEN

R228

0_5%

+V2.5S

POWERPAD_2_0610

C63

1
2

10uF_6.3v

MAX : 1A

PAD5

R15

56.2K_1%

R14

180K_1%

+VBAT

5-,7-,8-,9-,10-,28-,31-,44-,47-

1

R16

1M_5%

2

1

2

1

2

U9
LTH

3

RESET#

VCC

4
5

GND

2

HTH

1

GMT_G680LT1_SOT23_5P

+V5LA

6-,7-,12-,43-,49-

12

C186

0.1uF_10v

R236

12

47K_5%

6-,7-

+V5AUXON

PWR_SWIN#

ARCAD_SWIN#

49-

49-

+V5LA

6-,7-,12-,43-,49-

1

R619

100K_5%

2

ACPRES_R

BATT_PWRKEEP

ALL POWER TURN OFF WHEN BATTERY MODE

33-,43-

PWR_SWIN#_3

12

3

D510

BAT54C

5-

43-

4.7K_5%

R590

1

2

Q513

SSM3K7002F

Q512

SSM3K7002F

+V5LA

6-,7-,12-,43-,49-

1

R618

100K_5%

2

Q514
G

SSM3K17FU

3

D

1

G

S

2

2

S

G

1

D

3

6-,7-

+V5AUXON

D

D

G

S

S

INVENTEC

TITLE

TETON2

+V2.5S / RESET

CS

SHEET

DOC. NUMBER

653

SIZE

CHANGE by OF

RDEE3

26-Jun-2008

A3

REVCODE

A021310A22077-0-MTR

MAX : 10A

+V3A

2

PAD7

POWERPAD_2_0610

18pF_50v

5-,11-,12-,31-,32-,33-,34-,35-,38-,39-,42-,43-,44-,49-

1

1

C256

2

1

R289

R290

13.3K_1%

0_5%

2

1

2

1

R291

20K_1%

2

C214

1uF_6.3v

4.7uF_25v

1

THER_SD#

+V5AUXON

C105

1
2

L6

CYNTEC_PCMC063_4R7

1

2

330uF_6.3v

C84

R24

18_5%

C100

1000pF_50v

12

18-

6-

C99

10uF_25v_K_X5R

1
2

Q33

FDS8884

1

2

Q34

FDS6690AS

1
2

D8

SDM20U30

21

1

SSM3K7002FU

765

8

D

G

41S23

8

5

76

D

G

S

123

4

Q18

D

G

S

+V5LA

3

2

R284

0_5%

2

1

12

R283

0_5%

6-,7-,12-,43-,49-

1

R239

100K_5%

2

Q20

G

1

SSM3K7002FU

Q19

1

G

SSM3K7002FU

R286

12

0_5%

R285

12

OPEN

C83

0.1uF_25v

TI_TPS51125_QFN_24P

+V3AL

43-

D

S

D

S

12

3

2

3

2

R23

0_5%

12

R281

12

0_5%

1

C98

10uF_10v

2

1

R5034

120K_1%

2

8
9

12

U17

R22

820K_5%

VO2
VREG3

DRVH2
LL2

0.1uF_25v

12

FDS6690AS

+VBAT

5-,6-,8-,9-,10-,28-,31-,44-,47-

POWERPAD_2_0610

G

R300

0_5%

4

12

Q36

G

41S23

PAD11

C101

8

765

10uF_25v_K_X5R

D

Q35

FDS8884

S

123

8765

D

1

1

2

2

L7

CYNTEC_PCMC063_4R7

12

1

R25

18_5%

2

1
2

C102

1000pF_50v

C85

330uF_6.3v

C106

4.7uF_25v

1

2

1
22

C216

1uF_6.3v

1

R287

31.6K_1%

2

1

R302

20K_1%

2

8-,9-,11-,12-,35-,41-,46-,47-,49-

PAD8

POWERPAD_2_0610

1

C255

2

18pF_50v

1

R288

0_5%

2

+V5A

MAX : 10A

1

R298

120K_1%

2

2VREF

5-

1

C254

0.22uF_16v

2

4

3

1

6

2

5

25

TML

VFB1

VFB2

VREF

ENTRIP2

EN0

SKIPSEL

13

1

2

14

TONSEL

GND

15

1
2

ENTRIP1

VO1

PGOOD

VBST1VBST2

DRVH1

DRVL1DRVL2

VREG5

VCLK

VIN

17

18

16

C97

2.2uF_25v

247
23
22
2110
2011

LL1

19

+V5LA

R26

0_5%

12

12

R299

0_5%

6-,7-,12-,43-,49-

1

C96

10uF_10v

2

C104

CHANGE by

INVENTEC

TITLE

TETON2

SYSTEM POWER(+V3A/+V5A)

SIZE REV

26-Jun-2008RDEE3

A3

CODE

CS

SHEET

DOC. NUMBER

OF

753

A021310A22077-0-MTR

+VBAT

5-,6-,7-,9-,10-,28-,31-,44-,47-

9-,11-,12-,33-,43-

11-

+V3S

1

R274

100K_5%

2

C240

OPEN

1
2

6-,9-,10-,11-,12-,13-,18-,19-,24-,26-,27-,28-,29-,30-,31-,32-,33-,34-,35-,39-,42-,43-,44-,49-

SLP_S3#_3R

+V1.8S_PG

1

R251

OPEN

2

12

EN

11

1
2

C218

0.1uF_10v

PGOOD

10

9

FB

R272

12

0_5%

SEMTECH_SC412A_MLPQ_16P

13

ILIM

NC2

8

SC412A_GND

15

14

NC4

NC3

RTN

NC1

6

7

12

15K_1%

7-,9-,11-,12-,35-,41-,46-,47-,49-

R19

16

U11

DH

1

LX

2

BST

3

VCCVOUT

4

DL

PAD

GND

5

17

R20

12

0_5%

+V5A

R21

12

2.2_5%

1

D12

CHENMKO_BAT54_3P

3

C73

0.1uF_25v

12

1
2

C74

1uF_6.3v

R5197

12

0_5%

R5196

12

0_5%

41S2

41S23

PAD10

POWERPAD_2_0610

C89

C88

1

1

2

2

8765

D

Q32

G

FDS8884

3

65

87

D

G

Q29

FDS6690AS

1

R255

18.2_1%

2

C221

1
2

1000pF_50v

10uF_25v_K_X5R

10uF_25v_K_X5R

12

PCMC063T_1R0MN

+V1.8S

11-,28-,41-,49-

1

10uF_6.3v

2

PAD9

POWERPAD_2_0610

MAX : 10A

C87

L5

1

C239

R271

14.3K_1%

R270

10K_1%

1
2

2

1

2

OPEN

1

C86

2

220uF_2.5v_9mR_NEC

INVENTEC

TITLE

TETON2

CHANGE by

RDEE3 26-Jun-2008

SYSTEM POWER (+V1.8S)

A3

DOC. NUMBER

CODESIZE REV

1310A22077-0-MTRA02

CS

SHEET

OF

538

+VBAT

5-,6-,7-,8-,10-,28-,31-,44-,47-

1

POWERPAD_4A

PAD2

234

C2078

OPEN

12

R334

12

10.2K_1%

R335

12

10K_1%

51124GND

51124GND

R737

12

10K_1%

C2099

OPEN

12

R739

12

4.12K_1%

+V1.5

MAX : 10A

220uF_2.5v_9mR_NEC

11-,19-,23-,24-,26-,27-

2

PAD501

3

1

4

POWERPAD_4A

C513

1

C2101

2

2

OPEN

R282

0_5%

4

41S23

765

G

65

G

8-,11-,12-,33-,43-

1

8

D

Q6

FDS8884

S

123

10uF_25v_K_X5R

87

D

Q5

FDS6690AS

SLP_S3#_3R

1
2

C7

1

R253

18.2_1%

2

1
2

1

C8

OPEN

2

12

PCMC063T_2R2MN

C707

1000pF_50v

L504

1

2

POWERPAD_4A

C514

220uF_2v_15mR_Panasonic

+VCCP

13-,14-,15-,16-,19-,20-,21-,23-,24-,32-,35-

2

PAD502

3

1

4

MAX : 8A

SLP_S4#_3R

11-,33-,43-

25
24

23

22

21

20

19

1
2

+V3S

6-,8-,10-,11-,12-,13-,18-,19-,24-,26-,27-,28-,29-,30-,31-,32-,33-,34-,35-,39-,42-,43-,44-,49-

1

R738

51124GND

100K_1%

2

11-

MCH_GOOD

C14

0.1uF_16v

R7

12

2.2_5%

7-,8-,11-,12-,35-,41-,46-,47-,49-

12

C10

1uF_6.3v

R5200

R6

10_5%

12

12

0_5%

R5201

12

0_5%

+V5A

1

C9

4.7uF_6.3v

2

R333

C12

1

4.7uF_25v

2

L503

12

PCMC063T_1R0MN

C512

1

1
2

2

10uF_6.3v

C11

1

10uF_25v_K_X5R

2

FDS8884

1

R336

18.2_1%

2

1

C184

2

1000pF_50v

87

65

D

G

Q7

R5198

12

41S23

0_5%

765

8

D

S

123

G

FDS6690AS

4

Q8

R5199

12

0_5%

+V1.5_PG

0.1uF_16v

C15

12

19-

12

2.2_5%

12

OPEN

6

4

VO2

VFB2

PGND2

13

51124GND

TRIP2

1

2

TONSEL

V5FILT

14

15

7

PGOOD2

8

R8

EN2

9

VBST2

10

DRVH2

11

LL2

12

DRVL2

R5117

13.7K_1%

R5

12

0_5%

U1

1

253

VO1

GND

VFB1

GND

PGOOD1

EN1

VBST1

DRVH1

LL1

DRVL1

PGND1

TRIP1

V5IN

18

17

16

TI_TPS51124RGER_QFN_24P

1

R5007

14.3K_1%

2

INVENTEC

TITLE

TETON2

SYSTEM POWER(+V1.5 / +VCCP)

CHANGE by

RDEE3

26-Jun-2008

SIZE

A3

CODE

CS

SHEET

DOC. NUMBER

953

REV

A021310A22077-0-MTR

OF

PWR_GOOD_3

CLK_PWRGD

C2012

1

2

1000pF_50v

VCOREGND

H_VID6
H_VID5
H_VID4
H_VID3
H_VID2
H_VID1
H_VID0

H_DPRSTP#

PM_DPRSLPVR

R5010

0_5%

12

11-,18-,28-,43-

+V3S

6-,8-,9-,11-,12-,13-,18-,19-,24-,26-,27-,28-,29-,30-,31-,32-,33-,34-,35-,39-,42-,43-,44-,49-

R5048

12

10K_5%

13-,33-

2

C2013

330pF_50v

12

R5008

1.65K_1%

R525

0_5%

R526

0_5%

33-

1

R5011

OPEN

12

12

C2014

220pF_25v

1

2

VR_PWRGD

16­16­16­16­16­16­16-

PSI#

12

C2015

0.012uF_16v

CSREF

16-

16-

15-

15-,19-,32-

19-,33-

R5013 OPEN

12

R5012

12

68.1K_1%

1
2

680pF_50v

VCOREGND

10-

VCCSENSE

VSSSENSE

TP9078

TP9075

TP9079

TP9076

TP9080

TP9077

TP9081

R5015

12

499_1%

VCOREGND

VCOREGND

C2018

4700pF_25v

12

1

C2016

18pF_50v

2

1

C2017

2

+V5S

6-,10-,12-,18-,28-,29-,30-,31-,33-,35-,39-,40-,43-,45-,46-,47-,49-

1000pF_50v

1

EN

2

PWRGD

3

PGDELAY

4

CLKEN

5

FBRTN

6

FB

7

COMP

8

SS

ADI_ADP3208_LFCSP_48P

9

ST

10

VARFREQ

11

VRTT

12

TTSEN

R5017

105K_1%

1

C2019

2

VCOREGND

49

48

TML

U500

13

VCOREGND

47

DPRSLP

DPRSTP

PMON

PMONFS

14

+VBAT

5-,6-,7-,8-,9-,10-,28-,31-,44-,47-

+V5S

6-,10-,12-,18-,28-,29-,30-,31-,33-,35-,39-,40-,43-,45-,46-,47-,49-

2

R2

10_5%

1

1

2

C1

2.2uF_6.3v

R1

12

0_5%

VCOREGND

VID1

VID243VID3

CSCOMP

CSFEF19CSSUM

18

1
2

42

41

40

39

VID4

VID5

VRPM

RAMP20RPM22RT

21

2

1

1000pF_50v

C2020

2200pF_50v

37

SP

VCC

VID6

BST1

DRVH1

PVCC1

DRVL1
PGND1
PGND2

DRVL2

PVCC2

DRVH2

BST2

GND

23 38

24

R5021

237K_1%

12

R5019

80.6K_1%

12

1000pF_50v

R5022

274K_1%

2

C2023

1
2

36
35
34

SW1

33
32
31
30
29
28
27

SW2

26
25

C2021

VCOREGND

1

1
2

VCOREGND

R5024

12

100K_1%

R5025

12

100K_1%

R5023

12

120K_1%

C2022

OPEN

1
2

C3

2.2uF_6.3v

R5027

1

1K_1%

2

R5028

76.8K_1%

1

45

44

46

PSI

VID0

CLIM

LLINE

15

16

17

1

2

R3

2.2_5%

2

1

12

R4

2.2_5%

+VBAT

2

D1

3

BAT54A

0.1uF_16v

0.1uF_16v

1

2

NTC thermistor,place near L501

2

1

C4

1 1

2

C2

1
2

2.2uF_6.3v

12

C5

5-,6-,7-,8-,9-,10-,28-,31-,44-,47-

R502

220K_5%

1

C500

2

68uF_25v

PAD500

POWERPAD_2_0610

C502

1
2

10uF_25v_K_X5R

C506

1
2

10uF_25v_K_X5R

C503

1
2

10uF_25v_K_X5R

1

1

C508

2

2

0.01uF_50v

C501

1
2

0.01uF_50v

R5202

12

0_5%

Q500

FDMS8660S

R5203

12

0_5%

C509

10uF_25v_K_X5R

R5204

12

0_5%

R5205

12

0_5%

+VBAT_CPU

G

4321

65

G

4

G

4

G

4

56789

Q501

SI7686DP_T1_E3

9

8

7

D

1S23

56789

Q502

SI7686DP_T1_E3

321

9

765

8

D

Q503

FDMS8660S

S

123

R500

18_5%

C504

1000pF_50v

C507

1000pF_50v

ETQP4LR36WFC_PANASONIC

1

2

1
2

2

R501

18_5%

1

2
1

L501

1

2

2
R5032

10_1%

10-

CSREF

2
R5033

10_1%

1

L500

1

ETQP4LR36WFC_PANASONIC

2

MAX : 44A

+VCC_CORE

16-

INVENTEC

TITLE

TETON2

CPU POWER(VCC_CORE)

SIZE

26-Jun-2008RDEE3

A3

DOC. NUMBERCODE

CS

10 53

REV

A021310A22077-0-MTR

OFSHEETCHANGE by

SLP_S4#_3R

9-,33-,43-

SLP_S3#_3R

8-,9-,12-,33-,43-

+V1.5

9-,19-,23-,24-,26-,27-

1
2

10uF_6.3v

C26

NOTE: DDR3 REGULATOR

1

2

C675

1
2

R68

0_5%

0.1uF_10v

1

R67

OPEN

2

U4

1

GND

VTT

2

EN

VTT_IN

3

VCC

VTTS

4

VDDQVREF

TML-PAD

GMT_G2998F11U_SOP_8P

R5175

12

0_5%

R5176

1

0_5%

R5177

12

0_5%

R5178

12

0_5%

7-,8-,9-,11-,12-,35-,41-,46-,47-,49-

+V5A

8

7

6

5
9

1
2

2

+V1.5S_PG

MCH_GOOD

C27

1uF_6.3v

POWERPAD_2_0610

1

C24

10uF_6.3v

2

19-

M_VREF

27-

M_VREF_CA_DIMM1

26-

M_VREF_CA_DIMM0

27-

M_VREF_DQ_DIMM1

26-

M_VREF_DQ_DIMM0

11-

9-

+V0.75S

PAD4

1
2

BAT54A

26-,27-

MAX : 2A

C25

10uF_6.3v

2

D14 3

1

6-,8-,9-,10-,11-,12-,13-,18-,19-,24-,26-,27-,28-,29-,30-,31-,32-,33-,34-,35-,39-,42-,43-,44-,49-

R5172

12

+V1.8S_PG

+V3S

6-,8-,9-,10-,11-,12-,13-,18-,19-,24-,26-,27-,28-,29-,30-,31-,32-,33-,34-,35-,39-,42-,43-,44-,49-

1

R273

100K_5%

2

C242

1
2

0.1uF_16v

8-

+V3A

5

2

3

0_5%

5-,7-,12-,31-,32-,33-,34-,35-,38-,39-,42-,43-,44-,49-

U15

4

PHP_74LVC1G17_SOT753_5P

7-,8-,9-,11-,12-,35-,41-,46-,47-,49-

1

C2205

OPEN

2

C241

1
2

0.1uF_10v

10-,18-,28-,43-

+V5A

+V3S

1

2

8-,28-,41-,49-

1
2

C2206

1uF_10v

R5171

100K_5%

6

U12

VCNTL

7

POK

VOUT
VOUT

82

EN

VIN

GND

9

1

ANPEC_APL5912_KAC_TRL_SOP_8P

11-

+V1.5S_PG

PWR_GOOD_3

+V1.8S

VIN

FB

1
2

22uF_6.3v

5

3
4

C75

C68

22uF_6.3v

1

C2208

2

1uF_10v

1
2

1
2

C2210

39pF_50v

1

R5173

9.1K_1%

2

1

R5174

10K_1%

2

SLP_S3_3R

PAD6

POWERPAD_2_0610

12-

SSM3K7002FU

+V1.5S

Q30

G

1

16-,24-,33-,35-,39-,49-

MAX : 5A

1

R5183

200_5%

2

3

D

S

2

RDEE3 26-Jun-2008

INVENTEC

TITLE

TETON2

+V0.75S / +V1.5S / POWER GOOD

CODE

SIZE REVDOC. NUMBER

A3

1310A22077-0-MTRA02

CS

SHEET

OFCHANGE by

5311

+V5A

7-,8-,9-,11-,35-,41-,46-,47-,49-

SLP_S3#_3R

SLP_S3_3R

8-,9-,11-,33-,43-

11-

Q22

G

G

SSM3K17FU

+V5LA

6-,7-,43-,49-

1

R242

10K_5%

2

D

D

S

S

D10

13

CHENMKO_BAT54_3P

R243

12

220K_5%

D9

13

CHENMKO_BAT54_3P

R240

12

220K_5%

+V3A

Q28

1

4

S

D

2
5
6

3

G

TPC6104

Q27

4

1

D

S

2
5

3

6

G

TPC6104

C208

1
2

1000pF_50v

SSM3K17FU

5-,7-,11-,31-,32-,33-,34-,35-,38-,39-,42-,43-,44-,49-

Q25

4

1

S

D

2
5

3

6

G

TPC6104

Q26

4

1

S

D

2
5

3

6

G

TPC6104

C207

OPEN

12

Q21

G

G

SSM3K17FU

+V5S

6-,10-,18-,28-,29-,30-,31-,33-,35-,39-,40-,43-,45-,46-,47-,49-

MAX : 8A

1

R18

200_5%

2

Q23

D

D

G

G

S

S

1
2

C72

10uF_6.3v

+V3S

MAX : 6A

C71

1
2

10uF_6.3v

1

R17

200_5%

2

D

D

S

S

INVENTEC

TITLE

TETON2

POWER(+V3S / +V5S)

SIZE

CODE

CS

SHEET

DOC. NUMBER

12 53

CHANGE by OF

26-Jun-2008RDEE3

A3

REV

A021310A22077-0-MTR

+VCCP

CPU_BSEL1

CPU_BSEL2

CLK_R3S_ICH14

Reserve for EMI

+V3S

CLKREQ_R_MCH#

FSB

FSA

1

1
0

1

9-,13-,14-,15-,16-,19-,20-,21-,23-,24-,32-,35-

L510

BLM11A121S

1

15-,19­15-,19­33-

R48

12

10K_5%

19-

FSB CLOCKFSC
FREQUENCY

0
0
000 1066 266

667
800

Layout note: All decoupling 0.1uF disperse closed to pin

2

C538

1

10uF_10v

2

9-,13-,14-,15-,16-,19-,20-,21-,23-,24-,32-,35-

12

R61

12

R252

R62

475_1%

HOST CLOCK
FREQUENCY

*CLKREQ# pin controls SRC Table.

Byte5: bit6 =0(PWD)

SRC0

CR#_A

Byte5: bit7=0, disable CR#_A; 1,enable CR#_A

Byte5: bit2 =0(PWD)

SRC0

CR#_C

Byte5: bit3=0, disable CR#_C; 1,enable CR#_C

Byte5: bit6 =1

SRC2

Byte5: bit2 =1

SRC2

+VCCP

10K_5%

33_5%

10K_5%_OPEN12

2

166
200

C771

1

1

0.1uF_16v

2

2

1

R60

10K_5%_OPEN

2

R49

1

CLK_PWRGD

6-,8-,9-,10-,11-,12-,13-,18-,19-,24-,26-,27-,28-,29-,30-,31-,32-,33-,34-,35-,39-,42-,43-,44-,49-

CLK_R3S_ICH48

CLK_REF14

CLKREQ_R_SATA#

6-,8-,9-,10-,11-,12-,13-,18-,19-,24-,26-,27-,28-,29-,30-,31-,32-,33-,34-,35-,39-,42-,43-,44-,49-

+V3S

R50

12

10K_5%

10-,33-

ICH_3S_SMCLK

ICH_3S_SMDATA

CR#_B

CR#_D

C2108

0.1uF_16v

R51

12

2.2K_5%

12

R58

12

1

C2228

2

33pF_50v

C622

1

0.1uF_16v

2

R53

OPEN

R52

OPEN

33_5%

R241

10K_5%

R254

12

0_5%_OPEN

12

C626

C623

1

0.1uF_16v

0.1uF_16v

2

9-,13-,14-,15-,16-,19-,20-,21-,23-,24-,32-,35-

CPU_BSEL0

R54

10K_5%_OPEN

26-,27-,33-,37­26-,27-,33-,37-

14.31818MHZ

12

1

C665

33pF_50v

2

15-,19-

33-

+V3S

33-

12

X1

30PPM

1
2

Please place close to CLKGEN within 500mils

Byte5: bit4 =0(PWD)

SRC1

Byte5: bit4 =1

SRC4

Byte5: bit5=0, disable CR#_B; 1,enable CR#_B

Byte5: bit0 =0(PWD)

SRC1

Byte5: bit0 =1

SRC4

Byte5: bit1=0, disable CR#_D; 1,enable CR#_D

+VCCP

2

1

2

1

C625

1

0.1uF_16v

2

CLK_ICH48

475_1%

CLKREQ_MCH#

0_5%R59

12

R244

CR#_E

CR#_F

CR#_G

CR#_H

+V3S

6-,8-,9-,10-,11-,12-,13-,18-,19-,24-,26-,27-,28-,29-,30-,31-,32-,33-,34-,35-,39-,42-,43-,44-,49-

Layout note: All decoupling 0.1uF disperse closed to pin

L505

BLM11A121S

1

2

C517

1
2

10uF_10v

U3

26

VDDSRC_IO

45

VDDSRC_IO

CLKREQ_SATA#

36

VDDSRC_IO

12

VDD96_IO

39

VDDSRC_IO

61

VDDREF

20

VDDPLL3_IO

49

VDDCPU_IO

9

VDD48

2

VDDPCI

55

VDDCPU

16

VDD

10

SUB_48MHZ_FSLA

57

FSLB_TEST_MODE

62

REF0_FSLC_TEST_SEL

1

PCI0_CR#_A

3

PCI1_CR#_B

4

PCI2_TME

5

PCI3

56

CK_PWRGD_PD#

64

SCLK

63

SDTAT

60

X1

59

X2

8

GNDPCI

11

GND48

15

GND

19

GND

23

GNDSRC

29

GNDSRC

42

GNDSRC

58

GNDREF

52

GNDCPU

ICS_ICS9LPRS365_TSSOP_64P

PCI_STOP#

CPU_STOP#

CPUT1_F

CPUC1_F

CPUT2_ITP_SRCT8

CPUC2_ITP_SRCC8

SRCT11_CR#_H
SRCC11_CR#_G

SRCT7_CR#_F

SRCC7_CR#_E

PCI4_27_Select
PCI_F5_ITP_EN

SRCT3_CR#_C

SRCC3_CR#_D

SRCT2_SATAT
SRCC2_SATAC

27MHz_NonSS_SRCT1_SE1

27MHz_SS_SRCC1_SE2

SRCC0_DOTT_96
SRCT0_DOTC_96

Byte6: bit7=0, disable CR#_E; 1,enable CR#_E

SRC6

Byte6: bit6=0, disable CR#_F; 1,enable CR#_F

SRC8

Byte6: bit5=0, disable CR#_G; 1,enable CR#_G

SRC9

Byte6: bit4=0, disable CR#_H; 1,enable CR#_H

SRC10

CPUT0
CPUC0

SRCT10
SRCC10

SRCT9
SRCC9

SRCT6
SRCC6

SRCT4
SRCC4

NC

C2116

1
2

0.1uF_16v

48

38
37

51
50

54
53

47
46

ICH_NEWCARD_R_CLKEN#

33

CLKREQ_MINI1#_R

32

34
35

30
31

44
43

41
40

6

CLK_3S_ICHPCI

7

27
28

24
25

21
22

17
18

13
14

C774

1

1

2

2

0.1uF_16v

CLK_3S_MINICARDPCI

12

R55

12.1_1%

CLK_3S_ICHPCI

C773

0.1uF_16v

6-,8-,9-,10-,11-,12-,13-,18-,19-,24-,26-,27-,28-,29-,30-,31-,32-,33-,34-,35-,39-,42-,43-,44-,49-

C775

C621

1
2

0.1uF_16v

33_5%

C2119

1
2

0.1uF_16v

475_1%

12

475_1%

12

CLK_R3S_MINICARDPCI

12

12.1_1%

R56

R45

12

10K_5%

R47

12

+V3S

6-,8-,9-,10-,11-,12-,13-,18-,19-,24-,26-,27-,28-,29-,30-,31-,32-,33-,34-,35-,39-,42-,43-,44-,49-

0_5%_OPEN

R46

12

10K_5%

26-Jun-2008RDEE3

R84

10K_5%

R83
R80

1
2

0.1uF_16v

12

R57

CHANGE by

+V3S

1

1

R82

10K_5%

2

2

33­33-

21­21-

14­14-

49­49-

49-

39-

49­49-

39­39-

39­39-

33­33-

39­34­43­19­19-

37­37-

32­32-

28­28-

27_Selet =0

LCD_SST 100MHZ

27_Selet =1

27MHZ non-spread clock

INVENTEC

TITLE

TETON2

CLOCK_GENERATOR

CODE

SIZE

A3

CS

SHEET

PCISTOP#_3
CPUSTOP#_3

CLK_R_MCHBCLK
CLK_R_MCHBCLK#

CLK_R_CPUBCLK
CLK_R_CPUBCLK#

CLK_R_PCIE_READER
CLK_R_PCIE_READER#

CLKREQ_R_NEWCARD#
CLK_REQ_MINI1#

CLK_R_PCIE_CARD
CLK_R_PCIE_CARD#

CLK_R_PCIE_MINI1
CLK_R_PCIE_MINI1#

CLK_R_PCIE_MINI2
CLK_R_PCIE_MINI2#

CLK_R_PCIE_ICH
CLK_R_PCIE_ICH#

CLK_R3S_MINICARDPCI
CLK_R3S_ICHPCI
CLK_R3S_KBPCI
CLK_R_PEG_MCH
CLK_R_PEG_MCH#

CLK_R_PCIE_LAN
CLK_R_PCIE_LAN#

CLK_R_SATA1
CLK_R_SATA1#

CLK_R_PEG_REF
CLK_R_PEG_REF#

DOC. NUMBER

OF

13 53

REV

A021310A22077-0-MTR

H_A#(35:3)

H_ADSTB#1

H_STPCLK#

H_A20M#
H_FERR#

H_IGNNE#

H_INTR

H_NMI

H_SMI#

21-

H_A#(3)
H_A#(4)
H_A#(5)
H_A#(6)
H_A#(7)
H_A#(8)
H_A#(9)
H_A#(10)
H_A#(11)
H_A#(12)
H_A#(13)
H_A#(14)
H_A#(15)
H_A#(16)

H_A#(17)
H_A#(18)
H_A#(19)
H_A#(20)
H_A#(21)
H_A#(22)
H_A#(23)
H_A#(24)
H_A#(25)
H_A#(26)
H_A#(27)
H_A#(28)
H_A#(29)
H_A#(30)
H_A#(31)
H_A#(32)
H_A#(33)
H_A#(34)
H_A#(35)

21-

32­32­32-

32­32­32­32-

H_REQ#(4:0)

21-

H_REQ#(0)
H_REQ#(1)
H_REQ#(2)
H_REQ#(3)
H_REQ#(4)

H_ADSTB#0

21-

CN502-1

J4

478

A3#

L5

A4#

L4

A5#

K5

A6#

M3

A7#

N2

A8#

J1

A9#

N3

A10#

P5

A11#

P2

A12#

L2

A13#

P4

A14#

P1

A15#

R1

A16#

M1

ADSTB0#

K3

REQ0#

H2

REQ1#

K2

REQ2#

J3

REQ3#

L1

REQ4#

Y2

A17#

U5

A18#

R3

A19#

W6

A20#

U4

A21#

Y5

A22#

U1

A23#

R4

A24#

T5

A25#

T3

A26#

W2

A27#

W5

A28#

Y4

A29#

U2

A30#

V4

A31#

W3

A32#

AA4

A33#

AB2

A34#

AA3

A35#

V1

ADSTB1#

A6

A20M#

A5

FERR#

C4

IGNNE#

D5

STPCLK#

C6

LINT0

B4

LINT1

A3

SMI#

M4

RSVD01

N5

RSVD02

T2

RSVD03

V3

RSVD04

B2

RSVD05

C3

RSVD06

D2

RSVD07

D22

RSVD08

D3

RSVD09

F6

RSVD010

FOX_PZ4782K_274M_41_478P

GMCH CPU

ADS#
BNR#
BPRI#

DEFER#

DRDY#
DBSY#

BR0#

IERR#

ADDR GROUP 0

INIT#

CONTROL

LOCK#

RESET#

RS0#
RS1#
RS2#

TRDY#

HIT#

HITM#

BPM0#
BPM1#
BPM2#
BPM3#
PRDY#
PREQ#

TCK

TDI

ADDR GROUP 1

TDO
TMS

XDP/ITP SIGNALS

TRST#

DBR#

THERMAL

PROCHOT#

THERMDA
THERMDC

THERMTRIP#

ICH

H CLK

BCLK0
BCLK1

RESERVED

ICH8

H1
E2
G5

H5
F21
E1

F1

D20
B3

H4

C1
F3
F4
G3
G2

G6
E4

AD4
AD3
AD1
AC4
AC2
AC1
AC5
AA6
AB3
AB5
AB6
C20

R594

9-,13-,14-,15-,16-,19-,20-,21-,23-,24-,32-,35-

2

56_5%

D21
A24
B25

C7

A22
A21

1

+VCCP

10mils/10mils

+VCCP

21-

H_ADS#

21-

H_BNR#

21-

H_BPRI#

21-

H_DEFER#

21-

H_DRDY#

21-

H_DBSY#

21-

H_BREQ#0

32-

H_INIT#

21-

H_LOCK#

21-

H_CPURST#

21-

H_TRDY#

21-

H_HIT#

21-

H_HITM#

14-

H_BPM5_PREQ#

14-

H_TCK

14-

TDI_FLEX

14-

H_TMS

33-

XDP_DBRESET#

18-

H_THERMDA

18-

H_THERMDC

18-,19-,32-

PM_THRMTRIP#

13-

CLK_R_CPUBCLK

13-

CLK_R_CPUBCLK#

+VCCP

9-,13-,14-,15-,16-,19-,20-,21-,23-,24-,32-,35-

R554

R555

R556

R542

+VCCP

9-,13-,14-,15-,16-,19-,20-,21-,23-,24-,32-,35-

1

R571

56_5%

2

CLOSED TO CPU

21-

H_RS#(0)
H_RS#(1)
H_RS#(2)

H_RS#(0:2)

H_TRST#

1

R559

56_5%

2

56_5%

14-

1

2

56_5%

1

2

56_5%

1

2

56_5%

1

2

14-

14-

14-

H_BPM5_PREQ#

TDI_FLEX

H_TMS

H_TCK

PM_THRMTRIP# should be T at CPU

CHANGE by

RDEE3

26-Jun-2008

INVENTEC

TITLE

TETON2

Penryn (1/4)

DOC. NUMBERSIZE

CODE

A3

1310A22077-0-MTRA02

CS

SHEET

REV

OF

5314

H_D#(63:0)

H_DSTBN#0
H_DSTBP#0

H_DINV#0

H_D#(63:0)

+VCCP

9-,13-,14-,16-,19-,20-,21-,23-,24-,32-,35-

1

R538

1K_1%

2

1

2

R537

2K_1%

GTLREF

Layout note: Zo=55 ohm,

0.5" max for GTLREF.

15-,21-

21­21­21-

15-,21-

H_DSTBN#1
H_DSTBP#1

H_DINV#1

CPU_BSEL1
CPU_BSEL2

CN502-2

478

H_D#(0)
H_D#(1)
H_D#(2)
H_D#(3)
H_D#(4)
H_D#(5)
H_D#(6)
H_D#(7)
H_D#(8)
H_D#(9)
H_D#(10)
H_D#(11)
H_D#(12)
H_D#(13)
H_D#(14)
H_D#(15)

H_D#(16)
H_D#(17)
H_D#(18)
H_D#(19)
H_D#(20)
H_D#(21)
H_D#(22)
H_D#(23)
H_D#(24)
H_D#(25)
H_D#(26)
H_D#(27)
H_D#(28)
H_D#(29)
H_D#(30)
H_D#(31)

21- 21­21- 21­21-

13-,19­13-,19­13-,19-

E22

D0#

F24

D1#

E26

D2#

G22

D3#

F23

D4#

G25

D5#

E25

D6#

E23

D7#

K24

D8#

G24

DATA GRP 0

D9#

J24

D10#

J23

D11#

H22

D12#

F26

D13#

K22

D14#

H23

D15#

J26

DSTBN0#

H26

DSTBP0#

H25

DINV0#

N22

D16#

K25

D17#

P26

D18#

R23

D19#

L23

D20#

M24

D21#

L22

D22#

M23

D23#

P25

D24#

P23

D25#

P22

DATA GRP 1

D26#

T24

D27#

R24

D28#

L25

D29#

T25

D30#

N25

D31#

L26

DSTBN1#

M26

DSTBP1#

N24

DINV1#

AD26

GTLREF

C23

TEST1

D25

TEST2

C24

TEST3

MISC

AF26

TEST4

AF1

TEST5

A26

TEST6

B22

BSEL0

B23

BSEL1

C21

BSEL2

FOX_PZ4782K_274M_41_478P

D32#
D33#
D34#
D35#
D36#
D37#
D38#
D39#
D40#

DATA GRP 2DATA GRP 3

D41#
D42#
D43#
D44#
D45#
D46#
D47#

DSTBN2#

DSTBP2#

DINV2#

D48#
D49#
D50#
D51#
D52#
D53#
D54#
D55#
D56#
D57#
D58#
D59#
D60#
D61#
D62#
D63#

DSTBN3#

DSTBP3#

DINV3#

COMP0
COMP1
COMP2
COMP3

DPRSTP#

DPSLP#

DPWR#

PWRGOOD

SLP#

PSI#

Y22
AB24
V24
V26
V23
T22
U25
U23
Y25
W22
Y23
W24
W25
AA23
AA24
AB25
Y26
AA26
U22

AE24
AD24
AA21
AB22
AB21
AC26
AD20
AE22
AF23
AC25
AE21
AD21
AC22
AD23
AF22
AC23
AE25
AF24
AC20

R26
U26
AA1
Y1

E5
B5
D24
D6
D7
AE6

(18mil)

(5mil)

(18mil)

(5mil)

H_D#(32)
H_D#(33)
H_D#(34)
H_D#(35)
H_D#(36)
H_D#(37)
H_D#(38)
H_D#(39)
H_D#(40)
H_D#(41)
H_D#(42)
H_D#(43)
H_D#(44)
H_D#(45)
H_D#(46)
H_D#(47)

H_D#(48)
H_D#(49)
H_D#(50)
H_D#(51)
H_D#(52)
H_D#(53)
H_D#(54)
H_D#(55)
H_D#(56)
H_D#(57)
H_D#(58)
H_D#(59)
H_D#(60)
H_D#(61)
H_D#(62)
H_D#(63)

12

R552 27.4_1%

12

R553 54.9_1%

12

27.4_1%R558

2

1

R557 54.9_1%

10-,19-,32-

32­21­32­21­10-

H_DSTBN#3
H_DSTBP#3

21-

H_DINV#3

CLOSED TO CPU

H_DPRSTP#

H_DPSLP#

H_DPWR#
H_PWRGD
H_CPUSLP#CPU_BSEL0
PSI#

15-,21-

15-,21-

21­21­21-

H_D#(63:0)

H_DSTBN#2
H_DSTBP#2
H_DINV#2

H_D#(63:0)

1

2

R593

OPEN

1

2

R592

OPEN

C604

1

OPEN

2

Place C604 close to the TEST4 pin.
Make sure TEST4 routing is reference
to GND and away from other noisy signals.

INVENTEC

TITLE

TETON2

Penryn (2/4)

CODE

SIZE

A3

CHANGE by SHEET

26-Jun-2008RDEE3

CS

OF

15 53

REVDOC. NUMBER

A021310A22077-0-MTR

C516

1
2

22uF_6.3v_OPEN

+VCC_CORE

C515

1
22

22uF_6.3v_OPEN

C530

1
2

22uF_6.3v_OPEN

C529

1

22uF_6.3v_OPEN

C527

1
2

22uF_6.3v_OPEN

1

3

2

C21

900uF_2.5v

CN502-3

A7

478

VCC001

A9

VCC002

A10

VCC003

A12

VCC004

A13

VCC005

A15

VCC006

A17

VCC007

A18

VCC008

A20

VCC009

B7

VCC010

B9

VCC011

B10

VCC012

B12

VCC013

B14

VCC014

B15

VCC015

B17

VCC016

B18

VCC017

B20

VCC018

C9

VCC019

C10

VCC020

C12

VCC021

C13

VCC022

C15

VCC023

C17

VCC024

C18

VCC025

D9

VCC026

D10

VCC027

D12

VCC028

D14

VCC029

D15

VCC030

D17

VCC031

D18

VCC032

E7

VCC033

E9

VCC034

E10

VCC035

E12

VCC036

E13

VCC037

E15

VCC038

E17

VCC039

E18

VCC040

E20

VCC041

F7

VCC042

F9

VCC043

F10

VCC044

F12

VCC045

F14

VCC046

F15

VCC047

F17

VCC048

F18

VCC049

F20

VCC050

AA7

VCC051

AA9

VCC052

AA10

VCC053

AA12

VCC054

AA13

VCC055

AA15

VCC056

AA17

VCC057

AA18

VCC058

AA20

VCC059

AB9

VCC060

AC10

VCC061

AB10

VCC062

AB12

VCC063

AB14

VCC064

AB15

VCC065

AB17

VCC066

AB18

VCC067

FOX_PZ4782K_274M_41_478P

VCC068
VCC069
VCC070
VCC071
VCC072
VCC073
VCC074
VCC075
VCC076
VCC077
VCC078
VCC079
VCC080
VCC081
VCC082
VCC083
VCC084
VCC085
VCC086
VCC087
VCC088
VCC089
VCC090
VCC091
VCC092
VCC093
VCC094
VCC095
VCC096
VCC097
VCC098
VCC099

VCC0100

VCCP01
VCCP02
VCCP03
VCCP04
VCCP05
VCCP06
VCCP07
VCCP08
VCCP09
VCCP10
VCCP11
VCCP12
VCCP13
VCCP14
VCCP15
VCCP16

VCCA01
VCCA02

VCCSENSE

VSSSENSE

+VCC_CORE

10-,16-10-,16-

AB20
AB7
AC7
AC9
AC12
AC13
AC15
AC17
AC18
AD7
AD9
AD10
AD12
AD14
AD15
AD17
AD18
AE9
AE10
AE12
AE13
AE15
AE17
AE18
AE20
AF9
AF10
AF12
AF14
AF15
AF17
AF18
AF20

G21
V6
J6
K6
M6
J21
K21
M21
N21
N6
R21
R6
T21
T6
V21
W21

B26
C26

AD6

VID0

AF5

VID1

AE5

VID2

AF4

VID3

AE3

VID4

AF3

VID5

AE2

VID6

AF7

AE7

+VCCP

9-,13-,14-,15-,16-,19-,20-,21-,23-,24-,32-,35-

1

C528

220uF_2v_15mR_Panasonic

2

10-

H_VID0

10-

H_VID1

10-

H_VID2

10-

H_VID3

10-

H_VID4

10-

H_VID5

10-

H_VID6

+VCC_CORE

10-,16-

1

R540

100_1%

2

1

R541

100_1%

2

10-

10-

+VCCP

9-,13-,14-,15-,16-,19-,20-,21-,23-,24-,32-,35-

C2089

1
2

0.1uF_16v

VCCSENSE

VSSSENSE

C2084

1
2

0.1uF_16v

LAYOUT NOTE:
PLACE C619 NEAR PIN B26

PLACE THESE INSIDE SOCKET
CAVITY ON L8 (NORTH SIDE
SECONDARY)

C2098

0.1uF_16v

C2111

1
2

0.1uF_16v

11-,24-,33-,35-,39-,49-

1
2

0.01uF_16v

C619

1
2

+V1.5S

1
2

C2231

0.1uF_16v

C2233

1
2

0.1uF_16v

1

C537

10uF_6.3v

2

LAYOUT NOTE:
ROUTE VCCSENSE AND VSSSENSE TRACE AT

24.7 OHM WITH 50 MIL SPACEING
PLACE PU AND PD WITHIN I INCH OF CPU

CHANGE by

INVENTEC

TITLE

TETON2

Penryn (3/4)

CODE

CS

SHEET

DOC. NUMBER

OF

16 53

REV

A021310A22077-0-MTR

SIZE

26-Jun-2008RDEE3

A3

CN502-4

A4

478

VSS001

A8

VSS002

A11

VSS003

A14

VSS004

A16

VSS005

A19

VSS006

A23

VSS007

AF2

VSS008

B6

VSS009

B8

VSS010

B11

VSS011

B13

VSS012

B16

VSS013

B19

VSS014

B21

VSS015

B24

VSS016

C5

VSS017

C8

VSS018

C11

VSS019

C14

VSS020

C16

VSS021

C19

VSS022

C2

VSS023

C22

VSS024

C25

VSS025

D1

VSS026

D4

VSS027

D8

VSS028

D11

VSS029

D13

VSS030

D16

VSS031

D19

VSS032

D23

VSS033

D26

VSS034

E3

VSS035

E6

VSS036

E8

VSS037

E11

VSS038

E14

VSS039

E16

VSS040

E19

VSS041

E21

VSS042

E24

VSS043

F5

VSS044

F8

VSS045

F11

VSS046

F13

VSS047

F16

VSS048

F19

VSS049

F2

VSS050

F22

VSS051

F25

VSS052

G4

VSS053

G1

VSS054

G23

VSS055

G26

VSS056

H3

VSS057

H6

VSS058

H21

VSS059

H24

VSS060

J2

VSS061

J5

VSS062

J22

VSS063

J25

VSS064

K1

VSS065

K4

VSS066

K23

VSS067

K26

VSS068

L3

VSS069

L6

VSS070

L21

VSS071

L24

VSS072

M2

VSS073

M5

VSS074

M22

VSS075

M25

VSS076

N1

VSS077

N4

VSS078

N23

VSS079

N26

VSS080

P3

VSS081

FOX_PZ4782K_274M_41_478P

VSS082
VSS083
VSS084
VSS085
VSS086
VSS087
VSS088
VSS089
VSS090
VSS091
VSS092
VSS093
VSS094
VSS095
VSS096
VSS097
VSS098
VSS099
VSS100
VSS101
VSS102
VSS103
VSS104
VSS105
VSS106
VSS107
VSS108
VSS109
VSS110
VSS111
VSS112
VSS113
VSS114
VSS115
VSS116
VSS117
VSS118
VSS119
VSS120
VSS121
VSS122
VSS123
VSS124
VSS125
VSS126
VSS127
VSS128
VSS129
VSS130
VSS131
VSS132
VSS133
VSS134
VSS135
VSS136
VSS137
VSS138
VSS139
VSS140
VSS141
VSS142
VSS143
VSS144
VSS145
VSS146
VSS147
VSS148
VSS149
VSS150
VSS151
VSS152
VSS153
VSS154
VSS155
VSS156
VSS157
VSS158
VSS159
VSS160
VSS161
VSS162
VSS163

P6
P21
P24
R2
R5
R22
R25
T1
T4
T23
T26
U3
U6
U21
U24
V2
V5
V22
V25
W1
W4
W23
W26
Y3
Y6
Y21
Y24
AA2
AA5
AA8
AA11
AA14
AA16
AA19
AA22
AA25
AB1
AB4
AB8
AB11
AB13
AB16
AB19
AB23
AB26
AC3
AC6
AC8
AC11
AC14
AC16
AC19
AC21
AC24
AD2
AD5
AD8
AD11
AD13
AD16
AD19
AD22
AD25
AE1
AE4
AE8
AE11
AE14
AE16
AE19
AE23
AE26
A2
AF6
AF8
AF11
AF13
AF16
AF19
AF21
A25
AF25

CHANGE by

INVENTEC

TITLE

TETON2

Penryn (4/4)

CODE

CS

SHEET

DOC. NUMBER

17

SIZE

26-Jun-2008RDEE3

A3

REV

A021310A22077-0-MTR

OF

53