Inventec San Antonio 6050A2041301 Schematic

San Antonio
VP BUILD
2005 1215
DATE
CHANGE NO.
REV
DRAWER DESIGN CHECK RESPONSIBLE
SIZE = DOC. NUMBER FILE NAME :
P/N
EE
3
XXXX-XXXXXX-XX
XXXXXXXXXXXX
VER :
DATEDATE
INVENTEC
TITLE
San Antonio 10
SIZE
A3
TC8703 A03
CS
SHEET
REVCODE
OF
651
TABLE OF CONTENTS
PAGE
1.COVER PAGE
2.INDEX
3.BLOCK DIAGRAM
4.POWER SEQUENCE BLOCK 5-12.SYSTEM POWER
13.CLOCK GENERATOR
14.CPU Yonah1
15.CPU Yonah2
16.CPU Yonah3
17.CPU Yonah4
18.FAN & THERMAL CONTROLLER
19.N/B Calistoga 1
20.N/B Calistoga 2
21.N/B Calistoga 3
22.N/B Calistoga 4
23.N/B Calistoga 5
24.N/B Calistoga 6
25.DDR2 DIMM0
26.DDR2 DIMM1
27.DDR DAMPING
28.VGA CONN
29.CRT CONN
30.SVIDEO CONN
31.LCD CONN
PAGE
32.S/B ICH7 1
33.S/B ICH7 2
34.S/B ICH7 3
35.S/B ICH7 4
36.S/B ICH7 5
37.CARDBUS CONTROLLER
38.PCMCIA & EXPRESS CARD
39.5 IN 1 CARD SLOT
40.1394 CONTROLLER
41.LAN CONTROLLER-1
42.LAN CONTROLLER-2
43.RJ45 & TRANSFORMER
44.MINI CARD CONN
45.3D Sensor & SATA HDD CONN
46.ODD CONN
47.USB CONN
48.BLUE TOOTH CONN
49.TPM 1.2
50.SUPER I/O
51.Serial & Parallel port CONTROLLER
52.K/B & D/B CONN
53.CIR & FIR
54.AZALIA CODEC
55.AUDIO AMP & MIC & HP
PAGE
56.LINE IN & LINE OUT
57.MDC 1.5 CONN
58.DOCKING 1
59.DOCKING 2
60.SWITCH & LED (MB)
61.SWITCH & LED (DB)
62.PICK BUTTON BOARD
63.PARALLEL PORT BOARD
64.USB BOARD
65.DRILL HOLE
CHANGE by
Drawer_Name
28-Nov-2005
INVENTEC
TITLE
San Antonio 10
CODE
SIZE
A3
DOC. NUMBER
TC8703 A03
CS
SHEET
REV
OF
652
Yonah
(uFCPGA)
ICS9LPR316
Clock generator
USB0
Bluetooth
USB1
USB2
FINGER PRINT
PORT REPLICATOR
BATTERY
S-video
HDD
ODD
USB3
CONN C (DB)
CONN D (DB)
LCM CRT
USB4
MDC / Modem
USB5
CONN A (MB)
Module 56K
SATA
Primary_IDE
USB6
CONN B (MB)
Express Card
USB7
DOCKING
3.3V, AZALIA
AZALIA
FSB, 533/667 MHz
Calistoga
945GM/PM
1466 uFCBGA
DMI x4
ICH7-M
652 BGA
3.3V, LPC_Interface,33MHz
1.8V, DDR2 Interface, 533/667 MHz
1.8V, DDR2 Interface, 533/667 MHz
PCI_EXPRESS
INTEL 10/100 82562GZ 1G 82573E(AMT)
82573L(w/o AMT)
RJ45
MINI CARD
Wireless LAN
ANT
DDR2_SODIMM0
3.3V, PCI_Interface,33MHz
EXPRESS CARD
ANT
DDR2_SODIMM1
CARD BUS
TI_PCI7412/PCI4512
(CO-LAYOUT)
Cardbus
SLOT A
Card reader
CONN
1394
CONN
System Charger &
DC/DC System power
(IMVP-6
VR)
RJ11
MIC
JACK
HP
JACK
SPEAKER
SMSC
KBC1122
BIOS
FLASH ROM
3-AXIS SENSOR
SERIAL PORT
FIR
CIR
TPM 1.2
CHANGE by
Drawer_Name
SMSC
SIO 1036
PARALLEL PORT
TITLE
SIZE
28-Nov-2005
A3
INVENTEC
San Antonio 10
DOC. NUMBER
CODE
CS
SHEET
OF
365
REV
A03TC8703
DSKDC
+VBAT
5V
+V5S
+V5A
+VADPTR
SCL SDA
ACOK
+VPACK
SKIP#
3V
EN_PSV
EN_PSV
EN_PSV
+V3A
1.5V
1.8V
VCCP
+V1.8
+V1.5S
+VCCP
+V3S
+V2.5S
+V0.9S
CHANGE by
+VCC_CORE
INVENTEC
TITLE
San Antonio 10
DOC. NUMBER REV
CODE
SIZE
A3
CS
28-Nov-2005Drawer_Name
SHEET
465
A03TC8703
OF
DSKDC
+VADPTR
D510
RLZ18C 2
58-
5-
DTA143EKA
2
1
BATT_CLK
BATT_DATA
JST_S4B_EH_4P
D509
1 2
PDS1040_10A_40V
D508
1 2
PDS1040_10A_40V
1
E
B
Q513
C
3
DTC124EK
50-,18-,6­50-,18-,6-
CN503
3
3
B
2
CHARGE_GND
1 2 3 4
Q514
1 2 3 4
1 2
FUSE502
12
10A_125V
1
R618
432K_1%
2
3
C
1
R617
E
42.2K_1%
2
1
50-
ACPRES
60-,58-,50-,47-,44-,43-,38-,35-,34-,33-,14-,12-,11-,7-
C1
10pF_50v
C577
1 2
OPEN
+VADPTR
5-
1 2
12
10_5%
1
R637
47K_5%
2
1
R642
100K_5%
2
CHG_EN
C2
0.1uF_25v
R619
C606
1uF_10v
CHARGE_GND
+V3A
0.1uF_25v
C578
1
2.2uF_25v
2
CHARGE_GND
1
2
50-
C596
+V5LA
1 2
53-,18-,7-,6-
1
R641
8.06K_1%
2 1
R639
39.2K_1%
2 1
R6676
22.6K_1%
2
R695
1
10K_5%
Q512
1
8
D
S
2
7
3
1
1uF_25v
2
SSM3K17FU
50-
DCPWEN
R616
12
0.01_1%_1W
C599
12
0.1uF_25v
6-
THRM1
50-
BATT_IN
C597
1 2
0.1uF_25v
CHARGE_GNDCHARGE_GND
12
11
10
15
14 13 25
17
3
4
6
5
1
U511
VCC
ACN
ACP
BYPASS#
ACDET
VREF5
AGND
TS
CHGEN#
SCL SDA ALARM#
IOUT
ACDRV#
BATDRV#
PVCC
HIDRV
BTST
REGN
LODRV
PGND SYNP SYNN
ISYNSET
SYS
SRP SRN BAT
EAO
FBO
TML
PH
EAI
2
23
24
32
30
29
31
D512
28
27 26 22 21 20 19 18
7
8 9
16 33
10_5%
R635
12
13
BAT54
C595
12
0.1uF_25v
TI_BQ24721_QFN_32P
1
1
R638
R643
100K_5%
200K_5%
2
2
R636
12
0_5%
2
CHARGE_GND
Q509
G
G
1
10uF_25v_K_X5R
2
C598
12
1uF_25v
1
2
1 2
R601
47K_5%
2
1
R602
4.7K_5%
2
D
D
S
S
C576
R640
18K_5%
C607
100pF_50v
AM4825P_AP
Q511
1
D1
2
G1
8
G2
3
SP8K10SFD5_ROHM
C579
1 2
56pF_50v
1
C569
4
C570
0.1uF_25v
S1_D2
S2
5 6 7
4
6 5
G
12
L512
12
PCMB104T_100MS
1
R620
10K_5%
2
C580
1
1500pF_50v
2
FUSE503
12
10A_125V
C568
1 2
0.1uF_25v 10uF_25v_K_X5R
C594
1 2
10uF_25v_K_X5R
CHARGE_GND
C567
1 2
0.01_1%_1W
C602
0.1uF_25v
C601
1 2
0.1uF_25v
NEAR IC
59-,58-
1 2
10uF_25v_K_X5R
R634
12
12
CHARGE_GND
1 2
C575
DCOUT
C604
0.1uF_25v
L3007
NFM60R30T222
Q519
AM4825P_AP
1
S
2 3 4
+VPACK
6-
C593
1 2
10uF_25v_K_X5R
CHARGE_GND
1
4 3
2
8
D
7 6 5
G
Q518
8
D
S
7 6 54
G
AM4825P_AP
C603
1 2
0.1uF_25v
+VBAT
4 3
1 2 3
28-,10-,9-,8-,7-,6-
1
L3006
NFM60R30T222
2
Drawer_Name
1-Dec-2005
INVENTEC
TITLE
San Antonio 10
DC &BATTERY CHANGER
CODE DOC. NUMBERSIZE
A3
TC8703 A03
CS
SHEET
REV
OF
655
THRM1
BATT_DATA
BATT_CLK
+VBAT
+VPACK
5­50-,18-,5­50-,18-,5-
28-,10-,9-,8-,7-,5-
1 R8
1M_5%
2
1 R7
56.2K_1%
2
1 R6
180K_1%
2
5-
1K_5%
R5002
12
1
3
2
LITTLEFUSE_R451012_12A_65V
D503
AZ23C6V2
3
LTH
2
GND
1
HTH
GMT_G680LT1_SOT23_5P
C541
1 2
1000pF_50v
U1
4
RESET#
5
VCC
FUSE501
1
2
7-
CN6
G
7
7
G2
G
6
G1
6
5
5
4
4
3
3
2
2
1
1
TYCO_1747602_1_7P
+V5AUXON
+V5LA
1 2
53-,18-,7-,5-
C10
0.1uF_10v
CHANGE by
Drawer_Name
28-Nov-2005
INVENTEC
TITLE
San Antonio 10
BATTERY CONN
SIZE
CODE
DOC. NUMBER
A3
TC8703 A03
CS
SHEET
REV
OF
656
+V5AUXON
THRM_SHUTDWN#
EC_PW_ON
SLP_S3#_3R
6-
50-,28-,18-
50-
50-,47-,33-,12-,11-
R13
100K_5%
R6685
12
10K_5%
1
3
D511
BAT54C
2
R16
12
10K_5%
+VBAT
28-,10-,9-,8-,6-,5-,7-
2
1
R629
0_5%
12
TPS51020
R630
10K_1%
12
C17
0.01uF_16v
1
2
12
C16
0.01uF_16v
2
1
R17
12
1M_5%
R624
12
10K_1%
1
R626
29.4K_1%
2
C18
2
12
2.7K_5%
0.033uF_16v
0.1uF_16vC588
2
2
1
1.8K_5%
C19
3900pF_50v
R628
12
51.1K_1%
1 2
1
4700pF_50v
2
1
2
R15
R14
1
1
R623
220_5%
2
C587
6800pF_25v
C586
R625
330_5%
1
1
R627
0_5%
2
U2
1
INV1 COMP1 SSTRT1 SKIP# VO1_VDDQ DDR# GND REF_X ENBL1 ENBL2 VO2 PGOOD SSTRT2 COMP2 INV2
VBST1
OUT1_U
OUT1_D
OUTGND1
TRIP1
TRIP2
VREG5
REG5_IN
OUTGND2
OUT2_D
OUT2_U
VBST2
LL1
VIN
LL2
2 3 4 5 6 7 8
9 10 11 12 13 14 15
TI_TPS51020DBT_TSSOP_30P
30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
R9
12
4.7_5%
1 2
C12
4.7uF_25v
2
R11
1
R12
12
2.2_5%
C11
1 2
2.2uF_25v
2
R10
1
15.8K_1%
C14
12
0.1uF_25v
10K_1%
C13
R18
12
2.2_5%
0.1uF_25v
12
C629
1 2
4.7uF_25v
8765
D
G
4S123
RSS090N03_ROHM
8D7
5
6
G
FDS6680S
41S23
Q4
Q5
C25
1 2
4.7uF_25v
Q2
1
D1
2 8
G1
G2
3
SP8K10SFD5_ROHM
+V5LA
53-,18-,6-,5-,7-
1 2
60-,59-,50-,47-,35-,28-,12-,11-,9-,8-,7-
C15
1uF_6.3v
+V5A
1 2
C631
10uF_25v
+VBAT
1 2
1
C63
2
5
S1_D2
6 7
4
S2
28-,10-,9-,8-,6-,5-,7-
C27
4.7uF_25v
L1
12
PCMB104E_4R7MS
68uF_25v
1
C21
2
330uF_6.3v
L513
2
1
MPLC0730_4R7
C20
1 2
1uF_10v
1
C612
2
330uF_6.3v
POWERPAD_2_0610
1 2
1uF_10v
PAD1
POWERPAD_2_0610
PAD500
2
1
C613
+V5A
60-,59-,50-,47-,35-,28-,12-,11-,9-,8-,7-
+V3LA
60-,50-,47-,32-,18-,7-
Q524
G
G
SSM3K17FU
+V5LA
D
S
53-,18-,6-,5-,7-
1
R646
10K_5%
2
D
S
+V3LA
60-,50-,47-,32-,18-,7-
D514
1
3
BAT54
R645
12
100K_5%
C611
1
0.1uF_10v
2
CLOSE TO PAD4
4
3
4
Q521
S
G
FDC638P
Q522
S
G
FDC638P
D
D
1 2 5 6
1 2 5 63
SSM3K17FU
+V3A
60-,58-,50-,47-,44-,43-,38-,35-,34-,33-,14-,12-,11-,5-
1
R644
200_5%
2
Q523
D
D
G
G
S
S
CHANGE by
Drawer_Name 5-Dec-2005
INVENTEC
TITLE
San Antonio 10
SYSTEM POWER(3V/5V)
SIZE REV
A3
DOC. NUMBER
CODE
TC8703 A03
CS
SHEET
OF
657
SLP_S3#_5R
PWR_GOOD_3
28-,12-,9-
11-
C220 1
2
OPEN
R160
12
OPEN
R157
12
10K_5%
MCH_GOOD
+VBAT
28-,10-,9-,7-,6-,5-
+V5A
60-,59-,50-,47-,35-,28-,12-,11-,9-,7-
1
1
R153
R155
10_5%
100K_5%
2
2
10-
1
C216
1uF_6.3v
2
R154
2
0_5%
10mil
1
1
R158
232K_1%
2
1
C219
2
OPEN
10mil
15mil
15mil
U10
1
EN_PSV
2
TON
10mil
3
VOUT
10mil
4
V5FILT
10mil
5
VFB
6
PGOOD
7
GND
TI_TPS51117PW_TSSOP_14P
VCCPGND
VBST
DRVH
TRIP
V5DRV
DRVL PGND
40mil
5
876
D
G
Q9
RSS090N03_ROHM
VCCPGND
41S23
8765
D
G
Q10
FDS6676AS
S
123
4
C218
R159
1
1uF_6.3v
2
C217
12
2.2_5%
R156
12
10K_1%
12
0.1uF_25v
15mil
14
15mil
13
15mil
12
LL
10mil
11
15mil
10
15mil
9
15mil
8
C147
1
1
2
2
10uF_25v_K_X5R
PCMB104E_2R2MS
C146
4.7uF_25v
L12
12
VCCPGND
1
R151
40.2K_1%
2
1
R150
100K_1%
2
C208
1 2
OPEN
220uF_2v_15mR_Panasonic
+VCCP
35-,32-,24-,23-,21-,20-,16-,15-,14-,13-,9-
12A250mil
1
2
POWERPAD_2_0610
C221
10uF_6.3v
PAD4
12A250mil
1
2
C210
+V3S
58-,54-,53-,52-,51-,50-,49-,48-,47-,46-,44-,41-,40-,39-,38-,37-,35-,34-,33-,32-,31-,29-,28-,26-,25-,23-,20-,19-,18-,13-,12-,11-,10-,9-
C735
1 2
4.7uF_6.3v
+V5S
60-,58-,52-,51-,50-,46-,45-,39-,38-,37-,35-,33-,31-,29-,18-,12-,10-
1
R774
2.4K_1%
2
Q541
4
6
S
D
5 2
1
G
AM3446N
3
R775
12
0_5%
U518
1
REF
3
ANODE
2
CATHODE
TEC_AZ431LANTR_E1_SOT23_3P
+V2.5S
28-,23-
PAD504
POWERPAD_2_0610
1
R772
C723
1 2
1 2
C722
OPEN
OPEN
10.2K_1%
2
1
R773
10K_1%
2
1 2
C724
10uF_6.3v
INVENTEC
TITLE
San Antonio 10
SYSTEM POWER (+V2.5S / +VCCP)
CHANGE by
SIZE
28-Nov-2005Drawer_Name
A3
DOC. NUMBER
CODE
CS
SHEET OF
865
REV
A03TC8703
+VBAT
28-,10-,8-,7-,6-,5-,9-
+V1.8
26-,25-,24-,19-,11-,9-
+V1.8_VRAM
28-,9-
PAD502
POWERPAD_2_0610
PAD501
POWERPAD_2_0610
10uF_6.3v
+V1.8
C640
1
1
C627
2
C5077
12
330pF_50v
C5078
12
330pF_50v
C5079
1
330pF_50v
C5080
12
330pF_50v
C5081
12
330pF_50v
C5082
12
330pF_50v
2
2
330uF_2v_15mR_Panasonic
26-,25-,24-,19-,11-,9-
C628
1 2
4.7uF_25v
L515
12
PCMB104E_2R2MS
1
R697
OPEN
2
C639
1 2
OPEN
R22
143K_1%
1
1
2
OPENC30
12-
R20
1
SLP_S5#_5R
0_5%
2
10uF_25v_K_X5R
C24
1
8765
9
2
D
Q527
G
RQW130N03_PSOP_8P
41S23
9
8
765
Q528
D
D516
1 2
SSM34_3A40V
G
S
4
123
ROHM_RQW200N03FD5_PSOP_8P
12
0.1uF_10v
12
0.1uF_10v
1
0.1uF_10v
12
0.1uF_10v
+V3S
58-,54-,53-,52-,51-,50-,49-,48-,47-,46-,44-,41-,40-,39-,38-,37-,35-,34-,33-,32-,31-,29-,28-,26-,25-,23-,20-,19-,18-,13-,12-,11-,10-,8-
2
+V1.8 +V1.8 +V1.8
26-,25-,24-,19-,11-,9-
C5083
C5084
C5085
C5086
FOR EMI
R23
100K_1%
2
C29
1 2
OPEN
1
C28
12
0.1uF_25v
2
51124GND
60-,59-,50-,47-,35-,28-,12-,11-,8-,7-,9-
1
R21
OPEN
2
R19
12
2.2_5%
12
2
1
R24
OPEN
7
PGOOD2
TI_TPS51124RGER_QFN_24P
EN2
9
VBST2
10
DRVH2
11
LL2
12
DRVL2
R34
13.3K_1%
R33
0_5%
C5089
12
0.1uF_10v
C5090
12
0.1uF_10v
C5091
12
0.1uF_10v
C5087
2
1
0.1uF_10v
C5088
12
0.1uF_10v
2
R25
OPEN
1
2
5
6
VO2
VFB2
U3
TRIP2
PGND2
14
13
1
19.1K_1%
2
51124GND
+V1.5S +VBAT
44-,38-,35-,33-,28-,24-,23-,20-,16-,11-,9-
+VCCP
35-,32-,24-,23-,21-,20-,16-,15-,14-,13-,8-
4
TONSEL
V5FILT
15
R36
1
3
VO1
GND
VFB1
GND
PGOOD1
EN1
VBST1
DRVH1
LL1
DRVL1
TRIP1
V5IN
PGND1
17
16
18
2
1
51124GND
25 24
238
22
21
20
19
R26
100K_1%
2
+V5A+V5A
60-,59-,50-,47-,35-,28-,12-,11-,8-,7-,9-
1
R30
OPEN
2
R29
1
2.2_5%
1
C36
1uF_6.3v
2
+V1.8_VRAM
1
2
0.1uF_25v
2
R35
10_5%
26-,25-,24-,19-,11-,9-26-,25-,24-,19-,11-,9-
28-,9-
C33
12
C5092
C5093
C31
1
1
0.1uF_25v
12
0.1uF_25v
R27
102K_1%
2
2
+V5A
1 2
2
1
1
OPEN
C32
1 2
OPEN
C37
4.7uF_6.3v
28-,10-,8-,7-,6-,5-,9-
R28
1
0_5%
CHANGE by
28-,12-,8-
2
SLP_S3#_5R
Q3
1
D1
2
5
S1_D2
8
G1
6 7
G2
3
4
S2
SP8K10SFD5_ROHM
Drawer_Name
C630
C26
1
1
10uF_25v_K_X5R
2
2
4.7uF_25v
L517
12
PCMB104E_4R7MS
1
C641
2
220uF_2v_15mR_Panasonic
TITLE
SYSTEM POWER(+V1.5S / +V1.8)
SIZE REVDOC. NUMBER
28-Nov-2005
A3
44-,38-,35-,33-,28-,24-,23-,20-,16-,11-,9-
+V1.5S
PAD503
POWERPAD_2_0610
1
R710
OPEN
2
1
C654
10uF_6.3v
2
C655
1 2
OPEN
INVENTEC
San Antonio 10
CODE
TC8703 A03
CS
SHEET
OF
659
MAX8770_VCC
IMVP_CKEN#
VR_PWRGD_CK410
H_VID0 H_VID1 H_VID2 H_VID3 H_VID4 H_VID5 H_VID6
PSI#
H_DPRSTP#
PM_DPRSLPVR
MCH_GOOD
MAX8770_VCC
R818
10-
C738
1
2.2uF_10v
CPU_GND
R859
12
OPEN
TP748
TP749
TP750
12
12
12
12
12 12
12
12
12
VRHOT#
12
2
TP751
TP75216-
TP753
TP754
0_5% 0_5% 470_5%
0_5%
470pF_50v
0.22uF_6.3v
71.5K_1% 10K_5%R854 OPEN
33-
R855
OPEN
+V3S
58-,54-,53-,52-,51-,50-,49-,48-,47-,46-,44-,41-,40-,39-,38-,37-,35-,34-,33-,32-,31-,29-,28-,26-,25-,23-,20-,19-,18-,13-,12-,11-,9-,8-,10-
1
1
R857
10K_5%
13-
18-,13-,10-
16­16-
16­16­16­16-
15-
32-,15-
33-,19-
8-
R860
OPEN
2
2
R856 R825 R823 R824
C778 C739
CPU_GND
R852
10-
R853
C780
1
OPEN
2
CPU_GND
12
10_5%
U519
19
VCC
VDD
CLKEN#
PWRGD
D0 D1 D2 D3 D4 D5 D6
PSI#
DPRSTP#
DPRSLPVR
SHDN#
CCV
REF
TIME
THRM
VRHOT#
POUT#
PGND1
CSP1 CSN1
PGND2
CSP2
CSN2
GNDS
THERMAL
TON
BST1
DH1
LX1
DL1
GND
FB
CCI
BST2
DH2
LX2
DL2
1
2
31 32 33 34 35 36 37
3
40
39
38
9
11
7
6
5
4
MAX_MAX8770_TQFN_40P
25
8
30
29
28
26
27 18
17 16
12
10
20
21
22
24
23
14
15 13 41
CPU_GND
+V5S
60-,58-,52-,51-,50-,46-,45-,39-,38-,37-,35-,33-,31-,29-,18-,12-,8-
C725
1 2
4.7uF_6.3v
R851
12
200K_5%
R822
12
2.2_5%
R821
12
2.2_5%
C727 12
0.22uF_16v
C726
12
0.22uF_16v
C777
1
470pF_50v
2
1
R850
20K_5%
2
16-
1
R820
OPEN
2
C737
OPEN12
+VBAT
1
R819
3.24K_1%
2
1
R816
10_5%
2
VCCSENSE
28-,9-,8-,7-,6-,5-
1 2
CPU_GND
1 4 3
2
C736
1000pF_50v
VR_PWRGD_CK410
L3004
NFM60R30T222
10uF_25v_K_X5R
C108
C107
1
1
2
2
0.01uF_50v
FDS6676AS
C740
1 2
OPEN
CPU_GND
10uF_25v_K_X5R
C678
C677
1
1
2
2
0.01uF_50v
R6671
FDS6676AS
SLP_S3#_3R
C105
1 2
R6672
Q531
C106
1 2
12
Q536
18-,13-,10-
+VBAT_CPU
1 2
0.01uF_50v
1
G
3
4
1 2
0.01uF_50v
G
41S23
C676
2
765
C675
8
D
1S2
0_5%
8765
D
0_5%
D527
R858
12
560K_1%
8765
D
G
41S23
FDS6294
8765
D
G
S
123
4
FDS6676AS
8
765
D
G
1S23
4
FDS6294
SSM34_3A40V_OPEN
8765
D
G
4S123
FDS6676AS
BAT54
13
1
C817
1
FAIR_NC7WZ17_SC70_6P
2
0.22uF_10v
Q530
SSM34_3A40V_OPEN
D523
1
2
Q532
Q533
D524
1
2
Q535
+V3S
58-,54-,53-,52-,51-,50-,49-,48-,47-,46-,44-,41-,40-,39-,38-,37-,35-,34-,33-,32-,31-,29-,28-,26-,25-,23-,20-,19-,18-,13-,12-,11-,9-,8-,10-
12
D526
BAT54
50-,33-,19-
1
511K_1%
13
R927
2
C816
1 2
0.22uF_10v
SB_3S_VRMPWRGD
3
5
U523-A
6
2
C779
0.1uF_16v
5
U523-B
4
FAIR_NC7WZ17_SC70_6P
2
33-
PM_PWROK
+VCC_CORE
L6
12
MPC1040LR45_TOKIN
1
1
R6668
1 2
OPEN
2
C5071
OPEN
R42
2.4K_1%
2
R43
12
6.2K_1%
R44
12
10K_1%_THER_NTC
C62
12
1
2
C110
330uF_2v_6mR
330uF_2v_6mR
1
C679
2
1
C123
2
330uF_2.5v_OPEN
0.22uF_10v
L10
12
MPC1040LR45_TOKIN
1
1
R6670
1 2
OPEN
2
C5073
OPEN
R139
2.4K_1%
2
R140
12
6.2K_1%
R141
12
10K_1%_THER_NTC C187
12
1
C109
2
330uF_2v_6mR
1
2
330uF_2v_6mR
C680
330uF_2.5v_OPEN
1
C122
2
0.22uF_10v
16-
CPU_GND
R849
12
0_5%
1 2
CPU_GND
C742
1000pF_50v
R817
12
10_5%
16-
VSSSENSE
1 2
CPU_GND
C741
OPEN
CHANGE by
INVENTEC
TITLE
San Antonio 10
CPU POWER(VCC_CORE)
CODE REV
CS
DOC. NUMBER
OFSHEET
10 65
A03TC8703
SIZE
14-Dec-2005Drawer_Name
A3
+V5A
60-,59-,50-,47-,35-,28-,12-,9-,8-,7-
+V1.8
26-,25-,24-,19-,9-
SLP_S5#_3R SLP_S3#_3R
M_VREF
50-,49-,38-,37-,33-,12-
R138
50-,47-,33-,12-,7-
1
0_5%
26-,25-,19-
+V1.5S
44-,38-,35-,33-,28-,24-,23-,20-,16-,9-
2
C5099
1 2
OPEN
R5005
12
1K_5%
1 2
0.1uF_10v
2
1uF_10v
C186
C209
1
+V3A
60-,58-,50-,47-,44-,43-,38-,35-,34-,33-,14-,12-,7-,5-
1
R846
1K_5%
2
D528 BAT54
13
R845
12
100K_5%
Q543
3
C
2
B
E
1
2SC2411K
U3014
11
GND
10
VIN VLDOIN
9
S5
8
GND
7
S3
6
VTTREF
TI_TPS51100_DGQ_10P_OPEN
U8
11
GND
10
VIN VLDOIN
9
S5
84
GND
7
S3
6
VTTREF
TI_TPS51100_DGQ_10P
VDDQSNS
PGND
VTTSNS
VDDQSNS
PGND
VTTSNS
1 2 3
VTT
4 5
1 2 3
VTT
5
+V3S
58-,54-,53-,52-,51-,50-,49-,48-,47-,46-,44-,41-,40-,39-,38-,37-,35-,34-,33-,32-,31-,29-,28-,26-,25-,23-,20-,19-,18-,13-,12-,10-,9-,8-
5
U527
4
2
TC7SH14F
3
C774
1 2
0.1uF_10v
1 2
1
2
C185
22uF_6.3v
R6581
100K_5%
1 2
8-
PWR_GOOD_3
PAD3
POWERPAD_2_0610
C207
22uF_6.3v
+V0.9S
28-,27-
CHANGE by
INVENTEC
TITLE
San Antonio 10
+V0.9S / POWER GOOD
CODE
SIZE
28-Nov-2005Drawer_Name
A3
DOC. NUMBER REV
CS
SHEET OF
11 65
A03TC8703
SLP_S3#_5R
28-,9-,8-
60-,58-,50-,47-,44-,43-,38-,35-,34-,33-,14-,11-,7-,5-
+V5S
60-,58-,52-,51-,50-,46-,45-,39-,38-,37-,35-,33-,31-,29-,18-,10-,8-,12-
R178
200_5%
R179
200_5%
1
2
BAT54
BAT54 1
D10
SLP_S5#_5R
3
9-
U15-A
74ACT14MTC
1
2
1
+V5A
3
D9
60-,59-,50-,47-,35-,28-,11-,9-,8-,7-,12-
U15-B
74ACT14MTC
+V5A
60-,59-,50-,47-,35-,28-,11-,9-,8-,7-,12-
14
12
7
60-,59-,50-,47-,35-,28-,11-,9-,8-,7-,12-
14
7
+V5A
12
D513
3
BAT541
34
C813
0.1uF_10v
Q520
5
1
786
D1
S1
G14G2
2
FDS6875
1
R622
220K_5%
2
50-,47-,33-,11-,7-
74ACT14MTC
3
D2
S2
SLP_S3#_3R
14
U15-C
6
7
+V3+V3A
60-,57-,51-,44-
1
C608
2
47uF_4v
C610
1 2
OPEN
+V5A
60-,59-,50-,47-,35-,28-,11-,9-,8-,7-,12-
5
220K_5%
14
U15-D
9
74ACT14MTC
7
50-,49-,38-,37-,33-,11-
R926
8
+V3S
58-,54-,53-,52-,51-,50-,49-,48-,47-,46-,44-,41-,40-,39-,38-,37-,35-,34-,33-,32-,31-,29-,28-,26-,25-,23-,20-,19-,18-,13-,11-,10-,9-,8-
1
C609
2
47uF_4v
1
12
R848
200_5%
2
R847
220K_5%
12
1 2
SLP_S5#_3R
3
C814
0.01uF_16v
200_5%
2
1
R662
D8
BAT54A
2
1
Q525
D
D
G
G
SSM3K17FU
S
S
+V5A
60-,59-,50-,47-,35-,28-,11-,9-,8-,7-,12- 60-,58-,52-,51-,50-,46-,45-,39-,38-,37-,35-,33-,31-,29-,18-,10-,8-,12-
4
4
3
C589
R648
12
OPEN
R647
12
220K_5%
Q515
S
D
G
FDC638P
Q516
S
D
G
FDC638P
OPEN
12
D515
BAT54_OPEN
+V5S
1 2 5 63
1 2 5 6
C590
4
13
C614
1 2
OPEN
OPEN
12
Q517
S
G
FDC638P
28-
SLP_S3_5R
+VAUDIO_5S
1
D
2 5 63
55-,54-
CHANGE by
INVENTEC
TITLE
San Antonio 10
POWER(SLEEP)
CODE
SIZE REV
28-Nov-2005Drawer_Name
A3
CS
SHEET
DOC. NUMBER
OF
12 65
A03TC8703
CPU_BSEL1
MCH_BSEL1
CPU_BSEL2
CLK_R3S_ICH14
VR_PWRGD_CK410
35-,32-,24-,23-,21-,20-,16-,15-,14-,9-,8-
+VCCP
2
R91
OPEN
1
15-
2
R798
1K_5%
1
R751
1K_5%
2
19­19-,15-
33-
IMVP_CKEN#
1
2
1
R868
10K_5%
12
R867
24.9_1%
R872
10K_5%
10-
18-,10-
SSM3K17FU
Layout note: All decoupling 0.047uF disperse closed to pin
C753
C734
C791
1
1
2
10uF_6.3v
1
2
2
10uF_6.3v
0.047uF_10v
1 2
C750
0.047uF_10v
1 2
C751
0.047uF_10v
1 2
C794
0.047uF_10v
Please place close to CLKGEN within 500mils
30PPM
X504
1
1
C5033
R789 R788 R791 R792
14.31818MHZ
2
12 12 12 12
37­44­51­50-
49-
50­51-
33-,26-,25-
33-,26-,25-
34-
+V3S
CPU_BSEL0
CLK_R3S_ICH48
CLK_R3S_CARD48
1
12
10K_5%R870
12
OPENR869
LAYOUT NOTES : THE IREF(PIN_46) SIGNAL VIA R715 CONNECT TO GND DIRECTLY.
BSEL2
FSB CLOCK
FREQUENCY
FSC
533 667
2
1
Q539 G
G
BSEL0
FSA
1 0 0 1 1 0
2
+V3S
R797
10K_5%
1
R833
10K_5%
2
D
D
S
S
BSEL1
FSB
33pF_50v
19-,15­33­37-
CLK_R3S_CBPCI
CLK_R3S_MINICARDPCI
CLK_R3S_SIOPCI
CLK_R3S_KBPCI
CLK_R3S_TPMPCI
CLK_R3S_KBC14
CLK_R3S_SIO14
ICH_3S_SMDATA
ICH_3S_SMCLK
CLK_R3S_ICHPCI
1
R881
4.7K_1%
2
HOST CLOCK
FREQUENCY
133 166
1 2
0.047uF_10v
2
1 2
10K_5% 10K_5%
12.1_1%
12.1_1%
R784 R785 R835 R6591
R837
R873
R6586
R834 R787
LAN_CLK_REQ#
CLKREQA# CLKREQB# CLKREQC# CLKREQD#
+V3S_CLKVDD
C792
1 2
C790
33pF_50v
OPEN
2
1 12
24.9_1%
12
24.9_1%
1
2
12.1_1%
12
12.1_1%R836
12
24.9_1%
12
12.1_1%
1
2
12.1_1%
10K_5%
2
1
OPEN
2
1 12
24.9_1%R786
CLK_REQB#
SRCCLK8
NFM40P12C223
C752
0.047uF_10v
CLK_3S_ICH48
41­44-
X
+V3S
4
L524
3
CLK_BSEL1
CLK_BSEL2
CLK_3S_CBPCI CLK_3S_MINICARDPCI CLK_3S_KBPCI CLK_3S_TPMPCI
CLK_3S_KBC14
CLK_3S_ICHPCI
12
R871 0_5%
SRCCLK7
X
58-,54-,53-,52-,51-,50-,49-,48-,47-,46-,44-,41-,40-,39-,38-,37-,35-,34-,33-,32-,31-,29-,28-,26-,25-,23-,20-,19-,18-,12-,11-,10-,9-,8-,13-
1
1
BLM11A121S
L522
2
2
C749
C748
1
1
2
2
0.047uF_10v
10uF_6.3v
U521
24
SRCCLK6
X
41
5
10
16
33
50
57 56
11 15 59
6 2 3
1 62 60
54 53
7
9
46
64 63
4 12 40 58 17 25 32 47
VDDSRC VDDSRC
VDDPCI
VDD48
VDD
VDDSRC
VDDCPU
X1 X2
FSLA_USB_48MHZ FSLB_TEST_MODE REF1_FSLC_TEST_SEL
PCICLK6 PCICLK4 PCICLK5 PCI_REFSEL_PCICLK3 SEL_REQ_PCICLK2 REF0_PCICLK1
SDATA SCLK
SELSRC_LCDCLK#_PCICLK_F1
Vtt_PwrGd#_PD
VREF
CLKREQA# CLKREQB#
GND GND GNDSRC GND GND GNDSRC GNDSRC GNDCPU
SRCCLK5
CPUCLKT2_ITP_CLKREQC#
CPUCLKC2_ITP_CLKREQD#
LCDCLK_SST_SRCCLKT0 LCDCLK_SSC_SRCCLKC0
ICS_ICS9LPR316_TSSOP_64P
SRCCLK4
X
X
PCI_SRC_STOP#
VDDREF
CPU_STOP#
CPUCLKT0 CPUCLKC0
CPUCLKT1
CPICLKC1
SRCCLKT5 SRCCLKC5
SRCCLKT8 SRCCLKC8
SRCCLKT7 SRCCLKC7
SRCCLKT6 SRCCLKC6
SRCCLKT4 SRCCLKC4
GNDSRC GNDSRC
SRCCLKT3 SRCCLKC3
SRCCLKT2 SRCCLKC2
SRCCLKT1 SRCCLKC1
DOTT_96MHZ DOTC_96MHz
SRCCLK3
55
8 61
52 51
49 48
45 44
35 34
43 42
39 38
37 36
30 31
28 29
26 27
22 23
20 21
18 19
13 14
X
CLK_CPUBCLK CLK_CPUBCLK#
CLK_MCHBCLK CLK_MCHBCLK#
CLK_PEG_REF CLK_PEG_REF#
CLK_PEG_MCH CLK_PEG_MCH#
CLK_PCIE_CARD CLK_PCIE_CARD#
CLK_PCIE_ICH CLK_PCIE_ICH#
CLK_SATA1 CLK_SATA1#
CLK_PCIE_MINI1 CLK_PCIE_MINI1#
CLK_PCIE_LAN CLK_PCIE_LAN#
SSCLK1_DREF SSCLK1_DREF#
CLK_DREF CLK_DREF#
2
R813
1
0_5%
12
R340
0_5%
SRCCLK2 SRCCLK1
X
X
R875 12.1_1% R878
R879
+V3S
1
R815
10K_5%
2
R896 24.9_1%
R882
R887 24.9_1%
R893 24.9_1%
R808 24.9_1%
R838 24.9_1% R839
R804
R799 24.9_1%
R796 24.9_1%
Close to CLKGEN
SRCCLK0
X
12 12
12.1_1%
12
12.1_1%
12
12.1_1%R880
Q6013
D
D
S
S
12
24.9_1%R895
12
12
24.9_1%
12
24.9_1%R883
12 12
24.9_1%R889
12
24.9_1%R891
12
2
1 12
24.9_1%R810
12 12
24.9_1%
12
24.9_1%R803
12
24.9_1%
12 12
24.9_1%R801
12
24.9_1%R794
12
33-
33-
G
G
SSM3K17FU
PCISTOP#_3 CPUSTOP#_3
14-
CLK_R_CPUBCLK
14-
CLK_R_CPUBCLK#
21-
CLK_R_MCHBCLK
21-
CLK_R_MCHBCLK#
19-
MCH_CLK_REQ#
38-
ICH_NEWCARD_CLKEN
28-
CLK_R_PEG_REF
28-
CLK_R_PEG_REF#
19-
CLK_R_PEG_MCH
19-
CLK_R_PEG_MCH#
38-
CLK_R_PCIE_CARD
38-
CLK_R_PCIE_CARD#
33-
CLK_R_PCIE_ICH
33-
CLK_R_PCIE_ICH#
32-
CLK_R_SATA1
32-
CLK_R_SATA1#
44-
CLK_R_PCIE_MINI1
44-
CLK_R_PCIE_MINI1#
41-
CLK_R_PCIE_LAN
41-
CLK_R_PCIE_LAN#
19-
SSCLK1_R_DREF
19-
SSCLK1_R_DREF#
19-
CLK_R_DREF
19-
CLK_R_DREF#
12
12 12
12
12
12
12
12
12
12
12
2
1 12
12
12
12
12
12
12
12 12
12
OPEN
OPEN OPEN
OPEN
OPEN OPENR931
OPEN
OPEN
OPEN OPEN
OPEN OPENR811
OPEN
OPEN OPEN
OPEN
OPEN
OPEN OPEN
OPEN
R874
R876 R877
R930
R892 OPEN
R894
R884
R885
R886 R888
R890
R812
R6422 OPEN
R809
R805
R806
R800
R802 R793
R795
CHANGE by
Drawer_Name 28-Nov-2005
INVENTEC
TITLE
San Antonio 10
CLOCK_GENERATOR
DOC. NUMBER
CODE
SIZE
A3
TC8703 A03
CS
SHEET
REV
OF
6513
H_A#(31:3)
H_STPCLK#
H_A20M# H_FERR#
H_IGNNE#
H_INTR
H_NMI
H_SMI#
21-
H_A#(3) H_A#(4) H_A#(5) H_A#(6) H_A#(7) H_A#(8) H_A#(9) H_A#(10) H_A#(11) H_A#(12) H_A#(13) H_A#(14) H_A#(15) H_A#(16)
H_A#(17) H_A#(18) H_A#(19) H_A#(20) H_A#(21) H_A#(22) H_A#(23) H_A#(24) H_A#(25) H_A#(26) H_A#(27) H_A#(28) H_A#(29) H_A#(30) H_A#(31)
32­32­32-
32­32­32­32-
H_REQ#(4:0)
H_REQ#(0) H_REQ#(1) H_REQ#(2) H_REQ#(3) H_REQ#(4)
H_ADSTB#0
21-
H_ADSTB#1
21-
21-
CN17-1
J4
A3#
L4
A4#
M3
A5#
K5
A6#
M1
A7#
N2
A8#
J1
A9#
N3
A10#
P5
A11#
P2
A12#
L1
A13#
P4
A14#
P1
A15#
R1
A16#
L2
K3 H2 K2 J3 L5
Y2 U5 R3
W6
U4 Y5 U2 R4 T5
T3 W3 W5
Y4 W2
Y1
V4
A6
A5
C4
D5
C6
B4
A3
AA1 AA4 AB2 AA3
M4
N5
T2
V3
B2
C3
B25
ADDR GROUP 0ADDR GROUP 1
ADSTB0#
REQ0# REQ1# REQ2# REQ3# REQ4#
A17# A18# A19# A20# A21# A22# A23# A24# A25# A26# A27# A28# A29# A30# A31# ADSTB1#
A20M# FERR# IGNNE#
STPCLK# LINT0 LINT1 SMI#
RSVD01 RSVD02 RSVD03 RSVD04 RSVD05 RSVD06 RSVD07 RSVD08 RSVD09 RSVD10
RSVD11
MLX_47170_4787_YONAH_479P
THERM
RESERVED
ADS# BNR#
BPRI#
DEFER#
DRDY#
DBSY#
BR0#
IERR#
INIT#
LOCK#
CONTROL
RESET#
RS0# RS1# RS2#
TRDY#
HIT#
HITM#
BPM0# BPM1# BPM2# BPM3# PRDY#
PREQ#
TCK
TDI TDO TMS
XDP/ITP SIGNALS
TRST#
DBR#
PROCHOT#
THERMDA THERMDC
THERMTRIP#
BCLK0
H CLK
BCLK1
RSVD12
RSVD13 RSVD14 RSVD15 RSVD16 RSVD17 RSVD18 RSVD19 RSVD20
+VCCP
35-,32-,24-,23-,21-,20-,16-,15-,13-,9-,8-,14-
1
R93
56_5%
2
CLOSED TO CPU
+VCCP
35-,32-,24-,23-,21-,20-,16-,15-,13-,9-,8-,14-
1
1
1
R716 R715
R718
56_5%
2
56_5%
2
56_5%
2
33-
H_BPM5_PREQ# H_TCK TDI_FLEX
H_TMS H_TRST# ITP_DBRESET#
18-
H_THERMDA
18-
H_THERMDC
PM_THRMTRIP#
13-
CLK_R_CPUBCLK
13-
CLK_R_CPUBCLK#
21­21­21-
21­21­21-
21-
32-
21-
21-
21-
21­21-
ICH7GMCH
H_ADS# H_BNR# H_BPRI#
H_DEFER# H_DRDY# H_DBSY#
H_BREQ#0
H_INIT#
H_LOCK#
H_CPURST#
H_TRDY# H_HIT#
H_HITM#
H_RS#(0) H_RS#(1) H_RS#(2)
1
R717
56_5%
2
+VCCP
21-
H_RS#(0:2)
+V3A
60-,58-,50-,47-,44-,43-,38-,35-,34-,33-,12-,11-,7-,5-
1
R907
240_5%
2
1
R714
56_5%
2
H1 E2 G5
H5 F21 E1
F1
D20 B3
H4
B1 F3 F4 G3 G2
G6 E4
AD4 AD3 AD1 AC4 AC2 AC1 AC5 AA6 AB3 AB5 AB6 C20
D21 A24 A25
C7
A22 A21
T22
D2 F6 D3 C1 AF1 D22 C23 C24
12
R92
56_5%
35-,32-,24-,23-,21-,20-,16-,15-,13-,9-,8-,14-
10mils/10mils
+VCCP
32-,19-,18-
CPU
PM_THRMTRIP# should be without T at CPU
CHANGE by
Drawer_Name
28-Nov-2005
INVENTEC
TITLE
San Antonio 10
Yonah-1
SIZE
CODE
DOC. NUMBER
A3
TC8703
CS
SHEET OF
REV
A03
6514
H_D#(63:0)
H_DSTBN#0
H_DSTBP#0
H_DINV#0
H_D#(63:0)
+VCCP
35-,32-,24-,23-,21-,20-,16-,14-,13-,9-,8-,15-
1
R760
1K_1%
2
H_GTLREF
1
R761
2K_1%
CLOSED TO CPU WITHIN 0.5"
2
21-,15-
21­21­21-
21-,15-
H_DSTBN#1
H_DSTBP#1
H_DINV#1
CN17-2
H_D#(0) H_D#(1) H_D#(2) H_D#(3) H_D#(4) H_D#(5) H_D#(6) H_D#(7) H_D#(8) H_D#(9) H_D#(10) H_D#(11) H_D#(12) H_D#(13) H_D#(14) H_D#(15)
H_D#(16) H_D#(17) H_D#(18) H_D#(19) H_D#(20) H_D#(21) H_D#(22) H_D#(23) H_D#(24) H_D#(25) H_D#(26) H_D#(27) H_D#(28) H_D#(29) H_D#(30) H_D#(31)
21­21­21-
CPU_BSEL0 CPU_BSEL2
19-,13­13­19-,13-
1
R771
OPEN
2
1
R770
51_5%
2
E22
D0#
F24
D1#
E26
D2#
H22
D3#
F23
D4#
G25
D5#
E25
D6#
E23
D7#
K24
D8#
G24
D9#
J24
D10#
J23
D11#
H26
D12#
DATA GRP 0DATA GRP 1
F26
D13#
K22
D14#
H25
D15#
H23
DSTBN0#
G22
DSTBP0#
J26
DINV0#
N22
D16#
K25
D17#
P26
D18#
R23
D19#
L25
D20#
L22
D21#
L23
D22#
M23
D23#
P25
D24#
P22
D25#
P23
D26#
T24
D27#
R24
D28#
L26
D29#
T25
D30#
N24
D31#
M24
DSTBN1#
N25
DSTBP1#
M26
DINV1#
AD26
GTLREF
C26
TEST1
D25
B22 B23 C21
MISC
TEST2
BSEL0 BSEL1 BSEL2
MLX_47170_4787_YONAH_479P
D32# D33# D34# D35# D36# D37# D38# D39# D40# D41# D42# D43# D44#
DATA GRP 2DATA GRP 3
D45# D46#
D47# DSTBN2# DSTBP2#
DINV2#
D48#
D49#
D50#
D51#
D52#
D53#
D54#
D55#
D56#
D57#
D58#
D59#
D60#
D61#
D62#
D63# DSTBN3# DSTBP3#
DINV3#
COMP0 COMP1 COMP2 COMP3
DPRSTP#
DPSLP# DPWR#
PWRGOOD
SLP#
PSI#
AA23 AB24 V24 V26 W25 U23 U25 U22 AB25 W22 Y23 AA26 Y26 Y22 AC26 AA24 W24 Y25 V23
AC22 AC23 AB22 AA21 AB21 AC25 AD20 AE22 AF23 AD24 AE21 AD21 AE25 AF25 AF22 AF26 AD23 AE24 AC20
R26 U26 U1 V1
E5 B5 D24 D6 D7 AE6
H_D#(32) H_D#(33) H_D#(34) H_D#(35) H_D#(36) H_D#(37) H_D#(38) H_D#(39) H_D#(40) H_D#(41) H_D#(42) H_D#(43) H_D#(44) H_D#(45) H_D#(46) H_D#(47)
H_D#(48) H_D#(49) H_D#(50) H_D#(51) H_D#(52) H_D#(53) H_D#(54) H_D#(55) H_D#(56) H_D#(57) H_D#(58) H_D#(59) H_D#(60) H_D#(61) H_D#(62) H_D#(63)
21­21­21-
12
R767 27.4_1%
12
R766 R720 27.4_1%
32-,10-
H_DPRSTP#
NOTE: COM0, COM2, trace impedance
should be 27.4 ohm COM1, COM3, trace impedance
should be 55 ohm
54.9_1%
12 12
54.9_1%R719
CLOSED TO CPU
32­21-
32-,21-
10-
H_DPSLP# H_DPWR#
H_CPUSLP#CPU_BSEL1 PSI#
H_DSTBN#3 H_DSTBP#3 H_DINV#3
21-,15-
H_D#(63:0)
21-
H_DSTBN#2
21-
H_DSTBP#2
21-
H_DINV#2
21-,15-
H_D#(63:0)
+VCCP
35-,32-,24-,23-,21-,20-,16-,14-,13-,9-,8-,15-
2
R56
OPEN
1
CLOSED TO CPU
32-
H_PWRGD
CHANGE by
Drawer_Name 28-Nov-2005
INVENTEC
TITLE
San Antonio 10
Yonah-2
CODE
SIZE
A3
TC8703 A03
CS
REVDOC. NUMBER
OFSHEET
6515
PLACE THESE INSIDE SOCKET CAVITY ON L8 (NORTH SIDE SECONDARY)
PLACE THESE INSIDE SOCKET CAVITY ON L8 (SOUTH SIDE SECONDARY)
PLACE THESE INSIDE SOCKET CAVITY ON L1 (NORTH SIDE PRIMARY)
PLACE THESE INSIDE SOCKET
CAVITY ON L1 (SOUTH SIDE PRIMARY)
1 2
1 2
1 2
1 2
1 2
1 2
C118
22uF_6.3v
C117
22uF_6.3v
22uF_6.3v
C684
22uF_6.3v
C708
OPEN
C155
OPEN
1 2
1 2
1 2
1 2
1 2
C113
22uF_6.3v
C121
22uF_6.3v
C691
22uF_6.3v
C690
22uF_6.3v
C706
OPEN
1 2
1 2
1 2
1 2
C114
22uF_6.3v
C111
22uF_6.3v
C688
22uF_6.3v
C685
22uF_6.3v
1 2
1 2
1 2
1 2
1 2
1 2
1 2
C112
22uF_6.3v
22uF_6.3v
C119
22uF_6.3v
22uF_6.3v
C681
22uF_6.3v
22uF_6.3v
C689
22uF_6.3v
22uF_6.3v
C151
OPEN
C686
OPEN
C705
OPEN
1 2
1 2
1 2
1 2
NOTE:
NO_STUFF 22UF X 12
+VCC_CORE
10-,16-
C115
C120
C683C687
C682
CN17-3
A7
VCC001
A9
VCC002
A10
VCC003
A12
VCC004
A13
VCC005
A15
VCC006
A17
VCC007
A18
VCC008
A20
VCC009
B7
VCC010
B9
VCC011
B10
VCC012
B12
VCC013
B14
VCC014
B15
VCC015
B17
VCC016
B18
VCC017
B20
VCC018
C9
VCC019
C10
VCC020
C12
VCC021
C13
VCC022
C15
VCC023
C17
VCC024
C18
VCC025
D9
VCC026
D10
VCC027
D12
VCC028
D14
VCC029
D15
VCC030
D17
VCC031
D18
VCC032
E7
VCC033
E9
VCC034
E10
VCC035
E12
VCC036
E13
VCC037
E15
VCC038
E17
VCC039
E18
VCC040
E20
VCC041
F7
VCC042
F9
VCC043
F10
VCC044
F12
VCC045
F14
VCC046
F15
VCC047
F17
VCC048
F18
VCC049
F20
VCC050
AA7
VCC051
AA9
VCC052
AA10
VCC053
AA12
VCC054
AA13
VCC055
AA15
VCC056
AA17
VCC057
AA18
VCC058
AA20
VCC059
AB9
VCC060
AC10
VCC061
AB10
VCC062
AB12
VCC063
AB14
VCC064
AB15
VCC065
AB17
VCC066
AB18
VCC067
MLX_47170_4787_YONAH_479P
VCC068 VCC069 VCC070 VCC071 VCC072 VCC073 VCC074 VCC075 VCC076 VCC077 VCC078 VCC079 VCC080 VCC081 VCC082 VCC083 VCC084 VCC085 VCC086 VCC087 VCC088 VCC089 VCC090 VCC091 VCC092 VCC093 VCC094 VCC095 VCC096 VCC097 VCC098 VCC099
VCC0100
VCCP01 VCCP02 VCCP03 VCCP04 VCCP05 VCCP06 VCCP07 VCCP08 VCCP09 VCCP10 VCCP11 VCCP12 VCCP13 VCCP14 VCCP15 VCCP16
VCCA
VCCSENSE
VSSSENSE
VID0 VID1 VID2 VID3 VID4 VID5 VID6
AB20 AB7 AC7 AC9 AC12 AC13 AC15 AC17 AC18 AD7 AD9 AD10 AD12 AD14 AD15 AD17 AD18 AE9 AE10 AE12 AE13 AE15 AE17 AE18 AE20 AF9 AF10 AF12 AF14 AF15 AF17 AF18 AF20
V6 G21 J6 K6 M6 J21 K21 M21 N21 N6 R21 R6 T21 T6 V21 W21
B26
AD6 AF5 AE5 AF4 AE3 AF2 AE2
AF7
AE7
+VCC_CORE
10-,16-
+VCCP
35-,32-,24-,23-,21-,20-,15-,14-,13-,9-,8-
1
C116
330uF_2.5v
2
+V1.5S
44-,38-,35-,33-,28-,24-,23-,20-,11-,9-,16-
10-
H_VID0
10-
H_VID1
10-
H_VID2
10-
H_VID3
10-
H_VID4
10-
H_VID5
10-
H_VID6
10-
LAYOUT NOTE:
1
ROUTE VCCSENSE AND VSSSENSE TRACE AT
R70
27.4 OHM WITH 50 MIL SPACING.
10_1%
PLACE PU AND PD WITHIN 1 INCH OF CPU
2
+VCC_CORE
10-,16-
1
R55
10_1%
2
VSSSENSE
+VCCP
10-
35-,32-,24-,23-,21-,20-,15-,14-,13-,9-,8-
C95
C154
1
1
2
2
0.1uF_10v
0.1uF_10v
VCCSENSE
PLACE THESE INSIDE SOCKET
CAVITY ON L8 SIDE (NORTH SIDE
SECONDARY)
C153
C93
1 2
0.1uF_10v
+V1.5S
1 2
1 2
C720
C94
1 2
0.1uF_10v
0.1uF_10v
44-,38-,35-,33-,28-,24-,23-,20-,11-,9-,16-
10uF_6.3v
LAYOUT NOTE:
PLACE C119 NEAR PIN B26
C719
1 2
0.01uF_16v
C152
1 2
0.1uF_10v
CHANGE by
INVENTEC
TITLE
San Antonio 10
Yonah-3
SIZE
28-Nov-2005Drawer_Name
A3
DOC. NUMBER
CODE
CS
SHEET OF
16 65
REV
A03TC8703
CN17-4
A4
VSS001
A8
VSS002
A11
VSS003
A14
VSS004
A16
VSS005
A19
VSS006
A23
VSS007
A26
VSS008
B6
VSS009
B8
VSS010
B11
VSS011
B13
VSS012
B16
VSS013
B19
VSS014
B21
VSS015
B24
VSS016
C5
VSS017
C8
VSS018
C11
VSS019
C14
VSS020
C16
VSS021
C19
VSS022
C2
VSS023
C22
VSS024
C25
VSS025
D1
VSS026
D4
VSS027
D8
VSS028
D11
VSS029
D13
VSS030
D16
VSS031
D19
VSS032
D23
VSS033
D26
VSS034
E3
VSS035
E6
VSS036
E8
VSS037
E11
VSS038
E14
VSS039
E16
VSS040
E19
VSS041
E21
VSS042
E24
VSS043
F5
VSS044
F8
VSS045
F11
VSS046
F13
VSS047
F16
VSS048
F19
VSS049
F2
VSS050
F22
VSS051
F25
VSS052
G4
VSS053
G1
VSS054
G23
VSS055
G26
VSS056
H3
VSS057
H6
VSS058
H21
VSS059
H24
VSS060
J2
VSS061
J5
VSS062
J22
VSS063
J25
VSS064
K1
VSS065
K4
VSS066
K23
VSS067
K26
VSS068
L3
VSS069
L6
VSS070
L21
VSS071
L24
VSS072
M2
VSS073
M5
VSS074
M22
VSS075
M25
VSS076
N1
VSS077
N4
VSS078
N23
VSS079
N26
VSS080
P3
VSS081
MLX_47170_4787_YONAH_479P
VSS082 VSS083 VSS084 VSS085 VSS086 VSS087 VSS088 VSS089 VSS090 VSS091 VSS092 VSS093 VSS094 VSS095 VSS096 VSS097 VSS098
VSS099 VSS0100 VSS0101 VSS0102 VSS0103 VSS0104 VSS0105 VSS0106 VSS0107 VSS0108 VSS0109 VSS0110 VSS0111 VSS0112 VSS0113 VSS0114 VSS0115 VSS0116 VSS0117 VSS0118 VSS0119 VSS0120 VSS0121 VSS0122 VSS0123 VSS0124 VSS0125 VSS0126 VSS0127 VSS0128 VSS0129 VSS0130 VSS0131 VSS0132 VSS0133 VSS0134 VSS0135 VSS0136 VSS0137 VSS0138 VSS0139 VSS0140 VSS0141 VSS0142 VSS0143 VSS0144 VSS0145 VSS0146 VSS0147 VSS0148 VSS0149 VSS0150 VSS0151 VSS0152 VSS0153 VSS0154 VSS0155 VSS0156 VSS0157 VSS0158 VSS0159 VSS0160 VSS0161 VSS0162
P6 P21 P24 R2 R5 R22 R25 T1 T4 T23 T26 U3 U6 U21 U24 V2 V5 V22 V25 W1 W4 W23 W26 Y3 Y6 Y21 Y24 AA2 AA5 AA8 AA11 AA14 AA16 AA19 AA22 AA25 AB1 AB4 AB8 AB11 AB13 AB16 AB19 AB23 AB26 AC3 AC6 AC8 AC11 AC14 AC16 AC19 AC21 AC24 AD2 AD5 AD8 AD11 AD13 AD16 AD19 AD22 AD25 AE1 AE4 AE8 AE11 AE14 AE16 AE19 AE23 AE26 AF3 AF6 AF8 AF11 AF13 AF16 AF19 AF21 AF24
CHANGE by
Drawer_Name 28-Nov-2005
INVENTEC
TITLE
San Antonio 10
Yonah-4
CODE
SIZE
A3
DOC. NUMBER
TC8703 A03
CS
SHEET
REV
OF
6517
FAN1_DAC0_3
+V5LA
53-,7-,6-,5-
0.1uF_10v
50-
R6696
1
150_5%
C5110
2
1 2
C34
2.2uF_10v
1 2
R763
OPEN
R764
0_5%
+V5S
60-,58-,52-,51-,50-,46-,45-,39-,38-,37-,35-,33-,31-,29-,12-,10-,8-
U4
FON
2
1 2
VIN
3
VO
4
VSET
GMT_G995P1U_SOP8_8P
C38
2.2uF_10v
CN13
1
VCC
2
GND
3
REFENCE
MLX_53398_0371_3P
12
BLM11A121S
FAN CN
U516
1
5
1
2
1
GMT_G708T1U_SOT23_5P
2
SETVCC
2
GND
43
HYST
OT
THRM_SHUTDWN#
81
GND
7
GND
6
GND
5
GND
58-,54-,53-,52-,51-,50-,49-,48-,47-,46-,44-,41-,40-,39-,38-,37-,35-,34-,33-,32-,31-,29-,28-,26-,25-,23-,20-,19-,13-,12-,11-,10-,9-,8-
+V3S
4
G
5
G
L2
R762
12
24.9K_1%
50-,28-,7-,18-
50-,28-,7-,18-
1
R39
10K_5%
2
C39
1 2
0.01uF_50v
THRM_SHUTDWN#
Q6020
D
S
D
S
G
SSM3K17FU_OPEN
G
50-
H_THERMDA H_THERMDC
+V3LA
60-,50-,47-,32-,7-,18-
FAN_TACH1
14-,18­14-,18-
PM_THRMTRIP#
C733
12
OPEN
VR_PWRGD_CK410
32-,19-,14-
1
R790
OPEN
2
A&D_ADM1032ARM_MICRO_SO_8P_OPEN
Thermal Sensor For CPU
R769
12
330_5%
+V3LA
60-,50-,47-,32-,7-,18-
C721
1 2
0.1uF_16v
U517
1
VDD
2
D+
3
D-
4
THERM#
BBUS
13-,10-
Q537
2
2SC2411K
SCLK
SDATA
ALERT#
GND
+V3LA
60-,50-,47-,32-,7-,18-
U3007
1
VDD
2
50-
1
R768
2M_5%
2
3
C
B
E
1
8 7 6 5
GND
3
BBUS
SMSC_EMC1212_SOT23_5P
1 2
50-,6-,5-
BATT_CLK
50-,6-,5-
BATT_DATA
C718
OPEN
5
DN
4
DP
SSM3K17FU
14-,18-
14-,18-
50-,28-,7-,18-
Q540
G
G
D
D
S
S
H_THERMDC
H_THERMDA
THRM_SHUTDWN#
CHANGE by
Drawer_Name
14-Dec-2005
INVENTEC
TITLE
San Antonio 10
THERMAL&FAN CONTROLLER
DOC. NUMBERSIZE
CODE
A3
TC8703 A03
CS
SHEET
OF
REV
6518
PM_EXTTS#0
PM_DPRSLPVR
26-,25­33-,10-
R60 R57
CPU_BSEL0 CPU_BSEL2
MCH_BSEL1
MCH_CFG(20:3)
R59
10K_5%
12
0_5%
12
0_5%
SB_3S_VRMPWRGD
15-,13-
15-,13-
13-
19-
+V3S
1
1
R58
10K_5%
2
2
BM_BUSY#
PLT_RST#
MCH_ICH_SYNC#
MCH_CLK_REQ#
1
R94
1K_5%
2
MCH_BSEL0
MCH_CFG(3) MCH_CFG(4) MCH_CFG(5) MCH_CFG(6) MCH_CFG(7) MCH_CFG(8) MCH_CFG(9) MCH_CFG(10) MCH_CFG(11) MCH_CFG(12) MCH_CFG(13) MCH_CFG(14) MCH_CFG(15) MCH_CFG(16) MCH_CFG(17) MCH_CFG(18) MCH_CFG(19) MCH_CFG(20)
32-,18-,14­50-,33-,10­50-,34-
100_5%
34­13-
U7-2
T32
RSVD_1
R32
RSVD_2
F3
RSVD_3
F7
RSVD_4
AG11
RSVD_5
AF11
RSVD_6
H7
RSVD_7
J19
RSVD_8
A41
RSVD_9
A35
RSVD_10
A34
RSVD_11
D28
1
R96
1K_5%
2
MCH_BSEL2
33-
RSVD_12
D27
RSVD_13
K16
CFG_0
K18
CFG_1
J18
CFG_2
F18
CFG_3
E15
CFG_4
F15
CFG_5
E18
CFG_6
D19
CFG_7
D16
CFG_8
G16
CFG_9
E16
CFG_10
D15
CFG_11
G15
CFG_12
K15
CFG_13
C15
CFG_14
H16
CFG_15
G18
CFG_16
H15
CFG_17
J25
CFG_18
K27
CFG_19
J26
CFG_20
G28
PM_BMBUSY#
F25
PM_EXTTS#_0
H26
PM_EXTTS#_1
G6
PM_THRMTRIP#
AH33
PWROK
12
AH34
RSTIN#
R52
H28
SDVO_CTRLCLK
H27
SDVO_CTRLDATA
K28
ICH_SYNC#
H32
CLK_REQ#
D1
NC0
C41
NC1
C1
NC2
BA41
NC3
BA40
NC4
BA39
NC5
BA3
NC6
BA2
NC7
BA1
NC8
B41
NC9
B2
AY41
AY1
AW41
AW1
A40
A4
A39
A3
ITL_CALISTOGA_MICRO_FCBGA_TSB_1466P
NC10 NC11 NC12 NC13 NC14 NC15 NC16 NC17 NC18
NC
RSVDCFG
DDR MUXING
SM_OCDCOMP_0 SM_OCDCOMP_1
SM_RCOMP#
D_REFCLKIN#
D_REFCLKIN
D_REFSSCLKIN#
CLK
D_REFSSCLKIN
PM
MISC
DMI
SM_CK_0 SM_CK_1 SM_CK_2 SM_CK_3
SM_CK#_0 SM_CK#_1 SM_CK#_2 SM_CK#_3
SM_CKE_0 SM_CKE_1 SM_CKE_2 SM_CKE_3
SM_CS#_0 SM_CS#_1 SM_CS#_2 SM_CS#_3
SM_ODT_0 SM_ODT_1 SM_ODT_2 SM_ODT_3
SM_RCOMP
SM_VREF_0 SM_VREF_1
G_CLKIN#
G_CLKIN
DMI_RXN_0 DMI_RXN_1 DMI_RXN_2 DMI_RXN_3
DMI_RXP_0 DMI_RXP_1 DMI_RXP_2 DMI_RXP_3
DMI_TXN_0 DMI_TXN_1 DMI_TXN_2 DMI_TXN_3
DMI_TXP_0 DMI_TXP_1 DMI_TXP_2 DMI_TXP_3
AY35 AR1 AW7 AW40
AW35 AT1 AY7 AY40
AU20 AT20 BA29 AY29
AW13 AW12 AY21 AW21
AL20 AF10
BA13 BA12 AY20 AU21
AV9 AT9
AK1 AK41
AF33 AG33 A27 A26 C40 D41
AE35 AF39 AG35 AH39
AC35 AE39 AF35 AG39
AE37 AF41 AG37 AH41
AC37 AE41 AF37 AG41
27-,25­27-,25­27-,26­27-,26-
27-,25­27-,25­27-,26­27-,26-
27-,25-
M_ODT0
27-,25-
M_ODT1
27-,26-
M_ODT2
27-,26-
M_ODT3
MCH_SMRCOMPN
13-
CLK_R_PEG_MCH#
13-
CLK_R_PEG_MCH
13-
CLK_R_DREF#
13-
CLK_R_DREF
13-
SSCLK1_R_DREF#
13-
SSCLK1_R_DREF
DMI_TXN(0) DMI_TXN(1) DMI_TXN(2) DMI_TXN(3)
DMI_RXN(0) DMI_RXN(1) DMI_RXN(2) DMI_RXN(3)
DMI_RXP(0) DMI_RXP(1) DMI_RXP(2) DMI_RXP(3)
M_CKE0 M_CKE1 M_CKE2 M_CKE3
M_CS0# M_CS1# M_CS2# M_CS3#
26-,25-,24-,11-,9-
DMI_TXP(0) DMI_TXP(1) DMI_TXP(2) DMI_TXP(3)
R100
80.6_1%
+V1.8
25­25­26­26-
25­25­26­26-
1
2
33-
33-
33-
33-
26-,25-,11-
1
2
M_CLK_DDR0 M_CLK_DDR1 M_CLK_DDR3 M_CLK_DDR4
M_CLK_DDR0# M_CLK_DDR1# M_CLK_DDR3# M_CLK_DDR4#
M_VREF
C203
0.47uF_6.3v
DMI_TXN(3:0)
DMI_TXP(3:0)
DMI_RXN(3:0)
DMI_RXP(3:0)
M_OCDCOMP0
M_OCDCOMP1
OPEN
1
R759
2
1
2
1
OPEN
2
R99
80.6_1%
58-,54-,53-,52-,51-,50-,49-,48-,47-,46-,44-,41-,40-,39-,38-,37-,35-,34-,33-,32-,31-,29-,28-,26-,25-,23-,20-,18-,13-,12-,11-,10-,9-,8-,19-
MCH_CFG(18) MCH_CFG(19) MCH_CFG(20)
R754
MCH_CFG(12) MCH_CFG(13) MCH_CFG(16) MCH_CFG(11) MCH_CFG(10)
MCH_CFG(9)PM_THRMTRIP# MCH_CFG(7) MCH_CFG(6) MCH_CFG(5)
MCH_CFG(5)
MCH_CFG(9) PCIE Graphics Lane
MCH_CFG(16) (FSB Dynamic ODT)
MCH_CFG(18)
(VCC Select)
MCH_CFG(20) (PCIE Backward Interpoerability
mode)
LOW=Reverse Lane
HIGH=Normal operation
LOW=Dynamic ODT HIGH=Dynamic ODT
19­19­19­19­19­19­19­19­19-
LOW=DMIx2
HIGH=DMIx4
Disable
Enabled
LOW=1.05V HIGH=1.5V
LOW=Only SDVO or PCIE x1 is operational
HIGH=SDVO and PCIE x1 are operating simultaneously via the PEG port
1
1
R723
R734
OPEN
OPEN
2
2
+V3S
1
2
19-
19-
19-
1
1
R738
R724
OPEN
OPEN
2
2
MCH_CFG(6)
(DDR)
MCH_CFG(10) HOST PLL VCO SELECT
R726
OPEN
1
R728
OPEN
2
MCH_CFG(19) (DMI LANE REVERSAL)
1
R739
OPEN
2
LOW=Moby Dick
HIGH=Calistoga
LOW=RESERVED
HIGH=MOBILITY
1
R729
OPEN
2
LOW=Normal
HIGH=LANES REVERSED
1
1
R735
R722
2.2K_5%
OPEN
2
2
MCH_CFG(7)
(CPU Strap)
MCH_CFG(11)
1
1
R736
R737
OPEN
OPEN
2
2
LOW=RSVD HIGH=Mobile CPU
LOW=Calistoga
HIGH=Reserved
CHANGE by
Drawer_Name
28-Nov-2005
INVENTEC
TITLE
San Antonio 10
Calistoga-1
DOC. NUMBER
CODE
SIZE
A3
TC8703 A03
CS
SHEET
REV
OF
6519
LVDS_R_TXCL-
LVDS_R_TXCL+
LVDS_R_TXCU­LVDS_R_TXCU+
LVDS_R_TXDL0-
LVDS_R_TXDL0+
LVDS_R_TXDL1-
LVDS_R_TXDL1+
LVDS_R_TXDL2-
LVDS_R_TXDL2+
LVDS_R_TXDU0-
LVDS_R_TXDU0+
LVDS_R_TXDU1-
LVDS_R_TXDU1+
LVDS_R_TXDU2-
LVDS_R_TXDU2+
+VCCP
58-,54-,53-,52-,51-,50-,49-,48-,47-,46-,44-,41-,40-,39-,38-,37-,35-,34-,33-,32-,31-,29-,28-,26-,25-,23-,19-,18-,13-,12-,11-,10-,9-,8-
R721
OPEN
12
R63
100K_5%
+V1.5S
R71
12
R95
12
0_5%
CRT_B CRT_G CRT_R
CRT_HSYNC CRT_VSYNC
50-,31-,28-
12
31-,28-
R5006
12
R5007
31-,28-
R62
12
31-,28-
0_5%
1
LVDS_TXCL-
2
LVDS_TXCL+
LVDS_TXCU-
LVDS_TXCU+ LVDS_TXDL0-
LVDS_TXDL1­LVDS_TXDL2-
LVDS_TXDL0+ LVDS_TXDL1+ LVDS_TXDL2+
44-,38-,35-,33-,28-,24-,23-,16-,11-,9-
LVDS_TXDU0­LVDS_TXDU1­LVDS_TXDU2-
R97
R742
R98
R741
R72
1
1
121
1
LVDS_TXDU0+ LVDS_TXDU1+ LVDS_TXDU2+
2
2
2
2
OPEN
OPEN
OPEN
OPEN
OPEN
12
29-,28-
R700
12
29-,28-
R702
12
29-,28-
R704
12
58-,29-,28-
R703
12
58-,29-,28-
R701
12
29-,28-
R705
12
29-,28-
R706
LCM_BKLTEN
RS500
1
4
0_5%
0_5%
0_5%
0_5%
0_5%
0_5%
0_5%
0_5%
1
12
1
1
1
4
4
4
4
4
4
4
20-
LVDS_TXCL-
20-
LVDS_TXCL+
20-
LVDS_TXCU-
20-
LVDS_TXCU+
20-
LVDS_TXDL0-
20-
LVDS_TXDL0+
20-
LVDS_TXDL1-
20-
LVDS_TXDL1+
20-
LVDS_TXDL2-
20-
LVDS_TXDL2+
20-
LVDS_TXDU0-
20-
LVDS_TXDU0+
20-
LVDS_TXDU1-
20-
LVDS_TXDU1+
20-
LVDS_TXDU2-
20-
LVDS_TXDU2+
SVID_R_LUMA
SVID_R_CHROMA
B
G
R
SVID_LUMA
SVID_CHROMA
31-,28-
23
31-,28-
RS507
1
31-,28­31-,28-
23
RS502
31-,28-
1
31-,28- 28-
23
RS503
1
31-,28-
23
RS501
1
31-,28­31-,28-
23
RS505
31-,28-
1
31-,28-
23
RS504
1
31-,28-
23
31-,28-
RS506
31-,28-
1
31-,28-
23
R745
2
120_0.5%
R743
120_0.5%
35-,32-,24-,23-,21-,16-,15-,14-,13-,9-,8-,20-
1
R732
OPEN
2
R747
2
120_0.5%
R746
2
120_0.5%
R744
2
120_0.5%
1
R733
0_5%
CLOSE TO CALISTOGA
2
31-,28-
0_5%
1
R50
100K_1%
2
LCM_3S_VDDEN
1
R48
1.5K_1%
2
R699
0_5%
12
30-,28-
12
30-,28-
R698
0_5%
+VCCP
35-,32-,24-,23-,21-,16-,15-,14-,13-,9-,8-,20-
1
OPEN
R753
2
R65
12
0_5%
R752
12
255_1%
LCM_DDCPCLK
LCM_DDCPDATA
SVID_R_LUMA
SVID_R_CHROMA
4.99K_1%
1
OPEN
R64
2
CRT_DDCCLK
CRT_DDCDATA
INV_PWM_3
R49
12
1
2
0_5% 0_5%
0_5% 0_5% 0_5%
0_5% 0_5%
39_5% 39_5%
+V3S
1
R730
R731
10K_5%
10K_5%
2
U7-3
D32
L_BKLTCTL
J30
L_BKLTEN
H30
L_CLKCTLA
H29
L_CLKCTLB
G26
L_DDC_CLK
G25
L_DDC_DATA
B38
L_IBG
C35
L_VBG
F32
L_VDDEN
C33
L_VREFH
C32
L_VREFL
A33
20­20­20­20-
20­20­20-
20­20­20-
20­20­20-
20­20­20-
R749
1
2
LA_CLK#
A32
LA_CLK
E27
LB_CLK#
E26
LB_CLK
C37
LA_DATA#_0
B35
LA_DATA#_1
A37
LA_DATA#_2
B37
LA_DATA_0
B34
LA_DATA_1
A36
LA_DATA_2
G30
LB_DATA#_0
D30
LB_DATA#_1
F29
LB_DATA#_2
F30
LB_DATA_0
D29
LB_DATA_1
F28
LB_DATA_2
A16
TV_DACA_OUT
C18
TV_DACB_OUT
A19
TV_DACC_OUT
J20
TV_IREF
B16
TV_IRTNA
B18
TV_IRTNB
B19
K30 J29
B
E23 D23
G
C22 B22
R
A21 B21
C26 C25
G23
J22 H23
ITL_CALISTOGA_MICRO_FCBGA_TSB_1466P
1
OPEN
OPEN
R748
2
TV_IRTNC
TV_DCONSEL0
TV_DCONSEL1
CRT_BLUE
CRT_BLUE#
CRT_GREEN
CRT_GREEN#
CRT_RED
CRT_RED#
CRT_DDC_CLK
CRT_DDC_DATA
CRT_HSYNC
CRT_IREF
CRT_VSYNC
TV
D40
EXP_A_COMPI
D38
EXP_A_COMPO
F34
EXP_A_RXN_0
G38
EXP_A_RXN_1
H34
EXP_A_RXN_2
J38
EXP_A_RXN_3
L34
EXP_A_RXN_4
M38
EXP_A_RXN_5
N34
EXP_A_RXN_6
P38
EXP_A_RXN_7
R34
EXP_A_RXN_8
T38
EXP_A_RXN_9
V34
EXP_A_RXN_10 EXP_A_RXN_11 EXP_A_RXN_12 EXP_A_RXN_13 EXP_A_RXN_14 EXP_A_RXN_15
EXP_A_RXP_0 EXP_A_RXP_1 EXP_A_RXP_2 EXP_A_RXP_3 EXP_A_RXP_4 EXP_A_RXP_5 EXP_A_RXP_6 EXP_A_RXP_7 EXP_A_RXP_8
EXP_A_RXP_9 EXP_A_RXP_10 EXP_A_RXP_11 EXP_A_RXP_12 EXP_A_RXP_13 EXP_A_RXP_14 EXP_A_RXP_15
EXP_A_TXN_0
EXP_A_TXN_1
EXP_A_TXN_2
EXP_A_TXN_3
EXP_A_TXN_4
EXP_A_TXN_5
EXP_A_TXN_6
EXP_A_TXN_7
EXP_A_TXN_8
EXP_A_TXN_9 EXP_A_TXN_10 EXP_A_TXN_11 EXP_A_TXN_12 EXP_A_TXN_13 EXP_A_TXN_14 EXP_A_TXN_15
EXP_A_TXP_0
EXP_A_TXP_1
EXP_A_TXP_2
EXP_A_TXP_3
EXP_A_TXP_4
EXP_A_TXP_5
EXP_A_TXP_6
EXP_A_TXP_7
EXP_A_TXP_8
EXP_A_TXP_9
EXP_A_TXP_10 EXP_A_TXP_11 EXP_A_TXP_12 EXP_A_TXP_13 EXP_A_TXP_14 EXP_A_TXP_15
W38 Y34 AA38 AB34 AC38
D34 F38 G34 H38 J34 L38 M34 N38 P34 R38 T34 V38 W34 Y38 AA34 AB38
F36 G40 H36 J40 L36 M40 N36 P40 R36 T40 V36 W40 Y36 AA40 AB36 AC40
D36 F40 G36 H40 J36 L40 M36 N40 P36 R40 T36 V40 W36 Y40 AA36 AB40
LVDS
PCI-EXPRESS GRAPHICS
VGA
12
28-
PEG_C_RXN(0)
28-
PEG_C_RXN(1)
28-
PEG_C_RXN(2)
28-
PEG_C_RXN(3)
28-
PEG_C_RXN(4)
28-
PEG_C_RXN(5)
28-
PEG_C_RXN(6)
28-
PEG_C_RXN(7)
28-
PEG_C_RXN(8)
28-
PEG_C_RXN(9)
28-
PEG_C_RXN(10)
28-
PEG_C_RXN(11)
28-
PEG_C_RXN(12)
28-
PEG_C_RXN(13)
28-
PEG_C_RXN(14)
28-
PEG_C_RXN(15)
28-
PEG_C_RXP(0)
28-
PEG_C_RXP(1)
28-
PEG_C_RXP(2)
28-
PEG_C_RXP(3)
28-
PEG_C_RXP(4)
28-
PEG_C_RXP(5)
28-
PEG_C_RXP(6)
28-
PEG_C_RXP(7)
28-
PEG_C_RXP(8)
28-
PEG_C_RXP(9)
28-
PEG_C_RXP(10)
28-
PEG_C_RXP(11)
28-
PEG_C_RXP(12)
28-
PEG_C_RXP(13)
28-
PEG_C_RXP(14)
28-
PEG_C_RXP(15)
20-
PEG_TXN(0)
20-
PEG_TXN(1)
20-
PEG_TXN(2)
20-
PEG_TXN(3)
20-
PEG_TXN(4)
20-
PEG_TXN(5)
20-
PEG_TXN(6)
20-
PEG_TXN(7)
20-
PEG_TXN(8)
20-
PEG_TXN(9)
20-
PEG_TXN(10)
20-
PEG_TXN(11)
20-
PEG_TXN(12)
20-
PEG_TXN(13)
20-
PEG_TXN(14)
20-
PEG_TXN(15)
20-
PEG_TXP(0)
20-
PEG_TXP(1)
20-
PEG_TXP(2)
20-
PEG_TXP(3)
20-
PEG_TXP(4)
20-
PEG_TXP(5)
20-
PEG_TXP(6)
20-
PEG_TXP(7)
20-
PEG_TXP(8)
20-
PEG_TXP(9)
20-
PEG_TXP(10)
20-
PEG_TXP(11)
20-
PEG_TXP(12)
20-
PEG_TXP(13)
20-
PEG_TXP(14)
20-
PEG_TXP(15)
R51
24.9_1%
+V1.5S_PCIE
23-
PEG_TXP(0)
PEG_TXP(1)
PEG_TXP(2) PEG_C_TXP(2)
PEG_TXP(3) PEG_C_TXP(3)
PEG_TXP(4)
PEG_TXP(5)
PEG_TXP(6) PEG_C_TXP(6)
PEG_TXP(7) PEG_C_TXP(7)
PEG_TXN(9)
PEG_TXP(12)
20-
C40
1
2
C42 C66 C67 C43 C44 C68 C69 C45 C46 C70 C71 C47 C48 C72 C73 C49 C50 C74 C75 C51 C52 C76 C77 C53 C54 C78 C79 C82 C83 C80 C81
1
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
1
12
12
1
12
12
1
12
12
12
12
12
12
12
1
0.1uF_16v
2
0.1uF_16v
0.1uF_16v
0.1uF_16v
0.1uF_16v
0.1uF_16v
0.1uF_16v
0.1uF_16v
0.1uF_16v
0.1uF_16v
0.1uF_16v
0.1uF_16v
0.1uF_16v
0.1uF_16v
0.1uF_16v
0.1uF_16v
0.1uF_16v
2
0.1uF_16v
0.1uF_16v
0.1uF_16v
2
0.1uF_16v
0.1uF_16v
0.1uF_16v
2
0.1uF_16v
0.1uF_16v
0.1uF_16v
0.1uF_16v
0.1uF_16v
0.1uF_16v
0.1uF_16v
0.1uF_16v
2
0.1uF_16v
20-
20-
20-
20-
20-
20-
20-
20-
20-
20-
20-
20-
20-
20-
20-
20-
20-
20-
20-
20-
20-
20-
20-
20-
20-
20-
20-
20-
20-
20-
20-
Place to near NB
TITLE
SIZE
CHANGE by
Drawer_Name
28-Nov-2005
A3
28-
PEG_C_TXP(0)
28-
PEG_C_TXN(0)PEG_TXN(0)
28-
PEG_C_TXP(1)
28-
PEG_C_TXN(1)PEG_TXN(1)
28-
28-
PEG_C_TXN(2)PEG_TXN(2)
28-
28-
PEG_C_TXN(3)PEG_TXN(3)
28-
PEG_C_TXP(4)
28-
PEG_C_TXN(4)PEG_TXN(4) PEG_C_TXP(5)
28-
PEG_C_TXN(5)PEG_TXN(5)
28-31-,28-
28-
PEG_C_TXN(6)PEG_TXN(6)
28-
28-
PEG_C_TXN(7)PEG_TXN(7)
28-
PEG_C_TXP(8)PEG_TXP(8)
28-
PEG_C_TXN(8)PEG_TXN(8)
28-
PEG_C_TXP(9)PEG_TXP(9)
28-
PEG_C_TXN(9)
28-
PEG_C_TXP(10)PEG_TXP(10)
28-
PEG_C_TXN(10)PEG_TXN(10)
28-
PEG_C_TXP(11)PEG_TXP(11)
28-
PEG_C_TXN(11)PEG_TXN(11)
28-
PEG_C_TXP(12)
28-
PEG_C_TXN(12)PEG_TXN(12)
28-
PEG_C_TXP(13)PEG_TXP(13)
28-
PEG_C_TXN(13)PEG_TXN(13)
28-
PEG_C_TXP(14)PEG_TXP(14)
28-
PEG_C_TXN(14)PEG_TXN(14)
28-
PEG_C_TXP(15)PEG_TXP(15)
28-
PEG_C_TXN(15)PEG_TXN(15)
INVENTEC
San Antonio 10
Calistoga-2
DOC. NUMBER REV
CODE
TC8703 A03
CS
SHEET
OF
6520
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