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San Antonio
For Vista
VP BUILD
2006 1123
DATE
CHANGE NO.
REV
DRAWER
DESIGN
CHECK
RESPONSIBLE
SIZE =
FILE NAME :
XXXXXXXXXXXX
P/N
EE
3
XXXX-XXXXXX-XX
DATE
POWER
DATE
VER : REV
INVENTEC
TITLE
San Antonio 10 Vista
SIZE
CODE
A3
CS
SHEET
DOC. NUMBER
1310A2101801 A03
OF
651
![](/html/34/341f/341f51e7e3322c4ec63d0b7de5915683dd83a3a1aa715c876b81cf92b0acbe65/bg2.png)
TABLE OF CONTENTS
PAGE
1.COVER PAGE
2.INDEX
3.BLOCK DIAGRAM
4.POWER SEQUENCE BLOCK
5-12.SYSTEM POWER
13.CLOCK GENERATOR
14.CPU Yonah1
15.CPU Yonah2
16.CPU Yonah3
17.CPU Yonah4
18.FAN & THERMAL CONTROLLER
19.N/B Calistoga 1
20.N/B Calistoga 2
21.N/B Calistoga 3
22.N/B Calistoga 4
23.N/B Calistoga 5
24.N/B Calistoga 6
25.DDR2 DIMM0
26.DDR2 DIMM1
27.DDR DAMPING
28.VGA CONN
29.CRT CONN
30.SVIDEO CONN
31.LCD CONN
PAGE
32.S/B ICH7 1
33.S/B ICH7 2
34.S/B ICH7 3
35.S/B ICH7 4
36.S/B ICH7 5
37.CARDBUS CONTROLLER
38.PCMCIA & EXPRESS CARD
39.5 IN 1 CARD SLOT
40.1394 CONTROLLER
41.LAN CONTROLLER-1
42.LAN CONTROLLER-2
43.RJ45 & TRANSFORMER
44.MINI CARD CONN
45.3D Sensor & SATA HDD CONN
46.ODD CONN
47.USB CONN
48.BLUE TOOTH CONN
49.TPM 1.2
50.SUPER I/O
51.Serial & Parallel port CONTROLLER
52.K/B & D/B CONN
53.CIR & FIR
54.AZALIA CODEC
55.AUDIO AMP & MIC & HP
PAGE
56.LINE IN & LINE OUT
57.MDC 1.5 CONN
58.DOCKING 1
59.DOCKING 2
60.SWITCH & LED (MB)
61.SWITCH & LED (DB)
62.PICK BUTTON BOARD
63.PARALLEL PORT BOARD
64.USB BOARD
65.DRILL HOLE
CHANGE by
Drawer_Name
13-Nov-2006
INVENTEC
TITLE
San Antonio 10 Vista
SIZE REV
CODE
CS
SHEET
DOC. NUMBER
OF
265
A3
A031310A2101801
![](/html/34/341f/341f51e7e3322c4ec63d0b7de5915683dd83a3a1aa715c876b81cf92b0acbe65/bg3.png)
Yonah
(uFCPGA)
ICS9LPR316
Clock generator
USB0
Bluetooth
USB1
USB2
FINGER PRINT
PORT REPLICATOR
BATTERY
S-video
HDD
ODD
USB3
CONN C (DB)
CONN D (DB)
LCM
CRT
USB4
MDC / Modem
USB5
CONN A (MB)
Module 56K
SATA
Primary_IDE
USB6
CONN B (MB)
Express Card
USB7
DOCKING
3.3V, AZALIA
AZALIA
FSB, 533/667 MHz
Calistoga
945GM/PM
1466 uFCBGA
DMI x4
ICH7-M
652 BGA
3.3V, LPC_Interface,33MHz
1.8V, DDR2 Interface, 533/667 MHz
1.8V, DDR2 Interface, 533/667 MHz
PCI_EXPRESS
INTEL
10/100 82562GZ
1G 82573E(AMT)
82573L(w/o AMT)
RJ45
MINI CARD
Wireless LAN
ANT
DDR2_SODIMM0
3.3V, PCI_Interface,33MHz
EXPRESS CARD
ANT
DDR2_SODIMM1
CARD BUS
TI_PCI7412/PCI4512
(CO-LAYOUT)
Cardbus
SLOT A
Card reader
CONN
1394
CONN
System Charger &
DC/DC System power
(IMVP-6
VR)
RJ11
MIC
JACK
HP
JACK
SPEAKER
SMSC
KBC1122
BIOS
FLASH ROM
3-AXIS SENSOR
SERIAL PORT
FIR
CIR
TPM 1.2
CHANGE by
Drawer_Name
SMSC
SIO 1036
PARALLEL PORT
TITLE
SIZE
13-Nov-2006
A3
INVENTEC
San Antonio 10 Vista
CODE
DOC. NUMBER
1310A2101801 A03
CS
SHEET
OF
653
REV
![](/html/34/341f/341f51e7e3322c4ec63d0b7de5915683dd83a3a1aa715c876b81cf92b0acbe65/bg4.png)
DSKDC
+VBAT
5V
+V5S
+V5A
+VADPTR
SCL
SDA
ACOK
+VPACK
SKIP#
3V
EN_PSV
EN_PSV
EN_PSV
+V3A
1.5V
1.8V
VCCP
+V1.8
+V1.5S
+VCCP
+V3S
+V2.5S
+V0.9S
CHANGE by
Drawer_Name 13-Nov-2006
+VCC_CORE
INVENTEC
TITLE
San Antonio 10 Vista
CODE
SIZE
A3
DOC. NUMBER
1310A2101801 A03
CS
SHEET
REV
OF
654
![](/html/34/341f/341f51e7e3322c4ec63d0b7de5915683dd83a3a1aa715c876b81cf92b0acbe65/bg5.png)
5-
DSKDC
+VADPTR
+VBAT_A
D510
RLZ18C 2
58-
5-
DTA143EKA
2
1
BATT_CLK
BATT_DATA
JST_S4B_EH_4P
D509
1
2
PDS1040_10A_40V
D508
1
2
PDS1040_10A_40V
R6704
12
4.7K_5%
R6705
2
1
4.7K_5%
1
E
B
Q513
C
3
DTC124EK
50-,18-,650-,18-,6-
CN503
2
3
3
B
1
1
2
2
3
3
4
4
1
R618
432K_1%
2
Q514
3
C
E
1
CHARGE_GND
C1
1
10pF_50v
2
FUSE502
12
10A_125V
+VBAT
28-,10-,9-,8-,7-,6-,5-
2
D6093
3
BAT54S_30V_0.2A
1
1
C577
1
R617
42.2K_1%
2
OPEN
2
50-
ACPRES
60-,58-,50-,47-,44-,43-,38-,35-,34-,33-,14-,12-,11-,7-
+VADPTR
5-
C2
1
0.1uF_25v
2
R619
12
10_5%
1
R637
47K_5%
2
C606
1uF_10v
1
R642
100K_5%
2
CHARGE_GND
+V3A
CHG_EN
0.1uF_25v
C578
1
2.2uF_25v
2
CHARGE_GND
1
2
50-
1
C5114
10uF_35v
2
C596
CHARGE_GND
+V5LA
53-,18-,7-,6-
1
2
1
2
1
2
1
10K_5%
1
2
R641
8.06K_1%
R639
39.2K_1%
50-
R6676
22.6K_1%
R695
BATT_IN
2
R616
12
0.01_1%_1W
C599
12
0.1uF_25v
6-
THRM1
+VBAT_A
5-
CHARGE_GND
C597
1
2
0.1uF_25v
U511
12
VCC
3
ACN
4
ACP
6
BYPASS#
5
ACDET
11
VREF5
10
AGND
15
TS
1
CHGEN#
14
SCL
13
SDA
25
ALARM#
17
IOUT
TI_BQ24721_QFN_32P
2
ACDRV#
23
SYS
24
BATDRV#
32
PVCC
30
HIDRV
29
PH
31
BTST
28
REGN
27
LODRV
26
PGND
22
SYNP
21
SYNN
20
SRP
19
SRN
18
BAT
7
EAO
8
EAI
9
FBO
16
ISYNSET
33
TML
R636
12
0_5%
DCPWEN
10_5%
R635
C595
2
1
D512
13
CHENMKO_BAT54_3P
1
R638
100K_5%
2
CHARGE_GND
C569
1
2
1uF_25v
SSM3K17FU
50-
0.1uF_25v
12
1
R643
200K_5%
2
Q509
G
G
1
2
10uF_25v_K_X5R
C598
12
1uF_25v
1
2
1
2
1
R601
47K_5%
2
1
R602
4.7K_5%
2
D
D
S
S
C576
R640
18K_5%
C607
100pF_50v
Q511
D1
1
2
G1
8
G2
3
FDS6900AS
1
2
Q512
1
S
2
3
4
AM4825P_AP
C570
12
0.1uF_25v
5
S1_D2
6
7
4
S2
C579
56pF_50v
8
D
7
6
5
G
L512
12
PLFC1045R_10uH
1
R620
10K_5%
2
C580
1
2
1500pF_50v
FUSE503
12
10A_125V
C568
1
2
0.1uF_25v
10uF_25v_K_X5R
C594
1
2
10uF_25v_K_X5R
CHARGE_GND
C567
1
2
0.01_1%_1W
C602
0.1uF_25v
C601
1
2
0.1uF_25v
NEAR IC
59-,58-
1
2
10uF_25v_K_X5R
R634
12
12
CHARGE_GND
1
2
C575
DCOUT
C604
0.1uF_25v
L3007
NFM60R30T222
Q519
AM4825P_AP
1
S
2
3
4
+VPACK
6-
C593
1
2
10uF_25v_K_X5R
CHARGE_GND
1
4
3
2
8
D
7
6
5
G
Q518
8
D
S
7
6
54
G
AM4825P_AP
C603
1
2
0.1uF_25v
+VBAT
28-,10-,9-,8-,7-,6-,5-
1
4
3
2
1
2
3
L3006
NFM60R30T222
Drawer_Name
13-Nov-2006
INVENTEC
TITLE
San Antonio 10 Vista
DC &BATTERY CHANGER
CODE DOC. NUMBERSIZE
A3
1310A2101801 A03
CS
SHEET
REV
OF
655
![](/html/34/341f/341f51e7e3322c4ec63d0b7de5915683dd83a3a1aa715c876b81cf92b0acbe65/bg6.png)
THRM1
BATT_DATA
BATT_CLK
550-,18-,550-,18-,5-
R5002
12
+VBAT
28-,10-,9-,8-,7-,5-
1
R8
1M_5%
2
1
R7
56.2K_1%
2
1
R6
180K_1%
2
+VPACK
5-
C5113
OPEN
CN6
7
G
7
G2
6
G
6
G1
5
5
4
4
3
3
2
2
1
1
TYCO_1747602_1_7P
FUSE501
12
1K_5%
1
D503
3
AZ23C6V2
LITTLEFUSE_R451012_12A_65V
C541
1
2
1000pF_50v
C5111
1
OPEN
2
C5112
1
1
OPEN
2
2
2
+V5LA
U1
3
LTH
2
GND
1
HTH
GMT_G680LT1_SOT23_5P
RESET#
VCC
4
5
7-
+V5AUXON
53-,18-,7-,5-
1
2
C10
0.1uF_10v
CHANGE by
Drawer_Name
13-Nov-2006
INVENTEC
TITLE
San Antonio 10 Vista
BATTERY CONN
SIZE
A3
DOC. NUMBER
CODE
1310A2101801 A03
CS
SHEET
REV
OF
656
![](/html/34/341f/341f51e7e3322c4ec63d0b7de5915683dd83a3a1aa715c876b81cf92b0acbe65/bg7.png)
+V5AUXON
THRM_SHUTDWN#
EC_PW_ON
SLP_S3#_3R
R6685
12
6-
10K_5%
28-,18-
D511
BAT54C_30V_0.2A
R16
50-
12
10K_5%
50-,47-,45-,33-,12-,11-,10-
+VBAT
28-,10-,9-,8-,6-,5-,7-
2
R13
100K_5%
1
1
3
2
R629
0_5%
12
TPS51020
10.2K_1%
R630
10K_1%
12
C17
0.01uF_16v
1
2
12
C16
0.01uF_16v
2
1
R17
12
1M_5%
R624
12
1
R626
29.4K_1%
2
C18
2
12
2.7K_5%
0.033uF_16v
0.1uF_16vC588
2
2
1
1.8K_5%
C19
3900pF_50v
R628
12
51.1K_1%
1
2
1
4700pF_50v
2
1
2
R15
R14
1
1
R623
220_5%
2
C587
6800pF_25v
C586
R625
330_5%
1
1
R627
0_5%
2
U2
1
INV1
COMP1
SSTRT1
SKIP#
VO1_VDDQ
DDR#
GND
REF_X
ENBL1
ENBL2
VO2
PGOOD
SSTRT2
COMP2
INV2
VBST1
OUT1_U
OUT1_D
OUTGND1
TRIP1
TRIP2
VREG5
REG5_IN
OUTGND2
OUT2_D
OUT2_U
VBST2
LL1
VIN
LL2
2
3
4
5
6
7
8
9
10
11
12
13
14
15
TI_TPS51020DBT_TSSOP_30P
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
R9
12
4.7_5%
1
2
C12
4.7uF_25v
R11
R12
1
2.2_5%
C11
1
2
2.2uF_25v
2
R10
20K_1%
15K_1%
12
1
C14
2
12
0.1uF_25v
C13
R18
12
2.2_5%
0.1uF_25v
12
C629
1
2
4.7uF_25v
60-,59-,50-,47-,35-,28-,12-,11-,9-,8-,7-
765
8
D
Q4
G
SI4800DY
S
123
4
765
8
D
Q5
G
FDS6690AS
S
3
12
4
+V5LA
1
2
C25
1
2
4.7uF_25v
53-,18-,6-,5-,7-
C15
1uF_6.3v
1
2
FDS6900AS
+V5A
C631
10uF_25v
1
2
8
3
Q2
D1
G1
G2
+VBAT
1
2
5
S1_D2
6
7
4
S2
28-,10-,9-,8-,6-,5-,7-
C27
4.7uF_25v
L1
12
PLFC1045P_4R7A
1
C63
68uF_25v_OPEN
2
1
2
330uF_6.3v
L513
12
MPLC0730_4R7
C21
1uF_10v
+V3LA
60-,50-,47-,32-,18-,7-
PAD500
2
1
POWERPAD_2_0610
1
1
C612
2
330uF_6.3v
2
C613
1uF_10v
+V5A
60-,59-,50-,47-,35-,28-,12-,11-,9-,8-,7-
PAD1
POWERPAD_2_0610
C20
1
2
Q524
G
G
SSM3K17FU
+V5LA
D
S
53-,18-,6-,5-,7-
1
R646
10K_5%
2
D
S
+V3LA
60-,50-,47-,32-,18-,7-
D514
13
CHENMKO_BAT54_3P
R645
2
1
100K_5%
C611
1
0.1uF_10v
2
CLOSE TO PAD4
4
3
4
3
Q521
S
G
FDC638P
Q522
S
G
FDC638P
D
D
1
2
5
6
1
2
5
6
SSM3K17FU
+V3A
60-,58-,50-,47-,44-,43-,38-,35-,34-,33-,14-,12-,11-,5-
1
R644
200_5%
2
Q523
D
D
G
G
S
S
CHANGE by
Drawer_Name 13-Nov-2006
INVENTEC
TITLE
San Antonio 10 Vista
SYSTEM POWER(3V/5V)
DOC. NUMBER
CODE
SIZE REV
A3
1310A2101801 A03
CS
SHEET
OF
657
![](/html/34/341f/341f51e7e3322c4ec63d0b7de5915683dd83a3a1aa715c876b81cf92b0acbe65/bg8.png)
SLP_S3#_5R
PWR_GOOD_3
28-,12-,9-
11-
C220
1
2
OPEN
R160
12
OPEN
R157
12
10K_5%
MCH_GOOD
+VBAT
28-,10-,9-,7-,6-,5-
+V5A
60-,59-,50-,47-,35-,28-,12-,11-,9-,7-
1
1
R155
R153
10_5%
100K_5%
2
2
10-
1
C216
1uF_6.3v
2
R154
2
0_5%
10mil
1
1
2
1
2
C219
OPEN
R158
232K_1%
10mil
15mil
15mil
10mil
10mil
10mil
VCCPGND
U10
1
EN_PSV
2
TON
3
VOUT
4
V5FILT
5
VFB
6
PGOOD
7
GND
VBST
DRVH
V5DRV
DRVL
PGND
14
13
12
LL
11
TRIP
10
9
8
TI_TPS51117PW_TSSOP_14P
40mil
765
8
D
Q9
G
SI4800DY
S
123
VCCPGND
4
5
76
8
D
Q10
G
FDS6690AS
S
123
4
C218
R159
1
1uF_6.3v
2
C217
12
2.2_5%
R156
1
15K_1%
12
0.1uF_25v
2
15mil
15mil
15mil
10mil
15mil
15mil
15mil
C147
1
1
2
2
10uF_25v_K_X5R
PLC_1045_2R0
C146
4.7uF_25v
L12
12
VCCPGND
1
R151
40.2K_1%
2
1
R150
100K_1%
2
C208
1
2
OPEN
220uF_2v_15mR_Panasonic
+VCCP
35-,32-,24-,23-,21-,20-,16-,15-,14-,13-,9-
12A250mil
1
2
POWERPAD_2_0610
C221
10uF_6.3v
PAD4
12A250mil
1
2
C210
+V3S
58-,54-,53-,52-,51-,50-,49-,48-,47-,46-,44-,41-,40-,39-,38-,37-,35-,34-,33-,32-,31-,29-,28-,26-,25-,23-,20-,19-,18-,13-,12-,11-,10-,9-
C735
1
2
4.7uF_6.3v
+V5S
60-,58-,52-,51-,50-,46-,45-,39-,38-,37-,35-,33-,31-,29-,18-,12-,10-
1
R774
2.4K_1%
2
Q541
6
4
S
D
5
2
13
G
AM3446N
1
R775
0_5%
2
U518
1
REF
3
ANODE
2
CATHODE
TEC_AZ431LANTR_E1_SOT23_3P
+V2.5S
28-,23-
PAD504
POWERPAD_2_0610
1
R772
C723
1
2
1
2
C722
OPEN
OPEN
10.2K_1%
2
1
R773
10K_1%
2
1
2
C724
10uF_6.3v
INVENTEC
TITLE
San Antonio 10 Vista
CHANGE by
Drawer_Name 13-Nov-2006
SYSTEM POWER (+V2.5S / +VCCP)
SIZE
A3
DOC. NUMBER
CODE
1310A2101801 A03
CS
SHEET OF
REV
658
![](/html/34/341f/341f51e7e3322c4ec63d0b7de5915683dd83a3a1aa715c876b81cf92b0acbe65/bg9.png)
+VBAT
28-,10-,8-,7-,6-,5-,9-
+V1.8
26-,25-,24-,19-,11-,9-
+V1.8_VRAM
28-,9-
PAD502
POWERPAD_2_0610
PAD501
POWERPAD_2_0610
10uF_6.3v
+V1.8
C640
1
1
C627
2
C5077
12
330pF_50v
C5078
12
330pF_50v
C5079
12
330pF_50v
C5080
1
330pF_50v
C5081
1
330pF_50v
C5082
12
330pF_50v
2
2
2
330uF_2v_15mR_Panasonic
26-,25-,24-,19-,11-,9-
1
2
4.7uF_25v
L515
12
PLC_1045_2R0
1
R697
OPEN
2
SSM34_3A40V_OPEN
C639
1
2
OPEN
R23
100K_1%
2
1
2
C29
OPEN
1
C28
12
0.1uF_25v
2
51124GND
60-,59-,50-,47-,35-,28-,12-,11-,8-,7-,9-
1
R21
OPEN
2
R19
12
2.2_5%
12
R24
OPEN
7
PGOOD2
TI_TPS51124RGER_QFN_24P
8
EN2
9
VBST2
10
DRVH2
11
LL2
12
DRVL2
R25
OPEN
6
VO2
PGND2
13
VFB2
TRIP2
2
1
4
2
5
3
GND
VFB1
TONSEL
U3
TRIP1
V5FILT
V5IN
17
14
15
16
SLP_S5#_5R
10uF_25v_K_X5R
C628
1
2
1
2
C24
D516
12-
8765
D
8765
D
1
Q527
G
SI4800DY
41S23
G
Q528
FDS6690AS
R22
143K_1%
1
1
C30 OPEN
R20
0_5%
2
2
41S23
1
R34
15K_1%
R33
12
0_5%
51124GND
12
0.1uF_10v
12
0.1uF_10v
12
0.1uF_10v
12
0.1uF_10v
+V3S
58-,54-,53-,52-,51-,50-,49-,48-,47-,46-,44-,41-,40-,39-,38-,37-,35-,34-,33-,32-,31-,29-,28-,26-,25-,23-,20-,19-,18-,13-,12-,11-,10-,8-
+V1.5S +VBAT
C5089
12
0.1uF_10v
C5090
12
0.1uF_10v
C5091
12
0.1uF_10v
+VCCP
C5087
1
2
0.1uF_10v
C5088
12
0.1uF_10v
+V1.8 +V1.8 +V1.8
26-,25-,24-,19-,11-,9-
C5083
C5084
C5085
C5086
FOR EMI
2
R36
20K_1%
2
1
44-,38-,35-,33-,28-,24-,23-,20-,16-,11-,9-
35-,32-,24-,23-,21-,20-,16-,15-,14-,13-,8-
1
VO1
GND
PGOOD1
VBST1
DRVH1
DRVL1
PGND1
18
EN1
LL1
51124GND
25
24
23
22
21
20
19
1
2
R26
100K_1%
1
2
+V5A+V5A
60-,59-,50-,47-,35-,28-,12-,11-,8-,7-,9-
1
R30
OPEN
2
C33
R29
12
12
2.2_5%
0.1uF_25v
1
2
R35
10_5%
C36
1uF_6.3v
26-,25-,24-,19-,11-,9-26-,25-,24-,19-,11-,9-
C5092
0.1uF_25v
+V1.8_VRAM
28-,9-
C5093
0.1uF_25v
C31
12
12
R27
102K_1%
2
2
1
2
+V5A
1
4.7uF_6.3v
2
1
1
OPEN
C32
OPEN
C37
R28
1
0_5%
28-,10-,8-,7-,6-,5-,9-
CHANGE by
28-,12-,8-
2
Q3
1
2
8
G1
G2
3
FDS6900AS
D1
SLP_S3#_5R
5
S1_D2
6
7
4
S2
Drawer_Name
C26
1
1
10uF_25v_K_X5R
2
2
4.7uF_25v
L517
12
PLFC1045P_4R7A
C630
1
C641
2
220uF_2v_15mR_Panasonic
TITLE
SYSTEM POWER(+V1.5S / +V1.8)
13-Nov-2006
A3
44-,38-,35-,33-,28-,24-,23-,20-,16-,11-,9-
+V1.5S
PAD503
POWERPAD_2_0610
1
R710
OPEN
2
1
C654
10uF_6.3v
2
C655
1
2
OPEN
INVENTEC
San Antonio 10 Vista
CODE
CS
SHEET
OF
965
REVSIZE DOC. NUMBER
A031310A2101801
![](/html/34/341f/341f51e7e3322c4ec63d0b7de5915683dd83a3a1aa715c876b81cf92b0acbe65/bga.png)
MAX8770_VCC
IMVP_CKEN#
VR_PWRGD_CK410
H_VID0
H_VID1
H_VID2
H_VID3
H_VID4
H_VID5
H_VID6
PSI#
H_DPRSTP#
PM_DPRSLPVR
MCH_GOOD
MAX8770_VCC
R818
1
U519
VCC
CLKEN#
PWRGD
D0
D1
D2
D3
D4
D5
D6
PSI#
DPRSTP#
DPRSLPVR
SHDN#
CCV
REF
TIME
THRM
VRHOT#
POUT#
10_5%
2
PGND1
CSP1
CSN1
PGND2
CSP2
CSN2
GNDS
THERMAL
BST1
GND
BST2
25
VDD
8
TON
30
29
DH1
28
LX1
26
DL1
27
18
17
16
12
FB
10
CCI
20
21
DH2
22
LX2
24
DL2
23
14
15
13
41
CPU_GND
10-
C738
1
2.2uF_10v
CPU_GND
R859
12
OPEN
TP748
TP749
TP750
12
12
12
12
12
12
VRHOT#
12
2
TP751
TP75216-
TP753
TP754
470_5%
470pF_50v
0.22uF_6.3v
71.5K_1%
10K_5%R854
OPEN
33-
R855
OPEN
19
1
2
31
32
33
34
35
36
37
3
40
39
38
9
11
7
6
5
4
MAX_MAX8770_TQFN_40P
+V3S
58-,54-,53-,52-,51-,50-,49-,48-,47-,46-,44-,41-,40-,39-,38-,37-,35-,34-,33-,32-,31-,29-,28-,26-,25-,23-,20-,19-,18-,13-,12-,11-,9-,8-,10-
1
1
R857
10K_5%
13-
18-,13-,10-
1616-
16161616-
15-
32-,15-
33-,19-
8-
R860
OPEN
2
2
R823
C778
C739
CPU_GND
R852
10-
R853
C780
1
OPEN
2
CPU_GND
+V5S
60-,58-,52-,51-,50-,46-,45-,39-,38-,37-,35-,33-,31-,29-,18-,12-,8-
C725
1
4.7uF_6.3v
2
R851
12
200K_5%
R822
1
2.2_5%
R821
1
2.2_5%
2
2
C727
12
0.22uF_16v
C726
1
2
0.22uF_16v
C777
1
470pF_50v
2
1
R850
20K_5%
2
16-
1
R820
OPEN
2
C737
OPEN12
+VBAT
28-,9-,8-,7-,6-,5-
1
R819
3.24K_1%
2
1
R816
10_5%
2
VCCSENSE
1
2
CPU_GND
1
L3004
4
NFM60R30T222
3
2
C736
1000pF_50v
SLP_S3#_3R
VR_PWRGD_CK410
10uF_25v_K_X5R
C108
C107
1
1
2
2
0.01uF_50v
R6672
FDS6676AS
C740
1
2
OPEN
CPU_GND
10uF_25v_K_X5R
C677
C678
1
1
2
2
0.01uF_50v
R6671
FDS6676AS
50-,47-,45-,33-,12-,11-,7-
18-,13-,10-
+VBAT_CPU
C105
1
2
0.01uF_50v
12
G
Q531
4
C106
1
2
0.01uF_50v
12
G
Q536
41S23
+V3S
D527
CHENMKO_BAT54_3P
13
R858
12
560K_1%
1
2
C676
8
D
1S23
0_5%
8765
D
G
S
41
23
8765
D
G
S
4
123
FDS6676AS
Q530
FDS6294
SSM34_3A40V_OPEN
Q532
1
2
765
58-,54-,53-,52-,51-,50-,49-,48-,47-,46-,44-,41-,40-,39-,38-,37-,35-,34-,33-,32-,31-,29-,28-,26-,25-,23-,20-,19-,18-,13-,12-,11-,9-,8-,10-
12
C779
0.1uF_16v
5
U523-B
4
FAIR_NC7WZ17_SC70_6P
2
C110
330uF_2v_6mR
330uF_2v_6mR
1
2
1
2
C679
5
U523-A
1
C817
FAIR_NC7WZ17_SC70_6P
0.22uF_10v
D523
1
2
6
2
1
R6668
OPEN
2
C5071
1
OPEN
2
CHENMKO_BAT54_3P
D526
3
1
R927
1
511K_1%
50-,33-,19-
SB_3S_VRMPWRGD
L6
1
MPC1040LR45_TOKIN
1
R42
2.4K_1%
2
R43
12
6.2K_1%
10K_1%_THER_NTC
C62
12
2
1
1
2
2
R44
3
C816
0.22uF_10v
2
33-
PM_PWROK
+VCC_CORE
1
C123
2
330uF_2.5v_OPEN
16-
0.22uF_10v
1
2
0_5%
8765
D
D
Q533
4G1S23
FDS6294
SSM34_3A40V_OPEN
8765
D
G
Q535
4S123
FDS6676AS
L10
12
MPC1040LR45_TOKIN
1
1
R6670
D524
1
2
OPEN
2
C5073
OPEN12
R139
2.4K_1%
2
R140
12
6.2K_1%
R141
12
10K_1%_THER_NTC
C187
12
1
C109
2
330uF_2v_6mR
1
C680
2
330uF_2.5v_OPEN
330uF_2v_6mR
1
C122
2
8
765
C675
0.22uF_10v
CPU_GND
R849
12
0_5%
1
2
CPU_GND
C742
1000pF_50v
R817
12
10_5%
16-
VSSSENSE
1
2
CPU_GND
C741
OPEN
CHANGE by
INVENTEC
TITLE
San Antonio 10 Vista
CPU POWER(VCC_CORE)
CODE REV
CS
DOC. NUMBER
OFSHEET
10 65
A031310A2101801
SIZE
13-Nov-2006Drawer_Name
A3
![](/html/34/341f/341f51e7e3322c4ec63d0b7de5915683dd83a3a1aa715c876b81cf92b0acbe65/bgb.png)
+V5A
60-,59-,50-,47-,35-,28-,12-,9-,8-,7-
+V1.8
26-,25-,24-,19-,9-
SLP_S5#_3R
SLP_S3#_3R
M_VREF
50-,49-,38-,37-,33-,12-
R138
50-,47-,45-,33-,12-,10-,7-
1
0_5%
26-,25-,19-
+V1.5S
44-,38-,35-,33-,28-,24-,23-,20-,16-,9-
2
C5099
1
2
OPEN
R5005
12
1K_5%
1
2
0.1uF_10v
2
1uF_10v
C186
C209
1
+V3A
60-,58-,50-,47-,44-,43-,38-,35-,34-,33-,14-,12-,7-,5-
1
R846
1K_5%
2
D528
CHENMKO_BAT54_3P
13
R845
12
100K_5%
Q543
3
C
2
B
E
1
2SC2411K
U3014
11
GND
10
VIN VLDOIN
9
S5
8
GND
7
S3
6
VTTREF
TI_TPS51100_DGQ_10P_OPEN
U8
11
GND
10
VIN VLDOIN
9
S5
84
GND
7
S3
6
VTTREF
TI_TPS51100_DGQ_10P
VDDQSNS
PGND
VTTSNS
VDDQSNS
PGND
VTTSNS
1
2
3
VTT
4
5
1
2
3
VTT
5
+V3S
58-,54-,53-,52-,51-,50-,49-,48-,47-,46-,44-,41-,40-,39-,38-,37-,35-,34-,33-,32-,31-,29-,28-,26-,25-,23-,20-,19-,18-,13-,12-,10-,9-,8-
5
U527
4
2
TC7SH14F
3
C774
1
2
0.1uF_10v
1
2
1
2
C185
22uF_6.3v
R6581
100K_5%
1
2
8-
PWR_GOOD_3
PAD3
POWERPAD_2_0610
C207
22uF_6.3v
+V0.9S
28-,27-
CHANGE by
INVENTEC
TITLE
San Antonio 10 Vista
+V0.9S / POWER GOOD
CODE
SIZE
13-Nov-2006Drawer_Name
A3
DOC. NUMBER REV
CS
SHEET OF
11 65
A031310A2101801
![](/html/34/341f/341f51e7e3322c4ec63d0b7de5915683dd83a3a1aa715c876b81cf92b0acbe65/bgc.png)
60-,58-,50-,47-,44-,43-,38-,35-,34-,33-,14-,11-,7-,5-
+V5S
60-,58-,52-,51-,50-,46-,45-,39-,38-,37-,35-,33-,31-,29-,18-,10-,8-,12-
+V3A
+V3
60-,57-,51-,44-
1
C608
2
+V3S
58-,54-,53-,52-,51-,50-,49-,48-,47-,46-,44-,41-,40-,39-,38-,37-,35-,34-,33-,32-,31-,29-,28-,26-,25-,23-,20-,19-,18-,13-,11-,10-,9-,8-
47uF_4v
SLP_S3#_5R
R179
200_5%
CHENMKO_BAT54_3P 1
D10
28-,9-,8-
1
2
CHENMKO_BAT54_3PD91
SLP_S5#_5R
3
74ACT14MTC
1
R178
200_5%
2
3
60-,59-,50-,47-,35-,28-,11-,9-,8-,7-,12-
9-
74ACT14MTC
+V5A
60-,59-,50-,47-,35-,28-,11-,9-,8-,7-,12-
14
U15-A
2
7
D513
3
1
CHENMKO_BAT54_3P
+V5A
14
U15-B
34
7
1
+V5A
60-,59-,50-,47-,35-,28-,11-,9-,8-,7-,12-
C813
12
0.1uF_10v
7
1
S1
D18D2
G1
Q520
2
1
R622
220K_5%
2
50-,47-,45-,33-,11-,10-,7-
74ACT14MTC
3
6
5
G2
4
SLP_S3#_3R
U15-C
6
S2
C610
1
2
OPEN
FDS6875
60-,59-,50-,47-,35-,28-,11-,9-,8-,7-,12-
9
SLP_S5_5R
14
50-,49-,38-,37-,33-,11-
5
7
+V5A
14
7
220K_5%
U15-D
R926
12
8
74ACT14MTC
12
1
C609
2
1
2
R847
220K_5%
SLP_S5#_3R
47uF_4v
R848
200_5%
C814
1
2
0.01uF_16v
2
R662
200_5%
1
Q525
S
D
D
S
D8
2
3
1
BAT54A
G
G
SSM3K17FU
+V5A +V5S
60-,59-,50-,47-,35-,28-,11-,9-,8-,7-,12-
Q515
4
1
S
D
2
5
63
G
FDC638P
Q516
4
1
D
S
2
5
3
6
G
FDC638P
C589
12
470pF_50v
D515
R648
12
OPEN
R647
12
220K_5%
13
BAT54_OPEN
1
2
28-
SLP_S3_5R
60-,58-,52-,51-,50-,46-,45-,39-,38-,37-,35-,33-,31-,29-,18-,10-,8-,12-
C590
OPEN
2
4
1
Q517
S
FDC638P
+VAUDIO_5S
1
D
2
5
63
G
55-,54-
C614
0.1uF_25v
CHANGE by
INVENTEC
TITLE
San Antonio 10 Vista
POWER(SLEEP)
CODE
SIZE DOC. NUMBER
A3
CS
13-Nov-2006Drawer_Name
SHEET
12 65
REV
A031310A2101801
OF
![](/html/34/341f/341f51e7e3322c4ec63d0b7de5915683dd83a3a1aa715c876b81cf92b0acbe65/bgd.png)
CPU_BSEL1
MCH_BSEL1
CPU_BSEL2
CLK_R3S_ICH14
VR_PWRGD_CK410
35-,32-,24-,23-,21-,20-,16-,15-,14-,9-,8-
+VCCP
2
R91
OPEN
1
15-
2
R798
1K_5%
1
R751
1K_5%
2
1919-,15-
33-
IMVP_CKEN#
1
2
1
R868
10K_5%
12
R867
24.9_1%
R872
10K_5%
10-
18-,10-
SSM3K17FU
Layout note: All decoupling 0.047uF disperse closed to pin
C750
C734
10uF_6.3v
1
2
C791
0.047uF_10v
1
2
C753
1
1
2
2
10uF_6.3v
0.047uF_10v
1
2
C751
0.047uF_10v
1
2
C794
0.047uF_10v
Please place close to CLKGEN within 500mils
30PPM
X504
12
1
C5033
R789
R788
R791
R792
14.31818MHZ
2
12
12
12
12
37445150-
49-
5051-
33-,26-,25-
33-,26-,25-
34-
+V3S
CPU_BSEL0
CLK_R3S_ICH48
CLK_R3S_CARD48
1
12
R870 10K_5%
12
R869 OPEN
LAYOUT NOTES : THE IREF(PIN_46) SIGNAL VIA R715 CONNECT TO GND DIRECTLY.
BSEL2
FSC
FSB CLOCK
FREQUENCY
FSB
533
667
2
1
Q539
G
G
BSEL0
FSA
1 0 0
1 1 0
10K_5%
2
+V3S
R797
1
R833
10K_5%
2
D
D
S
S
BSEL1
33pF_50v
19-,153337-
CLK_R3S_CBPCI
CLK_R3S_MINICARDPCI
CLK_R3S_SIOPCI
CLK_R3S_KBPCI
CLK_R3S_TPMPCI
CLK_R3S_KBC14
CLK_R3S_SIO14
ICH_3S_SMDATA
ICH_3S_SMCLK
CLK_R3S_ICHPCI
1
R881
4.7K_1%
2
HOST CLOCK
FREQUENCY
133
166
+V3S_CLKVDD
C792
1
2
0.047uF_10v
1
C790
33pF_50v
2
10K_5%
10K_5%
12.1_1%
12.1_1%
12
R784
12
R785
12
R835
12
R6591
12
R836 12.1_1%
12
R837
12
R873
12
R6586
12
R834
12
R787
12
R786 24.9_1%
LAN_CLK_REQ#
CLK_REQB#
CLKREQA#
CLKREQB#
CLKREQC#
CLKREQD#
SRCCLK8
C752
1
2
0.047uF_10v
CLK_3S_ICH48
OPEN
24.9_1%
24.9_1%
12.1_1%
24.9_1%
12.1_1%
12.1_1%
10K_5%
OPEN
X
NFM40P12C223
L524
CLK_BSEL1
CLK_BSEL2
CLK_3S_CBPCI
CLK_3S_MINICARDPCI
CLK_3S_KBPCI
CLK_3S_TPMPCI
CLK_3S_KBC14
CLK_3S_ICHPCI
41-
44-
SRCCLK7
X
+V3S
58-,54-,53-,52-,51-,50-,49-,48-,47-,46-,44-,41-,40-,39-,38-,37-,35-,34-,33-,32-,31-,29-,28-,26-,25-,23-,20-,19-,18-,12-,11-,10-,9-,8-,13-
1
1
4
BLM11A121S
L522
3
2
2
C749
1
2
0.047uF_10v
U521
24
VDDSRC
41
SRCCLK6
X
5
10
16
33
50
57
56
11
15
59
6
2
3
1
62
60
54
53
7
9
46
64
63
4
12
40
58
17
25
32
47
VDDSRC
VDDPCI
VDD48
VDD
VDDSRC
VDDCPU
X1
X2
FSLA_USB_48MHZ
FSLB_TEST_MODE
REF1_FSLC_TEST_SEL
PCICLK6
PCICLK4
PCICLK5
PCI_REFSEL_PCICLK3
SEL_REQ_PCICLK2
REF0_PCICLK1
SDATA
SCLK
SELSRC_LCDCLK#_PCICLK_F1
Vtt_PwrGd#_PD
VREF
CLKREQA#
CLKREQB#
GND
GND
GNDSRC
GND
GND
GNDSRC
GNDSRC
GNDCPU
SRCCLK5
CPUCLKT2_ITP_CLKREQC#
CPUCLKC2_ITP_CLKREQD#
ICS_ICS9LPR316_TSSOP_64P
SRCCLK4
X
VDDREF
PCI_SRC_STOP#
CPU_STOP#
CPUCLKT0
CPUCLKC0
CPUCLKT1
CPICLKC1
SRCCLKT5
SRCCLKC5
SRCCLKT8
SRCCLKC8
SRCCLKT7
SRCCLKC7
SRCCLKT6
SRCCLKC6
SRCCLKT4
SRCCLKC4
GNDSRC
GNDSRC
SRCCLKT3
SRCCLKC3
SRCCLKT2
SRCCLKC2
SRCCLKT1
SRCCLKC1
LCDCLK_SST_SRCCLKT0
LCDCLK_SSC_SRCCLKC0
DOTT_96MHZ
DOTC_96MHz
SRCCLK3
X
C748
1
2
10uF_6.3v
55
8
61
52
51
49
48
45
44
35
34
43
42
39
38
37
36
30
31
28
29
26
27
22
23
20
21
18
19
13
14
X
CLK_CPUBCLK
CLK_CPUBCLK#
CLK_MCHBCLK
CLK_MCHBCLK#
CLK_PEG_REF
CLK_PEG_REF#
CLK_PEG_MCH
CLK_PEG_MCH#
CLK_PCIE_CARD
CLK_PCIE_CARD#
CLK_PCIE_ICH
CLK_PCIE_ICH#
CLK_SATA1
CLK_SATA1#
CLK_PCIE_MINI1
CLK_PCIE_MINI1#
CLK_PCIE_LAN
CLK_PCIE_LAN#
SSCLK1_DREF
SSCLK1_DREF#
CLK_DREF
CLK_DREF#
SRCCLK2 SRCCLK1
X
X
12
1
R878
1
R879
12
R880 12.1_1%
+V3S
1
R815
10K_5%
2
12
R895 24.9_1%
1
12
R882
1
R883 24.9_1%
R889 24.9_1%
2
R891 24.9_1%
2
2
R810 24.9_1%
12
12
R839
2
R803 24.9_1%
R801 24.9_1%
R794 24.9_1%
Close to CLKGEN
SRCCLK0
X
D
S
12.1_1%R875
2
12.1_1%
2
12.1_1%
Q6013
D
S
2
24.9_1%R896
24.9_1%
2
12
24.9_1%R887
12
1
1
24.9_1%R893
12
24.9_1%R808
1
24.9_1%R838
24.9_1%
1
12
24.9_1%R804
12
24.9_1%R799
12
12
12
24.9_1%R796
33-
33-
G
G
SSM3K17FU
PCISTOP#_3
CPUSTOP#_3
14-
CLK_R_CPUBCLK
14-
CLK_R_CPUBCLK#
21-
CLK_R_MCHBCLK
21-
CLK_R_MCHBCLK#
19-
MCH_CLK_REQ#
38-
ICH_NEWCARD_CLKEN
28-
CLK_R_PEG_REF
28-
CLK_R_PEG_REF#
19-
CLK_R_PEG_MCH
19-
CLK_R_PEG_MCH#
38-
CLK_R_PCIE_CARD
38-
CLK_R_PCIE_CARD#
33-
CLK_R_PCIE_ICH
33-
CLK_R_PCIE_ICH#
32-
CLK_R_SATA1
32-
CLK_R_SATA1#
44-
CLK_R_PCIE_MINI1
44-
CLK_R_PCIE_MINI1#
41-
CLK_R_PCIE_LAN
41-
CLK_R_PCIE_LAN#
19-
SSCLK1_R_DREF
19-
SSCLK1_R_DREF#
19-
CLK_R_DREF
19-
CLK_R_DREF#
12
12
12
12
12
12
12
12
12
12
12
2
1
12
12
12
12
12
12
12
12
12
2
1
OPEN
OPEN
OPEN
OPEN
OPENR892
OPEN
OPEN
OPEN
OPEN
OPEN
OPEN
OPEN
OPEN
OPENR6422
OPEN
OPEN
OPEN
OPEN
OPEN
OPEN
OPEN
R874
R876
R877
R930
R894
R931
R884
R885
R886
R888
R890
R811 OPEN
R812
R809
R805
R806
R800
R802
R793
R795
CHANGE by
INVENTEC
TITLE
San Antonio 10 Vista
CLOCK_GENERATOR
DOC. NUMBER
CODE
SIZE
A3
CS
13-Nov-2006Drawer_Name
SHEET
13 65
REV
A031310A2101801
OF
![](/html/34/341f/341f51e7e3322c4ec63d0b7de5915683dd83a3a1aa715c876b81cf92b0acbe65/bge.png)
H_A#(31:3)
H_STPCLK#
H_A20M#
H_FERR#
H_IGNNE#
H_INTR
H_NMI
H_SMI#
21-
H_A#(3)
H_A#(4)
H_A#(5)
H_A#(6)
H_A#(7)
H_A#(8)
H_A#(9)
H_A#(10)
H_A#(11)
H_A#(12)
H_A#(13)
H_A#(14)
H_A#(15)
H_A#(16)
H_A#(17)
H_A#(18)
H_A#(19)
H_A#(20)
H_A#(21)
H_A#(22)
H_A#(23)
H_A#(24)
H_A#(25)
H_A#(26)
H_A#(27)
H_A#(28)
H_A#(29)
H_A#(30)
H_A#(31)
323232-
32323232-
H_REQ#(4:0)
H_REQ#(0)
H_REQ#(1)
H_REQ#(2)
H_REQ#(3)
H_REQ#(4)
H_ADSTB#0
21-
H_ADSTB#1
21-
21-
CN17-1
J4
A3#
L4
A4#
M3
A5#
K5
A6#
M1
A7#
N2
A8#
J1
A9#
N3
A10#
P5
A11#
P2
A12#
L1
A13#
P4
A14#
P1
A15#
R1
A16#
ADDR GROUP 0ADDR GROUP 1
L2
ADSTB0#
K3
REQ0#
H2
REQ1#
K2
REQ2#
J3
REQ3#
L5
REQ4#
Y2
A17#
U5
A18#
R3
A19#
W6
A20#
U4
A21#
Y5
A22#
U2
A23#
R4
A24#
T5
A25#
T3
A26#
W3
A27#
W5
A28#
Y4
A29#
W2
A30#
Y1
A31#
V4
ADSTB1#
A6
A20M#
A5
FERR#
C4
IGNNE#
D5
STPCLK#
C6
LINT0
B4
LINT1
A3
SMI#
AA1
RSVD01
AA4
RSVD02
AB2
RSVD03
AA3
RSVD04
M4
RSVD05
N5
RSVD06
T2
RSVD07
V3
RSVD08
B2
RSVD09
C3
RSVD10
B25
RSVD11
MLX_47170_4787_YONAH_479P
THERM
RESERVED
ADS#
BNR#
BPRI#
DEFER#
DRDY#
DBSY#
BR0#
IERR#
INIT#
LOCK#
CONTROL
RESET#
RS0#
RS1#
RS2#
TRDY#
HIT#
HITM#
BPM0#
BPM1#
BPM2#
BPM3#
PRDY#
PREQ#
TCK
TDI
TDO
TMS
XDP/ITP SIGNALS
TRST#
DBR#
PROCHOT#
THERMDA
THERMDC
THERMTRIP#
BCLK0
H CLK
BCLK1
RSVD12
RSVD13
RSVD14
RSVD15
RSVD16
RSVD17
RSVD18
RSVD19
RSVD20
+VCCP
35-,32-,24-,23-,21-,20-,16-,15-,13-,9-,8-,14-
1
R93
56_5%
2
CLOSED TO CPU
+VCCP
1
1
R718
R716
56_5%
56_5%
2
2
35-,32-,24-,23-,21-,20-,16-,15-,13-,9-,8-,14-
1
R715
56_5%
2
H_BPM5_PREQ#
H_TCK
TDI_FLEX
H_TMS
H_TRST#
33-
ITP_DBRESET#
18-
H_THERMDA
18-
H_THERMDC
PM_THRMTRIP#
13-
CLK_R_CPUBCLK
13-
CLK_R_CPUBCLK#
212121-
212121-
21-
32-
21-
21-
21-
2121-
ICH7GMCH
H_ADS#
H_BNR#
H_BPRI#
H_DEFER#
H_DRDY#
H_DBSY#
H_BREQ#0
H_INIT#
H_LOCK#
H_CPURST#
H_TRDY#
H_HIT#
H_HITM#
H_RS#(0)
H_RS#(1)
H_RS#(2)
1
R717
56_5%
2
+VCCP
21-
H_RS#(0:2)
+V3A
60-,58-,50-,47-,44-,43-,38-,35-,34-,33-,12-,11-,7-,5-
1
R907
240_5%
2
1
R714
56_5%
2
H1
E2
G5
H5
F21
E1
F1
D20
B3
H4
B1
F3
F4
G3
G2
G6
E4
AD4
AD3
AD1
AC4
AC2
AC1
AC5
AA6
AB3
AB5
AB6
C20
D21
A24
A25
C7
A22
A21
T22
D2
F6
D3
C1
AF1
D22
C23
C24
12
R92
56_5%
35-,32-,24-,23-,21-,20-,16-,15-,13-,9-,8-,14-
10mils/10mils
+VCCP
32-,19-,18-
CPU
PM_THRMTRIP# should be without T at CPU
CHANGE by
Drawer_Name
13-Nov-2006
INVENTEC
TITLE
San Antonio 10 Vista
Yonah-1
SIZE
CODE
A3
DOC. NUMBER
CS
SHEET OF
14 65
REV
A031310A2101801
![](/html/34/341f/341f51e7e3322c4ec63d0b7de5915683dd83a3a1aa715c876b81cf92b0acbe65/bgf.png)
H_D#(63:0)
H_DSTBN#0
H_DSTBP#0
H_DINV#0
H_D#(63:0)
+VCCP
35-,32-,24-,23-,21-,20-,16-,14-,13-,9-,8-,15-
1
R760
1K_1%
2
H_GTLREF
1
R761
2K_1%
CLOSED TO CPU WITHIN 0.5"
2
21-,15-
212121-
21-,15-
H_DSTBN#1
H_DSTBP#1
H_DINV#1
CN17-2
H_D#(0)
H_D#(1)
H_D#(2)
H_D#(3)
H_D#(4)
H_D#(5)
H_D#(6)
H_D#(7)
H_D#(8)
H_D#(9)
H_D#(10)
H_D#(11)
H_D#(12)
H_D#(13)
H_D#(14)
H_D#(15)
H_D#(16)
H_D#(17)
H_D#(18)
H_D#(19)
H_D#(20)
H_D#(21)
H_D#(22)
H_D#(23)
H_D#(24)
H_D#(25)
H_D#(26)
H_D#(27)
H_D#(28)
H_D#(29)
H_D#(30)
H_D#(31)
212121-
CPU_BSEL0
CPU_BSEL2
19-,131319-,13-
1
R771
OPEN
2
1
R770
51_5%
2
E22
D0#
F24
D1#
E26
D2#
H22
D3#
F23
D4#
G25
D5#
E25
D6#
E23
D7#
K24
D8#
G24
D9#
J24
D10#
J23
D11#
H26
D12#
DATA GRP 0DATA GRP 1
F26
D13#
K22
D14#
H25
D15#
H23
DSTBN0#
G22
DSTBP0#
J26
DINV0#
N22
D16#
K25
D17#
P26
D18#
R23
D19#
L25
D20#
L22
D21#
L23
D22#
M23
D23#
P25
D24#
P22
D25#
P23
D26#
T24
D27#
R24
D28#
L26
D29#
T25
D30#
N24
D31#
M24
DSTBN1#
N25
DSTBP1#
M26
DINV1#
AD26
GTLREF
C26
TEST1
D25
B22
B23
C21
MISC
TEST2
BSEL0
BSEL1
BSEL2
MLX_47170_4787_YONAH_479P
D32#
D33#
D34#
D35#
D36#
D37#
D38#
D39#
D40#
D41#
D42#
D43#
D44#
DATA GRP 2DATA GRP 3
D45#
D46#
D47#
DSTBN2#
DSTBP2#
DINV2#
D48#
D49#
D50#
D51#
D52#
D53#
D54#
D55#
D56#
D57#
D58#
D59#
D60#
D61#
D62#
D63#
DSTBN3#
DSTBP3#
DINV3#
COMP0
COMP1
COMP2
COMP3
DPRSTP#
DPSLP#
DPWR#
PWRGOOD
SLP#
PSI#
AA23
AB24
V24
V26
W25
U23
U25
U22
AB25
W22
Y23
AA26
Y26
Y22
AC26
AA24
W24
Y25
V23
AC22
AC23
AB22
AA21
AB21
AC25
AD20
AE22
AF23
AD24
AE21
AD21
AE25
AF25
AF22
AF26
AD23
AE24
AC20
R26
U26
U1
V1
E5
B5
D24
D6
D7
AE6
H_D#(32)
H_D#(33)
H_D#(34)
H_D#(35)
H_D#(36)
H_D#(37)
H_D#(38)
H_D#(39)
H_D#(40)
H_D#(41)
H_D#(42)
H_D#(43)
H_D#(44)
H_D#(45)
H_D#(46)
H_D#(47)
H_D#(48)
H_D#(49)
H_D#(50)
H_D#(51)
H_D#(52)
H_D#(53)
H_D#(54)
H_D#(55)
H_D#(56)
H_D#(57)
H_D#(58)
H_D#(59)
H_D#(60)
H_D#(61)
H_D#(62)
H_D#(63)
212121-
12
27.4_1%R767
12
R766 54.9_1%
12
27.4_1%R720
12
R719 54.9_1%
32-,10-
H_DPRSTP#
NOTE: COM0, COM2, trace impedance
should be 27.4 ohm
COM1, COM3, trace impedance
should be 55 ohm
CLOSED TO CPU
32-
H_DPSLP#
21-
H_DPWR#
32-,21-
H_CPUSLP#CPU_BSEL1
10-
PSI#
H_DSTBN#3
H_DSTBP#3
H_DINV#3
21-,15-
H_D#(63:0)
21-
H_DSTBN#2
21-
H_DSTBP#2
21-
H_DINV#2
21-,15-
H_D#(63:0)
+VCCP
35-,32-,24-,23-,21-,20-,16-,14-,13-,9-,8-,15-
2
R56
OPEN
1
CLOSED TO CPU
32-
H_PWRGD
CHANGE by
INVENTEC
TITLE
San Antonio 10 Vista
Yonah-2
SIZE CODE
A3
CS
13-Nov-2006Drawer_Name
SHEET
15 65
REVDOC. NUMBER
A031310A2101801
OF
![](/html/34/341f/341f51e7e3322c4ec63d0b7de5915683dd83a3a1aa715c876b81cf92b0acbe65/bg10.png)
PLACE THESE INSIDE SOCKET
CAVITY ON L8 (NORTH SIDE
SECONDARY)
PLACE THESE INSIDE SOCKET
CAVITY ON L8 (SOUTH SIDE
SECONDARY)
PLACE THESE INSIDE SOCKET
CAVITY ON L1 (NORTH SIDE
PRIMARY)
PLACE THESE INSIDE SOCKET
CAVITY ON L1 (SOUTH SIDE
PRIMARY)
1
2
1
2
1
2
1
2
1
2
1
2
C118
22uF_6.3v
C117
22uF_6.3v
C687
22uF_6.3v
C684
22uF_6.3v
C708
OPEN
C155
OPEN
1
2
1
2
1
2
1
2
1
2
C113
22uF_6.3v
C121
22uF_6.3v
C691
22uF_6.3v
C690
22uF_6.3v
C706
OPEN
1
2
1
2
1
2
1
2
C114
22uF_6.3v
C111
22uF_6.3v
C688
22uF_6.3v
C685
22uF_6.3v
1
2
1
2
1
2
1
2
1
2
1
2
1
2
C112
22uF_6.3v
22uF_6.3v
C119
22uF_6.3v
22uF_6.3v
C681
22uF_6.3v
22uF_6.3v
C689
22uF_6.3v
22uF_6.3v
C151
OPEN
C686
OPEN
C705
OPEN
1
2
1
2
1
2
1
2
NOTE:
NO_STUFF
22UF X 12
+VCC_CORE
10-,16-
C115
C120
C683
C682
CN17-3
A7
VCC001
A9
VCC002
A10
VCC003
A12
VCC004
A13
VCC005
A15
VCC006
A17
VCC007
A18
VCC008
A20
VCC009
B7
VCC010
B9
VCC011
B10
VCC012
B12
VCC013
B14
VCC014
B15
VCC015
B17
VCC016
B18
VCC017
B20
VCC018
C9
VCC019
C10
VCC020
C12
VCC021
C13
VCC022
C15
VCC023
C17
VCC024
C18
VCC025
D9
VCC026
D10
VCC027
D12
VCC028
D14
VCC029
D15
VCC030
D17
VCC031
D18
VCC032
E7
VCC033
E9
VCC034
E10
VCC035
E12
VCC036
E13
VCC037
E15
VCC038
E17
VCC039
E18
VCC040
E20
VCC041
F7
VCC042
F9
VCC043
F10
VCC044
F12
VCC045
F14
VCC046
F15
VCC047
F17
VCC048
F18
VCC049
F20
VCC050
AA7
VCC051
AA9
VCC052
AA10
VCC053
AA12
VCC054
AA13
VCC055
AA15
VCC056
AA17
VCC057
AA18
VCC058
AA20
VCC059
AB9
VCC060
AC10
VCC061
AB10
VCC062
AB12
VCC063
AB14
VCC064
AB15
VCC065
AB17
VCC066
AB18
VCC067
MLX_47170_4787_YONAH_479P
VCC068
VCC069
VCC070
VCC071
VCC072
VCC073
VCC074
VCC075
VCC076
VCC077
VCC078
VCC079
VCC080
VCC081
VCC082
VCC083
VCC084
VCC085
VCC086
VCC087
VCC088
VCC089
VCC090
VCC091
VCC092
VCC093
VCC094
VCC095
VCC096
VCC097
VCC098
VCC099
VCC0100
VCCP01
VCCP02
VCCP03
VCCP04
VCCP05
VCCP06
VCCP07
VCCP08
VCCP09
VCCP10
VCCP11
VCCP12
VCCP13
VCCP14
VCCP15
VCCP16
VCCA
VCCSENSE
VSSSENSE
VID0
VID1
VID2
VID3
VID4
VID5
VID6
AB20
AB7
AC7
AC9
AC12
AC13
AC15
AC17
AC18
AD7
AD9
AD10
AD12
AD14
AD15
AD17
AD18
AE9
AE10
AE12
AE13
AE15
AE17
AE18
AE20
AF9
AF10
AF12
AF14
AF15
AF17
AF18
AF20
V6
G21
J6
K6
M6
J21
K21
M21
N21
N6
R21
R6
T21
T6
V21
W21
B26
AD6
AF5
AE5
AF4
AE3
AF2
AE2
AF7
AE7
+VCC_CORE
10-,16-
+VCCP
35-,32-,24-,23-,21-,20-,15-,14-,13-,9-,8-
1
C116
2
220uF_2v_15mR_Panasonic
+V1.5S
44-,38-,35-,33-,28-,24-,23-,20-,11-,9-,16-
10-
H_VID0
10-
H_VID1
10-
H_VID2
10-
H_VID3
10-
H_VID4
10-
H_VID5
10-
H_VID6
10-
LAYOUT NOTE:
1
ROUTE VCCSENSE AND VSSSENSE TRACE AT
R70
27.4 OHM WITH 50 MIL SPACING.
10_1%
PLACE PU AND PD WITHIN 1 INCH OF CPU
2
+VCC_CORE
10-,16-
1
R55
10_1%
2
VSSSENSE
+VCCP
10-
35-,32-,24-,23-,21-,20-,15-,14-,13-,9-,8-
C154
0.1uF_10v
C95
1
2
0.1uF_10v
1
2
VCCSENSE
PLACE THESE INSIDE SOCKET
CAVITY ON L8 SIDE (NORTH SIDE
SECONDARY)
C93
1
2
0.1uF_10v
+V1.5S
1
2
1
2
C720
C94
C153
1
2
0.1uF_10v
0.1uF_10v
44-,38-,35-,33-,28-,24-,23-,20-,11-,9-,16-
10uF_6.3v
LAYOUT NOTE:
PLACE C119 NEAR PIN B26
C719
1
2
0.01uF_16v
C152
1
2
0.1uF_10v
CHANGE by
INVENTEC
TITLE
San Antonio 10 Vista
Yonah-3
SIZE
13-Nov-2006Drawer_Name
A3
DOC. NUMBER
CODE
CS
SHEET OF
16 65
REV
A031310A2101801
![](/html/34/341f/341f51e7e3322c4ec63d0b7de5915683dd83a3a1aa715c876b81cf92b0acbe65/bg11.png)
CN17-4
A4
VSS001
A8
VSS002
A11
VSS003
A14
VSS004
A16
VSS005
A19
VSS006
A23
VSS007
A26
VSS008
B6
VSS009
B8
VSS010
B11
VSS011
B13
VSS012
B16
VSS013
B19
VSS014
B21
VSS015
B24
VSS016
C5
VSS017
C8
VSS018
C11
VSS019
C14
VSS020
C16
VSS021
C19
VSS022
C2
VSS023
C22
VSS024
C25
VSS025
D1
VSS026
D4
VSS027
D8
VSS028
D11
VSS029
D13
VSS030
D16
VSS031
D19
VSS032
D23
VSS033
D26
VSS034
E3
VSS035
E6
VSS036
E8
VSS037
E11
VSS038
E14
VSS039
E16
VSS040
E19
VSS041
E21
VSS042
E24
VSS043
F5
VSS044
F8
VSS045
F11
VSS046
F13
VSS047
F16
VSS048
F19
VSS049
F2
VSS050
F22
VSS051
F25
VSS052
G4
VSS053
G1
VSS054
G23
VSS055
G26
VSS056
H3
VSS057
H6
VSS058
H21
VSS059
H24
VSS060
J2
VSS061
J5
VSS062
J22
VSS063
J25
VSS064
K1
VSS065
K4
VSS066
K23
VSS067
K26
VSS068
L3
VSS069
L6
VSS070
L21
VSS071
L24
VSS072
M2
VSS073
M5
VSS074
M22
VSS075
M25
VSS076
N1
VSS077
N4
VSS078
N23
VSS079
N26
VSS080
P3
VSS081
MLX_47170_4787_YONAH_479P
VSS082
VSS083
VSS084
VSS085
VSS086
VSS087
VSS088
VSS089
VSS090
VSS091
VSS092
VSS093
VSS094
VSS095
VSS096
VSS097
VSS098
VSS099
VSS0100
VSS0101
VSS0102
VSS0103
VSS0104
VSS0105
VSS0106
VSS0107
VSS0108
VSS0109
VSS0110
VSS0111
VSS0112
VSS0113
VSS0114
VSS0115
VSS0116
VSS0117
VSS0118
VSS0119
VSS0120
VSS0121
VSS0122
VSS0123
VSS0124
VSS0125
VSS0126
VSS0127
VSS0128
VSS0129
VSS0130
VSS0131
VSS0132
VSS0133
VSS0134
VSS0135
VSS0136
VSS0137
VSS0138
VSS0139
VSS0140
VSS0141
VSS0142
VSS0143
VSS0144
VSS0145
VSS0146
VSS0147
VSS0148
VSS0149
VSS0150
VSS0151
VSS0152
VSS0153
VSS0154
VSS0155
VSS0156
VSS0157
VSS0158
VSS0159
VSS0160
VSS0161
VSS0162
P6
P21
P24
R2
R5
R22
R25
T1
T4
T23
T26
U3
U6
U21
U24
V2
V5
V22
V25
W1
W4
W23
W26
Y3
Y6
Y21
Y24
AA2
AA5
AA8
AA11
AA14
AA16
AA19
AA22
AA25
AB1
AB4
AB8
AB11
AB13
AB16
AB19
AB23
AB26
AC3
AC6
AC8
AC11
AC14
AC16
AC19
AC21
AC24
AD2
AD5
AD8
AD11
AD13
AD16
AD19
AD22
AD25
AE1
AE4
AE8
AE11
AE14
AE16
AE19
AE23
AE26
AF3
AF6
AF8
AF11
AF13
AF16
AF19
AF21
AF24
CHANGE by
INVENTEC
TITLE
San Antonio 10 Vista
Yonah-4
CODE
CS
SHEET
DOC. NUMBER
OF
17 65
REV
A031310A2101801
SIZE
13-Nov-2006Drawer_Name
A3
![](/html/34/341f/341f51e7e3322c4ec63d0b7de5915683dd83a3a1aa715c876b81cf92b0acbe65/bg12.png)
FAN1_DAC0_3
+V5LA
50-
53-,7-,6-,5-
12
0.1uF_10v
R6696
150_5%
C5110
2.2uF_10v
1
2
+V5S
60-,58-,52-,51-,50-,46-,45-,39-,38-,37-,35-,33-,31-,29-,12-,10-,8-
U4
C34
1
2
2
3
4
GMT_G995P1U_SOP8_8P
1
2
C38
2.2uF_10v
CN13
1
VCC
2
GND
3
REFENCE
MLX_53398_0371_3P
FAN CN
U516
5
R763
OPEN
1
2
GMT_G708T1U_SOT23_5P
SETVCC
GND
43
HYST
OT
THRM_SHUTDWN#
81
FON
GND
7
VIN
GND
6
VO
GND
5
VSET
GND
58-,54-,53-,52-,51-,50-,49-,48-,47-,46-,44-,41-,40-,39-,38-,37-,35-,34-,33-,32-,31-,29-,28-,26-,25-,23-,20-,19-,13-,12-,11-,10-,9-,8-
+V3S
G1
G
G2
G
L2
12
BLM11A121S
R762
12
1
24.9K_1%
2
28-,7-,18-
28-,7-,18-
D
1
R39
10K_5%
2
C39
1
2
0.01uF_50v
THRM_SHUTDWN#
Q6020
S
D
S
G
SSM3K17FU_OPEN
G
50-
H_THERMDA
H_THERMDC
+V3LA
60-,50-,47-,32-,7-,18-
FAN_TACH1
14-,1814-,18-
PM_THRMTRIP#
C733
12
OPEN
R790
OPEN
BBUS
R769
12
330_5%
2SC2411K
C721
0.1uF_16v
VDD
D+
DTHERM#
13-,10-
Q537
2
SCLK
SDATA
ALERT#
GND
1
R768
2M_5%
2
3
C
B
E
1
8
7
6
5
VR_PWRGD_CK410
32-,19-,14-
1
2
+V3LA
60-,50-,47-,32-,7-,18-
1
2
U517
1
2
3
4
A&D_ADM1032ARM_MICRO_SO_8P_OPEN
Thermal Sensor For CPU
+V3LA
60-,50-,47-,32-,7-,18-
U3007
1
VDD
2
50-
GND
3
BBUS
SMSC_EMC1212_SOT23_5P
1
2
50-,6-,5-
BATT_CLK
50-,6-,5-
BATT_DATA
C718
OPEN
5
DN
4
DP
SSM3K17FU
14-,18-
14-,18-
Q540
G
G
28-,7-,18-
D
D
S
S
H_THERMDC
H_THERMDA
THRM_SHUTDWN#
CHANGE by
Drawer_Name
13-Nov-2006
INVENTEC
TITLE
San Antonio 10 Vista
THERMAL&FAN CONTROLLER
CODE
DOC. NUMBERSIZE
A3
1310A2101801 A03
CS
SHEET
OF
REV
6518
![](/html/34/341f/341f51e7e3322c4ec63d0b7de5915683dd83a3a1aa715c876b81cf92b0acbe65/bg13.png)
AW41
NC17
AY41
AW1
AY1
A39
A40
B2
A4
NC16
NC10
NC11
NC12
NC13
NC14
NC15
ITL_CALISTOGA_MICRO_FCBGA_TSB_1466P
A3
NC18
BA41
BA40
BA39
BA3
BA2
BA1
B41
NC8
NC9
C41
C1
NC2
NC3
NC4
NC5
NC6
NC7
NC0D1NC1
MCH_ICH_SYNC#
MCH_CLK_REQ#
PLT_RST#
34-
13-
100_5%
R52
H28
H27
K28
H32
SDVO_CTRLCLK
SDVO_CTRLDATA
RSTIN#
ICH_SYNC#
CLK_REQ#
PM_DPRSLPVR
PM_EXTTS#0
26-,25-
33-,10-
SB_3S_VRMPWRGD
PM_THRMTRIP#
2
2
BM_BUSY#
MCH_CFG(20)
50-,33-,10-
50-,34-
32-,18-,14-
33-
12
AH33
AH34
G28
H26
F25
J26
G6
CFG_19
PM_BMBUSY#
PM_EXTTS#_0
PM_EXTTS#_1
PM_THRMTRIP#
PWROK
CFG_20
10K_5%
R59
1
10K_5%
R58
1
MCH_CFG(16)
MCH_CFG(17)
MCH_CFG(18)
MCH_CFG(19)
G18
K27
H15
J25
CFG_17
CFG_18
CFG_15
CFG_16
+V3S
MCH_CFG(11)
MCH_CFG(12)
MCH_CFG(13)
MCH_CFG(14)
MCH_CFG(15)
G15
K15
C15
H16
CFG_13
CFG_14
CFG_11
CFG_12
MCH_CFG(20:3)
19-
MCH_CFG(8)
MCH_CFG(9)
MCH_CFG(10)
G16
D16
D15
E16
CFG_8
CFG_9
CFG_10
MCH_CFG(5)
MCH_CFG(6)
MCH_CFG(7)
D19
E18
F15
CFG_4
CFG_5
CFG_6
CFG_7
MCH_BSEL1
13-
MCH_CFG(3)
MCH_CFG(4)
MCH_BSEL2
K18
E15
F18
J18
CFG_2
CFG_3
CFG_1
2
1K_5%
MCH_BSEL0
2
1K_5%
K16
CFG_0
R94
1
R96
D27
RSVD_13
1
RSVD_12
CPU_BSEL0
CPU_BSEL2
15-,13-
15-,13-
A41
A35
A34
D28
RSVD_9
RSVD_10
RSVD_11
J19
RSVD_7
RSVD_8
H7
AF11
RSVD_6
AG11
RSVD_4
RSVD_5
F7
F3
RSVD_2
RSVD_3
R32
RSVD_1
T32
U7-2
CHANGE by
Drawer_Name
(FSB Dynamic
MCH_CFG(16)
ODT)
Lane
HIGH=Normal operation
LOW=Dynamic ODT
HIGH=Dynamic ODT
Disable
Enabled
NC
DMI
DMI_TXN_3
DMI_TXP_0
DMI_TXP_1
DMI_TXP_2
DMI_TXP_3
AC37
AE41
AF37
AG41
DMI_RXP(3)
DMI_RXP(2)
DMI_RXP(1)
DMI_RXP(0)
33-
DMI_RXP(3:0)
PCIE Graphics
MCH_CFG(9)
LOW=Reverse Lane
HIGH=DMIx4
DMI_TXN_0
DMI_TXN_1
DMI_TXN_2
AE37
AF41
AG37
AH41
DMI_RXN(3)
DMI_RXN(2)
DMI_RXN(1)
DMI_RXN(0)
DMI_RXN(3:0)
MCH_CFG(5)
LOW=DMIx2
DMI_RXP_3
33-
MISC
DMI_RXP_0
DMI_RXP_1
DMI_RXP_2
AC35
AE39
AF35
AG39
DMI_TXP(2)
DMI_TXP(3)
DMI_TXP(1)
DMI_TXP(0)
2
2
DMI_RXN_1
DMI_RXN_2
DMI_RXN_3
AF39
AG35
AH39
DMI_TXN(2)
DMI_TXN(3)
DMI_TXN(1)
33-
DMI_TXP(3:0)
MCH_CFG(5)
MCH_CFG(6)
19-
19-
1
R734
OPEN
1
OPEN
R723
PM
CLK
D_REFSSCLKIN#
D_REFSSCLKIN
DMI_RXN_0
AE35
D41
13-
SSCLK1_R_DREF
SSCLK1_R_DREF#
DMI_TXN(0)
33-
DMI_TXN(3:0)
MCH_CFG(10)
MCH_CFG(11)
MCH_CFG(16)
MCH_CFG(7)
MCH_CFG(9)
19-
19-
19-
19-
D_REFCLKIN#
D_REFCLKIN
G_CLKIN#
G_CLKIN
AF33
A26
A27
C40
AG33
13-
13-
13-
13-
13-
CLK_R_DREF#
CLK_R_DREF
CLK_R_PEG_MCH#
CLK_R_PEG_MCH
MCH_CFG(13)
MCH_CFG(12)
19-
19-
19-
SM_RCOMP#
SM_VREF_0
SM_VREF_1
SM_RCOMP
SM_ODT_0
SM_ODT_1
SM_ODT_2
SM_ODT_3
AV9
AK1
AK41
AT9
BA13
BA12
AY20
AU21
MCH_SMRCOMPN
27-,25-
27-,26-
27-,26-
27-,25-
M_ODT0
M_ODT1
M_ODT2
M_ODT3
80.6_1%
R100
1
2
2
0.47uF_6.3v
26-,25-,11-
1
C203
26-,25-,24-,11-,9-
M_VREF
OPEN
1
2
80.6_1%
R99
2
R759
2
OPEN
R754
MCH_CFG(20)
mode)
(PCIE Backward
Interpoerability
HIGH=1.5V
operational
simultaneously via the PEG port
HIGH=SDVO and PCIE x1 are operating
LOW=Only SDVO or PCIE x1 is
SM_OCDCOMP_0
SM_OCDCOMP_1
SM_CS#_3
AW21
AL20
AF10
27-,26-
M_CS3#
+V1.8
M_OCDCOMP0
M_OCDCOMP1
1
1
MCH_CFG(18)
(VCC Select)
LOW=1.05V
SM_CS#_2
AY21
27-,26-
M_CS2#
RSVDCFG
DDR MUXING
SM_CKE_0
SM_CKE_1
SM_CKE_2
SM_CS#_0
SM_CS#_1
AW13
AW12
27-,25-
27-,25-
M_CS1#
M_CS0#
SM_CKE_3
AY29
27-,26-
M_CKE2
M_CKE3
MCH_CFG(20)
SM_CK#_3
AU20
AT20
BA29
AY40
27-,25-
27-,26-
27-,25-
M_CKE0
M_CKE1
26-
M_CLK_DDR4#
MCH_CFG(18)
MCH_CFG(19)
SM_CK#_0
SM_CK#_1
SM_CK#_2
AT1
AY7
26-
25-
M_CLK_DDR3#
M_CLK_DDR1#
SM_CK_0
SM_CK_1
SM_CK_2
SM_CK_3
AY35
AR1
AW7
AW35
AW40
25-
25-
25-
26-
26-
M_CLK_DDR4
M_CLK_DDR0
M_CLK_DDR0#
M_CLK_DDR1
M_CLK_DDR3
58-,54-,53-,52-,51-,50-,49-,48-,47-,46-,44-,41-,40-,39-,38-,37-,35-,34-,33-,32-,31-,29-,28-,26-,25-,23-,20-,18-,13-,12-,11-,10-,9-,8-,19-
13-Nov-2006
TITLE
SIZE
A3
CODE
San Antonio 10 Vista
Calistoga-1
CS
SHEET
DOC. NUMBER
19 65
OF
REV
A031310A2101801
INVENTEC
SELECT
MCH_CFG(10)
HOST PLL VCO
LOW=RESERVED
HIGH=MOBILITY
MCH_CFG(11)
HIGH=Reserved
LOW=Calistoga
MCH_CFG(6)
(DDR)
LOW=Moby Dick
HIGH=Calistoga
MCH_CFG(7)
(CPU Strap)
HIGH=Mobile CPU
LOW=RSVD
2
OPEN
2
OPEN
2
OPEN
2
2.2K_5%
2
OPEN
2
OPEN
2
OPEN
R724
R738
R739
R735
R722
R736
R737
19-
19-
1
1
1
1
1
1
1
REVERSAL)
(DMI LANE
MCH_CFG(19)
HIGH=LANES REVERSED
LOW=Normal
19-
+V3S
1
2
OPEN
R726
1
2
R728
OPEN
1
2
OPEN
R729
![](/html/34/341f/341f51e7e3322c4ec63d0b7de5915683dd83a3a1aa715c876b81cf92b0acbe65/bg14.png)
LVDS_R_TXCL-
LVDS_R_TXCL+
LVDS_R_TXCULVDS_R_TXCU+
LVDS_R_TXDL0-
LVDS_R_TXDL0+
LVDS_R_TXDL1-
LVDS_R_TXDL1+
LVDS_R_TXDL2-
LVDS_R_TXDL2+
LVDS_R_TXDU0-
LVDS_R_TXDU0+
LVDS_R_TXDU1-
LVDS_R_TXDU1+
LVDS_R_TXDU2-
LVDS_R_TXDU2+
+VCCP
RS500
1
31-,2831-,28-
31-,2831-,28-
31-,2831-,28-
31-,28-
31-,2831-,28-
31-,2831-,28-
31-,2831-,28-
31-,2831-,28-
35-,32-,24-,23-,21-,16-,15-,14-,13-,9-,8-,20-
1
R732
OPEN
2
1
R733
0_5%
CLOSE TO CALISTOGA
2
4
23
0_5%
RS507
1
4
23
0_5%
RS502
1
4
23
0_5%
RS503
1
4
23
0_5%
RS501
1
4
23
0_5%
RS505
1
4
23
0_5%
RS504
1
4
23
0_5%
RS506
1
4
23
0_5%
R745
12
120_0.5%
R743
12
120_0.5%
R747
12
120_0.5%
R746
12
120_0.5%
R744
12
120_0.5%
20-
LVDS_TXCL-
20-
LVDS_TXCL+
20-
LVDS_TXCU-
20-
LVDS_TXCU+
20-
LVDS_TXDL0-
20-
LVDS_TXDL0+
20-
LVDS_TXDL1-
20-
LVDS_TXDL1+
20-
LVDS_TXDL2-
20-
LVDS_TXDL2+
20-
LVDS_TXDU0-
20-
LVDS_TXDU0+
20-
LVDS_TXDU1-
20-
LVDS_TXDU1+
20-
LVDS_TXDU2-
20-
LVDS_TXDU2+
SVID_R_LUMA
SVID_R_CHROMA
B
G
R
LCM_BKLTEN
SVID_LUMA
SVID_CHROMA
58-,54-,53-,52-,51-,50-,49-,48-,47-,46-,44-,41-,40-,39-,38-,37-,35-,34-,33-,32-,31-,29-,28-,26-,25-,23-,19-,18-,13-,12-,11-,10-,9-,8-
R721
OPEN
12
R63
100K_5%
+V1.5S
R71
12
R95
12
0_5%
CRT_B
CRT_G
CRT_R
CRT_HSYNC
CRT_VSYNC
50-,31-,28-
12
31-,28-
R5006
12
R5007
31-,28-
R62
12
31-,28-
0_5%
1
LVDS_TXCL-
2
LVDS_TXCL+
LVDS_TXCU-
LVDS_TXCU+
LVDS_TXDL0-
LVDS_TXDL1LVDS_TXDL2-
LVDS_TXDL0+
LVDS_TXDL1+
LVDS_TXDL2+
44-,38-,35-,33-,28-,24-,23-,16-,11-,9-
LVDS_TXDU0LVDS_TXDU1LVDS_TXDU2-
R72
R741
R742
R97
R98
1
1
1
1
1
LVDS_TXDU0+
LVDS_TXDU1+
LVDS_TXDU2+
2
2
2
2
2
OPEN
OPEN
OPEN
OPEN
OPEN
12
29-,28-
R700
12
29-,28-
R702
12
29-,28-
R704
12
58-,29-,28-
R703
12
58-,29-,28-
R701
12
29-,28-
R705
12
29-,28-
R706
R49
12
31-,28-
0_5%
1
R50
10K_5%
2
LCM_3S_VDDEN
1
R48
1.5K_1%
2
R699
0_5%
12
30-,28-
12
30-,28-
R698
0_5%
+VCCP
35-,32-,24-,23-,21-,16-,15-,14-,13-,9-,8-,20-
1
OPEN
R753
2
R65
12
0_5%
R752
12
255_1%
INV_PWM_3
LCM_DDCPCLK
LCM_DDCPDATA
SVID_R_LUMA
SVID_R_CHROMA
4.99K_1%
1
OPEN
R64
2
CRT_DDCCLK
CRT_DDCDATA
1
2
0_5%
0_5%
0_5%
0_5%
0_5%
0_5%
0_5%
39_5%
39_5%
+V3S
1
R730
R731
10K_5%
10K_5%
2
U7-3
D32
L_BKLTCTL
J30
L_BKLTEN
H30
L_CLKCTLA
H29
L_CLKCTLB
G26
L_DDC_CLK
G25
L_DDC_DATA
B38
L_IBG
C35
L_VBG
F32
L_VDDEN
C33
L_VREFH
C32
20202020-
202020-
202020-
202020-
202020-
R749
1
2
L_VREFL
A33
LA_CLK#
A32
LA_CLK
E27
LB_CLK#
E26
LB_CLK
C37
LA_DATA#_0
B35
LA_DATA#_1
A37
LA_DATA#_2
B37
LA_DATA_0
B34
LA_DATA_1
A36
LA_DATA_2
G30
LB_DATA#_0
D30
LB_DATA#_1
F29
LB_DATA#_2
F30
LB_DATA_0
D29
LB_DATA_1
F28
LB_DATA_2
A16
TV_DACA_OUT
C18
TV_DACB_OUT
A19
TV_DACC_OUT
J20
TV_IREF
B16
TV_IRTNA
B18
TV_IRTNB
B19
TV_IRTNC
K30
TV_DCONSEL0
J29
TV_DCONSEL1
B
E23
CRT_BLUE
D23
CRT_BLUE#
G
C22
CRT_GREEN
B22
CRT_GREEN#
R
A21
CRT_RED
B21
CRT_RED#
C26
CRT_DDC_CLK
C25
CRT_DDC_DATA
G23
CRT_HSYNC
J22
CRT_IREF
H23
CRT_VSYNC
ITL_CALISTOGA_MICRO_FCBGA_TSB_1466P
1
OPEN
OPEN
R748
2
D40
EXP_A_COMPI
D38
EXP_A_COMPO
EXP_A_RXN_0
EXP_A_RXN_1
EXP_A_RXN_2
EXP_A_RXN_3
EXP_A_RXN_4
EXP_A_RXN_5
EXP_A_RXN_6
EXP_A_RXN_7
EXP_A_RXN_8
EXP_A_RXN_9
EXP_A_RXN_10
LVDS
EXP_A_RXN_11
EXP_A_RXN_12
EXP_A_RXN_13
EXP_A_RXN_14
EXP_A_RXN_15
EXP_A_RXP_0
EXP_A_RXP_1
EXP_A_RXP_2
EXP_A_RXP_3
EXP_A_RXP_4
EXP_A_RXP_5
EXP_A_RXP_6
EXP_A_RXP_7
EXP_A_RXP_8
EXP_A_RXP_9
EXP_A_RXP_10
EXP_A_RXP_11
EXP_A_RXP_12
EXP_A_RXP_13
EXP_A_RXP_14
EXP_A_RXP_15
EXP_A_TXN_0
EXP_A_TXN_1
EXP_A_TXN_2
EXP_A_TXN_3
EXP_A_TXN_4
EXP_A_TXN_5
EXP_A_TXN_6
EXP_A_TXN_7
EXP_A_TXN_8
PCI-EXPRESS GRAPHICS
EXP_A_TXN_9
EXP_A_TXN_10
TV
EXP_A_TXN_11
EXP_A_TXN_12
EXP_A_TXN_13
EXP_A_TXN_14
EXP_A_TXN_15
EXP_A_TXP_0
EXP_A_TXP_1
EXP_A_TXP_2
EXP_A_TXP_3
EXP_A_TXP_4
EXP_A_TXP_5
VGA
EXP_A_TXP_6
EXP_A_TXP_7
EXP_A_TXP_8
EXP_A_TXP_9
EXP_A_TXP_10
EXP_A_TXP_11
EXP_A_TXP_12
EXP_A_TXP_13
EXP_A_TXP_14
EXP_A_TXP_15
F34
G38
H34
J38
L34
M38
N34
P38
R34
T38
V34
W38
Y34
AA38
AB34
AC38
D34
F38
G34
H38
J34
L38
M34
N38
P34
R38
T34
V38
W34
Y38
AA34
AB38
F36
G40
H36
J40
L36
M40
N36
P40
R36
T40
V36
W40
Y36
AA40
AB36
AC40
D36
F40
G36
H40
J36
L40
M36
N40
P36
R40
T36
V40
W36
Y40
AA36
AB40
28282828282828282828282828282828-
28282828282828282828282828282828-
20202020202020202020202020202020-
20202020202020202020202020202020-
+V1.5S_PCIE
R51
12
24.9_1%
PEG_C_RXN(0)
PEG_C_RXN(1)
PEG_C_RXN(2)
PEG_C_RXN(3)
PEG_C_RXN(4)
PEG_C_RXN(5)
PEG_C_RXN(6)
PEG_C_RXN(7)
PEG_C_RXN(8)
PEG_C_RXN(9)
PEG_C_RXN(10)
PEG_C_RXN(11)
PEG_C_RXN(12)
PEG_C_RXN(13)
PEG_C_RXN(14)
PEG_C_RXN(15)
PEG_C_RXP(0)
PEG_C_RXP(1)
PEG_C_RXP(2)
PEG_C_RXP(3)
PEG_C_RXP(4)
PEG_C_RXP(5)
PEG_C_RXP(6)
PEG_C_RXP(7)
PEG_C_RXP(8)
PEG_C_RXP(9)
PEG_C_RXP(10)
PEG_C_RXP(11)
PEG_C_RXP(12)
PEG_C_RXP(13)
PEG_C_RXP(14)
PEG_C_RXP(15)
PEG_TXN(0)
PEG_TXN(1)
PEG_TXN(2)
PEG_TXN(3)
PEG_TXN(4)
PEG_TXN(5)
PEG_TXN(6)
PEG_TXN(7)
PEG_TXN(8)
PEG_TXN(9)
PEG_TXN(10)
PEG_TXN(11)
PEG_TXN(12)
PEG_TXN(13)
PEG_TXN(14)
PEG_TXN(15)
PEG_TXP(0)
PEG_TXP(1)
PEG_TXP(2)
PEG_TXP(3)
PEG_TXP(4)
PEG_TXP(5)
PEG_TXP(6)
PEG_TXP(7)
PEG_TXP(8)
PEG_TXP(9)
PEG_TXP(10)
PEG_TXP(11)
PEG_TXP(12)
PEG_TXP(13)
PEG_TXP(14)
PEG_TXP(15)
CHANGE by
23-
Drawer_Name
PEG_TXP(0)
PEG_TXP(1)
PEG_TXP(2) PEG_C_TXP(2)
PEG_TXP(3) PEG_C_TXP(3)
PEG_TXP(4)
PEG_TXP(5)
PEG_TXP(6) PEG_C_TXP(6)
PEG_TXP(7) PEG_C_TXP(7)
PEG_TXN(9)
PEG_TXP(12)
20-
C40
12
20-
C42
12
20-
C66
12
20-
C67
12
20-
C43
12
20-
C44
12
20-
C68
1
20-
C69
12
20-
C45
1
20-
C46
12
20-
C70
12
20-
C71
12
20-
C47
12
20-
C48
1
20-
C72
12
20-
C73
12
20-
C49
12
20-
C50
12
20-
C74
12
20-
C75
12
20-
C51
12
20-
C52
12
20-
C76
12
20-
C77
12
20-
C53
12
20-
C54
12
20-
C78
12
20-
C79
12
20-
C82
12
20-
C83
12
20-
C80
12
20-
C81
12
0.1uF_16v
0.1uF_16v
0.1uF_16v
0.1uF_16v
0.1uF_16v
0.1uF_16v
2
0.1uF_16v
0.1uF_16v
2
0.1uF_16v
0.1uF_16v
0.1uF_16v
0.1uF_16v
0.1uF_16v
2
0.1uF_16v
0.1uF_16v
0.1uF_16v
0.1uF_16v
0.1uF_16v
0.1uF_16v
0.1uF_16v
0.1uF_16v
0.1uF_16v
0.1uF_16v
0.1uF_16v
0.1uF_16v
0.1uF_16v
0.1uF_16v
0.1uF_16v
0.1uF_16v
0.1uF_16v
0.1uF_16v
0.1uF_16v
28-
28-
28-
28-
28-
28-
28-
28-
28-
28-
28-
28-
28-31-,28-
28-
28-
28-
28-
28-
28-
28-
28-
28-
28-
28-
28-
28-
28-
28-
28-
28-
28-
28-
PEG_C_TXP(0)
PEG_C_TXN(0)PEG_TXN(0)
PEG_C_TXP(1)
PEG_C_TXN(1)PEG_TXN(1)
PEG_C_TXN(2)PEG_TXN(2)
PEG_C_TXN(3)PEG_TXN(3)
PEG_C_TXP(4)
PEG_C_TXN(4)PEG_TXN(4)
PEG_C_TXP(5)
PEG_C_TXN(5)PEG_TXN(5)
PEG_C_TXN(6)PEG_TXN(6)
PEG_C_TXN(7)PEG_TXN(7)
PEG_C_TXP(8)PEG_TXP(8)
PEG_C_TXN(8)PEG_TXN(8)
PEG_C_TXP(9)PEG_TXP(9)
PEG_C_TXN(9)
PEG_C_TXP(10)PEG_TXP(10)
PEG_C_TXN(10)PEG_TXN(10)
PEG_C_TXP(11)PEG_TXP(11)
PEG_C_TXN(11)PEG_TXN(11)
PEG_C_TXP(12)
PEG_C_TXN(12)PEG_TXN(12)
PEG_C_TXP(13)PEG_TXP(13)
PEG_C_TXN(13)PEG_TXN(13)
PEG_C_TXP(14)PEG_TXP(14)
PEG_C_TXN(14)PEG_TXN(14)
PEG_C_TXP(15)PEG_TXP(15)
PEG_C_TXN(15)PEG_TXN(15)
Place to near NB
INVENTEC
TITLE
San Antonio 10 Vista
Calistoga-2
SIZE
CODE DOC. NUMBER REV
A3
24-Nov-2006
CS
SHEET
OF
20 65
A031310A2101801